Commit | Line | Data |
---|---|---|
5e1f6430 HPN |
1 | # mach: crisv32 |
2 | # output: 4000c3af\n40000020\n40000080\n40000000\n | |
3 | ||
4 | ; Check that RFE affects CCS the right way. | |
5 | ||
6 | .include "testutils.inc" | |
7 | start | |
8 | ||
9 | ; Set SPC to 1 to disable single step exceptions when S flag is set. | |
10 | move 1,spc | |
11 | ||
12 | ; CCS: | |
13 | ; 31 24 23 16 15 8 7 0 | |
14 | ; +---+-----------+-------+-------+-----------+---+---------------+ | |
15 | ; |Q M|S R P U I X N Z V C|S R P U I X N Z V C|S R P U I X N Z V C| | |
16 | ; | |2 2 2 2 2 2 2 2 2 2|1 1 1 1 1 1 1 1 1 1| | | |
17 | ; +---+-----------+-------+-------+-----------+---+---------------+ | |
18 | ||
19 | ; Clear S R P U I X N Z V C, set S1 R1 P1 (not U1) I1 X1 N1 Z1 V1 C1, | |
20 | ; clear S2 R2 P2 U2 N2 Z2 V2 C2, Q; set I2 X2 M: | |
21 | ; 1 1 0 0 0 0 1 1 0 0 0 0 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 | |
22 | move 0x430efc00,ccs | |
23 | ||
24 | test_cc 0 0 0 0 | |
25 | ||
26 | rfe | |
27 | test_cc 1 1 1 1 | |
28 | move ccs,r3 | |
29 | dumpr3 ; 0x4000c3af | |
30 | ||
31 | rfe | |
32 | test_cc 0 0 0 0 | |
33 | move ccs,r3 | |
34 | dumpr3 ; 0x40000020 | |
35 | ||
36 | rfe | |
37 | test_cc 0 0 0 0 | |
38 | move ccs,r3 | |
39 | dumpr3 ; 0x40000080 | |
40 | ||
41 | or.w 0x100,r3 | |
42 | move $r3,ccs | |
43 | rfe | |
44 | move ccs,r3 | |
45 | dumpr3 ; 0x40000000 | |
46 | ||
47 | quit |