Commit | Line | Data |
---|---|---|
5e1f6430 HPN |
1 | # mach: crisv32 |
2 | # output: c008c1af\n40000220\n40000080\n40000000\n | |
3 | ||
4 | ; Check that RFN affects CCS the right way. | |
5 | ||
6 | .include "testutils.inc" | |
7 | start | |
8 | ||
9 | ; Set SPC to 1 to disable single step exceptions when S flag is set. | |
10 | move 1,spc | |
11 | ||
12 | ; CCS: | |
13 | ; 31 24 23 16 15 8 7 0 | |
14 | ; +---+-----------+-------+-------+-----------+---+---------------+ | |
15 | ; |Q M|S R P U I X N Z V C|S R P U I X N Z V C|S R P U I X N Z V C| | |
16 | ; | |2 2 2 2 2 2 2 2 2 2|1 1 1 1 1 1 1 1 1 1| | | |
17 | ; +---+-----------+-------+-------+-----------+---+---------------+ | |
18 | ||
19 | ; Clear S R P U I X N Z V C, set R1 P1 (not U1) I1 X1 N1 Z1 V1 C1, | |
20 | ; clear S1 R2 P2 U2 N2 Z2 V2 C2, set S2 I2 X2 Q, clear M: | |
21 | ; 1 1 0 0 0 0 1 1 0 0 0 0 1 1 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 | |
22 | move 0xa306fc00,ccs | |
23 | ||
24 | test_cc 0 0 0 0 | |
25 | ||
26 | rfn | |
27 | test_cc 1 1 1 1 | |
28 | move ccs,r3 | |
29 | dumpr3 ; 0xc008c1af | |
30 | ||
31 | and.d 0x3fffffff,r3 | |
32 | move r3,ccs | |
33 | rfn | |
34 | test_cc 0 0 0 0 | |
35 | move ccs,r3 | |
36 | dumpr3 ; 0x40000220 | |
37 | ||
38 | and.d 0x3fffffff,r3 | |
39 | move r3,ccs | |
40 | rfn | |
41 | test_cc 0 0 0 0 | |
42 | move ccs,r3 | |
43 | dumpr3 ; 0x40000080 | |
44 | ||
45 | and.d 0x3fffffff,r3 | |
46 | move r3,ccs | |
47 | or.w 0x100,r3 | |
48 | move r3,ccs | |
49 | rfn | |
50 | move ccs,r3 | |
51 | dumpr3 ; 0x40000000 | |
52 | ||
53 | quit |