Commit | Line | Data |
---|---|---|
5e1f6430 HPN |
1 | #mach: crisv32 |
2 | #output: Basic clock cycles, total @: 17\n | |
3 | #output: Memory source stall cycles: 0\n | |
4 | #output: Memory read-after-write stall cycles: 0\n | |
5 | #output: Movem source stall cycles: 0\n | |
6 | #output: Movem destination stall cycles: 0\n | |
7 | #output: Movem address stall cycles: 0\n | |
8 | #output: Multiplication source stall cycles: 0\n | |
9 | #output: Jump source stall cycles: 5\n | |
10 | #output: Branch misprediction stall cycles: 0\n | |
11 | #output: Jump target stall cycles: 0\n | |
12 | #sim: --cris-cycles=basic | |
13 | ||
14 | ; Check that "ret"-type insns get the right number of penalty | |
15 | ; cycles for the special register source. | |
16 | ||
17 | .include "testutils.inc" | |
18 | startnostack | |
19 | move.d 1f,$r1 | |
20 | move.d 0f,$r0 | |
21 | move $r0,$mof | |
22 | jump $mof ; 2 cycles penalty. | |
23 | nop | |
24 | ||
25 | 0: | |
26 | move [$r1],$srp | |
27 | nop | |
28 | ret ; 1 cycle penalty. | |
29 | nop | |
30 | ||
31 | break 15 | |
32 | ||
33 | 0: | |
34 | move 2f,$nrp | |
35 | nop | |
36 | nop | |
37 | jump $nrp ; no penalty. | |
38 | nop | |
39 | ||
40 | break 15 | |
41 | ||
42 | 2: | |
43 | move 3f,$srp ; 2 cycles penalty. | |
44 | ret | |
45 | nop | |
46 | ||
47 | 3: | |
48 | break 15 | |
49 | 1: | |
50 | .dword 0b |