[deliverable/binutils-gdb.git] / sim / testsuite / sim / cris / asm / tmvmrv32.ms

#mach: crisv32
#output: Basic clock cycles, total @: 17\n
#output: Memory source stall cycles: 1\n
#output: Memory read-after-write stall cycles: 0\n
#output: Movem source stall cycles: 0\n
#output: Movem destination stall cycles: 10\n
#output: Movem address stall cycles: 0\n
#output: Multiplication source stall cycles: 0\n
#output: Jump source stall cycles: 0\n
#output: Branch misprediction stall cycles: 0\n
#output: Jump target stall cycles: 0\n
#sim: --cris-cycles=basic

 .include "tmvmrv10.ms"
Commit	Line	Data
5e1f6430 HPN	1	#mach: crisv32
	2	#output: Basic clock cycles, total @: 17\n
	3	#output: Memory source stall cycles: 1\n
	4	#output: Memory read-after-write stall cycles: 0\n
	5	#output: Movem source stall cycles: 0\n
	6	#output: Movem destination stall cycles: 10\n
	7	#output: Movem address stall cycles: 0\n
	8	#output: Multiplication source stall cycles: 0\n
	9	#output: Jump source stall cycles: 0\n
	10	#output: Branch misprediction stall cycles: 0\n
	11	#output: Jump target stall cycles: 0\n
	12	#sim: --cris-cycles=basic
	13
	14	.include "tmvmrv10.ms"