Commit | Line | Data |
---|---|---|
4a306116 DB |
1 | # frv testcase for ccmp $GRi,$GRj,$CCi,$cond |
2 | # mach: all | |
3 | ||
4 | .include "testutils.inc" | |
5 | ||
6 | start | |
7 | ||
8 | .global ccmp | |
9 | ccmp: | |
10 | set_spr_immed 0x1b1b,cccr | |
11 | ||
12 | set_gr_immed 1,gr7 | |
13 | set_gr_immed 2,gr8 | |
14 | set_icc 0x0f,0 ; Set mask opposite of expected | |
15 | ccmp gr8,gr7,cc0,1 | |
16 | test_icc 0 0 0 0 icc0 | |
17 | ||
18 | set_gr_immed 1,gr7 | |
19 | set_gr_limmed 0x8000,0x0000,gr8 | |
20 | set_icc 0x0d,0 ; Set mask opposite of expected | |
21 | ccmp gr8,gr7,cc0,1 | |
22 | test_icc 0 0 1 0 icc0 | |
23 | ||
24 | set_icc 0x0b,0 ; Set mask opposite of expected | |
25 | ccmp gr8,gr8,cc4,1 | |
26 | test_icc 0 1 0 0 icc0 | |
27 | ||
28 | set_gr_immed 0,gr8 | |
29 | set_icc 0x06,0 ; Set mask opposite of expected | |
30 | ccmp gr8,gr7,cc4,1 | |
31 | test_icc 1 0 0 1 icc0 | |
32 | ||
33 | set_gr_immed 1,gr7 | |
34 | set_gr_immed 2,gr8 | |
35 | set_icc 0x0f,0 ; Set mask opposite of expected | |
36 | ccmp gr8,gr7,cc0,0 | |
37 | test_icc 1 1 1 1 icc0 | |
38 | ||
39 | set_gr_immed 1,gr7 | |
40 | set_gr_limmed 0x8000,0x0000,gr8 | |
41 | set_icc 0x0d,0 ; Set mask opposite of expected | |
42 | ccmp gr8,gr7,cc0,0 | |
43 | test_icc 1 1 0 1 icc0 | |
44 | ||
45 | set_icc 0x0b,0 ; Set mask opposite of expected | |
46 | ccmp gr8,gr8,cc4,0 | |
47 | test_icc 1 0 1 1 icc0 | |
48 | ||
49 | set_icc 0x06,0 ; Set mask opposite of expected | |
50 | ccmp gr8,gr7,cc4,0 | |
51 | test_icc 0 1 1 0 icc0 | |
52 | ||
53 | set_gr_immed 1,gr7 | |
54 | set_gr_immed 2,gr8 | |
55 | set_icc 0x0f,1 ; Set mask opposite of expected | |
56 | ccmp gr8,gr7,cc1,0 | |
57 | test_icc 0 0 0 0 icc1 | |
58 | ||
59 | set_gr_immed 1,gr7 | |
60 | set_gr_limmed 0x8000,0x0000,gr8 | |
61 | set_icc 0x0d,1 ; Set mask opposite of expected | |
62 | ccmp gr8,gr7,cc1,0 | |
63 | test_icc 0 0 1 0 icc1 | |
64 | ||
65 | set_icc 0x0b,1 ; Set mask opposite of expected | |
66 | ccmp gr8,gr8,cc5,0 | |
67 | test_icc 0 1 0 0 icc1 | |
68 | ||
69 | set_gr_immed 0,gr8 | |
70 | set_icc 0x06,1 ; Set mask opposite of expected | |
71 | ccmp gr8,gr7,cc5,0 | |
72 | test_icc 1 0 0 1 icc1 | |
73 | ||
74 | set_gr_immed 1,gr7 | |
75 | set_gr_immed 2,gr8 | |
76 | set_icc 0x0f,1 ; Set mask opposite of expected | |
77 | ccmp gr8,gr7,cc1,1 | |
78 | test_icc 1 1 1 1 icc1 | |
79 | ||
80 | set_gr_immed 1,gr7 | |
81 | set_gr_limmed 0x8000,0x0000,gr8 | |
82 | set_icc 0x0d,1 ; Set mask opposite of expected | |
83 | ccmp gr8,gr7,cc1,1 | |
84 | test_icc 1 1 0 1 icc1 | |
85 | ||
86 | set_icc 0x0b,1 ; Set mask opposite of expected | |
87 | ccmp gr8,gr8,cc5,1 | |
88 | test_icc 1 0 1 1 icc1 | |
89 | ||
90 | set_icc 0x06,1 ; Set mask opposite of expected | |
91 | ccmp gr8,gr7,cc5,1 | |
92 | test_icc 0 1 1 0 icc1 | |
93 | ||
94 | set_gr_immed 1,gr7 | |
95 | set_gr_immed 2,gr8 | |
96 | set_icc 0x0f,2 ; Set mask opposite of expected | |
97 | ccmp gr8,gr7,cc2,0 | |
98 | test_icc 1 1 1 1 icc2 | |
99 | ||
100 | set_gr_immed 1,gr7 | |
101 | set_gr_limmed 0x8000,0x0000,gr8 | |
102 | set_icc 0x0d,2 ; Set mask opposite of expected | |
103 | ccmp gr8,gr7,cc2,0 | |
104 | test_icc 1 1 0 1 icc2 | |
105 | ||
106 | set_icc 0x0b,2 ; Set mask opposite of expected | |
107 | ccmp gr8,gr8,cc6,1 | |
108 | test_icc 1 0 1 1 icc2 | |
109 | ||
110 | set_icc 0x06,2 ; Set mask opposite of expected | |
111 | ccmp gr8,gr7,cc6,1 | |
112 | test_icc 0 1 1 0 icc2 | |
113 | ||
114 | set_gr_immed 1,gr7 | |
115 | set_gr_immed 2,gr8 | |
116 | set_icc 0x0f,3 ; Set mask opposite of expected | |
117 | ccmp gr8,gr7,cc3,0 | |
118 | test_icc 1 1 1 1 icc3 | |
119 | ||
120 | set_gr_immed 1,gr7 | |
121 | set_gr_limmed 0x8000,0x0000,gr8 | |
122 | set_icc 0x0d,3 ; Set mask opposite of expected | |
123 | ccmp gr8,gr7,cc3,0 | |
124 | test_icc 1 1 0 1 icc3 | |
125 | ||
126 | set_icc 0x0b,3 ; Set mask opposite of expected | |
127 | ccmp gr8,gr8,cc7,1 | |
128 | test_icc 1 0 1 1 icc3 | |
129 | ||
130 | set_icc 0x06,3 ; Set mask opposite of expected | |
131 | ccmp gr8,gr7,cc7,1 | |
132 | test_icc 0 1 1 0 icc3 | |
133 | ||
134 | pass |