projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 4a306116 DB |
1 | # frv testcase for csdiv $GRi,$GRj,$GRk,$CCi,$cond |
| 2 | # mach: all | |
| 3 | ||
| 4 | .include "testutils.inc" | |
| 5 | ||
| 6 | start | |
| 7 | ||
| 8 | .global csdiv | |
| 9 | csdiv: | |
| 10 | set_spr_immed 0x1b1b,cccr | |
| 11 | ||
| 12 | ; simple division 12 / 3 | |
| 13 | set_gr_immed 3,gr3 | |
| 14 | set_gr_immed 12,gr1 | |
| 15 | csdiv gr1,gr3,gr2,cc4,1 | |
| 16 | test_gr_immed 4,gr2 | |
| 17 | ||
| 18 | ; Random example | |
| 19 | set_gr_limmed 0x0123,0x4567,gr3 | |
| 20 | set_gr_limmed 0xfedc,0xba98,gr1 | |
| 21 | csdiv gr1,gr3,gr2,cc4,1 | |
| 22 | test_gr_immed -1,gr2 | |
| 23 | ||
| 24 | ; Special case from the Arch Spec Vol 2 | |
| 25 | and_spr_immed -33,isr ; turn off isr.edem | |
| 26 | ; set up exception handler | |
| 27 | set_psr_et 1 | |
| 28 | and_spr_immed -4081,tbr ; clear tbr.tt | |
| 29 | set_gr_spr tbr,gr17 | |
| 30 | inc_gr_immed 0x170,gr17 ; address of exception handler | |
| 31 | set_bctrlr_0_0 gr17 | |
| 32 | set_spr_immed 128,lcr | |
| 33 | set_gr_immed 0,gr15 | |
| 34 | ||
| 35 | ; divide will cause overflow | |
| 36 | set_spr_addr ok1,lr | |
| 37 | set_gr_addr e1,gr17 | |
| 38 | set_gr_immed -1,gr3 | |
| 39 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 40 | e1: csdiv gr1,gr3,gr2,cc4,1 | |
| 41 | test_gr_immed 1,gr15 | |
| 42 | test_gr_limmed 0x8000,0x0000,gr2 | |
| 43 | ||
| 44 | ; Special case from the Arch Spec Vol 2 | |
| 45 | or_spr_immed 0x20,isr ; turn on isr.edem | |
| 46 | set_gr_immed -1,gr3 | |
| 47 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 48 | csdiv gr1,gr3,gr2,cc4,1 | |
| 49 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 50 | ||
| 51 | ; simple division 12 / 3 | |
| 52 | set_gr_immed 3,gr3 | |
| 53 | set_gr_immed 12,gr1 | |
| 54 | csdiv gr1,gr3,gr2,cc4,0 | |
| 55 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 56 | ||
| 57 | ; Random example | |
| 58 | set_gr_limmed 0x0123,0x4567,gr3 | |
| 59 | set_gr_limmed 0xfedc,0xba98,gr1 | |
| 60 | csdiv gr1,gr3,gr2,cc4,0 | |
| 61 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 62 | ||
| 63 | ; Special case from the Arch Spec Vol 2 | |
| 64 | and_spr_immed -33,isr ; turn off isr.edem | |
| 65 | set_gr_immed -1,gr3 | |
| 66 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 67 | csdiv gr1,gr3,gr2,cc4,0 | |
| 68 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 69 | ||
| 70 | or_spr_immed 0x20,isr ; turn on isr.edem | |
| 71 | set_gr_immed -1,gr3 | |
| 72 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 73 | csdiv gr1,gr3,gr2,cc4,0 | |
| 74 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 75 | ||
| 76 | ; simple division 12 / 3 | |
| 77 | set_gr_immed 3,gr3 | |
| 78 | set_gr_immed 12,gr1 | |
| 79 | csdiv gr1,gr3,gr2,cc5,0 | |
| 80 | test_gr_immed 4,gr2 | |
| 81 | ||
| 82 | ; Random example | |
| 83 | set_gr_limmed 0x0123,0x4567,gr3 | |
| 84 | set_gr_limmed 0xfedc,0xba98,gr1 | |
| 85 | csdiv gr1,gr3,gr2,cc5,0 | |
| 86 | test_gr_immed -1,gr2 | |
| 87 | ||
| 88 | ; Special case from the Arch Spec Vol 2 | |
| 89 | and_spr_immed -33,isr ; turn off isr.edem | |
| 90 | ; divide will cause overflow | |
| 91 | set_spr_addr ok1,lr | |
| 92 | set_gr_addr e2,gr17 | |
| 93 | set_gr_immed -1,gr3 | |
| 94 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 95 | e2: csdiv gr1,gr3,gr2,cc5,0 | |
| 96 | test_gr_immed 2,gr15 | |
| 97 | test_gr_limmed 0x8000,0x0000,gr2 | |
| 98 | ||
| 99 | ; Special case from the Arch Spec Vol 2 | |
| 100 | or_spr_immed 0x20,isr ; turn on isr.edem | |
| 101 | set_gr_immed -1,gr3 | |
| 102 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 103 | csdiv gr1,gr3,gr2,cc5,0 | |
| 104 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 105 | ||
| 106 | ; simple division 12 / 3 | |
| 107 | set_gr_immed 3,gr3 | |
| 108 | set_gr_immed 12,gr1 | |
| 109 | csdiv gr1,gr3,gr2,cc5,1 | |
| 110 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 111 | ||
| 112 | ; Random example | |
| 113 | set_gr_limmed 0x0123,0x4567,gr3 | |
| 114 | set_gr_limmed 0xfedc,0xba98,gr1 | |
| 115 | csdiv gr1,gr3,gr2,cc5,1 | |
| 116 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 117 | ||
| 118 | ; Special case from the Arch Spec Vol 2 | |
| 119 | and_spr_immed -33,isr ; turn off isr.edem | |
| 120 | set_gr_immed -1,gr3 | |
| 121 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 122 | csdiv gr1,gr3,gr2,cc5,1 | |
| 123 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 124 | ||
| 125 | or_spr_immed 0x20,isr ; turn on isr.edem | |
| 126 | set_gr_immed -1,gr3 | |
| 127 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 128 | csdiv gr1,gr3,gr2,cc5,1 | |
| 129 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 130 | ||
| 131 | ; simple division 12 / 3 | |
| 132 | set_gr_immed 3,gr3 | |
| 133 | set_gr_immed 12,gr1 | |
| 134 | csdiv gr1,gr3,gr2,cc6,0 | |
| 135 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 136 | ||
| 137 | ; Random example | |
| 138 | set_gr_limmed 0x0123,0x4567,gr3 | |
| 139 | set_gr_limmed 0xfedc,0xba98,gr1 | |
| 140 | csdiv gr1,gr3,gr2,cc6,0 | |
| 141 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 142 | ||
| 143 | ; Special case from the Arch Spec Vol 2 | |
| 144 | and_spr_immed -33,isr ; turn off isr.edem | |
| 145 | set_gr_immed -1,gr3 | |
| 146 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 147 | csdiv gr1,gr3,gr2,cc6,0 | |
| 148 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 149 | ||
| 150 | or_spr_immed 0x20,isr ; turn on isr.edem | |
| 151 | set_gr_immed -1,gr3 | |
| 152 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 153 | csdiv gr1,gr3,gr2,cc6,0 | |
| 154 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 155 | ||
| 156 | ; simple division 12 / 3 | |
| 157 | set_gr_immed 3,gr3 | |
| 158 | set_gr_immed 12,gr1 | |
| 159 | csdiv gr1,gr3,gr2,cc7,1 | |
| 160 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 161 | ||
| 162 | ; Random example | |
| 163 | set_gr_limmed 0x0123,0x4567,gr3 | |
| 164 | set_gr_limmed 0xfedc,0xba98,gr1 | |
| 165 | csdiv gr1,gr3,gr2,cc7,1 | |
| 166 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 167 | ||
| 168 | ; Special case from the Arch Spec Vol 2 | |
| 169 | and_spr_immed -33,isr ; turn off isr.edem | |
| 170 | set_gr_immed -1,gr3 | |
| 171 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 172 | csdiv gr1,gr3,gr2,cc7,1 | |
| 173 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 174 | ||
| 175 | or_spr_immed 0x20,isr ; turn on isr.edem | |
| 176 | set_gr_immed -1,gr3 | |
| 177 | set_gr_limmed 0x8000,0x0000,gr1 | |
| 178 | csdiv gr1,gr3,gr2,cc7,1 | |
| 179 | test_gr_limmed 0x7fff,0xffff,gr2 | |
| 180 | ||
| 181 | pass | |
| 182 | ||
| 183 | ok1: ; exception handler for overflow | |
| 184 | test_spr_bits 0x18,3,0x2,isr ; isr.dtt is set | |
| 185 | test_spr_gr epcr0,gr17 ; return address set | |
| 186 | test_spr_bits 0x0001,0,0x1,esr0 ; esr0 is valid | |
| 187 | test_spr_bits 0x003e,1,0x13,esr0 ; esr0.ec is set | |
| 188 | inc_gr_immed 1,gr15 | |
| 189 | rett 0 | |
| 190 | fail |