Commit | Line | Data |
---|---|---|
4a306116 DB |
1 | # frv testcase for tnc $ICCi_2,$GRi,$GRj |
2 | # mach: all | |
3 | ||
4 | .include "testutils.inc" | |
5 | ||
6 | start | |
7 | ||
8 | .global tnc | |
9 | tnc: | |
10 | and_spr_immed -4081,tbr ; clear tbr.tt | |
11 | set_gr_spr tbr,gr7 | |
12 | inc_gr_immed 2112,gr7 ; address of exception handler | |
13 | set_bctrlr_0_0 gr7 ; bctrlr 0,0 | |
14 | ||
15 | set_spr_immed 128,lcr | |
16 | set_gr_immed 0,gr7 | |
17 | set_gr_immed 4,gr8 | |
18 | ||
19 | set_psr_et 1 | |
20 | set_spr_addr ok0,lr | |
21 | set_icc 0x0 0 | |
22 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
23 | fail | |
24 | ok0: | |
25 | set_spr_addr bad,lr | |
26 | set_icc 0x1 0 | |
27 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
28 | ||
29 | set_psr_et 1 | |
30 | set_spr_addr ok2,lr | |
31 | set_icc 0x2 0 | |
32 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
33 | fail | |
34 | ok2: | |
35 | set_spr_addr bad,lr | |
36 | set_icc 0x3 0 | |
37 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
38 | ||
39 | set_psr_et 1 | |
40 | set_spr_addr ok4,lr | |
41 | set_icc 0x4 0 | |
42 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
43 | fail | |
44 | ok4: | |
45 | set_spr_addr bad,lr | |
46 | set_icc 0x5 0 | |
47 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
48 | ||
49 | set_psr_et 1 | |
50 | set_spr_addr ok6,lr | |
51 | set_icc 0x6 0 | |
52 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
53 | fail | |
54 | ok6: | |
55 | set_spr_addr bad,lr | |
56 | set_icc 0x7 0 | |
57 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
58 | ||
59 | set_psr_et 1 | |
60 | set_spr_addr ok8,lr | |
61 | set_icc 0x8 0 | |
62 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
63 | fail | |
64 | ok8: | |
65 | set_spr_addr bad,lr | |
66 | set_icc 0x9 0 | |
67 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
68 | ||
69 | set_psr_et 1 | |
70 | set_spr_addr oka,lr | |
71 | set_icc 0xa 0 | |
72 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
73 | fail | |
74 | oka: | |
75 | set_spr_addr bad,lr | |
76 | set_icc 0xb 0 | |
77 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
78 | ||
79 | set_psr_et 1 | |
80 | set_spr_addr okc,lr | |
81 | set_icc 0xc 0 | |
82 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
83 | fail | |
84 | okc: | |
85 | set_spr_addr bad,lr | |
86 | set_icc 0xd 0 | |
87 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
88 | ||
89 | set_psr_et 1 | |
90 | set_spr_addr oke,lr | |
91 | set_icc 0xe 0 | |
92 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
93 | fail | |
94 | oke: | |
95 | set_spr_addr bad,lr | |
96 | set_icc 0xf 0 | |
97 | tnc icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 | |
98 | ||
99 | pass | |
100 | bad: | |
101 | fail |