[deliverable/binutils-gdb.git] / sim / testsuite / sim / h8300 / das.s

# Hitachi H8 testcase 'das'
# mach(): all
# as(h8300):	--defsym sim_cpu=0
# as(h8300h):	--defsym sim_cpu=1
# as(h8300s):	--defsym sim_cpu=2
# as(h8sx):	--defsym sim_cpu=3
# ld(h8300h):	-m h8300helf
# ld(h8300s):	-m h8300self
# ld(h8sx):	-m h8300sxelf

	.include "testutils.inc"

	start
	
das_8:
	set_grs_a5a5		; Fill all general regs with a fixed pattern
	;;  fixme set ccr

	;;  das Rd
	das	r0l		; register operand

	;; fixme test ccr	; H=0 N=1 Z=0 V=0 C=0

	test_gr_a5a5 0		; Make sure other general regs not disturbed
	test_gr_a5a5 1		; Make sure other general regs not disturbed
	test_gr_a5a5 2
	test_gr_a5a5 3
	test_gr_a5a5 4
	test_gr_a5a5 5
	test_gr_a5a5 6
	test_gr_a5a5 7

	pass

	exit 0
Commit	Line	Data
5fe8b0df MS	1	# Hitachi H8 testcase 'das'
	2	# mach(): all
	3	# as(h8300): --defsym sim_cpu=0
	4	# as(h8300h): --defsym sim_cpu=1
	5	# as(h8300s): --defsym sim_cpu=2
	6	# as(h8sx): --defsym sim_cpu=3
	7	# ld(h8300h): -m h8300helf
	8	# ld(h8300s): -m h8300self
	9	# ld(h8sx): -m h8300sxelf
	10
	11	.include "testutils.inc"
	12
	13	start
	14
	15	das_8:
	16	set_grs_a5a5 ; Fill all general regs with a fixed pattern
	17	;; fixme set ccr
	18
	19	;; das Rd
	20	das r0l ; register operand
	21
	22	;; fixme test ccr ; H=0 N=1 Z=0 V=0 C=0
	23
	24	test_gr_a5a5 0 ; Make sure other general regs not disturbed
	25	test_gr_a5a5 1 ; Make sure other general regs not disturbed
	26	test_gr_a5a5 2
	27	test_gr_a5a5 3
	28	test_gr_a5a5 4
	29	test_gr_a5a5 5
	30	test_gr_a5a5 6
	31	test_gr_a5a5 7
	32
	33	pass
	34
	35	exit 0
	36