* Contribute Hitachi SH5 simulator.
[deliverable/binutils-gdb.git] / sim / testsuite / sim / sh64 / media / mextr1.cgs
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1# sh testcase for mextr1 $rm, $rn, $rd -*- Asm -*-
2# mach: all
3# as: -isa=shmedia
4# ld: -m shelf64
5
6 .include "media/testutils.inc"
7
8 start
9
10init:
11 # Put a distinguised bit pattern in R0.
12 movi 0x1020, r0
13 shlli r0, 8, r0
14 ori r0, 0x30, r0
15 shlli r0, 8, r0
16 ori r0, 0x40, r0
17 shlli r0, 8, r0
18 ori r0, 0x50, r0
19 shlli r0, 8, r0
20 ori r0, 0x60, r0
21 shlli r0, 8, r0
22 ori r0, 0x70, r0
23 shlli r0, 8, r0
24 ori r0, 0x80, r0
25
26 # Put another distinguished bit pattern in R1.
27 movi 0x1525, r1
28 shlli r1, 8, r1
29 ori r1, 0x35, r1
30 shlli r1, 8, r1
31 ori r1, 0x45, r1
32 shlli r1, 8, r1
33 ori r1, 0x55, r1
34 shlli r1, 8, r1
35 ori r1, 0x65, r1
36 shlli r1, 8, r1
37 ori r1, 0x75, r1
38 shlli r1, 8, r1
39 ori r1, 0x85, r1
40
41mextr1:
42 mextr1 r0, r1, r2
43
44check:
45 # Put the result in R3.
46 movi 0x2535, r3
47 shlli r3, 8, r3
48 ori r3, 0x45, r3
49 shlli r3, 8, r3
50 ori r3, 0x55, r3
51 shlli r3, 8, r3
52 ori r3, 0x65, r3
53 shlli r3, 8, r3
54 ori r3, 0x75, r3
55 shlli r3, 8, r3
56 ori r3, 0x85, r3
57 shlli r3, 8, r3
58 ori r3, 0x10, r3
59
60 pta wrong, tr0
61 bne r2, r3, tr0
62
63okay:
64 pass
65
66wrong:
67 fail
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