Commit | Line | Data |
---|---|---|
63fe2cc7 AC |
1 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * configure.in (SIM_AC_OPTIONS_BITSIZE): Define. | |
4 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
5 | ||
af51b8d5 AC |
6 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
7 | ||
8 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
9 | ||
92f91d1f AC |
10 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
11 | ||
12 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
13 | ||
14 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
15 | ||
16 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
17 | SIM_HOSTENDIAN, SIM_INLINE, SIM_RESERVED_BITS): Delete, moved to | |
18 | common. | |
19 | (SIM_EXTRA_CFLAGS): Update. | |
20 | ||
794e9ac9 AC |
21 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
22 | ||
23 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
24 | ||
b45caf05 AC |
25 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
26 | ||
27 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
28 | ||
2001e533 FL |
29 | Tue Sep 16 23:10:03 1997 Felix Lee <flee@cygnus.com> |
30 | ||
31 | * sim-main.h (kill): macro was missing args. | |
32 | (SIGTRAP): define for MSVC. | |
33 | ||
a2ab5e65 AC |
34 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> |
35 | ||
36 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
37 | ||
70c8abdb AC |
38 | Mon Sep 8 20:10:43 1997 Andrew Cagney <cagney@b1.cygnus.com> |
39 | ||
40 | * cpu.h (CPU_CIA): Define. | |
41 | ||
42 | * sim-main.h (struct sim_state): Delete halt_ok, path_to_halt, | |
43 | restart_ok, path_to_restart members. | |
44 | (struct sim_state): Delete reason, siggnal members. | |
45 | ||
6fea4763 DE |
46 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
47 | ||
48 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
49 | ||
6dbaff8f AC |
50 | Thu Sep 4 17:45:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
51 | ||
52 | * sim-calls.c (sim_open): Add memory before parsing arguments. | |
53 | (sim_read): Delete, replace with sim-hrw. | |
54 | (sim_write): Delete, replace with sim-hrw. | |
55 | ||
a34abff8 AC |
56 | Thu Sep 4 10:48:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
57 | ||
58 | * sim-calls.c (sim_open): Use sim_do_command to add memory, only | |
59 | add memory if none already present. | |
60 | (sim_open): Move init of registers from here. | |
61 | (sim_create_inferior): To here. Init modules. | |
62 | ||
63 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
64 | ||
65 | * sim-calls.c (sim_open): Add zero modulo arg to sim_core_attach. | |
66 | ||
4b2a6aed AC |
67 | Mon Sep 1 11:06:30 1997 Andrew Cagney <cagney@b1.cygnus.com> |
68 | ||
69 | * sim-calls.c (sim_open): Use sim_state_alloc | |
70 | (simulation): Delete. | |
71 | ||
4113ba4c AC |
72 | Sat Aug 30 09:40:47 1997 Andrew Cagney <cagney@b1.cygnus.com> |
73 | ||
74 | * insns (do_trap): Unsigned `i' for unsigned iterator. | |
75 | (do_trap): Ditto for comparison with getpid. | |
76 | ||
88117054 AC |
77 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
78 | ||
79 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
80 | * config.in: Ditto. | |
81 | ||
fafce69a AC |
82 | Wed Aug 27 13:41:24 1997 Andrew Cagney <cagney@b1.cygnus.com> |
83 | ||
d6fea803 AC |
84 | * insns (do_st): Use U8_4 instead of V4_L8. |
85 | ||
fafce69a AC |
86 | * sim-calls.c (sim_open): Add call to sim_analyze_program, update |
87 | call to sim_config. | |
7230ff0f AC |
88 | |
89 | * sim-calls.c (sim_kill): Delete. | |
fafce69a AC |
90 | (sim_create_inferior): Add ABFD argument. Initialize PC from ABFD |
91 | and not SD. | |
92 | (sim_load): Delete, use sim-hload.c. | |
93 | ||
94 | * Makefile.in (SIM_OBJS): Add sim-hload.o module. | |
7230ff0f | 95 | |
247fccde AC |
96 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
97 | ||
98 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
99 | * config.in: Ditto. | |
100 | ||
101 | Mon Aug 25 16:33:29 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
102 | ||
103 | * sim-calls.c (sim_open): Add ABFD argument. | |
104 | (sim_open): Move sim_config call to just after argument | |
105 | parsing. Check return status. | |
106 | ||
9e61ae7d MA |
107 | Fri Aug 8 21:52:27 1997 Mark Alexander <marka@cygnus.com> |
108 | ||
109 | * sim-calls.c (sim_store_register): Allow accumulators | |
110 | other than A0 to be modified. Correct error message. | |
111 | ||
128b5154 AC |
112 | Thu May 29 14:02:40 1997 Andrew Cagney <cagney@b1.cygnus.com> |
113 | ||
114 | * misc.c (tic80_trace_fpu3, tic80_trace_fpu2, tic80_trace_fpu1, | |
115 | tic80_trace_fpu2i): Pass in function prefix. | |
116 | (tic80_trace_ldst): Rewrite so it calls print_one_insn directly. | |
117 | ||
118 | * Makefile.in (SIM_OBJS): Include sim-watch.o module. | |
119 | ||
120 | * sim-main.h (WITH_WATCHPOINTS): Enable watchpoints. | |
121 | ||
122 | * ic (bitnum): Compute bitnum from BITNUM. | |
123 | * insn (bbo, bbz): Use. | |
124 | ||
125 | * insn: Convert long immediate instructions to igen long immediate | |
126 | form. | |
127 | * insn: Add disasembler information. | |
128 | ||
4e95b94e AC |
129 | Thu May 29 12:09:13 1997 Andrew Cagney <cagney@b2.cygnus.com> |
130 | ||
131 | * alu.h (IMEM_IMMED): New macro, fetch 32bit immediate operand N. | |
132 | ||
133 | * insns (subu i): Immediate is signed not unsigned. | |
134 | ||
2f2e6c5d AC |
135 | Tue May 27 13:22:13 1997 Andrew Cagney <cagney@b1.cygnus.com> |
136 | ||
137 | * sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer. | |
138 | (sim_write): Ditto for write. | |
139 | ||
24aa2b57 AC |
140 | Tue May 20 09:33:31 1997 Andrew Cagney <cagney@b1.cygnus.com> |
141 | ||
50a2a691 AC |
142 | * sim-calls.c (sim_load): Set STATE_LOADED_P. |
143 | ||
ff82f214 AC |
144 | * sim-main.h: Include <unistd.h>. |
145 | ||
24aa2b57 AC |
146 | * sim-calls.c (sim_set_callback): Delete. |
147 | (sim_open): Add/install callback argument. | |
ff82f214 AC |
148 | (sim_size): Delete. |
149 | ||
8c5b6ead MM |
150 | Mon May 19 18:59:33 1997 Mike Meissner <meissner@cygnus.com> |
151 | ||
152 | * configure.in: Check for getpid, kill functions. | |
153 | * config{.in,ure}: Regenerate. | |
154 | ||
155 | * insns (do_trap): Add support for kill, getpid system calls. | |
156 | ||
157 | * sim-main.h (errno.h): Include. | |
158 | (getpid,kill): Define as NOPs if the host doesn't have them. | |
159 | ||
fd76456b AC |
160 | Mon May 19 14:58:47 1997 Andrew Cagney <cagney@b1.cygnus.com> |
161 | ||
162 | * sim-calls.c (sim_open): Set the simulator base magic number. | |
2e61a3ad AC |
163 | (sim_load): Delete prototype of sim_load_file. |
164 | (sim_open): Define sd to be &simulation. | |
fd76456b | 165 | |
f03b093c AC |
166 | Fri May 16 14:35:30 1997 Andrew Cagney <cagney@b1.cygnus.com> |
167 | ||
168 | * insns (illegal, fp_unavailable): Halt instead of abort the | |
169 | simulator. | |
170 | ||
171 | * insns: Replace calls to engine_error with sim_engine_abort. | |
172 | Ditto for engine_halt V sim_engine_halt. | |
173 | ||
174 | Tue May 13 15:24:12 1997 Andrew Cagney <cagney@b2.cygnus.com> | |
175 | ||
176 | * interp.c (engine_run_until_stop): Delete. Moved to common. | |
177 | (engine_step): Ditto. | |
178 | (engine_step): Ditto. | |
179 | (engine_halt): Ditto. | |
180 | (engine_restart): Ditto. | |
181 | (engine_halt): Ditto. | |
182 | (engine_error): Ditto. | |
183 | ||
184 | * sim-calls.c (sim_stop): Delete. Moved to common. | |
185 | (sim_stop_reason): Ditto. | |
186 | (sim_resume): Ditto. | |
187 | ||
188 | * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run, | |
189 | sim-resume, sim-reason, sim-stop modules. | |
190 | ||
37a684b8 AC |
191 | Fri May 16 11:57:49 1997 Andrew Cagney <cagney@b1.cygnus.com> |
192 | ||
193 | * ic (compute): Drop check for REG == 0, now always forced to | |
194 | zero. | |
195 | ||
196 | * cpu.h (GPR_SET): New macro update the gpr. | |
197 | * insns (do_add): Use GPR_SET to update the GPR register. | |
198 | ||
199 | * sim-calls.c (sim_fetch_register): Pretend that r0 is zero. | |
200 | ||
201 | * Makefile.in (tmp-igen): Specify zero-r0 so that every | |
202 | instruction clears r0. | |
203 | ||
204 | * interp.c (engine_run_until_stop): Igen now generates code to | |
205 | clear r0. | |
206 | (engine_step): Ditto. | |
207 | ||
aa3a0447 AC |
208 | Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
209 | ||
07b4c0a6 AC |
210 | * insns (do_shift): When rot==0 and zero/sign merge treat it as |
211 | 32. | |
212 | (set_fp_reg): For interger conversion, use sim-fpu fpu2i | |
213 | functions. | |
214 | (do_fmpy): Perform iii and uuu using integer arithmetic. | |
215 | ||
216 | * Makefile.in (ENGINE_H): Assume everything depends on the fpu. | |
217 | ||
aa3a0447 AC |
218 | * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned |
219 | conversion. | |
220 | (do_fcmp): Update to use new fp compare functions. Make reg nr arg | |
221 | instead of reg. Stops fp overflow. | |
222 | (get_fp_reg): Assume val is valid when reg == 0. | |
223 | (set_fp_reg): Fix double conversion. | |
224 | ||
225 | * misc.c (tic80_trace_fpu1): New function, trace simple fp op. | |
226 | ||
227 | * insns (do_frnd): Add tracing. | |
228 | ||
229 | * cpu.h (TRACE_FPU1): Ditto. | |
2310e3c2 AC |
230 | |
231 | * insns (do_trap): Printf formatting. | |
232 | ||
93555c3b MM |
233 | Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com> |
234 | ||
235 | * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other | |
236 | insns. Use %g to print floating point instead of %f in case the | |
237 | numbers are real large. | |
238 | ||
1b6f4dde MM |
239 | Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com> |
240 | ||
241 | * insns (do_trap): For system calls that are defined, but not | |
242 | provided return EINVAL. Temporarily add traps 74-79 to just print | |
243 | the register state. | |
244 | ||
245 | * interp.c (engine_{run_until_stop,step}): Before executing | |
246 | instructions, make sure r0 == 0. | |
247 | ||
84902350 AC |
248 | Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
249 | ||
250 | * alu.h (IMEM): Take full cia not just IP as argument. | |
251 | ||
252 | * interp.c (engine_run_until_stop): Delete handling of annuled | |
253 | instructions. | |
254 | (engine_step): Ditto. | |
255 | ||
256 | * insn (do_branch): New function. | |
257 | (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle | |
258 | annuled branches. | |
259 | ||
d01082ad MM |
260 | Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com> |
261 | ||
262 | * insns (do_{ld,st}): Fix tracing for ld/st. | |
263 | ||
c445af5a AC |
264 | Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com> |
265 | ||
9af5dcea AC |
266 | * sim-calls.c (sim_stop_reason): Restore keep_running after a |
267 | CNTRL-C, don't re-clear it. | |
268 | ||
269 | * interp.c (engine_error): stop rather than signal with SIGABRT | |
270 | when an error. | |
271 | ||
c445af5a AC |
272 | * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in |
273 | rDest + 1. Also done by Michael Meissner <meissner@cygnus.com> | |
274 | (do_st): Converse for store. | |
275 | ||
276 | * misc.c (tic80_trace_fpu2i): Correct printf format for int type. | |
277 | ||
278 | Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
279 | ||
280 | * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running | |
281 | was cleared. | |
282 | ||
283 | * interp.c (engine_step): New function. Single step the simulator | |
284 | taking care of cntrl-c during a step. | |
285 | ||
286 | * sim-calls.c (sim_resume): Differentiate between stepping and | |
287 | running so that a cntrl-c during a step is reported. | |
288 | ||
289 | Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com> | |
290 | ||
291 | * sim-calls.c (sim_fetch_register): Use correct reg base. | |
292 | (sim_store_register): Ditto. | |
293 | ||
450be234 MM |
294 | Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com> |
295 | ||
296 | * cpu.h (tic80_trace_shift): Add declaration. | |
297 | (TRACE_SHIFT): New macro to trace shift instructions. | |
298 | ||
299 | * misc.c (tic80_trace_alu2): Align spacing. | |
300 | (tic80_trace_shift): New function to trace shifts. | |
301 | ||
302 | * insns (lmo): Add missing 0b prefix to bits. | |
303 | (do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT | |
304 | instead of TRACE_ALU2. | |
305 | (sl r): Use EndMask as is, instead of using Source+1 register. | |
306 | (subu): Operands are unsigned, not signed. | |
8ad60788 | 307 | (do_{ld,st}): Fix endian problems with ld.d/st.d. |
450be234 | 308 | |
20b2f9bc MM |
309 | Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com> |
310 | ||
311 | * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not | |
312 | signed. | |
313 | ||
aaa7b252 MM |
314 | Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com> |
315 | ||
316 | * insns (cmp_vals,do_cmp): Produce the correct bits as specified | |
317 | by the architecture. | |
89d1a478 | 318 | (xor): Fix xor immediate patterns to use the correct bits. |
aaa7b252 | 319 | |
9efd3f74 AC |
320 | Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
321 | ||
322 | * alu.h (long_immediate): Adjust the CIA delay-pointer as well as | |
323 | the NIA when a 64bit insn. | |
324 | ||
e42224cc MM |
325 | Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com> |
326 | ||
53dcd669 MM |
327 | * insns (jsr,bsr): For non-allulled calls, set r31 so that the |
328 | return address does not reexecute the instruction in the delay | |
329 | slot. | |
c3cad878 MM |
330 | (bbo,bbz): Complement bit number to reverse the one's complement |
331 | that the assembler is required to do. | |
53dcd669 | 332 | |
8c3b5af1 MM |
333 | * misc.c (tic80_trace_*): Change format slightly to accomidate |
334 | real large decimal values. | |
e42224cc | 335 | |
43c53e07 AC |
336 | Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com> |
337 | ||
338 | * sim-calls.c (sim_do_command): Implement. | |
339 | (sim_store_register): Fix typo T2H v H2T. | |
340 | ||
381f42ef AC |
341 | Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
342 | ||
343 | * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add. | |
344 | * insn: Clean up fpu tracing. | |
345 | ||
346 | * sim-calls.c (sim_create_inferior): Start out with interrupts | |
347 | enabled. | |
348 | ||
349 | * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument | |
350 | sink | |
351 | ||
352 | * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement. | |
353 | ||
354 | * insns (do_*): Remove MY_INDEX/indx argument from support functions, | |
355 | igen now handles this. | |
356 | ||
357 | * cpu.h (CR): New macro - access TIc80 control registers. | |
358 | ||
359 | * misc.c: New file. | |
360 | (tic80_cr2index): New function, map control register opcode index | |
361 | into the internal CR enum. | |
362 | ||
363 | * interp.c | |
364 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from | |
365 | here | |
366 | * misc.c: to here. | |
367 | ||
368 | * Makefile.in (SIM_OBJS): Add misc.o. | |
369 | ||
7b167b09 MM |
370 | Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com> |
371 | ||
372 | * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on | |
373 | big endian hosts. | |
374 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare | |
375 | new functions. | |
376 | (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to | |
377 | trace various instruction types. | |
378 | ||
379 | * insns: Modify all instructions to support semantic tracing. | |
380 | ||
381 | * interp.c (toplevel): Include itable.h. | |
382 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New | |
383 | functions to provide semantic level tracing information. | |
384 | ||
7a418800 AC |
385 | Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com> |
386 | ||
387 | * alu.h: Update usage of core object to reflect recent changes in | |
388 | ../common/sim-*core. | |
389 | * sim-calls.c (sim_open): Ditto. | |
390 | ||
3971886a AC |
391 | Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com> |
392 | ||
393 | * insn (cmnd): No-op cache flushes. | |
394 | ||
395 | * insns (do_trap): Allow writes to STDERR. | |
396 | ||
397 | * Makefile.in (SIM_OBJS): Link in sim-fpu.o. | |
398 | (SIM_EXTRA_LIBS): Link in the math library. | |
399 | ||
400 | * alu.h: Add support for floating point unit using sim-alu. | |
401 | ||
402 | * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement. | |
403 | ||
d9b75947 AC |
404 | Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
405 | ||
406 | * sim-calls.c: Include sim-utils.h and sim-options.h. | |
407 | ||
408 | * sim-main.h (sim_state): Drop sim_events and sim_core members, | |
409 | moved to simulator base type. | |
410 | ||
411 | * alu.h (IMEM, MEM, STORE): Update track changes in common | |
412 | directory. | |
413 | ||
414 | * insns: Drop cia argument from functions, igen now handles this. | |
415 | ||
416 | * interp.c (engine_init): Include string.h/strings.h to define | |
417 | memset et.al. | |
418 | ||
419 | * sim-main.h (sim_cia): Delcare, tracking common dir changes. | |
420 | ||
421 | * cpu.h (sim_cpu): Update instruction_address with sim_cia. | |
422 | ||
c1c77d40 AC |
423 | Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com> |
424 | ||
425 | * sim-main.h (signal.h): Include so that SIG* available to all | |
426 | callers of sig_halt. | |
427 | ||
428 | * insns (do_shift): New function, implement shift operations. | |
429 | (do_trap): Add handler for trap 73 - SIGTRAP. | |
430 | ||
d5e2c74e AC |
431 | Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com> |
432 | ||
433 | * alu.h (MEM, STORE): Force addresses to be correctly aligned. | |
434 | ||
435 | * insns (do_jsr): Fix. | |
436 | (do_st, do_ld): Handle 64bit transfers. | |
437 | (do_trap): Match libgloss. | |
438 | (rdcr): Implement nop - Dest == r0 - variant. | |
439 | ||
440 | * sim-calls.c (sim_create_inferior): Initialize SP. | |
441 | ||
442 | * Makefile.in (ENGINE_H): Everything now depends on sim-options.h. | |
443 | (support.o): Depends on ENGINE_H. | |
444 | ||
445 | * cpu.h: Four accumulators. | |
446 | ||
447 | * Makefile.in (tmp-igen): Include line number information in | |
448 | generated files. | |
449 | ||
450 | * insns (dld, dst): Fill in. | |
451 | ||
452 | Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
453 | ||
454 | * insns (vld): Fix instruction format wrong. | |
455 | ||
abe293a0 AC |
456 | Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com> |
457 | ||
458 | * dc: Add additional rules so that minor opcode files are | |
459 | detected. | |
460 | * insns: Enable more instructions. | |
461 | ||
462 | * sim-calls.c (sim_fetch_register,sim_store_register, sim_write): | |
463 | Implement. | |
464 | ||
dd442a44 DE |
465 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> |
466 | ||
467 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
468 | * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. | |
469 | * sim-calls.c (sim_open): Call sim_module_uninstall if argument | |
470 | parsing fails. Call sim_post_argv_init. | |
471 | (sim_close): Call sim_module_uninstall. | |
472 | ||
480e740c AC |
473 | Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
474 | ||
475 | * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable. | |
476 | * ic: Add fields for enabled instructions. | |
477 |