Commit | Line | Data |
---|---|---|
fafce69a AC |
1 | Wed Aug 27 13:41:24 1997 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * sim-calls.c (sim_open): Add call to sim_analyze_program, update | |
4 | call to sim_config. | |
7230ff0f AC |
5 | |
6 | * sim-calls.c (sim_kill): Delete. | |
fafce69a AC |
7 | (sim_create_inferior): Add ABFD argument. Initialize PC from ABFD |
8 | and not SD. | |
9 | (sim_load): Delete, use sim-hload.c. | |
10 | ||
11 | * Makefile.in (SIM_OBJS): Add sim-hload.o module. | |
7230ff0f | 12 | |
247fccde AC |
13 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
14 | ||
15 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
16 | * config.in: Ditto. | |
17 | ||
18 | Mon Aug 25 16:33:29 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
19 | ||
20 | * sim-calls.c (sim_open): Add ABFD argument. | |
21 | (sim_open): Move sim_config call to just after argument | |
22 | parsing. Check return status. | |
23 | ||
9e61ae7d MA |
24 | Fri Aug 8 21:52:27 1997 Mark Alexander <marka@cygnus.com> |
25 | ||
26 | * sim-calls.c (sim_store_register): Allow accumulators | |
27 | other than A0 to be modified. Correct error message. | |
28 | ||
128b5154 AC |
29 | Thu May 29 14:02:40 1997 Andrew Cagney <cagney@b1.cygnus.com> |
30 | ||
31 | * misc.c (tic80_trace_fpu3, tic80_trace_fpu2, tic80_trace_fpu1, | |
32 | tic80_trace_fpu2i): Pass in function prefix. | |
33 | (tic80_trace_ldst): Rewrite so it calls print_one_insn directly. | |
34 | ||
35 | * Makefile.in (SIM_OBJS): Include sim-watch.o module. | |
36 | ||
37 | * sim-main.h (WITH_WATCHPOINTS): Enable watchpoints. | |
38 | ||
39 | * ic (bitnum): Compute bitnum from BITNUM. | |
40 | * insn (bbo, bbz): Use. | |
41 | ||
42 | * insn: Convert long immediate instructions to igen long immediate | |
43 | form. | |
44 | * insn: Add disasembler information. | |
45 | ||
4e95b94e AC |
46 | Thu May 29 12:09:13 1997 Andrew Cagney <cagney@b2.cygnus.com> |
47 | ||
48 | * alu.h (IMEM_IMMED): New macro, fetch 32bit immediate operand N. | |
49 | ||
50 | * insns (subu i): Immediate is signed not unsigned. | |
51 | ||
2f2e6c5d AC |
52 | Tue May 27 13:22:13 1997 Andrew Cagney <cagney@b1.cygnus.com> |
53 | ||
54 | * sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer. | |
55 | (sim_write): Ditto for write. | |
56 | ||
24aa2b57 AC |
57 | Tue May 20 09:33:31 1997 Andrew Cagney <cagney@b1.cygnus.com> |
58 | ||
50a2a691 AC |
59 | * sim-calls.c (sim_load): Set STATE_LOADED_P. |
60 | ||
ff82f214 AC |
61 | * sim-main.h: Include <unistd.h>. |
62 | ||
24aa2b57 AC |
63 | * sim-calls.c (sim_set_callback): Delete. |
64 | (sim_open): Add/install callback argument. | |
ff82f214 AC |
65 | (sim_size): Delete. |
66 | ||
8c5b6ead MM |
67 | Mon May 19 18:59:33 1997 Mike Meissner <meissner@cygnus.com> |
68 | ||
69 | * configure.in: Check for getpid, kill functions. | |
70 | * config{.in,ure}: Regenerate. | |
71 | ||
72 | * insns (do_trap): Add support for kill, getpid system calls. | |
73 | ||
74 | * sim-main.h (errno.h): Include. | |
75 | (getpid,kill): Define as NOPs if the host doesn't have them. | |
76 | ||
fd76456b AC |
77 | Mon May 19 14:58:47 1997 Andrew Cagney <cagney@b1.cygnus.com> |
78 | ||
79 | * sim-calls.c (sim_open): Set the simulator base magic number. | |
2e61a3ad AC |
80 | (sim_load): Delete prototype of sim_load_file. |
81 | (sim_open): Define sd to be &simulation. | |
fd76456b | 82 | |
f03b093c AC |
83 | Fri May 16 14:35:30 1997 Andrew Cagney <cagney@b1.cygnus.com> |
84 | ||
85 | * insns (illegal, fp_unavailable): Halt instead of abort the | |
86 | simulator. | |
87 | ||
88 | * insns: Replace calls to engine_error with sim_engine_abort. | |
89 | Ditto for engine_halt V sim_engine_halt. | |
90 | ||
91 | Tue May 13 15:24:12 1997 Andrew Cagney <cagney@b2.cygnus.com> | |
92 | ||
93 | * interp.c (engine_run_until_stop): Delete. Moved to common. | |
94 | (engine_step): Ditto. | |
95 | (engine_step): Ditto. | |
96 | (engine_halt): Ditto. | |
97 | (engine_restart): Ditto. | |
98 | (engine_halt): Ditto. | |
99 | (engine_error): Ditto. | |
100 | ||
101 | * sim-calls.c (sim_stop): Delete. Moved to common. | |
102 | (sim_stop_reason): Ditto. | |
103 | (sim_resume): Ditto. | |
104 | ||
105 | * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run, | |
106 | sim-resume, sim-reason, sim-stop modules. | |
107 | ||
37a684b8 AC |
108 | Fri May 16 11:57:49 1997 Andrew Cagney <cagney@b1.cygnus.com> |
109 | ||
110 | * ic (compute): Drop check for REG == 0, now always forced to | |
111 | zero. | |
112 | ||
113 | * cpu.h (GPR_SET): New macro update the gpr. | |
114 | * insns (do_add): Use GPR_SET to update the GPR register. | |
115 | ||
116 | * sim-calls.c (sim_fetch_register): Pretend that r0 is zero. | |
117 | ||
118 | * Makefile.in (tmp-igen): Specify zero-r0 so that every | |
119 | instruction clears r0. | |
120 | ||
121 | * interp.c (engine_run_until_stop): Igen now generates code to | |
122 | clear r0. | |
123 | (engine_step): Ditto. | |
124 | ||
aa3a0447 AC |
125 | Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
126 | ||
07b4c0a6 AC |
127 | * insns (do_shift): When rot==0 and zero/sign merge treat it as |
128 | 32. | |
129 | (set_fp_reg): For interger conversion, use sim-fpu fpu2i | |
130 | functions. | |
131 | (do_fmpy): Perform iii and uuu using integer arithmetic. | |
132 | ||
133 | * Makefile.in (ENGINE_H): Assume everything depends on the fpu. | |
134 | ||
aa3a0447 AC |
135 | * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned |
136 | conversion. | |
137 | (do_fcmp): Update to use new fp compare functions. Make reg nr arg | |
138 | instead of reg. Stops fp overflow. | |
139 | (get_fp_reg): Assume val is valid when reg == 0. | |
140 | (set_fp_reg): Fix double conversion. | |
141 | ||
142 | * misc.c (tic80_trace_fpu1): New function, trace simple fp op. | |
143 | ||
144 | * insns (do_frnd): Add tracing. | |
145 | ||
146 | * cpu.h (TRACE_FPU1): Ditto. | |
2310e3c2 AC |
147 | |
148 | * insns (do_trap): Printf formatting. | |
149 | ||
93555c3b MM |
150 | Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com> |
151 | ||
152 | * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other | |
153 | insns. Use %g to print floating point instead of %f in case the | |
154 | numbers are real large. | |
155 | ||
1b6f4dde MM |
156 | Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com> |
157 | ||
158 | * insns (do_trap): For system calls that are defined, but not | |
159 | provided return EINVAL. Temporarily add traps 74-79 to just print | |
160 | the register state. | |
161 | ||
162 | * interp.c (engine_{run_until_stop,step}): Before executing | |
163 | instructions, make sure r0 == 0. | |
164 | ||
84902350 AC |
165 | Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
166 | ||
167 | * alu.h (IMEM): Take full cia not just IP as argument. | |
168 | ||
169 | * interp.c (engine_run_until_stop): Delete handling of annuled | |
170 | instructions. | |
171 | (engine_step): Ditto. | |
172 | ||
173 | * insn (do_branch): New function. | |
174 | (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle | |
175 | annuled branches. | |
176 | ||
d01082ad MM |
177 | Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com> |
178 | ||
179 | * insns (do_{ld,st}): Fix tracing for ld/st. | |
180 | ||
c445af5a AC |
181 | Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com> |
182 | ||
9af5dcea AC |
183 | * sim-calls.c (sim_stop_reason): Restore keep_running after a |
184 | CNTRL-C, don't re-clear it. | |
185 | ||
186 | * interp.c (engine_error): stop rather than signal with SIGABRT | |
187 | when an error. | |
188 | ||
c445af5a AC |
189 | * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in |
190 | rDest + 1. Also done by Michael Meissner <meissner@cygnus.com> | |
191 | (do_st): Converse for store. | |
192 | ||
193 | * misc.c (tic80_trace_fpu2i): Correct printf format for int type. | |
194 | ||
195 | Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
196 | ||
197 | * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running | |
198 | was cleared. | |
199 | ||
200 | * interp.c (engine_step): New function. Single step the simulator | |
201 | taking care of cntrl-c during a step. | |
202 | ||
203 | * sim-calls.c (sim_resume): Differentiate between stepping and | |
204 | running so that a cntrl-c during a step is reported. | |
205 | ||
206 | Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com> | |
207 | ||
208 | * sim-calls.c (sim_fetch_register): Use correct reg base. | |
209 | (sim_store_register): Ditto. | |
210 | ||
450be234 MM |
211 | Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com> |
212 | ||
213 | * cpu.h (tic80_trace_shift): Add declaration. | |
214 | (TRACE_SHIFT): New macro to trace shift instructions. | |
215 | ||
216 | * misc.c (tic80_trace_alu2): Align spacing. | |
217 | (tic80_trace_shift): New function to trace shifts. | |
218 | ||
219 | * insns (lmo): Add missing 0b prefix to bits. | |
220 | (do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT | |
221 | instead of TRACE_ALU2. | |
222 | (sl r): Use EndMask as is, instead of using Source+1 register. | |
223 | (subu): Operands are unsigned, not signed. | |
8ad60788 | 224 | (do_{ld,st}): Fix endian problems with ld.d/st.d. |
450be234 | 225 | |
20b2f9bc MM |
226 | Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com> |
227 | ||
228 | * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not | |
229 | signed. | |
230 | ||
aaa7b252 MM |
231 | Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com> |
232 | ||
233 | * insns (cmp_vals,do_cmp): Produce the correct bits as specified | |
234 | by the architecture. | |
89d1a478 | 235 | (xor): Fix xor immediate patterns to use the correct bits. |
aaa7b252 | 236 | |
9efd3f74 AC |
237 | Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
238 | ||
239 | * alu.h (long_immediate): Adjust the CIA delay-pointer as well as | |
240 | the NIA when a 64bit insn. | |
241 | ||
e42224cc MM |
242 | Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com> |
243 | ||
53dcd669 MM |
244 | * insns (jsr,bsr): For non-allulled calls, set r31 so that the |
245 | return address does not reexecute the instruction in the delay | |
246 | slot. | |
c3cad878 MM |
247 | (bbo,bbz): Complement bit number to reverse the one's complement |
248 | that the assembler is required to do. | |
53dcd669 | 249 | |
8c3b5af1 MM |
250 | * misc.c (tic80_trace_*): Change format slightly to accomidate |
251 | real large decimal values. | |
e42224cc | 252 | |
43c53e07 AC |
253 | Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com> |
254 | ||
255 | * sim-calls.c (sim_do_command): Implement. | |
256 | (sim_store_register): Fix typo T2H v H2T. | |
257 | ||
381f42ef AC |
258 | Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
259 | ||
260 | * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add. | |
261 | * insn: Clean up fpu tracing. | |
262 | ||
263 | * sim-calls.c (sim_create_inferior): Start out with interrupts | |
264 | enabled. | |
265 | ||
266 | * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument | |
267 | sink | |
268 | ||
269 | * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement. | |
270 | ||
271 | * insns (do_*): Remove MY_INDEX/indx argument from support functions, | |
272 | igen now handles this. | |
273 | ||
274 | * cpu.h (CR): New macro - access TIc80 control registers. | |
275 | ||
276 | * misc.c: New file. | |
277 | (tic80_cr2index): New function, map control register opcode index | |
278 | into the internal CR enum. | |
279 | ||
280 | * interp.c | |
281 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from | |
282 | here | |
283 | * misc.c: to here. | |
284 | ||
285 | * Makefile.in (SIM_OBJS): Add misc.o. | |
286 | ||
7b167b09 MM |
287 | Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com> |
288 | ||
289 | * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on | |
290 | big endian hosts. | |
291 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare | |
292 | new functions. | |
293 | (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to | |
294 | trace various instruction types. | |
295 | ||
296 | * insns: Modify all instructions to support semantic tracing. | |
297 | ||
298 | * interp.c (toplevel): Include itable.h. | |
299 | (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New | |
300 | functions to provide semantic level tracing information. | |
301 | ||
7a418800 AC |
302 | Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com> |
303 | ||
304 | * alu.h: Update usage of core object to reflect recent changes in | |
305 | ../common/sim-*core. | |
306 | * sim-calls.c (sim_open): Ditto. | |
307 | ||
3971886a AC |
308 | Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com> |
309 | ||
310 | * insn (cmnd): No-op cache flushes. | |
311 | ||
312 | * insns (do_trap): Allow writes to STDERR. | |
313 | ||
314 | * Makefile.in (SIM_OBJS): Link in sim-fpu.o. | |
315 | (SIM_EXTRA_LIBS): Link in the math library. | |
316 | ||
317 | * alu.h: Add support for floating point unit using sim-alu. | |
318 | ||
319 | * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement. | |
320 | ||
d9b75947 AC |
321 | Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
322 | ||
323 | * sim-calls.c: Include sim-utils.h and sim-options.h. | |
324 | ||
325 | * sim-main.h (sim_state): Drop sim_events and sim_core members, | |
326 | moved to simulator base type. | |
327 | ||
328 | * alu.h (IMEM, MEM, STORE): Update track changes in common | |
329 | directory. | |
330 | ||
331 | * insns: Drop cia argument from functions, igen now handles this. | |
332 | ||
333 | * interp.c (engine_init): Include string.h/strings.h to define | |
334 | memset et.al. | |
335 | ||
336 | * sim-main.h (sim_cia): Delcare, tracking common dir changes. | |
337 | ||
338 | * cpu.h (sim_cpu): Update instruction_address with sim_cia. | |
339 | ||
c1c77d40 AC |
340 | Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com> |
341 | ||
342 | * sim-main.h (signal.h): Include so that SIG* available to all | |
343 | callers of sig_halt. | |
344 | ||
345 | * insns (do_shift): New function, implement shift operations. | |
346 | (do_trap): Add handler for trap 73 - SIGTRAP. | |
347 | ||
d5e2c74e AC |
348 | Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com> |
349 | ||
350 | * alu.h (MEM, STORE): Force addresses to be correctly aligned. | |
351 | ||
352 | * insns (do_jsr): Fix. | |
353 | (do_st, do_ld): Handle 64bit transfers. | |
354 | (do_trap): Match libgloss. | |
355 | (rdcr): Implement nop - Dest == r0 - variant. | |
356 | ||
357 | * sim-calls.c (sim_create_inferior): Initialize SP. | |
358 | ||
359 | * Makefile.in (ENGINE_H): Everything now depends on sim-options.h. | |
360 | (support.o): Depends on ENGINE_H. | |
361 | ||
362 | * cpu.h: Four accumulators. | |
363 | ||
364 | * Makefile.in (tmp-igen): Include line number information in | |
365 | generated files. | |
366 | ||
367 | * insns (dld, dst): Fill in. | |
368 | ||
369 | Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
370 | ||
371 | * insns (vld): Fix instruction format wrong. | |
372 | ||
abe293a0 AC |
373 | Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com> |
374 | ||
375 | * dc: Add additional rules so that minor opcode files are | |
376 | detected. | |
377 | * insns: Enable more instructions. | |
378 | ||
379 | * sim-calls.c (sim_fetch_register,sim_store_register, sim_write): | |
380 | Implement. | |
381 | ||
dd442a44 DE |
382 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> |
383 | ||
384 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
385 | * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. | |
386 | * sim-calls.c (sim_open): Call sim_module_uninstall if argument | |
387 | parsing fails. Call sim_post_argv_init. | |
388 | (sim_close): Call sim_module_uninstall. | |
389 | ||
480e740c AC |
390 | Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
391 | ||
392 | * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable. | |
393 | * ic: Add fields for enabled instructions. | |
394 |