* configure.in: Don't set PICFLAG on ix86-cygwin32.
[deliverable/binutils-gdb.git] / sim / tic80 / ic
CommitLineData
15c16493 1compute:Dest:Dest:
480e740c 2compute:Dest:rDest:signed_word *:(&(CPU)->reg[Dest])
15c16493
AC
3#
4compute:Source1:Source1:
37a684b8
AC
5compute:Source1:vSource1:signed_word:(GPR (Source1) + 0)
6#compute:Source1:vSource1:signed_word:(Source1 == 0 ? 0 : (CPU)->reg[Source1])
15c16493
AC
7#
8compute:Source2:Source2:
37a684b8
AC
9compute:Source2:vSource2:signed_word:(GPR (Source2) + 0)
10#compute:Source2:vSource2:signed_word:(Source2 == 0 ? 0 : (CPU)->reg[Source2])
15c16493
AC
11#
12compute:Source:Source:
37a684b8
AC
13compute:Source:vSource:signed_word:(GPR (Source) + 0)
14#compute:Source:vSource:signed_word:(Source == 0 ? 0 : (CPU)->reg[Source])
15c16493
AC
15#
16compute:IndOff:IndOff:
37a684b8
AC
17compute:IndOff:rIndOff:signed_word:(GPR (IndOff) + 0)
18#compute:IndOff:rIndOff:signed_word:(IndOff == 0 ? 0 : (CPU)->reg[IndOff])
480e740c
AC
19#
20compute:Base:Base:
37a684b8
AC
21compute:Base:vBase:signed_word:(GPR (Base) + 0)
22compute:Base:rBase:signed_word:(&GPR (Base))
23#compute:Base:vBase:signed_word:(Base == 0 ? 0 : (CPU)->reg[Base])
480e740c
AC
24#
25compute:Link:Link:
26compute:Link:rLink:signed_word:(&(CPU)->reg[Link])
15c16493
AC
27#
28# Trap Number
29compute:UTN:UTN:
30compute:INDTR:INDTR:
480e740c 31compute:INDTR:UTN:unsigned_word:(INDTR == 0 ? 0 : (CPU)->reg[INDTR])
15c16493
AC
32#
33compute:A:A:
34#
480e740c
AC
35compute:SignedImmediate:SignedImmediate:
36compute:SignedImmediate:vSource1:signed_word:SEXT (SignedImmediate, 14)
37#
38compute:UnsignedImmediate:UnsignedImmediate:
39compute:UnsignedImmediate:vSource1:signed_word:UnsignedImmediate
40#
15c16493 41compute:BITNUM:BITNUM:
480e740c 42compute:Code:Code:
128b5154
AC
43compute:BITNUM:bitnum:int:(~BITNUM) & 0x1f
44
480e740c
AC
45#
46compute:SignedOffset:SignedOffset:
47compute:SignedOffset:vSignedOffset:signed_word:SEXT (SignedOffset, 14)
d5e2c74e
AC
48#
49compute:UCRN:UCRN:
50compute:INDCR:INDCR:
37a684b8
AC
51compute:INDCR:UCRN:unsigned32:(GPR (INDCR) + 0)
52#compute:INDCR:UCRN:unsigned32:(INDCR == 0 ? 0 : (CPU)->reg[INDCR])
This page took 0.052622 seconds and 4 git commands to generate.