Commit | Line | Data |
---|---|---|
d4f3574e SS |
1 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
4 | ||
cd0fc7c3 SS |
5 | 1999-05-08 Felix Lee <flee@cygnus.com> |
6 | ||
7 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
8 | ||
c906108c SS |
9 | Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
10 | ||
11 | * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850. | |
12 | ||
13 | Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
14 | ||
15 | * Makefile.in (simops.o): Depends on targ-vals.h | |
16 | * simops.c: Include targ-vals.h instead of | |
17 | libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*. | |
18 | (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0): | |
19 | Replace signed long int with signed32. | |
20 | ||
21 | Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com> | |
22 | ||
23 | * interp.c: #include "itable.h". | |
24 | (get_insn_name): New function. | |
25 | (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. | |
26 | * sim-main.h (MAX_INSNS,INSN_NAME): Delete. | |
27 | ||
28 | Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
29 | ||
30 | * sim-main.h (INSN_NAME): New arg `cpu'. | |
31 | ||
32 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
33 | ||
34 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
35 | ||
36 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
37 | ||
38 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
39 | * config.in: Ditto. | |
40 | ||
41 | Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com> | |
42 | ||
43 | * acconfig.h: New file. | |
44 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
45 | ||
46 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
47 | ||
48 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
49 | * config.in: Ditto. | |
50 | ||
51 | Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com> | |
52 | ||
53 | * configure.in: Don't call sinclude. | |
54 | ||
55 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
56 | ||
57 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
58 | * sim-main.h (SIM_MAIN_H): Wrap header. | |
59 | ||
60 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
61 | ||
62 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
63 | ||
64 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
65 | ||
66 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
67 | ||
68 | Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
69 | ||
70 | * interp.c (sim_stop): Delete, second attempt. | |
71 | ||
72 | Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
73 | ||
74 | * interp.c (sim_info): Delete. | |
75 | ||
76 | Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
77 | ||
78 | * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc]. | |
79 | ||
80 | * simops.c (trace_result): Call trace_generic instead of | |
81 | trace_one_insn. | |
82 | (trace_module): Change variable type to integer. | |
83 | (trace_input): Initialize trace_module with TRACE_ALU_IDX. | |
84 | ||
85 | * sim-main.h (trace_module): Change variable decl to integer type. | |
86 | (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update. | |
87 | ||
88 | Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
89 | ||
90 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
91 | length parameter. Return -1. | |
92 | ||
93 | Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
94 | ||
95 | * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and | |
96 | IMEM_IMMED. To match recent igen change. | |
97 | ||
98 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
99 | ||
100 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
101 | ||
102 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
103 | ||
104 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
105 | ||
106 | Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
107 | ||
108 | * sim-main.h (CPU_CIA): Delete, replaced by. | |
109 | (CIA_SET, CIA_SET): Define. | |
110 | ||
111 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
112 | ||
113 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
114 | ||
115 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
116 | ||
117 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
118 | * config.in: Ditto. | |
119 | ||
120 | Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com> | |
121 | ||
122 | * v850.igen: Revert break value back to its old value. | |
123 | ||
124 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
125 | ||
126 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
127 | ||
128 | Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com> | |
129 | ||
130 | * v850.igen: Make break have a zero first field, since otherwise | |
131 | it clashes with the DIVH instruction. | |
132 | ||
133 | Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
134 | ||
135 | * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give | |
136 | sim_stopped instead of sim_signalled. | |
137 | ||
138 | * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to | |
139 | SIM_SIGTRAP. | |
140 | (illegal): Rename SIGILL to SIM_SIGILL. | |
141 | ||
142 | * sim-main.h, simops.c, interp.c: Do not include signal.h. | |
143 | ||
144 | * sim-main.h: Include sim-signal.h instead of signal.h. | |
145 | (SIGTRAP, SIGQUIT): Delete definition. | |
146 | (SIG_V850_EXIT): Delete definition. | |
147 | ||
148 | Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> | |
149 | ||
150 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | |
151 | ||
152 | Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
153 | ||
154 | * interp.c (sim_open): Check state magic number. | |
155 | (sim-assert.h): Include. | |
156 | ||
157 | Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
158 | ||
159 | * v850.igen: Add model filter field to records. | |
160 | ||
161 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
162 | ||
163 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
164 | ||
165 | Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com> | |
166 | ||
167 | * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and | |
168 | SIM_ENGINE_RESTART_HOOK. | |
169 | ||
170 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
171 | ||
172 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
173 | ||
174 | Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
175 | ||
176 | * sim-main.h (WITH_TARGET_WORD_MSB): Delete. | |
177 | ||
178 | * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit | |
179 | architecture with MSB == 31. | |
180 | ||
181 | Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
182 | ||
183 | * v850.igen: Make divh insn with RRRRR==0 breakpoint. | |
184 | ||
185 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
186 | ||
187 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
188 | ||
189 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
190 | ||
191 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
192 | SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. | |
193 | (SIM_EXTRA_CFLAGS): Update. | |
194 | ||
195 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
196 | ||
197 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
198 | * configure.in: Really specify NONSTRICT_ALIGNMENT as the default. | |
199 | ||
200 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
201 | ||
202 | * configure.in: Specify NONSTRICT_ALIGNMENT as the default. | |
203 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
204 | ||
205 | Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
206 | ||
207 | * v850.igen (disp16): Use EXTEND16 to sign extend disp. | |
208 | (disp22): Only shift left by 1, not 2. | |
209 | ("jmp"): Ensure PC is 2 byte aligned. | |
210 | ||
211 | * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to | |
212 | v850.igen. Fix tracing. | |
213 | ||
214 | * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h", | |
215 | "sld.w" insns to v850.igen. Fix tracing. | |
216 | (OP_70): Ditto for "sld.hu". | |
217 | ||
218 | * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al. | |
219 | ||
220 | * simops.c (condition_met): Make global. | |
221 | ||
222 | * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD, | |
223 | TRACE_ST): Define. | |
224 | (TRACE_LD_NAME): Define. | |
225 | ||
226 | * simops.c: Move "cmov", "cmov imm" to v850.igen, fix. | |
227 | ||
228 | Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
229 | ||
230 | * simops.c: Move "mov", "reti", to v850.igen, fix tracing. | |
231 | ||
232 | * interp.c (hash): Delete. | |
233 | ||
234 | * v850.igen (nop): Really do nothing. | |
235 | ||
236 | * interp.c (do_interrupt): Mask interrupts after PSW is saved, not | |
237 | before. | |
238 | * v850.igen (reti): Return to current PC not previous. | |
239 | ||
240 | Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
241 | ||
242 | * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing. | |
243 | (trace_module): Global, save component/module name across insn. | |
244 | ||
245 | * simops.c: Move "bsh" to v850.igen, fix. | |
246 | ||
247 | * v850.igen (callt): Load correct number of bytes. Fix tracing. | |
248 | (stsr, ldsr): Correct src, dest fields. Fix tracing. | |
249 | (ctret): Force alignment. Fix tracing. | |
250 | ||
251 | Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
252 | ||
253 | * simops.c (trace_output): Add result argument. | |
254 | (trace_result): New function. Simpler version of trace_output, | |
255 | assumes trace needed. | |
256 | (trace_output): Call trace_result. | |
257 | (trace_output): For IMM_REG_REG, trace correct register. | |
258 | (trace_input): Add case for 16bit immediates. | |
259 | (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use. | |
260 | ||
261 | * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define. | |
262 | (trace_values, trace_name, trace_pc, trace_num_values): Make | |
263 | global. | |
264 | (GR, SR): Define. | |
265 | ||
266 | v850.insn (movea, stsr): Use. | |
267 | (sxb, sxh, zxb, zxh): Ditto. | |
268 | ||
269 | Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
270 | ||
271 | * simops.c: Move "movea" from here. | |
272 | * v850.igen: To here. | |
273 | ||
274 | * v850.igen (simm16): Define, sign extend imm16. | |
275 | (uimm16): Define, no sign extension. | |
276 | (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use. | |
277 | ||
278 | * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose", | |
279 | "mov32" from here. | |
280 | * v850.igen: To here. | |
281 | (switch): Fix off by two error in NIA calc. | |
282 | ||
283 | Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
284 | ||
285 | * simops.c (trace_pc, trace_name, trace_values, trace_num_values): | |
286 | New static globals. | |
287 | (trace_input): Just save pc, name and values for trace_output. | |
288 | (trace_output): Write trace values to a buffer. Use | |
289 | trace_one_insn to print trace info and buffer. | |
290 | (SIZE_OPERANDS, SIZE_LOCATION): Delete. | |
291 | ||
292 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
293 | ||
294 | * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits | |
295 | can be masked out. | |
296 | ||
297 | * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr" | |
298 | instructions from here. | |
299 | * v850.igen (ldsr, stsr): To here. Mask out reserved bits when | |
300 | setting PSW. | |
301 | ||
302 | * interp.c (sim_open): Set psw_mask if machine known. | |
303 | ||
304 | Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
305 | ||
306 | * v850-dc: Add rule to diferentiate between breakpoint and divh. | |
307 | * v850.igen (break): New instruction, breakpoint simulator. | |
308 | * v850.igen (breakpoint): Enable. Change to a 32bit instruction. | |
309 | ||
310 | Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com> | |
311 | ||
312 | * simops.c (Multiply64): Don't store into register zero. | |
313 | ||
314 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
315 | ||
316 | * Makefile.in (semantics.o): Add dependency. | |
317 | ||
318 | * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save, | |
319 | do not adjust CIA/NIA. | |
320 | ||
321 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
322 | ||
323 | * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US]. | |
324 | ||
325 | * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn", | |
326 | "divun", "pushml" code from here to v850.igen. | |
327 | (divun): Make global. | |
328 | (type3_regs): Make global | |
329 | ||
330 | * v850.igen: Move simops.c code to here. | |
331 | ||
332 | * interp.c (sim_create_inferior): For v850eq set US bit by | |
333 | default. | |
334 | ||
335 | * interp.c (sim_open): Don't set arch, now set by | |
336 | sim_analyze_program. | |
337 | ||
338 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
339 | ||
340 | Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
341 | ||
342 | * simops.c (op_types): Move from here. | |
343 | sim-main.h: To here. | |
344 | ||
345 | * sim-main.h (trace_input, trace_output), simops.c: Make global. | |
346 | ||
347 | * simops.c (OP_60): Move "jmp" code from here. | |
348 | * v850.igen (jmp): To here. | |
349 | ||
350 | * simops.c (OP_60): Move "sld.bu" code from here. | |
351 | * v850.igen (sld.bu): To here. | |
352 | ||
353 | Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
354 | ||
355 | * v850.igen (prepare, ...): Add to v850eq architecture. | |
356 | ||
357 | * interp.c (sim_open): Default to v850eq. | |
358 | ||
359 | * interp.c (sim_open): Default to v850e. | |
360 | * sim-main.h (signal.h): Include. | |
361 | ||
362 | * v850.igen (illegal): Report/halt illegal instructions. | |
363 | ||
364 | * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS. | |
365 | ||
366 | * configure.in: Add reserved bits option. | |
367 | * configure: Regenerate. | |
368 | ||
369 | Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
370 | ||
371 | * interp.c (sim_open): Use sim_do_commandf instead of asprintf. | |
372 | ||
373 | * sim-main.h (INSN_NAME): | |
374 | ||
375 | * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS. | |
376 | (SIM_EXTRA_DEPS): Add itable.h | |
377 | (tmp-gencode): Does not depend on simops.h | |
378 | ||
379 | * sim-main.h (itable.h): Include. | |
380 | (MAX_INSNS, INSN_NAME): Define. | |
381 | ||
382 | * interp.c: Compute inttype from the interrupt_names index that | |
383 | was passed in. | |
384 | ||
385 | Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
386 | ||
387 | * simops.c (trace_input): Use trace_printf instead of | |
388 | sim_io_printf. | |
389 | (trace_output): Ditto. | |
390 | (trace_input): Only trace when TRACE_ALU_P. Delete code | |
391 | disasembling instruction. | |
392 | (trace_output): Only trace when TRACE_ALU_P. | |
393 | ||
394 | Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
395 | ||
396 | * simops.c (trace_input, trace_output): Use sim_io_printf. | |
397 | (OP_620): Pass correct argument to trace. | |
398 | (OP_E607E0): Ditto. | |
399 | (trace_input): Obtain prog_bfd, text_start et.al from simulator | |
400 | struct. | |
401 | ||
402 | Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
403 | ||
404 | * v850.igen: New file. | |
405 | * v850-dc: New file. | |
406 | ||
407 | Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
408 | ||
409 | ||
410 | * sim-main.h (SEXT16): Delete, use EXTEND16. | |
411 | (SEXT8): Delete, use EXTEND8. | |
412 | (SEXT32): Delete, used? | |
413 | (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL. | |
414 | (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian. | |
415 | ||
416 | * simops.c: Use EXTEND15 from sim-bits instead of SEXT16. | |
417 | ||
418 | * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete, | |
419 | replace with TRACE_INSN_P and TRACE_ALU_P. | |
420 | ||
421 | * simops.c (trace_input, trace_output): Update. | |
422 | ||
423 | * interp.c (sim_engine_run): Delete. | |
424 | (lookup_hash): Delete. | |
425 | (sim_open): Do not fill hash table. | |
426 | (sim_trace): Delete. | |
427 | ||
428 | Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
429 | ||
430 | * simops.c (OP_FFFF): Use sim_engine_halt. | |
431 | (OP_12007E0): Ditto. | |
432 | (OP_10007E0): Ditto. | |
433 | ||
434 | * sim-main.h (struct sim_cpu): Delete member exception. Using | |
435 | sim-engine et.al. | |
436 | ||
437 | * interp.c (sim_info): Do not do anything in sim-info. | |
438 | (sim_stop): Delete, replace with sim-stop. | |
439 | (sim_stop_reason): Delete, replace with sim-reason. | |
440 | ||
441 | * sim-main.h (WITH_WATCHPOINTS): Define. | |
442 | (WITH_MODULO_MEMORY): Define | |
443 | ||
444 | * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop, | |
445 | sim-reason. | |
446 | ||
447 | * interp.c (enum interrupt_cond_type): Delete. | |
448 | (struct interrupt_generator): Delete. | |
449 | (enum interrupt_type): Drop int_none. | |
450 | (sim_open): Initialize WATCHPOINT module. | |
451 | (sim_resume, sim_run): Rename sim_resume to sim_run. | |
452 | (sim_engine_run): Replace interrupt code with call to sim-events. | |
453 | (sim_set_interrupt): Delete. | |
454 | (sim_parse_number): Delete. | |
455 | ||
456 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
457 | ||
458 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
459 | ||
460 | Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
461 | ||
462 | * simops.c (fetch_argv): New function, fetch a arg vector from | |
463 | simulator memory. | |
464 | ||
465 | * configure.in: Check for fork, execve, execv. | |
466 | * configure: Regenerate. | |
467 | ||
468 | * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and | |
469 | T2H_4 for byte swapping. | |
470 | ||
471 | * sim-main.h, interp.c (get_word, get_half, get_byte, put_word, | |
472 | put_half, put_byte): Delete. | |
473 | ||
474 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
475 | ||
476 | * sim-main.h (load_mem, store_mem): Redefine as macros. | |
477 | (IMEM, IMEM_IMMED): New macros - fetch instructions. | |
478 | ||
479 | * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open | |
480 | transfer data via a buffer. | |
481 | (fetch_str): New function, fetch string from memory. | |
482 | ||
483 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
484 | ||
485 | * interp.c (sim_open): Establish memory maps using sim-memopt.c | |
486 | via sim_do_command. | |
487 | (sim_do_command): Print error if memory-map command is used. Call | |
488 | sim_args_command. | |
489 | (map): Delete, replaced by sim-core. | |
490 | (sim_memory_init): Delete, replaced by sim-core. | |
491 | (sim_set_memory_map): Delete, replaced by sim-memopt. | |
492 | (load_mem): Delete, replaced by sim-core. | |
493 | (store_mem): Delete, replaced by sim-core. | |
494 | (sim_write): Delete, replaced by sim-hrw. | |
495 | (sim_read): Delete, replaced by sim-hrw. | |
496 | ||
497 | * sim-main.h (struct sim_state): Remove memory members, using | |
498 | sim-core.c | |
499 | ||
500 | Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
501 | ||
502 | * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr. | |
503 | * interp.c (map): Do not add to a void pointer. | |
504 | ||
505 | * Makefile.in (INCLUDE): Add sim-main.h | |
506 | ||
507 | * configure.in: Check for time.h | |
508 | * configure: Re-generate. | |
509 | ||
510 | * interp.c (struct interrupt_generator): Make time unsigned long, | |
511 | address SIM_ADDR. | |
512 | (sim_resume): Make oldpc SIM_ADDR. | |
513 | (struct hash_entry): Make mask/opcode unsigned. | |
514 | ||
515 | * v850_sim.h (struct simops ): Make opcode and mask unsigned. | |
516 | ||
517 | * simops.c (utime.h): Include if available. | |
518 | (OP_10007E0): Check for UTIME function. | |
519 | (divun): Put parentheses around shift argument. | |
520 | (OP_640): Put parentheses around shift argument, was wrong. | |
521 | (OP_107F0): Return something. | |
522 | ||
523 | * interp.c (sim_parse_number): Use strtoul not strtol. | |
524 | (sim_resume): Use sim_elapsed_time_get to keep track of the time. | |
525 | ||
526 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
527 | (SIM_AC_OPTION_ENDIAN): Set to hardwired big. | |
528 | (SIM_AC_OPTION_HOST_ENDIAN): Add. | |
529 | (AC_CHECK_FUNCS): Add utime. | |
530 | (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h | |
531 | configure: Regenerate. | |
532 | ||
533 | ||
534 | * Makefile.in (SIM_RUN_OBJS): Use nrun.o. | |
535 | (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o, | |
536 | sim-config.o, sim-module.o, sim-events.o, sim-core.o, | |
537 | sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o | |
538 | (SIM_ENDIAN, SIM_WARNGINS): Define. | |
539 | ||
540 | * simops.c (OP_10007E0): Use sim_io_* for transfers. | |
541 | ||
542 | * interp.c (sim_resume): Pass sd around. | |
543 | ||
544 | * simops.c (sim-main.h): Include. | |
545 | ||
546 | * gencode.c (write_template): Generate #include sim-main.h. | |
547 | (write_opcodes): Ditto. | |
548 | ||
549 | * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete. | |
550 | (v850_callback): Ditto. | |
551 | (sim_kind, myname): Ditto. | |
552 | (lookup_hash): Pass SD. Use sim_io_error. | |
553 | (sim_set_memory_map): Pass in SD, use. | |
554 | (init_system): Pass in SD, use. | |
555 | (sim_open): Update. | |
556 | (sim_set_profile): Delete. | |
557 | (sim_set_profile_size): Delete. | |
558 | (do_interrupt): Pass in SD, use. | |
559 | (sim_info): Use sim_io_printf. | |
560 | (sim_create_inferior): Reset registers. Set PC from prog_bfd | |
561 | argument. | |
562 | (sim_load): Delete, use common/sim-hload.c | |
563 | (sim_size): Rename to sim_memory_init. | |
564 | (sim_write): Remove call to init_system. | |
565 | (init_system): Delete. | |
566 | (sim_set_callbacks): Delete. | |
567 | (sim_set_interrupt): Pass in SD, use. | |
568 | (start_time): Delete. | |
569 | ||
570 | * v850_sim.h: Remove everything except `struct simops' from here. | |
571 | * sim-main.h: Move most to here. | |
572 | * gencode.c: Move #includes to here. | |
573 | ||
574 | * sim-main.h(struct _sim_cpu): Rename struct _state. | |
575 | (#define PC, et.al.): Update | |
576 | (v850_callback): Delete. Replaced with SIM_DESC arg. | |
577 | (int8, uint8, int16, uint16, int32, uint32): Define types using | |
578 | unsigned8 et.al from common/sim-types.h. | |
579 | * sim-main.h (State): Define as STATE_CPU. | |
580 | ||
581 | Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
582 | ||
583 | * configure.in: Check for time, chmod. | |
584 | * configure: Regenerate. | |
585 | * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD. | |
586 | ||
587 | * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of | |
588 | sys/syscall.h. | |
589 | (OP_10007E0): Check the existance each SYS_* macro independantly. | |
590 | ||
591 | * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing. | |
592 | ||
593 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
594 | ||
595 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
596 | * config.in: Ditto. | |
597 | ||
598 | Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
599 | ||
600 | * interp.c (sim_kill): Delete. | |
601 | (sim_create_inferior): Add ABFD argument. | |
602 | (sim_load): Move setting of PC from here. | |
603 | (sim_create_inferior): To here. | |
604 | ||
605 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
606 | ||
607 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
608 | * config.in: Ditto. | |
609 | ||
610 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
611 | ||
612 | * interp.c (sim_open): Add ABFD argument. | |
613 | ||
614 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
615 | ||
616 | * simops.c (bsh): Only set CY flag if either of the bottom | |
617 | bytes is zero. | |
618 | ||
619 | * simops.c (prepare, dispose): Lower numbered | |
620 | registers go to higher numbered address. | |
621 | ||
622 | * simops.c (unsigned divide instructions): S bit set if result has | |
623 | top bit set. | |
624 | ||
625 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered | |
626 | registers go to higher numbered address. | |
627 | ||
628 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> | |
629 | ||
630 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
631 | interpretation of SR bit in list18 structure. | |
632 | (divn, divun): New functions to perform N step divide functions. | |
633 | ||
634 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
635 | ||
636 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
637 | with US bit set in the PSW. | |
638 | ||
639 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> | |
640 | ||
641 | * interp.c (sim_resume): Opcode functions return amount to be | |
642 | added to PC and all opcodes take a standard format in the OP[] | |
643 | array. | |
644 | ||
645 | (do_format_*): Functions removed. | |
646 | ||
647 | * v850_sim.h (SP, EP): New register mnemonics. | |
648 | ||
649 | * gencode.c (write_header): Functions prototypes return an | |
650 | integer. | |
651 | ||
652 | * simops.c: Opcode functions return amount to be added to PC. | |
653 | ||
654 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. | |
655 | ||
656 | * simops.c: Add support for v850e instructions. | |
657 | ||
658 | * simops.c: Add support for v850eq instructions. | |
659 | ||
660 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
661 | ||
662 | * interp.c (sim_open): Add callback argument. | |
663 | (sim_set_callbacks): Delete SIM_DESC argument. | |
664 | ||
665 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
666 | ||
667 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
668 | ||
669 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> | |
670 | ||
671 | * interp.c (prog_bfd_was_opened_p): New static local. | |
672 | (prog_bfd): New global variable. | |
673 | (sim_open): Undo patch to add -E support. | |
674 | (sim_close): Close prog_bfd if sim_load opened it. | |
675 | (sim_load): Record bfd of loaded file in prog_bfd. | |
676 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
677 | ||
678 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
679 | ||
680 | * interp.c (sim_stop): Stub function. | |
681 | ||
682 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> | |
683 | ||
684 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
685 | * interp.c (sim_kind, myname): New static locals. | |
686 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
687 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
688 | load file into simulator. Set start address from bfd. | |
689 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
690 | ||
691 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
692 | ||
693 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
694 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
695 | ||
696 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
697 | ||
698 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
699 | * config.in: Ditto. | |
700 | ||
701 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
702 | ||
703 | * interp.c (sim_open): New arg `kind'. | |
704 | ||
705 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
706 | ||
707 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
708 | ||
709 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
710 | ||
711 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
712 | ||
713 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
714 | ||
715 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
716 | ||
717 | * configure: Re-generate. | |
718 | ||
719 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
720 | ||
721 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
722 | ||
723 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> | |
724 | ||
725 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
726 | in argv form. | |
727 | (other sim_*): New SIM_DESC argument. | |
728 | ||
729 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
730 | ||
731 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
732 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
733 | * configure.in: sinclude ../common/aclocal.m4. | |
734 | * configure: Regenerated. | |
735 | ||
736 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
737 | ||
738 | * configure configure.in Makefile.in: Update to new configure | |
739 | scheme which is more compatible with WinGDB builds. | |
740 | * configure.in: Improve comment on how to run autoconf. | |
741 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
742 | * Makefile.in: Use autoconf substitution to install common | |
743 | makefile fragment. | |
744 | ||
745 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> | |
746 | ||
747 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
748 | not zero extend. | |
749 | ||
750 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
751 | ||
752 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
753 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
754 | SYS_gettimeofday and SYS_utime from MSVC. | |
755 | ||
756 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
757 | ||
758 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
759 | via: 0xdead0000 | signal and turn it back into a signal. | |
760 | ||
761 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
762 | ||
763 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
764 | ||
765 | * interp.c (sim_open): Cast calloc function. | |
766 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
767 | program exited with the appropriate exit code. | |
768 | (sim_set_interrupt): Declare buildargv. | |
769 | ||
770 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
771 | type correct and work on big endian systems. | |
772 | ||
773 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
774 | ||
775 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
776 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
777 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
778 | Call AC_CHECK_HEADERS(unistd.h). | |
779 | * configure: Regenerated. | |
780 | * config.in: New file. | |
781 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
782 | ||
783 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
784 | ||
785 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
786 | (EIPC, etc): New macros for system registers. | |
787 | * simops.c, interp.c: Use everywhere. | |
788 | ||
789 | * interp.c: Add support for interrupts issued by interrupt | |
790 | generators, either PC- or time-based. Controlled by simulator | |
791 | command "sim interrupt". | |
792 | ||
793 | * interp.c: Add support for variable-size allocation of memory, | |
794 | via simulator command "sim memory-map". | |
795 | (map): Issue SIGSEGV for references to invalid memory regions. | |
796 | ||
797 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> | |
798 | ||
799 | * simops.c: Include <sys/time.h> for struct timeval and | |
800 | struct timezone. | |
801 | ||
802 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) | |
803 | ||
804 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. | |
805 | ||
806 | * simops.c (OP_10007E0): Handle SYS_time. | |
807 | ||
808 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) | |
809 | ||
810 | * simops.c: Include <sys/stat.h>. | |
811 | (OP_10007E0): Handle SYS_stat. | |
812 | ||
813 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) | |
814 | ||
815 | * simops.c (OP_10007E0): Don't declare errno. | |
816 | ||
817 | * simops.c (OP_500): Mask off low bit in displacement | |
818 | for sld.w. | |
819 | (OP_501): Similarly. | |
820 | ||
821 | * simops.c (OP_500): Fix displacement handling for sld.w. | |
822 | (OP_501): Similarly for sst.w. | |
823 | ||
824 | * simops.c (trace_input): Remove all references to SEXT7. | |
825 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
826 | is zero extended for sst/sld instructions. | |
827 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
828 | was incorrect anyway). | |
829 | ||
830 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
831 | ||
832 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
833 | autoconf. | |
834 | * gencode.c (write_opcodes): Pad operands field to account for | |
835 | MSVC braindamage. | |
836 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
837 | doesn't support it. (Why is this here in the first place?!?) | |
838 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
839 | Change number of operands in struct simops from 9 to 6. Define | |
840 | SIGTRAP and SIGQUIT for MSVC. | |
841 | ||
842 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) | |
843 | ||
844 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
845 | * (map): Add support for external mem in the 1->2 meg range. | |
846 | Also, abort() when memory access is way out of bounds. (Better to | |
847 | die than to give wrong result. (This will be fixed later.)) | |
848 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
849 | ||
850 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
851 | ||
852 | * simops.c (trace_input): Swapped order of operands for output | |
853 | output of OP_IMM_REG. Changed the fetching of the operands for | |
854 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
855 | ||
856 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
857 | ||
858 | * interp.c: Move includes of remote-sim.h and callback.h to | |
859 | v850-sim.h. | |
860 | * (lookup_hash): Add PC to report of hash failure. | |
861 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
862 | memory system. | |
863 | * (sim_write sim_read): Use new memory subsystem. | |
864 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
865 | to make user-defined traps work right. | |
866 | * simops.c (OP_*): Use new memory subsystem. | |
867 | * (OP_14007E0 (reti)): Implement reti. | |
868 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
869 | trap 31. Use new memory subsystem. | |
870 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
871 | load_mem in RLW macro. | |
872 | ||
873 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) | |
874 | ||
875 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
876 | and patterns. | |
877 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
878 | register. | |
879 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
880 | with reading and writing registers. | |
881 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
882 | ||
883 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) | |
884 | ||
885 | * simops.c (trace_input): Fix thinko. | |
886 | ||
887 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
888 | ||
889 | * simops.c (exec_bfd): Rename from sim_bfd. | |
890 | (trace_input): Ditto. | |
891 | ||
892 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
893 | ||
894 | * simops.c (trace_input): Use find_nearest_line to print line | |
895 | number, function name or file name of PC. | |
896 | ||
897 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
898 | ||
899 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
900 | doing hardwired shifts. | |
901 | ||
902 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
903 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
904 | tracing. | |
905 | * configure: Regenerate. | |
906 | ||
907 | * Makefile.in: Don't require a VPATH capable make if configuring | |
908 | in the same directory. Don't use CFLAGS for configuration flags. | |
909 | Add flags from --enable-sim-cflags. Support canadian cross | |
910 | builds. Rebuild whole simulator if include files change. | |
911 | ||
912 | * interp.c (v850_debug): New global for debugging. | |
913 | (lookup_hash,sim_size,sim_set_profile): Use | |
914 | printf_filtered callback, instead of calling printf directly. | |
915 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
916 | ||
917 | * v850_sim.h: Use limits.h to set the various sized types. | |
918 | (SEXT{5,7,16,22}): New macros. | |
919 | ||
920 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) | |
921 | ||
922 | * interp.c (hash): Make this an inline function | |
923 | when compiling with GCC. Simplify. | |
924 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
925 | some #if 0'd code. Enable more emulated syscalls. | |
926 | ||
927 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
928 | ||
929 | * interp.c: Fix sign bit handling for add and sub instructions. | |
930 | ||
931 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) | |
932 | ||
933 | * gencode.c: Fix various indention & style problems. | |
934 | Remove test code. Remove #if 0 code. | |
935 | * interp.c: Provide prototypes for all static functions. | |
936 | Fix minor indention problems. | |
937 | (sim_open, sim_resume): Remove unused variables. | |
938 | (sim_read): Return type is "int". | |
939 | * simops.c: Remove unused variables. | |
940 | (divh): Make result of divide-by-zero zero. | |
941 | (setf): Initialize result to keep compiler quiet. | |
942 | (sar instructions): These just clear the overflow bit. | |
943 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
944 | and put_word. | |
945 | ||
946 | * interp.c: OP should be an array of 32bit operands! | |
947 | (v850_callback): Declare. | |
948 | (do_format_5): Fix extraction of OP[0]. | |
949 | (sim_size): Remove debugging printf. | |
950 | (sim_set_callbacks): Do something useful. | |
951 | (sim_stop_reason): Gross hacks to get c-torture running. | |
952 | * simops.c: Simplify code for computing targets of bCC | |
953 | insns. Invert 's' bit if 'ov' bit is set for some | |
954 | instructions. Fix 'cy' bit handling for numerous | |
955 | instructions. Make the simulator stop when a halt | |
956 | instruction is encountered. Very crude support for | |
957 | emulated syscalls (trap 0). | |
958 | * v850_sim.h: Include "callback.h" and declare | |
959 | v850_callback. Items in the operand array are 32bits. | |
960 | ||
961 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
962 | ||
963 | * interp.c (sim_resume): Fix code to check for a format 3 | |
964 | opcode. | |
965 | * simops.c: bCC insns only argument is a constant, not a | |
966 | register value (duh...) | |
967 | ||
968 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) | |
969 | ||
970 | * simops.c: Fix "not1" and "set1". | |
971 | ||
972 | * simops.c: Don't forget to initialize temp for | |
973 | "ld.h" and "ld.w" | |
974 | ||
975 | * interp.c: Remove various debugging printfs. | |
976 | ||
977 | * simops.c: Fix satadd, satsub boundary case handling. | |
978 | ||
979 | * interp.c (hash): Fix. | |
980 | * interp.c (do_format_8): Get operands correctly and | |
981 | call the target function. | |
982 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
983 | ||
984 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) | |
985 | ||
986 | * interp.c (do_format_4): Get operands correctly and | |
987 | call the target function. | |
988 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
989 | "sst.h", and "sst.w". | |
990 | ||
991 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change | |
992 | accordingly. Remove many unused definitions. | |
993 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
994 | accordingly. | |
995 | (get_longlong, get_longword, get_word): Deleted. | |
996 | (write_longlong, write_longword, write_word): Deleted. | |
997 | (get_operands): Deleted. | |
998 | (get_byte, get_half, get_word): New functions. | |
999 | (put_byte, put_half, put_word): New functions. | |
1000 | * simops.c: Remove unused functions. Rough cut at | |
1001 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
1002 | ||
1003 | * v850_sim.h (struct _state): Remove "psw" field. Add | |
1004 | "sregs" field. | |
1005 | (PSW): Remove bogus definition. | |
1006 | * simops.c: Change condition code handling to use the psw | |
1007 | register within the sregs array. Handle "ldsr" and "stsr". | |
1008 | ||
1009 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". | |
1010 | ||
1011 | * interp.c (do_format_5): Get operands correctly and | |
1012 | call the target function. | |
1013 | (sim_resume): Don't do a PC update for format 5 instructions. | |
1014 | * simops.c: Handle "jarl" and "jmp" instructions. | |
1015 | ||
1016 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" | |
1017 | "di", and "ei" instructions correctly. | |
1018 | ||
1019 | * interp.c (do_format_3): Get operands correctly and call | |
1020 | the target function. | |
1021 | * simops.c: Handle bCC instructions. | |
1022 | ||
1023 | * simops.c: Add condition code handling to shift insns. | |
1024 | Fix minor typos in condition code handling for other insns. | |
1025 | ||
1026 | * Makefile.in: Fix typo. | |
1027 | * simops.c: Add condition code handling to "sub" "subr" and | |
1028 | "divh" instructions. | |
1029 | ||
1030 | * interp.c (hash): Update to be more accurate. | |
1031 | (lookup_hash): Call hash rather than computing the hash | |
1032 | code here. | |
1033 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
1034 | Get operands correctly and call the target function. | |
1035 | (do_format_6): Get operands correctly and call the target | |
1036 | function. | |
1037 | (do_formats_9_10): Rough cut so shift ops will work. | |
1038 | (sim_resume): Tweak to deal with format 1 and format 2 | |
1039 | handling in a single funtion. Don't update the PC | |
1040 | for format 3 insns. Fix typos. | |
1041 | * simops.c: Slightly reorganize. Add condition code handling | |
1042 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
1043 | and "not" instructions. | |
1044 | * v850_sim.h (reg_t): Registers are 32bits. | |
1045 | (_state): The V850 has 32 general registers. Add a 32bit | |
1046 | psw and pc register too. Add accessor macros | |
1047 | ||
1048 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
1049 | changes from the d10v simulator. | |
1050 | ||
1051 | * simops.c: Add shift support. | |
1052 | ||
1053 | * simops.c: Add multiply & divide support. Abort for system | |
1054 | instructions. | |
1055 | ||
1056 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub | |
1057 | and subr. No condition codes yet. | |
1058 | ||
1059 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) | |
1060 | ||
1061 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, | |
1062 | gencode.c, interp.c, simops.c: Created. | |
1063 |