Commit | Line | Data |
---|---|---|
247fccde AC |
1 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
4 | * config.in: Ditto. | |
5 | ||
6 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
7 | ||
8 | * interp.c (sim_open): Add ABFD argument. | |
9 | ||
60616228 NC |
10 | start-sanitize-v850e |
11 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
12 | ||
13 | * simops.c (bsh): Only set CY flag if either of the bottom | |
14 | bytes is zero. | |
15 | ||
16 | * simops.c (prepare, dispose): Lower numbered | |
17 | registers go to higher numbered address. | |
18 | ||
19 | * simops.c (unsigned divide instructions): S bit set if result has | |
20 | top bit set. | |
21 | ||
22 | start-sanitize-v850eq | |
23 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered | |
24 | registers go to higher numbered address. | |
25 | end-sanitize-v850eq | |
26 | end-sanitize-v850e | |
27 | ||
70caad98 NC |
28 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> |
29 | ||
30 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
31 | interpretation of SR bit in list18 structure. | |
64ad9cec NC |
32 | start-sanitize-v850eq |
33 | (divn, divun): New functions to perform N step divide functions. | |
34 | end-sanitize-v850eq | |
70caad98 NC |
35 | |
36 | start-sanitize-v850eq | |
37 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
38 | ||
39 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
40 | with US bit set in the PSW. | |
41 | start-sanitize-v850eq | |
42 | ||
a0a6db4b NC |
43 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> |
44 | ||
45 | * interp.c (sim_resume): Opcode functions return amount to be | |
46 | added to PC and all opcodes take a standard format in the OP[] | |
47 | array. | |
48 | ||
49 | (do_format_*): Functions removed. | |
50 | ||
51 | * v850_sim.h (SP, EP): New register mnemonics. | |
52 | ||
53 | * gencode.c (write_header): Functions prototypes return an | |
54 | integer. | |
55 | ||
56 | * simops.c: Opcode functions return amount to be added to PC. | |
57 | ||
58 | start-sanitize-v850e | |
59 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. | |
60 | ||
61 | * simops.c: Add support for v850e instructions. | |
62 | ||
63 | * .Sanitize (Do-first, Do-last): Add support for keep-v850e | |
64 | command line option. | |
65 | ||
66 | end-sanitize-v850e | |
67 | ||
68 | start-sanitize-v850eq | |
69 | * .Sanitize (Do-first, Do-last): Add support for keep-v850eq | |
70 | command line option. | |
71 | ||
72 | * simops.c: Add support for v850eq instructions. | |
73 | end-sanitize-v850eq | |
74 | ||
75 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
76 | ||
77 | * interp.c (sim_open): Add callback argument. | |
78 | (sim_set_callbacks): Delete SIM_DESC argument. | |
79 | ||
80 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
81 | ||
82 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
83 | ||
29860858 DE |
84 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> |
85 | ||
86 | * interp.c (prog_bfd_was_opened_p): New static local. | |
87 | (prog_bfd): New global variable. | |
88 | (sim_open): Undo patch to add -E support. | |
89 | (sim_close): Close prog_bfd if sim_load opened it. | |
90 | (sim_load): Record bfd of loaded file in prog_bfd. | |
91 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
92 | ||
8517f62b AC |
93 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> |
94 | ||
95 | * interp.c (sim_stop): Stub function. | |
96 | ||
1ad886c9 DE |
97 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> |
98 | ||
99 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
100 | * interp.c (sim_kind, myname): New static locals. | |
101 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
102 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
103 | load file into simulator. Set start address from bfd. | |
104 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
105 | ||
87e43259 AC |
106 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
107 | ||
108 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
109 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
110 | ||
111 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
112 | ||
113 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
114 | * config.in: Ditto. | |
115 | ||
fbda74b1 DE |
116 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
117 | ||
8a7c3105 DE |
118 | * interp.c (sim_open): New arg `kind'. |
119 | ||
fbda74b1 DE |
120 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
121 | ||
a35e91c3 AC |
122 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
123 | ||
124 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
125 | ||
126 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
127 | ||
128 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
129 | ||
a77aa7ec AC |
130 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
131 | ||
132 | * configure: Re-generate. | |
133 | ||
601fb8ae MM |
134 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
135 | ||
136 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
137 | ||
0b0cc453 DE |
138 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> |
139 | ||
140 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
141 | in argv form. | |
142 | (other sim_*): New SIM_DESC argument. | |
143 | ||
144 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
145 | ||
146 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
147 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
148 | * configure.in: sinclude ../common/aclocal.m4. | |
149 | * configure: Regenerated. | |
150 | ||
295dbbe4 SG |
151 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
152 | ||
153 | * configure configure.in Makefile.in: Update to new configure | |
154 | scheme which is more compatible with WinGDB builds. | |
155 | * configure.in: Improve comment on how to run autoconf. | |
156 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
157 | * Makefile.in: Use autoconf substitution to install common | |
158 | makefile fragment. | |
159 | ||
5a8023e5 MM |
160 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> |
161 | ||
162 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
163 | not zero extend. | |
164 | ||
165 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
166 | ||
167 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
168 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
169 | SYS_gettimeofday and SYS_utime from MSVC. | |
170 | ||
6ec96a02 MM |
171 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
172 | ||
173 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
174 | via: 0xdead0000 | signal and turn it back into a signal. | |
175 | ||
ee3f2d4f MM |
176 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
177 | ||
178 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
179 | ||
180 | * interp.c (sim_open): Cast calloc function. | |
181 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
182 | program exited with the appropriate exit code. | |
183 | (sim_set_interrupt): Declare buildargv. | |
184 | ||
185 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
186 | type correct and work on big endian systems. | |
187 | ||
188 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
189 | ||
190 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
191 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
192 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
193 | Call AC_CHECK_HEADERS(unistd.h). | |
194 | * configure: Regenerated. | |
195 | * config.in: New file. | |
196 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
197 | ||
198 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
199 | ||
200 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
201 | (EIPC, etc): New macros for system registers. | |
202 | * simops.c, interp.c: Use everywhere. | |
203 | ||
204 | * interp.c: Add support for interrupts issued by interrupt | |
205 | generators, either PC- or time-based. Controlled by simulator | |
206 | command "sim interrupt". | |
207 | ||
208 | * interp.c: Add support for variable-size allocation of memory, | |
209 | via simulator command "sim memory-map". | |
210 | (map): Issue SIGSEGV for references to invalid memory regions. | |
211 | ||
7fc45edb GRK |
212 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> |
213 | ||
214 | * simops.c: Include <sys/time.h> for struct timeval and | |
215 | struct timezone. | |
216 | ||
6803f89b JL |
217 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) |
218 | ||
8824fb45 JL |
219 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. |
220 | ||
6803f89b JL |
221 | * simops.c (OP_10007E0): Handle SYS_time. |
222 | ||
c500c074 JL |
223 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) |
224 | ||
225 | * simops.c: Include <sys/stat.h>. | |
226 | (OP_10007E0): Handle SYS_stat. | |
227 | ||
0a89af6e JL |
228 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) |
229 | ||
c500c074 JL |
230 | * simops.c (OP_10007E0): Don't declare errno. |
231 | ||
f0099789 JL |
232 | * simops.c (OP_500): Mask off low bit in displacement |
233 | for sld.w. | |
234 | (OP_501): Similarly. | |
235 | ||
85c09b05 JL |
236 | * simops.c (OP_500): Fix displacement handling for sld.w. |
237 | (OP_501): Similarly for sst.w. | |
238 | ||
0a89af6e JL |
239 | * simops.c (trace_input): Remove all references to SEXT7. |
240 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
241 | is zero extended for sst/sld instructions. | |
242 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
243 | was incorrect anyway). | |
244 | ||
96851909 SG |
245 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) |
246 | ||
247 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
248 | autoconf. | |
249 | * gencode.c (write_opcodes): Pad operands field to account for | |
250 | MSVC braindamage. | |
251 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
252 | doesn't support it. (Why is this here in the first place?!?) | |
253 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
254 | Change number of operands in struct simops from 9 to 6. Define | |
255 | SIGTRAP and SIGQUIT for MSVC. | |
256 | ||
254ef340 SG |
257 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) |
258 | ||
259 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
260 | * (map): Add support for external mem in the 1->2 meg range. | |
261 | Also, abort() when memory access is way out of bounds. (Better to | |
262 | die than to give wrong result. (This will be fixed later.)) | |
263 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
264 | ||
265 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
266 | ||
267 | * simops.c (trace_input): Swapped order of operands for output | |
268 | output of OP_IMM_REG. Changed the fetching of the operands for | |
269 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
270 | ||
271 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
272 | ||
273 | * interp.c: Move includes of remote-sim.h and callback.h to | |
274 | v850-sim.h. | |
275 | * (lookup_hash): Add PC to report of hash failure. | |
276 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
277 | memory system. | |
278 | * (sim_write sim_read): Use new memory subsystem. | |
279 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
280 | to make user-defined traps work right. | |
281 | * simops.c (OP_*): Use new memory subsystem. | |
282 | * (OP_14007E0 (reti)): Implement reti. | |
283 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
284 | trap 31. Use new memory subsystem. | |
285 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
286 | load_mem in RLW macro. | |
287 | ||
88777ce2 SG |
288 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) |
289 | ||
290 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
291 | and patterns. | |
292 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
293 | register. | |
294 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
295 | with reading and writing registers. | |
296 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
297 | ||
da86a4fa JL |
298 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) |
299 | ||
300 | * simops.c (trace_input): Fix thinko. | |
301 | ||
302 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
303 | ||
304 | * simops.c (exec_bfd): Rename from sim_bfd. | |
305 | (trace_input): Ditto. | |
306 | ||
1d00ce83 MM |
307 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
308 | ||
309 | * simops.c (trace_input): Use find_nearest_line to print line | |
310 | number, function name or file name of PC. | |
311 | ||
ead4a3f1 MM |
312 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
313 | ||
314 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
315 | doing hardwired shifts. | |
316 | ||
317 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
318 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
319 | tracing. | |
320 | * configure: Regenerate. | |
321 | ||
322 | * Makefile.in: Don't require a VPATH capable make if configuring | |
323 | in the same directory. Don't use CFLAGS for configuration flags. | |
324 | Add flags from --enable-sim-cflags. Support canadian cross | |
325 | builds. Rebuild whole simulator if include files change. | |
326 | ||
327 | * interp.c (v850_debug): New global for debugging. | |
328 | (lookup_hash,sim_size,sim_set_profile): Use | |
329 | printf_filtered callback, instead of calling printf directly. | |
330 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
331 | ||
332 | * v850_sim.h: Use limits.h to set the various sized types. | |
333 | (SEXT{5,7,16,22}): New macros. | |
334 | ||
9909e232 JL |
335 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) |
336 | ||
337 | * interp.c (hash): Make this an inline function | |
338 | when compiling with GCC. Simplify. | |
339 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
340 | some #if 0'd code. Enable more emulated syscalls. | |
341 | ||
342 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
343 | ||
344 | * interp.c: Fix sign bit handling for add and sub instructions. | |
345 | ||
d81352b8 JL |
346 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) |
347 | ||
9fca2fd3 JL |
348 | * gencode.c: Fix various indention & style problems. |
349 | Remove test code. Remove #if 0 code. | |
350 | * interp.c: Provide prototypes for all static functions. | |
351 | Fix minor indention problems. | |
352 | (sim_open, sim_resume): Remove unused variables. | |
353 | (sim_read): Return type is "int". | |
354 | * simops.c: Remove unused variables. | |
355 | (divh): Make result of divide-by-zero zero. | |
356 | (setf): Initialize result to keep compiler quiet. | |
357 | (sar instructions): These just clear the overflow bit. | |
358 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
359 | and put_word. | |
360 | ||
d81352b8 JL |
361 | * interp.c: OP should be an array of 32bit operands! |
362 | (v850_callback): Declare. | |
363 | (do_format_5): Fix extraction of OP[0]. | |
364 | (sim_size): Remove debugging printf. | |
365 | (sim_set_callbacks): Do something useful. | |
366 | (sim_stop_reason): Gross hacks to get c-torture running. | |
367 | * simops.c: Simplify code for computing targets of bCC | |
368 | insns. Invert 's' bit if 'ov' bit is set for some | |
369 | instructions. Fix 'cy' bit handling for numerous | |
370 | instructions. Make the simulator stop when a halt | |
371 | instruction is encountered. Very crude support for | |
372 | emulated syscalls (trap 0). | |
373 | * v850_sim.h: Include "callback.h" and declare | |
374 | v850_callback. Items in the operand array are 32bits. | |
375 | ||
376 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
377 | ||
378 | * interp.c (sim_resume): Fix code to check for a format 3 | |
379 | opcode. | |
380 | * simops.c: bCC insns only argument is a constant, not a | |
381 | register value (duh...) | |
382 | ||
83fc3bac JL |
383 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) |
384 | ||
787d66bb JL |
385 | * simops.c: Fix "not1" and "set1". |
386 | ||
3046d879 JL |
387 | * simops.c: Don't forget to initialize temp for |
388 | "ld.h" and "ld.w" | |
389 | ||
ba853302 JL |
390 | * interp.c: Remove various debugging printfs. |
391 | ||
0e4ccc58 JL |
392 | * simops.c: Fix satadd, satsub boundary case handling. |
393 | ||
83fc3bac JL |
394 | * interp.c (hash): Fix. |
395 | * interp.c (do_format_8): Get operands correctly and | |
396 | call the target function. | |
397 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
398 | ||
1fe983dc JL |
399 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) |
400 | ||
3cb6bf78 JL |
401 | * interp.c (do_format_4): Get operands correctly and |
402 | call the target function. | |
403 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
404 | "sst.h", and "sst.w". | |
405 | ||
28647e4c JL |
406 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change |
407 | accordingly. Remove many unused definitions. | |
408 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
409 | accordingly. | |
410 | (get_longlong, get_longword, get_word): Deleted. | |
411 | (write_longlong, write_longword, write_word): Deleted. | |
412 | (get_operands): Deleted. | |
413 | (get_byte, get_half, get_word): New functions. | |
414 | (put_byte, put_half, put_word): New functions. | |
415 | * simops.c: Remove unused functions. Rough cut at | |
416 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
417 | ||
614f1c68 JL |
418 | * v850_sim.h (struct _state): Remove "psw" field. Add |
419 | "sregs" field. | |
420 | (PSW): Remove bogus definition. | |
421 | * simops.c: Change condition code handling to use the psw | |
422 | register within the sregs array. Handle "ldsr" and "stsr". | |
423 | ||
dca41ba7 JL |
424 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". |
425 | ||
e9b6cbac JL |
426 | * interp.c (do_format_5): Get operands correctly and |
427 | call the target function. | |
428 | (sim_resume): Don't do a PC update for format 5 instructions. | |
429 | * simops.c: Handle "jarl" and "jmp" instructions. | |
430 | ||
3095b8df JL |
431 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" |
432 | "di", and "ei" instructions correctly. | |
433 | ||
2108e864 JL |
434 | * interp.c (do_format_3): Get operands correctly and call |
435 | the target function. | |
436 | * simops.c: Handle bCC instructions. | |
437 | ||
35404c7d JL |
438 | * simops.c: Add condition code handling to shift insns. |
439 | Fix minor typos in condition code handling for other insns. | |
440 | ||
aabce0f4 JL |
441 | * Makefile.in: Fix typo. |
442 | * simops.c: Add condition code handling to "sub" "subr" and | |
443 | "divh" instructions. | |
444 | ||
0ef0eba5 JL |
445 | * interp.c (hash): Update to be more accurate. |
446 | (lookup_hash): Call hash rather than computing the hash | |
447 | code here. | |
448 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
449 | Get operands correctly and call the target function. | |
450 | (do_format_6): Get operands correctly and call the target | |
451 | function. | |
452 | (do_formats_9_10): Rough cut so shift ops will work. | |
453 | (sim_resume): Tweak to deal with format 1 and format 2 | |
454 | handling in a single funtion. Don't update the PC | |
455 | for format 3 insns. Fix typos. | |
456 | * simops.c: Slightly reorganize. Add condition code handling | |
457 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
458 | and "not" instructions. | |
459 | * v850_sim.h (reg_t): Registers are 32bits. | |
460 | (_state): The V850 has 32 general registers. Add a 32bit | |
461 | psw and pc register too. Add accessor macros | |
462 | ||
463 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
464 | changes from the d10v simulator. | |
465 | ||
77553374 JL |
466 | * simops.c: Add shift support. |
467 | ||
e98e3b2c JL |
468 | * simops.c: Add multiply & divide support. Abort for system |
469 | instructions. | |
470 | ||
1fe983dc JL |
471 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub |
472 | and subr. No condition codes yet. | |
473 | ||
22c1c7dd JL |
474 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) |
475 | ||
476 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, | |
477 | gencode.c, interp.c, simops.c: Created. | |
478 |