Commit | Line | Data |
---|---|---|
a72f8fb4 AC |
1 | Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | * simops.c: Move "mov", "reti", to v850.igen, fix tracing. | |
4 | ||
5 | * interp.c (hash): Delete. | |
6 | ||
7 | * v850.igen (nop): Really do nothing. | |
8 | ||
9 | * interp.c (do_interrupt): Mask interrupts after PSW is saved, not | |
10 | before. | |
11 | * v850.igen (reti): Return to current PC not previous. | |
12 | ||
6aead89a AC |
13 | start-sanitize-v850e |
14 | Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
15 | ||
16 | * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing. | |
17 | (trace_module): Global, save component/module name across insn. | |
18 | ||
19 | * simops.c: Move "bsh" to v850.igen, fix. | |
20 | ||
21 | * v850.igen (callt): Load correct number of bytes. Fix tracing. | |
22 | (stsr, ldsr): Correct src, dest fields. Fix tracing. | |
23 | (ctret): Force alignment. Fix tracing. | |
24 | ||
25 | end-sanitize-v850e | |
fb1fd475 AC |
26 | Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
27 | ||
28 | * simops.c (trace_output): Add result argument. | |
29 | (trace_result): New function. Simpler version of trace_output, | |
30 | assumes trace needed. | |
31 | (trace_output): Call trace_result. | |
32 | (trace_output): For IMM_REG_REG, trace correct register. | |
33 | (trace_input): Add case for 16bit immediates. | |
34 | (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use. | |
35 | ||
36 | * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define. | |
37 | (trace_values, trace_name, trace_pc, trace_num_values): Make | |
38 | global. | |
39 | (GR, SR): Define. | |
40 | ||
41 | v850.insn (movea, stsr): Use. | |
42 | start-sanitize-v850e | |
43 | (sxb, sxh, zxb, zxh): Ditto. | |
44 | end-sanitize-v850e | |
45 | ||
46 | Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
47 | ||
48 | * simops.c: Move "movea" from here. | |
49 | * v850.igen: To here. | |
50 | ||
51 | * v850.igen (simm16): Define, sign extend imm16. | |
52 | (uimm16): Define, no sign extension. | |
53 | (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use. | |
54 | ||
55 | start-sanitize-v850e | |
56 | * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose", | |
57 | "mov32" from here. | |
58 | * v850.igen: To here. | |
59 | (switch): Fix off by two error in NIA calc. | |
60 | ||
61 | end-sanitize-v850e | |
3f33acd0 AC |
62 | Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
63 | ||
64 | * simops.c (trace_pc, trace_name, trace_values, trace_num_values): | |
65 | New static globals. | |
66 | (trace_input): Just save pc, name and values for trace_output. | |
67 | (trace_output): Write trace values to a buffer. Use | |
68 | trace_one_insn to print trace info and buffer. | |
69 | (SIZE_OPERANDS, SIZE_LOCATION): Delete. | |
70 | ||
c7db488f AC |
71 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
72 | ||
73 | * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits | |
74 | can be masked out. | |
75 | ||
76 | * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr" | |
77 | instructions from here. | |
78 | * v850.igen (ldsr, stsr): To here. Mask out reserved bits when | |
79 | setting PSW. | |
80 | ||
81 | * interp.c (sim_open): Set psw_mask if machine known. | |
82 | ||
721478d5 AC |
83 | Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
84 | ||
85 | start-sanitize-v850e | |
86 | * v850-dc: Add rule to diferentiate between breakpoint and divh. | |
87 | * v850.igen (break): New instruction, breakpoint simulator. | |
88 | ||
89 | end-sanitize-v850e | |
90 | * v850.igen (breakpoint): Enable. Change to a 32bit instruction. | |
91 | ||
5262de21 JW |
92 | start-sanitize-v850e |
93 | Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com> | |
94 | ||
95 | * simops.c (Multiply64): Don't store into register zero. | |
96 | ||
3e906c08 | 97 | end-sanitize-v850e |
4dda50b0 AC |
98 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
99 | ||
100 | * Makefile.in (semantics.o): Add dependency. | |
101 | ||
102 | * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save, | |
103 | do not adjust CIA/NIA. | |
104 | ||
658303f7 AC |
105 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> |
106 | ||
107 | start-sanitize-v850eq | |
bda61639 AC |
108 | * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US]. |
109 | ||
110 | * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn", | |
111 | "divun", "pushml" code from here to v850.igen. | |
112 | (divun): Make global. | |
113 | (type3_regs): Make global | |
114 | ||
115 | * v850.igen: Move simops.c code to here. | |
116 | ||
658303f7 AC |
117 | * interp.c (sim_create_inferior): For v850eq set US bit by |
118 | default. | |
119 | ||
120 | end-sanitize-v850eq | |
121 | start-sanitize-v850e | |
122 | * interp.c (sim_open): Don't set arch, now set by | |
123 | sim_analyze_program. | |
124 | ||
125 | end-sanitize-v850e | |
126 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
127 | ||
128 | Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
129 | ||
130 | * simops.c (op_types): Move from here. | |
131 | sim-main.h: To here. | |
132 | ||
133 | * sim-main.h (trace_input, trace_output), simops.c: Make global. | |
134 | ||
135 | * simops.c (OP_60): Move "jmp" code from here. | |
136 | * v850.igen (jmp): To here. | |
137 | ||
138 | start-sanitize-v850eq | |
139 | * simops.c (OP_60): Move "sld.bu" code from here. | |
140 | * v850.igen (sld.bu): To here. | |
141 | ||
142 | end-sanitize-v850eq | |
410230cf AC |
143 | Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> |
144 | ||
145 | start-sanitize-v850eq | |
146 | * v850.igen (prepare, ...): Add to v850eq architecture. | |
147 | ||
148 | end-sanitize-v850eq | |
149 | start-sanitize-v850e | |
150 | * interp.c (sim_open): Default to v850eq. | |
151 | ||
152 | end-sanitize-v850e | |
153 | start-sanitize-v850eq | |
154 | ||
155 | * interp.c (sim_open): Default to v850e. | |
156 | end-sanitize-v850eq | |
157 | * sim-main.h (signal.h): Include. | |
158 | ||
159 | * v850.igen (illegal): Report/halt illegal instructions. | |
160 | ||
161 | * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS. | |
162 | ||
163 | * configure.in: Add reserved bits option. | |
164 | * configure: Regenerate. | |
165 | ||
cad7297e AC |
166 | Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com> |
167 | ||
93e7a1b5 AC |
168 | * interp.c (sim_open): Use sim_do_commandf instead of asprintf. |
169 | ||
170 | * sim-main.h (INSN_NAME): | |
171 | ||
172 | * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS. | |
173 | (SIM_EXTRA_DEPS): Add itable.h | |
174 | (tmp-gencode): Does not depend on simops.h | |
175 | ||
176 | * sim-main.h (itable.h): Include. | |
177 | (MAX_INSNS, INSN_NAME): Define. | |
178 | ||
cad7297e AC |
179 | * interp.c: Compute inttype from the interrupt_names index that |
180 | was passed in. | |
181 | ||
02508bb1 AC |
182 | Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com> |
183 | ||
184 | * simops.c (trace_input): Use trace_printf instead of | |
185 | sim_io_printf. | |
186 | (trace_output): Ditto. | |
187 | (trace_input): Only trace when TRACE_ALU_P. Delete code | |
188 | disasembling instruction. | |
189 | (trace_output): Only trace when TRACE_ALU_P. | |
190 | ||
5d37a07b AC |
191 | Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com> |
192 | ||
193 | * simops.c (trace_input, trace_output): Use sim_io_printf. | |
194 | (OP_620): Pass correct argument to trace. | |
195 | (OP_E607E0): Ditto. | |
196 | (trace_input): Obtain prog_bfd, text_start et.al from simulator | |
197 | struct. | |
198 | ||
199 | Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
200 | ||
201 | * v850.igen: New file. | |
202 | * v850-dc: New file. | |
203 | ||
204 | Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
205 | ||
206 | ||
207 | * sim-main.h (SEXT16): Delete, use EXTEND16. | |
208 | (SEXT8): Delete, use EXTEND8. | |
209 | (SEXT32): Delete, used? | |
210 | (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL. | |
211 | (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian. | |
212 | ||
213 | * simops.c: Use EXTEND15 from sim-bits instead of SEXT16. | |
214 | ||
215 | * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete, | |
216 | replace with TRACE_INSN_P and TRACE_ALU_P. | |
217 | ||
218 | * simops.c (trace_input, trace_output): Update. | |
219 | ||
220 | * interp.c (sim_engine_run): Delete. | |
221 | (lookup_hash): Delete. | |
222 | (sim_open): Do not fill hash table. | |
223 | (sim_trace): Delete. | |
224 | ||
225 | Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
226 | ||
227 | * simops.c (OP_FFFF): Use sim_engine_halt. | |
228 | (OP_12007E0): Ditto. | |
229 | (OP_10007E0): Ditto. | |
230 | ||
231 | * sim-main.h (struct sim_cpu): Delete member exception. Using | |
232 | sim-engine et.al. | |
233 | ||
234 | * interp.c (sim_info): Do not do anything in sim-info. | |
235 | (sim_stop): Delete, replace with sim-stop. | |
236 | (sim_stop_reason): Delete, replace with sim-reason. | |
237 | ||
238 | * sim-main.h (WITH_WATCHPOINTS): Define. | |
239 | (WITH_MODULO_MEMORY): Define | |
240 | ||
241 | * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop, | |
242 | sim-reason. | |
243 | ||
244 | * interp.c (enum interrupt_cond_type): Delete. | |
245 | (struct interrupt_generator): Delete. | |
246 | (enum interrupt_type): Drop int_none. | |
247 | (sim_open): Initialize WATCHPOINT module. | |
248 | (sim_resume, sim_run): Rename sim_resume to sim_run. | |
249 | (sim_engine_run): Replace interrupt code with call to sim-events. | |
250 | (sim_set_interrupt): Delete. | |
251 | (sim_parse_number): Delete. | |
252 | ||
6fea4763 DE |
253 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
254 | ||
255 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
256 | ||
da3a66e5 AC |
257 | Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
258 | ||
259 | * simops.c (fetch_argv): New function, fetch a arg vector from | |
260 | simulator memory. | |
261 | ||
262 | * configure.in: Check for fork, execve, execv. | |
263 | * configure: Regenerate. | |
264 | ||
265 | * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and | |
266 | T2H_4 for byte swapping. | |
267 | ||
268 | * sim-main.h, interp.c (get_word, get_half, get_byte, put_word, | |
269 | put_half, put_byte): Delete. | |
270 | ||
271 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
272 | ||
273 | * sim-main.h (load_mem, store_mem): Redefine as macros. | |
274 | (IMEM, IMEM_IMMED): New macros - fetch instructions. | |
275 | ||
276 | * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open | |
277 | transfer data via a buffer. | |
278 | (fetch_str): New function, fetch string from memory. | |
279 | ||
280 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
281 | ||
282 | * interp.c (sim_open): Establish memory maps using sim-memopt.c | |
283 | via sim_do_command. | |
284 | (sim_do_command): Print error if memory-map command is used. Call | |
285 | sim_args_command. | |
286 | (map): Delete, replaced by sim-core. | |
287 | (sim_memory_init): Delete, replaced by sim-core. | |
288 | (sim_set_memory_map): Delete, replaced by sim-memopt. | |
289 | (load_mem): Delete, replaced by sim-core. | |
290 | (store_mem): Delete, replaced by sim-core. | |
291 | (sim_write): Delete, replaced by sim-hrw. | |
292 | (sim_read): Delete, replaced by sim-hrw. | |
293 | ||
294 | * sim-main.h (struct sim_state): Remove memory members, using | |
295 | sim-core.c | |
296 | ||
9cdd2c6d AC |
297 | Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
298 | ||
b5e935ae AC |
299 | * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr. |
300 | * interp.c (map): Do not add to a void pointer. | |
301 | ||
302 | * Makefile.in (INCLUDE): Add sim-main.h | |
303 | ||
304 | * configure.in: Check for time.h | |
305 | * configure: Re-generate. | |
306 | ||
307 | * interp.c (struct interrupt_generator): Make time unsigned long, | |
308 | address SIM_ADDR. | |
309 | (sim_resume): Make oldpc SIM_ADDR. | |
310 | (struct hash_entry): Make mask/opcode unsigned. | |
311 | ||
312 | * v850_sim.h (struct simops ): Make opcode and mask unsigned. | |
313 | ||
9cdd2c6d AC |
314 | * simops.c (utime.h): Include if available. |
315 | (OP_10007E0): Check for UTIME function. | |
316 | (divun): Put parentheses around shift argument. | |
317 | (OP_640): Put parentheses around shift argument, was wrong. | |
318 | (OP_107F0): Return something. | |
319 | ||
320 | * interp.c (sim_parse_number): Use strtoul not strtol. | |
321 | (sim_resume): Use sim_elapsed_time_get to keep track of the time. | |
322 | ||
323 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
324 | (SIM_AC_OPTION_ENDIAN): Set to hardwired big. | |
325 | (SIM_AC_OPTION_HOST_ENDIAN): Add. | |
326 | (AC_CHECK_FUNCS): Add utime. | |
327 | (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h | |
328 | configure: Regenerate. | |
329 | ||
330 | ||
331 | * Makefile.in (SIM_RUN_OBJS): Use nrun.o. | |
332 | (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o, | |
333 | sim-config.o, sim-module.o, sim-events.o, sim-core.o, | |
334 | sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o | |
335 | (SIM_ENDIAN, SIM_WARNGINS): Define. | |
336 | ||
337 | * simops.c (OP_10007E0): Use sim_io_* for transfers. | |
338 | ||
339 | * interp.c (sim_resume): Pass sd around. | |
340 | ||
341 | * simops.c (sim-main.h): Include. | |
342 | ||
343 | * gencode.c (write_template): Generate #include sim-main.h. | |
344 | (write_opcodes): Ditto. | |
345 | ||
346 | * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete. | |
347 | (v850_callback): Ditto. | |
348 | (sim_kind, myname): Ditto. | |
349 | (lookup_hash): Pass SD. Use sim_io_error. | |
350 | (sim_set_memory_map): Pass in SD, use. | |
351 | (init_system): Pass in SD, use. | |
352 | (sim_open): Update. | |
353 | (sim_set_profile): Delete. | |
354 | (sim_set_profile_size): Delete. | |
355 | (do_interrupt): Pass in SD, use. | |
356 | (sim_info): Use sim_io_printf. | |
357 | (sim_create_inferior): Reset registers. Set PC from prog_bfd | |
358 | argument. | |
359 | (sim_load): Delete, use common/sim-hload.c | |
360 | (sim_size): Rename to sim_memory_init. | |
361 | (sim_write): Remove call to init_system. | |
362 | (init_system): Delete. | |
363 | (sim_set_callbacks): Delete. | |
364 | (sim_set_interrupt): Pass in SD, use. | |
365 | (start_time): Delete. | |
366 | ||
367 | * v850_sim.h: Remove everything except `struct simops' from here. | |
368 | * sim-main.h: Move most to here. | |
369 | * gencode.c: Move #includes to here. | |
370 | ||
371 | * sim-main.h(struct _sim_cpu): Rename struct _state. | |
372 | (#define PC, et.al.): Update | |
373 | (v850_callback): Delete. Replaced with SIM_DESC arg. | |
374 | (int8, uint8, int16, uint16, int32, uint32): Define types using | |
375 | unsigned8 et.al from common/sim-types.h. | |
376 | * sim-main.h (State): Define as STATE_CPU. | |
377 | ||
0ffba68f AC |
378 | Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
379 | ||
380 | * configure.in: Check for time, chmod. | |
381 | * configure: Regenerate. | |
382 | * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD. | |
383 | ||
384 | * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of | |
385 | sys/syscall.h. | |
386 | (OP_10007E0): Check the existance each SYS_* macro independantly. | |
387 | ||
388 | * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing. | |
389 | ||
88117054 AC |
390 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
391 | ||
392 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
393 | * config.in: Ditto. | |
394 | ||
7230ff0f AC |
395 | Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
396 | ||
397 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
398 | (sim_create_inferior): Add ABFD argument. |
399 | (sim_load): Move setting of PC from here. | |
400 | (sim_create_inferior): To here. | |
7230ff0f | 401 | |
247fccde AC |
402 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
403 | ||
404 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
405 | * config.in: Ditto. | |
406 | ||
407 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
408 | ||
409 | * interp.c (sim_open): Add ABFD argument. | |
410 | ||
60616228 NC |
411 | start-sanitize-v850e |
412 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
413 | ||
414 | * simops.c (bsh): Only set CY flag if either of the bottom | |
415 | bytes is zero. | |
416 | ||
417 | * simops.c (prepare, dispose): Lower numbered | |
418 | registers go to higher numbered address. | |
419 | ||
420 | * simops.c (unsigned divide instructions): S bit set if result has | |
421 | top bit set. | |
422 | ||
423 | start-sanitize-v850eq | |
424 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered | |
425 | registers go to higher numbered address. | |
426 | end-sanitize-v850eq | |
427 | end-sanitize-v850e | |
428 | ||
70caad98 NC |
429 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> |
430 | ||
431 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
432 | interpretation of SR bit in list18 structure. | |
64ad9cec NC |
433 | start-sanitize-v850eq |
434 | (divn, divun): New functions to perform N step divide functions. | |
435 | end-sanitize-v850eq | |
70caad98 NC |
436 | |
437 | start-sanitize-v850eq | |
438 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
439 | ||
440 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
441 | with US bit set in the PSW. | |
3e906c08 | 442 | end-sanitize-v850eq |
70caad98 | 443 | |
a0a6db4b NC |
444 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> |
445 | ||
446 | * interp.c (sim_resume): Opcode functions return amount to be | |
447 | added to PC and all opcodes take a standard format in the OP[] | |
448 | array. | |
449 | ||
450 | (do_format_*): Functions removed. | |
451 | ||
452 | * v850_sim.h (SP, EP): New register mnemonics. | |
453 | ||
454 | * gencode.c (write_header): Functions prototypes return an | |
455 | integer. | |
456 | ||
457 | * simops.c: Opcode functions return amount to be added to PC. | |
458 | ||
459 | start-sanitize-v850e | |
460 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. | |
461 | ||
462 | * simops.c: Add support for v850e instructions. | |
463 | ||
a0a6db4b NC |
464 | end-sanitize-v850e |
465 | ||
466 | start-sanitize-v850eq | |
a0a6db4b NC |
467 | * simops.c: Add support for v850eq instructions. |
468 | end-sanitize-v850eq | |
469 | ||
470 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
471 | ||
472 | * interp.c (sim_open): Add callback argument. | |
473 | (sim_set_callbacks): Delete SIM_DESC argument. | |
474 | ||
475 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
476 | ||
477 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
478 | ||
29860858 DE |
479 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> |
480 | ||
481 | * interp.c (prog_bfd_was_opened_p): New static local. | |
482 | (prog_bfd): New global variable. | |
483 | (sim_open): Undo patch to add -E support. | |
484 | (sim_close): Close prog_bfd if sim_load opened it. | |
485 | (sim_load): Record bfd of loaded file in prog_bfd. | |
486 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
487 | ||
8517f62b AC |
488 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> |
489 | ||
490 | * interp.c (sim_stop): Stub function. | |
491 | ||
1ad886c9 DE |
492 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> |
493 | ||
494 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
495 | * interp.c (sim_kind, myname): New static locals. | |
496 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
497 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
498 | load file into simulator. Set start address from bfd. | |
499 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
500 | ||
87e43259 AC |
501 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> |
502 | ||
503 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
504 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
505 | ||
506 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
507 | ||
508 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
509 | * config.in: Ditto. | |
510 | ||
fbda74b1 DE |
511 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
512 | ||
8a7c3105 DE |
513 | * interp.c (sim_open): New arg `kind'. |
514 | ||
fbda74b1 DE |
515 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
516 | ||
a35e91c3 AC |
517 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
518 | ||
519 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
520 | ||
521 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
522 | ||
523 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
524 | ||
a77aa7ec AC |
525 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
526 | ||
527 | * configure: Re-generate. | |
528 | ||
601fb8ae MM |
529 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
530 | ||
531 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
532 | ||
0b0cc453 DE |
533 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> |
534 | ||
535 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
536 | in argv form. | |
537 | (other sim_*): New SIM_DESC argument. | |
538 | ||
539 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
540 | ||
541 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
542 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
543 | * configure.in: sinclude ../common/aclocal.m4. | |
544 | * configure: Regenerated. | |
545 | ||
295dbbe4 SG |
546 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
547 | ||
548 | * configure configure.in Makefile.in: Update to new configure | |
549 | scheme which is more compatible with WinGDB builds. | |
550 | * configure.in: Improve comment on how to run autoconf. | |
551 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
552 | * Makefile.in: Use autoconf substitution to install common | |
553 | makefile fragment. | |
554 | ||
5a8023e5 MM |
555 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> |
556 | ||
557 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
558 | not zero extend. | |
559 | ||
560 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
561 | ||
562 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
563 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
564 | SYS_gettimeofday and SYS_utime from MSVC. | |
565 | ||
6ec96a02 MM |
566 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
567 | ||
568 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
569 | via: 0xdead0000 | signal and turn it back into a signal. | |
570 | ||
ee3f2d4f MM |
571 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
572 | ||
573 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
574 | ||
575 | * interp.c (sim_open): Cast calloc function. | |
576 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
577 | program exited with the appropriate exit code. | |
578 | (sim_set_interrupt): Declare buildargv. | |
579 | ||
580 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
581 | type correct and work on big endian systems. | |
582 | ||
583 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
584 | ||
585 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
586 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
587 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
588 | Call AC_CHECK_HEADERS(unistd.h). | |
589 | * configure: Regenerated. | |
590 | * config.in: New file. | |
591 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
592 | ||
593 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
594 | ||
595 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
596 | (EIPC, etc): New macros for system registers. | |
597 | * simops.c, interp.c: Use everywhere. | |
598 | ||
599 | * interp.c: Add support for interrupts issued by interrupt | |
600 | generators, either PC- or time-based. Controlled by simulator | |
601 | command "sim interrupt". | |
602 | ||
603 | * interp.c: Add support for variable-size allocation of memory, | |
604 | via simulator command "sim memory-map". | |
605 | (map): Issue SIGSEGV for references to invalid memory regions. | |
606 | ||
7fc45edb GRK |
607 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> |
608 | ||
609 | * simops.c: Include <sys/time.h> for struct timeval and | |
610 | struct timezone. | |
611 | ||
6803f89b JL |
612 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) |
613 | ||
8824fb45 JL |
614 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. |
615 | ||
6803f89b JL |
616 | * simops.c (OP_10007E0): Handle SYS_time. |
617 | ||
c500c074 JL |
618 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) |
619 | ||
620 | * simops.c: Include <sys/stat.h>. | |
621 | (OP_10007E0): Handle SYS_stat. | |
622 | ||
0a89af6e JL |
623 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) |
624 | ||
c500c074 JL |
625 | * simops.c (OP_10007E0): Don't declare errno. |
626 | ||
f0099789 JL |
627 | * simops.c (OP_500): Mask off low bit in displacement |
628 | for sld.w. | |
629 | (OP_501): Similarly. | |
630 | ||
85c09b05 JL |
631 | * simops.c (OP_500): Fix displacement handling for sld.w. |
632 | (OP_501): Similarly for sst.w. | |
633 | ||
0a89af6e JL |
634 | * simops.c (trace_input): Remove all references to SEXT7. |
635 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
636 | is zero extended for sst/sld instructions. | |
637 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
638 | was incorrect anyway). | |
639 | ||
96851909 SG |
640 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) |
641 | ||
642 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
643 | autoconf. | |
644 | * gencode.c (write_opcodes): Pad operands field to account for | |
645 | MSVC braindamage. | |
646 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
647 | doesn't support it. (Why is this here in the first place?!?) | |
648 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
649 | Change number of operands in struct simops from 9 to 6. Define | |
650 | SIGTRAP and SIGQUIT for MSVC. | |
651 | ||
254ef340 SG |
652 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) |
653 | ||
654 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
655 | * (map): Add support for external mem in the 1->2 meg range. | |
656 | Also, abort() when memory access is way out of bounds. (Better to | |
657 | die than to give wrong result. (This will be fixed later.)) | |
658 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
659 | ||
660 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
661 | ||
662 | * simops.c (trace_input): Swapped order of operands for output | |
663 | output of OP_IMM_REG. Changed the fetching of the operands for | |
664 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
665 | ||
666 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
667 | ||
668 | * interp.c: Move includes of remote-sim.h and callback.h to | |
669 | v850-sim.h. | |
670 | * (lookup_hash): Add PC to report of hash failure. | |
671 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
672 | memory system. | |
673 | * (sim_write sim_read): Use new memory subsystem. | |
674 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
675 | to make user-defined traps work right. | |
676 | * simops.c (OP_*): Use new memory subsystem. | |
677 | * (OP_14007E0 (reti)): Implement reti. | |
678 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
679 | trap 31. Use new memory subsystem. | |
680 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
681 | load_mem in RLW macro. | |
682 | ||
88777ce2 SG |
683 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) |
684 | ||
685 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
686 | and patterns. | |
687 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
688 | register. | |
689 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
690 | with reading and writing registers. | |
691 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
692 | ||
da86a4fa JL |
693 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) |
694 | ||
695 | * simops.c (trace_input): Fix thinko. | |
696 | ||
697 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
698 | ||
699 | * simops.c (exec_bfd): Rename from sim_bfd. | |
700 | (trace_input): Ditto. | |
701 | ||
1d00ce83 MM |
702 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
703 | ||
704 | * simops.c (trace_input): Use find_nearest_line to print line | |
705 | number, function name or file name of PC. | |
706 | ||
ead4a3f1 MM |
707 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> |
708 | ||
709 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
710 | doing hardwired shifts. | |
711 | ||
712 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
713 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
714 | tracing. | |
715 | * configure: Regenerate. | |
716 | ||
717 | * Makefile.in: Don't require a VPATH capable make if configuring | |
718 | in the same directory. Don't use CFLAGS for configuration flags. | |
719 | Add flags from --enable-sim-cflags. Support canadian cross | |
720 | builds. Rebuild whole simulator if include files change. | |
721 | ||
722 | * interp.c (v850_debug): New global for debugging. | |
723 | (lookup_hash,sim_size,sim_set_profile): Use | |
724 | printf_filtered callback, instead of calling printf directly. | |
725 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
726 | ||
727 | * v850_sim.h: Use limits.h to set the various sized types. | |
728 | (SEXT{5,7,16,22}): New macros. | |
729 | ||
9909e232 JL |
730 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) |
731 | ||
732 | * interp.c (hash): Make this an inline function | |
733 | when compiling with GCC. Simplify. | |
734 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
735 | some #if 0'd code. Enable more emulated syscalls. | |
736 | ||
737 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
738 | ||
739 | * interp.c: Fix sign bit handling for add and sub instructions. | |
740 | ||
d81352b8 JL |
741 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) |
742 | ||
9fca2fd3 JL |
743 | * gencode.c: Fix various indention & style problems. |
744 | Remove test code. Remove #if 0 code. | |
745 | * interp.c: Provide prototypes for all static functions. | |
746 | Fix minor indention problems. | |
747 | (sim_open, sim_resume): Remove unused variables. | |
748 | (sim_read): Return type is "int". | |
749 | * simops.c: Remove unused variables. | |
750 | (divh): Make result of divide-by-zero zero. | |
751 | (setf): Initialize result to keep compiler quiet. | |
752 | (sar instructions): These just clear the overflow bit. | |
753 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
754 | and put_word. | |
755 | ||
d81352b8 JL |
756 | * interp.c: OP should be an array of 32bit operands! |
757 | (v850_callback): Declare. | |
758 | (do_format_5): Fix extraction of OP[0]. | |
759 | (sim_size): Remove debugging printf. | |
760 | (sim_set_callbacks): Do something useful. | |
761 | (sim_stop_reason): Gross hacks to get c-torture running. | |
762 | * simops.c: Simplify code for computing targets of bCC | |
763 | insns. Invert 's' bit if 'ov' bit is set for some | |
764 | instructions. Fix 'cy' bit handling for numerous | |
765 | instructions. Make the simulator stop when a halt | |
766 | instruction is encountered. Very crude support for | |
767 | emulated syscalls (trap 0). | |
768 | * v850_sim.h: Include "callback.h" and declare | |
769 | v850_callback. Items in the operand array are 32bits. | |
770 | ||
771 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
772 | ||
773 | * interp.c (sim_resume): Fix code to check for a format 3 | |
774 | opcode. | |
775 | * simops.c: bCC insns only argument is a constant, not a | |
776 | register value (duh...) | |
777 | ||
83fc3bac JL |
778 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) |
779 | ||
787d66bb JL |
780 | * simops.c: Fix "not1" and "set1". |
781 | ||
3046d879 JL |
782 | * simops.c: Don't forget to initialize temp for |
783 | "ld.h" and "ld.w" | |
784 | ||
ba853302 JL |
785 | * interp.c: Remove various debugging printfs. |
786 | ||
0e4ccc58 JL |
787 | * simops.c: Fix satadd, satsub boundary case handling. |
788 | ||
83fc3bac JL |
789 | * interp.c (hash): Fix. |
790 | * interp.c (do_format_8): Get operands correctly and | |
791 | call the target function. | |
792 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
793 | ||
1fe983dc JL |
794 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) |
795 | ||
3cb6bf78 JL |
796 | * interp.c (do_format_4): Get operands correctly and |
797 | call the target function. | |
798 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
799 | "sst.h", and "sst.w". | |
800 | ||
28647e4c JL |
801 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change |
802 | accordingly. Remove many unused definitions. | |
803 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
804 | accordingly. | |
805 | (get_longlong, get_longword, get_word): Deleted. | |
806 | (write_longlong, write_longword, write_word): Deleted. | |
807 | (get_operands): Deleted. | |
808 | (get_byte, get_half, get_word): New functions. | |
809 | (put_byte, put_half, put_word): New functions. | |
810 | * simops.c: Remove unused functions. Rough cut at | |
811 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
812 | ||
614f1c68 JL |
813 | * v850_sim.h (struct _state): Remove "psw" field. Add |
814 | "sregs" field. | |
815 | (PSW): Remove bogus definition. | |
816 | * simops.c: Change condition code handling to use the psw | |
817 | register within the sregs array. Handle "ldsr" and "stsr". | |
818 | ||
dca41ba7 JL |
819 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". |
820 | ||
e9b6cbac JL |
821 | * interp.c (do_format_5): Get operands correctly and |
822 | call the target function. | |
823 | (sim_resume): Don't do a PC update for format 5 instructions. | |
824 | * simops.c: Handle "jarl" and "jmp" instructions. | |
825 | ||
3095b8df JL |
826 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" |
827 | "di", and "ei" instructions correctly. | |
828 | ||
2108e864 JL |
829 | * interp.c (do_format_3): Get operands correctly and call |
830 | the target function. | |
831 | * simops.c: Handle bCC instructions. | |
832 | ||
35404c7d JL |
833 | * simops.c: Add condition code handling to shift insns. |
834 | Fix minor typos in condition code handling for other insns. | |
835 | ||
aabce0f4 JL |
836 | * Makefile.in: Fix typo. |
837 | * simops.c: Add condition code handling to "sub" "subr" and | |
838 | "divh" instructions. | |
839 | ||
0ef0eba5 JL |
840 | * interp.c (hash): Update to be more accurate. |
841 | (lookup_hash): Call hash rather than computing the hash | |
842 | code here. | |
843 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
844 | Get operands correctly and call the target function. | |
845 | (do_format_6): Get operands correctly and call the target | |
846 | function. | |
847 | (do_formats_9_10): Rough cut so shift ops will work. | |
848 | (sim_resume): Tweak to deal with format 1 and format 2 | |
849 | handling in a single funtion. Don't update the PC | |
850 | for format 3 insns. Fix typos. | |
851 | * simops.c: Slightly reorganize. Add condition code handling | |
852 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
853 | and "not" instructions. | |
854 | * v850_sim.h (reg_t): Registers are 32bits. | |
855 | (_state): The V850 has 32 general registers. Add a 32bit | |
856 | psw and pc register too. Add accessor macros | |
857 | ||
858 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
859 | changes from the d10v simulator. | |
860 | ||
77553374 JL |
861 | * simops.c: Add shift support. |
862 | ||
e98e3b2c JL |
863 | * simops.c: Add multiply & divide support. Abort for system |
864 | instructions. | |
865 | ||
1fe983dc JL |
866 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub |
867 | and subr. No condition codes yet. | |
868 | ||
22c1c7dd JL |
869 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) |
870 | ||
871 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, | |
872 | gencode.c, interp.c, simops.c: Created. | |
873 |