Add support for --enable-sim-alignment to simulator common aclocal.m4
[deliverable/binutils-gdb.git] / sim / v850 / ChangeLog
CommitLineData
b45caf05
AC
1Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * configure.in: Specify NONSTRICT_ALIGNMENT as the default.
4 * configure: Regenerated to track ../common/aclocal.m4 changes.
5
60fe0e06
AC
6Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
7
a276b6f0
AC
8 * v850.igen (disp16): Use EXTEND16 to sign extend disp.
9 (disp22): Only shift left by 1, not 2.
10 ("jmp"): Ensure PC is 2 byte aligned.
11
12 * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to
13 v850.igen. Fix tracing.
14
15 * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h",
16 "sld.w" insns to v850.igen. Fix tracing.
17start-sanitize-v850eq
18 (OP_70): Ditto for "sld.hu".
19end-sanitize-v850eq
20
21 * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al.
22
23end-sanitize-v850eq
60fe0e06 24 * simops.c (condition_met): Make global.
bd4c35cc 25
a276b6f0
AC
26 * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD,
27 TRACE_ST): Define.
28start-sanitize-v850eq
29 (TRACE_LD_NAME): Define.
30end-sanitize-v850eq
60fe0e06
AC
31
32start-sanitize-v850e
bd4c35cc 33 * simops.c: Move "cmov", "cmov imm" to v850.igen, fix.
60fe0e06
AC
34
35end-sanitize-v850e
a72f8fb4
AC
36Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
37
38 * simops.c: Move "mov", "reti", to v850.igen, fix tracing.
39
40 * interp.c (hash): Delete.
41
42 * v850.igen (nop): Really do nothing.
43
44 * interp.c (do_interrupt): Mask interrupts after PSW is saved, not
45 before.
46 * v850.igen (reti): Return to current PC not previous.
47
6aead89a
AC
48start-sanitize-v850e
49Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
50
51 * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing.
52 (trace_module): Global, save component/module name across insn.
53
54 * simops.c: Move "bsh" to v850.igen, fix.
55
56 * v850.igen (callt): Load correct number of bytes. Fix tracing.
57 (stsr, ldsr): Correct src, dest fields. Fix tracing.
58 (ctret): Force alignment. Fix tracing.
59
60end-sanitize-v850e
fb1fd475
AC
61Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
62
63 * simops.c (trace_output): Add result argument.
64 (trace_result): New function. Simpler version of trace_output,
65 assumes trace needed.
66 (trace_output): Call trace_result.
67 (trace_output): For IMM_REG_REG, trace correct register.
68 (trace_input): Add case for 16bit immediates.
69 (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use.
70
71 * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define.
72 (trace_values, trace_name, trace_pc, trace_num_values): Make
73 global.
74 (GR, SR): Define.
75
76 v850.insn (movea, stsr): Use.
77start-sanitize-v850e
78 (sxb, sxh, zxb, zxh): Ditto.
79end-sanitize-v850e
80
81Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
82
83 * simops.c: Move "movea" from here.
84 * v850.igen: To here.
85
86 * v850.igen (simm16): Define, sign extend imm16.
87 (uimm16): Define, no sign extension.
88 (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
89
90start-sanitize-v850e
91 * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
92 "mov32" from here.
93 * v850.igen: To here.
94 (switch): Fix off by two error in NIA calc.
95
96end-sanitize-v850e
3f33acd0
AC
97Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
98
99 * simops.c (trace_pc, trace_name, trace_values, trace_num_values):
100 New static globals.
101 (trace_input): Just save pc, name and values for trace_output.
102 (trace_output): Write trace values to a buffer. Use
103 trace_one_insn to print trace info and buffer.
104 (SIZE_OPERANDS, SIZE_LOCATION): Delete.
105
c7db488f
AC
106Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
107
108 * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
109 can be masked out.
110
111 * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr"
112 instructions from here.
113 * v850.igen (ldsr, stsr): To here. Mask out reserved bits when
114 setting PSW.
115
116 * interp.c (sim_open): Set psw_mask if machine known.
117
721478d5
AC
118Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
119
120start-sanitize-v850e
121 * v850-dc: Add rule to diferentiate between breakpoint and divh.
122 * v850.igen (break): New instruction, breakpoint simulator.
123
124end-sanitize-v850e
125 * v850.igen (breakpoint): Enable. Change to a 32bit instruction.
126
5262de21
JW
127start-sanitize-v850e
128Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com>
129
130 * simops.c (Multiply64): Don't store into register zero.
131
3e906c08 132end-sanitize-v850e
4dda50b0
AC
133Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
134
135 * Makefile.in (semantics.o): Add dependency.
136
137 * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save,
138 do not adjust CIA/NIA.
139
658303f7
AC
140Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
141
142start-sanitize-v850eq
bda61639
AC
143 * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
144
145 * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
146 "divun", "pushml" code from here to v850.igen.
147 (divun): Make global.
148 (type3_regs): Make global
149
150 * v850.igen: Move simops.c code to here.
151
658303f7
AC
152 * interp.c (sim_create_inferior): For v850eq set US bit by
153 default.
154
155end-sanitize-v850eq
156start-sanitize-v850e
157 * interp.c (sim_open): Don't set arch, now set by
158 sim_analyze_program.
159
160end-sanitize-v850e
161 * configure: Regenerated to track ../common/aclocal.m4 changes.
162
163Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
164
165 * simops.c (op_types): Move from here.
166 sim-main.h: To here.
167
168 * sim-main.h (trace_input, trace_output), simops.c: Make global.
169
170 * simops.c (OP_60): Move "jmp" code from here.
171 * v850.igen (jmp): To here.
172
173start-sanitize-v850eq
174 * simops.c (OP_60): Move "sld.bu" code from here.
175 * v850.igen (sld.bu): To here.
176
177end-sanitize-v850eq
410230cf
AC
178Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
179
180start-sanitize-v850eq
181 * v850.igen (prepare, ...): Add to v850eq architecture.
182
183end-sanitize-v850eq
184start-sanitize-v850e
185 * interp.c (sim_open): Default to v850eq.
186
187end-sanitize-v850e
188start-sanitize-v850eq
189
190 * interp.c (sim_open): Default to v850e.
191end-sanitize-v850eq
192 * sim-main.h (signal.h): Include.
193
194 * v850.igen (illegal): Report/halt illegal instructions.
195
196 * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS.
197
198 * configure.in: Add reserved bits option.
199 * configure: Regenerate.
200
cad7297e
AC
201Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
202
93e7a1b5
AC
203 * interp.c (sim_open): Use sim_do_commandf instead of asprintf.
204
205 * sim-main.h (INSN_NAME):
206
207 * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
208 (SIM_EXTRA_DEPS): Add itable.h
209 (tmp-gencode): Does not depend on simops.h
210
211 * sim-main.h (itable.h): Include.
212 (MAX_INSNS, INSN_NAME): Define.
213
cad7297e
AC
214 * interp.c: Compute inttype from the interrupt_names index that
215 was passed in.
216
02508bb1
AC
217Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
218
219 * simops.c (trace_input): Use trace_printf instead of
220 sim_io_printf.
221 (trace_output): Ditto.
222 (trace_input): Only trace when TRACE_ALU_P. Delete code
223 disasembling instruction.
224 (trace_output): Only trace when TRACE_ALU_P.
225
5d37a07b
AC
226Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
227
228 * simops.c (trace_input, trace_output): Use sim_io_printf.
229 (OP_620): Pass correct argument to trace.
230 (OP_E607E0): Ditto.
231 (trace_input): Obtain prog_bfd, text_start et.al from simulator
232 struct.
233
234Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
235
236 * v850.igen: New file.
237 * v850-dc: New file.
238
239Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
240
241
242 * sim-main.h (SEXT16): Delete, use EXTEND16.
243 (SEXT8): Delete, use EXTEND8.
244 (SEXT32): Delete, used?
245 (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL.
246 (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian.
247
248 * simops.c: Use EXTEND15 from sim-bits instead of SEXT16.
249
250 * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete,
251 replace with TRACE_INSN_P and TRACE_ALU_P.
252
253 * simops.c (trace_input, trace_output): Update.
254
255 * interp.c (sim_engine_run): Delete.
256 (lookup_hash): Delete.
257 (sim_open): Do not fill hash table.
258 (sim_trace): Delete.
259
260Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
261
262 * simops.c (OP_FFFF): Use sim_engine_halt.
263 (OP_12007E0): Ditto.
264 (OP_10007E0): Ditto.
265
266 * sim-main.h (struct sim_cpu): Delete member exception. Using
267 sim-engine et.al.
268
269 * interp.c (sim_info): Do not do anything in sim-info.
270 (sim_stop): Delete, replace with sim-stop.
271 (sim_stop_reason): Delete, replace with sim-reason.
272
273 * sim-main.h (WITH_WATCHPOINTS): Define.
274 (WITH_MODULO_MEMORY): Define
275
276 * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop,
277 sim-reason.
278
279 * interp.c (enum interrupt_cond_type): Delete.
280 (struct interrupt_generator): Delete.
281 (enum interrupt_type): Drop int_none.
282 (sim_open): Initialize WATCHPOINT module.
283 (sim_resume, sim_run): Rename sim_resume to sim_run.
284 (sim_engine_run): Replace interrupt code with call to sim-events.
285 (sim_set_interrupt): Delete.
286 (sim_parse_number): Delete.
287
6fea4763
DE
288Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
289
290 * configure: Regenerated to track ../common/aclocal.m4 changes.
291
da3a66e5
AC
292Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
293
294 * simops.c (fetch_argv): New function, fetch a arg vector from
295 simulator memory.
296
297 * configure.in: Check for fork, execve, execv.
298 * configure: Regenerate.
299
300 * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and
301 T2H_4 for byte swapping.
302
303 * sim-main.h, interp.c (get_word, get_half, get_byte, put_word,
304 put_half, put_byte): Delete.
305
306 * Makefile.in (SIM_OBJS): Add sim-memopt.o module.
307
308 * sim-main.h (load_mem, store_mem): Redefine as macros.
309 (IMEM, IMEM_IMMED): New macros - fetch instructions.
310
311 * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open
312 transfer data via a buffer.
313 (fetch_str): New function, fetch string from memory.
314
315 * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
316
317 * interp.c (sim_open): Establish memory maps using sim-memopt.c
318 via sim_do_command.
319 (sim_do_command): Print error if memory-map command is used. Call
320 sim_args_command.
321 (map): Delete, replaced by sim-core.
322 (sim_memory_init): Delete, replaced by sim-core.
323 (sim_set_memory_map): Delete, replaced by sim-memopt.
324 (load_mem): Delete, replaced by sim-core.
325 (store_mem): Delete, replaced by sim-core.
326 (sim_write): Delete, replaced by sim-hrw.
327 (sim_read): Delete, replaced by sim-hrw.
328
329 * sim-main.h (struct sim_state): Remove memory members, using
330 sim-core.c
331
9cdd2c6d
AC
332Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
333
b5e935ae
AC
334 * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr.
335 * interp.c (map): Do not add to a void pointer.
336
337 * Makefile.in (INCLUDE): Add sim-main.h
338
339 * configure.in: Check for time.h
340 * configure: Re-generate.
341
342 * interp.c (struct interrupt_generator): Make time unsigned long,
343 address SIM_ADDR.
344 (sim_resume): Make oldpc SIM_ADDR.
345 (struct hash_entry): Make mask/opcode unsigned.
346
347 * v850_sim.h (struct simops ): Make opcode and mask unsigned.
348
9cdd2c6d
AC
349 * simops.c (utime.h): Include if available.
350 (OP_10007E0): Check for UTIME function.
351 (divun): Put parentheses around shift argument.
352 (OP_640): Put parentheses around shift argument, was wrong.
353 (OP_107F0): Return something.
354
355 * interp.c (sim_parse_number): Use strtoul not strtol.
356 (sim_resume): Use sim_elapsed_time_get to keep track of the time.
357
358 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
359 (SIM_AC_OPTION_ENDIAN): Set to hardwired big.
360 (SIM_AC_OPTION_HOST_ENDIAN): Add.
361 (AC_CHECK_FUNCS): Add utime.
362 (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h
363 configure: Regenerate.
364
365
366 * Makefile.in (SIM_RUN_OBJS): Use nrun.o.
367 (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o,
368 sim-config.o, sim-module.o, sim-events.o, sim-core.o,
369 sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o
370 (SIM_ENDIAN, SIM_WARNGINS): Define.
371
372 * simops.c (OP_10007E0): Use sim_io_* for transfers.
373
374 * interp.c (sim_resume): Pass sd around.
375
376 * simops.c (sim-main.h): Include.
377
378 * gencode.c (write_template): Generate #include sim-main.h.
379 (write_opcodes): Ditto.
380
381 * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete.
382 (v850_callback): Ditto.
383 (sim_kind, myname): Ditto.
384 (lookup_hash): Pass SD. Use sim_io_error.
385 (sim_set_memory_map): Pass in SD, use.
386 (init_system): Pass in SD, use.
387 (sim_open): Update.
388 (sim_set_profile): Delete.
389 (sim_set_profile_size): Delete.
390 (do_interrupt): Pass in SD, use.
391 (sim_info): Use sim_io_printf.
392 (sim_create_inferior): Reset registers. Set PC from prog_bfd
393 argument.
394 (sim_load): Delete, use common/sim-hload.c
395 (sim_size): Rename to sim_memory_init.
396 (sim_write): Remove call to init_system.
397 (init_system): Delete.
398 (sim_set_callbacks): Delete.
399 (sim_set_interrupt): Pass in SD, use.
400 (start_time): Delete.
401
402 * v850_sim.h: Remove everything except `struct simops' from here.
403 * sim-main.h: Move most to here.
404 * gencode.c: Move #includes to here.
405
406 * sim-main.h(struct _sim_cpu): Rename struct _state.
407 (#define PC, et.al.): Update
408 (v850_callback): Delete. Replaced with SIM_DESC arg.
409 (int8, uint8, int16, uint16, int32, uint32): Define types using
410 unsigned8 et.al from common/sim-types.h.
411 * sim-main.h (State): Define as STATE_CPU.
412
0ffba68f
AC
413Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
414
415 * configure.in: Check for time, chmod.
416 * configure: Regenerate.
417 * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD.
418
419 * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of
420 sys/syscall.h.
421 (OP_10007E0): Check the existance each SYS_* macro independantly.
422
423 * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing.
424
88117054
AC
425Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
426
427 * configure: Regenerated to track ../common/aclocal.m4 changes.
428 * config.in: Ditto.
429
7230ff0f
AC
430Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
431
432 * interp.c (sim_kill): Delete.
fafce69a
AC
433 (sim_create_inferior): Add ABFD argument.
434 (sim_load): Move setting of PC from here.
435 (sim_create_inferior): To here.
7230ff0f 436
247fccde
AC
437Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
438
439 * configure: Regenerated to track ../common/aclocal.m4 changes.
440 * config.in: Ditto.
441
442Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
443
444 * interp.c (sim_open): Add ABFD argument.
445
60616228
NC
446start-sanitize-v850e
447Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
448
449 * simops.c (bsh): Only set CY flag if either of the bottom
450 bytes is zero.
451
452 * simops.c (prepare, dispose): Lower numbered
453 registers go to higher numbered address.
454
455 * simops.c (unsigned divide instructions): S bit set if result has
456 top bit set.
457
458start-sanitize-v850eq
459 * simops.c (pushml, pushmh, popml, popmh): Lower numbered
460 registers go to higher numbered address.
461end-sanitize-v850eq
462end-sanitize-v850e
463
70caad98
NC
464Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
465
466 * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
467 interpretation of SR bit in list18 structure.
64ad9cec
NC
468start-sanitize-v850eq
469 (divn, divun): New functions to perform N step divide functions.
470end-sanitize-v850eq
70caad98
NC
471
472start-sanitize-v850eq
473Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
474
475 * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
476 with US bit set in the PSW.
3e906c08 477end-sanitize-v850eq
70caad98 478
a0a6db4b
NC
479Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
480
481 * interp.c (sim_resume): Opcode functions return amount to be
482 added to PC and all opcodes take a standard format in the OP[]
483 array.
484
485 (do_format_*): Functions removed.
486
487 * v850_sim.h (SP, EP): New register mnemonics.
488
489 * gencode.c (write_header): Functions prototypes return an
490 integer.
491
492 * simops.c: Opcode functions return amount to be added to PC.
493
494start-sanitize-v850e
495 * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
496
497 * simops.c: Add support for v850e instructions.
498
a0a6db4b
NC
499end-sanitize-v850e
500
501start-sanitize-v850eq
a0a6db4b
NC
502 * simops.c: Add support for v850eq instructions.
503end-sanitize-v850eq
504
505Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
506
507 * interp.c (sim_open): Add callback argument.
508 (sim_set_callbacks): Delete SIM_DESC argument.
509
510Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
511
512 * configure: Regenerated to track ../common/aclocal.m4 changes.
513
29860858
DE
514Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com>
515
516 * interp.c (prog_bfd_was_opened_p): New static local.
517 (prog_bfd): New global variable.
518 (sim_open): Undo patch to add -E support.
519 (sim_close): Close prog_bfd if sim_load opened it.
520 (sim_load): Record bfd of loaded file in prog_bfd.
521 * simops.c (prog_bfd): Renamed from exec_bfd.
522
8517f62b
AC
523Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
524
525 * interp.c (sim_stop): Stub function.
526
1ad886c9
DE
527Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
528
529 * Makefile.in (SIM_OBJS): Add sim-load.o.
530 * interp.c (sim_kind, myname): New static locals.
531 (sim_open): Set sim_kind, myname. Ignore -E arg.
532 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
533 load file into simulator. Set start address from bfd.
534 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
535
87e43259
AC
536Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
537
538 * simops.c (OP_10007E0): Only provide system calls SYS_execv,
539 SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
540
541Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
542
543 * configure: Regenerated to track ../common/aclocal.m4 changes.
544 * config.in: Ditto.
545
fbda74b1
DE
546Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
547
8a7c3105
DE
548 * interp.c (sim_open): New arg `kind'.
549
fbda74b1
DE
550 * configure: Regenerated to track ../common/aclocal.m4 changes.
551
a35e91c3
AC
552Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
553
554 * configure: Regenerated to track ../common/aclocal.m4 changes.
555
556Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
557
558 * configure: Regenerated to track ../common/aclocal.m4 changes.
559
a77aa7ec
AC
560Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
561
562 * configure: Re-generate.
563
601fb8ae
MM
564Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
565
566 * configure: Regenerate to track ../common/aclocal.m4 changes.
567
0b0cc453
DE
568Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com>
569
570 * interp.c (sim_open): New SIM_DESC result. Argument is now
571 in argv form.
572 (other sim_*): New SIM_DESC argument.
573
574Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
575
576 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
577 COMMON_{PRE,POST}_CONFIG_FRAG instead.
578 * configure.in: sinclude ../common/aclocal.m4.
579 * configure: Regenerated.
580
295dbbe4
SG
581Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
582
583 * configure configure.in Makefile.in: Update to new configure
584 scheme which is more compatible with WinGDB builds.
585 * configure.in: Improve comment on how to run autoconf.
586 * configure: Re-run autoconf to get new ../common/aclocal.m4.
587 * Makefile.in: Use autoconf substitution to install common
588 makefile fragment.
589
5a8023e5
MM
590Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com>
591
592 * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
593 not zero extend.
594
595Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com)
596
597 * simops.c: Put ifdefs around things to make MSVC happy. Get rid
598 of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
599 SYS_gettimeofday and SYS_utime from MSVC.
600
6ec96a02
MM
601Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
602
603 * simops.c (OP_10007E0): Know that kill encodes the signal number
604 via: 0xdead0000 | signal and turn it back into a signal.
605
ee3f2d4f
MM
606Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
607
608 * v850_sim.h (SIG_V850_EXIT): Define as -1.
609
610 * interp.c (sim_open): Cast calloc function.
611 (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
612 program exited with the appropriate exit code.
613 (sim_set_interrupt): Declare buildargv.
614
615 * simops.c (OP_10007E0): Make exit signal normal exit. Make time
616 type correct and work on big endian systems.
617
618Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com>
619
620 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
621 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
622 * configure.in: Simplify using macros in ../common/aclocal.m4.
623 Call AC_CHECK_HEADERS(unistd.h).
624 * configure: Regenerated.
625 * config.in: New file.
626 * simops.c: #include "config.h". #include <unistd.h> if present.
627
628Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
629
630 * v850_sim.h (State): New slots dummy_mem, pending_nmi.
631 (EIPC, etc): New macros for system registers.
632 * simops.c, interp.c: Use everywhere.
633
634 * interp.c: Add support for interrupts issued by interrupt
635 generators, either PC- or time-based. Controlled by simulator
636 command "sim interrupt".
637
638 * interp.c: Add support for variable-size allocation of memory,
639 via simulator command "sim memory-map".
640 (map): Issue SIGSEGV for references to invalid memory regions.
641
7fc45edb
GRK
642Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
643
644 * simops.c: Include <sys/time.h> for struct timeval and
645 struct timezone.
646
6803f89b
JL
647Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
648
8824fb45
JL
649 * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
650
6803f89b
JL
651 * simops.c (OP_10007E0): Handle SYS_time.
652
c500c074
JL
653Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com)
654
655 * simops.c: Include <sys/stat.h>.
656 (OP_10007E0): Handle SYS_stat.
657
0a89af6e
JL
658Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com)
659
c500c074
JL
660 * simops.c (OP_10007E0): Don't declare errno.
661
f0099789
JL
662 * simops.c (OP_500): Mask off low bit in displacement
663 for sld.w.
664 (OP_501): Similarly.
665
85c09b05
JL
666 * simops.c (OP_500): Fix displacement handling for sld.w.
667 (OP_501): Similarly for sst.w.
668
0a89af6e
JL
669 * simops.c (trace_input): Remove all references to SEXT7.
670 (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
671 is zero extended for sst/sld instructions.
672 * v850_sim.h (SEX7): Delete. It's no longer needed (and it
673 was incorrect anyway).
674
96851909
SG
675Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com)
676
677 * Makefile.in: Get rid of srcroot. Set all INSTALL macros via
678 autoconf.
679 * gencode.c (write_opcodes): Pad operands field to account for
680 MSVC braindamage.
681 * simops.c: Include errno.h. Exclude SYS_chown, since MSVC
682 doesn't support it. (Why is this here in the first place?!?)
683 * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
684 Change number of operands in struct simops from 9 to 6. Define
685 SIGTRAP and SIGQUIT for MSVC.
686
254ef340
SG
687Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
688
689 * interp.c (MEM_SIZE): It's now bytes, not a power of 2.
690 * (map): Add support for external mem in the 1->2 meg range.
691 Also, abort() when memory access is way out of bounds. (Better to
692 die than to give wrong result. (This will be fixed later.))
693 * (sim_size): MEM_SIZE is now bytes, not shift factor.
694
695Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
696
697 * simops.c (trace_input): Swapped order of operands for output
698 output of OP_IMM_REG. Changed the fetching of the operands for
699 OP_LOAD32, and OP_STORE32 to work like op-function.
700
701Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
702
703 * interp.c: Move includes of remote-sim.h and callback.h to
704 v850-sim.h.
705 * (lookup_hash): Add PC to report of hash failure.
706 * (map load_mem store_mem): New memory subsystem. Models V851
707 memory system.
708 * (sim_write sim_read): Use new memory subsystem.
709 * (sim_resume): Don't load and save PC into EIPC anymore. Needed
710 to make user-defined traps work right.
711 * simops.c (OP_*): Use new memory subsystem.
712 * (OP_14007E0 (reti)): Implement reti.
713 * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to
714 trap 31. Use new memory subsystem.
715 * v850_sim.h: Prototypes for load_mem, store_mem and map. Use
716 load_mem in RLW macro.
717
88777ce2
SG
718Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
719
720 * gencode.c (write_opcodes): Output hex values for opcode mask
721 and patterns.
722 * interp.c (sim_resume): Save and restore PC from the appropriate
723 register.
724 * (sim_fetch_register sim_store_register): Fix byte-order problem
725 with reading and writing registers.
726 * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
727
da86a4fa
JL
728Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
729
730 * simops.c (trace_input): Fix thinko.
731
732Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
733
734 * simops.c (exec_bfd): Rename from sim_bfd.
735 (trace_input): Ditto.
736
1d00ce83
MM
737Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
738
739 * simops.c (trace_input): Use find_nearest_line to print line
740 number, function name or file name of PC.
741
ead4a3f1
MM
742Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
743
744 * simops.c: Add tracing support. Use SEXTxx macros instead of
745 doing hardwired shifts.
746
747 * configure.in (--enable-sim-cflags): Add switch to add additional
748 flags to simulator buld. If --enable-sim-cflags=trace, turn on
749 tracing.
750 * configure: Regenerate.
751
752 * Makefile.in: Don't require a VPATH capable make if configuring
753 in the same directory. Don't use CFLAGS for configuration flags.
754 Add flags from --enable-sim-cflags. Support canadian cross
755 builds. Rebuild whole simulator if include files change.
756
757 * interp.c (v850_debug): New global for debugging.
758 (lookup_hash,sim_size,sim_set_profile): Use
759 printf_filtered callback, instead of calling printf directly.
760 (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
761
762 * v850_sim.h: Use limits.h to set the various sized types.
763 (SEXT{5,7,16,22}): New macros.
764
9909e232
JL
765Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com)
766
767 * interp.c (hash): Make this an inline function
768 when compiling with GCC. Simplify.
769 * simpos.c: Explicitly include "sys/syscall.h". Remove
770 some #if 0'd code. Enable more emulated syscalls.
771
772Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com)
773
774 * interp.c: Fix sign bit handling for add and sub instructions.
775
d81352b8
JL
776Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
777
9fca2fd3
JL
778 * gencode.c: Fix various indention & style problems.
779 Remove test code. Remove #if 0 code.
780 * interp.c: Provide prototypes for all static functions.
781 Fix minor indention problems.
782 (sim_open, sim_resume): Remove unused variables.
783 (sim_read): Return type is "int".
784 * simops.c: Remove unused variables.
785 (divh): Make result of divide-by-zero zero.
786 (setf): Initialize result to keep compiler quiet.
787 (sar instructions): These just clear the overflow bit.
788 * v850_sim.h: Provide prototypes for put_byte, put_half
789 and put_word.
790
d81352b8
JL
791 * interp.c: OP should be an array of 32bit operands!
792 (v850_callback): Declare.
793 (do_format_5): Fix extraction of OP[0].
794 (sim_size): Remove debugging printf.
795 (sim_set_callbacks): Do something useful.
796 (sim_stop_reason): Gross hacks to get c-torture running.
797 * simops.c: Simplify code for computing targets of bCC
798 insns. Invert 's' bit if 'ov' bit is set for some
799 instructions. Fix 'cy' bit handling for numerous
800 instructions. Make the simulator stop when a halt
801 instruction is encountered. Very crude support for
802 emulated syscalls (trap 0).
803 * v850_sim.h: Include "callback.h" and declare
804 v850_callback. Items in the operand array are 32bits.
805
806Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com)
807
808 * interp.c (sim_resume): Fix code to check for a format 3
809 opcode.
810 * simops.c: bCC insns only argument is a constant, not a
811 register value (duh...)
812
83fc3bac
JL
813Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com)
814
787d66bb
JL
815 * simops.c: Fix "not1" and "set1".
816
3046d879
JL
817 * simops.c: Don't forget to initialize temp for
818 "ld.h" and "ld.w"
819
ba853302
JL
820 * interp.c: Remove various debugging printfs.
821
0e4ccc58
JL
822 * simops.c: Fix satadd, satsub boundary case handling.
823
83fc3bac
JL
824 * interp.c (hash): Fix.
825 * interp.c (do_format_8): Get operands correctly and
826 call the target function.
827 * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
828
1fe983dc
JL
829Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
830
3cb6bf78
JL
831 * interp.c (do_format_4): Get operands correctly and
832 call the target function.
833 * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
834 "sst.h", and "sst.w".
835
28647e4c
JL
836 * v850_sim.h: The V850 doesn't have split I&D spaces. Change
837 accordingly. Remove many unused definitions.
838 * interp.c: The V850 doesn't have split I&D spaces. Change
839 accordingly.
840 (get_longlong, get_longword, get_word): Deleted.
841 (write_longlong, write_longword, write_word): Deleted.
842 (get_operands): Deleted.
843 (get_byte, get_half, get_word): New functions.
844 (put_byte, put_half, put_word): New functions.
845 * simops.c: Remove unused functions. Rough cut at
846 "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
847
614f1c68
JL
848 * v850_sim.h (struct _state): Remove "psw" field. Add
849 "sregs" field.
850 (PSW): Remove bogus definition.
851 * simops.c: Change condition code handling to use the psw
852 register within the sregs array. Handle "ldsr" and "stsr".
853
dca41ba7
JL
854 * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
855
e9b6cbac
JL
856 * interp.c (do_format_5): Get operands correctly and
857 call the target function.
858 (sim_resume): Don't do a PC update for format 5 instructions.
859 * simops.c: Handle "jarl" and "jmp" instructions.
860
3095b8df
JL
861 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
862 "di", and "ei" instructions correctly.
863
2108e864
JL
864 * interp.c (do_format_3): Get operands correctly and call
865 the target function.
866 * simops.c: Handle bCC instructions.
867
35404c7d
JL
868 * simops.c: Add condition code handling to shift insns.
869 Fix minor typos in condition code handling for other insns.
870
aabce0f4
JL
871 * Makefile.in: Fix typo.
872 * simops.c: Add condition code handling to "sub" "subr" and
873 "divh" instructions.
874
0ef0eba5
JL
875 * interp.c (hash): Update to be more accurate.
876 (lookup_hash): Call hash rather than computing the hash
877 code here.
878 (do_format_1_2): Handle format 1 and format 2 instructions.
879 Get operands correctly and call the target function.
880 (do_format_6): Get operands correctly and call the target
881 function.
882 (do_formats_9_10): Rough cut so shift ops will work.
883 (sim_resume): Tweak to deal with format 1 and format 2
884 handling in a single funtion. Don't update the PC
885 for format 3 insns. Fix typos.
886 * simops.c: Slightly reorganize. Add condition code handling
887 to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
888 and "not" instructions.
889 * v850_sim.h (reg_t): Registers are 32bits.
890 (_state): The V850 has 32 general registers. Add a 32bit
891 psw and pc register too. Add accessor macros
892
893 * Makefile.in, interp.c, v850_sim.h: Bring over endianness
894 changes from the d10v simulator.
895
77553374
JL
896 * simops.c: Add shift support.
897
e98e3b2c
JL
898 * simops.c: Add multiply & divide support. Abort for system
899 instructions.
900
1fe983dc
JL
901 * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
902 and subr. No condition codes yet.
903
22c1c7dd
JL
904Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
905
906 * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
907 gencode.c, interp.c, simops.c: Created.
908
This page took 0.089595 seconds and 4 git commands to generate.