[deliverable/linux.git] / sound / arm / pxa2xx-ac97.c

/*
 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
 *
 * Author:	Nicolas Pitre
 * Created:	Dec 02, 2004
 * Copyright:	MontaVista Software Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/wait.h>
#include <linux/clk.h>
#include <linux/delay.h>

#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/ac97_codec.h>
#include <sound/initval.h>

#include <asm/irq.h>
#include <linux/mutex.h>
#include <asm/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/audio.h>

#include "pxa2xx-pcm.h"


static DEFINE_MUTEX(car_mutex);
static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
static volatile long gsr_bits;
static struct clk *ac97_clk;
#ifdef CONFIG_PXA27x
static struct clk *ac97conf_clk;
#endif

/*
 * Beware PXA27x bugs:
 *
 *   o Slot 12 read from modem space will hang controller.
 *   o CDONE, SDONE interrupt fails after any slot 12 IO.
 *
 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
 * 1 jiffy timeout if interrupt never comes).
 */ 

static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
	unsigned short val = -1;
	volatile u32 *reg_addr;

	mutex_lock(&car_mutex);

	/* set up primary or secondary codec space */
	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	reg_addr += (reg >> 1);

	/* start read access across the ac97 link */
	GSR = GSR_CDONE | GSR_SDONE;
	gsr_bits = 0;
	val = *reg_addr;
	if (reg == AC97_GPIO_STATUS)
		goto out;
	if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
	    !((GSR | gsr_bits) & GSR_SDONE)) {
		printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
				__FUNCTION__, reg, GSR | gsr_bits);
		val = -1;
		goto out;
	}

	/* valid data now */
	GSR = GSR_CDONE | GSR_SDONE;
	gsr_bits = 0;
	val = *reg_addr;			
	/* but we've just started another cycle... */
	wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);

out:	mutex_unlock(&car_mutex);
	return val;
}

static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
{
	volatile u32 *reg_addr;

	mutex_lock(&car_mutex);

	/* set up primary or secondary codec space */
	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	reg_addr += (reg >> 1);

	GSR = GSR_CDONE | GSR_SDONE;
	gsr_bits = 0;
	*reg_addr = val;
	if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
	    !((GSR | gsr_bits) & GSR_CDONE))
		printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
				__FUNCTION__, reg, GSR | gsr_bits);

	mutex_unlock(&car_mutex);
}

static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
{
	/* First, try cold reset */
	GCR &=  GCR_COLD_RST;  /* clear everything but nCRST */
	GCR &= ~GCR_COLD_RST;  /* then assert nCRST */

	gsr_bits = 0;
#ifdef CONFIG_PXA27x
	/* PXA27x Developers Manual section 13.5.2.2.1 */
	clk_enable(ac97conf_clk);
	udelay(5);
	clk_disable(ac97conf_clk);
	GCR = GCR_COLD_RST;
	udelay(50);
#else
	GCR = GCR_COLD_RST;
	GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
	wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif

	if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
		printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
				 __FUNCTION__, gsr_bits);

		/* let's try warm reset */
		gsr_bits = 0;
#ifdef CONFIG_PXA27x
		/* warm reset broken on Bulverde,
		   so manually keep AC97 reset high */
		pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); 
		udelay(10);
		GCR |= GCR_WARM_RST;
		pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
		udelay(500);
#else
		GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
		wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
#endif			

		if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
			printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
					 __FUNCTION__, gsr_bits);
	}

	GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
	GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
}

static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
{
	long status;

	status = GSR;
	if (status) {
		GSR = status;
		gsr_bits |= status;
		wake_up(&gsr_wq);

#ifdef CONFIG_PXA27x
		/* Although we don't use those we still need to clear them
		   since they tend to spuriously trigger when MMC is used
		   (hardware bug? go figure)... */
		MISR = MISR_EOC;
		PISR = PISR_EOC;
		MCSR = MCSR_EOC;
#endif

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
	.read	= pxa2xx_ac97_read,
	.write	= pxa2xx_ac97_write,
	.reset	= pxa2xx_ac97_reset,
};

static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
	.name			= "AC97 PCM out",
	.dev_addr		= __PREG(PCDR),
	.drcmr			= &DRCMRTXPCDR,
	.dcmd			= DCMD_INCSRCADDR | DCMD_FLOWTRG |
				  DCMD_BURST32 | DCMD_WIDTH4,
};

static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
	.name			= "AC97 PCM in",
	.dev_addr		= __PREG(PCDR),
	.drcmr			= &DRCMRRXPCDR,
	.dcmd			= DCMD_INCTRGADDR | DCMD_FLOWSRC |
				  DCMD_BURST32 | DCMD_WIDTH4,
};

static struct snd_pcm *pxa2xx_ac97_pcm;
static struct snd_ac97 *pxa2xx_ac97_ac97;

static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	pxa2xx_audio_ops_t *platform_ops;
	int r;

	runtime->hw.channels_min = 2;
	runtime->hw.channels_max = 2;

	r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
	    AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
	runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
	snd_pcm_limit_hw_rates(runtime);

       	platform_ops = substream->pcm->card->dev->platform_data;
	if (platform_ops && platform_ops->startup)
		return platform_ops->startup(substream, platform_ops->priv);
	else
		return 0;
}

static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
{
	pxa2xx_audio_ops_t *platform_ops;

       	platform_ops = substream->pcm->card->dev->platform_data;
	if (platform_ops && platform_ops->shutdown)
		platform_ops->shutdown(substream, platform_ops->priv);
}

static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
{
	struct snd_pcm_runtime *runtime = substream->runtime;
	int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
		  AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
	return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
}

static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
	.playback_params	= &pxa2xx_ac97_pcm_out,
	.capture_params		= &pxa2xx_ac97_pcm_in,
	.startup		= pxa2xx_ac97_pcm_startup,
	.shutdown		= pxa2xx_ac97_pcm_shutdown,
	.prepare		= pxa2xx_ac97_pcm_prepare,
};

#ifdef CONFIG_PM

static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
{
	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;

	snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
	snd_pcm_suspend_all(pxa2xx_ac97_pcm);
	snd_ac97_suspend(pxa2xx_ac97_ac97);
	if (platform_ops && platform_ops->suspend)
		platform_ops->suspend(platform_ops->priv);
	GCR |= GCR_ACLINK_OFF;
	clk_disable(ac97_clk);

	return 0;
}

static int pxa2xx_ac97_do_resume(struct snd_card *card)
{
	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;

	clk_enable(ac97_clk);
	if (platform_ops && platform_ops->resume)
		platform_ops->resume(platform_ops->priv);
	snd_ac97_resume(pxa2xx_ac97_ac97);
	snd_power_change_state(card, SNDRV_CTL_POWER_D0);

	return 0;
}

static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
{
	struct snd_card *card = platform_get_drvdata(dev);
	int ret = 0;

	if (card)
		ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);

	return ret;
}

static int pxa2xx_ac97_resume(struct platform_device *dev)
{
	struct snd_card *card = platform_get_drvdata(dev);
	int ret = 0;

	if (card)
		ret = pxa2xx_ac97_do_resume(card);

	return ret;
}

#else
#define pxa2xx_ac97_suspend	NULL
#define pxa2xx_ac97_resume	NULL
#endif

static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
{
	struct snd_card *card;
	struct snd_ac97_bus *ac97_bus;
	struct snd_ac97_template ac97_template;
	int ret;

	ret = -ENOMEM;
	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
			    THIS_MODULE, 0);
	if (!card)
		goto err;

	card->dev = &dev->dev;
	strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));

	ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
	if (ret)
		goto err;

	ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
	if (ret < 0)
		goto err;

	pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
	pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
	pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
	pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
#ifdef CONFIG_PXA27x
	/* Use GPIO 113 as AC97 Reset on Bulverde */
	pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
	ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
	if (IS_ERR(ac97conf_clk)) {
		ret = PTR_ERR(ac97conf_clk);
		ac97conf_clk = NULL;
		goto err;
	}
#endif

	ac97_clk = clk_get(&dev->dev, "AC97CLK");
	if (IS_ERR(ac97_clk)) {
		ret = PTR_ERR(ac97_clk);
		ac97_clk = NULL;
		goto err;
	}
	clk_enable(ac97_clk);

	ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
	if (ret)
		goto err;
	memset(&ac97_template, 0, sizeof(ac97_template));
	ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
	if (ret)
		goto err;

	snprintf(card->shortname, sizeof(card->shortname),
		 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
	snprintf(card->longname, sizeof(card->longname),
		 "%s (%s)", dev->dev.driver->name, card->mixername);

	snd_card_set_dev(card, &dev->dev);
	ret = snd_card_register(card);
	if (ret == 0) {
		platform_set_drvdata(dev, card);
		return 0;
	}

 err:
	if (card)
		snd_card_free(card);
	if (ac97_clk) {
		GCR |= GCR_ACLINK_OFF;
		free_irq(IRQ_AC97, NULL);
		clk_disable(ac97_clk);
		clk_put(ac97_clk);
		ac97_clk = NULL;
	}
#ifdef CONFIG_PXA27x
	if (ac97conf_clk) {
		clk_put(ac97conf_clk);
		ac97conf_clk = NULL;
	}
#endif
	return ret;
}

static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
{
	struct snd_card *card = platform_get_drvdata(dev);

	if (card) {
		snd_card_free(card);
		platform_set_drvdata(dev, NULL);
		GCR |= GCR_ACLINK_OFF;
		free_irq(IRQ_AC97, NULL);
		clk_disable(ac97_clk);
		clk_put(ac97_clk);
		ac97_clk = NULL;
#ifdef CONFIG_PXA27x
		clk_put(ac97conf_clk);
		ac97conf_clk = NULL;
#endif
	}

	return 0;
}

static struct platform_driver pxa2xx_ac97_driver = {
	.probe		= pxa2xx_ac97_probe,
	.remove		= __devexit_p(pxa2xx_ac97_remove),
	.suspend	= pxa2xx_ac97_suspend,
	.resume		= pxa2xx_ac97_resume,
	.driver		= {
		.name	= "pxa2xx-ac97",
	},
};

static int __init pxa2xx_ac97_init(void)
{
	return platform_driver_register(&pxa2xx_ac97_driver);
}

static void __exit pxa2xx_ac97_exit(void)
{
	platform_driver_unregister(&pxa2xx_ac97_driver);
}

module_init(pxa2xx_ac97_init);
module_exit(pxa2xx_ac97_exit);

MODULE_AUTHOR("Nicolas Pitre");
MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
MODULE_LICENSE("GPL");
Commit	Line	Data
2c484df0 TI	1	/*
	2	* linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Dec 02, 2004
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/init.h>
	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
d052d1be	16	#include <linux/platform_device.h>
2c484df0 TI	17	#include <linux/interrupt.h>
2c484df0 TI	18	#include <linux/wait.h>
93873fbf	19	#include <linux/clk.h>
2c484df0 TI	20	#include <linux/delay.h>
2c484df0 TI	21
2c484df0 TI	22	#include <sound/core.h>
	23	#include <sound/pcm.h>
	24	#include <sound/ac97_codec.h>
	25	#include <sound/initval.h>
	26
	27	#include <asm/irq.h>
12aa7579	28	#include <linux/mutex.h>
2c484df0 TI	29	#include <asm/hardware.h>
	30	#include <asm/arch/pxa-regs.h>
	31	#include <asm/arch/audio.h>
	32
	33	#include "pxa2xx-pcm.h"
	34
	35
12aa7579	36	static DEFINE_MUTEX(car_mutex);
2c484df0 TI	37	static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
2c484df0 TI	38	static volatile long gsr_bits;
93873fbf MB	39	static struct clk *ac97_clk;
	40	#ifdef CONFIG_PXA27x
	41	static struct clk *ac97conf_clk;
	42	#endif
2c484df0	43
ea265c0a NP	44	/*
	45	* Beware PXA27x bugs:
	46	*
	47	* o Slot 12 read from modem space will hang controller.
	48	* o CDONE, SDONE interrupt fails after any slot 12 IO.
	49	*
	50	* We therefore have an hybrid approach for waiting on SDONE (interrupt or
	51	* 1 jiffy timeout if interrupt never comes).
	52	*/
	53
d18f8376	54	static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
2c484df0 TI	55	{
	56	unsigned short val = -1;
	57	volatile u32 *reg_addr;
	58
12aa7579	59	mutex_lock(&car_mutex);
2c484df0 TI	60
	61	/* set up primary or secondary codec space */
	62	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	63	reg_addr += (reg >> 1);
	64
	65	/* start read access across the ac97 link */
ea265c0a	66	GSR = GSR_CDONE \| GSR_SDONE;
2c484df0 TI	67	gsr_bits = 0;
	68	val = *reg_addr;
	69	if (reg == AC97_GPIO_STATUS)
	70	goto out;
ea265c0a NP	71	if (wait_event_timeout(gsr_wq, (GSR \| gsr_bits) & GSR_SDONE, 1) <= 0 &&
ea265c0a NP	72	!((GSR \| gsr_bits) & GSR_SDONE)) {
2c484df0	73	printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
ea265c0a	74	__FUNCTION__, reg, GSR \| gsr_bits);
2c484df0 TI	75	val = -1;
	76	goto out;
	77	}
	78
	79	/* valid data now */
ea265c0a	80	GSR = GSR_CDONE \| GSR_SDONE;
2c484df0 TI	81	gsr_bits = 0;
	82	val = *reg_addr;
	83	/* but we've just started another cycle... */
ea265c0a	84	wait_event_timeout(gsr_wq, (GSR \| gsr_bits) & GSR_SDONE, 1);
2c484df0	85
12aa7579	86	out: mutex_unlock(&car_mutex);
2c484df0 TI	87	return val;
	88	}
	89
d18f8376	90	static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
2c484df0 TI	91	{
	92	volatile u32 *reg_addr;
	93
12aa7579	94	mutex_lock(&car_mutex);
2c484df0	95
2c484df0 TI	96	/* set up primary or secondary codec space */
	97	reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
	98	reg_addr += (reg >> 1);
ea265c0a NP	99
ea265c0a NP	100	GSR = GSR_CDONE \| GSR_SDONE;
2c484df0 TI	101	gsr_bits = 0;
2c484df0 TI	102	*reg_addr = val;
ea265c0a NP	103	if (wait_event_timeout(gsr_wq, (GSR \| gsr_bits) & GSR_CDONE, 1) <= 0 &&
ea265c0a NP	104	!((GSR \| gsr_bits) & GSR_CDONE))
2c484df0	105	printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
ea265c0a	106	__FUNCTION__, reg, GSR \| gsr_bits);
2c484df0	107
12aa7579	108	mutex_unlock(&car_mutex);
2c484df0 TI	109	}
2c484df0 TI	110
d18f8376	111	static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
2c484df0 TI	112	{
	113	/* First, try cold reset */
	114	GCR &= GCR_COLD_RST; /* clear everything but nCRST */
	115	GCR &= ~GCR_COLD_RST; /* then assert nCRST */
	116
	117	gsr_bits = 0;
	118	#ifdef CONFIG_PXA27x
	119	/* PXA27x Developers Manual section 13.5.2.2.1 */
93873fbf	120	clk_enable(ac97conf_clk);
2c484df0	121	udelay(5);
93873fbf	122	clk_disable(ac97conf_clk);
2c484df0 TI	123	GCR = GCR_COLD_RST;
	124	udelay(50);
	125	#else
	126	GCR = GCR_COLD_RST;
	127	GCR \|= GCR_CDONE_IE\|GCR_SDONE_IE;
	128	wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR \| GSR_SCR), 1);
	129	#endif
	130
	131	if (!((GSR \| gsr_bits) & (GSR_PCR \| GSR_SCR))) {
	132	printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
	133	__FUNCTION__, gsr_bits);
	134
	135	/* let's try warm reset */
	136	gsr_bits = 0;
	137	#ifdef CONFIG_PXA27x
	138	/* warm reset broken on Bulverde,
	139	so manually keep AC97 reset high */
	140	pxa_gpio_mode(113 \| GPIO_OUT \| GPIO_DFLT_HIGH);
	141	udelay(10);
	142	GCR \|= GCR_WARM_RST;
	143	pxa_gpio_mode(113 \| GPIO_ALT_FN_2_OUT);
4a677ac5	144	udelay(500);
2c484df0	145	#else
4a677ac5	146	GCR \|= GCR_WARM_RST\|GCR_PRIRDY_IEN\|GCR_SECRDY_IEN;
2c484df0 TI	147	wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR \| GSR_SCR), 1);
	148	#endif
	149
	150	if (!((GSR \| gsr_bits) & (GSR_PCR \| GSR_SCR)))
	151	printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
	152	__FUNCTION__, gsr_bits);
	153	}
	154
	155	GCR &= ~(GCR_PRIRDY_IEN\|GCR_SECRDY_IEN);
	156	GCR \|= GCR_SDONE_IE\|GCR_CDONE_IE;
	157	}
	158
7d12e780	159	static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
2c484df0 TI	160	{
	161	long status;
	162
	163	status = GSR;
	164	if (status) {
	165	GSR = status;
	166	gsr_bits \|= status;
	167	wake_up(&gsr_wq);
	168
	169	#ifdef CONFIG_PXA27x
	170	/* Although we don't use those we still need to clear them
	171	since they tend to spuriously trigger when MMC is used
	172	(hardware bug? go figure)... */
	173	MISR = MISR_EOC;
	174	PISR = PISR_EOC;
	175	MCSR = MCSR_EOC;
	176	#endif
	177
	178	return IRQ_HANDLED;
	179	}
	180
	181	return IRQ_NONE;
	182	}
	183
d18f8376	184	static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
2c484df0 TI	185	.read = pxa2xx_ac97_read,
	186	.write = pxa2xx_ac97_write,
	187	.reset = pxa2xx_ac97_reset,
	188	};
	189
d18f8376	190	static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
2c484df0 TI	191	.name = "AC97 PCM out",
	192	.dev_addr = __PREG(PCDR),
	193	.drcmr = &DRCMRTXPCDR,
	194	.dcmd = DCMD_INCSRCADDR \| DCMD_FLOWTRG \|
	195	DCMD_BURST32 \| DCMD_WIDTH4,
	196	};
	197
d18f8376	198	static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
2c484df0 TI	199	.name = "AC97 PCM in",
	200	.dev_addr = __PREG(PCDR),
	201	.drcmr = &DRCMRRXPCDR,
	202	.dcmd = DCMD_INCTRGADDR \| DCMD_FLOWSRC \|
	203	DCMD_BURST32 \| DCMD_WIDTH4,
	204	};
	205
d18f8376 TI	206	static struct snd_pcm *pxa2xx_ac97_pcm;
d18f8376 TI	207	static struct snd_ac97 *pxa2xx_ac97_ac97;
2c484df0	208
d18f8376	209	static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
2c484df0	210	{
d18f8376	211	struct snd_pcm_runtime *runtime = substream->runtime;
2c484df0 TI	212	pxa2xx_audio_ops_t *platform_ops;
	213	int r;
	214
	215	runtime->hw.channels_min = 2;
	216	runtime->hw.channels_max = 2;
	217
	218	r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
	219	AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
	220	runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
	221	snd_pcm_limit_hw_rates(runtime);
	222
	223	platform_ops = substream->pcm->card->dev->platform_data;
	224	if (platform_ops && platform_ops->startup)
	225	return platform_ops->startup(substream, platform_ops->priv);
	226	else
	227	return 0;
	228	}
	229
d18f8376	230	static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
2c484df0 TI	231	{
	232	pxa2xx_audio_ops_t *platform_ops;
	233
	234	platform_ops = substream->pcm->card->dev->platform_data;
	235	if (platform_ops && platform_ops->shutdown)
	236	platform_ops->shutdown(substream, platform_ops->priv);
	237	}
	238
d18f8376	239	static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
2c484df0	240	{
d18f8376	241	struct snd_pcm_runtime *runtime = substream->runtime;
2c484df0 TI	242	int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
	243	AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
	244	return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
	245	}
	246
d18f8376	247	static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
2c484df0 TI	248	.playback_params = &pxa2xx_ac97_pcm_out,
	249	.capture_params = &pxa2xx_ac97_pcm_in,
	250	.startup = pxa2xx_ac97_pcm_startup,
	251	.shutdown = pxa2xx_ac97_pcm_shutdown,
	252	.prepare = pxa2xx_ac97_pcm_prepare,
	253	};
	254
	255	#ifdef CONFIG_PM
	256
d18f8376	257	static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
2c484df0	258	{
792a6c51 TI	259	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
	260
	261	snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
	262	snd_pcm_suspend_all(pxa2xx_ac97_pcm);
	263	snd_ac97_suspend(pxa2xx_ac97_ac97);
	264	if (platform_ops && platform_ops->suspend)
	265	platform_ops->suspend(platform_ops->priv);
	266	GCR \|= GCR_ACLINK_OFF;
93873fbf	267	clk_disable(ac97_clk);
2c484df0 TI	268
	269	return 0;
	270	}
	271
d18f8376	272	static int pxa2xx_ac97_do_resume(struct snd_card *card)
2c484df0	273	{
792a6c51 TI	274	pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
792a6c51 TI	275
93873fbf	276	clk_enable(ac97_clk);
792a6c51 TI	277	if (platform_ops && platform_ops->resume)
	278	platform_ops->resume(platform_ops->priv);
	279	snd_ac97_resume(pxa2xx_ac97_ac97);
	280	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2c484df0 TI	281
	282	return 0;
	283	}
	284
3ae5eaec	285	static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
2c484df0	286	{
d18f8376	287	struct snd_card *card = platform_get_drvdata(dev);
2c484df0 TI	288	int ret = 0;
2c484df0 TI	289
9480e307	290	if (card)
a55bfdc5	291	ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
2c484df0 TI	292
	293	return ret;
	294	}
	295
3ae5eaec	296	static int pxa2xx_ac97_resume(struct platform_device *dev)
2c484df0	297	{
d18f8376	298	struct snd_card *card = platform_get_drvdata(dev);
2c484df0 TI	299	int ret = 0;
2c484df0 TI	300
9480e307	301	if (card)
a55bfdc5	302	ret = pxa2xx_ac97_do_resume(card);
2c484df0 TI	303
	304	return ret;
	305	}
	306
	307	#else
	308	#define pxa2xx_ac97_suspend NULL
	309	#define pxa2xx_ac97_resume NULL
	310	#endif
	311
788c6043	312	static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
2c484df0	313	{
d18f8376 TI	314	struct snd_card *card;
	315	struct snd_ac97_bus *ac97_bus;
	316	struct snd_ac97_template ac97_template;
2c484df0 TI	317	int ret;
	318
	319	ret = -ENOMEM;
	320	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
	321	THIS_MODULE, 0);
	322	if (!card)
	323	goto err;
	324
3ae5eaec RK	325	card->dev = &dev->dev;
3ae5eaec RK	326	strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
2c484df0 TI	327
	328	ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
	329	if (ret)
	330	goto err;
	331
	332	ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
	333	if (ret < 0)
	334	goto err;
	335
	336	pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
	337	pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
	338	pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
	339	pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
	340	#ifdef CONFIG_PXA27x
	341	/* Use GPIO 113 as AC97 Reset on Bulverde */
	342	pxa_gpio_mode(113 \| GPIO_ALT_FN_2_OUT);
93873fbf MB	343	ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
	344	if (IS_ERR(ac97conf_clk)) {
	345	ret = PTR_ERR(ac97conf_clk);
	346	ac97conf_clk = NULL;
	347	goto err;
	348	}
2c484df0	349	#endif
93873fbf MB	350
	351	ac97_clk = clk_get(&dev->dev, "AC97CLK");
	352	if (IS_ERR(ac97_clk)) {
	353	ret = PTR_ERR(ac97_clk);
	354	ac97_clk = NULL;
	355	goto err;
	356	}
	357	clk_enable(ac97_clk);
2c484df0 TI	358
	359	ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
	360	if (ret)
	361	goto err;
	362	memset(&ac97_template, 0, sizeof(ac97_template));
	363	ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
	364	if (ret)
	365	goto err;
	366
	367	snprintf(card->shortname, sizeof(card->shortname),
	368	"%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
	369	snprintf(card->longname, sizeof(card->longname),
3ae5eaec	370	"%s (%s)", dev->dev.driver->name, card->mixername);
2c484df0	371
f78dfac9	372	snd_card_set_dev(card, &dev->dev);
2c484df0 TI	373	ret = snd_card_register(card);
2c484df0 TI	374	if (ret == 0) {
3ae5eaec	375	platform_set_drvdata(dev, card);
2c484df0 TI	376	return 0;
	377	}
	378
	379	err:
	380	if (card)
	381	snd_card_free(card);
93873fbf	382	if (ac97_clk) {
2c484df0 TI	383	GCR \|= GCR_ACLINK_OFF;
2c484df0 TI	384	free_irq(IRQ_AC97, NULL);
93873fbf MB	385	clk_disable(ac97_clk);
	386	clk_put(ac97_clk);
	387	ac97_clk = NULL;
	388	}
	389	#ifdef CONFIG_PXA27x
	390	if (ac97conf_clk) {
	391	clk_put(ac97conf_clk);
	392	ac97conf_clk = NULL;
2c484df0	393	}
93873fbf	394	#endif
2c484df0 TI	395	return ret;
	396	}
	397
788c6043	398	static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
2c484df0	399	{
d18f8376	400	struct snd_card *card = platform_get_drvdata(dev);
2c484df0 TI	401
	402	if (card) {
	403	snd_card_free(card);
3ae5eaec	404	platform_set_drvdata(dev, NULL);
2c484df0 TI	405	GCR \|= GCR_ACLINK_OFF;
2c484df0 TI	406	free_irq(IRQ_AC97, NULL);
93873fbf MB	407	clk_disable(ac97_clk);
	408	clk_put(ac97_clk);
	409	ac97_clk = NULL;
	410	#ifdef CONFIG_PXA27x
	411	clk_put(ac97conf_clk);
	412	ac97conf_clk = NULL;
	413	#endif
2c484df0 TI	414	}
	415
	416	return 0;
	417	}
	418
3ae5eaec	419	static struct platform_driver pxa2xx_ac97_driver = {
2c484df0	420	.probe = pxa2xx_ac97_probe,
788c6043	421	.remove = __devexit_p(pxa2xx_ac97_remove),
2c484df0 TI	422	.suspend = pxa2xx_ac97_suspend,
2c484df0 TI	423	.resume = pxa2xx_ac97_resume,
3ae5eaec RK	424	.driver = {
	425	.name = "pxa2xx-ac97",
	426	},
2c484df0 TI	427	};
	428
	429	static int __init pxa2xx_ac97_init(void)
	430	{
3ae5eaec	431	return platform_driver_register(&pxa2xx_ac97_driver);
2c484df0 TI	432	}
	433
	434	static void __exit pxa2xx_ac97_exit(void)
	435	{
3ae5eaec	436	platform_driver_unregister(&pxa2xx_ac97_driver);
2c484df0 TI	437	}
	438
	439	module_init(pxa2xx_ac97_init);
	440	module_exit(pxa2xx_ac97_exit);
	441
	442	MODULE_AUTHOR("Nicolas Pitre");
	443	MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
	444	MODULE_LICENSE("GPL");