ALSA: firewire-tascam: drop reuse of incoming packet parameter for outgoing packet...
[deliverable/linux.git] / sound / firewire / amdtp-stream.c
CommitLineData
31ef9134
CL
1/*
2 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
3 * with Common Isochronous Packet (IEC 61883-1) headers
4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 * Licensed under the terms of the GNU General Public License, version 2.
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/firewire.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <sound/pcm.h>
7b2d99fa 15#include <sound/pcm_params.h>
d67c46b9 16#include "amdtp-stream.h"
31ef9134
CL
17
18#define TICKS_PER_CYCLE 3072
19#define CYCLES_PER_SECOND 8000
20#define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
21
0c95c1d6
TS
22/* Always support Linux tracing subsystem. */
23#define CREATE_TRACE_POINTS
24#include "amdtp-stream-trace.h"
25
ca5b5050 26#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
31ef9134 27
b445db44
TS
28/* isochronous header parameters */
29#define ISO_DATA_LENGTH_SHIFT 16
31ef9134
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30#define TAG_CIP 1
31
b445db44 32/* common isochronous packet header parameters */
9a2820c1
TS
33#define CIP_EOH_SHIFT 31
34#define CIP_EOH (1u << CIP_EOH_SHIFT)
b445db44 35#define CIP_EOH_MASK 0x80000000
9a2820c1
TS
36#define CIP_SID_SHIFT 24
37#define CIP_SID_MASK 0x3f000000
38#define CIP_DBS_MASK 0x00ff0000
39#define CIP_DBS_SHIFT 16
40#define CIP_DBC_MASK 0x000000ff
41#define CIP_FMT_SHIFT 24
b445db44 42#define CIP_FMT_MASK 0x3f000000
9a2820c1
TS
43#define CIP_FDF_MASK 0x00ff0000
44#define CIP_FDF_SHIFT 16
b445db44
TS
45#define CIP_SYT_MASK 0x0000ffff
46#define CIP_SYT_NO_INFO 0xffff
b445db44 47
51c29fd2 48/* Audio and Music transfer protocol specific parameters */
414ba022 49#define CIP_FMT_AM 0x10
2b3fc456 50#define AMDTP_FDF_NO_DATA 0xff
31ef9134
CL
51
52/* TODO: make these configurable */
53#define INTERRUPT_INTERVAL 16
54#define QUEUE_LENGTH 48
55
2b3fc456 56#define IN_PACKET_HEADER_SIZE 4
4b7da117
TS
57#define OUT_PACKET_HEADER_SIZE 0
58
76fb8789
CL
59static void pcm_period_tasklet(unsigned long data);
60
31ef9134 61/**
be4a2894
TS
62 * amdtp_stream_init - initialize an AMDTP stream structure
63 * @s: the AMDTP stream to initialize
31ef9134 64 * @unit: the target of the stream
3ff7e8f0 65 * @dir: the direction of stream
31ef9134 66 * @flags: the packet transmission method to use
5955815e 67 * @fmt: the value of fmt field in CIP header
df075fee
TS
68 * @process_data_blocks: callback handler to process data blocks
69 * @protocol_size: the size to allocate newly for protocol
31ef9134 70 */
be4a2894 71int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
5955815e 72 enum amdtp_stream_direction dir, enum cip_flags flags,
df075fee
TS
73 unsigned int fmt,
74 amdtp_stream_process_data_blocks_t process_data_blocks,
75 unsigned int protocol_size)
31ef9134 76{
df075fee
TS
77 if (process_data_blocks == NULL)
78 return -EINVAL;
79
80 s->protocol = kzalloc(protocol_size, GFP_KERNEL);
81 if (!s->protocol)
82 return -ENOMEM;
83
c6f224dc 84 s->unit = unit;
3ff7e8f0 85 s->direction = dir;
31ef9134
CL
86 s->flags = flags;
87 s->context = ERR_PTR(-1);
88 mutex_init(&s->mutex);
76fb8789 89 tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s);
ec00f5e4 90 s->packet_index = 0;
31ef9134 91
7b3b0d85
TS
92 init_waitqueue_head(&s->callback_wait);
93 s->callbacked = false;
94 s->sync_slave = NULL;
95
5955815e 96 s->fmt = fmt;
df075fee 97 s->process_data_blocks = process_data_blocks;
414ba022 98
31ef9134
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99 return 0;
100}
be4a2894 101EXPORT_SYMBOL(amdtp_stream_init);
31ef9134
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102
103/**
be4a2894
TS
104 * amdtp_stream_destroy - free stream resources
105 * @s: the AMDTP stream to destroy
31ef9134 106 */
be4a2894 107void amdtp_stream_destroy(struct amdtp_stream *s)
31ef9134 108{
44c376b9
TS
109 /* Not initialized. */
110 if (s->protocol == NULL)
111 return;
112
be4a2894 113 WARN_ON(amdtp_stream_running(s));
df075fee 114 kfree(s->protocol);
31ef9134 115 mutex_destroy(&s->mutex);
31ef9134 116}
be4a2894 117EXPORT_SYMBOL(amdtp_stream_destroy);
31ef9134 118
c5280e99 119const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = {
a7304e3b
CL
120 [CIP_SFC_32000] = 8,
121 [CIP_SFC_44100] = 8,
122 [CIP_SFC_48000] = 8,
123 [CIP_SFC_88200] = 16,
124 [CIP_SFC_96000] = 16,
125 [CIP_SFC_176400] = 32,
126 [CIP_SFC_192000] = 32,
127};
128EXPORT_SYMBOL(amdtp_syt_intervals);
129
f9503a68 130const unsigned int amdtp_rate_table[CIP_SFC_COUNT] = {
1017abed
TS
131 [CIP_SFC_32000] = 32000,
132 [CIP_SFC_44100] = 44100,
133 [CIP_SFC_48000] = 48000,
134 [CIP_SFC_88200] = 88200,
135 [CIP_SFC_96000] = 96000,
136 [CIP_SFC_176400] = 176400,
137 [CIP_SFC_192000] = 192000,
138};
139EXPORT_SYMBOL(amdtp_rate_table);
140
7b2d99fa
TS
141/**
142 * amdtp_stream_add_pcm_hw_constraints - add hw constraints for PCM substream
143 * @s: the AMDTP stream, which must be initialized.
144 * @runtime: the PCM substream runtime
145 */
146int amdtp_stream_add_pcm_hw_constraints(struct amdtp_stream *s,
147 struct snd_pcm_runtime *runtime)
148{
149 int err;
150
7b2d99fa
TS
151 /*
152 * Currently firewire-lib processes 16 packets in one software
153 * interrupt callback. This equals to 2msec but actually the
154 * interval of the interrupts has a jitter.
155 * Additionally, even if adding a constraint to fit period size to
156 * 2msec, actual calculated frames per period doesn't equal to 2msec,
157 * depending on sampling rate.
158 * Anyway, the interval to call snd_pcm_period_elapsed() cannot 2msec.
159 * Here let us use 5msec for safe period interrupt.
160 */
161 err = snd_pcm_hw_constraint_minmax(runtime,
162 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
163 5000, UINT_MAX);
164 if (err < 0)
165 goto end;
166
167 /* Non-Blocking stream has no more constraints */
168 if (!(s->flags & CIP_BLOCKING))
169 goto end;
170
171 /*
172 * One AMDTP packet can include some frames. In blocking mode, the
173 * number equals to SYT_INTERVAL. So the number is 8, 16 or 32,
174 * depending on its sampling rate. For accurate period interrupt, it's
ce991981 175 * preferrable to align period/buffer sizes to current SYT_INTERVAL.
7b2d99fa 176 *
ce991981
YG
177 * TODO: These constraints can be improved with proper rules.
178 * Currently apply LCM of SYT_INTERVALs.
7b2d99fa
TS
179 */
180 err = snd_pcm_hw_constraint_step(runtime, 0,
181 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32);
182 if (err < 0)
183 goto end;
184 err = snd_pcm_hw_constraint_step(runtime, 0,
185 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32);
186end:
187 return err;
188}
189EXPORT_SYMBOL(amdtp_stream_add_pcm_hw_constraints);
190
31ef9134 191/**
be4a2894
TS
192 * amdtp_stream_set_parameters - set stream parameters
193 * @s: the AMDTP stream to configure
31ef9134 194 * @rate: the sample rate
df075fee 195 * @data_block_quadlets: the size of a data block in quadlet unit
31ef9134 196 *
a7304e3b 197 * The parameters must be set before the stream is started, and must not be
31ef9134
CL
198 * changed while the stream is running.
199 */
df075fee
TS
200int amdtp_stream_set_parameters(struct amdtp_stream *s, unsigned int rate,
201 unsigned int data_block_quadlets)
31ef9134 202{
df075fee 203 unsigned int sfc;
31ef9134 204
547e631c 205 for (sfc = 0; sfc < ARRAY_SIZE(amdtp_rate_table); ++sfc) {
1017abed 206 if (amdtp_rate_table[sfc] == rate)
547e631c
TS
207 break;
208 }
209 if (sfc == ARRAY_SIZE(amdtp_rate_table))
210 return -EINVAL;
e84d15f6 211
e84d15f6 212 s->sfc = sfc;
df075fee 213 s->data_block_quadlets = data_block_quadlets;
a7304e3b 214 s->syt_interval = amdtp_syt_intervals[sfc];
e84d15f6
CL
215
216 /* default buffering in the device */
217 s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
218 if (s->flags & CIP_BLOCKING)
219 /* additional buffering needed to adjust for no-data packets */
220 s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate;
77d2a8a4 221
547e631c 222 return 0;
31ef9134 223}
be4a2894 224EXPORT_SYMBOL(amdtp_stream_set_parameters);
31ef9134
CL
225
226/**
be4a2894
TS
227 * amdtp_stream_get_max_payload - get the stream's packet size
228 * @s: the AMDTP stream
31ef9134
CL
229 *
230 * This function must not be called before the stream has been configured
be4a2894 231 * with amdtp_stream_set_parameters().
31ef9134 232 */
be4a2894 233unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
31ef9134 234{
a2064710
TS
235 unsigned int multiplier = 1;
236
237 if (s->flags & CIP_JUMBO_PAYLOAD)
238 multiplier = 5;
239
240 return 8 + s->syt_interval * s->data_block_quadlets * 4 * multiplier;
31ef9134 241}
be4a2894 242EXPORT_SYMBOL(amdtp_stream_get_max_payload);
31ef9134 243
76fb8789 244/**
be4a2894
TS
245 * amdtp_stream_pcm_prepare - prepare PCM device for running
246 * @s: the AMDTP stream
76fb8789
CL
247 *
248 * This function should be called from the PCM device's .prepare callback.
249 */
be4a2894 250void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
76fb8789
CL
251{
252 tasklet_kill(&s->period_tasklet);
253 s->pcm_buffer_pointer = 0;
254 s->pcm_period_pointer = 0;
92b862c7 255 s->pointer_flush = true;
76fb8789 256}
be4a2894 257EXPORT_SYMBOL(amdtp_stream_pcm_prepare);
76fb8789 258
875be091
TS
259static unsigned int calculate_data_blocks(struct amdtp_stream *s,
260 unsigned int syt)
31ef9134
CL
261{
262 unsigned int phase, data_blocks;
263
875be091
TS
264 /* Blocking mode. */
265 if (s->flags & CIP_BLOCKING) {
266 /* This module generate empty packet for 'no data'. */
267 if (syt == CIP_SYT_NO_INFO)
268 data_blocks = 0;
269 else
270 data_blocks = s->syt_interval;
271 /* Non-blocking mode. */
31ef9134 272 } else {
875be091
TS
273 if (!cip_sfc_is_base_44100(s->sfc)) {
274 /* Sample_rate / 8000 is an integer, and precomputed. */
275 data_blocks = s->data_block_state;
276 } else {
277 phase = s->data_block_state;
31ef9134
CL
278
279 /*
280 * This calculates the number of data blocks per packet so that
281 * 1) the overall rate is correct and exactly synchronized to
282 * the bus clock, and
283 * 2) packets with a rounded-up number of blocks occur as early
284 * as possible in the sequence (to prevent underruns of the
285 * device's buffer).
286 */
875be091
TS
287 if (s->sfc == CIP_SFC_44100)
288 /* 6 6 5 6 5 6 5 ... */
289 data_blocks = 5 + ((phase & 1) ^
290 (phase == 0 || phase >= 40));
291 else
292 /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */
293 data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
294 if (++phase >= (80 >> (s->sfc >> 1)))
295 phase = 0;
296 s->data_block_state = phase;
297 }
31ef9134
CL
298 }
299
300 return data_blocks;
301}
302
be4a2894 303static unsigned int calculate_syt(struct amdtp_stream *s,
31ef9134
CL
304 unsigned int cycle)
305{
306 unsigned int syt_offset, phase, index, syt;
307
308 if (s->last_syt_offset < TICKS_PER_CYCLE) {
309 if (!cip_sfc_is_base_44100(s->sfc))
310 syt_offset = s->last_syt_offset + s->syt_offset_state;
311 else {
312 /*
313 * The time, in ticks, of the n'th SYT_INTERVAL sample is:
314 * n * SYT_INTERVAL * 24576000 / sample_rate
315 * Modulo TICKS_PER_CYCLE, the difference between successive
316 * elements is about 1386.23. Rounding the results of this
317 * formula to the SYT precision results in a sequence of
318 * differences that begins with:
319 * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ...
320 * This code generates _exactly_ the same sequence.
321 */
322 phase = s->syt_offset_state;
323 index = phase % 13;
324 syt_offset = s->last_syt_offset;
325 syt_offset += 1386 + ((index && !(index & 3)) ||
326 phase == 146);
327 if (++phase >= 147)
328 phase = 0;
329 s->syt_offset_state = phase;
330 }
331 } else
332 syt_offset = s->last_syt_offset - TICKS_PER_CYCLE;
333 s->last_syt_offset = syt_offset;
334
be454366 335 if (syt_offset < TICKS_PER_CYCLE) {
e84d15f6 336 syt_offset += s->transfer_delay;
be454366
CL
337 syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12;
338 syt += syt_offset % TICKS_PER_CYCLE;
31ef9134 339
b445db44 340 return syt & CIP_SYT_MASK;
be454366 341 } else {
b445db44 342 return CIP_SYT_NO_INFO;
be454366 343 }
31ef9134
CL
344}
345
4b7da117
TS
346static void update_pcm_pointers(struct amdtp_stream *s,
347 struct snd_pcm_substream *pcm,
348 unsigned int frames)
65845f29
TS
349{
350 unsigned int ptr;
351
4b7da117
TS
352 ptr = s->pcm_buffer_pointer + frames;
353 if (ptr >= pcm->runtime->buffer_size)
354 ptr -= pcm->runtime->buffer_size;
355 ACCESS_ONCE(s->pcm_buffer_pointer) = ptr;
356
357 s->pcm_period_pointer += frames;
358 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
359 s->pcm_period_pointer -= pcm->runtime->period_size;
360 s->pointer_flush = false;
361 tasklet_hi_schedule(&s->period_tasklet);
362 }
363}
364
365static void pcm_period_tasklet(unsigned long data)
366{
367 struct amdtp_stream *s = (void *)data;
368 struct snd_pcm_substream *pcm = ACCESS_ONCE(s->pcm);
369
370 if (pcm)
371 snd_pcm_period_elapsed(pcm);
372}
373
374static int queue_packet(struct amdtp_stream *s,
375 unsigned int header_length,
376 unsigned int payload_length, bool skip)
377{
378 struct fw_iso_packet p = {0};
7b3b0d85
TS
379 int err = 0;
380
381 if (IS_ERR(s->context))
382 goto end;
4b7da117
TS
383
384 p.interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL);
385 p.tag = TAG_CIP;
386 p.header_length = header_length;
387 p.payload_length = (!skip) ? payload_length : 0;
388 p.skip = skip;
389 err = fw_iso_context_queue(s->context, &p, &s->buffer.iso_buffer,
390 s->buffer.packets[s->packet_index].offset);
391 if (err < 0) {
392 dev_err(&s->unit->device, "queueing error: %d\n", err);
393 goto end;
394 }
395
396 if (++s->packet_index >= QUEUE_LENGTH)
397 s->packet_index = 0;
398end:
399 return err;
400}
401
402static inline int queue_out_packet(struct amdtp_stream *s,
403 unsigned int payload_length, bool skip)
404{
405 return queue_packet(s, OUT_PACKET_HEADER_SIZE,
406 payload_length, skip);
407}
408
2b3fc456
TS
409static inline int queue_in_packet(struct amdtp_stream *s)
410{
411 return queue_packet(s, IN_PACKET_HEADER_SIZE,
412 amdtp_stream_get_max_payload(s), false);
413}
414
a4103bd7 415static int handle_out_packet(struct amdtp_stream *s, unsigned int data_blocks,
0c95c1d6 416 unsigned int cycle, unsigned int syt)
31ef9134
CL
417{
418 __be32 *buffer;
6fc6b9ce 419 unsigned int payload_length;
20e44577 420 unsigned int pcm_frames;
31ef9134 421 struct snd_pcm_substream *pcm;
31ef9134 422
ccccad86 423 buffer = s->buffer.packets[s->packet_index].buffer;
df075fee 424 pcm_frames = s->process_data_blocks(s, buffer + 2, data_blocks, &syt);
20e44577 425
31ef9134 426 buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) |
9a2820c1 427 (s->data_block_quadlets << CIP_DBS_SHIFT) |
31ef9134 428 s->data_block_counter);
414ba022
TS
429 buffer[1] = cpu_to_be32(CIP_EOH |
430 ((s->fmt << CIP_FMT_SHIFT) & CIP_FMT_MASK) |
431 ((s->fdf << CIP_FDF_SHIFT) & CIP_FDF_MASK) |
432 (syt & CIP_SYT_MASK));
31ef9134
CL
433
434 s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff;
4b7da117 435 payload_length = 8 + data_blocks * 4 * s->data_block_quadlets;
0c95c1d6
TS
436
437 trace_out_packet(s, cycle, buffer, payload_length);
438
a4103bd7
TS
439 if (queue_out_packet(s, payload_length, false) < 0)
440 return -EIO;
31ef9134 441
20e44577
TS
442 pcm = ACCESS_ONCE(s->pcm);
443 if (pcm && pcm_frames > 0)
444 update_pcm_pointers(s, pcm, pcm_frames);
a4103bd7
TS
445
446 /* No need to return the number of handled data blocks. */
447 return 0;
76fb8789
CL
448}
449
6fc6b9ce 450static int handle_in_packet(struct amdtp_stream *s,
31ea49ba 451 unsigned int payload_quadlets, __be32 *buffer,
0c95c1d6
TS
452 unsigned int *data_blocks, unsigned int cycle,
453 unsigned int syt)
2b3fc456
TS
454{
455 u32 cip_header[2];
414ba022 456 unsigned int fmt, fdf;
6fc6b9ce 457 unsigned int data_block_quadlets, data_block_counter, dbc_interval;
20e44577
TS
458 struct snd_pcm_substream *pcm;
459 unsigned int pcm_frames;
c8bdf49b 460 bool lost;
2b3fc456
TS
461
462 cip_header[0] = be32_to_cpu(buffer[0]);
463 cip_header[1] = be32_to_cpu(buffer[1]);
464
0c95c1d6
TS
465 trace_in_packet(s, cycle, cip_header, payload_quadlets);
466
2b3fc456
TS
467 /*
468 * This module supports 'Two-quadlet CIP header with SYT field'.
77d2a8a4 469 * For convenience, also check FMT field is AM824 or not.
2b3fc456
TS
470 */
471 if (((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) ||
414ba022 472 ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH)) {
2b3fc456
TS
473 dev_info_ratelimited(&s->unit->device,
474 "Invalid CIP header for AMDTP: %08X:%08X\n",
475 cip_header[0], cip_header[1]);
31ea49ba 476 *data_blocks = 0;
20e44577 477 pcm_frames = 0;
2b3fc456
TS
478 goto end;
479 }
480
414ba022
TS
481 /* Check valid protocol or not. */
482 fmt = (cip_header[1] & CIP_FMT_MASK) >> CIP_FMT_SHIFT;
483 if (fmt != s->fmt) {
2a7e1713
TS
484 dev_info_ratelimited(&s->unit->device,
485 "Detect unexpected protocol: %08x %08x\n",
486 cip_header[0], cip_header[1]);
487 *data_blocks = 0;
488 pcm_frames = 0;
489 goto end;
414ba022
TS
490 }
491
2b3fc456 492 /* Calculate data blocks */
414ba022 493 fdf = (cip_header[1] & CIP_FDF_MASK) >> CIP_FDF_SHIFT;
2b3fc456 494 if (payload_quadlets < 3 ||
414ba022 495 (fmt == CIP_FMT_AM && fdf == AMDTP_FDF_NO_DATA)) {
31ea49ba 496 *data_blocks = 0;
2b3fc456
TS
497 } else {
498 data_block_quadlets =
9a2820c1 499 (cip_header[0] & CIP_DBS_MASK) >> CIP_DBS_SHIFT;
2b3fc456
TS
500 /* avoid division by zero */
501 if (data_block_quadlets == 0) {
12e0f438 502 dev_err(&s->unit->device,
2b3fc456
TS
503 "Detect invalid value in dbs field: %08X\n",
504 cip_header[0]);
a9007054 505 return -EPROTO;
2b3fc456 506 }
69702239
TS
507 if (s->flags & CIP_WRONG_DBS)
508 data_block_quadlets = s->data_block_quadlets;
2b3fc456 509
31ea49ba 510 *data_blocks = (payload_quadlets - 2) / data_block_quadlets;
2b3fc456
TS
511 }
512
513 /* Check data block counter continuity */
9a2820c1 514 data_block_counter = cip_header[0] & CIP_DBC_MASK;
31ea49ba 515 if (*data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
9d59124c
TS
516 s->data_block_counter != UINT_MAX)
517 data_block_counter = s->data_block_counter;
518
18f5ed36
TS
519 if (((s->flags & CIP_SKIP_DBC_ZERO_CHECK) &&
520 data_block_counter == s->tx_first_dbc) ||
521 s->data_block_counter == UINT_MAX) {
b84b1a27
TS
522 lost = false;
523 } else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
c8bdf49b 524 lost = data_block_counter != s->data_block_counter;
d9cd0065 525 } else {
31ea49ba 526 if ((*data_blocks > 0) && (s->tx_dbc_interval > 0))
d9cd0065
TS
527 dbc_interval = s->tx_dbc_interval;
528 else
31ea49ba 529 dbc_interval = *data_blocks;
d9cd0065 530
c8bdf49b 531 lost = data_block_counter !=
d9cd0065
TS
532 ((s->data_block_counter + dbc_interval) & 0xff);
533 }
c8bdf49b
TS
534
535 if (lost) {
12e0f438
TS
536 dev_err(&s->unit->device,
537 "Detect discontinuity of CIP: %02X %02X\n",
538 s->data_block_counter, data_block_counter);
6fc6b9ce 539 return -EIO;
2b3fc456
TS
540 }
541
df075fee 542 pcm_frames = s->process_data_blocks(s, buffer + 2, *data_blocks, &syt);
2b3fc456 543
c8bdf49b
TS
544 if (s->flags & CIP_DBC_IS_END_EVENT)
545 s->data_block_counter = data_block_counter;
546 else
547 s->data_block_counter =
31ea49ba 548 (data_block_counter + *data_blocks) & 0xff;
2b3fc456
TS
549end:
550 if (queue_in_packet(s) < 0)
6fc6b9ce 551 return -EIO;
2b3fc456 552
20e44577
TS
553 pcm = ACCESS_ONCE(s->pcm);
554 if (pcm && pcm_frames > 0)
555 update_pcm_pointers(s, pcm, pcm_frames);
2b3fc456 556
31ea49ba 557 return 0;
2b3fc456
TS
558}
559
73fc7f08
TS
560/*
561 * In CYCLE_TIMER register of IEEE 1394, 7 bits are used to represent second. On
562 * the other hand, in DMA descriptors of 1394 OHCI, 3 bits are used to represent
563 * it. Thus, via Linux firewire subsystem, we can get the 3 bits for second.
564 */
565static inline u32 compute_cycle_count(u32 tstamp)
566{
567 return (((tstamp >> 13) & 0x07) * 8000) + (tstamp & 0x1fff);
568}
569
570static inline u32 increment_cycle_count(u32 cycle, unsigned int addend)
571{
572 cycle += addend;
573 if (cycle >= 8 * CYCLES_PER_SECOND)
574 cycle -= 8 * CYCLES_PER_SECOND;
575 return cycle;
576}
577
f90e2ded
TS
578static inline u32 decrement_cycle_count(u32 cycle, unsigned int subtrahend)
579{
580 if (cycle < subtrahend)
581 cycle += 8 * CYCLES_PER_SECOND;
582 return cycle - subtrahend;
583}
584
73fc7f08 585static void out_stream_callback(struct fw_iso_context *context, u32 tstamp,
4b7da117
TS
586 size_t header_length, void *header,
587 void *private_data)
31ef9134 588{
be4a2894 589 struct amdtp_stream *s = private_data;
ccccad86 590 unsigned int i, syt, packets = header_length / 4;
6fc6b9ce 591 unsigned int data_blocks;
73fc7f08 592 u32 cycle;
31ef9134 593
a4103bd7
TS
594 if (s->packet_index < 0)
595 return;
596
73fc7f08
TS
597 cycle = compute_cycle_count(tstamp);
598
599 /* Align to actual cycle count for the last packet. */
600 cycle = increment_cycle_count(cycle, QUEUE_LENGTH - packets);
31ef9134 601
ccccad86 602 for (i = 0; i < packets; ++i) {
73fc7f08
TS
603 cycle = increment_cycle_count(cycle, 1);
604 syt = calculate_syt(s, cycle);
6fc6b9ce
TS
605 data_blocks = calculate_data_blocks(s, syt);
606
0c95c1d6 607 if (handle_out_packet(s, data_blocks, cycle, syt) < 0) {
a4103bd7
TS
608 s->packet_index = -1;
609 amdtp_stream_pcm_abort(s);
610 return;
611 }
ccccad86 612 }
a4103bd7 613
13882a82 614 fw_iso_context_queue_flush(s->context);
31ef9134
CL
615}
616
73fc7f08 617static void in_stream_callback(struct fw_iso_context *context, u32 tstamp,
2b3fc456
TS
618 size_t header_length, void *header,
619 void *private_data)
620{
621 struct amdtp_stream *s = private_data;
a2064710
TS
622 unsigned int p, syt, packets;
623 unsigned int payload_quadlets, max_payload_quadlets;
6fc6b9ce 624 unsigned int data_blocks;
2b3fc456 625 __be32 *buffer, *headers = header;
f90e2ded 626 u32 cycle;
2b3fc456 627
a4103bd7
TS
628 if (s->packet_index < 0)
629 return;
630
2b3fc456
TS
631 /* The number of packets in buffer */
632 packets = header_length / IN_PACKET_HEADER_SIZE;
633
f90e2ded
TS
634 cycle = compute_cycle_count(tstamp);
635
636 /* Align to actual cycle count for the last packet. */
637 cycle = decrement_cycle_count(cycle, packets);
638
a2064710
TS
639 /* For buffer-over-run prevention. */
640 max_payload_quadlets = amdtp_stream_get_max_payload(s) / 4;
641
2b3fc456 642 for (p = 0; p < packets; p++) {
f90e2ded 643 cycle = increment_cycle_count(cycle, 1);
2b3fc456
TS
644 buffer = s->buffer.packets[s->packet_index].buffer;
645
646 /* The number of quadlets in this packet */
647 payload_quadlets =
648 (be32_to_cpu(headers[p]) >> ISO_DATA_LENGTH_SHIFT) / 4;
a2064710
TS
649 if (payload_quadlets > max_payload_quadlets) {
650 dev_err(&s->unit->device,
651 "Detect jumbo payload: %02x %02x\n",
652 payload_quadlets, max_payload_quadlets);
653 s->packet_index = -1;
654 break;
655 }
656
20e44577 657 syt = be32_to_cpu(buffer[1]) & CIP_SYT_MASK;
31ea49ba 658 if (handle_in_packet(s, payload_quadlets, buffer,
0c95c1d6 659 &data_blocks, cycle, syt) < 0) {
6fc6b9ce
TS
660 s->packet_index = -1;
661 break;
662 }
663
664 /* Process sync slave stream */
665 if (s->sync_slave && s->sync_slave->callbacked) {
a4103bd7 666 if (handle_out_packet(s->sync_slave,
0c95c1d6 667 data_blocks, cycle, syt) < 0) {
a4103bd7
TS
668 s->packet_index = -1;
669 break;
670 }
6fc6b9ce 671 }
2b3fc456
TS
672 }
673
7b3b0d85
TS
674 /* Queueing error or detecting discontinuity */
675 if (s->packet_index < 0) {
6fc6b9ce
TS
676 amdtp_stream_pcm_abort(s);
677
7b3b0d85
TS
678 /* Abort sync slave. */
679 if (s->sync_slave) {
680 s->sync_slave->packet_index = -1;
681 amdtp_stream_pcm_abort(s->sync_slave);
682 }
683 return;
684 }
685
686 /* when sync to device, flush the packets for slave stream */
687 if (s->sync_slave && s->sync_slave->callbacked)
688 fw_iso_context_queue_flush(s->sync_slave->context);
689
2b3fc456
TS
690 fw_iso_context_queue_flush(s->context);
691}
692
7b3b0d85 693/* processing is done by master callback */
73fc7f08 694static void slave_stream_callback(struct fw_iso_context *context, u32 tstamp,
7b3b0d85
TS
695 size_t header_length, void *header,
696 void *private_data)
697{
698 return;
699}
700
701/* this is executed one time */
702static void amdtp_stream_first_callback(struct fw_iso_context *context,
73fc7f08 703 u32 tstamp, size_t header_length,
7b3b0d85
TS
704 void *header, void *private_data)
705{
706 struct amdtp_stream *s = private_data;
707
708 /*
709 * For in-stream, first packet has come.
710 * For out-stream, prepared to transmit first packet
711 */
712 s->callbacked = true;
713 wake_up(&s->callback_wait);
714
715 if (s->direction == AMDTP_IN_STREAM)
716 context->callback.sc = in_stream_callback;
727d3a0b 717 else if (s->flags & CIP_SYNC_TO_DEVICE)
7b3b0d85
TS
718 context->callback.sc = slave_stream_callback;
719 else
720 context->callback.sc = out_stream_callback;
721
73fc7f08 722 context->callback.sc(context, tstamp, header_length, header, s);
7b3b0d85
TS
723}
724
31ef9134 725/**
be4a2894
TS
726 * amdtp_stream_start - start transferring packets
727 * @s: the AMDTP stream to start
31ef9134
CL
728 * @channel: the isochronous channel on the bus
729 * @speed: firewire speed code
730 *
731 * The stream cannot be started until it has been configured with
be4a2894
TS
732 * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI
733 * device can be started.
31ef9134 734 */
be4a2894 735int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed)
31ef9134
CL
736{
737 static const struct {
738 unsigned int data_block;
739 unsigned int syt_offset;
740 } initial_state[] = {
741 [CIP_SFC_32000] = { 4, 3072 },
742 [CIP_SFC_48000] = { 6, 1024 },
743 [CIP_SFC_96000] = { 12, 1024 },
744 [CIP_SFC_192000] = { 24, 1024 },
745 [CIP_SFC_44100] = { 0, 67 },
746 [CIP_SFC_88200] = { 0, 67 },
747 [CIP_SFC_176400] = { 0, 67 },
748 };
2b3fc456
TS
749 unsigned int header_size;
750 enum dma_data_direction dir;
7ab56645 751 int type, tag, err;
31ef9134
CL
752
753 mutex_lock(&s->mutex);
754
be4a2894 755 if (WARN_ON(amdtp_stream_running(s) ||
4b7da117 756 (s->data_block_quadlets < 1))) {
31ef9134
CL
757 err = -EBADFD;
758 goto err_unlock;
759 }
760
b6bc8123
TS
761 if (s->direction == AMDTP_IN_STREAM &&
762 s->flags & CIP_SKIP_INIT_DBC_CHECK)
763 s->data_block_counter = UINT_MAX;
764 else
765 s->data_block_counter = 0;
31ef9134
CL
766 s->data_block_state = initial_state[s->sfc].data_block;
767 s->syt_offset_state = initial_state[s->sfc].syt_offset;
768 s->last_syt_offset = TICKS_PER_CYCLE;
769
2b3fc456
TS
770 /* initialize packet buffer */
771 if (s->direction == AMDTP_IN_STREAM) {
772 dir = DMA_FROM_DEVICE;
773 type = FW_ISO_CONTEXT_RECEIVE;
774 header_size = IN_PACKET_HEADER_SIZE;
2b3fc456
TS
775 } else {
776 dir = DMA_TO_DEVICE;
777 type = FW_ISO_CONTEXT_TRANSMIT;
778 header_size = OUT_PACKET_HEADER_SIZE;
2b3fc456 779 }
31ef9134 780 err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH,
2b3fc456 781 amdtp_stream_get_max_payload(s), dir);
31ef9134
CL
782 if (err < 0)
783 goto err_unlock;
784
785 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
2b3fc456 786 type, channel, speed, header_size,
7b3b0d85 787 amdtp_stream_first_callback, s);
31ef9134
CL
788 if (IS_ERR(s->context)) {
789 err = PTR_ERR(s->context);
790 if (err == -EBUSY)
791 dev_err(&s->unit->device,
be4a2894 792 "no free stream on this controller\n");
31ef9134
CL
793 goto err_buffer;
794 }
795
be4a2894 796 amdtp_stream_update(s);
31ef9134 797
ec00f5e4 798 s->packet_index = 0;
4b7da117 799 do {
2b3fc456
TS
800 if (s->direction == AMDTP_IN_STREAM)
801 err = queue_in_packet(s);
802 else
803 err = queue_out_packet(s, 0, true);
4b7da117
TS
804 if (err < 0)
805 goto err_context;
806 } while (s->packet_index > 0);
31ef9134 807
2b3fc456 808 /* NOTE: TAG1 matches CIP. This just affects in stream. */
7ab56645
TS
809 tag = FW_ISO_CONTEXT_MATCH_TAG1;
810 if (s->flags & CIP_EMPTY_WITH_TAG0)
811 tag |= FW_ISO_CONTEXT_MATCH_TAG0;
812
7b3b0d85 813 s->callbacked = false;
7ab56645 814 err = fw_iso_context_start(s->context, -1, 0, tag);
31ef9134
CL
815 if (err < 0)
816 goto err_context;
817
818 mutex_unlock(&s->mutex);
819
820 return 0;
821
822err_context:
823 fw_iso_context_destroy(s->context);
824 s->context = ERR_PTR(-1);
825err_buffer:
826 iso_packets_buffer_destroy(&s->buffer, s->unit);
827err_unlock:
828 mutex_unlock(&s->mutex);
829
830 return err;
831}
be4a2894 832EXPORT_SYMBOL(amdtp_stream_start);
31ef9134 833
e9148ddd 834/**
be4a2894
TS
835 * amdtp_stream_pcm_pointer - get the PCM buffer position
836 * @s: the AMDTP stream that transports the PCM data
e9148ddd
CL
837 *
838 * Returns the current buffer position, in frames.
839 */
be4a2894 840unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s)
e9148ddd 841{
92b862c7 842 /* this optimization is allowed to be racy */
c8de6dbb 843 if (s->pointer_flush && amdtp_stream_running(s))
92b862c7
CL
844 fw_iso_context_flush_completions(s->context);
845 else
846 s->pointer_flush = true;
e9148ddd
CL
847
848 return ACCESS_ONCE(s->pcm_buffer_pointer);
849}
be4a2894 850EXPORT_SYMBOL(amdtp_stream_pcm_pointer);
e9148ddd 851
31ef9134 852/**
be4a2894
TS
853 * amdtp_stream_update - update the stream after a bus reset
854 * @s: the AMDTP stream
31ef9134 855 */
be4a2894 856void amdtp_stream_update(struct amdtp_stream *s)
31ef9134 857{
9a2820c1 858 /* Precomputing. */
31ef9134 859 ACCESS_ONCE(s->source_node_id_field) =
9a2820c1
TS
860 (fw_parent_device(s->unit)->card->node_id << CIP_SID_SHIFT) &
861 CIP_SID_MASK;
31ef9134 862}
be4a2894 863EXPORT_SYMBOL(amdtp_stream_update);
31ef9134
CL
864
865/**
be4a2894
TS
866 * amdtp_stream_stop - stop sending packets
867 * @s: the AMDTP stream to stop
31ef9134
CL
868 *
869 * All PCM and MIDI devices of the stream must be stopped before the stream
870 * itself can be stopped.
871 */
be4a2894 872void amdtp_stream_stop(struct amdtp_stream *s)
31ef9134
CL
873{
874 mutex_lock(&s->mutex);
875
be4a2894 876 if (!amdtp_stream_running(s)) {
31ef9134
CL
877 mutex_unlock(&s->mutex);
878 return;
879 }
880
76fb8789 881 tasklet_kill(&s->period_tasklet);
31ef9134
CL
882 fw_iso_context_stop(s->context);
883 fw_iso_context_destroy(s->context);
884 s->context = ERR_PTR(-1);
885 iso_packets_buffer_destroy(&s->buffer, s->unit);
886
7b3b0d85
TS
887 s->callbacked = false;
888
31ef9134
CL
889 mutex_unlock(&s->mutex);
890}
be4a2894 891EXPORT_SYMBOL(amdtp_stream_stop);
31ef9134
CL
892
893/**
be4a2894 894 * amdtp_stream_pcm_abort - abort the running PCM device
31ef9134
CL
895 * @s: the AMDTP stream about to be stopped
896 *
897 * If the isochronous stream needs to be stopped asynchronously, call this
898 * function first to stop the PCM device.
899 */
be4a2894 900void amdtp_stream_pcm_abort(struct amdtp_stream *s)
31ef9134
CL
901{
902 struct snd_pcm_substream *pcm;
903
904 pcm = ACCESS_ONCE(s->pcm);
1fb8510c
TI
905 if (pcm)
906 snd_pcm_stop_xrun(pcm);
31ef9134 907}
be4a2894 908EXPORT_SYMBOL(amdtp_stream_pcm_abort);
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