ALSA: firewire-lib: Add support for duplex streams synchronization in blocking mode
[deliverable/linux.git] / sound / firewire / amdtp.c
CommitLineData
31ef9134
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1/*
2 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
3 * with Common Isochronous Packet (IEC 61883-1) headers
4 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
6 * Licensed under the terms of the GNU General Public License, version 2.
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/firewire.h>
12#include <linux/module.h>
13#include <linux/slab.h>
7b3b0d85 14#include <linux/sched.h>
31ef9134 15#include <sound/pcm.h>
83d8d72d 16#include <sound/rawmidi.h>
31ef9134
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17#include "amdtp.h"
18
19#define TICKS_PER_CYCLE 3072
20#define CYCLES_PER_SECOND 8000
21#define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
22
23#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 µs */
24
b445db44
TS
25/* isochronous header parameters */
26#define ISO_DATA_LENGTH_SHIFT 16
31ef9134
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27#define TAG_CIP 1
28
b445db44 29/* common isochronous packet header parameters */
31ef9134 30#define CIP_EOH (1u << 31)
b445db44 31#define CIP_EOH_MASK 0x80000000
31ef9134 32#define CIP_FMT_AM (0x10 << 24)
b445db44
TS
33#define CIP_FMT_MASK 0x3f000000
34#define CIP_SYT_MASK 0x0000ffff
35#define CIP_SYT_NO_INFO 0xffff
36#define CIP_FDF_MASK 0x00ff0000
37#define CIP_FDF_SFC_SHIFT 16
38
39/*
40 * Audio and Music transfer protocol specific parameters
41 * only "Clock-based rate control mode" is supported
42 */
43#define AMDTP_FDF_AM824 (0 << (CIP_FDF_SFC_SHIFT + 3))
2b3fc456 44#define AMDTP_FDF_NO_DATA 0xff
b445db44
TS
45#define AMDTP_DBS_MASK 0x00ff0000
46#define AMDTP_DBS_SHIFT 16
47#define AMDTP_DBC_MASK 0x000000ff
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48
49/* TODO: make these configurable */
50#define INTERRUPT_INTERVAL 16
51#define QUEUE_LENGTH 48
52
2b3fc456 53#define IN_PACKET_HEADER_SIZE 4
4b7da117
TS
54#define OUT_PACKET_HEADER_SIZE 0
55
76fb8789
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56static void pcm_period_tasklet(unsigned long data);
57
31ef9134 58/**
be4a2894
TS
59 * amdtp_stream_init - initialize an AMDTP stream structure
60 * @s: the AMDTP stream to initialize
31ef9134 61 * @unit: the target of the stream
3ff7e8f0 62 * @dir: the direction of stream
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63 * @flags: the packet transmission method to use
64 */
be4a2894 65int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
3ff7e8f0 66 enum amdtp_stream_direction dir, enum cip_flags flags)
31ef9134 67{
31ef9134 68 s->unit = fw_unit_get(unit);
3ff7e8f0 69 s->direction = dir;
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70 s->flags = flags;
71 s->context = ERR_PTR(-1);
72 mutex_init(&s->mutex);
76fb8789 73 tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s);
ec00f5e4 74 s->packet_index = 0;
31ef9134 75
7b3b0d85
TS
76 init_waitqueue_head(&s->callback_wait);
77 s->callbacked = false;
78 s->sync_slave = NULL;
79
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80 return 0;
81}
be4a2894 82EXPORT_SYMBOL(amdtp_stream_init);
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83
84/**
be4a2894
TS
85 * amdtp_stream_destroy - free stream resources
86 * @s: the AMDTP stream to destroy
31ef9134 87 */
be4a2894 88void amdtp_stream_destroy(struct amdtp_stream *s)
31ef9134 89{
be4a2894 90 WARN_ON(amdtp_stream_running(s));
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91 mutex_destroy(&s->mutex);
92 fw_unit_put(s->unit);
93}
be4a2894 94EXPORT_SYMBOL(amdtp_stream_destroy);
31ef9134 95
c5280e99 96const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = {
a7304e3b
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97 [CIP_SFC_32000] = 8,
98 [CIP_SFC_44100] = 8,
99 [CIP_SFC_48000] = 8,
100 [CIP_SFC_88200] = 16,
101 [CIP_SFC_96000] = 16,
102 [CIP_SFC_176400] = 32,
103 [CIP_SFC_192000] = 32,
104};
105EXPORT_SYMBOL(amdtp_syt_intervals);
106
31ef9134 107/**
be4a2894
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108 * amdtp_stream_set_parameters - set stream parameters
109 * @s: the AMDTP stream to configure
31ef9134 110 * @rate: the sample rate
a7304e3b
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111 * @pcm_channels: the number of PCM samples in each data block, to be encoded
112 * as AM824 multi-bit linear audio
113 * @midi_ports: the number of MIDI ports (i.e., MPX-MIDI Data Channels)
31ef9134 114 *
a7304e3b 115 * The parameters must be set before the stream is started, and must not be
31ef9134
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116 * changed while the stream is running.
117 */
be4a2894
TS
118void amdtp_stream_set_parameters(struct amdtp_stream *s,
119 unsigned int rate,
120 unsigned int pcm_channels,
121 unsigned int midi_ports)
31ef9134 122{
a7304e3b
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123 static const unsigned int rates[] = {
124 [CIP_SFC_32000] = 32000,
125 [CIP_SFC_44100] = 44100,
126 [CIP_SFC_48000] = 48000,
127 [CIP_SFC_88200] = 88200,
128 [CIP_SFC_96000] = 96000,
129 [CIP_SFC_176400] = 176400,
130 [CIP_SFC_192000] = 192000,
31ef9134 131 };
83d8d72d 132 unsigned int sfc, midi_channels;
31ef9134 133
83d8d72d
TS
134 midi_channels = DIV_ROUND_UP(midi_ports, 8);
135
136 if (WARN_ON(amdtp_stream_running(s)) ||
137 WARN_ON(midi_channels > AMDTP_MAX_CHANNELS_FOR_MIDI))
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138 return;
139
a7304e3b
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140 for (sfc = 0; sfc < CIP_SFC_COUNT; ++sfc)
141 if (rates[sfc] == rate)
e84d15f6 142 goto sfc_found;
31ef9134 143 WARN_ON(1);
e84d15f6
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144 return;
145
146sfc_found:
a7304e3b
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147 s->dual_wire = (s->flags & CIP_HI_DUALWIRE) && sfc > CIP_SFC_96000;
148 if (s->dual_wire) {
149 sfc -= 2;
150 rate /= 2;
151 pcm_channels *= 2;
152 }
e84d15f6 153 s->sfc = sfc;
83d8d72d 154 s->data_block_quadlets = pcm_channels + midi_channels;
a7304e3b
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155 s->pcm_channels = pcm_channels;
156 s->midi_ports = midi_ports;
157
158 s->syt_interval = amdtp_syt_intervals[sfc];
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159
160 /* default buffering in the device */
161 s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
162 if (s->flags & CIP_BLOCKING)
163 /* additional buffering needed to adjust for no-data packets */
164 s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate;
31ef9134 165}
be4a2894 166EXPORT_SYMBOL(amdtp_stream_set_parameters);
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167
168/**
be4a2894
TS
169 * amdtp_stream_get_max_payload - get the stream's packet size
170 * @s: the AMDTP stream
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171 *
172 * This function must not be called before the stream has been configured
be4a2894 173 * with amdtp_stream_set_parameters().
31ef9134 174 */
be4a2894 175unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
31ef9134 176{
e84d15f6 177 return 8 + s->syt_interval * s->data_block_quadlets * 4;
31ef9134 178}
be4a2894 179EXPORT_SYMBOL(amdtp_stream_get_max_payload);
31ef9134 180
be4a2894 181static void amdtp_write_s16(struct amdtp_stream *s,
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182 struct snd_pcm_substream *pcm,
183 __be32 *buffer, unsigned int frames);
be4a2894 184static void amdtp_write_s32(struct amdtp_stream *s,
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185 struct snd_pcm_substream *pcm,
186 __be32 *buffer, unsigned int frames);
be4a2894 187static void amdtp_write_s16_dualwire(struct amdtp_stream *s,
a7304e3b
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188 struct snd_pcm_substream *pcm,
189 __be32 *buffer, unsigned int frames);
be4a2894 190static void amdtp_write_s32_dualwire(struct amdtp_stream *s,
a7304e3b
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191 struct snd_pcm_substream *pcm,
192 __be32 *buffer, unsigned int frames);
2b3fc456
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193static void amdtp_read_s32(struct amdtp_stream *s,
194 struct snd_pcm_substream *pcm,
195 __be32 *buffer, unsigned int frames);
196static void amdtp_read_s32_dualwire(struct amdtp_stream *s,
197 struct snd_pcm_substream *pcm,
198 __be32 *buffer, unsigned int frames);
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199
200/**
be4a2894
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201 * amdtp_stream_set_pcm_format - set the PCM format
202 * @s: the AMDTP stream to configure
31ef9134
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203 * @format: the format of the ALSA PCM device
204 *
a7304e3b
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205 * The sample format must be set after the other paramters (rate/PCM channels/
206 * MIDI) and before the stream is started, and must not be changed while the
207 * stream is running.
31ef9134 208 */
be4a2894
TS
209void amdtp_stream_set_pcm_format(struct amdtp_stream *s,
210 snd_pcm_format_t format)
31ef9134 211{
83d8d72d 212 if (WARN_ON(amdtp_stream_pcm_running(s)))
31ef9134
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213 return;
214
215 switch (format) {
216 default:
217 WARN_ON(1);
218 /* fall through */
219 case SNDRV_PCM_FORMAT_S16:
2b3fc456
TS
220 if (s->direction == AMDTP_OUT_STREAM) {
221 if (s->dual_wire)
222 s->transfer_samples = amdtp_write_s16_dualwire;
223 else
224 s->transfer_samples = amdtp_write_s16;
225 break;
226 }
227 WARN_ON(1);
228 /* fall through */
31ef9134 229 case SNDRV_PCM_FORMAT_S32:
2b3fc456
TS
230 if (s->direction == AMDTP_OUT_STREAM) {
231 if (s->dual_wire)
232 s->transfer_samples = amdtp_write_s32_dualwire;
233 else
234 s->transfer_samples = amdtp_write_s32;
235 } else {
236 if (s->dual_wire)
237 s->transfer_samples = amdtp_read_s32_dualwire;
238 else
239 s->transfer_samples = amdtp_read_s32;
240 }
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241 break;
242 }
243}
be4a2894 244EXPORT_SYMBOL(amdtp_stream_set_pcm_format);
31ef9134 245
76fb8789 246/**
be4a2894
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247 * amdtp_stream_pcm_prepare - prepare PCM device for running
248 * @s: the AMDTP stream
76fb8789
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249 *
250 * This function should be called from the PCM device's .prepare callback.
251 */
be4a2894 252void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
76fb8789
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253{
254 tasklet_kill(&s->period_tasklet);
255 s->pcm_buffer_pointer = 0;
256 s->pcm_period_pointer = 0;
92b862c7 257 s->pointer_flush = true;
76fb8789 258}
be4a2894 259EXPORT_SYMBOL(amdtp_stream_pcm_prepare);
76fb8789 260
be4a2894 261static unsigned int calculate_data_blocks(struct amdtp_stream *s)
31ef9134
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262{
263 unsigned int phase, data_blocks;
264
ccccad86
TS
265 if (s->flags & CIP_BLOCKING)
266 data_blocks = s->syt_interval;
267 else if (!cip_sfc_is_base_44100(s->sfc)) {
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268 /* Sample_rate / 8000 is an integer, and precomputed. */
269 data_blocks = s->data_block_state;
270 } else {
271 phase = s->data_block_state;
272
273 /*
274 * This calculates the number of data blocks per packet so that
275 * 1) the overall rate is correct and exactly synchronized to
276 * the bus clock, and
277 * 2) packets with a rounded-up number of blocks occur as early
278 * as possible in the sequence (to prevent underruns of the
279 * device's buffer).
280 */
281 if (s->sfc == CIP_SFC_44100)
282 /* 6 6 5 6 5 6 5 ... */
283 data_blocks = 5 + ((phase & 1) ^
284 (phase == 0 || phase >= 40));
285 else
286 /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */
287 data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
288 if (++phase >= (80 >> (s->sfc >> 1)))
289 phase = 0;
290 s->data_block_state = phase;
291 }
292
293 return data_blocks;
294}
295
be4a2894 296static unsigned int calculate_syt(struct amdtp_stream *s,
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297 unsigned int cycle)
298{
299 unsigned int syt_offset, phase, index, syt;
300
301 if (s->last_syt_offset < TICKS_PER_CYCLE) {
302 if (!cip_sfc_is_base_44100(s->sfc))
303 syt_offset = s->last_syt_offset + s->syt_offset_state;
304 else {
305 /*
306 * The time, in ticks, of the n'th SYT_INTERVAL sample is:
307 * n * SYT_INTERVAL * 24576000 / sample_rate
308 * Modulo TICKS_PER_CYCLE, the difference between successive
309 * elements is about 1386.23. Rounding the results of this
310 * formula to the SYT precision results in a sequence of
311 * differences that begins with:
312 * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ...
313 * This code generates _exactly_ the same sequence.
314 */
315 phase = s->syt_offset_state;
316 index = phase % 13;
317 syt_offset = s->last_syt_offset;
318 syt_offset += 1386 + ((index && !(index & 3)) ||
319 phase == 146);
320 if (++phase >= 147)
321 phase = 0;
322 s->syt_offset_state = phase;
323 }
324 } else
325 syt_offset = s->last_syt_offset - TICKS_PER_CYCLE;
326 s->last_syt_offset = syt_offset;
327
be454366 328 if (syt_offset < TICKS_PER_CYCLE) {
e84d15f6 329 syt_offset += s->transfer_delay;
be454366
CL
330 syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12;
331 syt += syt_offset % TICKS_PER_CYCLE;
31ef9134 332
b445db44 333 return syt & CIP_SYT_MASK;
be454366 334 } else {
b445db44 335 return CIP_SYT_NO_INFO;
be454366 336 }
31ef9134
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337}
338
be4a2894 339static void amdtp_write_s32(struct amdtp_stream *s,
31ef9134
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340 struct snd_pcm_substream *pcm,
341 __be32 *buffer, unsigned int frames)
342{
343 struct snd_pcm_runtime *runtime = pcm->runtime;
344 unsigned int channels, remaining_frames, frame_step, i, c;
345 const u32 *src;
346
347 channels = s->pcm_channels;
348 src = (void *)runtime->dma_area +
e84841f9 349 frames_to_bytes(runtime, s->pcm_buffer_pointer);
31ef9134
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350 remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer;
351 frame_step = s->data_block_quadlets - channels;
352
353 for (i = 0; i < frames; ++i) {
354 for (c = 0; c < channels; ++c) {
355 *buffer = cpu_to_be32((*src >> 8) | 0x40000000);
356 src++;
357 buffer++;
358 }
359 buffer += frame_step;
360 if (--remaining_frames == 0)
361 src = (void *)runtime->dma_area;
362 }
363}
364
be4a2894 365static void amdtp_write_s16(struct amdtp_stream *s,
31ef9134
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366 struct snd_pcm_substream *pcm,
367 __be32 *buffer, unsigned int frames)
368{
369 struct snd_pcm_runtime *runtime = pcm->runtime;
370 unsigned int channels, remaining_frames, frame_step, i, c;
371 const u16 *src;
372
373 channels = s->pcm_channels;
374 src = (void *)runtime->dma_area +
e84841f9 375 frames_to_bytes(runtime, s->pcm_buffer_pointer);
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376 remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer;
377 frame_step = s->data_block_quadlets - channels;
378
379 for (i = 0; i < frames; ++i) {
380 for (c = 0; c < channels; ++c) {
381 *buffer = cpu_to_be32((*src << 8) | 0x40000000);
382 src++;
383 buffer++;
384 }
385 buffer += frame_step;
386 if (--remaining_frames == 0)
387 src = (void *)runtime->dma_area;
388 }
389}
390
be4a2894 391static void amdtp_write_s32_dualwire(struct amdtp_stream *s,
a7304e3b
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392 struct snd_pcm_substream *pcm,
393 __be32 *buffer, unsigned int frames)
394{
395 struct snd_pcm_runtime *runtime = pcm->runtime;
396 unsigned int channels, frame_adjust_1, frame_adjust_2, i, c;
397 const u32 *src;
398
399 channels = s->pcm_channels;
400 src = (void *)runtime->dma_area +
401 s->pcm_buffer_pointer * (runtime->frame_bits / 8);
402 frame_adjust_1 = channels - 1;
403 frame_adjust_2 = 1 - (s->data_block_quadlets - channels);
404
405 channels /= 2;
406 for (i = 0; i < frames; ++i) {
407 for (c = 0; c < channels; ++c) {
408 *buffer = cpu_to_be32((*src >> 8) | 0x40000000);
409 src++;
410 buffer += 2;
411 }
412 buffer -= frame_adjust_1;
413 for (c = 0; c < channels; ++c) {
414 *buffer = cpu_to_be32((*src >> 8) | 0x40000000);
415 src++;
416 buffer += 2;
417 }
418 buffer -= frame_adjust_2;
419 }
420}
421
be4a2894 422static void amdtp_write_s16_dualwire(struct amdtp_stream *s,
a7304e3b
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423 struct snd_pcm_substream *pcm,
424 __be32 *buffer, unsigned int frames)
425{
426 struct snd_pcm_runtime *runtime = pcm->runtime;
427 unsigned int channels, frame_adjust_1, frame_adjust_2, i, c;
428 const u16 *src;
429
430 channels = s->pcm_channels;
431 src = (void *)runtime->dma_area +
432 s->pcm_buffer_pointer * (runtime->frame_bits / 8);
433 frame_adjust_1 = channels - 1;
434 frame_adjust_2 = 1 - (s->data_block_quadlets - channels);
435
436 channels /= 2;
437 for (i = 0; i < frames; ++i) {
438 for (c = 0; c < channels; ++c) {
439 *buffer = cpu_to_be32((*src << 8) | 0x40000000);
440 src++;
441 buffer += 2;
442 }
443 buffer -= frame_adjust_1;
444 for (c = 0; c < channels; ++c) {
445 *buffer = cpu_to_be32((*src << 8) | 0x40000000);
446 src++;
447 buffer += 2;
448 }
449 buffer -= frame_adjust_2;
450 }
451}
452
2b3fc456
TS
453static void amdtp_read_s32(struct amdtp_stream *s,
454 struct snd_pcm_substream *pcm,
455 __be32 *buffer, unsigned int frames)
456{
457 struct snd_pcm_runtime *runtime = pcm->runtime;
458 unsigned int channels, remaining_frames, i, c;
459 u32 *dst;
460
461 channels = s->pcm_channels;
462 dst = (void *)runtime->dma_area +
463 frames_to_bytes(runtime, s->pcm_buffer_pointer);
464 remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer;
465
466 for (i = 0; i < frames; ++i) {
467 for (c = 0; c < channels; ++c) {
468 *dst = be32_to_cpu(buffer[c]) << 8;
469 dst++;
470 }
471 buffer += s->data_block_quadlets;
472 if (--remaining_frames == 0)
473 dst = (void *)runtime->dma_area;
474 }
475}
476
477static void amdtp_read_s32_dualwire(struct amdtp_stream *s,
478 struct snd_pcm_substream *pcm,
479 __be32 *buffer, unsigned int frames)
480{
481 struct snd_pcm_runtime *runtime = pcm->runtime;
482 unsigned int channels, remaining_frames, i, c;
483 u32 *dst;
484
485 dst = (void *)runtime->dma_area +
486 frames_to_bytes(runtime, s->pcm_buffer_pointer);
487 remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer;
488 channels = s->pcm_channels / 2;
489
490 for (i = 0; i < frames; ++i) {
491 for (c = 0; c < channels; ++c) {
492 *dst = be32_to_cpu(buffer[c * 2]) << 8;
493 dst++;
494 }
495 buffer += 1;
496 for (c = 0; c < channels; ++c) {
497 *dst = be32_to_cpu(buffer[c * 2]) << 8;
498 dst++;
499 }
500 buffer += s->data_block_quadlets - 1;
501 if (--remaining_frames == 0)
502 dst = (void *)runtime->dma_area;
503 }
504}
505
be4a2894 506static void amdtp_fill_pcm_silence(struct amdtp_stream *s,
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507 __be32 *buffer, unsigned int frames)
508{
509 unsigned int i, c;
510
511 for (i = 0; i < frames; ++i) {
512 for (c = 0; c < s->pcm_channels; ++c)
513 buffer[c] = cpu_to_be32(0x40000000);
514 buffer += s->data_block_quadlets;
515 }
516}
517
be4a2894 518static void amdtp_fill_midi(struct amdtp_stream *s,
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519 __be32 *buffer, unsigned int frames)
520{
83d8d72d
TS
521 unsigned int f, port;
522 u8 *b;
523
524 for (f = 0; f < frames; f++) {
525 buffer[s->pcm_channels + 1] = 0;
526 b = (u8 *)&buffer[s->pcm_channels + 1];
527
528 port = (s->data_block_counter + f) % 8;
529 if ((s->midi[port] == NULL) ||
530 (snd_rawmidi_transmit(s->midi[port], b + 1, 1) <= 0))
531 b[0] = 0x80;
532 else
533 b[0] = 0x81;
534
535 buffer += s->data_block_quadlets;
536 }
537}
538
539static void amdtp_pull_midi(struct amdtp_stream *s,
540 __be32 *buffer, unsigned int frames)
541{
542 unsigned int f, port;
543 int len;
544 u8 *b;
545
546 for (f = 0; f < frames; f++) {
547 port = (s->data_block_counter + f) % 8;
548 b = (u8 *)&buffer[s->pcm_channels + 1];
31ef9134 549
83d8d72d
TS
550 len = b[0] - 0x80;
551 if ((1 <= len) && (len <= 3) && (s->midi[port]))
552 snd_rawmidi_receive(s->midi[port], b + 1, len);
553
554 buffer += s->data_block_quadlets;
555 }
31ef9134
CL
556}
557
4b7da117
TS
558static void update_pcm_pointers(struct amdtp_stream *s,
559 struct snd_pcm_substream *pcm,
560 unsigned int frames)
561{ unsigned int ptr;
562
563 if (s->dual_wire)
564 frames *= 2;
565
566 ptr = s->pcm_buffer_pointer + frames;
567 if (ptr >= pcm->runtime->buffer_size)
568 ptr -= pcm->runtime->buffer_size;
569 ACCESS_ONCE(s->pcm_buffer_pointer) = ptr;
570
571 s->pcm_period_pointer += frames;
572 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
573 s->pcm_period_pointer -= pcm->runtime->period_size;
574 s->pointer_flush = false;
575 tasklet_hi_schedule(&s->period_tasklet);
576 }
577}
578
579static void pcm_period_tasklet(unsigned long data)
580{
581 struct amdtp_stream *s = (void *)data;
582 struct snd_pcm_substream *pcm = ACCESS_ONCE(s->pcm);
583
584 if (pcm)
585 snd_pcm_period_elapsed(pcm);
586}
587
588static int queue_packet(struct amdtp_stream *s,
589 unsigned int header_length,
590 unsigned int payload_length, bool skip)
591{
592 struct fw_iso_packet p = {0};
7b3b0d85
TS
593 int err = 0;
594
595 if (IS_ERR(s->context))
596 goto end;
4b7da117
TS
597
598 p.interrupt = IS_ALIGNED(s->packet_index + 1, INTERRUPT_INTERVAL);
599 p.tag = TAG_CIP;
600 p.header_length = header_length;
601 p.payload_length = (!skip) ? payload_length : 0;
602 p.skip = skip;
603 err = fw_iso_context_queue(s->context, &p, &s->buffer.iso_buffer,
604 s->buffer.packets[s->packet_index].offset);
605 if (err < 0) {
606 dev_err(&s->unit->device, "queueing error: %d\n", err);
607 goto end;
608 }
609
610 if (++s->packet_index >= QUEUE_LENGTH)
611 s->packet_index = 0;
612end:
613 return err;
614}
615
616static inline int queue_out_packet(struct amdtp_stream *s,
617 unsigned int payload_length, bool skip)
618{
619 return queue_packet(s, OUT_PACKET_HEADER_SIZE,
620 payload_length, skip);
621}
622
2b3fc456
TS
623static inline int queue_in_packet(struct amdtp_stream *s)
624{
625 return queue_packet(s, IN_PACKET_HEADER_SIZE,
626 amdtp_stream_get_max_payload(s), false);
627}
628
ccccad86 629static void handle_out_packet(struct amdtp_stream *s, unsigned int syt)
31ef9134
CL
630{
631 __be32 *buffer;
ccccad86 632 unsigned int data_blocks, payload_length;
31ef9134 633 struct snd_pcm_substream *pcm;
31ef9134 634
ec00f5e4
CL
635 if (s->packet_index < 0)
636 return;
ec00f5e4 637
82755abf 638 /* this module generate empty packet for 'no data' */
ccccad86 639 if (!(s->flags & CIP_BLOCKING) || (syt != CIP_SYT_NO_INFO))
e84d15f6 640 data_blocks = calculate_data_blocks(s);
82755abf
TS
641 else
642 data_blocks = 0;
31ef9134 643
ccccad86 644 buffer = s->buffer.packets[s->packet_index].buffer;
31ef9134 645 buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) |
b445db44 646 (s->data_block_quadlets << AMDTP_DBS_SHIFT) |
31ef9134
CL
647 s->data_block_counter);
648 buffer[1] = cpu_to_be32(CIP_EOH | CIP_FMT_AM | AMDTP_FDF_AM824 |
b445db44 649 (s->sfc << CIP_FDF_SFC_SHIFT) | syt);
31ef9134
CL
650 buffer += 2;
651
652 pcm = ACCESS_ONCE(s->pcm);
653 if (pcm)
654 s->transfer_samples(s, pcm, buffer, data_blocks);
655 else
656 amdtp_fill_pcm_silence(s, buffer, data_blocks);
657 if (s->midi_ports)
658 amdtp_fill_midi(s, buffer, data_blocks);
659
660 s->data_block_counter = (s->data_block_counter + data_blocks) & 0xff;
661
4b7da117
TS
662 payload_length = 8 + data_blocks * 4 * s->data_block_quadlets;
663 if (queue_out_packet(s, payload_length, false) < 0) {
ec00f5e4 664 s->packet_index = -1;
be4a2894 665 amdtp_stream_pcm_abort(s);
ec00f5e4
CL
666 return;
667 }
31ef9134 668
76fb8789 669 if (pcm)
4b7da117 670 update_pcm_pointers(s, pcm, data_blocks);
76fb8789
CL
671}
672
2b3fc456
TS
673static void handle_in_packet(struct amdtp_stream *s,
674 unsigned int payload_quadlets,
675 __be32 *buffer)
676{
677 u32 cip_header[2];
678 unsigned int data_blocks, data_block_quadlets, data_block_counter;
679 struct snd_pcm_substream *pcm = NULL;
680
681 cip_header[0] = be32_to_cpu(buffer[0]);
682 cip_header[1] = be32_to_cpu(buffer[1]);
683
684 /*
685 * This module supports 'Two-quadlet CIP header with SYT field'.
686 * For convinience, also check FMT field is AM824 or not.
687 */
688 if (((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) ||
689 ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH) ||
690 ((cip_header[1] & CIP_FMT_MASK) != CIP_FMT_AM)) {
691 dev_info_ratelimited(&s->unit->device,
692 "Invalid CIP header for AMDTP: %08X:%08X\n",
693 cip_header[0], cip_header[1]);
694 goto end;
695 }
696
697 /* Calculate data blocks */
698 if (payload_quadlets < 3 ||
699 ((cip_header[1] & CIP_FDF_MASK) ==
700 (AMDTP_FDF_NO_DATA << CIP_FDF_SFC_SHIFT))) {
701 data_blocks = 0;
702 } else {
703 data_block_quadlets =
704 (cip_header[0] & AMDTP_DBS_MASK) >> AMDTP_DBS_SHIFT;
705 /* avoid division by zero */
706 if (data_block_quadlets == 0) {
707 dev_info_ratelimited(&s->unit->device,
708 "Detect invalid value in dbs field: %08X\n",
709 cip_header[0]);
710 goto err;
711 }
712
713 data_blocks = (payload_quadlets - 2) / data_block_quadlets;
714 }
715
716 /* Check data block counter continuity */
717 data_block_counter = cip_header[0] & AMDTP_DBC_MASK;
718 if (data_block_counter != s->data_block_counter) {
719 dev_info(&s->unit->device,
720 "Detect discontinuity of CIP: %02X %02X\n",
721 s->data_block_counter, data_block_counter);
722 goto err;
723 }
724
725 if (data_blocks > 0) {
726 buffer += 2;
727
728 pcm = ACCESS_ONCE(s->pcm);
729 if (pcm)
730 s->transfer_samples(s, pcm, buffer, data_blocks);
83d8d72d
TS
731
732 if (s->midi_ports)
733 amdtp_pull_midi(s, buffer, data_blocks);
2b3fc456
TS
734 }
735
736 s->data_block_counter = (data_block_counter + data_blocks) & 0xff;
737end:
738 if (queue_in_packet(s) < 0)
739 goto err;
740
741 if (pcm)
742 update_pcm_pointers(s, pcm, data_blocks);
743
744 return;
745err:
746 s->packet_index = -1;
747 amdtp_stream_pcm_abort(s);
748}
749
4b7da117
TS
750static void out_stream_callback(struct fw_iso_context *context, u32 cycle,
751 size_t header_length, void *header,
752 void *private_data)
31ef9134 753{
be4a2894 754 struct amdtp_stream *s = private_data;
ccccad86 755 unsigned int i, syt, packets = header_length / 4;
31ef9134
CL
756
757 /*
758 * Compute the cycle of the last queued packet.
759 * (We need only the four lowest bits for the SYT, so we can ignore
760 * that bits 0-11 must wrap around at 3072.)
761 */
762 cycle += QUEUE_LENGTH - packets;
763
ccccad86
TS
764 for (i = 0; i < packets; ++i) {
765 syt = calculate_syt(s, ++cycle);
766 handle_out_packet(s, syt);
767 }
13882a82 768 fw_iso_context_queue_flush(s->context);
31ef9134
CL
769}
770
2b3fc456
TS
771static void in_stream_callback(struct fw_iso_context *context, u32 cycle,
772 size_t header_length, void *header,
773 void *private_data)
774{
775 struct amdtp_stream *s = private_data;
7b3b0d85 776 unsigned int p, syt, packets, payload_quadlets;
2b3fc456
TS
777 __be32 *buffer, *headers = header;
778
779 /* The number of packets in buffer */
780 packets = header_length / IN_PACKET_HEADER_SIZE;
781
782 for (p = 0; p < packets; p++) {
783 if (s->packet_index < 0)
7b3b0d85
TS
784 break;
785
2b3fc456
TS
786 buffer = s->buffer.packets[s->packet_index].buffer;
787
7b3b0d85
TS
788 /* Process sync slave stream */
789 if (s->sync_slave && s->sync_slave->callbacked) {
790 syt = be32_to_cpu(buffer[1]) & CIP_SYT_MASK;
791 handle_out_packet(s->sync_slave, syt);
792 }
793
2b3fc456
TS
794 /* The number of quadlets in this packet */
795 payload_quadlets =
796 (be32_to_cpu(headers[p]) >> ISO_DATA_LENGTH_SHIFT) / 4;
797 handle_in_packet(s, payload_quadlets, buffer);
798 }
799
7b3b0d85
TS
800 /* Queueing error or detecting discontinuity */
801 if (s->packet_index < 0) {
802 /* Abort sync slave. */
803 if (s->sync_slave) {
804 s->sync_slave->packet_index = -1;
805 amdtp_stream_pcm_abort(s->sync_slave);
806 }
807 return;
808 }
809
810 /* when sync to device, flush the packets for slave stream */
811 if (s->sync_slave && s->sync_slave->callbacked)
812 fw_iso_context_queue_flush(s->sync_slave->context);
813
2b3fc456
TS
814 fw_iso_context_queue_flush(s->context);
815}
816
7b3b0d85
TS
817/* processing is done by master callback */
818static void slave_stream_callback(struct fw_iso_context *context, u32 cycle,
819 size_t header_length, void *header,
820 void *private_data)
821{
822 return;
823}
824
825/* this is executed one time */
826static void amdtp_stream_first_callback(struct fw_iso_context *context,
827 u32 cycle, size_t header_length,
828 void *header, void *private_data)
829{
830 struct amdtp_stream *s = private_data;
831
832 /*
833 * For in-stream, first packet has come.
834 * For out-stream, prepared to transmit first packet
835 */
836 s->callbacked = true;
837 wake_up(&s->callback_wait);
838
839 if (s->direction == AMDTP_IN_STREAM)
840 context->callback.sc = in_stream_callback;
841 else if ((s->flags & CIP_BLOCKING) && (s->flags & CIP_SYNC_TO_DEVICE))
842 context->callback.sc = slave_stream_callback;
843 else
844 context->callback.sc = out_stream_callback;
845
846 context->callback.sc(context, cycle, header_length, header, s);
847}
848
31ef9134 849/**
be4a2894
TS
850 * amdtp_stream_start - start transferring packets
851 * @s: the AMDTP stream to start
31ef9134
CL
852 * @channel: the isochronous channel on the bus
853 * @speed: firewire speed code
854 *
855 * The stream cannot be started until it has been configured with
be4a2894
TS
856 * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI
857 * device can be started.
31ef9134 858 */
be4a2894 859int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed)
31ef9134
CL
860{
861 static const struct {
862 unsigned int data_block;
863 unsigned int syt_offset;
864 } initial_state[] = {
865 [CIP_SFC_32000] = { 4, 3072 },
866 [CIP_SFC_48000] = { 6, 1024 },
867 [CIP_SFC_96000] = { 12, 1024 },
868 [CIP_SFC_192000] = { 24, 1024 },
869 [CIP_SFC_44100] = { 0, 67 },
870 [CIP_SFC_88200] = { 0, 67 },
871 [CIP_SFC_176400] = { 0, 67 },
872 };
2b3fc456
TS
873 unsigned int header_size;
874 enum dma_data_direction dir;
2b3fc456 875 int type, err;
31ef9134
CL
876
877 mutex_lock(&s->mutex);
878
be4a2894 879 if (WARN_ON(amdtp_stream_running(s) ||
4b7da117 880 (s->data_block_quadlets < 1))) {
31ef9134
CL
881 err = -EBADFD;
882 goto err_unlock;
883 }
884
4b7da117 885 s->data_block_counter = 0;
31ef9134
CL
886 s->data_block_state = initial_state[s->sfc].data_block;
887 s->syt_offset_state = initial_state[s->sfc].syt_offset;
888 s->last_syt_offset = TICKS_PER_CYCLE;
889
2b3fc456
TS
890 /* initialize packet buffer */
891 if (s->direction == AMDTP_IN_STREAM) {
892 dir = DMA_FROM_DEVICE;
893 type = FW_ISO_CONTEXT_RECEIVE;
894 header_size = IN_PACKET_HEADER_SIZE;
2b3fc456
TS
895 } else {
896 dir = DMA_TO_DEVICE;
897 type = FW_ISO_CONTEXT_TRANSMIT;
898 header_size = OUT_PACKET_HEADER_SIZE;
2b3fc456 899 }
31ef9134 900 err = iso_packets_buffer_init(&s->buffer, s->unit, QUEUE_LENGTH,
2b3fc456 901 amdtp_stream_get_max_payload(s), dir);
31ef9134
CL
902 if (err < 0)
903 goto err_unlock;
904
905 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
2b3fc456 906 type, channel, speed, header_size,
7b3b0d85 907 amdtp_stream_first_callback, s);
31ef9134
CL
908 if (IS_ERR(s->context)) {
909 err = PTR_ERR(s->context);
910 if (err == -EBUSY)
911 dev_err(&s->unit->device,
be4a2894 912 "no free stream on this controller\n");
31ef9134
CL
913 goto err_buffer;
914 }
915
be4a2894 916 amdtp_stream_update(s);
31ef9134 917
ec00f5e4 918 s->packet_index = 0;
4b7da117 919 do {
2b3fc456
TS
920 if (s->direction == AMDTP_IN_STREAM)
921 err = queue_in_packet(s);
922 else
923 err = queue_out_packet(s, 0, true);
4b7da117
TS
924 if (err < 0)
925 goto err_context;
926 } while (s->packet_index > 0);
31ef9134 927
2b3fc456 928 /* NOTE: TAG1 matches CIP. This just affects in stream. */
7b3b0d85 929 s->callbacked = false;
2b3fc456
TS
930 err = fw_iso_context_start(s->context, -1, 0,
931 FW_ISO_CONTEXT_MATCH_TAG1);
31ef9134
CL
932 if (err < 0)
933 goto err_context;
934
935 mutex_unlock(&s->mutex);
936
937 return 0;
938
939err_context:
940 fw_iso_context_destroy(s->context);
941 s->context = ERR_PTR(-1);
942err_buffer:
943 iso_packets_buffer_destroy(&s->buffer, s->unit);
944err_unlock:
945 mutex_unlock(&s->mutex);
946
947 return err;
948}
be4a2894 949EXPORT_SYMBOL(amdtp_stream_start);
31ef9134 950
e9148ddd 951/**
be4a2894
TS
952 * amdtp_stream_pcm_pointer - get the PCM buffer position
953 * @s: the AMDTP stream that transports the PCM data
e9148ddd
CL
954 *
955 * Returns the current buffer position, in frames.
956 */
be4a2894 957unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s)
e9148ddd 958{
92b862c7
CL
959 /* this optimization is allowed to be racy */
960 if (s->pointer_flush)
961 fw_iso_context_flush_completions(s->context);
962 else
963 s->pointer_flush = true;
e9148ddd
CL
964
965 return ACCESS_ONCE(s->pcm_buffer_pointer);
966}
be4a2894 967EXPORT_SYMBOL(amdtp_stream_pcm_pointer);
e9148ddd 968
31ef9134 969/**
be4a2894
TS
970 * amdtp_stream_update - update the stream after a bus reset
971 * @s: the AMDTP stream
31ef9134 972 */
be4a2894 973void amdtp_stream_update(struct amdtp_stream *s)
31ef9134
CL
974{
975 ACCESS_ONCE(s->source_node_id_field) =
976 (fw_parent_device(s->unit)->card->node_id & 0x3f) << 24;
977}
be4a2894 978EXPORT_SYMBOL(amdtp_stream_update);
31ef9134
CL
979
980/**
be4a2894
TS
981 * amdtp_stream_stop - stop sending packets
982 * @s: the AMDTP stream to stop
31ef9134
CL
983 *
984 * All PCM and MIDI devices of the stream must be stopped before the stream
985 * itself can be stopped.
986 */
be4a2894 987void amdtp_stream_stop(struct amdtp_stream *s)
31ef9134
CL
988{
989 mutex_lock(&s->mutex);
990
be4a2894 991 if (!amdtp_stream_running(s)) {
31ef9134
CL
992 mutex_unlock(&s->mutex);
993 return;
994 }
995
76fb8789 996 tasklet_kill(&s->period_tasklet);
31ef9134
CL
997 fw_iso_context_stop(s->context);
998 fw_iso_context_destroy(s->context);
999 s->context = ERR_PTR(-1);
1000 iso_packets_buffer_destroy(&s->buffer, s->unit);
1001
7b3b0d85
TS
1002 s->callbacked = false;
1003
31ef9134
CL
1004 mutex_unlock(&s->mutex);
1005}
be4a2894 1006EXPORT_SYMBOL(amdtp_stream_stop);
31ef9134
CL
1007
1008/**
be4a2894 1009 * amdtp_stream_pcm_abort - abort the running PCM device
31ef9134
CL
1010 * @s: the AMDTP stream about to be stopped
1011 *
1012 * If the isochronous stream needs to be stopped asynchronously, call this
1013 * function first to stop the PCM device.
1014 */
be4a2894 1015void amdtp_stream_pcm_abort(struct amdtp_stream *s)
31ef9134
CL
1016{
1017 struct snd_pcm_substream *pcm;
1018
1019 pcm = ACCESS_ONCE(s->pcm);
1020 if (pcm) {
1021 snd_pcm_stream_lock_irq(pcm);
1022 if (snd_pcm_running(pcm))
1023 snd_pcm_stop(pcm, SNDRV_PCM_STATE_XRUN);
1024 snd_pcm_stream_unlock_irq(pcm);
1025 }
1026}
be4a2894 1027EXPORT_SYMBOL(amdtp_stream_pcm_abort);
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