Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Routines for control of the CS8427 via i2c bus | |
3 | * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic | |
c1017a4c | 4 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/slab.h> |
24 | #include <linux/delay.h> | |
25 | #include <linux/init.h> | |
48008b59 | 26 | #include <asm/unaligned.h> |
1da177e4 LT |
27 | #include <sound/core.h> |
28 | #include <sound/control.h> | |
29 | #include <sound/pcm.h> | |
30 | #include <sound/cs8427.h> | |
31 | #include <sound/asoundef.h> | |
32 | ||
97f02e05 | 33 | static void snd_cs8427_reset(struct snd_i2c_device *cs8427); |
1da177e4 | 34 | |
c1017a4c | 35 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
1da177e4 LT |
36 | MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic"); |
37 | MODULE_LICENSE("GPL"); | |
38 | ||
39 | #define CS8427_ADDR (0x20>>1) /* fixed address */ | |
40 | ||
97f02e05 TI |
41 | struct cs8427_stream { |
42 | struct snd_pcm_substream *substream; | |
1da177e4 LT |
43 | char hw_status[24]; /* hardware status */ |
44 | char def_status[24]; /* default status */ | |
45 | char pcm_status[24]; /* PCM private status */ | |
46 | char hw_udata[32]; | |
97f02e05 TI |
47 | struct snd_kcontrol *pcm_ctl; |
48 | }; | |
1da177e4 | 49 | |
97f02e05 | 50 | struct cs8427 { |
1da177e4 LT |
51 | unsigned char regmap[0x14]; /* map of first 1 + 13 registers */ |
52 | unsigned int rate; | |
53 | unsigned int reset_timeout; | |
97f02e05 TI |
54 | struct cs8427_stream playback; |
55 | struct cs8427_stream capture; | |
56 | }; | |
1da177e4 LT |
57 | |
58 | static unsigned char swapbits(unsigned char val) | |
59 | { | |
60 | int bit; | |
61 | unsigned char res = 0; | |
62 | for (bit = 0; bit < 8; bit++) { | |
63 | res <<= 1; | |
64 | res |= val & 1; | |
65 | val >>= 1; | |
66 | } | |
67 | return res; | |
68 | } | |
69 | ||
97f02e05 TI |
70 | int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg, |
71 | unsigned char val) | |
1da177e4 LT |
72 | { |
73 | int err; | |
74 | unsigned char buf[2]; | |
75 | ||
76 | buf[0] = reg & 0x7f; | |
77 | buf[1] = val; | |
78 | if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) { | |
cc63935f TI |
79 | snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x " |
80 | "to CS8427 (%i)\n", buf[0], buf[1], err); | |
1da177e4 LT |
81 | return err < 0 ? err : -EIO; |
82 | } | |
83 | return 0; | |
84 | } | |
85 | ||
cc63935f TI |
86 | EXPORT_SYMBOL(snd_cs8427_reg_write); |
87 | ||
97f02e05 | 88 | static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg) |
1da177e4 LT |
89 | { |
90 | int err; | |
91 | unsigned char buf; | |
92 | ||
93 | if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { | |
cc63935f TI |
94 | snd_printk(KERN_ERR "unable to send register 0x%x byte " |
95 | "to CS8427\n", reg); | |
1da177e4 LT |
96 | return err < 0 ? err : -EIO; |
97 | } | |
98 | if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) { | |
cc63935f TI |
99 | snd_printk(KERN_ERR "unable to read register 0x%x byte " |
100 | "from CS8427\n", reg); | |
1da177e4 LT |
101 | return err < 0 ? err : -EIO; |
102 | } | |
103 | return buf; | |
104 | } | |
105 | ||
97f02e05 | 106 | static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata) |
1da177e4 | 107 | { |
97f02e05 | 108 | struct cs8427 *chip = device->private_data; |
1da177e4 LT |
109 | int err; |
110 | ||
111 | udata = udata ? CS8427_BSEL : 0; | |
112 | if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) { | |
113 | chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL; | |
114 | chip->regmap[CS8427_REG_CSDATABUF] |= udata; | |
97f02e05 TI |
115 | err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF, |
116 | chip->regmap[CS8427_REG_CSDATABUF]); | |
1da177e4 LT |
117 | if (err < 0) |
118 | return err; | |
119 | } | |
120 | return 0; | |
121 | } | |
122 | ||
97f02e05 | 123 | static int snd_cs8427_send_corudata(struct snd_i2c_device *device, |
1da177e4 LT |
124 | int udata, |
125 | unsigned char *ndata, | |
126 | int count) | |
127 | { | |
97f02e05 | 128 | struct cs8427 *chip = device->private_data; |
cc63935f TI |
129 | char *hw_data = udata ? |
130 | chip->playback.hw_udata : chip->playback.hw_status; | |
1da177e4 LT |
131 | char data[32]; |
132 | int err, idx; | |
133 | ||
134 | if (!memcmp(hw_data, ndata, count)) | |
135 | return 0; | |
136 | if ((err = snd_cs8427_select_corudata(device, udata)) < 0) | |
137 | return err; | |
138 | memcpy(hw_data, ndata, count); | |
139 | if (udata) { | |
140 | memset(data, 0, sizeof(data)); | |
141 | if (memcmp(hw_data, data, count) == 0) { | |
142 | chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK; | |
cc63935f TI |
143 | chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | |
144 | CS8427_EFTUI; | |
145 | err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF, | |
146 | chip->regmap[CS8427_REG_UDATABUF]); | |
147 | return err < 0 ? err : 0; | |
1da177e4 LT |
148 | } |
149 | } | |
150 | data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF; | |
151 | for (idx = 0; idx < count; idx++) | |
152 | data[idx + 1] = swapbits(ndata[idx]); | |
153 | if (snd_i2c_sendbytes(device, data, count + 1) != count + 1) | |
154 | return -EIO; | |
155 | return 1; | |
156 | } | |
157 | ||
97f02e05 | 158 | static void snd_cs8427_free(struct snd_i2c_device *device) |
1da177e4 LT |
159 | { |
160 | kfree(device->private_data); | |
161 | } | |
162 | ||
97f02e05 | 163 | int snd_cs8427_create(struct snd_i2c_bus *bus, |
1da177e4 LT |
164 | unsigned char addr, |
165 | unsigned int reset_timeout, | |
97f02e05 | 166 | struct snd_i2c_device **r_cs8427) |
1da177e4 LT |
167 | { |
168 | static unsigned char initvals1[] = { | |
169 | CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC, | |
cc63935f TI |
170 | /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, |
171 | TCBL=output */ | |
1da177e4 | 172 | CS8427_SWCLK | CS8427_TCBLDIR, |
cc63935f TI |
173 | /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, |
174 | normal stereo operation */ | |
1da177e4 | 175 | 0x00, |
cc63935f TI |
176 | /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, |
177 | Rx=>serial */ | |
1da177e4 | 178 | CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER, |
cc63935f TI |
179 | /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, |
180 | output time base = OMCK, input time base = recovered input clock, | |
181 | recovered input clock source is ILRCK changed to AES3INPUT | |
182 | (workaround, see snd_cs8427_reset) */ | |
1da177e4 | 183 | CS8427_RXDILRCK, |
cc63935f TI |
184 | /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, |
185 | 24-bit, 64*Fsi */ | |
1da177e4 | 186 | CS8427_SIDEL | CS8427_SILRPOL, |
cc63935f TI |
187 | /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format |
188 | = I2S, 24-bit, 64*Fsi */ | |
1da177e4 LT |
189 | CS8427_SODEL | CS8427_SOLRPOL, |
190 | }; | |
191 | static unsigned char initvals2[] = { | |
192 | CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC, | |
cc63935f TI |
193 | /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, |
194 | biphase, parity status bits */ | |
195 | /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/ | |
1da177e4 LT |
196 | 0xff, /* set everything */ |
197 | /* CS8427_REG_CSDATABUF: | |
198 | Registers 32-55 window to CS buffer | |
199 | Inhibit D->E transfers from overwriting first 5 bytes of CS data. | |
200 | Inhibit D->E transfers (all) of CS data. | |
201 | Allow E->F transfer of CS data. | |
202 | One byte mode; both A/B channels get same written CB data. | |
203 | A channel info is output to chip's EMPH* pin. */ | |
204 | CS8427_CBMR | CS8427_DETCI, | |
205 | /* CS8427_REG_UDATABUF: | |
206 | Use internal buffer to transmit User (U) data. | |
207 | Chip's U pin is an output. | |
208 | Transmit all O's for user data. | |
209 | Inhibit D->E transfers. | |
210 | Inhibit E->F transfers. */ | |
211 | CS8427_UD | CS8427_EFTUI | CS8427_DETUI, | |
212 | }; | |
213 | int err; | |
97f02e05 TI |
214 | struct cs8427 *chip; |
215 | struct snd_i2c_device *device; | |
1da177e4 LT |
216 | unsigned char buf[24]; |
217 | ||
cc63935f TI |
218 | if ((err = snd_i2c_device_create(bus, "CS8427", |
219 | CS8427_ADDR | (addr & 7), | |
97f02e05 | 220 | &device)) < 0) |
1da177e4 | 221 | return err; |
561b220a | 222 | chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
223 | if (chip == NULL) { |
224 | snd_i2c_device_free(device); | |
225 | return -ENOMEM; | |
226 | } | |
227 | device->private_free = snd_cs8427_free; | |
228 | ||
229 | snd_i2c_lock(bus); | |
cc63935f | 230 | err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER); |
4eb4550a TI |
231 | if (err != CS8427_VER8427A) { |
232 | /* give second chance */ | |
233 | snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: " | |
234 | "let me try again...\n", err); | |
235 | err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER); | |
236 | } | |
cc63935f | 237 | if (err != CS8427_VER8427A) { |
1da177e4 | 238 | snd_i2c_unlock(bus); |
97f02e05 TI |
239 | snd_printk(KERN_ERR "unable to find CS8427 signature " |
240 | "(expected 0x%x, read 0x%x),\n", | |
241 | CS8427_VER8427A, err); | |
242 | snd_printk(KERN_ERR " initialization is not completed\n"); | |
1da177e4 LT |
243 | return -EFAULT; |
244 | } | |
245 | /* turn off run bit while making changes to configuration */ | |
cc63935f TI |
246 | err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00); |
247 | if (err < 0) | |
1da177e4 LT |
248 | goto __fail; |
249 | /* send initial values */ | |
250 | memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6); | |
251 | if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) { | |
252 | err = err < 0 ? err : -EIO; | |
253 | goto __fail; | |
254 | } | |
255 | /* Turn off CS8427 interrupt stuff that is not used in hardware */ | |
256 | memset(buf, 0, 7); | |
257 | /* from address 9 to 15 */ | |
258 | buf[0] = 9; /* register */ | |
259 | if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7) | |
260 | goto __fail; | |
261 | /* send transfer initialization sequence */ | |
262 | memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3); | |
263 | if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) { | |
264 | err = err < 0 ? err : -EIO; | |
265 | goto __fail; | |
266 | } | |
267 | /* write default channel status bytes */ | |
48008b59 | 268 | put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf); |
1da177e4 LT |
269 | memset(buf + 4, 0, 24 - 4); |
270 | if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0) | |
271 | goto __fail; | |
272 | memcpy(chip->playback.def_status, buf, 24); | |
273 | memcpy(chip->playback.pcm_status, buf, 24); | |
274 | snd_i2c_unlock(bus); | |
275 | ||
276 | /* turn on run bit and rock'n'roll */ | |
277 | if (reset_timeout < 1) | |
278 | reset_timeout = 1; | |
279 | chip->reset_timeout = reset_timeout; | |
280 | snd_cs8427_reset(device); | |
281 | ||
282 | #if 0 // it's nice for read tests | |
283 | { | |
284 | char buf[128]; | |
285 | int xx; | |
286 | buf[0] = 0x81; | |
287 | snd_i2c_sendbytes(device, buf, 1); | |
288 | snd_i2c_readbytes(device, buf, 127); | |
289 | for (xx = 0; xx < 127; xx++) | |
99b359ba | 290 | printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]); |
1da177e4 LT |
291 | } |
292 | #endif | |
293 | ||
294 | if (r_cs8427) | |
295 | *r_cs8427 = device; | |
296 | return 0; | |
297 | ||
298 | __fail: | |
299 | snd_i2c_unlock(bus); | |
300 | snd_i2c_device_free(device); | |
301 | return err < 0 ? err : -EIO; | |
302 | } | |
303 | ||
cc63935f TI |
304 | EXPORT_SYMBOL(snd_cs8427_create); |
305 | ||
1da177e4 LT |
306 | /* |
307 | * Reset the chip using run bit, also lock PLL using ILRCK and | |
308 | * put back AES3INPUT. This workaround is described in latest | |
309 | * CS8427 datasheet, otherwise TXDSERIAL will not work. | |
310 | */ | |
97f02e05 | 311 | static void snd_cs8427_reset(struct snd_i2c_device *cs8427) |
1da177e4 | 312 | { |
97f02e05 | 313 | struct cs8427 *chip; |
1da177e4 | 314 | unsigned long end_time; |
e957ebf1 | 315 | int data, aes3input = 0; |
1da177e4 | 316 | |
5e246b85 TI |
317 | if (snd_BUG_ON(!cs8427)) |
318 | return; | |
1da177e4 LT |
319 | chip = cs8427->private_data; |
320 | snd_i2c_lock(cs8427->bus); | |
cc63935f TI |
321 | if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) == |
322 | CS8427_RXDAES3INPUT) /* AES3 bit is set */ | |
e957ebf1 | 323 | aes3input = 1; |
1da177e4 | 324 | chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK); |
97f02e05 TI |
325 | snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, |
326 | chip->regmap[CS8427_REG_CLOCKSOURCE]); | |
1da177e4 LT |
327 | udelay(200); |
328 | chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK; | |
97f02e05 TI |
329 | snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, |
330 | chip->regmap[CS8427_REG_CLOCKSOURCE]); | |
1da177e4 LT |
331 | udelay(200); |
332 | snd_i2c_unlock(cs8427->bus); | |
333 | end_time = jiffies + chip->reset_timeout; | |
334 | while (time_after_eq(end_time, jiffies)) { | |
335 | snd_i2c_lock(cs8427->bus); | |
336 | data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS); | |
337 | snd_i2c_unlock(cs8427->bus); | |
338 | if (!(data & CS8427_UNLOCK)) | |
339 | break; | |
8433a509 | 340 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
341 | } |
342 | snd_i2c_lock(cs8427->bus); | |
343 | chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK; | |
e957ebf1 JK |
344 | if (aes3input) |
345 | chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT; | |
97f02e05 TI |
346 | snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, |
347 | chip->regmap[CS8427_REG_CLOCKSOURCE]); | |
1da177e4 LT |
348 | snd_i2c_unlock(cs8427->bus); |
349 | } | |
350 | ||
97f02e05 TI |
351 | static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol, |
352 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
353 | { |
354 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
355 | uinfo->count = 1; | |
356 | uinfo->value.integer.min = 0; | |
357 | uinfo->value.integer.max = 255; | |
358 | return 0; | |
359 | } | |
360 | ||
97f02e05 TI |
361 | static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol, |
362 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 363 | { |
97f02e05 | 364 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
365 | int data; |
366 | ||
367 | snd_i2c_lock(device->bus); | |
368 | data = snd_cs8427_reg_read(device, kcontrol->private_value); | |
369 | snd_i2c_unlock(device->bus); | |
370 | if (data < 0) | |
371 | return data; | |
372 | ucontrol->value.integer.value[0] = data; | |
373 | return 0; | |
374 | } | |
375 | ||
97f02e05 TI |
376 | static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol, |
377 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
378 | { |
379 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
380 | uinfo->count = 10; | |
381 | return 0; | |
382 | } | |
383 | ||
97f02e05 TI |
384 | static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol, |
385 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 386 | { |
97f02e05 | 387 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
388 | unsigned char reg = CS8427_REG_QSUBCODE; |
389 | int err; | |
390 | ||
391 | snd_i2c_lock(device->bus); | |
392 | if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) { | |
cc63935f TI |
393 | snd_printk(KERN_ERR "unable to send register 0x%x byte " |
394 | "to CS8427\n", reg); | |
1da177e4 LT |
395 | snd_i2c_unlock(device->bus); |
396 | return err < 0 ? err : -EIO; | |
397 | } | |
cc63935f TI |
398 | err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10); |
399 | if (err != 10) { | |
400 | snd_printk(KERN_ERR "unable to read Q-subcode bytes " | |
401 | "from CS8427\n"); | |
1da177e4 LT |
402 | snd_i2c_unlock(device->bus); |
403 | return err < 0 ? err : -EIO; | |
404 | } | |
405 | snd_i2c_unlock(device->bus); | |
406 | return 0; | |
407 | } | |
408 | ||
cc63935f TI |
409 | static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol, |
410 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
411 | { |
412 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
413 | uinfo->count = 1; | |
414 | return 0; | |
415 | } | |
416 | ||
97f02e05 TI |
417 | static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol, |
418 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 419 | { |
97f02e05 TI |
420 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
421 | struct cs8427 *chip = device->private_data; | |
1da177e4 LT |
422 | |
423 | snd_i2c_lock(device->bus); | |
424 | memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24); | |
425 | snd_i2c_unlock(device->bus); | |
426 | return 0; | |
427 | } | |
428 | ||
97f02e05 TI |
429 | static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol, |
430 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 431 | { |
97f02e05 TI |
432 | struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol); |
433 | struct cs8427 *chip = device->private_data; | |
434 | unsigned char *status = kcontrol->private_value ? | |
435 | chip->playback.pcm_status : chip->playback.def_status; | |
436 | struct snd_pcm_runtime *runtime = chip->playback.substream ? | |
437 | chip->playback.substream->runtime : NULL; | |
1da177e4 LT |
438 | int err, change; |
439 | ||
440 | snd_i2c_lock(device->bus); | |
441 | change = memcmp(ucontrol->value.iec958.status, status, 24) != 0; | |
442 | memcpy(status, ucontrol->value.iec958.status, 24); | |
cc63935f TI |
443 | if (change && (kcontrol->private_value ? |
444 | runtime != NULL : runtime == NULL)) { | |
1da177e4 LT |
445 | err = snd_cs8427_send_corudata(device, 0, status, 24); |
446 | if (err < 0) | |
447 | change = err; | |
448 | } | |
449 | snd_i2c_unlock(device->bus); | |
450 | return change; | |
451 | } | |
452 | ||
97f02e05 TI |
453 | static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol, |
454 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
455 | { |
456 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
457 | uinfo->count = 1; | |
458 | return 0; | |
459 | } | |
460 | ||
97f02e05 TI |
461 | static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol, |
462 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
463 | { |
464 | memset(ucontrol->value.iec958.status, 0xff, 24); | |
465 | return 0; | |
466 | } | |
467 | ||
97f02e05 | 468 | static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = { |
1da177e4 LT |
469 | { |
470 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
471 | .info = snd_cs8427_in_status_info, | |
472 | .name = "IEC958 CS8427 Input Status", | |
cc63935f TI |
473 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
474 | SNDRV_CTL_ELEM_ACCESS_VOLATILE), | |
1da177e4 LT |
475 | .get = snd_cs8427_in_status_get, |
476 | .private_value = 15, | |
477 | }, | |
478 | { | |
479 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
480 | .info = snd_cs8427_in_status_info, | |
481 | .name = "IEC958 CS8427 Error Status", | |
cc63935f TI |
482 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
483 | SNDRV_CTL_ELEM_ACCESS_VOLATILE), | |
1da177e4 LT |
484 | .get = snd_cs8427_in_status_get, |
485 | .private_value = 16, | |
486 | }, | |
487 | { | |
488 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
489 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
490 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), | |
491 | .info = snd_cs8427_spdif_mask_info, | |
492 | .get = snd_cs8427_spdif_mask_get, | |
493 | }, | |
494 | { | |
495 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
496 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | |
497 | .info = snd_cs8427_spdif_info, | |
498 | .get = snd_cs8427_spdif_get, | |
499 | .put = snd_cs8427_spdif_put, | |
500 | .private_value = 0 | |
501 | }, | |
502 | { | |
cc63935f TI |
503 | .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | |
504 | SNDRV_CTL_ELEM_ACCESS_INACTIVE), | |
1da177e4 LT |
505 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, |
506 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), | |
507 | .info = snd_cs8427_spdif_info, | |
508 | .get = snd_cs8427_spdif_get, | |
509 | .put = snd_cs8427_spdif_put, | |
510 | .private_value = 1 | |
511 | }, | |
512 | { | |
513 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
514 | .info = snd_cs8427_qsubcode_info, | |
515 | .name = "IEC958 Q-subcode Capture Default", | |
cc63935f TI |
516 | .access = (SNDRV_CTL_ELEM_ACCESS_READ | |
517 | SNDRV_CTL_ELEM_ACCESS_VOLATILE), | |
1da177e4 LT |
518 | .get = snd_cs8427_qsubcode_get |
519 | }}; | |
520 | ||
97f02e05 TI |
521 | int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427, |
522 | struct snd_pcm_substream *play_substream, | |
523 | struct snd_pcm_substream *cap_substream) | |
1da177e4 | 524 | { |
97f02e05 TI |
525 | struct cs8427 *chip = cs8427->private_data; |
526 | struct snd_kcontrol *kctl; | |
1da177e4 LT |
527 | unsigned int idx; |
528 | int err; | |
529 | ||
5e246b85 TI |
530 | if (snd_BUG_ON(!play_substream || !cap_substream)) |
531 | return -EINVAL; | |
1da177e4 LT |
532 | for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) { |
533 | kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427); | |
534 | if (kctl == NULL) | |
535 | return -ENOMEM; | |
536 | kctl->id.device = play_substream->pcm->device; | |
537 | kctl->id.subdevice = play_substream->number; | |
538 | err = snd_ctl_add(cs8427->bus->card, kctl); | |
539 | if (err < 0) | |
540 | return err; | |
cc63935f TI |
541 | if (! strcmp(kctl->id.name, |
542 | SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM))) | |
1da177e4 LT |
543 | chip->playback.pcm_ctl = kctl; |
544 | } | |
545 | ||
546 | chip->playback.substream = play_substream; | |
547 | chip->capture.substream = cap_substream; | |
5e246b85 TI |
548 | if (snd_BUG_ON(!chip->playback.pcm_ctl)) |
549 | return -EIO; | |
1da177e4 LT |
550 | return 0; |
551 | } | |
552 | ||
cc63935f TI |
553 | EXPORT_SYMBOL(snd_cs8427_iec958_build); |
554 | ||
97f02e05 | 555 | int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active) |
1da177e4 | 556 | { |
97f02e05 | 557 | struct cs8427 *chip; |
1da177e4 | 558 | |
5e246b85 TI |
559 | if (snd_BUG_ON(!cs8427)) |
560 | return -ENXIO; | |
1da177e4 LT |
561 | chip = cs8427->private_data; |
562 | if (active) | |
cc63935f TI |
563 | memcpy(chip->playback.pcm_status, |
564 | chip->playback.def_status, 24); | |
1da177e4 | 565 | chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
cc63935f TI |
566 | snd_ctl_notify(cs8427->bus->card, |
567 | SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, | |
568 | &chip->playback.pcm_ctl->id); | |
1da177e4 LT |
569 | return 0; |
570 | } | |
571 | ||
cc63935f TI |
572 | EXPORT_SYMBOL(snd_cs8427_iec958_active); |
573 | ||
97f02e05 | 574 | int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate) |
1da177e4 | 575 | { |
97f02e05 | 576 | struct cs8427 *chip; |
1da177e4 LT |
577 | char *status; |
578 | int err, reset; | |
579 | ||
5e246b85 TI |
580 | if (snd_BUG_ON(!cs8427)) |
581 | return -ENXIO; | |
1da177e4 LT |
582 | chip = cs8427->private_data; |
583 | status = chip->playback.pcm_status; | |
584 | snd_i2c_lock(cs8427->bus); | |
585 | if (status[0] & IEC958_AES0_PROFESSIONAL) { | |
586 | status[0] &= ~IEC958_AES0_PRO_FS; | |
587 | switch (rate) { | |
588 | case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break; | |
589 | case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break; | |
590 | case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break; | |
591 | default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break; | |
592 | } | |
593 | } else { | |
594 | status[3] &= ~IEC958_AES3_CON_FS; | |
595 | switch (rate) { | |
596 | case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break; | |
597 | case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break; | |
598 | case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break; | |
599 | } | |
600 | } | |
601 | err = snd_cs8427_send_corudata(cs8427, 0, status, 24); | |
602 | if (err > 0) | |
603 | snd_ctl_notify(cs8427->bus->card, | |
604 | SNDRV_CTL_EVENT_MASK_VALUE, | |
605 | &chip->playback.pcm_ctl->id); | |
606 | reset = chip->rate != rate; | |
607 | chip->rate = rate; | |
608 | snd_i2c_unlock(cs8427->bus); | |
609 | if (reset) | |
610 | snd_cs8427_reset(cs8427); | |
611 | return err < 0 ? err : 0; | |
612 | } | |
613 | ||
cc63935f TI |
614 | EXPORT_SYMBOL(snd_cs8427_iec958_pcm); |
615 | ||
1da177e4 LT |
616 | static int __init alsa_cs8427_module_init(void) |
617 | { | |
618 | return 0; | |
619 | } | |
620 | ||
621 | static void __exit alsa_cs8427_module_exit(void) | |
622 | { | |
623 | } | |
624 | ||
625 | module_init(alsa_cs8427_module_init) | |
626 | module_exit(alsa_cs8427_module_exit) |