[deliverable/linux.git] / sound / i2c / other / ak4117.c

/*
 *  Routines for control of the AK4117 via 4-wire serial interface
 *  IEC958 (S/PDIF) receiver by Asahi Kasei
 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
 *
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */

#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/pcm.h>
#include <sound/ak4117.h>
#include <sound/asoundef.h>

MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
MODULE_LICENSE("GPL");

#define AK4117_ADDR			0x00 /* fixed address */

static void snd_ak4117_timer(unsigned long data);

static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
{
	ak4117->write(ak4117->private_data, reg, val);
	if (reg < sizeof(ak4117->regmap))
		ak4117->regmap[reg] = val;
}

static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
{
	return ak4117->read(ak4117->private_data, reg);
}

#if 0
static void reg_dump(struct ak4117 *ak4117)
{
	int i;

	printk(KERN_DEBUG "AK4117 REG DUMP:\n");
	for (i = 0; i < 0x1b; i++)
		printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
}
#endif

static void snd_ak4117_free(struct ak4117 *chip)
{
	del_timer_sync(&chip->timer);
	kfree(chip);
}

static int snd_ak4117_dev_free(struct snd_device *device)
{
	struct ak4117 *chip = device->device_data;
	snd_ak4117_free(chip);
	return 0;
}

int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
		      const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
{
	struct ak4117 *chip;
	int err = 0;
	unsigned char reg;
	static struct snd_device_ops ops = {
		.dev_free =     snd_ak4117_dev_free,
	};

	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
	if (chip == NULL)
		return -ENOMEM;
	spin_lock_init(&chip->lock);
	chip->card = card;
	chip->read = read;
	chip->write = write;
	chip->private_data = private_data;
	setup_timer(&chip->timer, snd_ak4117_timer, (unsigned long)chip);

	for (reg = 0; reg < 5; reg++)
		chip->regmap[reg] = pgm[reg];
	snd_ak4117_reinit(chip);

	chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
	chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
	chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);

	if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
		goto __fail;

	if (r_ak4117)
		*r_ak4117 = chip;
	return 0;

      __fail:
	snd_ak4117_free(chip);
	return err < 0 ? err : -EIO;
}

void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
{
	if (reg >= 5)
		return;
	reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
}

void snd_ak4117_reinit(struct ak4117 *chip)
{
	unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;

	del_timer(&chip->timer);
	chip->init = 1;
	/* bring the chip to reset state and powerdown state */
	reg_write(chip, AK4117_REG_PWRDN, 0);
	udelay(200);
	/* release reset, but leave powerdown */
	reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
	udelay(200);
	for (reg = 1; reg < 5; reg++)
		reg_write(chip, reg, chip->regmap[reg]);
	/* release powerdown, everything is initialized now */
	reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
	chip->init = 0;
	mod_timer(&chip->timer, 1 + jiffies);
}

static unsigned int external_rate(unsigned char rcs1)
{
	switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
	case AK4117_FS_32000HZ: return 32000;
	case AK4117_FS_44100HZ: return 44100;
	case AK4117_FS_48000HZ: return 48000;
	case AK4117_FS_88200HZ: return 88200;
	case AK4117_FS_96000HZ: return 96000;
	case AK4117_FS_176400HZ: return 176400;
	case AK4117_FS_192000HZ: return 192000;
	default:		return 0;
	}
}

static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
				    struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	uinfo->count = 1;
	uinfo->value.integer.min = 0;
	uinfo->value.integer.max = LONG_MAX;
	return 0;
}

static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
				   struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
	long *ptr;

	spin_lock_irq(&chip->lock);
	ptr = (long *)(((char *)chip) + kcontrol->private_value);
	ucontrol->value.integer.value[0] = *ptr;
	*ptr = 0;
	spin_unlock_irq(&chip->lock);
	return 0;
}

#define snd_ak4117_in_bit_info		snd_ctl_boolean_mono_info

static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
	unsigned char reg = kcontrol->private_value & 0xff;
	unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
	unsigned char inv = (kcontrol->private_value >> 31) & 1;

	ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
	return 0;
}

static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
			      struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	uinfo->count = 1;
	uinfo->value.integer.min = 0;
	uinfo->value.integer.max = 1;
	return 0;
}

static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
			     struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);

	ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
	return 0;
}

static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
			     struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
	int change;
	u8 old_val;
	
	spin_lock_irq(&chip->lock);
	old_val = chip->regmap[AK4117_REG_IO];
	change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
	if (change)
		reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
	spin_unlock_irq(&chip->lock);
	return change;
}

static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
				struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	uinfo->count = 1;
	uinfo->value.integer.min = 0;
	uinfo->value.integer.max = 192000;
	return 0;
}

static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
			       struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);

	ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
	return 0;
}

static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
	uinfo->count = 1;
	return 0;
}

static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
				struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
	unsigned i;

	for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
		ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
	return 0;
}

static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
	uinfo->count = 1;
	return 0;
}

static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
				      struct snd_ctl_elem_value *ucontrol)
{
	memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
	return 0;
}

static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	uinfo->value.integer.min = 0;
	uinfo->value.integer.max = 0xffff;
	uinfo->count = 4;
	return 0;
}

static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
	unsigned short tmp;

	ucontrol->value.integer.value[0] = 0xf8f2;
	ucontrol->value.integer.value[1] = 0x4e1f;
	tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
	ucontrol->value.integer.value[2] = tmp;
	tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
	ucontrol->value.integer.value[3] = tmp;
	return 0;
}

static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
	uinfo->count = AK4117_REG_QSUB_SIZE;
	return 0;
}

static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{
	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
	unsigned i;

	for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
		ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
	return 0;
}

/* Don't forget to change AK4117_CONTROLS define!!! */
static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 Parity Errors",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_error_info,
	.get =		snd_ak4117_in_error_get,
	.private_value = offsetof(struct ak4117, parity_errors),
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 V-Bit Errors",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_error_info,
	.get =		snd_ak4117_in_error_get,
	.private_value = offsetof(struct ak4117, v_bit_errors),
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 C-CRC Errors",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_error_info,
	.get =		snd_ak4117_in_error_get,
	.private_value = offsetof(struct ak4117, ccrc_errors),
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 Q-CRC Errors",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_error_info,
	.get =		snd_ak4117_in_error_get,
	.private_value = offsetof(struct ak4117, qcrc_errors),
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 External Rate",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_rate_info,
	.get =		snd_ak4117_rate_get,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
	.info =		snd_ak4117_spdif_mask_info,
	.get =		snd_ak4117_spdif_mask_get,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_spdif_info,
	.get =		snd_ak4117_spdif_get,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 Preamble Capture Default",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_spdif_pinfo,
	.get =		snd_ak4117_spdif_pget,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 Q-subcode Capture Default",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_spdif_qinfo,
	.get =		snd_ak4117_spdif_qget,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 Audio",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_bit_info,
	.get =		snd_ak4117_in_bit_get,
	.private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 Non-PCM Bitstream",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_bit_info,
	.get =		snd_ak4117_in_bit_get,
	.private_value = (5<<8) | AK4117_REG_RCS1,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"IEC958 DTS Bitstream",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.info =		snd_ak4117_in_bit_info,
	.get =		snd_ak4117_in_bit_get,
	.private_value = (6<<8) | AK4117_REG_RCS1,
},
{
	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
	.name =		"AK4117 Input Select",
	.access =	SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
	.info =		snd_ak4117_rx_info,
	.get =		snd_ak4117_rx_get,
	.put =		snd_ak4117_rx_put,
}
};

int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
{
	struct snd_kcontrol *kctl;
	unsigned int idx;
	int err;

	if (snd_BUG_ON(!cap_substream))
		return -EINVAL;
	ak4117->substream = cap_substream;
	for (idx = 0; idx < AK4117_CONTROLS; idx++) {
		kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
		if (kctl == NULL)
			return -ENOMEM;
		kctl->id.device = cap_substream->pcm->device;
		kctl->id.subdevice = cap_substream->number;
		err = snd_ctl_add(ak4117->card, kctl);
		if (err < 0)
			return err;
		ak4117->kctls[idx] = kctl;
	}
	return 0;
}

int snd_ak4117_external_rate(struct ak4117 *ak4117)
{
	unsigned char rcs1;

	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
	return external_rate(rcs1);
}

int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
{
	struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
	unsigned long _flags;
	int res = 0;
	unsigned char rcs0, rcs1, rcs2;
	unsigned char c0, c1;

	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
	if (flags & AK4117_CHECK_NO_STAT)
		goto __rate;
	rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
	rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
	// printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
	spin_lock_irqsave(&ak4117->lock, _flags);
	if (rcs0 & AK4117_PAR)
		ak4117->parity_errors++;
	if (rcs0 & AK4117_V)
		ak4117->v_bit_errors++;
	if (rcs2 & AK4117_CCRC)
		ak4117->ccrc_errors++;
	if (rcs2 & AK4117_QCRC)
		ak4117->qcrc_errors++;
	c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
                     (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
	c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
	             (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
	ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
	ak4117->rcs1 = rcs1;
	ak4117->rcs2 = rcs2;
	spin_unlock_irqrestore(&ak4117->lock, _flags);

	if (rcs0 & AK4117_PAR)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
	if (rcs0 & AK4117_V)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
	if (rcs2 & AK4117_CCRC)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
	if (rcs2 & AK4117_QCRC)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);

	/* rate change */
	if (c1 & 0x0f)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);

	if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
	if (c0 & AK4117_QINT)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);

	if (c0 & AK4117_AUDION)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
	if (c1 & AK4117_NPCM)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
	if (c1 & AK4117_DTSCD)
		snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
		
	if (ak4117->change_callback && (c0 | c1) != 0)
		ak4117->change_callback(ak4117, c0, c1);

      __rate:
	/* compare rate */
	res = external_rate(rcs1);
	if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
		snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
		if (snd_pcm_running(ak4117->substream)) {
			// printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
			snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
			wake_up(&runtime->sleep);
			res = 1;
		}
		snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
	}
	return res;
}

static void snd_ak4117_timer(unsigned long data)
{
	struct ak4117 *chip = (struct ak4117 *)data;

	if (chip->init)
		return;
	snd_ak4117_check_rate_and_errors(chip, 0);
	mod_timer(&chip->timer, 1 + jiffies);
}

EXPORT_SYMBOL(snd_ak4117_create);
EXPORT_SYMBOL(snd_ak4117_reg_write);
EXPORT_SYMBOL(snd_ak4117_reinit);
EXPORT_SYMBOL(snd_ak4117_build);
EXPORT_SYMBOL(snd_ak4117_external_rate);
EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Routines for control of the AK4117 via 4-wire serial interface
	3	* IEC958 (S/PDIF) receiver by Asahi Kasei
c1017a4c	4	* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 LT	5	*
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*
	21	*/
	22
1da177e4 LT	23	#include <linux/slab.h>
1da177e4 LT	24	#include <linux/delay.h>
da155d5b	25	#include <linux/module.h>
1da177e4 LT	26	#include <sound/core.h>
	27	#include <sound/control.h>
	28	#include <sound/pcm.h>
	29	#include <sound/ak4117.h>
	30	#include <sound/asoundef.h>
	31
c1017a4c	32	MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
1da177e4 LT	33	MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
	34	MODULE_LICENSE("GPL");
	35
	36	#define AK4117_ADDR 0x00 /* fixed address */
	37
	38	static void snd_ak4117_timer(unsigned long data);
	39
97f02e05	40	static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
1da177e4 LT	41	{
	42	ak4117->write(ak4117->private_data, reg, val);
	43	if (reg < sizeof(ak4117->regmap))
	44	ak4117->regmap[reg] = val;
	45	}
	46
97f02e05	47	static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
1da177e4 LT	48	{
	49	return ak4117->read(ak4117->private_data, reg);
	50	}
	51
	52	#if 0
97f02e05	53	static void reg_dump(struct ak4117 *ak4117)
1da177e4 LT	54	{
	55	int i;
	56
99b359ba	57	printk(KERN_DEBUG "AK4117 REG DUMP:\n");
1da177e4	58	for (i = 0; i < 0x1b; i++)
99b359ba	59	printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
1da177e4 LT	60	}
	61	#endif
	62
97f02e05	63	static void snd_ak4117_free(struct ak4117 *chip)
1da177e4	64	{
115b94d5	65	del_timer_sync(&chip->timer);
1da177e4 LT	66	kfree(chip);
	67	}
	68
97f02e05	69	static int snd_ak4117_dev_free(struct snd_device *device)
1da177e4	70	{
97f02e05	71	struct ak4117 *chip = device->device_data;
1da177e4 LT	72	snd_ak4117_free(chip);
	73	return 0;
	74	}
	75
97f02e05	76	int snd_ak4117_create(struct snd_card card, ak4117_read_t read, ak4117_write_t *write,
517400cb	77	const unsigned char pgm[5], void private_data, struct ak4117 *r_ak4117)
1da177e4	78	{
97f02e05	79	struct ak4117 *chip;
1da177e4 LT	80	int err = 0;
1da177e4 LT	81	unsigned char reg;
97f02e05	82	static struct snd_device_ops ops = {
1da177e4 LT	83	.dev_free = snd_ak4117_dev_free,
	84	};
	85
561b220a	86	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4 LT	87	if (chip == NULL)
	88	return -ENOMEM;
	89	spin_lock_init(&chip->lock);
	90	chip->card = card;
	91	chip->read = read;
	92	chip->write = write;
	93	chip->private_data = private_data;
867a0e05	94	setup_timer(&chip->timer, snd_ak4117_timer, (unsigned long)chip);
1da177e4 LT	95
	96	for (reg = 0; reg < 5; reg++)
	97	chip->regmap[reg] = pgm[reg];
	98	snd_ak4117_reinit(chip);
	99
	100	chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT \| AK4117_CINT \| AK4117_STC);
	101	chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
	102	chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
	103
	104	if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
	105	goto __fail;
	106
	107	if (r_ak4117)
	108	*r_ak4117 = chip;
	109	return 0;
	110
	111	__fail:
	112	snd_ak4117_free(chip);
	113	return err < 0 ? err : -EIO;
	114	}
	115
97f02e05	116	void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
1da177e4 LT	117	{
	118	if (reg >= 5)
	119	return;
	120	reg_write(chip, reg, (chip->regmap[reg] & ~mask) \| val);
	121	}
	122
97f02e05	123	void snd_ak4117_reinit(struct ak4117 *chip)
1da177e4 LT	124	{
	125	unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
	126
	127	del_timer(&chip->timer);
	128	chip->init = 1;
	129	/* bring the chip to reset state and powerdown state */
	130	reg_write(chip, AK4117_REG_PWRDN, 0);
	131	udelay(200);
	132	/* release reset, but leave powerdown */
	133	reg_write(chip, AK4117_REG_PWRDN, (old \| AK4117_RST) & ~AK4117_PWN);
	134	udelay(200);
	135	for (reg = 1; reg < 5; reg++)
	136	reg_write(chip, reg, chip->regmap[reg]);
	137	/* release powerdown, everything is initialized now */
	138	reg_write(chip, AK4117_REG_PWRDN, old \| AK4117_RST \| AK4117_PWN);
	139	chip->init = 0;
867a0e05	140	mod_timer(&chip->timer, 1 + jiffies);
1da177e4 LT	141	}
	142
	143	static unsigned int external_rate(unsigned char rcs1)
	144	{
	145	switch (rcs1 & (AK4117_FS0\|AK4117_FS1\|AK4117_FS2\|AK4117_FS3)) {
	146	case AK4117_FS_32000HZ: return 32000;
	147	case AK4117_FS_44100HZ: return 44100;
	148	case AK4117_FS_48000HZ: return 48000;
	149	case AK4117_FS_88200HZ: return 88200;
	150	case AK4117_FS_96000HZ: return 96000;
	151	case AK4117_FS_176400HZ: return 176400;
	152	case AK4117_FS_192000HZ: return 192000;
	153	default: return 0;
	154	}
	155	}
	156
97f02e05 TI	157	static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
97f02e05 TI	158	struct snd_ctl_elem_info *uinfo)
1da177e4 LT	159	{
	160	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	161	uinfo->count = 1;
	162	uinfo->value.integer.min = 0;
	163	uinfo->value.integer.max = LONG_MAX;
	164	return 0;
	165	}
	166
97f02e05 TI	167	static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
97f02e05 TI	168	struct snd_ctl_elem_value *ucontrol)
1da177e4	169	{
97f02e05	170	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	171	long *ptr;
	172
	173	spin_lock_irq(&chip->lock);
	174	ptr = (long )(((char )chip) + kcontrol->private_value);
	175	ucontrol->value.integer.value[0] = *ptr;
	176	*ptr = 0;
	177	spin_unlock_irq(&chip->lock);
	178	return 0;
	179	}
	180
a5ce8890	181	#define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info
1da177e4	182
97f02e05 TI	183	static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
97f02e05 TI	184	struct snd_ctl_elem_value *ucontrol)
1da177e4	185	{
97f02e05	186	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	187	unsigned char reg = kcontrol->private_value & 0xff;
	188	unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
	189	unsigned char inv = (kcontrol->private_value >> 31) & 1;
	190
	191	ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
	192	return 0;
	193	}
	194
97f02e05 TI	195	static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
97f02e05 TI	196	struct snd_ctl_elem_info *uinfo)
1da177e4 LT	197	{
	198	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	199	uinfo->count = 1;
	200	uinfo->value.integer.min = 0;
	201	uinfo->value.integer.max = 1;
	202	return 0;
	203	}
	204
97f02e05 TI	205	static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
97f02e05 TI	206	struct snd_ctl_elem_value *ucontrol)
1da177e4	207	{
97f02e05	208	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	209
	210	ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
	211	return 0;
	212	}
	213
97f02e05 TI	214	static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
97f02e05 TI	215	struct snd_ctl_elem_value *ucontrol)
1da177e4	216	{
97f02e05	217	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	218	int change;
	219	u8 old_val;
	220
	221	spin_lock_irq(&chip->lock);
	222	old_val = chip->regmap[AK4117_REG_IO];
	223	change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
	224	if (change)
	225	reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) \| (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
	226	spin_unlock_irq(&chip->lock);
	227	return change;
	228	}
	229
97f02e05 TI	230	static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
97f02e05 TI	231	struct snd_ctl_elem_info *uinfo)
1da177e4 LT	232	{
	233	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	234	uinfo->count = 1;
	235	uinfo->value.integer.min = 0;
	236	uinfo->value.integer.max = 192000;
	237	return 0;
	238	}
	239
97f02e05 TI	240	static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
97f02e05 TI	241	struct snd_ctl_elem_value *ucontrol)
1da177e4	242	{
97f02e05	243	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	244
	245	ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
	246	return 0;
	247	}
	248
97f02e05	249	static int snd_ak4117_spdif_info(struct snd_kcontrol kcontrol, struct snd_ctl_elem_info uinfo)
1da177e4 LT	250	{
	251	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
	252	uinfo->count = 1;
	253	return 0;
	254	}
	255
97f02e05 TI	256	static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
97f02e05 TI	257	struct snd_ctl_elem_value *ucontrol)
1da177e4	258	{
97f02e05	259	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	260	unsigned i;
	261
	262	for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
	263	ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
	264	return 0;
	265	}
	266
97f02e05	267	static int snd_ak4117_spdif_mask_info(struct snd_kcontrol kcontrol, struct snd_ctl_elem_info uinfo)
1da177e4 LT	268	{
	269	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
	270	uinfo->count = 1;
	271	return 0;
	272	}
	273
97f02e05 TI	274	static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
97f02e05 TI	275	struct snd_ctl_elem_value *ucontrol)
1da177e4 LT	276	{
	277	memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
	278	return 0;
	279	}
	280
97f02e05	281	static int snd_ak4117_spdif_pinfo(struct snd_kcontrol kcontrol, struct snd_ctl_elem_info uinfo)
1da177e4 LT	282	{
	283	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	284	uinfo->value.integer.min = 0;
	285	uinfo->value.integer.max = 0xffff;
	286	uinfo->count = 4;
	287	return 0;
	288	}
	289
97f02e05 TI	290	static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
97f02e05 TI	291	struct snd_ctl_elem_value *ucontrol)
1da177e4	292	{
97f02e05	293	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	294	unsigned short tmp;
	295
	296	ucontrol->value.integer.value[0] = 0xf8f2;
	297	ucontrol->value.integer.value[1] = 0x4e1f;
	298	tmp = reg_read(chip, AK4117_REG_Pc0) \| (reg_read(chip, AK4117_REG_Pc1) << 8);
	299	ucontrol->value.integer.value[2] = tmp;
	300	tmp = reg_read(chip, AK4117_REG_Pd0) \| (reg_read(chip, AK4117_REG_Pd1) << 8);
	301	ucontrol->value.integer.value[3] = tmp;
	302	return 0;
	303	}
	304
97f02e05	305	static int snd_ak4117_spdif_qinfo(struct snd_kcontrol kcontrol, struct snd_ctl_elem_info uinfo)
1da177e4 LT	306	{
	307	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
	308	uinfo->count = AK4117_REG_QSUB_SIZE;
	309	return 0;
	310	}
	311
97f02e05 TI	312	static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
97f02e05 TI	313	struct snd_ctl_elem_value *ucontrol)
1da177e4	314	{
97f02e05	315	struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
1da177e4 LT	316	unsigned i;
	317
	318	for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
	319	ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
	320	return 0;
	321	}
	322
	323	/* Don't forget to change AK4117_CONTROLS define!!! */
97f02e05	324	static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
1da177e4 LT	325	{
	326	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	327	.name = "IEC958 Parity Errors",
	328	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	329	.info = snd_ak4117_in_error_info,
	330	.get = snd_ak4117_in_error_get,
97f02e05	331	.private_value = offsetof(struct ak4117, parity_errors),
1da177e4 LT	332	},
	333	{
	334	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	335	.name = "IEC958 V-Bit Errors",
	336	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	337	.info = snd_ak4117_in_error_info,
	338	.get = snd_ak4117_in_error_get,
97f02e05	339	.private_value = offsetof(struct ak4117, v_bit_errors),
1da177e4 LT	340	},
	341	{
	342	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	343	.name = "IEC958 C-CRC Errors",
	344	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	345	.info = snd_ak4117_in_error_info,
	346	.get = snd_ak4117_in_error_get,
97f02e05	347	.private_value = offsetof(struct ak4117, ccrc_errors),
1da177e4 LT	348	},
	349	{
	350	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	351	.name = "IEC958 Q-CRC Errors",
	352	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	353	.info = snd_ak4117_in_error_info,
	354	.get = snd_ak4117_in_error_get,
97f02e05	355	.private_value = offsetof(struct ak4117, qcrc_errors),
1da177e4 LT	356	},
	357	{
	358	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	359	.name = "IEC958 External Rate",
	360	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	361	.info = snd_ak4117_rate_info,
	362	.get = snd_ak4117_rate_get,
	363	},
	364	{
	365	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	366	.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
	367	.access = SNDRV_CTL_ELEM_ACCESS_READ,
	368	.info = snd_ak4117_spdif_mask_info,
	369	.get = snd_ak4117_spdif_mask_get,
	370	},
	371	{
	372	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	373	.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
	374	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	375	.info = snd_ak4117_spdif_info,
	376	.get = snd_ak4117_spdif_get,
	377	},
	378	{
	379	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
ec8f53fb	380	.name = "IEC958 Preamble Capture Default",
1da177e4 LT	381	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	382	.info = snd_ak4117_spdif_pinfo,
	383	.get = snd_ak4117_spdif_pget,
	384	},
	385	{
	386	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	387	.name = "IEC958 Q-subcode Capture Default",
	388	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	389	.info = snd_ak4117_spdif_qinfo,
	390	.get = snd_ak4117_spdif_qget,
	391	},
	392	{
	393	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	394	.name = "IEC958 Audio",
	395	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	396	.info = snd_ak4117_in_bit_info,
	397	.get = snd_ak4117_in_bit_get,
	398	.private_value = (1<<31) \| (3<<8) \| AK4117_REG_RCS0,
	399	},
	400	{
	401	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	402	.name = "IEC958 Non-PCM Bitstream",
	403	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	404	.info = snd_ak4117_in_bit_info,
	405	.get = snd_ak4117_in_bit_get,
	406	.private_value = (5<<8) \| AK4117_REG_RCS1,
	407	},
	408	{
	409	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	410	.name = "IEC958 DTS Bitstream",
	411	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	412	.info = snd_ak4117_in_bit_info,
	413	.get = snd_ak4117_in_bit_get,
	414	.private_value = (6<<8) \| AK4117_REG_RCS1,
	415	},
	416	{
	417	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	418	.name = "AK4117 Input Select",
	419	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_WRITE,
	420	.info = snd_ak4117_rx_info,
	421	.get = snd_ak4117_rx_get,
	422	.put = snd_ak4117_rx_put,
	423	}
	424	};
	425
97f02e05	426	int snd_ak4117_build(struct ak4117 ak4117, struct snd_pcm_substream cap_substream)
1da177e4	427	{
97f02e05	428	struct snd_kcontrol *kctl;
1da177e4 LT	429	unsigned int idx;
	430	int err;
	431
5e246b85 TI	432	if (snd_BUG_ON(!cap_substream))
5e246b85 TI	433	return -EINVAL;
1da177e4 LT	434	ak4117->substream = cap_substream;
	435	for (idx = 0; idx < AK4117_CONTROLS; idx++) {
	436	kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
	437	if (kctl == NULL)
	438	return -ENOMEM;
	439	kctl->id.device = cap_substream->pcm->device;
	440	kctl->id.subdevice = cap_substream->number;
	441	err = snd_ctl_add(ak4117->card, kctl);
	442	if (err < 0)
	443	return err;
	444	ak4117->kctls[idx] = kctl;
	445	}
	446	return 0;
	447	}
	448
97f02e05	449	int snd_ak4117_external_rate(struct ak4117 *ak4117)
1da177e4 LT	450	{
	451	unsigned char rcs1;
	452
	453	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
	454	return external_rate(rcs1);
	455	}
	456
97f02e05	457	int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
1da177e4	458	{
97f02e05	459	struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
1da177e4 LT	460	unsigned long _flags;
	461	int res = 0;
	462	unsigned char rcs0, rcs1, rcs2;
	463	unsigned char c0, c1;
	464
	465	rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
	466	if (flags & AK4117_CHECK_NO_STAT)
	467	goto __rate;
	468	rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
	469	rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
99b359ba	470	// printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
1da177e4 LT	471	spin_lock_irqsave(&ak4117->lock, _flags);
	472	if (rcs0 & AK4117_PAR)
	473	ak4117->parity_errors++;
	474	if (rcs0 & AK4117_V)
	475	ak4117->v_bit_errors++;
	476	if (rcs2 & AK4117_CCRC)
	477	ak4117->ccrc_errors++;
	478	if (rcs2 & AK4117_QCRC)
	479	ak4117->qcrc_errors++;
	480	c0 = (ak4117->rcs0 & (AK4117_QINT \| AK4117_CINT \| AK4117_STC \| AK4117_AUDION \| AK4117_AUTO \| AK4117_UNLCK)) ^
	481	(rcs0 & (AK4117_QINT \| AK4117_CINT \| AK4117_STC \| AK4117_AUDION \| AK4117_AUTO \| AK4117_UNLCK));
	482	c1 = (ak4117->rcs1 & (AK4117_DTSCD \| AK4117_NPCM \| AK4117_PEM \| 0x0f)) ^
	483	(rcs1 & (AK4117_DTSCD \| AK4117_NPCM \| AK4117_PEM \| 0x0f));
	484	ak4117->rcs0 = rcs0 & ~(AK4117_QINT \| AK4117_CINT \| AK4117_STC);
	485	ak4117->rcs1 = rcs1;
	486	ak4117->rcs2 = rcs2;
	487	spin_unlock_irqrestore(&ak4117->lock, _flags);
	488
	489	if (rcs0 & AK4117_PAR)
	490	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
	491	if (rcs0 & AK4117_V)
	492	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
	493	if (rcs2 & AK4117_CCRC)
	494	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
	495	if (rcs2 & AK4117_QCRC)
	496	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
	497
	498	/* rate change */
	499	if (c1 & 0x0f)
	500	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
	501
	502	if ((c1 & AK4117_PEM) \| (c0 & AK4117_CINT))
	503	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
	504	if (c0 & AK4117_QINT)
	505	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
	506
	507	if (c0 & AK4117_AUDION)
	508	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
	509	if (c1 & AK4117_NPCM)
	510	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
	511	if (c1 & AK4117_DTSCD)
	512	snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
	513
	514	if (ak4117->change_callback && (c0 \| c1) != 0)
	515	ak4117->change_callback(ak4117, c0, c1);
	516
	517	__rate:
	518	/* compare rate */
	519	res = external_rate(rcs1);
	520	if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
	521	snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
	522	if (snd_pcm_running(ak4117->substream)) {
99b359ba	523	// printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
1da177e4 LT	524	snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
	525	wake_up(&runtime->sleep);
	526	res = 1;
	527	}
	528	snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
	529	}
	530	return res;
	531	}
	532
	533	static void snd_ak4117_timer(unsigned long data)
	534	{
97f02e05	535	struct ak4117 chip = (struct ak4117 )data;
1da177e4 LT	536
	537	if (chip->init)
	538	return;
	539	snd_ak4117_check_rate_and_errors(chip, 0);
867a0e05	540	mod_timer(&chip->timer, 1 + jiffies);
1da177e4 LT	541	}
	542
	543	EXPORT_SYMBOL(snd_ak4117_create);
	544	EXPORT_SYMBOL(snd_ak4117_reg_write);
	545	EXPORT_SYMBOL(snd_ak4117_reinit);
	546	EXPORT_SYMBOL(snd_ak4117_build);
	547	EXPORT_SYMBOL(snd_ak4117_external_rate);
	548	EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);