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1da177e4 LT |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License as published by | |
4 | * the Free Software Foundation; either version 2 of the License, or | |
5 | * (at your option) any later version. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU Library General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
15 | */ | |
16 | ||
17 | #ifndef __SOUND_AU88X0_H | |
18 | #define __SOUND_AU88X0_H | |
19 | ||
20 | #ifdef __KERNEL__ | |
1da177e4 LT |
21 | #include <linux/pci.h> |
22 | #include <asm/io.h> | |
23 | #include <sound/core.h> | |
24 | #include <sound/pcm.h> | |
25 | #include <sound/rawmidi.h> | |
26 | #include <sound/mpu401.h> | |
27 | #include <sound/hwdep.h> | |
28 | #include <sound/ac97_codec.h> | |
bb92b7c4 | 29 | #include <sound/tlv.h> |
1da177e4 LT |
30 | #endif |
31 | ||
32 | #ifndef CHIP_AU8820 | |
33 | #include "au88x0_eq.h" | |
34 | #include "au88x0_a3d.h" | |
35 | #endif | |
36 | #ifndef CHIP_AU8810 | |
37 | #include "au88x0_wt.h" | |
38 | #endif | |
39 | ||
97c67b65 TI |
40 | #define hwread(x,y) readl((x)+(y)) |
41 | #define hwwrite(x,y,z) writel((z),(x)+(y)) | |
1da177e4 LT |
42 | |
43 | /* Vortex MPU401 defines. */ | |
44 | #define MIDI_CLOCK_DIV 0x61 | |
45 | /* Standart MPU401 defines. */ | |
46 | #define MPU401_RESET 0xff | |
47 | #define MPU401_ENTER_UART 0x3f | |
48 | #define MPU401_ACK 0xfe | |
49 | ||
50 | // Get src register value to convert from x to y. | |
51 | #define SRC_RATIO(x,y) ((((x<<15)/y) + 1)/2) | |
52 | ||
53 | /* FIFO software state constants. */ | |
54 | #define FIFO_STOP 0 | |
55 | #define FIFO_START 1 | |
56 | #define FIFO_PAUSE 2 | |
57 | ||
58 | /* IRQ flags */ | |
59 | #define IRQ_ERR_MASK 0x00ff | |
60 | #define IRQ_FATAL 0x0001 | |
61 | #define IRQ_PARITY 0x0002 | |
62 | #define IRQ_REG 0x0004 | |
63 | #define IRQ_FIFO 0x0008 | |
64 | #define IRQ_DMA 0x0010 | |
65 | #define IRQ_PCMOUT 0x0020 /* PCM OUT page crossing */ | |
66 | #define IRQ_TIMER 0x1000 | |
67 | #define IRQ_MIDI 0x2000 | |
68 | #define IRQ_MODEM 0x4000 | |
69 | ||
70 | /* ADB Resource */ | |
71 | #define VORTEX_RESOURCE_DMA 0x00000000 | |
72 | #define VORTEX_RESOURCE_SRC 0x00000001 | |
73 | #define VORTEX_RESOURCE_MIXIN 0x00000002 | |
74 | #define VORTEX_RESOURCE_MIXOUT 0x00000003 | |
75 | #define VORTEX_RESOURCE_A3D 0x00000004 | |
76 | #define VORTEX_RESOURCE_LAST 0x00000005 | |
77 | ||
f2b31737 SK |
78 | /* codec io: VORTEX_CODEC_IO bits */ |
79 | #define VORTEX_CODEC_ID_SHIFT 24 | |
80 | #define VORTEX_CODEC_WRITE 0x00800000 | |
81 | #define VORTEX_CODEC_ADDSHIFT 16 | |
82 | #define VORTEX_CODEC_ADDMASK 0x7f0000 | |
83 | #define VORTEX_CODEC_DATSHIFT 0 | |
84 | #define VORTEX_CODEC_DATMASK 0xffff | |
85 | ||
1da177e4 LT |
86 | /* Check for SDAC bit in "Extended audio ID" AC97 register */ |
87 | //#define VORTEX_IS_QUAD(x) (((x)->codec == NULL) ? 0 : ((x)->codec->ext_id&0x80)) | |
88 | #define VORTEX_IS_QUAD(x) ((x)->isquad) | |
89 | /* Check if chip has bug. */ | |
90 | #define IS_BAD_CHIP(x) (\ | |
91 | (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_VORTEX_2) || \ | |
92 | (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_ADVANTAGE)) | |
93 | ||
94 | ||
95 | /* PCM devices */ | |
96 | #define VORTEX_PCM_ADB 0 | |
97 | #define VORTEX_PCM_SPDIF 1 | |
98 | #define VORTEX_PCM_A3D 2 | |
99 | #define VORTEX_PCM_WT 3 | |
100 | #define VORTEX_PCM_I2S 4 | |
101 | #define VORTEX_PCM_LAST 5 | |
102 | ||
103 | #define MIX_CAPT(x) (vortex->mixcapt[x]) | |
104 | #define MIX_PLAYB(x) (vortex->mixplayb[x]) | |
105 | #define MIX_SPDIF(x) (vortex->mixspdif[x]) | |
106 | ||
25985edc | 107 | #define NR_WTPB 0x20 /* WT channels per each bank. */ |
49b9c40e | 108 | #define NR_PCM 0x10 |
1da177e4 | 109 | |
bb92b7c4 RY |
110 | struct pcm_vol { |
111 | struct snd_kcontrol *kctl; | |
112 | int active; | |
113 | int dma; | |
114 | int mixin[4]; | |
115 | int vol[4]; | |
116 | }; | |
117 | ||
1da177e4 LT |
118 | /* Structs */ |
119 | typedef struct { | |
120 | //int this_08; /* Still unknown */ | |
121 | int fifo_enabled; /* this_24 */ | |
122 | int fifo_status; /* this_1c */ | |
97c67b65 | 123 | u32 dma_ctrl; /* this_78 (ADB), this_7c (WT) */ |
1da177e4 LT |
124 | int dma_unknown; /* this_74 (ADB), this_78 (WT). WDM: +8 */ |
125 | int cfg0; | |
126 | int cfg1; | |
127 | ||
128 | int nr_ch; /* Nr of PCM channels in use */ | |
129 | int type; /* Output type (ac97, a3d, spdif, i2s, dsp) */ | |
130 | int dma; /* Hardware DMA index. */ | |
131 | int dir; /* Stream Direction. */ | |
132 | u32 resources[5]; | |
133 | ||
134 | /* Virtual page extender stuff */ | |
135 | int nr_periods; | |
136 | int period_bytes; | |
1da177e4 LT |
137 | int period_real; |
138 | int period_virt; | |
139 | ||
2fd16874 | 140 | struct snd_pcm_substream *substream; |
1da177e4 LT |
141 | } stream_t; |
142 | ||
143 | typedef struct snd_vortex vortex_t; | |
144 | struct snd_vortex { | |
145 | /* ALSA structs. */ | |
2fd16874 TI |
146 | struct snd_card *card; |
147 | struct snd_pcm *pcm[VORTEX_PCM_LAST]; | |
1da177e4 | 148 | |
2fd16874 TI |
149 | struct snd_rawmidi *rmidi; /* Legacy Midi interface. */ |
150 | struct snd_ac97 *codec; | |
1da177e4 LT |
151 | |
152 | /* Stream structs. */ | |
153 | stream_t dma_adb[NR_ADB]; | |
154 | int spdif_sr; | |
155 | #ifndef CHIP_AU8810 | |
156 | stream_t dma_wt[NR_WT]; | |
157 | wt_voice_t wt_voice[NR_WT]; /* WT register cache. */ | |
158 | char mixwt[(NR_WT / NR_WTPB) * 6]; /* WT mixin objects */ | |
159 | #endif | |
160 | ||
161 | /* Global resources */ | |
162 | s8 mixcapt[2]; | |
163 | s8 mixplayb[4]; | |
164 | #ifndef CHIP_AU8820 | |
165 | s8 mixspdif[2]; | |
166 | s8 mixa3d[2]; /* mixers which collect all a3d streams. */ | |
167 | s8 mixxtlk[2]; /* crosstalk canceler mixer inputs. */ | |
168 | #endif | |
169 | u32 fixed_res[5]; | |
170 | ||
171 | #ifndef CHIP_AU8820 | |
172 | /* Hardware equalizer structs */ | |
173 | eqlzr_t eq; | |
174 | /* A3D structs */ | |
175 | a3dsrc_t a3d[NR_A3D]; | |
176 | /* Xtalk canceler */ | |
177 | int xt_mode; /* 1: speakers, 0:headphones. */ | |
178 | #endif | |
bb92b7c4 | 179 | struct pcm_vol pcm_vol[NR_PCM]; |
1da177e4 LT |
180 | |
181 | int isquad; /* cache of extended ID codec flag. */ | |
182 | ||
183 | /* Gameport stuff. */ | |
184 | struct gameport *gameport; | |
185 | ||
186 | /* PCI hardware resources */ | |
187 | unsigned long io; | |
97c67b65 | 188 | void __iomem *mmio; |
1da177e4 LT |
189 | unsigned int irq; |
190 | spinlock_t lock; | |
191 | ||
192 | /* PCI device */ | |
193 | struct pci_dev *pci_dev; | |
194 | u16 vendor; | |
195 | u16 device; | |
196 | u8 rev; | |
197 | }; | |
198 | ||
199 | /* Functions. */ | |
200 | ||
201 | /* SRC */ | |
202 | static void vortex_adb_setsrc(vortex_t * vortex, int adbdma, | |
203 | unsigned int cvrt, int dir); | |
204 | ||
205 | /* DMA Engines. */ | |
206 | static void vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma, | |
77a23f26 | 207 | int size, int count); |
1da177e4 LT |
208 | static void vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie, |
209 | int dir, int fmt, int d, | |
97c67b65 | 210 | u32 offset); |
1da177e4 LT |
211 | static void vortex_adbdma_setstartbuffer(vortex_t * vortex, int adbdma, int sb); |
212 | #ifndef CHIP_AU8810 | |
213 | static void vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma, | |
77a23f26 | 214 | int size, int count); |
1da177e4 | 215 | static void vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d, /*int e, */ |
97c67b65 | 216 | u32 offset); |
1da177e4 LT |
217 | static void vortex_wtdma_setstartbuffer(vortex_t * vortex, int wtdma, int sb); |
218 | #endif | |
219 | ||
220 | static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma); | |
221 | //static void vortex_adbdma_stopfifo(vortex_t *vortex, int adbdma); | |
222 | static void vortex_adbdma_pausefifo(vortex_t * vortex, int adbdma); | |
223 | static void vortex_adbdma_resumefifo(vortex_t * vortex, int adbdma); | |
42b16b3f | 224 | static inline int vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma); |
1da177e4 LT |
225 | static void vortex_adbdma_resetup(vortex_t *vortex, int adbdma); |
226 | ||
227 | #ifndef CHIP_AU8810 | |
228 | static void vortex_wtdma_startfifo(vortex_t * vortex, int wtdma); | |
229 | static void vortex_wtdma_stopfifo(vortex_t * vortex, int wtdma); | |
230 | static void vortex_wtdma_pausefifo(vortex_t * vortex, int wtdma); | |
231 | static void vortex_wtdma_resumefifo(vortex_t * vortex, int wtdma); | |
42b16b3f | 232 | static inline int vortex_wtdma_getlinearpos(vortex_t * vortex, int wtdma); |
1da177e4 LT |
233 | #endif |
234 | ||
235 | /* global stuff. */ | |
236 | static void vortex_codec_init(vortex_t * vortex); | |
2fd16874 | 237 | static void vortex_codec_write(struct snd_ac97 * codec, unsigned short addr, |
1da177e4 | 238 | unsigned short data); |
2fd16874 | 239 | static unsigned short vortex_codec_read(struct snd_ac97 * codec, unsigned short addr); |
1da177e4 LT |
240 | static void vortex_spdif_init(vortex_t * vortex, int spdif_sr, int spdif_mode); |
241 | ||
242 | static int vortex_core_init(vortex_t * card); | |
243 | static int vortex_core_shutdown(vortex_t * card); | |
244 | static void vortex_enable_int(vortex_t * card); | |
7d12e780 | 245 | static irqreturn_t vortex_interrupt(int irq, void *dev_id); |
1da177e4 LT |
246 | static int vortex_alsafmt_aspfmt(int alsafmt); |
247 | ||
248 | /* Connection stuff. */ | |
249 | static void vortex_connect_default(vortex_t * vortex, int en); | |
250 | static int vortex_adb_allocroute(vortex_t * vortex, int dma, int nr_ch, | |
bb92b7c4 | 251 | int dir, int type, int subdev); |
1da177e4 LT |
252 | static char vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, |
253 | int restype); | |
254 | #ifndef CHIP_AU8810 | |
255 | static int vortex_wt_allocroute(vortex_t * vortex, int dma, int nr_ch); | |
256 | static void vortex_wt_connect(vortex_t * vortex, int en); | |
257 | static void vortex_wt_init(vortex_t * vortex); | |
258 | #endif | |
259 | ||
260 | static void vortex_route(vortex_t * vortex, int en, unsigned char channel, | |
261 | unsigned char source, unsigned char dest); | |
262 | #if 0 | |
263 | static void vortex_routes(vortex_t * vortex, int en, unsigned char channel, | |
264 | unsigned char source, unsigned char dest0, | |
265 | unsigned char dest1); | |
266 | #endif | |
267 | static void vortex_connection_mixin_mix(vortex_t * vortex, int en, | |
268 | unsigned char mixin, | |
269 | unsigned char mix, int a); | |
270 | static void vortex_mix_setinputvolumebyte(vortex_t * vortex, | |
271 | unsigned char mix, int mixin, | |
272 | unsigned char vol); | |
273 | static void vortex_mix_setvolumebyte(vortex_t * vortex, unsigned char mix, | |
274 | unsigned char vol); | |
275 | ||
276 | /* A3D functions. */ | |
277 | #ifndef CHIP_AU8820 | |
f40b6890 TI |
278 | static void vortex_Vort3D_enable(vortex_t * v); |
279 | static void vortex_Vort3D_disable(vortex_t * v); | |
1da177e4 LT |
280 | static void vortex_Vort3D_connect(vortex_t * vortex, int en); |
281 | static void vortex_Vort3D_InitializeSource(a3dsrc_t * a, int en); | |
282 | #endif | |
283 | ||
284 | /* Driver stuff. */ | |
99e80e4d | 285 | static int vortex_gameport_register(vortex_t * card); |
1da177e4 LT |
286 | static void vortex_gameport_unregister(vortex_t * card); |
287 | #ifndef CHIP_AU8820 | |
99e80e4d DS |
288 | static int vortex_eq_init(vortex_t * vortex); |
289 | static int vortex_eq_free(vortex_t * vortex); | |
1da177e4 LT |
290 | #endif |
291 | /* ALSA stuff. */ | |
99e80e4d DS |
292 | static int snd_vortex_new_pcm(vortex_t * vortex, int idx, int nr); |
293 | static int snd_vortex_mixer(vortex_t * vortex); | |
294 | static int snd_vortex_midi(vortex_t * vortex); | |
1da177e4 | 295 | #endif |