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1da177e4 LT |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License as published by | |
4 | * the Free Software Foundation; either version 2 of the License, or | |
5 | * (at your option) any later version. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU Library General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
15 | */ | |
16 | ||
17 | #ifndef __SOUND_AU88X0_H | |
18 | #define __SOUND_AU88X0_H | |
19 | ||
1da177e4 | 20 | #include <linux/pci.h> |
6cbbfe1c | 21 | #include <linux/io.h> |
1da177e4 LT |
22 | #include <sound/core.h> |
23 | #include <sound/pcm.h> | |
24 | #include <sound/rawmidi.h> | |
25 | #include <sound/mpu401.h> | |
26 | #include <sound/hwdep.h> | |
27 | #include <sound/ac97_codec.h> | |
bb92b7c4 | 28 | #include <sound/tlv.h> |
1da177e4 LT |
29 | |
30 | #ifndef CHIP_AU8820 | |
31 | #include "au88x0_eq.h" | |
32 | #include "au88x0_a3d.h" | |
33 | #endif | |
34 | #ifndef CHIP_AU8810 | |
35 | #include "au88x0_wt.h" | |
36 | #endif | |
37 | ||
97c67b65 TI |
38 | #define hwread(x,y) readl((x)+(y)) |
39 | #define hwwrite(x,y,z) writel((z),(x)+(y)) | |
1da177e4 LT |
40 | |
41 | /* Vortex MPU401 defines. */ | |
42 | #define MIDI_CLOCK_DIV 0x61 | |
43 | /* Standart MPU401 defines. */ | |
44 | #define MPU401_RESET 0xff | |
45 | #define MPU401_ENTER_UART 0x3f | |
46 | #define MPU401_ACK 0xfe | |
47 | ||
48 | // Get src register value to convert from x to y. | |
49 | #define SRC_RATIO(x,y) ((((x<<15)/y) + 1)/2) | |
50 | ||
51 | /* FIFO software state constants. */ | |
52 | #define FIFO_STOP 0 | |
53 | #define FIFO_START 1 | |
54 | #define FIFO_PAUSE 2 | |
55 | ||
56 | /* IRQ flags */ | |
57 | #define IRQ_ERR_MASK 0x00ff | |
58 | #define IRQ_FATAL 0x0001 | |
59 | #define IRQ_PARITY 0x0002 | |
60 | #define IRQ_REG 0x0004 | |
61 | #define IRQ_FIFO 0x0008 | |
62 | #define IRQ_DMA 0x0010 | |
63 | #define IRQ_PCMOUT 0x0020 /* PCM OUT page crossing */ | |
64 | #define IRQ_TIMER 0x1000 | |
65 | #define IRQ_MIDI 0x2000 | |
66 | #define IRQ_MODEM 0x4000 | |
67 | ||
68 | /* ADB Resource */ | |
69 | #define VORTEX_RESOURCE_DMA 0x00000000 | |
70 | #define VORTEX_RESOURCE_SRC 0x00000001 | |
71 | #define VORTEX_RESOURCE_MIXIN 0x00000002 | |
72 | #define VORTEX_RESOURCE_MIXOUT 0x00000003 | |
73 | #define VORTEX_RESOURCE_A3D 0x00000004 | |
74 | #define VORTEX_RESOURCE_LAST 0x00000005 | |
75 | ||
f2b31737 SK |
76 | /* codec io: VORTEX_CODEC_IO bits */ |
77 | #define VORTEX_CODEC_ID_SHIFT 24 | |
78 | #define VORTEX_CODEC_WRITE 0x00800000 | |
79 | #define VORTEX_CODEC_ADDSHIFT 16 | |
80 | #define VORTEX_CODEC_ADDMASK 0x7f0000 | |
81 | #define VORTEX_CODEC_DATSHIFT 0 | |
82 | #define VORTEX_CODEC_DATMASK 0xffff | |
83 | ||
1da177e4 LT |
84 | /* Check for SDAC bit in "Extended audio ID" AC97 register */ |
85 | //#define VORTEX_IS_QUAD(x) (((x)->codec == NULL) ? 0 : ((x)->codec->ext_id&0x80)) | |
86 | #define VORTEX_IS_QUAD(x) ((x)->isquad) | |
87 | /* Check if chip has bug. */ | |
88 | #define IS_BAD_CHIP(x) (\ | |
89 | (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_VORTEX_2) || \ | |
90 | (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_ADVANTAGE)) | |
91 | ||
92 | ||
93 | /* PCM devices */ | |
94 | #define VORTEX_PCM_ADB 0 | |
95 | #define VORTEX_PCM_SPDIF 1 | |
96 | #define VORTEX_PCM_A3D 2 | |
97 | #define VORTEX_PCM_WT 3 | |
98 | #define VORTEX_PCM_I2S 4 | |
99 | #define VORTEX_PCM_LAST 5 | |
100 | ||
101 | #define MIX_CAPT(x) (vortex->mixcapt[x]) | |
102 | #define MIX_PLAYB(x) (vortex->mixplayb[x]) | |
103 | #define MIX_SPDIF(x) (vortex->mixspdif[x]) | |
104 | ||
25985edc | 105 | #define NR_WTPB 0x20 /* WT channels per each bank. */ |
49b9c40e | 106 | #define NR_PCM 0x10 |
1da177e4 | 107 | |
bb92b7c4 RY |
108 | struct pcm_vol { |
109 | struct snd_kcontrol *kctl; | |
110 | int active; | |
111 | int dma; | |
112 | int mixin[4]; | |
113 | int vol[4]; | |
114 | }; | |
115 | ||
1da177e4 LT |
116 | /* Structs */ |
117 | typedef struct { | |
118 | //int this_08; /* Still unknown */ | |
119 | int fifo_enabled; /* this_24 */ | |
120 | int fifo_status; /* this_1c */ | |
97c67b65 | 121 | u32 dma_ctrl; /* this_78 (ADB), this_7c (WT) */ |
1da177e4 LT |
122 | int dma_unknown; /* this_74 (ADB), this_78 (WT). WDM: +8 */ |
123 | int cfg0; | |
124 | int cfg1; | |
125 | ||
126 | int nr_ch; /* Nr of PCM channels in use */ | |
127 | int type; /* Output type (ac97, a3d, spdif, i2s, dsp) */ | |
128 | int dma; /* Hardware DMA index. */ | |
129 | int dir; /* Stream Direction. */ | |
130 | u32 resources[5]; | |
131 | ||
132 | /* Virtual page extender stuff */ | |
133 | int nr_periods; | |
134 | int period_bytes; | |
1da177e4 LT |
135 | int period_real; |
136 | int period_virt; | |
137 | ||
2fd16874 | 138 | struct snd_pcm_substream *substream; |
1da177e4 LT |
139 | } stream_t; |
140 | ||
141 | typedef struct snd_vortex vortex_t; | |
142 | struct snd_vortex { | |
143 | /* ALSA structs. */ | |
2fd16874 TI |
144 | struct snd_card *card; |
145 | struct snd_pcm *pcm[VORTEX_PCM_LAST]; | |
1da177e4 | 146 | |
2fd16874 TI |
147 | struct snd_rawmidi *rmidi; /* Legacy Midi interface. */ |
148 | struct snd_ac97 *codec; | |
1da177e4 LT |
149 | |
150 | /* Stream structs. */ | |
151 | stream_t dma_adb[NR_ADB]; | |
152 | int spdif_sr; | |
153 | #ifndef CHIP_AU8810 | |
154 | stream_t dma_wt[NR_WT]; | |
155 | wt_voice_t wt_voice[NR_WT]; /* WT register cache. */ | |
156 | char mixwt[(NR_WT / NR_WTPB) * 6]; /* WT mixin objects */ | |
157 | #endif | |
158 | ||
159 | /* Global resources */ | |
160 | s8 mixcapt[2]; | |
161 | s8 mixplayb[4]; | |
162 | #ifndef CHIP_AU8820 | |
163 | s8 mixspdif[2]; | |
164 | s8 mixa3d[2]; /* mixers which collect all a3d streams. */ | |
165 | s8 mixxtlk[2]; /* crosstalk canceler mixer inputs. */ | |
166 | #endif | |
167 | u32 fixed_res[5]; | |
168 | ||
169 | #ifndef CHIP_AU8820 | |
170 | /* Hardware equalizer structs */ | |
171 | eqlzr_t eq; | |
172 | /* A3D structs */ | |
173 | a3dsrc_t a3d[NR_A3D]; | |
174 | /* Xtalk canceler */ | |
175 | int xt_mode; /* 1: speakers, 0:headphones. */ | |
176 | #endif | |
bb92b7c4 | 177 | struct pcm_vol pcm_vol[NR_PCM]; |
1da177e4 LT |
178 | |
179 | int isquad; /* cache of extended ID codec flag. */ | |
180 | ||
181 | /* Gameport stuff. */ | |
182 | struct gameport *gameport; | |
183 | ||
184 | /* PCI hardware resources */ | |
185 | unsigned long io; | |
97c67b65 | 186 | void __iomem *mmio; |
1da177e4 LT |
187 | unsigned int irq; |
188 | spinlock_t lock; | |
189 | ||
190 | /* PCI device */ | |
191 | struct pci_dev *pci_dev; | |
192 | u16 vendor; | |
193 | u16 device; | |
194 | u8 rev; | |
195 | }; | |
196 | ||
197 | /* Functions. */ | |
198 | ||
199 | /* SRC */ | |
200 | static void vortex_adb_setsrc(vortex_t * vortex, int adbdma, | |
201 | unsigned int cvrt, int dir); | |
202 | ||
203 | /* DMA Engines. */ | |
204 | static void vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma, | |
77a23f26 | 205 | int size, int count); |
1da177e4 LT |
206 | static void vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie, |
207 | int dir, int fmt, int d, | |
97c67b65 | 208 | u32 offset); |
1da177e4 LT |
209 | static void vortex_adbdma_setstartbuffer(vortex_t * vortex, int adbdma, int sb); |
210 | #ifndef CHIP_AU8810 | |
211 | static void vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma, | |
77a23f26 | 212 | int size, int count); |
1da177e4 | 213 | static void vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d, /*int e, */ |
97c67b65 | 214 | u32 offset); |
1da177e4 LT |
215 | static void vortex_wtdma_setstartbuffer(vortex_t * vortex, int wtdma, int sb); |
216 | #endif | |
217 | ||
218 | static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma); | |
219 | //static void vortex_adbdma_stopfifo(vortex_t *vortex, int adbdma); | |
220 | static void vortex_adbdma_pausefifo(vortex_t * vortex, int adbdma); | |
221 | static void vortex_adbdma_resumefifo(vortex_t * vortex, int adbdma); | |
42b16b3f | 222 | static inline int vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma); |
1da177e4 LT |
223 | static void vortex_adbdma_resetup(vortex_t *vortex, int adbdma); |
224 | ||
225 | #ifndef CHIP_AU8810 | |
226 | static void vortex_wtdma_startfifo(vortex_t * vortex, int wtdma); | |
227 | static void vortex_wtdma_stopfifo(vortex_t * vortex, int wtdma); | |
228 | static void vortex_wtdma_pausefifo(vortex_t * vortex, int wtdma); | |
229 | static void vortex_wtdma_resumefifo(vortex_t * vortex, int wtdma); | |
42b16b3f | 230 | static inline int vortex_wtdma_getlinearpos(vortex_t * vortex, int wtdma); |
1da177e4 LT |
231 | #endif |
232 | ||
233 | /* global stuff. */ | |
234 | static void vortex_codec_init(vortex_t * vortex); | |
2fd16874 | 235 | static void vortex_codec_write(struct snd_ac97 * codec, unsigned short addr, |
1da177e4 | 236 | unsigned short data); |
2fd16874 | 237 | static unsigned short vortex_codec_read(struct snd_ac97 * codec, unsigned short addr); |
1da177e4 LT |
238 | static void vortex_spdif_init(vortex_t * vortex, int spdif_sr, int spdif_mode); |
239 | ||
240 | static int vortex_core_init(vortex_t * card); | |
241 | static int vortex_core_shutdown(vortex_t * card); | |
242 | static void vortex_enable_int(vortex_t * card); | |
7d12e780 | 243 | static irqreturn_t vortex_interrupt(int irq, void *dev_id); |
6a40dc5a | 244 | static int vortex_alsafmt_aspfmt(int alsafmt, vortex_t *v); |
1da177e4 LT |
245 | |
246 | /* Connection stuff. */ | |
247 | static void vortex_connect_default(vortex_t * vortex, int en); | |
248 | static int vortex_adb_allocroute(vortex_t * vortex, int dma, int nr_ch, | |
bb92b7c4 | 249 | int dir, int type, int subdev); |
1da177e4 LT |
250 | static char vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out, |
251 | int restype); | |
252 | #ifndef CHIP_AU8810 | |
253 | static int vortex_wt_allocroute(vortex_t * vortex, int dma, int nr_ch); | |
254 | static void vortex_wt_connect(vortex_t * vortex, int en); | |
255 | static void vortex_wt_init(vortex_t * vortex); | |
256 | #endif | |
257 | ||
258 | static void vortex_route(vortex_t * vortex, int en, unsigned char channel, | |
259 | unsigned char source, unsigned char dest); | |
260 | #if 0 | |
261 | static void vortex_routes(vortex_t * vortex, int en, unsigned char channel, | |
262 | unsigned char source, unsigned char dest0, | |
263 | unsigned char dest1); | |
264 | #endif | |
265 | static void vortex_connection_mixin_mix(vortex_t * vortex, int en, | |
266 | unsigned char mixin, | |
267 | unsigned char mix, int a); | |
268 | static void vortex_mix_setinputvolumebyte(vortex_t * vortex, | |
269 | unsigned char mix, int mixin, | |
270 | unsigned char vol); | |
271 | static void vortex_mix_setvolumebyte(vortex_t * vortex, unsigned char mix, | |
272 | unsigned char vol); | |
273 | ||
274 | /* A3D functions. */ | |
275 | #ifndef CHIP_AU8820 | |
f40b6890 TI |
276 | static void vortex_Vort3D_enable(vortex_t * v); |
277 | static void vortex_Vort3D_disable(vortex_t * v); | |
1da177e4 | 278 | static void vortex_Vort3D_connect(vortex_t * vortex, int en); |
6a40dc5a | 279 | static void vortex_Vort3D_InitializeSource(a3dsrc_t *a, int en, vortex_t *v); |
1da177e4 LT |
280 | #endif |
281 | ||
282 | /* Driver stuff. */ | |
99e80e4d | 283 | static int vortex_gameport_register(vortex_t * card); |
1da177e4 LT |
284 | static void vortex_gameport_unregister(vortex_t * card); |
285 | #ifndef CHIP_AU8820 | |
99e80e4d DS |
286 | static int vortex_eq_init(vortex_t * vortex); |
287 | static int vortex_eq_free(vortex_t * vortex); | |
1da177e4 LT |
288 | #endif |
289 | /* ALSA stuff. */ | |
99e80e4d DS |
290 | static int snd_vortex_new_pcm(vortex_t * vortex, int idx, int nr); |
291 | static int snd_vortex_mixer(vortex_t * vortex); | |
292 | static int snd_vortex_midi(vortex_t * vortex); | |
1da177e4 | 293 | #endif |