Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License as published by | |
4 | * the Free Software Foundation; either version 2 of the License, or | |
5 | * (at your option) any later version. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
15 | * | |
16 | */ | |
17 | ||
18 | /* | |
19 | * 2002-07 Benny Sjostrand benny@hostmobility.com | |
20 | */ | |
21 | ||
22 | ||
6cbbfe1c | 23 | #include <linux/io.h> |
1da177e4 | 24 | #include <linux/delay.h> |
1da177e4 LT |
25 | #include <linux/pm.h> |
26 | #include <linux/init.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/vmalloc.h> | |
62932df8 IM |
29 | #include <linux/mutex.h> |
30 | ||
1da177e4 LT |
31 | #include <sound/core.h> |
32 | #include <sound/control.h> | |
33 | #include <sound/info.h> | |
34 | #include <sound/asoundef.h> | |
81fcb170 | 35 | #include "cs46xx.h" |
1da177e4 LT |
36 | |
37 | #include "cs46xx_lib.h" | |
38 | #include "dsp_spos.h" | |
39 | ||
3d19f804 TI |
40 | static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, |
41 | struct dsp_scb_descriptor * fg_entry); | |
1da177e4 | 42 | |
3d19f804 | 43 | static enum wide_opcode wide_opcodes[] = { |
1da177e4 LT |
44 | WIDE_FOR_BEGIN_LOOP, |
45 | WIDE_FOR_BEGIN_LOOP2, | |
46 | WIDE_COND_GOTO_ADDR, | |
47 | WIDE_COND_GOTO_CALL, | |
48 | WIDE_TBEQ_COND_GOTO_ADDR, | |
49 | WIDE_TBEQ_COND_CALL_ADDR, | |
50 | WIDE_TBEQ_NCOND_GOTO_ADDR, | |
51 | WIDE_TBEQ_NCOND_CALL_ADDR, | |
52 | WIDE_TBEQ_COND_GOTO1_ADDR, | |
53 | WIDE_TBEQ_COND_CALL1_ADDR, | |
54 | WIDE_TBEQ_NCOND_GOTOI_ADDR, | |
55 | WIDE_TBEQ_NCOND_CALL1_ADDR | |
56 | }; | |
57 | ||
3d19f804 TI |
58 | static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size, |
59 | u32 overlay_begin_address) | |
1da177e4 LT |
60 | { |
61 | unsigned int i = 0, j, nreallocated = 0; | |
62 | u32 hival,loval,address; | |
63 | u32 mop_operands,mop_type,wide_op; | |
3d19f804 | 64 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 65 | |
da3cec35 TI |
66 | if (snd_BUG_ON(size %2)) |
67 | return -EINVAL; | |
1da177e4 LT |
68 | |
69 | while (i < size) { | |
70 | loval = data[i++]; | |
71 | hival = data[i++]; | |
72 | ||
73 | if (ins->code.offset > 0) { | |
74 | mop_operands = (hival >> 6) & 0x03fff; | |
75 | mop_type = mop_operands >> 10; | |
76 | ||
77 | /* check for wide type instruction */ | |
78 | if (mop_type == 0 && | |
79 | (mop_operands & WIDE_LADD_INSTR_MASK) == 0 && | |
80 | (mop_operands & WIDE_INSTR_MASK) != 0) { | |
81 | wide_op = loval & 0x7f; | |
82 | for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) { | |
83 | if (wide_opcodes[j] == wide_op) { | |
84 | /* need to reallocate instruction */ | |
85 | address = (hival & 0x00FFF) << 5; | |
86 | address |= loval >> 15; | |
87 | ||
2b96a7f1 TI |
88 | dev_dbg(chip->card->dev, |
89 | "handle_wideop[1]: %05x:%05x addr %04x\n", | |
90 | hival, loval, address); | |
1da177e4 LT |
91 | |
92 | if ( !(address & 0x8000) ) { | |
93 | address += (ins->code.offset / 2) - overlay_begin_address; | |
94 | } else { | |
2b96a7f1 TI |
95 | dev_dbg(chip->card->dev, |
96 | "handle_wideop[1]: ROM symbol not reallocated\n"); | |
1da177e4 LT |
97 | } |
98 | ||
99 | hival &= 0xFF000; | |
100 | loval &= 0x07FFF; | |
101 | ||
102 | hival |= ( (address >> 5) & 0x00FFF); | |
103 | loval |= ( (address << 15) & 0xF8000); | |
104 | ||
105 | address = (hival & 0x00FFF) << 5; | |
106 | address |= loval >> 15; | |
107 | ||
2b96a7f1 TI |
108 | dev_dbg(chip->card->dev, |
109 | "handle_wideop:[2] %05x:%05x addr %04x\n", | |
110 | hival, loval, address); nreallocated++; | |
1da177e4 LT |
111 | } /* wide_opcodes[j] == wide_op */ |
112 | } /* for */ | |
113 | } /* mod_type == 0 ... */ | |
114 | } /* ins->code.offset > 0 */ | |
115 | ||
116 | ins->code.data[ins->code.size++] = loval; | |
117 | ins->code.data[ins->code.size++] = hival; | |
118 | } | |
119 | ||
2b96a7f1 TI |
120 | dev_dbg(chip->card->dev, |
121 | "dsp_spos: %d instructions reallocated\n", nreallocated); | |
1da177e4 LT |
122 | return nreallocated; |
123 | } | |
124 | ||
3d19f804 | 125 | static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type) |
1da177e4 LT |
126 | { |
127 | int i; | |
128 | for (i = 0;i < module->nsegments; ++i) { | |
129 | if (module->segments[i].segment_type == seg_type) { | |
130 | return (module->segments + i); | |
131 | } | |
132 | } | |
133 | ||
134 | return NULL; | |
135 | }; | |
136 | ||
3d19f804 | 137 | static int find_free_symbol_index (struct dsp_spos_instance * ins) |
1da177e4 LT |
138 | { |
139 | int index = ins->symbol_table.nsymbols,i; | |
140 | ||
141 | for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) { | |
142 | if (ins->symbol_table.symbols[i].deleted) { | |
143 | index = i; | |
144 | break; | |
145 | } | |
146 | } | |
147 | ||
148 | return index; | |
149 | } | |
150 | ||
3d19f804 | 151 | static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module) |
1da177e4 LT |
152 | { |
153 | int i; | |
3d19f804 | 154 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
155 | |
156 | if (module->symbol_table.nsymbols > 0) { | |
157 | if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") && | |
158 | module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) { | |
159 | module->overlay_begin_address = module->symbol_table.symbols[0].address; | |
160 | } | |
161 | } | |
162 | ||
163 | for (i = 0;i < module->symbol_table.nsymbols; ++i) { | |
164 | if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { | |
2b96a7f1 TI |
165 | dev_err(chip->card->dev, |
166 | "dsp_spos: symbol table is full\n"); | |
1da177e4 LT |
167 | return -ENOMEM; |
168 | } | |
169 | ||
170 | ||
171 | if (cs46xx_dsp_lookup_symbol(chip, | |
172 | module->symbol_table.symbols[i].symbol_name, | |
173 | module->symbol_table.symbols[i].symbol_type) == NULL) { | |
174 | ||
175 | ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i]; | |
176 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address); | |
177 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module; | |
178 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0; | |
179 | ||
180 | if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) | |
181 | ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; | |
182 | ||
183 | ins->symbol_table.nsymbols++; | |
184 | } else { | |
2b96a7f1 TI |
185 | #if 0 |
186 | dev_dbg(chip->card->dev, | |
187 | "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n", | |
188 | module->symbol_table.symbols[i].symbol_name); */ | |
189 | #endif | |
1da177e4 LT |
190 | } |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
3d19f804 TI |
196 | static struct dsp_symbol_entry * |
197 | add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type) | |
1da177e4 | 198 | { |
3d19f804 TI |
199 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
200 | struct dsp_symbol_entry * symbol = NULL; | |
1da177e4 LT |
201 | int index; |
202 | ||
203 | if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { | |
2b96a7f1 | 204 | dev_err(chip->card->dev, "dsp_spos: symbol table is full\n"); |
1da177e4 LT |
205 | return NULL; |
206 | } | |
207 | ||
208 | if (cs46xx_dsp_lookup_symbol(chip, | |
209 | symbol_name, | |
210 | type) != NULL) { | |
2b96a7f1 TI |
211 | dev_err(chip->card->dev, |
212 | "dsp_spos: symbol <%s> duplicated\n", symbol_name); | |
1da177e4 LT |
213 | return NULL; |
214 | } | |
215 | ||
216 | index = find_free_symbol_index (ins); | |
217 | ||
218 | strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name); | |
219 | ins->symbol_table.symbols[index].address = address; | |
220 | ins->symbol_table.symbols[index].symbol_type = type; | |
221 | ins->symbol_table.symbols[index].module = NULL; | |
222 | ins->symbol_table.symbols[index].deleted = 0; | |
223 | symbol = (ins->symbol_table.symbols + index); | |
224 | ||
225 | if (index > ins->symbol_table.highest_frag_index) | |
226 | ins->symbol_table.highest_frag_index = index; | |
227 | ||
228 | if (index == ins->symbol_table.nsymbols) | |
229 | ins->symbol_table.nsymbols++; /* no frag. in list */ | |
230 | ||
231 | return symbol; | |
232 | } | |
233 | ||
3d19f804 | 234 | struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip) |
1da177e4 | 235 | { |
3d19f804 | 236 | struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL); |
1da177e4 | 237 | |
bb617ee3 | 238 | if (ins == NULL) |
1da177e4 | 239 | return NULL; |
1da177e4 LT |
240 | |
241 | /* better to use vmalloc for this big table */ | |
3d19f804 TI |
242 | ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) * |
243 | DSP_MAX_SYMBOLS); | |
bb617ee3 JJ |
244 | ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); |
245 | ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL); | |
246 | if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) { | |
1da177e4 | 247 | cs46xx_dsp_spos_destroy(chip); |
202728d7 | 248 | goto error; |
1da177e4 | 249 | } |
bb617ee3 JJ |
250 | ins->symbol_table.nsymbols = 0; |
251 | ins->symbol_table.highest_frag_index = 0; | |
1da177e4 LT |
252 | ins->code.offset = 0; |
253 | ins->code.size = 0; | |
1da177e4 LT |
254 | ins->nscb = 0; |
255 | ins->ntask = 0; | |
1da177e4 | 256 | ins->nmodules = 0; |
1da177e4 LT |
257 | |
258 | /* default SPDIF input sample rate | |
259 | to 48000 khz */ | |
260 | ins->spdif_in_sample_rate = 48000; | |
261 | ||
262 | /* maximize volume */ | |
263 | ins->dac_volume_right = 0x8000; | |
264 | ins->dac_volume_left = 0x8000; | |
265 | ins->spdif_input_volume_right = 0x8000; | |
266 | ins->spdif_input_volume_left = 0x8000; | |
267 | ||
268 | /* set left and right validity bits and | |
269 | default channel status */ | |
bb617ee3 JJ |
270 | ins->spdif_csuv_default = |
271 | ins->spdif_csuv_stream = | |
1da177e4 LT |
272 | /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | |
273 | /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | | |
274 | /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) | | |
275 | /* left and right validity bits */ (1 << 13) | (1 << 12); | |
276 | ||
277 | return ins; | |
202728d7 AB |
278 | |
279 | error: | |
bb617ee3 JJ |
280 | kfree(ins->modules); |
281 | kfree(ins->code.data); | |
282 | vfree(ins->symbol_table.symbols); | |
202728d7 AB |
283 | kfree(ins); |
284 | return NULL; | |
1da177e4 LT |
285 | } |
286 | ||
3d19f804 | 287 | void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip) |
1da177e4 LT |
288 | { |
289 | int i; | |
3d19f804 | 290 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 291 | |
da3cec35 TI |
292 | if (snd_BUG_ON(!ins)) |
293 | return; | |
1da177e4 | 294 | |
62932df8 | 295 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
296 | for (i = 0; i < ins->nscb; ++i) { |
297 | if (ins->scbs[i].deleted) continue; | |
298 | ||
299 | cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); | |
c7561cd8 | 300 | #ifdef CONFIG_PM_SLEEP |
41116e92 TI |
301 | kfree(ins->scbs[i].data); |
302 | #endif | |
1da177e4 LT |
303 | } |
304 | ||
305 | kfree(ins->code.data); | |
306 | vfree(ins->symbol_table.symbols); | |
307 | kfree(ins->modules); | |
308 | kfree(ins); | |
62932df8 | 309 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
310 | } |
311 | ||
89f157d9 TI |
312 | static int dsp_load_parameter(struct snd_cs46xx *chip, |
313 | struct dsp_segment_desc *parameter) | |
314 | { | |
315 | u32 doffset, dsize; | |
316 | ||
317 | if (!parameter) { | |
2b96a7f1 TI |
318 | dev_dbg(chip->card->dev, |
319 | "dsp_spos: module got no parameter segment\n"); | |
89f157d9 TI |
320 | return 0; |
321 | } | |
322 | ||
323 | doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET); | |
324 | dsize = parameter->size * 4; | |
325 | ||
2b96a7f1 TI |
326 | dev_dbg(chip->card->dev, |
327 | "dsp_spos: downloading parameter data to chip (%08x-%08x)\n", | |
89f157d9 TI |
328 | doffset,doffset + dsize); |
329 | if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { | |
2b96a7f1 TI |
330 | dev_err(chip->card->dev, |
331 | "dsp_spos: failed to download parameter data to DSP\n"); | |
89f157d9 TI |
332 | return -EINVAL; |
333 | } | |
334 | return 0; | |
335 | } | |
336 | ||
337 | static int dsp_load_sample(struct snd_cs46xx *chip, | |
338 | struct dsp_segment_desc *sample) | |
339 | { | |
340 | u32 doffset, dsize; | |
341 | ||
342 | if (!sample) { | |
2b96a7f1 TI |
343 | dev_dbg(chip->card->dev, |
344 | "dsp_spos: module got no sample segment\n"); | |
89f157d9 TI |
345 | return 0; |
346 | } | |
347 | ||
348 | doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET); | |
349 | dsize = sample->size * 4; | |
350 | ||
2b96a7f1 TI |
351 | dev_dbg(chip->card->dev, |
352 | "dsp_spos: downloading sample data to chip (%08x-%08x)\n", | |
89f157d9 TI |
353 | doffset,doffset + dsize); |
354 | ||
355 | if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { | |
2b96a7f1 TI |
356 | dev_err(chip->card->dev, |
357 | "dsp_spos: failed to sample data to DSP\n"); | |
89f157d9 TI |
358 | return -EINVAL; |
359 | } | |
360 | return 0; | |
361 | } | |
362 | ||
3d19f804 | 363 | int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module) |
1da177e4 | 364 | { |
3d19f804 TI |
365 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
366 | struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM); | |
1da177e4 | 367 | u32 doffset, dsize; |
89f157d9 | 368 | int err; |
1da177e4 LT |
369 | |
370 | if (ins->nmodules == DSP_MAX_MODULES - 1) { | |
2b96a7f1 TI |
371 | dev_err(chip->card->dev, |
372 | "dsp_spos: to many modules loaded into DSP\n"); | |
1da177e4 LT |
373 | return -ENOMEM; |
374 | } | |
375 | ||
2b96a7f1 TI |
376 | dev_dbg(chip->card->dev, |
377 | "dsp_spos: loading module %s into DSP\n", module->module_name); | |
1da177e4 LT |
378 | |
379 | if (ins->nmodules == 0) { | |
2b96a7f1 | 380 | dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n"); |
1da177e4 LT |
381 | snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); |
382 | } | |
383 | ||
89f157d9 TI |
384 | err = dsp_load_parameter(chip, get_segment_desc(module, |
385 | SEGTYPE_SP_PARAMETER)); | |
386 | if (err < 0) | |
387 | return err; | |
1da177e4 LT |
388 | |
389 | if (ins->nmodules == 0) { | |
2b96a7f1 | 390 | dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n"); |
1da177e4 LT |
391 | snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); |
392 | } | |
393 | ||
89f157d9 TI |
394 | err = dsp_load_sample(chip, get_segment_desc(module, |
395 | SEGTYPE_SP_SAMPLE)); | |
396 | if (err < 0) | |
397 | return err; | |
1da177e4 LT |
398 | |
399 | if (ins->nmodules == 0) { | |
2b96a7f1 | 400 | dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n"); |
1da177e4 LT |
401 | snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); |
402 | } | |
403 | ||
404 | if (code == NULL) { | |
2b96a7f1 TI |
405 | dev_dbg(chip->card->dev, |
406 | "dsp_spos: module got no code segment\n"); | |
1da177e4 LT |
407 | } else { |
408 | if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) { | |
2b96a7f1 TI |
409 | dev_err(chip->card->dev, |
410 | "dsp_spos: no space available in DSP\n"); | |
1da177e4 LT |
411 | return -ENOMEM; |
412 | } | |
413 | ||
414 | module->load_address = ins->code.offset; | |
415 | module->overlay_begin_address = 0x000; | |
416 | ||
417 | /* if module has a code segment it must have | |
418 | symbol table */ | |
da3cec35 TI |
419 | if (snd_BUG_ON(!module->symbol_table.symbols)) |
420 | return -ENOMEM; | |
1da177e4 | 421 | if (add_symbols(chip,module)) { |
2b96a7f1 TI |
422 | dev_err(chip->card->dev, |
423 | "dsp_spos: failed to load symbol table\n"); | |
1da177e4 LT |
424 | return -ENOMEM; |
425 | } | |
426 | ||
427 | doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET); | |
428 | dsize = code->size * 4; | |
2b96a7f1 TI |
429 | dev_dbg(chip->card->dev, |
430 | "dsp_spos: downloading code to chip (%08x-%08x)\n", | |
1da177e4 LT |
431 | doffset,doffset + dsize); |
432 | ||
433 | module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); | |
434 | ||
435 | if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { | |
2b96a7f1 TI |
436 | dev_err(chip->card->dev, |
437 | "dsp_spos: failed to download code to DSP\n"); | |
1da177e4 LT |
438 | return -EINVAL; |
439 | } | |
440 | ||
441 | ins->code.offset += code->size; | |
442 | } | |
443 | ||
444 | /* NOTE: module segments and symbol table must be | |
445 | statically allocated. Case that module data is | |
446 | not generated by the ospparser */ | |
447 | ins->modules[ins->nmodules] = *module; | |
448 | ins->nmodules++; | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
3d19f804 TI |
453 | struct dsp_symbol_entry * |
454 | cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type) | |
1da177e4 LT |
455 | { |
456 | int i; | |
3d19f804 | 457 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
458 | |
459 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { | |
460 | ||
461 | if (ins->symbol_table.symbols[i].deleted) | |
462 | continue; | |
463 | ||
464 | if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) && | |
465 | ins->symbol_table.symbols[i].symbol_type == symbol_type) { | |
466 | return (ins->symbol_table.symbols + i); | |
467 | } | |
468 | } | |
469 | ||
470 | #if 0 | |
2b96a7f1 | 471 | dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n", |
1da177e4 LT |
472 | symbol_name,symbol_type); |
473 | #endif | |
474 | ||
475 | return NULL; | |
476 | } | |
477 | ||
478 | ||
95bb6258 | 479 | #ifdef CONFIG_SND_PROC_FS |
3d19f804 TI |
480 | static struct dsp_symbol_entry * |
481 | cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type) | |
1da177e4 LT |
482 | { |
483 | int i; | |
3d19f804 | 484 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
485 | |
486 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { | |
487 | ||
488 | if (ins->symbol_table.symbols[i].deleted) | |
489 | continue; | |
490 | ||
491 | if (ins->symbol_table.symbols[i].address == address && | |
492 | ins->symbol_table.symbols[i].symbol_type == symbol_type) { | |
493 | return (ins->symbol_table.symbols + i); | |
494 | } | |
495 | } | |
496 | ||
497 | ||
498 | return NULL; | |
499 | } | |
500 | ||
501 | ||
3d19f804 TI |
502 | static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry, |
503 | struct snd_info_buffer *buffer) | |
1da177e4 | 504 | { |
3d19f804 TI |
505 | struct snd_cs46xx *chip = entry->private_data; |
506 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
1da177e4 LT |
507 | int i; |
508 | ||
509 | snd_iprintf(buffer, "SYMBOLS:\n"); | |
510 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { | |
511 | char *module_str = "system"; | |
512 | ||
513 | if (ins->symbol_table.symbols[i].deleted) | |
514 | continue; | |
515 | ||
516 | if (ins->symbol_table.symbols[i].module != NULL) { | |
517 | module_str = ins->symbol_table.symbols[i].module->module_name; | |
518 | } | |
519 | ||
520 | ||
521 | snd_iprintf(buffer, "%04X <%02X> %s [%s]\n", | |
522 | ins->symbol_table.symbols[i].address, | |
523 | ins->symbol_table.symbols[i].symbol_type, | |
524 | ins->symbol_table.symbols[i].symbol_name, | |
525 | module_str); | |
526 | } | |
527 | } | |
528 | ||
529 | ||
3d19f804 TI |
530 | static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry, |
531 | struct snd_info_buffer *buffer) | |
1da177e4 | 532 | { |
3d19f804 TI |
533 | struct snd_cs46xx *chip = entry->private_data; |
534 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
1da177e4 LT |
535 | int i,j; |
536 | ||
62932df8 | 537 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
538 | snd_iprintf(buffer, "MODULES:\n"); |
539 | for ( i = 0; i < ins->nmodules; ++i ) { | |
540 | snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name); | |
541 | snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols); | |
542 | snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups); | |
543 | ||
544 | for (j = 0; j < ins->modules[i].nsegments; ++ j) { | |
3d19f804 | 545 | struct dsp_segment_desc * desc = (ins->modules[i].segments + j); |
1da177e4 LT |
546 | snd_iprintf(buffer, " segment %02x offset %08x size %08x\n", |
547 | desc->segment_type,desc->offset, desc->size); | |
548 | } | |
549 | } | |
62932df8 | 550 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
551 | } |
552 | ||
3d19f804 TI |
553 | static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry, |
554 | struct snd_info_buffer *buffer) | |
1da177e4 | 555 | { |
3d19f804 TI |
556 | struct snd_cs46xx *chip = entry->private_data; |
557 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
558 | int i, j, col; | |
1da177e4 LT |
559 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; |
560 | ||
62932df8 | 561 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
562 | snd_iprintf(buffer, "TASK TREES:\n"); |
563 | for ( i = 0; i < ins->ntask; ++i) { | |
564 | snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name); | |
565 | ||
566 | for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) { | |
567 | u32 val; | |
568 | if (col == 4) { | |
569 | snd_iprintf(buffer,"\n"); | |
570 | col = 0; | |
571 | } | |
572 | val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32)); | |
573 | snd_iprintf(buffer,"%08x ",val); | |
574 | } | |
575 | } | |
576 | ||
577 | snd_iprintf(buffer,"\n"); | |
62932df8 | 578 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
579 | } |
580 | ||
3d19f804 TI |
581 | static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry, |
582 | struct snd_info_buffer *buffer) | |
1da177e4 | 583 | { |
3d19f804 TI |
584 | struct snd_cs46xx *chip = entry->private_data; |
585 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
1da177e4 LT |
586 | int i; |
587 | ||
62932df8 | 588 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
589 | snd_iprintf(buffer, "SCB's:\n"); |
590 | for ( i = 0; i < ins->nscb; ++i) { | |
591 | if (ins->scbs[i].deleted) | |
592 | continue; | |
593 | snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name); | |
594 | ||
595 | if (ins->scbs[i].parent_scb_ptr != NULL) { | |
596 | snd_iprintf(buffer,"parent [%s:%04x] ", | |
597 | ins->scbs[i].parent_scb_ptr->scb_name, | |
598 | ins->scbs[i].parent_scb_ptr->address); | |
599 | } else snd_iprintf(buffer,"parent [none] "); | |
600 | ||
601 | snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", | |
602 | ins->scbs[i].sub_list_ptr->scb_name, | |
603 | ins->scbs[i].sub_list_ptr->address, | |
604 | ins->scbs[i].next_scb_ptr->scb_name, | |
605 | ins->scbs[i].next_scb_ptr->address, | |
606 | ins->scbs[i].task_entry->symbol_name, | |
607 | ins->scbs[i].task_entry->address); | |
608 | } | |
609 | ||
610 | snd_iprintf(buffer,"\n"); | |
62932df8 | 611 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
612 | } |
613 | ||
3d19f804 TI |
614 | static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry, |
615 | struct snd_info_buffer *buffer) | |
1da177e4 | 616 | { |
3d19f804 TI |
617 | struct snd_cs46xx *chip = entry->private_data; |
618 | /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */ | |
619 | unsigned int i, col = 0; | |
1da177e4 | 620 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; |
3d19f804 | 621 | struct dsp_symbol_entry * symbol; |
1da177e4 LT |
622 | |
623 | for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) { | |
624 | if (col == 4) { | |
625 | snd_iprintf(buffer,"\n"); | |
626 | col = 0; | |
627 | } | |
628 | ||
629 | if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { | |
630 | col = 0; | |
631 | snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name); | |
632 | } | |
633 | ||
634 | if (col == 0) { | |
635 | snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32)); | |
636 | } | |
637 | ||
638 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
639 | } | |
640 | } | |
641 | ||
3d19f804 TI |
642 | static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry, |
643 | struct snd_info_buffer *buffer) | |
1da177e4 | 644 | { |
3d19f804 | 645 | struct snd_cs46xx *chip = entry->private_data; |
1da177e4 LT |
646 | int i,col = 0; |
647 | void __iomem *dst = chip->region.idx[2].remap_addr; | |
648 | ||
649 | snd_iprintf(buffer,"PCMREADER:\n"); | |
650 | for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) { | |
651 | if (col == 4) { | |
652 | snd_iprintf(buffer,"\n"); | |
653 | col = 0; | |
654 | } | |
655 | ||
656 | if (col == 0) { | |
657 | snd_iprintf(buffer, "%04X ",i); | |
658 | } | |
659 | ||
660 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
661 | } | |
662 | ||
663 | snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n"); | |
664 | ||
665 | col = 0; | |
666 | for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) { | |
667 | if (col == 4) { | |
668 | snd_iprintf(buffer,"\n"); | |
669 | col = 0; | |
670 | } | |
671 | ||
672 | if (col == 0) { | |
673 | snd_iprintf(buffer, "%04X ",i); | |
674 | } | |
675 | ||
676 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
677 | } | |
678 | ||
679 | snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n"); | |
680 | col = 0; | |
681 | for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) { | |
682 | if (col == 4) { | |
683 | snd_iprintf(buffer,"\n"); | |
684 | col = 0; | |
685 | } | |
686 | ||
687 | if (col == 0) { | |
688 | snd_iprintf(buffer, "%04X ",i); | |
689 | } | |
690 | ||
691 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
692 | } | |
693 | ||
694 | ||
695 | snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n"); | |
696 | col = 0; | |
697 | for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) { | |
698 | if (col == 4) { | |
699 | snd_iprintf(buffer,"\n"); | |
700 | col = 0; | |
701 | } | |
702 | ||
703 | if (col == 0) { | |
704 | snd_iprintf(buffer, "%04X ",i); | |
705 | } | |
706 | ||
707 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
708 | } | |
709 | ||
710 | snd_iprintf(buffer,"\n...\n"); | |
711 | col = 0; | |
712 | ||
713 | for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) { | |
714 | if (col == 4) { | |
715 | snd_iprintf(buffer,"\n"); | |
716 | col = 0; | |
717 | } | |
718 | ||
719 | if (col == 0) { | |
720 | snd_iprintf(buffer, "%04X ",i); | |
721 | } | |
722 | ||
723 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
724 | } | |
725 | ||
726 | ||
727 | snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n"); | |
728 | col = 0; | |
729 | for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) { | |
730 | if (col == 4) { | |
731 | snd_iprintf(buffer,"\n"); | |
732 | col = 0; | |
733 | } | |
734 | ||
735 | if (col == 0) { | |
736 | snd_iprintf(buffer, "%04X ",i); | |
737 | } | |
738 | ||
739 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
740 | } | |
741 | ||
742 | snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n"); | |
743 | col = 0; | |
744 | for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) { | |
745 | if (col == 4) { | |
746 | snd_iprintf(buffer,"\n"); | |
747 | col = 0; | |
748 | } | |
749 | ||
750 | if (col == 0) { | |
751 | snd_iprintf(buffer, "%04X ",i); | |
752 | } | |
753 | ||
754 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
755 | } | |
756 | #if 0 | |
757 | snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n"); | |
758 | col = 0; | |
759 | for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) { | |
760 | if (col == 4) { | |
761 | snd_iprintf(buffer,"\n"); | |
762 | col = 0; | |
763 | } | |
764 | ||
765 | if (col == 0) { | |
766 | snd_iprintf(buffer, "%04X ",i); | |
767 | } | |
768 | ||
769 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
770 | } | |
771 | #endif | |
772 | ||
773 | snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n"); | |
774 | col = 0; | |
775 | for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) { | |
776 | if (col == 4) { | |
777 | snd_iprintf(buffer,"\n"); | |
778 | col = 0; | |
779 | } | |
780 | ||
781 | if (col == 0) { | |
782 | snd_iprintf(buffer, "%04X ",i); | |
783 | } | |
784 | ||
785 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | |
786 | } | |
787 | snd_iprintf(buffer,"\n"); | |
788 | } | |
789 | ||
3d19f804 | 790 | int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip) |
1da177e4 | 791 | { |
3d19f804 TI |
792 | struct snd_info_entry *entry; |
793 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
1da177e4 LT |
794 | int i; |
795 | ||
796 | ins->snd_card = card; | |
797 | ||
798 | if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) { | |
799 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
800 | entry->mode = S_IFDIR | S_IRUGO | S_IXUGO; | |
1da177e4 LT |
801 | |
802 | if (snd_info_register(entry) < 0) { | |
803 | snd_info_free_entry(entry); | |
804 | entry = NULL; | |
805 | } | |
806 | } | |
807 | ||
808 | ins->proc_dsp_dir = entry; | |
809 | ||
810 | if (!ins->proc_dsp_dir) | |
811 | return -ENOMEM; | |
812 | ||
813 | if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) { | |
814 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
815 | entry->private_data = chip; | |
816 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | |
1da177e4 LT |
817 | entry->c.text.read = cs46xx_dsp_proc_symbol_table_read; |
818 | if (snd_info_register(entry) < 0) { | |
819 | snd_info_free_entry(entry); | |
820 | entry = NULL; | |
821 | } | |
822 | } | |
823 | ins->proc_sym_info_entry = entry; | |
824 | ||
825 | if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) { | |
826 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
827 | entry->private_data = chip; | |
828 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | |
1da177e4 LT |
829 | entry->c.text.read = cs46xx_dsp_proc_modules_read; |
830 | if (snd_info_register(entry) < 0) { | |
831 | snd_info_free_entry(entry); | |
832 | entry = NULL; | |
833 | } | |
834 | } | |
835 | ins->proc_modules_info_entry = entry; | |
836 | ||
837 | if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) { | |
838 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
839 | entry->private_data = chip; | |
840 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | |
1da177e4 LT |
841 | entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read; |
842 | if (snd_info_register(entry) < 0) { | |
843 | snd_info_free_entry(entry); | |
844 | entry = NULL; | |
845 | } | |
846 | } | |
847 | ins->proc_parameter_dump_info_entry = entry; | |
848 | ||
849 | if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) { | |
850 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
851 | entry->private_data = chip; | |
852 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | |
1da177e4 LT |
853 | entry->c.text.read = cs46xx_dsp_proc_sample_dump_read; |
854 | if (snd_info_register(entry) < 0) { | |
855 | snd_info_free_entry(entry); | |
856 | entry = NULL; | |
857 | } | |
858 | } | |
859 | ins->proc_sample_dump_info_entry = entry; | |
860 | ||
861 | if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) { | |
862 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
863 | entry->private_data = chip; | |
864 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | |
1da177e4 LT |
865 | entry->c.text.read = cs46xx_dsp_proc_task_tree_read; |
866 | if (snd_info_register(entry) < 0) { | |
867 | snd_info_free_entry(entry); | |
868 | entry = NULL; | |
869 | } | |
870 | } | |
871 | ins->proc_task_info_entry = entry; | |
872 | ||
873 | if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) { | |
874 | entry->content = SNDRV_INFO_CONTENT_TEXT; | |
875 | entry->private_data = chip; | |
876 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | |
1da177e4 LT |
877 | entry->c.text.read = cs46xx_dsp_proc_scb_read; |
878 | if (snd_info_register(entry) < 0) { | |
879 | snd_info_free_entry(entry); | |
880 | entry = NULL; | |
881 | } | |
882 | } | |
883 | ins->proc_scb_info_entry = entry; | |
884 | ||
62932df8 | 885 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
886 | /* register/update SCB's entries on proc */ |
887 | for (i = 0; i < ins->nscb; ++i) { | |
888 | if (ins->scbs[i].deleted) continue; | |
889 | ||
890 | cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); | |
891 | } | |
62932df8 | 892 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
893 | |
894 | return 0; | |
895 | } | |
896 | ||
3d19f804 | 897 | int cs46xx_dsp_proc_done (struct snd_cs46xx *chip) |
1da177e4 | 898 | { |
3d19f804 | 899 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
900 | int i; |
901 | ||
746d4a02 TI |
902 | snd_info_free_entry(ins->proc_sym_info_entry); |
903 | ins->proc_sym_info_entry = NULL; | |
904 | ||
905 | snd_info_free_entry(ins->proc_modules_info_entry); | |
906 | ins->proc_modules_info_entry = NULL; | |
907 | ||
908 | snd_info_free_entry(ins->proc_parameter_dump_info_entry); | |
909 | ins->proc_parameter_dump_info_entry = NULL; | |
910 | ||
911 | snd_info_free_entry(ins->proc_sample_dump_info_entry); | |
912 | ins->proc_sample_dump_info_entry = NULL; | |
913 | ||
914 | snd_info_free_entry(ins->proc_scb_info_entry); | |
915 | ins->proc_scb_info_entry = NULL; | |
916 | ||
917 | snd_info_free_entry(ins->proc_task_info_entry); | |
918 | ins->proc_task_info_entry = NULL; | |
1da177e4 | 919 | |
62932df8 | 920 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
921 | for (i = 0; i < ins->nscb; ++i) { |
922 | if (ins->scbs[i].deleted) continue; | |
923 | cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); | |
924 | } | |
62932df8 | 925 | mutex_unlock(&chip->spos_mutex); |
1da177e4 | 926 | |
746d4a02 TI |
927 | snd_info_free_entry(ins->proc_dsp_dir); |
928 | ins->proc_dsp_dir = NULL; | |
1da177e4 LT |
929 | |
930 | return 0; | |
931 | } | |
95bb6258 | 932 | #endif /* CONFIG_SND_PROC_FS */ |
1da177e4 | 933 | |
3d19f804 TI |
934 | static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data, |
935 | u32 dest, int size) | |
1da177e4 LT |
936 | { |
937 | void __iomem *spdst = chip->region.idx[1].remap_addr + | |
938 | DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); | |
939 | int i; | |
940 | ||
941 | for (i = 0; i < size; ++i) { | |
2b96a7f1 TI |
942 | dev_dbg(chip->card->dev, "addr %p, val %08x\n", |
943 | spdst, task_data[i]); | |
1da177e4 LT |
944 | writel(task_data[i],spdst); |
945 | spdst += sizeof(u32); | |
946 | } | |
947 | } | |
948 | ||
3d19f804 | 949 | static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest) |
1da177e4 LT |
950 | { |
951 | void __iomem *spdst = chip->region.idx[1].remap_addr + | |
952 | DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); | |
953 | int i; | |
954 | ||
955 | for (i = 0; i < 0x10; ++i) { | |
2b96a7f1 TI |
956 | dev_dbg(chip->card->dev, "addr %p, val %08x\n", |
957 | spdst, scb_data[i]); | |
1da177e4 LT |
958 | writel(scb_data[i],spdst); |
959 | spdst += sizeof(u32); | |
960 | } | |
961 | } | |
962 | ||
3d19f804 | 963 | static int find_free_scb_index (struct dsp_spos_instance * ins) |
1da177e4 LT |
964 | { |
965 | int index = ins->nscb, i; | |
966 | ||
967 | for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) { | |
968 | if (ins->scbs[i].deleted) { | |
969 | index = i; | |
970 | break; | |
971 | } | |
972 | } | |
973 | ||
974 | return index; | |
975 | } | |
976 | ||
3d19f804 | 977 | static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest) |
1da177e4 | 978 | { |
3d19f804 TI |
979 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
980 | struct dsp_scb_descriptor * desc = NULL; | |
1da177e4 LT |
981 | int index; |
982 | ||
983 | if (ins->nscb == DSP_MAX_SCB_DESC - 1) { | |
2b96a7f1 TI |
984 | dev_err(chip->card->dev, |
985 | "dsp_spos: got no place for other SCB\n"); | |
1da177e4 LT |
986 | return NULL; |
987 | } | |
988 | ||
989 | index = find_free_scb_index (ins); | |
990 | ||
41116e92 | 991 | memset(&ins->scbs[index], 0, sizeof(ins->scbs[index])); |
1da177e4 LT |
992 | strcpy(ins->scbs[index].scb_name, name); |
993 | ins->scbs[index].address = dest; | |
994 | ins->scbs[index].index = index; | |
1da177e4 | 995 | ins->scbs[index].ref_count = 1; |
1da177e4 LT |
996 | |
997 | desc = (ins->scbs + index); | |
998 | ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); | |
999 | ||
1000 | if (index > ins->scb_highest_frag_index) | |
1001 | ins->scb_highest_frag_index = index; | |
1002 | ||
1003 | if (index == ins->nscb) | |
1004 | ins->nscb++; | |
1005 | ||
1006 | return desc; | |
1007 | } | |
1008 | ||
3d19f804 TI |
1009 | static struct dsp_task_descriptor * |
1010 | _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size) | |
1da177e4 | 1011 | { |
3d19f804 TI |
1012 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1013 | struct dsp_task_descriptor * desc = NULL; | |
1da177e4 LT |
1014 | |
1015 | if (ins->ntask == DSP_MAX_TASK_DESC - 1) { | |
2b96a7f1 TI |
1016 | dev_err(chip->card->dev, |
1017 | "dsp_spos: got no place for other TASK\n"); | |
1da177e4 LT |
1018 | return NULL; |
1019 | } | |
1020 | ||
89f157d9 TI |
1021 | if (name) |
1022 | strcpy(ins->tasks[ins->ntask].task_name, name); | |
1023 | else | |
1024 | strcpy(ins->tasks[ins->ntask].task_name, "(NULL)"); | |
1da177e4 LT |
1025 | ins->tasks[ins->ntask].address = dest; |
1026 | ins->tasks[ins->ntask].size = size; | |
1027 | ||
1028 | /* quick find in list */ | |
1029 | ins->tasks[ins->ntask].index = ins->ntask; | |
1030 | desc = (ins->tasks + ins->ntask); | |
1031 | ins->ntask++; | |
1032 | ||
89f157d9 TI |
1033 | if (name) |
1034 | add_symbol (chip,name,dest,SYMBOL_PARAMETER); | |
1da177e4 LT |
1035 | return desc; |
1036 | } | |
1037 | ||
41116e92 TI |
1038 | #define SCB_BYTES (0x10 * 4) |
1039 | ||
3d19f804 TI |
1040 | struct dsp_scb_descriptor * |
1041 | cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) | |
1da177e4 | 1042 | { |
3d19f804 | 1043 | struct dsp_scb_descriptor * desc; |
1da177e4 | 1044 | |
c7561cd8 | 1045 | #ifdef CONFIG_PM_SLEEP |
41116e92 TI |
1046 | /* copy the data for resume */ |
1047 | scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL); | |
1048 | if (!scb_data) | |
1049 | return NULL; | |
1050 | #endif | |
1051 | ||
1da177e4 LT |
1052 | desc = _map_scb (chip,name,dest); |
1053 | if (desc) { | |
89f157d9 | 1054 | desc->data = scb_data; |
1da177e4 LT |
1055 | _dsp_create_scb(chip,scb_data,dest); |
1056 | } else { | |
2b96a7f1 | 1057 | dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n"); |
c7561cd8 | 1058 | #ifdef CONFIG_PM_SLEEP |
41116e92 TI |
1059 | kfree(scb_data); |
1060 | #endif | |
1da177e4 LT |
1061 | } |
1062 | ||
1063 | return desc; | |
1064 | } | |
1065 | ||
1066 | ||
3d19f804 TI |
1067 | static struct dsp_task_descriptor * |
1068 | cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data, | |
1069 | u32 dest, int size) | |
1da177e4 | 1070 | { |
3d19f804 | 1071 | struct dsp_task_descriptor * desc; |
1da177e4 LT |
1072 | |
1073 | desc = _map_task_tree (chip,name,dest,size); | |
1074 | if (desc) { | |
89f157d9 | 1075 | desc->data = task_data; |
1da177e4 LT |
1076 | _dsp_create_task_tree(chip,task_data,dest,size); |
1077 | } else { | |
2b96a7f1 | 1078 | dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n"); |
1da177e4 LT |
1079 | } |
1080 | ||
1081 | return desc; | |
1082 | } | |
1083 | ||
3d19f804 | 1084 | int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) |
1da177e4 | 1085 | { |
3d19f804 TI |
1086 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1087 | struct dsp_symbol_entry * fg_task_tree_header_code; | |
1088 | struct dsp_symbol_entry * task_tree_header_code; | |
1089 | struct dsp_symbol_entry * task_tree_thread; | |
1090 | struct dsp_symbol_entry * null_algorithm; | |
1091 | struct dsp_symbol_entry * magic_snoop_task; | |
1092 | ||
1093 | struct dsp_scb_descriptor * timing_master_scb; | |
1094 | struct dsp_scb_descriptor * codec_out_scb; | |
1095 | struct dsp_scb_descriptor * codec_in_scb; | |
1096 | struct dsp_scb_descriptor * src_task_scb; | |
1097 | struct dsp_scb_descriptor * master_mix_scb; | |
1098 | struct dsp_scb_descriptor * rear_mix_scb; | |
1099 | struct dsp_scb_descriptor * record_mix_scb; | |
1100 | struct dsp_scb_descriptor * write_back_scb; | |
1101 | struct dsp_scb_descriptor * vari_decimate_scb; | |
1102 | struct dsp_scb_descriptor * rear_codec_out_scb; | |
1103 | struct dsp_scb_descriptor * clfe_codec_out_scb; | |
1104 | struct dsp_scb_descriptor * magic_snoop_scb; | |
1da177e4 | 1105 | |
3d19f804 | 1106 | int fifo_addr, fifo_span, valid_slots; |
1da177e4 | 1107 | |
3d19f804 | 1108 | static struct dsp_spos_control_block sposcb = { |
1da177e4 LT |
1109 | /* 0 */ HFG_TREE_SCB,HFG_STACK, |
1110 | /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR, | |
1111 | /* 2 */ DSP_SPOS_DC,0, | |
1112 | /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC, | |
1113 | /* 4 */ 0,0, | |
1114 | /* 5 */ DSP_SPOS_UU,0, | |
1115 | /* 6 */ FG_TASK_HEADER_ADDR,0, | |
1116 | /* 7 */ 0,0, | |
1117 | /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC, | |
1118 | /* 9 */ 0, | |
1119 | /* A */ 0,HFG_FIRST_EXECUTE_MODE, | |
1120 | /* B */ DSP_SPOS_UU,DSP_SPOS_UU, | |
1121 | /* C */ DSP_SPOS_DC_DC, | |
1122 | /* D */ DSP_SPOS_DC_DC, | |
1123 | /* E */ DSP_SPOS_DC_DC, | |
1124 | /* F */ DSP_SPOS_DC_DC | |
1125 | }; | |
1126 | ||
1127 | cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); | |
1128 | ||
1129 | null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); | |
1130 | if (null_algorithm == NULL) { | |
2b96a7f1 TI |
1131 | dev_err(chip->card->dev, |
1132 | "dsp_spos: symbol NULLALGORITHM not found\n"); | |
1da177e4 LT |
1133 | return -EIO; |
1134 | } | |
1135 | ||
1136 | fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); | |
1137 | if (fg_task_tree_header_code == NULL) { | |
2b96a7f1 TI |
1138 | dev_err(chip->card->dev, |
1139 | "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n"); | |
1da177e4 LT |
1140 | return -EIO; |
1141 | } | |
1142 | ||
1143 | task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); | |
1144 | if (task_tree_header_code == NULL) { | |
2b96a7f1 TI |
1145 | dev_err(chip->card->dev, |
1146 | "dsp_spos: symbol TASKTREEHEADERCODE not found\n"); | |
1da177e4 LT |
1147 | return -EIO; |
1148 | } | |
1149 | ||
1150 | task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); | |
1151 | if (task_tree_thread == NULL) { | |
2b96a7f1 TI |
1152 | dev_err(chip->card->dev, |
1153 | "dsp_spos: symbol TASKTREETHREAD not found\n"); | |
1da177e4 LT |
1154 | return -EIO; |
1155 | } | |
1156 | ||
1157 | magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); | |
1158 | if (magic_snoop_task == NULL) { | |
2b96a7f1 TI |
1159 | dev_err(chip->card->dev, |
1160 | "dsp_spos: symbol MAGICSNOOPTASK not found\n"); | |
1da177e4 LT |
1161 | return -EIO; |
1162 | } | |
1163 | ||
1164 | { | |
1165 | /* create the null SCB */ | |
3d19f804 | 1166 | static struct dsp_generic_scb null_scb = { |
1da177e4 LT |
1167 | { 0, 0, 0, 0 }, |
1168 | { 0, 0, 0, 0, 0 }, | |
1169 | NULL_SCB_ADDR, NULL_SCB_ADDR, | |
1170 | 0, 0, 0, 0, 0, | |
1171 | { | |
1172 | 0,0, | |
1173 | 0,0, | |
1174 | } | |
1175 | }; | |
1176 | ||
1177 | null_scb.entry_point = null_algorithm->address; | |
1178 | ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); | |
1179 | ins->the_null_scb->task_entry = null_algorithm; | |
1180 | ins->the_null_scb->sub_list_ptr = ins->the_null_scb; | |
1181 | ins->the_null_scb->next_scb_ptr = ins->the_null_scb; | |
1182 | ins->the_null_scb->parent_scb_ptr = NULL; | |
1183 | cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); | |
1184 | } | |
1185 | ||
1186 | { | |
1187 | /* setup foreground task tree */ | |
3d19f804 | 1188 | static struct dsp_task_tree_control_block fg_task_tree_hdr = { |
1da177e4 LT |
1189 | { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10), |
1190 | DSP_SPOS_DC_DC, | |
1191 | DSP_SPOS_DC_DC, | |
1192 | 0x0000,DSP_SPOS_DC, | |
1193 | DSP_SPOS_DC, DSP_SPOS_DC, | |
1194 | DSP_SPOS_DC_DC, | |
1195 | DSP_SPOS_DC_DC, | |
1196 | DSP_SPOS_DC_DC, | |
1197 | DSP_SPOS_DC,DSP_SPOS_DC }, | |
1198 | ||
1199 | { | |
1200 | BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, | |
1201 | 0, | |
1202 | FG_TASK_HEADER_ADDR + TCBData, | |
1203 | }, | |
1204 | ||
1205 | { | |
1206 | 4,0, | |
1207 | 1,0, | |
1208 | 2,SPOSCB_ADDR + HFGFlags, | |
1209 | 0,0, | |
1210 | FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK | |
1211 | }, | |
1212 | ||
1213 | { | |
1214 | DSP_SPOS_DC,0, | |
1215 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1216 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1217 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1218 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1219 | DSP_SPOS_DCDC, | |
1220 | DSP_SPOS_UU,1, | |
1221 | DSP_SPOS_DCDC, | |
1222 | DSP_SPOS_DCDC, | |
1223 | DSP_SPOS_DCDC, | |
1224 | DSP_SPOS_DCDC, | |
1225 | DSP_SPOS_DCDC, | |
1226 | DSP_SPOS_DCDC, | |
1227 | DSP_SPOS_DCDC, | |
1228 | DSP_SPOS_DCDC, | |
1229 | DSP_SPOS_DCDC, | |
1230 | DSP_SPOS_DCDC, | |
1231 | DSP_SPOS_DCDC, | |
1232 | DSP_SPOS_DCDC, | |
1233 | DSP_SPOS_DCDC, | |
1234 | DSP_SPOS_DCDC, | |
1235 | DSP_SPOS_DCDC, | |
1236 | DSP_SPOS_DCDC, | |
1237 | DSP_SPOS_DCDC, | |
1238 | DSP_SPOS_DCDC, | |
1239 | DSP_SPOS_DCDC, | |
1240 | DSP_SPOS_DCDC, | |
1241 | DSP_SPOS_DCDC, | |
1242 | DSP_SPOS_DCDC, | |
1243 | DSP_SPOS_DCDC, | |
1244 | DSP_SPOS_DCDC, | |
1245 | DSP_SPOS_DCDC, | |
1246 | DSP_SPOS_DCDC, | |
1247 | DSP_SPOS_DCDC, | |
1248 | DSP_SPOS_DCDC | |
1249 | }, | |
1250 | { | |
1251 | FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, | |
1252 | 0,0 | |
1253 | } | |
1254 | }; | |
1255 | ||
1256 | fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address; | |
1257 | fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; | |
1258 | cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); | |
1259 | } | |
1260 | ||
1261 | ||
1262 | { | |
1263 | /* setup foreground task tree */ | |
3d19f804 | 1264 | static struct dsp_task_tree_control_block bg_task_tree_hdr = { |
1da177e4 LT |
1265 | { DSP_SPOS_DC_DC, |
1266 | DSP_SPOS_DC_DC, | |
1267 | DSP_SPOS_DC_DC, | |
1268 | DSP_SPOS_DC, DSP_SPOS_DC, | |
1269 | DSP_SPOS_DC, DSP_SPOS_DC, | |
1270 | DSP_SPOS_DC_DC, | |
1271 | DSP_SPOS_DC_DC, | |
1272 | DSP_SPOS_DC_DC, | |
1273 | DSP_SPOS_DC,DSP_SPOS_DC }, | |
1274 | ||
1275 | { | |
1276 | NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */ | |
1277 | 0, | |
1278 | BG_TREE_SCB_ADDR + TCBData, | |
1279 | }, | |
1280 | ||
1281 | { | |
1282 | 9999,0, | |
1283 | 0,1, | |
1284 | 0,SPOSCB_ADDR + HFGFlags, | |
1285 | 0,0, | |
1286 | BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK | |
1287 | }, | |
1288 | ||
1289 | { | |
1290 | DSP_SPOS_DC,0, | |
1291 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1292 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1293 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1294 | DSP_SPOS_DC,DSP_SPOS_DC, | |
1295 | DSP_SPOS_DCDC, | |
1296 | DSP_SPOS_UU,1, | |
1297 | DSP_SPOS_DCDC, | |
1298 | DSP_SPOS_DCDC, | |
1299 | DSP_SPOS_DCDC, | |
1300 | DSP_SPOS_DCDC, | |
1301 | DSP_SPOS_DCDC, | |
1302 | DSP_SPOS_DCDC, | |
1303 | DSP_SPOS_DCDC, | |
1304 | DSP_SPOS_DCDC, | |
1305 | DSP_SPOS_DCDC, | |
1306 | DSP_SPOS_DCDC, | |
1307 | DSP_SPOS_DCDC, | |
1308 | DSP_SPOS_DCDC, | |
1309 | DSP_SPOS_DCDC, | |
1310 | DSP_SPOS_DCDC, | |
1311 | DSP_SPOS_DCDC, | |
1312 | DSP_SPOS_DCDC, | |
1313 | DSP_SPOS_DCDC, | |
1314 | DSP_SPOS_DCDC, | |
1315 | DSP_SPOS_DCDC, | |
1316 | DSP_SPOS_DCDC, | |
1317 | DSP_SPOS_DCDC, | |
1318 | DSP_SPOS_DCDC, | |
1319 | DSP_SPOS_DCDC, | |
1320 | DSP_SPOS_DCDC, | |
1321 | DSP_SPOS_DCDC, | |
1322 | DSP_SPOS_DCDC, | |
1323 | DSP_SPOS_DCDC, | |
1324 | DSP_SPOS_DCDC | |
1325 | }, | |
1326 | { | |
1327 | BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, | |
1328 | 0,0 | |
1329 | } | |
1330 | }; | |
1331 | ||
1332 | bg_task_tree_hdr.links.entry_point = task_tree_header_code->address; | |
1333 | bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; | |
1334 | cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); | |
1335 | } | |
1336 | ||
1337 | /* create timing master SCB */ | |
1338 | timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); | |
1339 | ||
1340 | /* create the CODEC output task */ | |
1341 | codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, | |
1342 | MASTERMIX_SCB_ADDR, | |
1343 | CODECOUT_SCB_ADDR,timing_master_scb, | |
1344 | SCB_ON_PARENT_SUBLIST_SCB); | |
1345 | ||
1346 | if (!codec_out_scb) goto _fail_end; | |
1347 | /* create the master mix SCB */ | |
1348 | master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", | |
1349 | MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR, | |
1350 | codec_out_scb, | |
1351 | SCB_ON_PARENT_SUBLIST_SCB); | |
1352 | ins->master_mix_scb = master_mix_scb; | |
1353 | ||
1354 | if (!master_mix_scb) goto _fail_end; | |
1355 | ||
1356 | /* create codec in */ | |
1357 | codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, | |
1358 | CODEC_INPUT_BUF1, | |
1359 | CODECIN_SCB_ADDR,codec_out_scb, | |
1360 | SCB_ON_PARENT_NEXT_SCB); | |
1361 | if (!codec_in_scb) goto _fail_end; | |
1362 | ins->codec_in_scb = codec_in_scb; | |
1363 | ||
1364 | /* create write back scb */ | |
1365 | write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", | |
1366 | WRITE_BACK_BUF1,WRITE_BACK_SPB, | |
1367 | WRITEBACK_SCB_ADDR, | |
1368 | timing_master_scb, | |
1369 | SCB_ON_PARENT_NEXT_SCB); | |
1370 | if (!write_back_scb) goto _fail_end; | |
1371 | ||
1372 | { | |
3d19f804 | 1373 | static struct dsp_mix2_ostream_spb mix2_ostream_spb = { |
1da177e4 LT |
1374 | 0x00020000, |
1375 | 0x0000ffff | |
1376 | }; | |
1377 | ||
89f157d9 TI |
1378 | if (!cs46xx_dsp_create_task_tree(chip, NULL, |
1379 | (u32 *)&mix2_ostream_spb, | |
1380 | WRITE_BACK_SPB, 2)) | |
1381 | goto _fail_end; | |
1da177e4 LT |
1382 | } |
1383 | ||
1384 | /* input sample converter */ | |
1385 | vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", | |
1386 | VARI_DECIMATE_BUF0, | |
1387 | VARI_DECIMATE_BUF1, | |
1388 | VARIDECIMATE_SCB_ADDR, | |
1389 | write_back_scb, | |
1390 | SCB_ON_PARENT_SUBLIST_SCB); | |
1391 | if (!vari_decimate_scb) goto _fail_end; | |
1392 | ||
1393 | /* create the record mixer SCB */ | |
1394 | record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", | |
1395 | MIX_SAMPLE_BUF2, | |
1396 | RECORD_MIXER_SCB_ADDR, | |
1397 | vari_decimate_scb, | |
1398 | SCB_ON_PARENT_SUBLIST_SCB); | |
1399 | ins->record_mixer_scb = record_mix_scb; | |
1400 | ||
1401 | if (!record_mix_scb) goto _fail_end; | |
1402 | ||
1403 | valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); | |
1404 | ||
da3cec35 TI |
1405 | if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2)) |
1406 | goto _fail_end; | |
1da177e4 LT |
1407 | |
1408 | if (chip->nr_ac97_codecs == 1) { | |
1409 | /* output on slot 5 and 11 | |
1410 | on primary CODEC */ | |
1411 | fifo_addr = 0x20; | |
1412 | fifo_span = 0x60; | |
1413 | ||
1414 | /* enable slot 5 and 11 */ | |
1415 | valid_slots |= ACOSV_SLV5 | ACOSV_SLV11; | |
1416 | } else { | |
1417 | /* output on slot 7 and 8 | |
1418 | on secondary CODEC */ | |
1419 | fifo_addr = 0x40; | |
1420 | fifo_span = 0x10; | |
1421 | ||
1422 | /* enable slot 7 and 8 */ | |
1423 | valid_slots |= ACOSV_SLV7 | ACOSV_SLV8; | |
1424 | } | |
1425 | /* create CODEC tasklet for rear speakers output*/ | |
1426 | rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, | |
1427 | REAR_MIXER_SCB_ADDR, | |
1428 | REAR_CODECOUT_SCB_ADDR,codec_in_scb, | |
1429 | SCB_ON_PARENT_NEXT_SCB); | |
1430 | if (!rear_codec_out_scb) goto _fail_end; | |
1431 | ||
1432 | ||
1433 | /* create the rear PCM channel mixer SCB */ | |
1434 | rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", | |
1435 | MIX_SAMPLE_BUF3, | |
1436 | REAR_MIXER_SCB_ADDR, | |
1437 | rear_codec_out_scb, | |
1438 | SCB_ON_PARENT_SUBLIST_SCB); | |
1439 | ins->rear_mix_scb = rear_mix_scb; | |
1440 | if (!rear_mix_scb) goto _fail_end; | |
1441 | ||
1442 | if (chip->nr_ac97_codecs == 2) { | |
1443 | /* create CODEC tasklet for rear Center/LFE output | |
1444 | slot 6 and 9 on seconadry CODEC */ | |
1445 | clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, | |
1446 | CLFE_MIXER_SCB_ADDR, | |
1447 | CLFE_CODEC_SCB_ADDR, | |
1448 | rear_codec_out_scb, | |
1449 | SCB_ON_PARENT_NEXT_SCB); | |
1450 | if (!clfe_codec_out_scb) goto _fail_end; | |
1451 | ||
1452 | ||
1453 | /* create the rear PCM channel mixer SCB */ | |
1454 | ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", | |
1455 | MIX_SAMPLE_BUF4, | |
1456 | CLFE_MIXER_SCB_ADDR, | |
1457 | clfe_codec_out_scb, | |
1458 | SCB_ON_PARENT_SUBLIST_SCB); | |
1459 | if (!ins->center_lfe_mix_scb) goto _fail_end; | |
1460 | ||
1461 | /* enable slot 6 and 9 */ | |
1462 | valid_slots |= ACOSV_SLV6 | ACOSV_SLV9; | |
1463 | } else { | |
1464 | clfe_codec_out_scb = rear_codec_out_scb; | |
1465 | ins->center_lfe_mix_scb = rear_mix_scb; | |
1466 | } | |
1467 | ||
1468 | /* enable slots depending on CODEC configuration */ | |
1469 | snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); | |
1470 | ||
1471 | /* the magic snooper */ | |
1472 | magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, | |
1473 | OUTPUT_SNOOP_BUFFER, | |
1474 | codec_out_scb, | |
1475 | clfe_codec_out_scb, | |
1476 | SCB_ON_PARENT_NEXT_SCB); | |
1477 | ||
1478 | ||
1479 | if (!magic_snoop_scb) goto _fail_end; | |
1480 | ins->ref_snoop_scb = magic_snoop_scb; | |
1481 | ||
1482 | /* SP IO access */ | |
1483 | if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, | |
1484 | magic_snoop_scb, | |
1485 | SCB_ON_PARENT_NEXT_SCB)) | |
1486 | goto _fail_end; | |
1487 | ||
1488 | /* SPDIF input sampel rate converter */ | |
1489 | src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", | |
1490 | ins->spdif_in_sample_rate, | |
1491 | SRC_OUTPUT_BUF1, | |
1492 | SRC_DELAY_BUF1,SRCTASK_SCB_ADDR, | |
1493 | master_mix_scb, | |
1494 | SCB_ON_PARENT_SUBLIST_SCB,1); | |
1495 | ||
1496 | if (!src_task_scb) goto _fail_end; | |
1497 | cs46xx_src_unlink(chip,src_task_scb); | |
1498 | ||
1499 | /* NOTE: when we now how to detect the SPDIF input | |
1500 | sample rate we will use this SRC to adjust it */ | |
1501 | ins->spdif_in_src = src_task_scb; | |
1502 | ||
1503 | cs46xx_dsp_async_init(chip,timing_master_scb); | |
1504 | return 0; | |
1505 | ||
1506 | _fail_end: | |
2b96a7f1 | 1507 | dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n"); |
1da177e4 LT |
1508 | return -EINVAL; |
1509 | } | |
1510 | ||
3d19f804 TI |
1511 | static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, |
1512 | struct dsp_scb_descriptor * fg_entry) | |
1da177e4 | 1513 | { |
3d19f804 TI |
1514 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1515 | struct dsp_symbol_entry * s16_async_codec_input_task; | |
1516 | struct dsp_symbol_entry * spdifo_task; | |
1517 | struct dsp_symbol_entry * spdifi_task; | |
1518 | struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc; | |
1da177e4 LT |
1519 | |
1520 | s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); | |
1521 | if (s16_async_codec_input_task == NULL) { | |
2b96a7f1 TI |
1522 | dev_err(chip->card->dev, |
1523 | "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n"); | |
1da177e4 LT |
1524 | return -EIO; |
1525 | } | |
1526 | spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); | |
1527 | if (spdifo_task == NULL) { | |
2b96a7f1 TI |
1528 | dev_err(chip->card->dev, |
1529 | "dsp_spos: symbol SPDIFOTASK not found\n"); | |
1da177e4 LT |
1530 | return -EIO; |
1531 | } | |
1532 | ||
1533 | spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); | |
1534 | if (spdifi_task == NULL) { | |
2b96a7f1 TI |
1535 | dev_err(chip->card->dev, |
1536 | "dsp_spos: symbol SPDIFITASK not found\n"); | |
1da177e4 LT |
1537 | return -EIO; |
1538 | } | |
1539 | ||
1540 | { | |
1541 | /* 0xBC0 */ | |
3d19f804 | 1542 | struct dsp_spdifoscb spdifo_scb = { |
1da177e4 LT |
1543 | /* 0 */ DSP_SPOS_UUUU, |
1544 | { | |
1545 | /* 1 */ 0xb0, | |
1546 | /* 2 */ 0, | |
1547 | /* 3 */ 0, | |
1548 | /* 4 */ 0, | |
1549 | }, | |
1550 | /* NOTE: the SPDIF output task read samples in mono | |
1551 | format, the AsynchFGTxSCB task writes to buffer | |
1552 | in stereo format | |
1553 | */ | |
1554 | /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256, | |
1555 | /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC, | |
1556 | /* 7 */ 0,0, | |
1557 | /* 8 */ 0, | |
1558 | /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, | |
1559 | /* A */ spdifo_task->address, | |
1560 | SPDIFO_SCB_INST + SPDIFOFIFOPointer, | |
1561 | { | |
1562 | /* B */ 0x0040, /*DSP_SPOS_UUUU,*/ | |
1563 | /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/ | |
1564 | }, | |
1565 | /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */ | |
1566 | /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */ | |
1567 | /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */ | |
1568 | }; | |
1569 | ||
1570 | /* 0xBB0 */ | |
3d19f804 | 1571 | struct dsp_spdifiscb spdifi_scb = { |
1da177e4 LT |
1572 | /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI, |
1573 | /* 1 */ 0, | |
1574 | /* 2 */ 0, | |
1575 | /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */ | |
1576 | /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */ | |
1577 | /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */ | |
1578 | /* 6 */ DSP_SPOS_UUUU, /* Free3 */ | |
1579 | /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/ | |
1580 | /* 8 */ DSP_SPOS_UUUU, /* TempStatus */ | |
1581 | /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR, | |
1582 | /* A */ spdifi_task->address, | |
1583 | SPDIFI_SCB_INST + SPDIFIFIFOPointer, | |
1584 | /* NOTE: The SPDIF input task write the sample in mono | |
1585 | format from the HW FIFO, the AsynchFGRxSCB task reads | |
1586 | them in stereo | |
1587 | */ | |
1588 | /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128, | |
1589 | /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, | |
1590 | /* D */ 0x8048,0, | |
1591 | /* E */ 0x01f0,0x0001, | |
1592 | /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */ | |
1593 | }; | |
1594 | ||
1595 | /* 0xBA0 */ | |
3d19f804 | 1596 | struct dsp_async_codec_input_scb async_codec_input_scb = { |
1da177e4 LT |
1597 | /* 0 */ DSP_SPOS_UUUU, |
1598 | /* 1 */ 0, | |
1599 | /* 2 */ 0, | |
1600 | /* 3 */ 1,4000, | |
1601 | /* 4 */ 0x0118,0x0001, | |
1602 | /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64, | |
1603 | /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, | |
1604 | /* 7 */ DSP_SPOS_UU,0x3, | |
1605 | /* 8 */ DSP_SPOS_UUUU, | |
1606 | /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR, | |
1607 | /* A */ s16_async_codec_input_task->address, | |
1608 | HFG_TREE_SCB + AsyncCIOFIFOPointer, | |
1609 | ||
1610 | /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, | |
1611 | /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/ | |
1612 | ||
1613 | #ifdef UseASER1Input | |
1614 | /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; | |
1615 | Init. 0000:8042: for ASER1 | |
1616 | 0000:8044: for ASER2 */ | |
1617 | /* D */ 0x8042,0, | |
1618 | ||
1619 | /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; | |
1620 | Init 1 stero:8050 ASER1 | |
1621 | Init 0 mono:8070 ASER2 | |
1622 | Init 1 Stereo : 0100 ASER1 (Set by script) */ | |
1623 | /* E */ 0x0100,0x0001, | |
1624 | ||
1625 | #endif | |
1626 | ||
1627 | #ifdef UseASER2Input | |
1628 | /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; | |
1629 | Init. 0000:8042: for ASER1 | |
1630 | 0000:8044: for ASER2 */ | |
1631 | /* D */ 0x8044,0, | |
1632 | ||
1633 | /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; | |
1634 | Init 1 stero:8050 ASER1 | |
1635 | Init 0 mono:8070 ASER2 | |
1636 | Init 1 Stereo : 0100 ASER1 (Set by script) */ | |
1637 | /* E */ 0x0110,0x0001, | |
1638 | ||
1639 | #endif | |
1640 | ||
1641 | /* short AsyncCIOutputBufModulo:AsyncCIFree; | |
1642 | AsyncCIOutputBufModulo: The modulo size for | |
1643 | the output buffer of this task */ | |
1644 | /* F */ 0, /* DSP_SPOS_UUUU */ | |
1645 | }; | |
1646 | ||
1647 | spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); | |
1648 | ||
da3cec35 TI |
1649 | if (snd_BUG_ON(!spdifo_scb_desc)) |
1650 | return -EIO; | |
1da177e4 | 1651 | spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); |
da3cec35 TI |
1652 | if (snd_BUG_ON(!spdifi_scb_desc)) |
1653 | return -EIO; | |
1da177e4 | 1654 | async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); |
da3cec35 TI |
1655 | if (snd_BUG_ON(!async_codec_scb_desc)) |
1656 | return -EIO; | |
1da177e4 LT |
1657 | |
1658 | async_codec_scb_desc->parent_scb_ptr = NULL; | |
1659 | async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc; | |
1660 | async_codec_scb_desc->sub_list_ptr = ins->the_null_scb; | |
1661 | async_codec_scb_desc->task_entry = s16_async_codec_input_task; | |
1662 | ||
1663 | spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc; | |
1664 | spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc; | |
1665 | spdifi_scb_desc->sub_list_ptr = ins->the_null_scb; | |
1666 | spdifi_scb_desc->task_entry = spdifi_task; | |
1667 | ||
1668 | spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc; | |
1669 | spdifo_scb_desc->next_scb_ptr = fg_entry; | |
1670 | spdifo_scb_desc->sub_list_ptr = ins->the_null_scb; | |
1671 | spdifo_scb_desc->task_entry = spdifo_task; | |
1672 | ||
1673 | /* this one is faked, as the parnet of SPDIFO task | |
1674 | is the FG task tree */ | |
1675 | fg_entry->parent_scb_ptr = spdifo_scb_desc; | |
1676 | ||
1677 | /* for proc fs */ | |
1678 | cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); | |
1679 | cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); | |
1680 | cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); | |
1681 | ||
1682 | /* Async MASTER ENABLE, affects both SPDIF input and output */ | |
1683 | snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); | |
1684 | } | |
1685 | ||
1686 | return 0; | |
1687 | } | |
1688 | ||
3d19f804 | 1689 | static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip) |
1da177e4 | 1690 | { |
3d19f804 | 1691 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
1692 | |
1693 | /* set SPDIF output FIFO slot */ | |
1694 | snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); | |
1695 | ||
1696 | /* SPDIF output MASTER ENABLE */ | |
1697 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); | |
1698 | ||
1699 | /* right and left validate bit */ | |
1700 | /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ | |
1701 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); | |
1702 | ||
1703 | /* clear fifo pointer */ | |
1704 | cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); | |
1705 | ||
1706 | /* monitor state */ | |
1707 | ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED; | |
1708 | } | |
1709 | ||
3d19f804 | 1710 | int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip) |
1da177e4 | 1711 | { |
3d19f804 | 1712 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
1713 | |
1714 | /* if hw-ctrl already enabled, turn off to reset logic ... */ | |
1715 | cs46xx_dsp_disable_spdif_hw (chip); | |
1716 | udelay(50); | |
1717 | ||
1718 | /* set SPDIF output FIFO slot */ | |
1719 | snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); | |
1720 | ||
1721 | /* SPDIF output MASTER ENABLE */ | |
1722 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); | |
1723 | ||
1724 | /* right and left validate bit */ | |
1725 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); | |
1726 | ||
1727 | /* monitor state */ | |
1728 | ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED; | |
1729 | ||
1730 | return 0; | |
1731 | } | |
1732 | ||
3d19f804 | 1733 | int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip) |
1da177e4 | 1734 | { |
3d19f804 | 1735 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 LT |
1736 | |
1737 | /* turn on amplifier */ | |
1738 | chip->active_ctrl(chip, 1); | |
1739 | chip->amplifier_ctrl(chip, 1); | |
1740 | ||
da3cec35 TI |
1741 | if (snd_BUG_ON(ins->asynch_rx_scb)) |
1742 | return -EINVAL; | |
1743 | if (snd_BUG_ON(!ins->spdif_in_src)) | |
1744 | return -EINVAL; | |
1da177e4 | 1745 | |
62932df8 | 1746 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1747 | |
1748 | if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) { | |
1749 | /* time countdown enable */ | |
1750 | cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); | |
1751 | /* NOTE: 80000005 value is just magic. With all values | |
1752 | that I've tested this one seem to give the best result. | |
1753 | Got no explication why. (Benny) */ | |
1754 | ||
1755 | /* SPDIF input MASTER ENABLE */ | |
1756 | cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); | |
1757 | ||
1758 | ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED; | |
1759 | } | |
1760 | ||
1761 | /* create and start the asynchronous receiver SCB */ | |
1762 | ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", | |
1763 | ASYNCRX_SCB_ADDR, | |
1764 | SPDIFI_SCB_INST, | |
1765 | SPDIFI_IP_OUTPUT_BUFFER1, | |
1766 | ins->spdif_in_src, | |
1767 | SCB_ON_PARENT_SUBLIST_SCB); | |
1768 | ||
1769 | spin_lock_irq(&chip->reg_lock); | |
1770 | ||
1771 | /* reset SPDIF input sample buffer pointer */ | |
1772 | /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, | |
1773 | (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/ | |
1774 | ||
1775 | /* reset FIFO ptr */ | |
1776 | /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ | |
1777 | cs46xx_src_link(chip,ins->spdif_in_src); | |
1778 | ||
1779 | /* unmute SRC volume */ | |
1780 | cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); | |
1781 | ||
1782 | spin_unlock_irq(&chip->reg_lock); | |
1783 | ||
1784 | /* set SPDIF input sample rate and unmute | |
1785 | NOTE: only 48khz support for SPDIF input this time */ | |
1786 | /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ | |
1787 | ||
1788 | /* monitor state */ | |
1789 | ins->spdif_status_in = 1; | |
62932df8 | 1790 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1791 | |
1792 | return 0; | |
1793 | } | |
1794 | ||
3d19f804 | 1795 | int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip) |
1da177e4 | 1796 | { |
3d19f804 | 1797 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 1798 | |
da3cec35 TI |
1799 | if (snd_BUG_ON(!ins->asynch_rx_scb)) |
1800 | return -EINVAL; | |
1801 | if (snd_BUG_ON(!ins->spdif_in_src)) | |
1802 | return -EINVAL; | |
1da177e4 | 1803 | |
62932df8 | 1804 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1805 | |
1806 | /* Remove the asynchronous receiver SCB */ | |
1807 | cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); | |
1808 | ins->asynch_rx_scb = NULL; | |
1809 | ||
1810 | cs46xx_src_unlink(chip,ins->spdif_in_src); | |
1811 | ||
1812 | /* monitor state */ | |
1813 | ins->spdif_status_in = 0; | |
62932df8 | 1814 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1815 | |
1816 | /* restore amplifier */ | |
1817 | chip->active_ctrl(chip, -1); | |
1818 | chip->amplifier_ctrl(chip, -1); | |
1819 | ||
1820 | return 0; | |
1821 | } | |
1822 | ||
3d19f804 | 1823 | int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip) |
1da177e4 | 1824 | { |
3d19f804 | 1825 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 1826 | |
da3cec35 TI |
1827 | if (snd_BUG_ON(ins->pcm_input)) |
1828 | return -EINVAL; | |
1829 | if (snd_BUG_ON(!ins->ref_snoop_scb)) | |
1830 | return -EINVAL; | |
1da177e4 | 1831 | |
62932df8 | 1832 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1833 | ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, |
1834 | "PCMSerialInput_Wave"); | |
62932df8 | 1835 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1836 | |
1837 | return 0; | |
1838 | } | |
1839 | ||
3d19f804 | 1840 | int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip) |
1da177e4 | 1841 | { |
3d19f804 | 1842 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 1843 | |
da3cec35 TI |
1844 | if (snd_BUG_ON(!ins->pcm_input)) |
1845 | return -EINVAL; | |
1da177e4 | 1846 | |
62932df8 | 1847 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1848 | cs46xx_dsp_remove_scb (chip,ins->pcm_input); |
1849 | ins->pcm_input = NULL; | |
62932df8 | 1850 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1851 | |
1852 | return 0; | |
1853 | } | |
1854 | ||
3d19f804 | 1855 | int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip) |
1da177e4 | 1856 | { |
3d19f804 | 1857 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 1858 | |
da3cec35 TI |
1859 | if (snd_BUG_ON(ins->adc_input)) |
1860 | return -EINVAL; | |
1861 | if (snd_BUG_ON(!ins->codec_in_scb)) | |
1862 | return -EINVAL; | |
1da177e4 | 1863 | |
62932df8 | 1864 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1865 | ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, |
1866 | "PCMSerialInput_ADC"); | |
62932df8 | 1867 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1868 | |
1869 | return 0; | |
1870 | } | |
1871 | ||
3d19f804 | 1872 | int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip) |
1da177e4 | 1873 | { |
3d19f804 | 1874 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1da177e4 | 1875 | |
da3cec35 TI |
1876 | if (snd_BUG_ON(!ins->adc_input)) |
1877 | return -EINVAL; | |
1da177e4 | 1878 | |
62932df8 | 1879 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1880 | cs46xx_dsp_remove_scb (chip,ins->adc_input); |
1881 | ins->adc_input = NULL; | |
62932df8 | 1882 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1883 | |
1884 | return 0; | |
1885 | } | |
1886 | ||
3d19f804 | 1887 | int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data) |
1da177e4 LT |
1888 | { |
1889 | u32 temp; | |
1890 | int i; | |
1891 | ||
1892 | /* santiy check the parameters. (These numbers are not 100% correct. They are | |
1893 | a rough guess from looking at the controller spec.) */ | |
1894 | if (address < 0x8000 || address >= 0x9000) | |
1895 | return -EINVAL; | |
1896 | ||
1897 | /* initialize the SP_IO_WRITE SCB with the data. */ | |
1898 | temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */ | |
1899 | ||
1900 | snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); | |
1901 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ | |
1902 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ | |
1903 | ||
1904 | /* Poke this location to tell the task to start */ | |
1905 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); | |
1906 | ||
1907 | /* Verify that the task ran */ | |
1908 | for (i=0; i<25; i++) { | |
1909 | udelay(125); | |
1910 | ||
1911 | temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); | |
1912 | if (temp == 0x00000000) | |
1913 | break; | |
1914 | } | |
1915 | ||
1916 | if (i == 25) { | |
2b96a7f1 TI |
1917 | dev_err(chip->card->dev, |
1918 | "dsp_spos: SPIOWriteTask not responding\n"); | |
1da177e4 LT |
1919 | return -EBUSY; |
1920 | } | |
1921 | ||
1922 | return 0; | |
1923 | } | |
1924 | ||
3d19f804 | 1925 | int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right) |
1da177e4 | 1926 | { |
3d19f804 TI |
1927 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
1928 | struct dsp_scb_descriptor * scb; | |
1da177e4 | 1929 | |
62932df8 | 1930 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1931 | |
1932 | /* main output */ | |
1933 | scb = ins->master_mix_scb->sub_list_ptr; | |
1934 | while (scb != ins->the_null_scb) { | |
1935 | cs46xx_dsp_scb_set_volume (chip,scb,left,right); | |
1936 | scb = scb->next_scb_ptr; | |
1937 | } | |
1938 | ||
1939 | /* rear output */ | |
1940 | scb = ins->rear_mix_scb->sub_list_ptr; | |
1941 | while (scb != ins->the_null_scb) { | |
1942 | cs46xx_dsp_scb_set_volume (chip,scb,left,right); | |
1943 | scb = scb->next_scb_ptr; | |
1944 | } | |
1945 | ||
1946 | ins->dac_volume_left = left; | |
1947 | ins->dac_volume_right = right; | |
1948 | ||
62932df8 | 1949 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1950 | |
1951 | return 0; | |
1952 | } | |
1953 | ||
3d19f804 TI |
1954 | int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right) |
1955 | { | |
1956 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
1da177e4 | 1957 | |
62932df8 | 1958 | mutex_lock(&chip->spos_mutex); |
1da177e4 LT |
1959 | |
1960 | if (ins->asynch_rx_scb != NULL) | |
1961 | cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, | |
1962 | left,right); | |
1963 | ||
1964 | ins->spdif_input_volume_left = left; | |
1965 | ins->spdif_input_volume_right = right; | |
1966 | ||
62932df8 | 1967 | mutex_unlock(&chip->spos_mutex); |
1da177e4 LT |
1968 | |
1969 | return 0; | |
1970 | } | |
89f157d9 | 1971 | |
c7561cd8 | 1972 | #ifdef CONFIG_PM_SLEEP |
89f157d9 TI |
1973 | int cs46xx_dsp_resume(struct snd_cs46xx * chip) |
1974 | { | |
1975 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; | |
1976 | int i, err; | |
1977 | ||
1978 | /* clear parameter, sample and code areas */ | |
1979 | snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, | |
1980 | DSP_PARAMETER_BYTE_SIZE); | |
1981 | snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, | |
1982 | DSP_SAMPLE_BYTE_SIZE); | |
1983 | snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); | |
1984 | ||
1985 | for (i = 0; i < ins->nmodules; i++) { | |
1986 | struct dsp_module_desc *module = &ins->modules[i]; | |
1987 | struct dsp_segment_desc *seg; | |
1988 | u32 doffset, dsize; | |
1989 | ||
1990 | seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER); | |
1991 | err = dsp_load_parameter(chip, seg); | |
1992 | if (err < 0) | |
1993 | return err; | |
1994 | ||
1995 | seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE); | |
1996 | err = dsp_load_sample(chip, seg); | |
1997 | if (err < 0) | |
1998 | return err; | |
1999 | ||
2000 | seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM); | |
2001 | if (!seg) | |
2002 | continue; | |
2003 | ||
2004 | doffset = seg->offset * 4 + module->load_address * 4 | |
2005 | + DSP_CODE_BYTE_OFFSET; | |
2006 | dsize = seg->size * 4; | |
2007 | err = snd_cs46xx_download(chip, | |
2008 | ins->code.data + module->load_address, | |
2009 | doffset, dsize); | |
2010 | if (err < 0) | |
2011 | return err; | |
2012 | } | |
2013 | ||
2014 | for (i = 0; i < ins->ntask; i++) { | |
2015 | struct dsp_task_descriptor *t = &ins->tasks[i]; | |
2016 | _dsp_create_task_tree(chip, t->data, t->address, t->size); | |
2017 | } | |
2018 | ||
2019 | for (i = 0; i < ins->nscb; i++) { | |
2020 | struct dsp_scb_descriptor *s = &ins->scbs[i]; | |
2021 | if (s->deleted) | |
2022 | continue; | |
2023 | _dsp_create_scb(chip, s->data, s->address); | |
2024 | } | |
41116e92 TI |
2025 | for (i = 0; i < ins->nscb; i++) { |
2026 | struct dsp_scb_descriptor *s = &ins->scbs[i]; | |
2027 | if (s->deleted) | |
2028 | continue; | |
2029 | if (s->updated) | |
2030 | cs46xx_dsp_spos_update_scb(chip, s); | |
2031 | if (s->volume_set) | |
2032 | cs46xx_dsp_scb_set_volume(chip, s, | |
2033 | s->volume[0], s->volume[1]); | |
2034 | } | |
2035 | if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) { | |
2036 | cs46xx_dsp_enable_spdif_hw(chip); | |
2037 | snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2, | |
2038 | (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10); | |
2039 | if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) | |
2040 | cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV, | |
2041 | ins->spdif_csuv_stream); | |
2042 | } | |
2043 | if (chip->dsp_spos_instance->spdif_status_in) { | |
2044 | cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005); | |
2045 | cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff); | |
2046 | } | |
89f157d9 TI |
2047 | return 0; |
2048 | } | |
2049 | #endif |