Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
c1017a4c | 2 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
3 | * Creative Labs, Inc. |
4 | * Routines for control of EMU10K1 chips | |
5 | * | |
9f4bd5dd | 6 | * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> |
1da177e4 | 7 | * Added support for Audigy 2 Value. |
9f4bd5dd JCD |
8 | * Added EMU 1010 support. |
9 | * General bug fixes and enhancements. | |
1da177e4 LT |
10 | * |
11 | * | |
12 | * BUGS: | |
13 | * -- | |
14 | * | |
15 | * TODO: | |
16 | * -- | |
17 | * | |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License as published by | |
20 | * the Free Software Foundation; either version 2 of the License, or | |
21 | * (at your option) any later version. | |
22 | * | |
23 | * This program is distributed in the hope that it will be useful, | |
24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
26 | * GNU General Public License for more details. | |
27 | * | |
28 | * You should have received a copy of the GNU General Public License | |
29 | * along with this program; if not, write to the Free Software | |
30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
31 | * | |
32 | */ | |
33 | ||
42f53226 JCD |
34 | #include <linux/sched.h> |
35 | #include <linux/kthread.h> | |
1da177e4 LT |
36 | #include <linux/delay.h> |
37 | #include <linux/init.h> | |
da155d5b | 38 | #include <linux/module.h> |
1da177e4 LT |
39 | #include <linux/interrupt.h> |
40 | #include <linux/pci.h> | |
41 | #include <linux/slab.h> | |
42 | #include <linux/vmalloc.h> | |
62932df8 IM |
43 | #include <linux/mutex.h> |
44 | ||
1da177e4 LT |
45 | |
46 | #include <sound/core.h> | |
47 | #include <sound/emu10k1.h> | |
9f4bd5dd | 48 | #include <linux/firmware.h> |
1da177e4 | 49 | #include "p16v.h" |
e2b15f8f | 50 | #include "tina2.h" |
184c1e2c | 51 | #include "p17v.h" |
1da177e4 | 52 | |
19b99fba | 53 | |
7e0af29d CL |
54 | #define HANA_FILENAME "emu/hana.fw" |
55 | #define DOCK_FILENAME "emu/audio_dock.fw" | |
3663d845 JCD |
56 | #define EMU1010B_FILENAME "emu/emu1010b.fw" |
57 | #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" | |
190d2c46 | 58 | #define EMU0404_FILENAME "emu/emu0404.fw" |
d9e8a552 | 59 | #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" |
7e0af29d CL |
60 | |
61 | MODULE_FIRMWARE(HANA_FILENAME); | |
62 | MODULE_FIRMWARE(DOCK_FILENAME); | |
3663d845 JCD |
63 | MODULE_FIRMWARE(EMU1010B_FILENAME); |
64 | MODULE_FIRMWARE(MICRO_DOCK_FILENAME); | |
190d2c46 | 65 | MODULE_FIRMWARE(EMU0404_FILENAME); |
d9e8a552 | 66 | MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); |
7e0af29d CL |
67 | |
68 | ||
1da177e4 LT |
69 | /************************************************************************* |
70 | * EMU10K1 init / done | |
71 | *************************************************************************/ | |
72 | ||
67679b1f | 73 | void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) |
1da177e4 LT |
74 | { |
75 | snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); | |
76 | snd_emu10k1_ptr_write(emu, IP, ch, 0); | |
77 | snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff); | |
78 | snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff); | |
79 | snd_emu10k1_ptr_write(emu, PTRX, ch, 0); | |
80 | snd_emu10k1_ptr_write(emu, CPF, ch, 0); | |
81 | snd_emu10k1_ptr_write(emu, CCR, ch, 0); | |
82 | ||
83 | snd_emu10k1_ptr_write(emu, PSST, ch, 0); | |
84 | snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); | |
85 | snd_emu10k1_ptr_write(emu, CCCA, ch, 0); | |
86 | snd_emu10k1_ptr_write(emu, Z1, ch, 0); | |
87 | snd_emu10k1_ptr_write(emu, Z2, ch, 0); | |
88 | snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); | |
89 | ||
90 | snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); | |
91 | snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); | |
92 | snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff); | |
93 | snd_emu10k1_ptr_write(emu, PEFE, ch, 0); | |
94 | snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); | |
95 | snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ | |
96 | snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ | |
97 | snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0); | |
98 | ||
99 | /*** these are last so OFF prevents writing ***/ | |
100 | snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); | |
101 | snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); | |
102 | snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); | |
103 | snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); | |
104 | snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); | |
105 | ||
106 | /* Audigy extra stuffs */ | |
107 | if (emu->audigy) { | |
108 | snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */ | |
109 | snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */ | |
110 | snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */ | |
111 | snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */ | |
112 | snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); | |
113 | snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f); | |
114 | snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); | |
115 | } | |
116 | } | |
117 | ||
18f3c59f JCD |
118 | static unsigned int spi_dac_init[] = { |
119 | 0x00ff, | |
120 | 0x02ff, | |
121 | 0x0400, | |
122 | 0x0520, | |
123 | 0x0600, | |
124 | 0x08ff, | |
125 | 0x0aff, | |
126 | 0x0cff, | |
127 | 0x0eff, | |
128 | 0x10ff, | |
129 | 0x1200, | |
130 | 0x1400, | |
131 | 0x1480, | |
132 | 0x1800, | |
133 | 0x1aff, | |
134 | 0x1cff, | |
135 | 0x1e00, | |
136 | 0x0530, | |
137 | 0x0602, | |
138 | 0x0622, | |
139 | 0x1400, | |
140 | }; | |
184c1e2c JCD |
141 | |
142 | static unsigned int i2c_adc_init[][2] = { | |
143 | { 0x17, 0x00 }, /* Reset */ | |
144 | { 0x07, 0x00 }, /* Timeout */ | |
145 | { 0x0b, 0x22 }, /* Interface control */ | |
146 | { 0x0c, 0x22 }, /* Master mode control */ | |
147 | { 0x0d, 0x08 }, /* Powerdown control */ | |
148 | { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ | |
149 | { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ | |
150 | { 0x10, 0x7b }, /* ALC Control 1 */ | |
151 | { 0x11, 0x00 }, /* ALC Control 2 */ | |
152 | { 0x12, 0x32 }, /* ALC Control 3 */ | |
153 | { 0x13, 0x00 }, /* Noise gate control */ | |
154 | { 0x14, 0xa6 }, /* Limiter control */ | |
67679b1f | 155 | { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ |
184c1e2c | 156 | }; |
67679b1f | 157 | |
09668b44 | 158 | static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume) |
1da177e4 | 159 | { |
1da177e4 | 160 | unsigned int silent_page; |
09668b44 | 161 | int ch; |
184c1e2c | 162 | u32 tmp; |
1da177e4 LT |
163 | |
164 | /* disable audio and lock cache */ | |
67679b1f VM |
165 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | |
166 | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); | |
1da177e4 LT |
167 | |
168 | /* reset recording buffers */ | |
169 | snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); | |
170 | snd_emu10k1_ptr_write(emu, MICBA, 0, 0); | |
171 | snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); | |
172 | snd_emu10k1_ptr_write(emu, FXBA, 0, 0); | |
173 | snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); | |
174 | snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); | |
175 | ||
176 | /* disable channel interrupt */ | |
177 | outl(0, emu->port + INTE); | |
178 | snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); | |
179 | snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); | |
180 | snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); | |
181 | snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); | |
182 | ||
67679b1f | 183 | if (emu->audigy) { |
1da177e4 LT |
184 | /* set SPDIF bypass mode */ |
185 | snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); | |
186 | /* enable rear left + rear right AC97 slots */ | |
09668b44 TI |
187 | snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | |
188 | AC97SLOT_REAR_LEFT); | |
1da177e4 LT |
189 | } |
190 | ||
191 | /* init envelope engine */ | |
09668b44 | 192 | for (ch = 0; ch < NUM_G; ch++) |
1da177e4 | 193 | snd_emu10k1_voice_init(emu, ch); |
1da177e4 | 194 | |
09668b44 TI |
195 | snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); |
196 | snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); | |
197 | snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); | |
1da177e4 | 198 | |
2b637da5 | 199 | if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ |
1da177e4 | 200 | /* Hacks for Alice3 to work independent of haP16V driver */ |
67679b1f | 201 | /* Setup SRCMulti_I2S SamplingRate */ |
1da177e4 LT |
202 | tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); |
203 | tmp &= 0xfffff1ff; | |
204 | tmp |= (0x2<<9); | |
205 | snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); | |
67679b1f | 206 | |
1da177e4 LT |
207 | /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ |
208 | snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); | |
209 | /* Setup SRCMulti Input Audio Enable */ | |
210 | /* Use 0xFFFFFFFF to enable P16V sounds. */ | |
211 | snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); | |
212 | ||
213 | /* Enabled Phased (8-channel) P16V playback */ | |
214 | outl(0x0201, emu->port + HCFG2); | |
215 | /* Set playback routing. */ | |
fd9a98ec | 216 | snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); |
1da177e4 | 217 | } |
e0474e53 | 218 | if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ |
1da177e4 | 219 | /* Hacks for Alice3 to work independent of haP16V driver */ |
6f002b02 | 220 | dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); |
67679b1f | 221 | /* Setup SRCMulti_I2S SamplingRate */ |
1da177e4 LT |
222 | tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); |
223 | tmp &= 0xfffff1ff; | |
224 | tmp |= (0x2<<9); | |
225 | snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); | |
226 | ||
227 | /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ | |
228 | outl(0x600000, emu->port + 0x20); | |
229 | outl(0x14, emu->port + 0x24); | |
230 | ||
231 | /* Setup SRCMulti Input Audio Enable */ | |
232 | outl(0x7b0000, emu->port + 0x20); | |
233 | outl(0xFF000000, emu->port + 0x24); | |
234 | ||
235 | /* Setup SPDIF Out Audio Enable */ | |
236 | /* The Audigy 2 Value has a separate SPDIF out, | |
237 | * so no need for a mixer switch | |
238 | */ | |
239 | outl(0x7a0000, emu->port + 0x20); | |
240 | outl(0xFF000000, emu->port + 0x24); | |
241 | tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ | |
242 | outl(tmp, emu->port + A_IOCFG); | |
243 | } | |
27fe864e | 244 | if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ |
18f3c59f JCD |
245 | int size, n; |
246 | ||
247 | size = ARRAY_SIZE(spi_dac_init); | |
9f4bd5dd | 248 | for (n = 0; n < size; n++) |
18f3c59f JCD |
249 | snd_emu10k1_spi_write(emu, spi_dac_init[n]); |
250 | ||
27fe864e | 251 | snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); |
ccadc3e3 JCD |
252 | /* Enable GPIOs |
253 | * GPIO0: Unknown | |
254 | * GPIO1: Speakers-enabled. | |
255 | * GPIO2: Unknown | |
256 | * GPIO3: Unknown | |
257 | * GPIO4: IEC958 Output on. | |
258 | * GPIO5: Unknown | |
259 | * GPIO6: Unknown | |
260 | * GPIO7: Unknown | |
261 | */ | |
262 | outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ | |
27fe864e | 263 | } |
184c1e2c JCD |
264 | if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ |
265 | int size, n; | |
266 | ||
267 | snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); | |
268 | tmp = inl(emu->port + A_IOCFG); | |
269 | outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ | |
270 | tmp = inl(emu->port + A_IOCFG); | |
271 | size = ARRAY_SIZE(i2c_adc_init); | |
272 | for (n = 0; n < size; n++) | |
273 | snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); | |
67679b1f VM |
274 | for (n = 0; n < 4; n++) { |
275 | emu->i2c_capture_volume[n][0] = 0xcf; | |
276 | emu->i2c_capture_volume[n][1] = 0xcf; | |
184c1e2c | 277 | } |
184c1e2c JCD |
278 | } |
279 | ||
67679b1f | 280 | |
1da177e4 LT |
281 | snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); |
282 | snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ | |
283 | snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */ | |
284 | ||
285 | silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK; | |
286 | for (ch = 0; ch < NUM_G; ch++) { | |
287 | snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); | |
288 | snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); | |
289 | } | |
290 | ||
190d2c46 | 291 | if (emu->card_capabilities->emu_model) { |
9f4bd5dd JCD |
292 | outl(HCFG_AUTOMUTE_ASYNC | |
293 | HCFG_EMU32_SLAVE | | |
294 | HCFG_AUDIOENABLE, emu->port + HCFG); | |
1da177e4 LT |
295 | /* |
296 | * Hokay, setup HCFG | |
297 | * Mute Disable Audio = 0 | |
298 | * Lock Tank Memory = 1 | |
299 | * Lock Sound Memory = 0 | |
300 | * Auto Mute = 1 | |
301 | */ | |
9f4bd5dd | 302 | } else if (emu->audigy) { |
1da177e4 LT |
303 | if (emu->revision == 4) /* audigy2 */ |
304 | outl(HCFG_AUDIOENABLE | | |
305 | HCFG_AC3ENABLE_CDSPDIF | | |
306 | HCFG_AC3ENABLE_GPSPDIF | | |
307 | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); | |
308 | else | |
309 | outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); | |
e0474e53 JCD |
310 | /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, |
311 | * e.g. card_capabilities->joystick */ | |
1da177e4 LT |
312 | } else if (emu->model == 0x20 || |
313 | emu->model == 0xc400 || | |
314 | (emu->model == 0x21 && emu->revision < 6)) | |
315 | outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); | |
316 | else | |
67679b1f | 317 | /* With on-chip joystick */ |
1da177e4 LT |
318 | outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); |
319 | ||
320 | if (enable_ir) { /* enable IR for SB Live */ | |
190d2c46 | 321 | if (emu->card_capabilities->emu_model) { |
9f4bd5dd | 322 | ; /* Disable all access to A_IOCFG for the emu1010 */ |
184c1e2c JCD |
323 | } else if (emu->card_capabilities->i2c_adc) { |
324 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ | |
19b99fba | 325 | } else if (emu->audigy) { |
1da177e4 LT |
326 | unsigned int reg = inl(emu->port + A_IOCFG); |
327 | outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); | |
328 | udelay(500); | |
329 | outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); | |
330 | udelay(100); | |
331 | outl(reg, emu->port + A_IOCFG); | |
332 | } else { | |
333 | unsigned int reg = inl(emu->port + HCFG); | |
334 | outl(reg | HCFG_GPOUT2, emu->port + HCFG); | |
335 | udelay(500); | |
336 | outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); | |
337 | udelay(100); | |
338 | outl(reg, emu->port + HCFG); | |
67679b1f | 339 | } |
1da177e4 | 340 | } |
67679b1f | 341 | |
190d2c46 | 342 | if (emu->card_capabilities->emu_model) { |
9f4bd5dd | 343 | ; /* Disable all access to A_IOCFG for the emu1010 */ |
184c1e2c JCD |
344 | } else if (emu->card_capabilities->i2c_adc) { |
345 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ | |
19b99fba | 346 | } else if (emu->audigy) { /* enable analog output */ |
1da177e4 LT |
347 | unsigned int reg = inl(emu->port + A_IOCFG); |
348 | outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); | |
349 | } | |
350 | ||
09668b44 TI |
351 | return 0; |
352 | } | |
1da177e4 | 353 | |
09668b44 TI |
354 | static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) |
355 | { | |
1da177e4 LT |
356 | /* |
357 | * Enable the audio bit | |
358 | */ | |
359 | outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); | |
360 | ||
361 | /* Enable analog/digital outs on audigy */ | |
190d2c46 | 362 | if (emu->card_capabilities->emu_model) { |
9f4bd5dd | 363 | ; /* Disable all access to A_IOCFG for the emu1010 */ |
184c1e2c JCD |
364 | } else if (emu->card_capabilities->i2c_adc) { |
365 | ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ | |
19b99fba | 366 | } else if (emu->audigy) { |
1da177e4 | 367 | outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); |
67679b1f | 368 | |
e0474e53 | 369 | if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ |
1da177e4 LT |
370 | /* Unmute Analog now. Set GPO6 to 1 for Apollo. |
371 | * This has to be done after init ALice3 I2SOut beyond 48KHz. | |
372 | * So, sequence is important. */ | |
373 | outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); | |
e0474e53 | 374 | } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ |
1da177e4 LT |
375 | /* Unmute Analog now. */ |
376 | outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); | |
377 | } else { | |
378 | /* Disable routing from AC97 line out to Front speakers */ | |
379 | outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); | |
380 | } | |
381 | } | |
67679b1f | 382 | |
1da177e4 LT |
383 | #if 0 |
384 | { | |
385 | unsigned int tmp; | |
386 | /* FIXME: the following routine disables LiveDrive-II !! */ | |
67679b1f | 387 | /* TOSLink detection */ |
1da177e4 LT |
388 | emu->tos_link = 0; |
389 | tmp = inl(emu->port + HCFG); | |
390 | if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { | |
391 | outl(tmp|0x800, emu->port + HCFG); | |
392 | udelay(50); | |
393 | if (tmp != (inl(emu->port + HCFG) & ~0x800)) { | |
394 | emu->tos_link = 1; | |
395 | outl(tmp, emu->port + HCFG); | |
396 | } | |
397 | } | |
398 | } | |
399 | #endif | |
400 | ||
401 | snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); | |
1da177e4 LT |
402 | } |
403 | ||
67679b1f | 404 | int snd_emu10k1_done(struct snd_emu10k1 *emu) |
1da177e4 LT |
405 | { |
406 | int ch; | |
407 | ||
408 | outl(0, emu->port + INTE); | |
409 | ||
410 | /* | |
411 | * Shutdown the chip | |
412 | */ | |
413 | for (ch = 0; ch < NUM_G; ch++) | |
414 | snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); | |
415 | for (ch = 0; ch < NUM_G; ch++) { | |
416 | snd_emu10k1_ptr_write(emu, VTFT, ch, 0); | |
417 | snd_emu10k1_ptr_write(emu, CVCF, ch, 0); | |
418 | snd_emu10k1_ptr_write(emu, PTRX, ch, 0); | |
419 | snd_emu10k1_ptr_write(emu, CPF, ch, 0); | |
420 | } | |
421 | ||
422 | /* reset recording buffers */ | |
423 | snd_emu10k1_ptr_write(emu, MICBS, 0, 0); | |
424 | snd_emu10k1_ptr_write(emu, MICBA, 0, 0); | |
425 | snd_emu10k1_ptr_write(emu, FXBS, 0, 0); | |
426 | snd_emu10k1_ptr_write(emu, FXBA, 0, 0); | |
427 | snd_emu10k1_ptr_write(emu, FXWC, 0, 0); | |
428 | snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); | |
429 | snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); | |
430 | snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); | |
431 | snd_emu10k1_ptr_write(emu, TCB, 0, 0); | |
432 | if (emu->audigy) | |
433 | snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); | |
434 | else | |
435 | snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); | |
436 | ||
437 | /* disable channel interrupt */ | |
438 | snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); | |
439 | snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); | |
440 | snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); | |
441 | snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); | |
442 | ||
1da177e4 LT |
443 | /* disable audio and lock cache */ |
444 | outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); | |
445 | snd_emu10k1_ptr_write(emu, PTB, 0, 0); | |
446 | ||
1da177e4 LT |
447 | return 0; |
448 | } | |
449 | ||
450 | /************************************************************************* | |
451 | * ECARD functional implementation | |
452 | *************************************************************************/ | |
453 | ||
454 | /* In A1 Silicon, these bits are in the HC register */ | |
455 | #define HOOKN_BIT (1L << 12) | |
456 | #define HANDN_BIT (1L << 11) | |
457 | #define PULSEN_BIT (1L << 10) | |
458 | ||
459 | #define EC_GDI1 (1 << 13) | |
460 | #define EC_GDI0 (1 << 14) | |
461 | ||
462 | #define EC_NUM_CONTROL_BITS 20 | |
463 | ||
464 | #define EC_AC3_DATA_SELN 0x0001L | |
465 | #define EC_EE_DATA_SEL 0x0002L | |
466 | #define EC_EE_CNTRL_SELN 0x0004L | |
467 | #define EC_EECLK 0x0008L | |
468 | #define EC_EECS 0x0010L | |
469 | #define EC_EESDO 0x0020L | |
470 | #define EC_TRIM_CSN 0x0040L | |
471 | #define EC_TRIM_SCLK 0x0080L | |
472 | #define EC_TRIM_SDATA 0x0100L | |
473 | #define EC_TRIM_MUTEN 0x0200L | |
474 | #define EC_ADCCAL 0x0400L | |
475 | #define EC_ADCRSTN 0x0800L | |
476 | #define EC_DACCAL 0x1000L | |
477 | #define EC_DACMUTEN 0x2000L | |
478 | #define EC_LEDN 0x4000L | |
479 | ||
480 | #define EC_SPDIF0_SEL_SHIFT 15 | |
481 | #define EC_SPDIF1_SEL_SHIFT 17 | |
482 | #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) | |
483 | #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) | |
484 | #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) | |
485 | #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) | |
486 | #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should | |
487 | * be incremented any time the EEPROM's | |
488 | * format is changed. */ | |
489 | ||
490 | #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ | |
491 | ||
492 | /* Addresses for special values stored in to EEPROM */ | |
493 | #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ | |
494 | #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ | |
495 | #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ | |
496 | ||
497 | #define EC_LAST_PROMFILE_ADDR 0x2f | |
498 | ||
67679b1f | 499 | #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The |
1da177e4 LT |
500 | * can be up to 30 characters in length |
501 | * and is stored as a NULL-terminated | |
502 | * ASCII string. Any unused bytes must be | |
503 | * filled with zeros */ | |
504 | #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ | |
505 | ||
506 | ||
67679b1f VM |
507 | /* Most of this stuff is pretty self-evident. According to the hardware |
508 | * dudes, we need to leave the ADCCAL bit low in order to avoid a DC | |
1da177e4 LT |
509 | * offset problem. Weird. |
510 | */ | |
511 | #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ | |
512 | EC_TRIM_CSN) | |
513 | ||
514 | ||
515 | #define EC_DEFAULT_ADC_GAIN 0xC4C4 | |
516 | #define EC_DEFAULT_SPDIF0_SEL 0x0 | |
517 | #define EC_DEFAULT_SPDIF1_SEL 0x4 | |
518 | ||
519 | /************************************************************************** | |
520 | * @func Clock bits into the Ecard's control latch. The Ecard uses a | |
521 | * control latch will is loaded bit-serially by toggling the Modem control | |
522 | * lines from function 2 on the E8010. This function hides these details | |
523 | * and presents the illusion that we are actually writing to a distinct | |
524 | * register. | |
525 | */ | |
526 | ||
67679b1f | 527 | static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) |
1da177e4 LT |
528 | { |
529 | unsigned short count; | |
530 | unsigned int data; | |
531 | unsigned long hc_port; | |
532 | unsigned int hc_value; | |
533 | ||
534 | hc_port = emu->port + HCFG; | |
535 | hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); | |
536 | outl(hc_value, hc_port); | |
537 | ||
538 | for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { | |
539 | ||
540 | /* Set up the value */ | |
541 | data = ((value & 0x1) ? PULSEN_BIT : 0); | |
542 | value >>= 1; | |
543 | ||
544 | outl(hc_value | data, hc_port); | |
545 | ||
546 | /* Clock the shift register */ | |
547 | outl(hc_value | data | HANDN_BIT, hc_port); | |
548 | outl(hc_value | data, hc_port); | |
549 | } | |
550 | ||
551 | /* Latch the bits */ | |
552 | outl(hc_value | HOOKN_BIT, hc_port); | |
553 | outl(hc_value, hc_port); | |
554 | } | |
555 | ||
556 | /************************************************************************** | |
557 | * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The | |
558 | * trim value consists of a 16bit value which is composed of two | |
559 | * 8 bit gain/trim values, one for the left channel and one for the | |
560 | * right channel. The following table maps from the Gain/Attenuation | |
561 | * value in decibels into the corresponding bit pattern for a single | |
562 | * channel. | |
563 | */ | |
564 | ||
67679b1f | 565 | static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, |
1da177e4 LT |
566 | unsigned short gain) |
567 | { | |
568 | unsigned int bit; | |
569 | ||
570 | /* Enable writing to the TRIM registers */ | |
571 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); | |
572 | ||
573 | /* Do it again to insure that we meet hold time requirements */ | |
574 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); | |
575 | ||
576 | for (bit = (1 << 15); bit; bit >>= 1) { | |
577 | unsigned int value; | |
67679b1f | 578 | |
1da177e4 LT |
579 | value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); |
580 | ||
581 | if (gain & bit) | |
582 | value |= EC_TRIM_SDATA; | |
583 | ||
584 | /* Clock the bit */ | |
585 | snd_emu10k1_ecard_write(emu, value); | |
586 | snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); | |
587 | snd_emu10k1_ecard_write(emu, value); | |
588 | } | |
589 | ||
590 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); | |
591 | } | |
592 | ||
67679b1f | 593 | static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) |
1da177e4 LT |
594 | { |
595 | unsigned int hc_value; | |
596 | ||
597 | /* Set up the initial settings */ | |
598 | emu->ecard_ctrl = EC_RAW_RUN_MODE | | |
599 | EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | | |
600 | EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); | |
601 | ||
67679b1f | 602 | /* Step 0: Set the codec type in the hardware control register |
1da177e4 LT |
603 | * and enable audio output */ |
604 | hc_value = inl(emu->port + HCFG); | |
605 | outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); | |
606 | inl(emu->port + HCFG); | |
607 | ||
608 | /* Step 1: Turn off the led and deassert TRIM_CS */ | |
609 | snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); | |
610 | ||
611 | /* Step 2: Calibrate the ADC and DAC */ | |
612 | snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); | |
613 | ||
614 | /* Step 3: Wait for awhile; XXX We can't get away with this | |
615 | * under a real operating system; we'll need to block and wait that | |
616 | * way. */ | |
617 | snd_emu10k1_wait(emu, 48000); | |
618 | ||
619 | /* Step 4: Switch off the DAC and ADC calibration. Note | |
620 | * That ADC_CAL is actually an inverted signal, so we assert | |
621 | * it here to stop calibration. */ | |
622 | snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); | |
623 | ||
624 | /* Step 4: Switch into run mode */ | |
625 | snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); | |
626 | ||
627 | /* Step 5: Set the analog input gain */ | |
628 | snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); | |
629 | ||
630 | return 0; | |
631 | } | |
632 | ||
67679b1f | 633 | static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) |
d83c671f JCD |
634 | { |
635 | unsigned long special_port; | |
636 | unsigned int value; | |
637 | ||
638 | /* Special initialisation routine | |
639 | * before the rest of the IO-Ports become active. | |
640 | */ | |
641 | special_port = emu->port + 0x38; | |
642 | value = inl(special_port); | |
643 | outl(0x00d00000, special_port); | |
644 | value = inl(special_port); | |
645 | outl(0x00d00001, special_port); | |
646 | value = inl(special_port); | |
647 | outl(0x00d0005f, special_port); | |
648 | value = inl(special_port); | |
649 | outl(0x00d0007f, special_port); | |
650 | value = inl(special_port); | |
651 | outl(0x0090007f, special_port); | |
652 | value = inl(special_port); | |
653 | ||
e2b15f8f | 654 | snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ |
c94fa4c9 JCD |
655 | /* Delay to give time for ADC chip to switch on. It needs 113ms */ |
656 | msleep(200); | |
d83c671f JCD |
657 | return 0; |
658 | } | |
659 | ||
e08b34e8 TI |
660 | static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, |
661 | const struct firmware *fw_entry) | |
19b99fba | 662 | { |
9f4bd5dd JCD |
663 | int n, i; |
664 | int reg; | |
665 | int value; | |
190d2c46 JCD |
666 | unsigned int write_post; |
667 | unsigned long flags; | |
9f4bd5dd | 668 | |
b209c4df TI |
669 | if (!fw_entry) |
670 | return -EIO; | |
19b99fba | 671 | |
9f4bd5dd JCD |
672 | /* The FPGA is a Xilinx Spartan IIE XC2S50E */ |
673 | /* GPIO7 -> FPGA PGMN | |
674 | * GPIO6 -> FPGA CCLK | |
675 | * GPIO5 -> FPGA DIN | |
676 | * FPGA CONFIG OFF -> FPGA PGMN | |
677 | */ | |
190d2c46 | 678 | spin_lock_irqsave(&emu->emu_lock, flags); |
9f4bd5dd | 679 | outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */ |
190d2c46 JCD |
680 | write_post = inl(emu->port + A_IOCFG); |
681 | udelay(100); | |
9f4bd5dd | 682 | outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */ |
190d2c46 | 683 | write_post = inl(emu->port + A_IOCFG); |
9f4bd5dd | 684 | udelay(100); /* Allow FPGA memory to clean */ |
67679b1f VM |
685 | for (n = 0; n < fw_entry->size; n++) { |
686 | value = fw_entry->data[n]; | |
687 | for (i = 0; i < 8; i++) { | |
9f4bd5dd JCD |
688 | reg = 0x80; |
689 | if (value & 0x1) | |
690 | reg = reg | 0x20; | |
67679b1f | 691 | value = value >> 1; |
9f4bd5dd | 692 | outl(reg, emu->port + A_IOCFG); |
190d2c46 | 693 | write_post = inl(emu->port + A_IOCFG); |
9f4bd5dd | 694 | outl(reg | 0x40, emu->port + A_IOCFG); |
190d2c46 | 695 | write_post = inl(emu->port + A_IOCFG); |
9f4bd5dd JCD |
696 | } |
697 | } | |
698 | /* After programming, set GPIO bit 4 high again. */ | |
699 | outl(0x10, emu->port + A_IOCFG); | |
190d2c46 JCD |
700 | write_post = inl(emu->port + A_IOCFG); |
701 | spin_unlock_irqrestore(&emu->emu_lock, flags); | |
19b99fba JCD |
702 | |
703 | return 0; | |
704 | } | |
705 | ||
bd3d1c20 TI |
706 | static int emu1010_firmware_thread(void *data) |
707 | { | |
67679b1f | 708 | struct snd_emu10k1 *emu = data; |
730d45f9 | 709 | u32 tmp, tmp2, reg; |
42f53226 JCD |
710 | int err; |
711 | ||
712 | for (;;) { | |
713 | /* Delay to allow Audio Dock to settle */ | |
190d2c46 | 714 | msleep_interruptible(1000); |
42f53226 JCD |
715 | if (kthread_should_stop()) |
716 | break; | |
2efa1d59 | 717 | #ifdef CONFIG_PM_SLEEP |
4f86f120 TI |
718 | if (emu->suspend) |
719 | continue; | |
2efa1d59 | 720 | #endif |
67679b1f VM |
721 | snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */ |
722 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ | |
42f53226 JCD |
723 | if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { |
724 | /* Audio Dock attached */ | |
725 | /* Return to Audio Dock programming mode */ | |
6f002b02 TI |
726 | dev_info(emu->card->dev, |
727 | "emu1010: Loading Audio Dock Firmware\n"); | |
67679b1f | 728 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK); |
e08b34e8 TI |
729 | |
730 | if (!emu->dock_fw) { | |
731 | const char *filename = NULL; | |
732 | switch (emu->card_capabilities->emu_model) { | |
733 | case EMU_MODEL_EMU1010: | |
734 | filename = DOCK_FILENAME; | |
735 | break; | |
736 | case EMU_MODEL_EMU1010B: | |
737 | filename = MICRO_DOCK_FILENAME; | |
738 | break; | |
739 | case EMU_MODEL_EMU1616: | |
740 | filename = MICRO_DOCK_FILENAME; | |
741 | break; | |
742 | } | |
743 | if (filename) { | |
744 | err = request_firmware(&emu->dock_fw, | |
745 | filename, | |
746 | &emu->pci->dev); | |
747 | if (err) | |
748 | continue; | |
749 | } | |
750 | } | |
751 | ||
752 | if (emu->dock_fw) { | |
753 | err = snd_emu1010_load_firmware(emu, emu->dock_fw); | |
754 | if (err) | |
755 | continue; | |
756 | } | |
42f53226 | 757 | |
67679b1f VM |
758 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); |
759 | snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); | |
6f002b02 TI |
760 | dev_info(emu->card->dev, |
761 | "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", | |
762 | reg); | |
42f53226 | 763 | /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ |
67679b1f | 764 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); |
6f002b02 TI |
765 | dev_info(emu->card->dev, |
766 | "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg); | |
42f53226 JCD |
767 | if ((reg & 0x1f) != 0x15) { |
768 | /* FPGA failed to be programmed */ | |
6f002b02 TI |
769 | dev_info(emu->card->dev, |
770 | "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", | |
771 | reg); | |
190d2c46 | 772 | continue; |
42f53226 | 773 | } |
6f002b02 TI |
774 | dev_info(emu->card->dev, |
775 | "emu1010: Audio Dock Firmware loaded\n"); | |
67679b1f VM |
776 | snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); |
777 | snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); | |
6f002b02 | 778 | dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", |
28a97c19 | 779 | tmp, tmp2); |
c93d1c25 JCD |
780 | /* Sync clocking between 1010 and Dock */ |
781 | /* Allow DLL to settle */ | |
782 | msleep(10); | |
783 | /* Unmute all. Default is muted after a firmware load */ | |
67679b1f | 784 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); |
42f53226 JCD |
785 | } |
786 | } | |
6f002b02 | 787 | dev_info(emu->card->dev, "emu1010: firmware thread stopping\n"); |
42f53226 JCD |
788 | return 0; |
789 | } | |
790 | ||
13d45709 PH |
791 | /* |
792 | * EMU-1010 - details found out from this driver, official MS Win drivers, | |
793 | * testing the card: | |
794 | * | |
795 | * Audigy2 (aka Alice2): | |
796 | * --------------------- | |
797 | * * communication over PCI | |
798 | * * conversion of 32-bit data coming over EMU32 links from HANA FPGA | |
799 | * to 2 x 16-bit, using internal DSP instructions | |
800 | * * slave mode, clock supplied by HANA | |
801 | * * linked to HANA using: | |
802 | * 32 x 32-bit serial EMU32 output channels | |
803 | * 16 x EMU32 input channels | |
804 | * (?) x I2S I/O channels (?) | |
805 | * | |
806 | * FPGA (aka HANA): | |
807 | * --------------- | |
808 | * * provides all (?) physical inputs and outputs of the card | |
809 | * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.) | |
810 | * * provides clock signal for the card and Alice2 | |
811 | * * two crystals - for 44.1kHz and 48kHz multiples | |
812 | * * provides internal routing of signal sources to signal destinations | |
813 | * * inputs/outputs to Alice2 - see above | |
814 | * | |
815 | * Current status of the driver: | |
816 | * ---------------------------- | |
817 | * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) | |
818 | * * PCM device nb. 2: | |
819 | * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops | |
820 | * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops | |
821 | */ | |
67679b1f | 822 | static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) |
19b99fba JCD |
823 | { |
824 | unsigned int i; | |
730d45f9 | 825 | u32 tmp, tmp2, reg; |
9f4bd5dd | 826 | int err; |
9f4bd5dd | 827 | |
6f002b02 | 828 | dev_info(emu->card->dev, "emu1010: Special config.\n"); |
9f4bd5dd JCD |
829 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, |
830 | * Lock Sound Memory Cache, Lock Tank Memory Cache, | |
831 | * Mute all codecs. | |
832 | */ | |
19b99fba | 833 | outl(0x0005a00c, emu->port + HCFG); |
9f4bd5dd JCD |
834 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, |
835 | * Lock Tank Memory Cache, | |
836 | * Mute all codecs. | |
837 | */ | |
67679b1f | 838 | outl(0x0005a004, emu->port + HCFG); |
9f4bd5dd JCD |
839 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, |
840 | * Mute all codecs. | |
841 | */ | |
19b99fba | 842 | outl(0x0005a000, emu->port + HCFG); |
9f4bd5dd JCD |
843 | /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, |
844 | * Mute all codecs. | |
845 | */ | |
19b99fba JCD |
846 | outl(0x0005a000, emu->port + HCFG); |
847 | ||
9f4bd5dd | 848 | /* Disable 48Volt power to Audio Dock */ |
67679b1f | 849 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); |
9f4bd5dd JCD |
850 | |
851 | /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ | |
67679b1f | 852 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); |
6f002b02 | 853 | dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); |
d9e8a552 | 854 | if ((reg & 0x3f) == 0x15) { |
9f4bd5dd JCD |
855 | /* FPGA netlist already present so clear it */ |
856 | /* Return to programming mode */ | |
857 | ||
67679b1f | 858 | snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02); |
19b99fba | 859 | } |
67679b1f | 860 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); |
6f002b02 | 861 | dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); |
d9e8a552 | 862 | if ((reg & 0x3f) == 0x15) { |
9f4bd5dd | 863 | /* FPGA failed to return to programming mode */ |
6f002b02 TI |
864 | dev_info(emu->card->dev, |
865 | "emu1010: FPGA failed to return to programming mode\n"); | |
9f4bd5dd | 866 | return -ENODEV; |
19b99fba | 867 | } |
6f002b02 | 868 | dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); |
b209c4df TI |
869 | |
870 | if (!emu->firmware) { | |
871 | const char *filename; | |
872 | switch (emu->card_capabilities->emu_model) { | |
873 | case EMU_MODEL_EMU1010: | |
874 | filename = HANA_FILENAME; | |
875 | break; | |
876 | case EMU_MODEL_EMU1010B: | |
877 | filename = EMU1010B_FILENAME; | |
878 | break; | |
879 | case EMU_MODEL_EMU1616: | |
880 | filename = EMU1010_NOTEBOOK_FILENAME; | |
881 | break; | |
882 | case EMU_MODEL_EMU0404: | |
883 | filename = EMU0404_FILENAME; | |
884 | break; | |
885 | default: | |
886 | return -ENODEV; | |
887 | } | |
888 | ||
889 | err = request_firmware(&emu->firmware, filename, &emu->pci->dev); | |
890 | if (err != 0) { | |
6f002b02 TI |
891 | dev_info(emu->card->dev, |
892 | "emu1010: firmware: %s not found. Err = %d\n", | |
893 | filename, err); | |
b209c4df TI |
894 | return err; |
895 | } | |
6f002b02 TI |
896 | dev_info(emu->card->dev, |
897 | "emu1010: firmware file = %s, size = 0x%zx\n", | |
b209c4df | 898 | filename, emu->firmware->size); |
b56ddbe5 FZ |
899 | } |
900 | ||
e08b34e8 | 901 | err = snd_emu1010_load_firmware(emu, emu->firmware); |
b56ddbe5 | 902 | if (err != 0) { |
6f002b02 | 903 | dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); |
b56ddbe5 | 904 | return err; |
19b99fba | 905 | } |
9f4bd5dd JCD |
906 | |
907 | /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ | |
67679b1f | 908 | snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); |
d9e8a552 | 909 | if ((reg & 0x3f) != 0x15) { |
9f4bd5dd | 910 | /* FPGA failed to be programmed */ |
6f002b02 TI |
911 | dev_info(emu->card->dev, |
912 | "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", | |
913 | reg); | |
9f4bd5dd | 914 | return -ENODEV; |
19b99fba | 915 | } |
19b99fba | 916 | |
6f002b02 | 917 | dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); |
67679b1f VM |
918 | snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); |
919 | snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); | |
6f002b02 | 920 | dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); |
9f4bd5dd | 921 | /* Enable 48Volt power to Audio Dock */ |
67679b1f | 922 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); |
9f4bd5dd | 923 | |
67679b1f | 924 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); |
6f002b02 | 925 | dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); |
67679b1f | 926 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); |
6f002b02 | 927 | dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); |
67679b1f | 928 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp); |
edec7bbb | 929 | /* Optical -> ADAT I/O */ |
f93abe51 JCD |
930 | /* 0 : SPDIF |
931 | * 1 : ADAT | |
932 | */ | |
933 | emu->emu1010.optical_in = 1; /* IN_ADAT */ | |
934 | emu->emu1010.optical_out = 1; /* IN_ADAT */ | |
935 | tmp = 0; | |
936 | tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) | | |
937 | (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0); | |
67679b1f VM |
938 | snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); |
939 | snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp); | |
9f4bd5dd | 940 | /* Set no attenuation on Audio Dock pads. */ |
67679b1f | 941 | snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00); |
9148cc50 | 942 | emu->emu1010.adc_pads = 0x00; |
67679b1f | 943 | snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp); |
9f4bd5dd | 944 | /* Unmute Audio dock DACs, Headphone source DAC-4. */ |
67679b1f VM |
945 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); |
946 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); | |
947 | snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp); | |
9148cc50 | 948 | /* DAC PADs. */ |
67679b1f | 949 | snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f); |
9148cc50 | 950 | emu->emu1010.dac_pads = 0x0f; |
67679b1f VM |
951 | snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp); |
952 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); | |
953 | snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp); | |
9f4bd5dd | 954 | /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ |
67679b1f | 955 | snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); |
9f4bd5dd | 956 | /* MIDI routing */ |
67679b1f | 957 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); |
9f4bd5dd | 958 | /* Unknown. */ |
67679b1f | 959 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); |
fb9b5a0e | 960 | /* IRQ Enable: All on */ |
67679b1f | 961 | /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */ |
9f4bd5dd | 962 | /* IRQ Enable: All off */ |
67679b1f | 963 | snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); |
9f4bd5dd | 964 | |
67679b1f | 965 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); |
6f002b02 | 966 | dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg); |
9f4bd5dd | 967 | /* Default WCLK set to 48kHz. */ |
67679b1f | 968 | snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00); |
9f4bd5dd | 969 | /* Word Clock source, Internal 48kHz x1 */ |
67679b1f VM |
970 | snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); |
971 | /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ | |
9f4bd5dd | 972 | /* Audio Dock LEDs. */ |
67679b1f | 973 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); |
19b99fba | 974 | |
9f4bd5dd JCD |
975 | #if 0 |
976 | /* For 96kHz */ | |
977 | snd_emu1010_fpga_link_dst_src_write(emu, | |
978 | EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); | |
979 | snd_emu1010_fpga_link_dst_src_write(emu, | |
980 | EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); | |
981 | snd_emu1010_fpga_link_dst_src_write(emu, | |
982 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2); | |
983 | snd_emu1010_fpga_link_dst_src_write(emu, | |
984 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2); | |
985 | #endif | |
986 | #if 0 | |
987 | /* For 192kHz */ | |
988 | snd_emu1010_fpga_link_dst_src_write(emu, | |
989 | EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); | |
990 | snd_emu1010_fpga_link_dst_src_write(emu, | |
991 | EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); | |
992 | snd_emu1010_fpga_link_dst_src_write(emu, | |
993 | EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); | |
994 | snd_emu1010_fpga_link_dst_src_write(emu, | |
995 | EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2); | |
996 | snd_emu1010_fpga_link_dst_src_write(emu, | |
997 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3); | |
998 | snd_emu1010_fpga_link_dst_src_write(emu, | |
999 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3); | |
1000 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1001 | EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4); | |
1002 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1003 | EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4); | |
1004 | #endif | |
1005 | #if 1 | |
1006 | /* For 48kHz */ | |
1007 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1008 | EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1); | |
1009 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1010 | EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1); | |
1011 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1012 | EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); | |
1013 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1014 | EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2); | |
1015 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1016 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1); | |
1017 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1018 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1); | |
1019 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1020 | EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1); | |
1021 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1022 | EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1); | |
13d45709 PH |
1023 | /* Pavel Hofman - setting defaults for 8 more capture channels |
1024 | * Defaults only, users will set their own values anyways, let's | |
1025 | * just copy/paste. | |
1026 | */ | |
67679b1f | 1027 | |
13d45709 PH |
1028 | snd_emu1010_fpga_link_dst_src_write(emu, |
1029 | EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1); | |
1030 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1031 | EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1); | |
1032 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1033 | EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2); | |
1034 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1035 | EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2); | |
1036 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1037 | EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1); | |
1038 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1039 | EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1); | |
1040 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1041 | EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1); | |
1042 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1043 | EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1); | |
9f4bd5dd JCD |
1044 | #endif |
1045 | #if 0 | |
1046 | /* Original */ | |
1047 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1048 | EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT); | |
1049 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1050 | EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1); | |
1051 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1052 | EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2); | |
1053 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1054 | EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3); | |
1055 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1056 | EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4); | |
1057 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1058 | EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5); | |
1059 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1060 | EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6); | |
1061 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1062 | EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7); | |
1063 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1064 | EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1); | |
1065 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1066 | EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1); | |
1067 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1068 | EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2); | |
1069 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1070 | EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2); | |
1071 | #endif | |
67679b1f VM |
1072 | for (i = 0; i < 0x20; i++) { |
1073 | /* AudioDock Elink <- Silence */ | |
1074 | snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE); | |
9f4bd5dd | 1075 | } |
67679b1f | 1076 | for (i = 0; i < 4; i++) { |
9f4bd5dd | 1077 | /* Hana SPDIF Out <- Silence */ |
67679b1f | 1078 | snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE); |
9f4bd5dd | 1079 | } |
67679b1f | 1080 | for (i = 0; i < 7; i++) { |
9f4bd5dd | 1081 | /* Hamoa DAC <- Silence */ |
67679b1f | 1082 | snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE); |
9f4bd5dd | 1083 | } |
67679b1f | 1084 | for (i = 0; i < 7; i++) { |
9f4bd5dd JCD |
1085 | /* Hana ADAT Out <- Silence */ |
1086 | snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE); | |
1087 | } | |
1088 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1089 | EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1); | |
1090 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1091 | EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1); | |
1092 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1093 | EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1); | |
1094 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1095 | EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1); | |
1096 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1097 | EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1); | |
1098 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1099 | EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1); | |
67679b1f VM |
1100 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */ |
1101 | ||
1102 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp); | |
9f4bd5dd | 1103 | |
9f4bd5dd JCD |
1104 | /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, |
1105 | * Lock Sound Memory Cache, Lock Tank Memory Cache, | |
1106 | * Mute all codecs. | |
1107 | */ | |
67679b1f | 1108 | outl(0x0000a000, emu->port + HCFG); |
9f4bd5dd JCD |
1109 | /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, |
1110 | * Lock Sound Memory Cache, Lock Tank Memory Cache, | |
1111 | * Un-Mute all codecs. | |
1112 | */ | |
19b99fba | 1113 | outl(0x0000a001, emu->port + HCFG); |
67679b1f | 1114 | |
19b99fba JCD |
1115 | /* Initial boot complete. Now patches */ |
1116 | ||
67679b1f VM |
1117 | snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp); |
1118 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */ | |
1119 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */ | |
1120 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */ | |
1121 | snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */ | |
1122 | snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp); | |
1123 | snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */ | |
9f4bd5dd | 1124 | |
42f53226 | 1125 | /* Start Micro/Audio Dock firmware loader thread */ |
bd3d1c20 TI |
1126 | if (!emu->emu1010.firmware_thread) { |
1127 | emu->emu1010.firmware_thread = | |
1128 | kthread_create(emu1010_firmware_thread, emu, | |
1129 | "emu1010_firmware"); | |
1130 | wake_up_process(emu->emu1010.firmware_thread); | |
1131 | } | |
3663d845 | 1132 | |
9f4bd5dd JCD |
1133 | #if 0 |
1134 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1135 | EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */ | |
1136 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1137 | EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */ | |
1138 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1139 | EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */ | |
1140 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1141 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */ | |
1142 | #endif | |
1143 | /* Default outputs */ | |
3839e4f1 | 1144 | if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) { |
1c02e366 CF |
1145 | /* 1616(M) cardbus default outputs */ |
1146 | /* ALICE2 bus 0xa0 */ | |
1147 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1148 | EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | |
1149 | emu->emu1010.output_source[0] = 17; | |
1150 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1151 | EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1152 | emu->emu1010.output_source[1] = 18; | |
1153 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1154 | EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); | |
1155 | emu->emu1010.output_source[2] = 19; | |
1156 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1157 | EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); | |
1158 | emu->emu1010.output_source[3] = 20; | |
1159 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1160 | EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); | |
1161 | emu->emu1010.output_source[4] = 21; | |
1162 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1163 | EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); | |
1164 | emu->emu1010.output_source[5] = 22; | |
1165 | /* ALICE2 bus 0xa0 */ | |
1166 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1167 | EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0); | |
1168 | emu->emu1010.output_source[16] = 17; | |
1169 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1170 | EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1); | |
1171 | emu->emu1010.output_source[17] = 18; | |
1172 | } else { | |
1173 | /* ALICE2 bus 0xa0 */ | |
1174 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1175 | EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | |
1176 | emu->emu1010.output_source[0] = 21; | |
1177 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1178 | EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1179 | emu->emu1010.output_source[1] = 22; | |
1180 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1181 | EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); | |
1182 | emu->emu1010.output_source[2] = 23; | |
1183 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1184 | EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); | |
1185 | emu->emu1010.output_source[3] = 24; | |
1186 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1187 | EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); | |
1188 | emu->emu1010.output_source[4] = 25; | |
1189 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1190 | EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); | |
1191 | emu->emu1010.output_source[5] = 26; | |
1192 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1193 | EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); | |
1194 | emu->emu1010.output_source[6] = 27; | |
1195 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1196 | EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); | |
1197 | emu->emu1010.output_source[7] = 28; | |
1198 | /* ALICE2 bus 0xa0 */ | |
1199 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1200 | EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | |
1201 | emu->emu1010.output_source[8] = 21; | |
1202 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1203 | EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1204 | emu->emu1010.output_source[9] = 22; | |
1205 | /* ALICE2 bus 0xa0 */ | |
1206 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1207 | EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | |
1208 | emu->emu1010.output_source[10] = 21; | |
1209 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1210 | EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1211 | emu->emu1010.output_source[11] = 22; | |
1212 | /* ALICE2 bus 0xa0 */ | |
1213 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1214 | EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | |
1215 | emu->emu1010.output_source[12] = 21; | |
1216 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1217 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1218 | emu->emu1010.output_source[13] = 22; | |
1219 | /* ALICE2 bus 0xa0 */ | |
1220 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1221 | EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | |
1222 | emu->emu1010.output_source[14] = 21; | |
1223 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1224 | EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | |
1225 | emu->emu1010.output_source[15] = 22; | |
1226 | /* ALICE2 bus 0xa0 */ | |
1227 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1228 | EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); | |
1229 | emu->emu1010.output_source[16] = 21; | |
1230 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1231 | EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); | |
1232 | emu->emu1010.output_source[17] = 22; | |
1233 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1234 | EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); | |
1235 | emu->emu1010.output_source[18] = 23; | |
1236 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1237 | EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); | |
1238 | emu->emu1010.output_source[19] = 24; | |
1239 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1240 | EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); | |
1241 | emu->emu1010.output_source[20] = 25; | |
1242 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1243 | EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); | |
1244 | emu->emu1010.output_source[21] = 26; | |
1245 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1246 | EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); | |
1247 | emu->emu1010.output_source[22] = 27; | |
1248 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1249 | EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); | |
1250 | emu->emu1010.output_source[23] = 28; | |
1251 | } | |
9f4bd5dd | 1252 | /* TEMP: Select SPDIF in/out */ |
67679b1f | 1253 | /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */ |
9f4bd5dd JCD |
1254 | |
1255 | /* TEMP: Select 48kHz SPDIF out */ | |
1256 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */ | |
1257 | snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */ | |
1258 | /* Word Clock source, Internal 48kHz x1 */ | |
67679b1f VM |
1259 | snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); |
1260 | /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ | |
b0dbdaea | 1261 | emu->emu1010.internal_clock = 1; /* 48000 */ |
67679b1f | 1262 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */ |
9f4bd5dd | 1263 | snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */ |
67679b1f VM |
1264 | /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */ |
1265 | /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */ | |
1266 | /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */ | |
19b99fba JCD |
1267 | |
1268 | return 0; | |
1269 | } | |
1da177e4 LT |
1270 | /* |
1271 | * Create the EMU10K1 instance | |
1272 | */ | |
1273 | ||
c7561cd8 | 1274 | #ifdef CONFIG_PM_SLEEP |
09668b44 TI |
1275 | static int alloc_pm_buffer(struct snd_emu10k1 *emu); |
1276 | static void free_pm_buffer(struct snd_emu10k1 *emu); | |
1277 | #endif | |
1278 | ||
eb4698f3 | 1279 | static int snd_emu10k1_free(struct snd_emu10k1 *emu) |
1da177e4 LT |
1280 | { |
1281 | if (emu->port) { /* avoid access to already used hardware */ | |
67679b1f | 1282 | snd_emu10k1_fx8010_tram_setup(emu, 0); |
1da177e4 | 1283 | snd_emu10k1_done(emu); |
09668b44 | 1284 | snd_emu10k1_free_efx(emu); |
67679b1f | 1285 | } |
3839e4f1 | 1286 | if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { |
9f4bd5dd | 1287 | /* Disable 48Volt power to Audio Dock */ |
67679b1f | 1288 | snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); |
9f4bd5dd | 1289 | } |
bd3d1c20 | 1290 | if (emu->emu1010.firmware_thread) |
190d2c46 | 1291 | kthread_stop(emu->emu1010.firmware_thread); |
b209c4df TI |
1292 | if (emu->firmware) |
1293 | release_firmware(emu->firmware); | |
e08b34e8 TI |
1294 | if (emu->dock_fw) |
1295 | release_firmware(emu->dock_fw); | |
ebf029da TI |
1296 | if (emu->irq >= 0) |
1297 | free_irq(emu->irq, emu); | |
1298 | /* remove reserved page */ | |
1299 | if (emu->reserved_page) { | |
1300 | snd_emu10k1_synth_free(emu, | |
1301 | (struct snd_util_memblk *)emu->reserved_page); | |
1302 | emu->reserved_page = NULL; | |
1303 | } | |
1da177e4 LT |
1304 | if (emu->memhdr) |
1305 | snd_util_memhdr_free(emu->memhdr); | |
1306 | if (emu->silent_page.area) | |
1307 | snd_dma_free_pages(&emu->silent_page); | |
1308 | if (emu->ptb_pages.area) | |
1309 | snd_dma_free_pages(&emu->ptb_pages); | |
1310 | vfree(emu->page_ptr_table); | |
1311 | vfree(emu->page_addr_table); | |
c7561cd8 | 1312 | #ifdef CONFIG_PM_SLEEP |
09668b44 TI |
1313 | free_pm_buffer(emu); |
1314 | #endif | |
1da177e4 LT |
1315 | if (emu->port) |
1316 | pci_release_regions(emu->pci); | |
67679b1f | 1317 | if (emu->card_capabilities->ca0151_chip) /* P16V */ |
1da177e4 | 1318 | snd_p16v_free(emu); |
09668b44 | 1319 | pci_disable_device(emu->pci); |
1da177e4 LT |
1320 | kfree(emu); |
1321 | return 0; | |
1322 | } | |
1323 | ||
eb4698f3 | 1324 | static int snd_emu10k1_dev_free(struct snd_device *device) |
1da177e4 | 1325 | { |
eb4698f3 | 1326 | struct snd_emu10k1 *emu = device->device_data; |
1da177e4 LT |
1327 | return snd_emu10k1_free(emu); |
1328 | } | |
1329 | ||
eb4698f3 | 1330 | static struct snd_emu_chip_details emu_chip_details[] = { |
21fdddea JCD |
1331 | /* Audigy4 (Not PRO) SB0610 */ |
1332 | /* Tested by James@superbug.co.uk 4th April 2006 */ | |
1333 | /* A_IOCFG bits | |
1334 | * Output | |
1335 | * 0: ? | |
1336 | * 1: ? | |
1337 | * 2: ? | |
1338 | * 3: 0 - Digital Out, 1 - Line in | |
1339 | * 4: ? | |
1340 | * 5: ? | |
1341 | * 6: ? | |
1342 | * 7: ? | |
1343 | * Input | |
1344 | * 8: ? | |
1345 | * 9: ? | |
1346 | * A: Green jack sense (Front) | |
1347 | * B: ? | |
1348 | * C: Black jack sense (Rear/Side Right) | |
1349 | * D: Yellow jack sense (Center/LFE/Side Left) | |
1350 | * E: ? | |
1351 | * F: ? | |
1352 | * | |
1353 | * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) | |
1354 | * 0 - Digital Out | |
1355 | * 1 - Line in | |
1356 | */ | |
1357 | /* Mic input not tested. | |
1358 | * Analog CD input not tested | |
1359 | * Digital Out not tested. | |
1360 | * Line in working. | |
1361 | * Audio output 5.1 working. Side outputs not working. | |
1362 | */ | |
1363 | /* DSP: CA10300-IAT LF | |
1364 | * DAC: Cirrus Logic CS4382-KQZ | |
1365 | * ADC: Philips 1361T | |
1366 | * AC97: Sigmatel STAC9750 | |
1367 | * CA0151: None | |
1368 | */ | |
1369 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, | |
18c71092 | 1370 | .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", |
21fdddea JCD |
1371 | .id = "Audigy2", |
1372 | .emu10k2_chip = 1, | |
1373 | .ca0108_chip = 1, | |
1374 | .spk71 = 1, | |
1375 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ | |
1376 | .ac97_chip = 1} , | |
18c71092 VM |
1377 | /* Audigy 2 Value AC3 out does not work yet. |
1378 | * Need to find out how to turn off interpolators. | |
1379 | */ | |
1380 | /* Tested by James@superbug.co.uk 3rd July 2005 */ | |
1381 | /* DSP: CA0108-IAT | |
1382 | * DAC: CS4382-KQ | |
1383 | * ADC: Philips 1361T | |
1384 | * AC97: STAC9750 | |
1385 | * CA0151: None | |
1386 | */ | |
1387 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, | |
1388 | .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", | |
1389 | .id = "Audigy2", | |
1390 | .emu10k2_chip = 1, | |
1391 | .ca0108_chip = 1, | |
1392 | .spk71 = 1, | |
1393 | .ac97_chip = 1} , | |
d83c671f | 1394 | /* Audigy 2 ZS Notebook Cardbus card.*/ |
184c1e2c | 1395 | /* Tested by James@superbug.co.uk 6th November 2006 */ |
f951fd3c JCD |
1396 | /* Audio output 7.1/Headphones working. |
1397 | * Digital output working. (AC3 not checked, only PCM) | |
184c1e2c JCD |
1398 | * Audio Mic/Line inputs working. |
1399 | * Digital input not tested. | |
18c71092 | 1400 | */ |
21fdddea | 1401 | /* DSP: Tina2 |
f951fd3c JCD |
1402 | * DAC: Wolfson WM8768/WM8568 |
1403 | * ADC: Wolfson WM8775 | |
1404 | * AC97: None | |
1405 | * CA0151: None | |
1406 | */ | |
184c1e2c JCD |
1407 | /* Tested by James@superbug.co.uk 4th April 2006 */ |
1408 | /* A_IOCFG bits | |
1409 | * Output | |
1410 | * 0: Not Used | |
1411 | * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. | |
1412 | * 2: Analog input 0 = line in, 1 = mic in | |
1413 | * 3: Not Used | |
1414 | * 4: Digital output 0 = off, 1 = on. | |
1415 | * 5: Not Used | |
1416 | * 6: Not Used | |
1417 | * 7: Not Used | |
1418 | * Input | |
1419 | * All bits 1 (0x3fxx) means nothing plugged in. | |
1420 | * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. | |
1421 | * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. | |
1422 | * C-D: 2 = Front/Rear/etc, 3 = nothing. | |
1423 | * E-F: Always 0 | |
1424 | * | |
1425 | */ | |
d83c671f | 1426 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, |
18c71092 | 1427 | .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]", |
d83c671f JCD |
1428 | .id = "Audigy2", |
1429 | .emu10k2_chip = 1, | |
1430 | .ca0108_chip = 1, | |
1431 | .ca_cardbus_chip = 1, | |
27fe864e | 1432 | .spi_dac = 1, |
184c1e2c | 1433 | .i2c_adc = 1, |
d83c671f | 1434 | .spk71 = 1} , |
190d2c46 | 1435 | /* Tested by James@superbug.co.uk 4th Nov 2007. */ |
82c8c741 | 1436 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, |
18c71092 | 1437 | .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]", |
82c8c741 JCD |
1438 | .id = "EMU1010", |
1439 | .emu10k2_chip = 1, | |
1440 | .ca0108_chip = 1, | |
1441 | .ca_cardbus_chip = 1, | |
d9e8a552 | 1442 | .spk71 = 1 , |
3839e4f1 | 1443 | .emu_model = EMU_MODEL_EMU1616}, |
190d2c46 | 1444 | /* Tested by James@superbug.co.uk 4th Nov 2007. */ |
18c71092 | 1445 | /* This is MAEM8960, 0202 is MAEM 8980 */ |
3663d845 | 1446 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, |
18c71092 | 1447 | .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]", |
3663d845 JCD |
1448 | .id = "EMU1010", |
1449 | .emu10k2_chip = 1, | |
1450 | .ca0108_chip = 1, | |
190d2c46 | 1451 | .spk71 = 1, |
18c71092 | 1452 | .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ |
10f571d0 MK |
1453 | /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ |
1454 | /* This is MAEM8986, 0202 is MAEM8980 */ | |
1455 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, | |
1456 | .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]", | |
1457 | .id = "EMU1010", | |
1458 | .emu10k2_chip = 1, | |
1459 | .ca0108_chip = 1, | |
1460 | .spk71 = 1, | |
1461 | .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ | |
190d2c46 | 1462 | /* Tested by James@superbug.co.uk 8th July 2005. */ |
18c71092 | 1463 | /* This is MAEM8810, 0202 is MAEM8820 */ |
190d2c46 | 1464 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, |
18c71092 | 1465 | .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]", |
190d2c46 JCD |
1466 | .id = "EMU1010", |
1467 | .emu10k2_chip = 1, | |
1468 | .ca0102_chip = 1, | |
1469 | .spk71 = 1, | |
18c71092 | 1470 | .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ |
493b4acb VMV |
1471 | /* EMU0404b */ |
1472 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, | |
18c71092 | 1473 | .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]", |
493b4acb VMV |
1474 | .id = "EMU0404", |
1475 | .emu10k2_chip = 1, | |
1476 | .ca0108_chip = 1, | |
1477 | .spk71 = 1, | |
18c71092 | 1478 | .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ |
493b4acb VMV |
1479 | /* Tested by James@superbug.co.uk 20-3-2007. */ |
1480 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, | |
18c71092 | 1481 | .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]", |
493b4acb VMV |
1482 | .id = "EMU0404", |
1483 | .emu10k2_chip = 1, | |
1484 | .ca0102_chip = 1, | |
1485 | .spk71 = 1, | |
1486 | .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ | |
ac5d4b40 FZ |
1487 | /* EMU0404 PCIe */ |
1488 | {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, | |
1489 | .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]", | |
1490 | .id = "EMU0404", | |
1491 | .emu10k2_chip = 1, | |
1492 | .ca0108_chip = 1, | |
1493 | .spk71 = 1, | |
1494 | .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ | |
718a2594 | 1495 | /* Note that all E-mu cards require kernel 2.6 or newer. */ |
18c71092 VM |
1496 | {.vendor = 0x1102, .device = 0x0008, |
1497 | .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", | |
aec72e0a | 1498 | .id = "Audigy2", |
1da177e4 | 1499 | .emu10k2_chip = 1, |
2668907a PZ |
1500 | .ca0108_chip = 1, |
1501 | .ac97_chip = 1} , | |
88dc0e5d | 1502 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
1da177e4 | 1503 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, |
18c71092 | 1504 | .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", |
aec72e0a | 1505 | .id = "Audigy2", |
1da177e4 LT |
1506 | .emu10k2_chip = 1, |
1507 | .ca0102_chip = 1, | |
1508 | .ca0151_chip = 1, | |
1509 | .spk71 = 1, | |
1510 | .spdif_bug = 1, | |
1511 | .ac97_chip = 1} , | |
f6f8bb64 | 1512 | /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ |
5b0e4985 JCD |
1513 | /* The 0x20061102 does have SB0350 written on it |
1514 | * Just like 0x20021102 | |
1515 | */ | |
f6f8bb64 | 1516 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, |
18c71092 | 1517 | .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", |
f6f8bb64 LR |
1518 | .id = "Audigy2", |
1519 | .emu10k2_chip = 1, | |
1520 | .ca0102_chip = 1, | |
1521 | .ca0151_chip = 1, | |
1522 | .spk71 = 1, | |
1523 | .spdif_bug = 1, | |
55e03a68 | 1524 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
f6f8bb64 | 1525 | .ac97_chip = 1} , |
dcc2cf75 TY |
1526 | /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by |
1527 | Creative's Windows driver */ | |
1528 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, | |
1529 | .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", | |
1530 | .id = "Audigy2", | |
1531 | .emu10k2_chip = 1, | |
1532 | .ca0102_chip = 1, | |
1533 | .ca0151_chip = 1, | |
1534 | .spk71 = 1, | |
1535 | .spdif_bug = 1, | |
1536 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ | |
1537 | .ac97_chip = 1} , | |
1da177e4 | 1538 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, |
18c71092 | 1539 | .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", |
aec72e0a | 1540 | .id = "Audigy2", |
1da177e4 LT |
1541 | .emu10k2_chip = 1, |
1542 | .ca0102_chip = 1, | |
1543 | .ca0151_chip = 1, | |
1544 | .spk71 = 1, | |
1545 | .spdif_bug = 1, | |
55e03a68 | 1546 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1da177e4 LT |
1547 | .ac97_chip = 1} , |
1548 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, | |
18c71092 | 1549 | .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", |
aec72e0a | 1550 | .id = "Audigy2", |
1da177e4 LT |
1551 | .emu10k2_chip = 1, |
1552 | .ca0102_chip = 1, | |
1553 | .ca0151_chip = 1, | |
1554 | .spk71 = 1, | |
1555 | .spdif_bug = 1, | |
55e03a68 | 1556 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
1da177e4 | 1557 | .ac97_chip = 1} , |
54efc96d JCD |
1558 | /* Audigy 2 */ |
1559 | /* Tested by James@superbug.co.uk 3rd July 2005 */ | |
1560 | /* DSP: CA0102-IAT | |
1561 | * DAC: CS4382-KQ | |
1562 | * ADC: Philips 1361T | |
1563 | * AC97: STAC9721 | |
1564 | * CA0151: Yes | |
1565 | */ | |
1da177e4 | 1566 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, |
18c71092 | 1567 | .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", |
aec72e0a | 1568 | .id = "Audigy2", |
1da177e4 LT |
1569 | .emu10k2_chip = 1, |
1570 | .ca0102_chip = 1, | |
1571 | .ca0151_chip = 1, | |
1572 | .spk71 = 1, | |
1573 | .spdif_bug = 1, | |
11b3a755 | 1574 | .adc_1361t = 1, /* 24 bit capture instead of 16bit */ |
1da177e4 LT |
1575 | .ac97_chip = 1} , |
1576 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, | |
18c71092 | 1577 | .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]", |
aec72e0a | 1578 | .id = "Audigy2", |
1da177e4 LT |
1579 | .emu10k2_chip = 1, |
1580 | .ca0102_chip = 1, | |
1581 | .ca0151_chip = 1, | |
2f020aa7 | 1582 | .spk71 = 1, |
1da177e4 | 1583 | .spdif_bug = 1} , |
264f9577 JCD |
1584 | /* Dell OEM/Creative Labs Audigy 2 ZS */ |
1585 | /* See ALSA bug#1365 */ | |
1586 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, | |
18c71092 | 1587 | .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", |
264f9577 JCD |
1588 | .id = "Audigy2", |
1589 | .emu10k2_chip = 1, | |
1590 | .ca0102_chip = 1, | |
1591 | .ca0151_chip = 1, | |
1592 | .spk71 = 1, | |
1593 | .spdif_bug = 1, | |
1f9da554 | 1594 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
264f9577 | 1595 | .ac97_chip = 1} , |
1da177e4 | 1596 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, |
18c71092 | 1597 | .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", |
aec72e0a | 1598 | .id = "Audigy2", |
1da177e4 LT |
1599 | .emu10k2_chip = 1, |
1600 | .ca0102_chip = 1, | |
1601 | .ca0151_chip = 1, | |
1602 | .spk71 = 1, | |
1603 | .spdif_bug = 1, | |
d2cd74b1 | 1604 | .invert_shared_spdif = 1, /* digital/analog switch swapped */ |
3271b7b2 | 1605 | .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ |
1da177e4 | 1606 | .ac97_chip = 1} , |
bdaed502 | 1607 | {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, |
18c71092 | 1608 | .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", |
bdaed502 TI |
1609 | .id = "Audigy2", |
1610 | .emu10k2_chip = 1, | |
1611 | .ca0102_chip = 1, | |
1612 | .ca0151_chip = 1, | |
1613 | .spdif_bug = 1, | |
1614 | .ac97_chip = 1} , | |
ae3a72d8 | 1615 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, |
18c71092 | 1616 | .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", |
aec72e0a | 1617 | .id = "Audigy", |
56f5ceed JCD |
1618 | .emu10k2_chip = 1, |
1619 | .ca0102_chip = 1, | |
2668907a | 1620 | .ac97_chip = 1} , |
ae3a72d8 | 1621 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, |
18c71092 | 1622 | .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", |
2668907a PZ |
1623 | .id = "Audigy", |
1624 | .emu10k2_chip = 1, | |
1625 | .ca0102_chip = 1, | |
ae3a72d8 | 1626 | .spdif_bug = 1, |
2668907a | 1627 | .ac97_chip = 1} , |
a6c17ec8 | 1628 | {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, |
18c71092 | 1629 | .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", |
a6c17ec8 AP |
1630 | .id = "Audigy", |
1631 | .emu10k2_chip = 1, | |
1632 | .ca0102_chip = 1, | |
1633 | .ac97_chip = 1} , | |
1da177e4 | 1634 | {.vendor = 0x1102, .device = 0x0004, |
18c71092 | 1635 | .driver = "Audigy", .name = "Audigy 1 [Unknown]", |
aec72e0a | 1636 | .id = "Audigy", |
1da177e4 LT |
1637 | .emu10k2_chip = 1, |
1638 | .ca0102_chip = 1, | |
2668907a | 1639 | .ac97_chip = 1} , |
18c71092 VM |
1640 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, |
1641 | .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", | |
1642 | .id = "Live", | |
1643 | .emu10k1_chip = 1, | |
1644 | .ac97_chip = 1, | |
1645 | .sblive51 = 1} , | |
1646 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, | |
1647 | .driver = "EMU10K1", .name = "SB Live! [SB0105]", | |
f7de9cfd MM |
1648 | .id = "Live", |
1649 | .emu10k1_chip = 1, | |
1650 | .ac97_chip = 1, | |
1651 | .sblive51 = 1} , | |
18c71092 VM |
1652 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, |
1653 | .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", | |
aec72e0a | 1654 | .id = "Live", |
1da177e4 | 1655 | .emu10k1_chip = 1, |
2b637da5 LR |
1656 | .ac97_chip = 1, |
1657 | .sblive51 = 1} , | |
a6f6192b | 1658 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, |
18c71092 | 1659 | .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", |
2b6b22f3 JCD |
1660 | .id = "Live", |
1661 | .emu10k1_chip = 1, | |
1662 | .ac97_chip = 1, | |
1663 | .sblive51 = 1} , | |
0ba656d0 | 1664 | /* Tested by ALSA bug#1680 26th December 2005 */ |
18c71092 VM |
1665 | /* note: It really has SB0220 written on the card, */ |
1666 | /* but it's SB0228 according to kx.inf */ | |
0ba656d0 | 1667 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, |
18c71092 | 1668 | .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", |
0ba656d0 JCD |
1669 | .id = "Live", |
1670 | .emu10k1_chip = 1, | |
1671 | .ac97_chip = 1, | |
1672 | .sblive51 = 1} , | |
c6c0b841 LR |
1673 | /* Tested by Thomas Zehetbauer 27th Aug 2005 */ |
1674 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, | |
18c71092 | 1675 | .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", |
a8ee7295 GT |
1676 | .id = "Live", |
1677 | .emu10k1_chip = 1, | |
1678 | .ac97_chip = 1, | |
1679 | .sblive51 = 1} , | |
a6f6192b | 1680 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, |
18c71092 | 1681 | .driver = "EMU10K1", .name = "SB Live! 5.1", |
2b6b22f3 JCD |
1682 | .id = "Live", |
1683 | .emu10k1_chip = 1, | |
1684 | .ac97_chip = 1, | |
1685 | .sblive51 = 1} , | |
afe0f1f6 | 1686 | /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ |
a6f6192b | 1687 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, |
18c71092 | 1688 | .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", |
2b6b22f3 JCD |
1689 | .id = "Live", |
1690 | .emu10k1_chip = 1, | |
f12aa40c TI |
1691 | .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum |
1692 | * share the same IDs! | |
1693 | */ | |
2b6b22f3 | 1694 | .sblive51 = 1} , |
a6f6192b | 1695 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, |
18c71092 | 1696 | .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", |
2b6b22f3 JCD |
1697 | .id = "Live", |
1698 | .emu10k1_chip = 1, | |
1699 | .ac97_chip = 1, | |
1700 | .sblive51 = 1} , | |
a6f6192b | 1701 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, |
18c71092 | 1702 | .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", |
a6f6192b JCD |
1703 | .id = "Live", |
1704 | .emu10k1_chip = 1, | |
1705 | .ac97_chip = 1} , | |
1706 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, | |
18c71092 | 1707 | .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", |
2b6b22f3 JCD |
1708 | .id = "Live", |
1709 | .emu10k1_chip = 1, | |
1710 | .ac97_chip = 1, | |
1711 | .sblive51 = 1} , | |
1712 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, | |
18c71092 | 1713 | .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", |
2b6b22f3 JCD |
1714 | .id = "Live", |
1715 | .emu10k1_chip = 1, | |
1716 | .ac97_chip = 1, | |
1717 | .sblive51 = 1} , | |
a6f6192b | 1718 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, |
18c71092 | 1719 | .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", |
aec72e0a | 1720 | .id = "Live", |
2b637da5 LR |
1721 | .emu10k1_chip = 1, |
1722 | .ac97_chip = 1, | |
1723 | .sblive51 = 1} , | |
88dc0e5d | 1724 | /* Tested by James@superbug.co.uk 3rd July 2005 */ |
a6f6192b | 1725 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, |
18c71092 | 1726 | .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", |
2b6b22f3 JCD |
1727 | .id = "Live", |
1728 | .emu10k1_chip = 1, | |
1729 | .ac97_chip = 1, | |
1730 | .sblive51 = 1} , | |
a6f6192b | 1731 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, |
18c71092 | 1732 | .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", |
2b6b22f3 JCD |
1733 | .id = "Live", |
1734 | .emu10k1_chip = 1, | |
1735 | .ac97_chip = 1, | |
1736 | .sblive51 = 1} , | |
a6f6192b | 1737 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, |
18c71092 | 1738 | .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", |
2b6b22f3 JCD |
1739 | .id = "Live", |
1740 | .emu10k1_chip = 1, | |
1741 | .ac97_chip = 1, | |
1742 | .sblive51 = 1} , | |
a6f6192b | 1743 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, |
18c71092 | 1744 | .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", |
2b6b22f3 JCD |
1745 | .id = "Live", |
1746 | .emu10k1_chip = 1, | |
1747 | .ac97_chip = 1, | |
1748 | .sblive51 = 1} , | |
a6f6192b | 1749 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, |
18c71092 | 1750 | .driver = "EMU10K1", .name = "E-mu APS [PC545]", |
a6f6192b | 1751 | .id = "APS", |
2b6b22f3 | 1752 | .emu10k1_chip = 1, |
a6f6192b JCD |
1753 | .ecard = 1} , |
1754 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, | |
18c71092 | 1755 | .driver = "EMU10K1", .name = "SB Live! [CT4620]", |
2b6b22f3 JCD |
1756 | .id = "Live", |
1757 | .emu10k1_chip = 1, | |
1758 | .ac97_chip = 1, | |
1759 | .sblive51 = 1} , | |
a6f6192b | 1760 | {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, |
18c71092 | 1761 | .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", |
2b6b22f3 JCD |
1762 | .id = "Live", |
1763 | .emu10k1_chip = 1, | |
1764 | .ac97_chip = 1, | |
1765 | .sblive51 = 1} , | |
1da177e4 | 1766 | {.vendor = 0x1102, .device = 0x0002, |
18c71092 | 1767 | .driver = "EMU10K1", .name = "SB Live! [Unknown]", |
aec72e0a | 1768 | .id = "Live", |
1da177e4 | 1769 | .emu10k1_chip = 1, |
2b637da5 LR |
1770 | .ac97_chip = 1, |
1771 | .sblive51 = 1} , | |
1da177e4 LT |
1772 | { } /* terminator */ |
1773 | }; | |
1774 | ||
e23e7a14 | 1775 | int snd_emu10k1_create(struct snd_card *card, |
67679b1f | 1776 | struct pci_dev *pci, |
1da177e4 LT |
1777 | unsigned short extin_mask, |
1778 | unsigned short extout_mask, | |
1779 | long max_cache_bytes, | |
1780 | int enable_ir, | |
e66bc8b2 | 1781 | uint subsystem, |
67679b1f | 1782 | struct snd_emu10k1 **remu) |
1da177e4 | 1783 | { |
eb4698f3 | 1784 | struct snd_emu10k1 *emu; |
09668b44 | 1785 | int idx, err; |
1da177e4 | 1786 | int is_audigy; |
09668b44 | 1787 | unsigned int silent_page; |
eb4698f3 TI |
1788 | const struct snd_emu_chip_details *c; |
1789 | static struct snd_device_ops ops = { | |
1da177e4 LT |
1790 | .dev_free = snd_emu10k1_dev_free, |
1791 | }; | |
67679b1f | 1792 | |
1da177e4 LT |
1793 | *remu = NULL; |
1794 | ||
1795 | /* enable PCI device */ | |
67679b1f VM |
1796 | err = pci_enable_device(pci); |
1797 | if (err < 0) | |
1da177e4 LT |
1798 | return err; |
1799 | ||
e560d8d8 | 1800 | emu = kzalloc(sizeof(*emu), GFP_KERNEL); |
1da177e4 LT |
1801 | if (emu == NULL) { |
1802 | pci_disable_device(pci); | |
1803 | return -ENOMEM; | |
1804 | } | |
1805 | emu->card = card; | |
1806 | spin_lock_init(&emu->reg_lock); | |
1807 | spin_lock_init(&emu->emu_lock); | |
c94fa4c9 JCD |
1808 | spin_lock_init(&emu->spi_lock); |
1809 | spin_lock_init(&emu->i2c_lock); | |
1da177e4 LT |
1810 | spin_lock_init(&emu->voice_lock); |
1811 | spin_lock_init(&emu->synth_lock); | |
1812 | spin_lock_init(&emu->memblk_lock); | |
62932df8 | 1813 | mutex_init(&emu->fx8010.lock); |
1da177e4 LT |
1814 | INIT_LIST_HEAD(&emu->mapped_link_head); |
1815 | INIT_LIST_HEAD(&emu->mapped_order_link_head); | |
1816 | emu->pci = pci; | |
1817 | emu->irq = -1; | |
1818 | emu->synth = NULL; | |
1819 | emu->get_synth_voice = NULL; | |
1820 | /* read revision & serial */ | |
44c10138 | 1821 | emu->revision = pci->revision; |
1da177e4 LT |
1822 | pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); |
1823 | pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); | |
6f002b02 TI |
1824 | dev_dbg(card->dev, |
1825 | "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", | |
1826 | pci->vendor, pci->device, emu->serial, emu->model); | |
1da177e4 LT |
1827 | |
1828 | for (c = emu_chip_details; c->vendor; c++) { | |
1829 | if (c->vendor == pci->vendor && c->device == pci->device) { | |
e66bc8b2 | 1830 | if (subsystem) { |
67679b1f | 1831 | if (c->subsystem && (c->subsystem == subsystem)) |
e66bc8b2 | 1832 | break; |
67679b1f VM |
1833 | else |
1834 | continue; | |
e66bc8b2 | 1835 | } else { |
67679b1f | 1836 | if (c->subsystem && (c->subsystem != emu->serial)) |
e66bc8b2 JCD |
1837 | continue; |
1838 | if (c->revision && c->revision != emu->revision) | |
1839 | continue; | |
1840 | } | |
bdaed502 | 1841 | break; |
1da177e4 LT |
1842 | } |
1843 | } | |
1844 | if (c->vendor == 0) { | |
6f002b02 | 1845 | dev_err(card->dev, "emu10k1: Card not recognised\n"); |
1da177e4 LT |
1846 | kfree(emu); |
1847 | pci_disable_device(pci); | |
1848 | return -ENOENT; | |
1849 | } | |
1850 | emu->card_capabilities = c; | |
e66bc8b2 | 1851 | if (c->subsystem && !subsystem) |
6f002b02 | 1852 | dev_dbg(card->dev, "Sound card name = %s\n", c->name); |
67679b1f | 1853 | else if (subsystem) |
6f002b02 | 1854 | dev_dbg(card->dev, "Sound card name = %s, " |
67679b1f | 1855 | "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " |
88393161 | 1856 | "Forced to subsystem = 0x%x\n", c->name, |
67679b1f VM |
1857 | pci->vendor, pci->device, emu->serial, c->subsystem); |
1858 | else | |
6f002b02 | 1859 | dev_dbg(card->dev, "Sound card name = %s, " |
67679b1f VM |
1860 | "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", |
1861 | c->name, pci->vendor, pci->device, | |
1862 | emu->serial); | |
1863 | ||
85a655d6 TI |
1864 | if (!*card->id && c->id) { |
1865 | int i, n = 0; | |
aec72e0a | 1866 | strlcpy(card->id, c->id, sizeof(card->id)); |
85a655d6 TI |
1867 | for (;;) { |
1868 | for (i = 0; i < snd_ecards_limit; i++) { | |
1869 | if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id)) | |
1870 | break; | |
1871 | } | |
1872 | if (i >= snd_ecards_limit) | |
1873 | break; | |
1874 | n++; | |
1875 | if (n >= SNDRV_CARDS) | |
1876 | break; | |
1877 | snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n); | |
1878 | } | |
1879 | } | |
aec72e0a | 1880 | |
1da177e4 LT |
1881 | is_audigy = emu->audigy = c->emu10k2_chip; |
1882 | ||
1883 | /* set the DMA transfer mask */ | |
1884 | emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK; | |
1885 | if (pci_set_dma_mask(pci, emu->dma_mask) < 0 || | |
1886 | pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) { | |
6f002b02 TI |
1887 | dev_err(card->dev, |
1888 | "architecture does not support PCI busmaster DMA with mask 0x%lx\n", | |
1889 | emu->dma_mask); | |
1da177e4 LT |
1890 | kfree(emu); |
1891 | pci_disable_device(pci); | |
1892 | return -ENXIO; | |
1893 | } | |
1894 | if (is_audigy) | |
1895 | emu->gpr_base = A_FXGPREGBASE; | |
1896 | else | |
1897 | emu->gpr_base = FXGPREGBASE; | |
1898 | ||
67679b1f VM |
1899 | err = pci_request_regions(pci, "EMU10K1"); |
1900 | if (err < 0) { | |
1da177e4 LT |
1901 | kfree(emu); |
1902 | pci_disable_device(pci); | |
1903 | return err; | |
1904 | } | |
1905 | emu->port = pci_resource_start(pci, 0); | |
1906 | ||
1da177e4 LT |
1907 | emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; |
1908 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | |
1909 | 32 * 1024, &emu->ptb_pages) < 0) { | |
09668b44 TI |
1910 | err = -ENOMEM; |
1911 | goto error; | |
1da177e4 LT |
1912 | } |
1913 | ||
36726d9d JJ |
1914 | emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *)); |
1915 | emu->page_addr_table = vmalloc(emu->max_cache_pages * | |
1916 | sizeof(unsigned long)); | |
1da177e4 | 1917 | if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) { |
09668b44 TI |
1918 | err = -ENOMEM; |
1919 | goto error; | |
1da177e4 LT |
1920 | } |
1921 | ||
1922 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), | |
1923 | EMUPAGESIZE, &emu->silent_page) < 0) { | |
09668b44 TI |
1924 | err = -ENOMEM; |
1925 | goto error; | |
1da177e4 LT |
1926 | } |
1927 | emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); | |
1928 | if (emu->memhdr == NULL) { | |
09668b44 TI |
1929 | err = -ENOMEM; |
1930 | goto error; | |
1da177e4 | 1931 | } |
eb4698f3 TI |
1932 | emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - |
1933 | sizeof(struct snd_util_memblk); | |
1da177e4 LT |
1934 | |
1935 | pci_set_master(pci); | |
1936 | ||
1da177e4 LT |
1937 | emu->fx8010.fxbus_mask = 0x303f; |
1938 | if (extin_mask == 0) | |
1939 | extin_mask = 0x3fcf; | |
1940 | if (extout_mask == 0) | |
1941 | extout_mask = 0x7fff; | |
1942 | emu->fx8010.extin_mask = extin_mask; | |
1943 | emu->fx8010.extout_mask = extout_mask; | |
09668b44 | 1944 | emu->enable_ir = enable_ir; |
1da177e4 | 1945 | |
d9e8a552 | 1946 | if (emu->card_capabilities->ca_cardbus_chip) { |
67679b1f VM |
1947 | err = snd_emu10k1_cardbus_init(emu); |
1948 | if (err < 0) | |
d9e8a552 JCD |
1949 | goto error; |
1950 | } | |
2b637da5 | 1951 | if (emu->card_capabilities->ecard) { |
67679b1f VM |
1952 | err = snd_emu10k1_ecard_init(emu); |
1953 | if (err < 0) | |
09668b44 | 1954 | goto error; |
190d2c46 | 1955 | } else if (emu->card_capabilities->emu_model) { |
67679b1f VM |
1956 | err = snd_emu10k1_emu1010_init(emu); |
1957 | if (err < 0) { | |
1958 | snd_emu10k1_free(emu); | |
1959 | return err; | |
1960 | } | |
1da177e4 LT |
1961 | } else { |
1962 | /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version | |
1963 | does not support this, it shouldn't do any harm */ | |
67679b1f VM |
1964 | snd_emu10k1_ptr_write(emu, AC97SLOT, 0, |
1965 | AC97SLOT_CNTR|AC97SLOT_LFE); | |
1da177e4 LT |
1966 | } |
1967 | ||
09668b44 TI |
1968 | /* initialize TRAM setup */ |
1969 | emu->fx8010.itram_size = (16 * 1024)/2; | |
1970 | emu->fx8010.etram_pages.area = NULL; | |
1971 | emu->fx8010.etram_pages.bytes = 0; | |
1da177e4 | 1972 | |
868e15db JF |
1973 | /* irq handler must be registered after I/O ports are activated */ |
1974 | if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED, | |
934c2b6d | 1975 | KBUILD_MODNAME, emu)) { |
868e15db JF |
1976 | err = -EBUSY; |
1977 | goto error; | |
1978 | } | |
1979 | emu->irq = pci->irq; | |
1980 | ||
09668b44 TI |
1981 | /* |
1982 | * Init to 0x02109204 : | |
1983 | * Clock accuracy = 0 (1000ppm) | |
1984 | * Sample Rate = 2 (48kHz) | |
1985 | * Audio Channel = 1 (Left of 2) | |
1986 | * Source Number = 0 (Unspecified) | |
1987 | * Generation Status = 1 (Original for Cat Code 12) | |
1988 | * Cat Code = 12 (Digital Signal Mixer) | |
1989 | * Mode = 0 (Mode 0) | |
1990 | * Emphasis = 0 (None) | |
1991 | * CP = 1 (Copyright unasserted) | |
1992 | * AN = 0 (Audio data) | |
1993 | * P = 0 (Consumer) | |
1994 | */ | |
1995 | emu->spdif_bits[0] = emu->spdif_bits[1] = | |
1996 | emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | | |
1997 | SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | | |
1998 | SPCS_GENERATIONSTATUS | 0x00001200 | | |
1999 | 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; | |
2000 | ||
2001 | emu->reserved_page = (struct snd_emu10k1_memblk *) | |
2002 | snd_emu10k1_synth_alloc(emu, 4096); | |
2003 | if (emu->reserved_page) | |
2004 | emu->reserved_page->map_locked = 1; | |
67679b1f | 2005 | |
09668b44 TI |
2006 | /* Clear silent pages and set up pointers */ |
2007 | memset(emu->silent_page.area, 0, PAGE_SIZE); | |
2008 | silent_page = emu->silent_page.addr << 1; | |
2009 | for (idx = 0; idx < MAXPAGES; idx++) | |
2010 | ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx); | |
2011 | ||
2012 | /* set up voice indices */ | |
2013 | for (idx = 0; idx < NUM_G; idx++) { | |
2014 | emu->voices[idx].emu = emu; | |
2015 | emu->voices[idx].number = idx; | |
1da177e4 LT |
2016 | } |
2017 | ||
67679b1f VM |
2018 | err = snd_emu10k1_init(emu, enable_ir, 0); |
2019 | if (err < 0) | |
09668b44 | 2020 | goto error; |
c7561cd8 | 2021 | #ifdef CONFIG_PM_SLEEP |
67679b1f VM |
2022 | err = alloc_pm_buffer(emu); |
2023 | if (err < 0) | |
09668b44 TI |
2024 | goto error; |
2025 | #endif | |
2026 | ||
2027 | /* Initialize the effect engine */ | |
67679b1f VM |
2028 | err = snd_emu10k1_init_efx(emu); |
2029 | if (err < 0) | |
09668b44 TI |
2030 | goto error; |
2031 | snd_emu10k1_audio_enable(emu); | |
2032 | ||
67679b1f VM |
2033 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops); |
2034 | if (err < 0) | |
09668b44 TI |
2035 | goto error; |
2036 | ||
adf1b3d2 | 2037 | #ifdef CONFIG_PROC_FS |
1da177e4 | 2038 | snd_emu10k1_proc_init(emu); |
adf1b3d2 | 2039 | #endif |
1da177e4 | 2040 | |
1da177e4 LT |
2041 | *remu = emu; |
2042 | return 0; | |
09668b44 TI |
2043 | |
2044 | error: | |
2045 | snd_emu10k1_free(emu); | |
2046 | return err; | |
1da177e4 LT |
2047 | } |
2048 | ||
c7561cd8 | 2049 | #ifdef CONFIG_PM_SLEEP |
09668b44 TI |
2050 | static unsigned char saved_regs[] = { |
2051 | CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, | |
2052 | FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, | |
2053 | ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, | |
2054 | TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, | |
2055 | MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, | |
2056 | SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, | |
2057 | 0xff /* end */ | |
2058 | }; | |
2059 | static unsigned char saved_regs_audigy[] = { | |
2060 | A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE, | |
2061 | A_FXRT2, A_SENDAMOUNTS, A_FXRT1, | |
2062 | 0xff /* end */ | |
2063 | }; | |
2064 | ||
e23e7a14 | 2065 | static int alloc_pm_buffer(struct snd_emu10k1 *emu) |
09668b44 TI |
2066 | { |
2067 | int size; | |
2068 | ||
2069 | size = ARRAY_SIZE(saved_regs); | |
2070 | if (emu->audigy) | |
2071 | size += ARRAY_SIZE(saved_regs_audigy); | |
2072 | emu->saved_ptr = vmalloc(4 * NUM_G * size); | |
67679b1f | 2073 | if (!emu->saved_ptr) |
09668b44 TI |
2074 | return -ENOMEM; |
2075 | if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) | |
2076 | return -ENOMEM; | |
2077 | if (emu->card_capabilities->ca0151_chip && | |
2078 | snd_p16v_alloc_pm_buffer(emu) < 0) | |
2079 | return -ENOMEM; | |
2080 | return 0; | |
2081 | } | |
2082 | ||
2083 | static void free_pm_buffer(struct snd_emu10k1 *emu) | |
2084 | { | |
2085 | vfree(emu->saved_ptr); | |
2086 | snd_emu10k1_efx_free_pm_buffer(emu); | |
2087 | if (emu->card_capabilities->ca0151_chip) | |
2088 | snd_p16v_free_pm_buffer(emu); | |
2089 | } | |
2090 | ||
2091 | void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) | |
2092 | { | |
2093 | int i; | |
2094 | unsigned char *reg; | |
2095 | unsigned int *val; | |
2096 | ||
2097 | val = emu->saved_ptr; | |
2098 | for (reg = saved_regs; *reg != 0xff; reg++) | |
2099 | for (i = 0; i < NUM_G; i++, val++) | |
2100 | *val = snd_emu10k1_ptr_read(emu, *reg, i); | |
2101 | if (emu->audigy) { | |
2102 | for (reg = saved_regs_audigy; *reg != 0xff; reg++) | |
2103 | for (i = 0; i < NUM_G; i++, val++) | |
2104 | *val = snd_emu10k1_ptr_read(emu, *reg, i); | |
2105 | } | |
2106 | if (emu->audigy) | |
2107 | emu->saved_a_iocfg = inl(emu->port + A_IOCFG); | |
2108 | emu->saved_hcfg = inl(emu->port + HCFG); | |
2109 | } | |
2110 | ||
2111 | void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) | |
2112 | { | |
d9e8a552 JCD |
2113 | if (emu->card_capabilities->ca_cardbus_chip) |
2114 | snd_emu10k1_cardbus_init(emu); | |
09668b44 TI |
2115 | if (emu->card_capabilities->ecard) |
2116 | snd_emu10k1_ecard_init(emu); | |
190d2c46 | 2117 | else if (emu->card_capabilities->emu_model) |
67679b1f | 2118 | snd_emu10k1_emu1010_init(emu); |
09668b44 TI |
2119 | else |
2120 | snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); | |
2121 | snd_emu10k1_init(emu, emu->enable_ir, 1); | |
2122 | } | |
2123 | ||
2124 | void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) | |
2125 | { | |
2126 | int i; | |
2127 | unsigned char *reg; | |
2128 | unsigned int *val; | |
2129 | ||
2130 | snd_emu10k1_audio_enable(emu); | |
2131 | ||
2132 | /* resore for spdif */ | |
2133 | if (emu->audigy) | |
4130d59b AP |
2134 | outl(emu->saved_a_iocfg, emu->port + A_IOCFG); |
2135 | outl(emu->saved_hcfg, emu->port + HCFG); | |
09668b44 TI |
2136 | |
2137 | val = emu->saved_ptr; | |
2138 | for (reg = saved_regs; *reg != 0xff; reg++) | |
2139 | for (i = 0; i < NUM_G; i++, val++) | |
2140 | snd_emu10k1_ptr_write(emu, *reg, i, *val); | |
2141 | if (emu->audigy) { | |
2142 | for (reg = saved_regs_audigy; *reg != 0xff; reg++) | |
2143 | for (i = 0; i < NUM_G; i++, val++) | |
2144 | snd_emu10k1_ptr_write(emu, *reg, i, *val); | |
2145 | } | |
2146 | } | |
2147 | #endif |