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Merge branch 'for-linus' into for-next
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1_main.c
CommitLineData
1da177e4 1/*
c1017a4c 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
9f4bd5dd 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
1da177e4 7 * Added support for Audigy 2 Value.
9f4bd5dd
JCD		 8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
1da177e4
LT		 10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
42f53226
JCD		 34#include <linux/sched.h>
35#include <linux/kthread.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/init.h>
da155d5b 38#include <linux/module.h>
1da177e4
LT		 39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/vmalloc.h>
62932df8
IM		 43#include <linux/mutex.h>
44
1da177e4
LT		 45
46#include <sound/core.h>
47#include <sound/emu10k1.h>
9f4bd5dd 48#include <linux/firmware.h>
1da177e4 49#include "p16v.h"
e2b15f8f 50#include "tina2.h"
184c1e2c 51#include "p17v.h"
1da177e4 52
19b99fba 53
7e0af29d
CL		 54#define HANA_FILENAME "emu/hana.fw"
55#define DOCK_FILENAME "emu/audio_dock.fw"
3663d845
JCD		 56#define EMU1010B_FILENAME "emu/emu1010b.fw"
57#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
190d2c46 58#define EMU0404_FILENAME "emu/emu0404.fw"
d9e8a552 59#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
7e0af29d
CL		 60
61MODULE_FIRMWARE(HANA_FILENAME);
62MODULE_FIRMWARE(DOCK_FILENAME);
3663d845
JCD		 63MODULE_FIRMWARE(EMU1010B_FILENAME);
64MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
190d2c46 65MODULE_FIRMWARE(EMU0404_FILENAME);
d9e8a552 66MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
7e0af29d
CL		 67
68
1da177e4
LT		 69/*************************************************************************
70 * EMU10K1 init / done
71 *************************************************************************/
72
67679b1f 73void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
1da177e4
LT		 74{
75 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
76 snd_emu10k1_ptr_write(emu, IP, ch, 0);
77 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
79 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
80 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
81 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82
83 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
84 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
85 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
87 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
88 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89
90 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
91 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
92 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
93 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
94 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
95 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
97 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98
99 /*** these are last so OFF prevents writing ***/
100 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105
106 /* Audigy extra stuffs */
107 if (emu->audigy) {
108 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 }
116}
117
18f3c59f
JCD		 118static unsigned int spi_dac_init[] = {
119 0x00ff,
120 0x02ff,
121 0x0400,
122 0x0520,
123 0x0600,
124 0x08ff,
125 0x0aff,
126 0x0cff,
127 0x0eff,
128 0x10ff,
129 0x1200,
130 0x1400,
131 0x1480,
132 0x1800,
133 0x1aff,
134 0x1cff,
135 0x1e00,
136 0x0530,
137 0x0602,
138 0x0622,
139 0x1400,
140};
184c1e2c
JCD		 141
142static unsigned int i2c_adc_init[][2] = {
143 { 0x17, 0x00 }, /* Reset */
144 { 0x07, 0x00 }, /* Timeout */
145 { 0x0b, 0x22 }, /* Interface control */
146 { 0x0c, 0x22 }, /* Master mode control */
147 { 0x0d, 0x08 }, /* Powerdown control */
148 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
149 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
150 { 0x10, 0x7b }, /* ALC Control 1 */
151 { 0x11, 0x00 }, /* ALC Control 2 */
152 { 0x12, 0x32 }, /* ALC Control 3 */
153 { 0x13, 0x00 }, /* Noise gate control */
154 { 0x14, 0xa6 }, /* Limiter control */
67679b1f 155 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
184c1e2c 156};
67679b1f 157
09668b44 158static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
1da177e4 159{
1da177e4 160 unsigned int silent_page;
09668b44 161 int ch;
184c1e2c 162 u32 tmp;
1da177e4
LT		 163
164 /* disable audio and lock cache */
67679b1f
VM		 165 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
1da177e4
LT		 167
168 /* reset recording buffers */
169 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175
176 /* disable channel interrupt */
177 outl(0, emu->port + INTE);
178 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182
67679b1f 183 if (emu->audigy) {
1da177e4
LT		 184 /* set SPDIF bypass mode */
185 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186 /* enable rear left + rear right AC97 slots */
09668b44
TI		 187 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 AC97SLOT_REAR_LEFT);
1da177e4
LT		 189 }
190
191 /* init envelope engine */
09668b44 192 for (ch = 0; ch < NUM_G; ch++)
1da177e4 193 snd_emu10k1_voice_init(emu, ch);
1da177e4 194
09668b44
TI		 195 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
1da177e4 198
2b637da5 199 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4 200 /* Hacks for Alice3 to work independent of haP16V driver */
67679b1f 201 /* Setup SRCMulti_I2S SamplingRate */
1da177e4
LT		 202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 tmp &= 0xfffff1ff;
204 tmp |= (0x2<<9);
205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
67679b1f 206
1da177e4
LT		 207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209 /* Setup SRCMulti Input Audio Enable */
210 /* Use 0xFFFFFFFF to enable P16V sounds. */
211 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212
213 /* Enabled Phased (8-channel) P16V playback */
214 outl(0x0201, emu->port + HCFG2);
215 /* Set playback routing. */
fd9a98ec 216 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
1da177e4 217 }
e0474e53 218 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
1da177e4 219 /* Hacks for Alice3 to work independent of haP16V driver */
09668b44 220 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
67679b1f 221 /* Setup SRCMulti_I2S SamplingRate */
1da177e4
LT		 222 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223 tmp &= 0xfffff1ff;
224 tmp |= (0x2<<9);
225 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226
227 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228 outl(0x600000, emu->port + 0x20);
229 outl(0x14, emu->port + 0x24);
230
231 /* Setup SRCMulti Input Audio Enable */
232 outl(0x7b0000, emu->port + 0x20);
233 outl(0xFF000000, emu->port + 0x24);
234
235 /* Setup SPDIF Out Audio Enable */
236 /* The Audigy 2 Value has a separate SPDIF out,
237 * so no need for a mixer switch
238 */
239 outl(0x7a0000, emu->port + 0x20);
240 outl(0xFF000000, emu->port + 0x24);
241 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242 outl(tmp, emu->port + A_IOCFG);
243 }
27fe864e 244 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
18f3c59f
JCD		 245 int size, n;
246
247 size = ARRAY_SIZE(spi_dac_init);
9f4bd5dd 248 for (n = 0; n < size; n++)
18f3c59f
JCD		 249 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250
27fe864e 251 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
ccadc3e3
JCD		 252 /* Enable GPIOs
253 * GPIO0: Unknown
254 * GPIO1: Speakers-enabled.
255 * GPIO2: Unknown
256 * GPIO3: Unknown
257 * GPIO4: IEC958 Output on.
258 * GPIO5: Unknown
259 * GPIO6: Unknown
260 * GPIO7: Unknown
261 */
262 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
27fe864e 263 }
184c1e2c
JCD		 264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 int size, n;
266
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
67679b1f
VM		 274 for (n = 0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0] = 0xcf;
276 emu->i2c_capture_volume[n][1] = 0xcf;
184c1e2c 277 }
184c1e2c
JCD		 278 }
279
67679b1f 280
1da177e4
LT		 281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284
285 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
286 for (ch = 0; ch < NUM_G; ch++) {
287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 }
290
190d2c46 291 if (emu->card_capabilities->emu_model) {
9f4bd5dd
JCD		 292 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_EMU32_SLAVE |
294 HCFG_AUDIOENABLE, emu->port + HCFG);
1da177e4
LT		 295 /*
296 * Hokay, setup HCFG
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
300 * Auto Mute = 1
301 */
9f4bd5dd 302 } else if (emu->audigy) {
1da177e4
LT		 303 if (emu->revision == 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE |
305 HCFG_AC3ENABLE_CDSPDIF |
306 HCFG_AC3ENABLE_GPSPDIF |
307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 else
309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
e0474e53
JCD		 310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
1da177e4
LT		 312 } else if (emu->model == 0x20 ||
313 emu->model == 0xc400 ||
314 (emu->model == 0x21 && emu->revision < 6))
315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 else
67679b1f 317 /* With on-chip joystick */
1da177e4
LT		 318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319
320 if (enable_ir) { /* enable IR for SB Live */
190d2c46 321 if (emu->card_capabilities->emu_model) {
9f4bd5dd 322 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 323 } else if (emu->card_capabilities->i2c_adc) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 325 } else if (emu->audigy) {
1da177e4
LT		 326 unsigned int reg = inl(emu->port + A_IOCFG);
327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 udelay(500);
329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 udelay(100);
331 outl(reg, emu->port + A_IOCFG);
332 } else {
333 unsigned int reg = inl(emu->port + HCFG);
334 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 udelay(500);
336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 udelay(100);
338 outl(reg, emu->port + HCFG);
67679b1f 339 }
1da177e4 340 }
67679b1f 341
190d2c46 342 if (emu->card_capabilities->emu_model) {
9f4bd5dd 343 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 346 } else if (emu->audigy) { /* enable analog output */
1da177e4
LT		 347 unsigned int reg = inl(emu->port + A_IOCFG);
348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 }
350
09668b44
TI		 351 return 0;
352}
1da177e4 353
09668b44
TI		 354static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
355{
1da177e4
LT		 356 /*
357 * Enable the audio bit
358 */
359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360
361 /* Enable analog/digital outs on audigy */
190d2c46 362 if (emu->card_capabilities->emu_model) {
9f4bd5dd 363 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 364 } else if (emu->card_capabilities->i2c_adc) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 366 } else if (emu->audigy) {
1da177e4 367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
67679b1f 368
e0474e53 369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT		 370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
e0474e53 374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
1da177e4
LT		 375 /* Unmute Analog now. */
376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 } else {
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 }
381 }
67679b1f 382
1da177e4
LT		 383#if 0
384 {
385 unsigned int tmp;
386 /* FIXME: the following routine disables LiveDrive-II !! */
67679b1f 387 /* TOSLink detection */
1da177e4
LT		 388 emu->tos_link = 0;
389 tmp = inl(emu->port + HCFG);
390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 outl(tmp|0x800, emu->port + HCFG);
392 udelay(50);
393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 emu->tos_link = 1;
395 outl(tmp, emu->port + HCFG);
396 }
397 }
398 }
399#endif
400
401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
1da177e4
LT		 402}
403
67679b1f 404int snd_emu10k1_done(struct snd_emu10k1 *emu)
1da177e4
LT		 405{
406 int ch;
407
408 outl(0, emu->port + INTE);
409
410 /*
411 * Shutdown the chip
412 */
413 for (ch = 0; ch < NUM_G; ch++)
414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 for (ch = 0; ch < NUM_G; ch++) {
416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
420 }
421
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 if (emu->audigy)
433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 else
435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442
1da177e4
LT		 443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
446
1da177e4
LT		 447 return 0;
448}
449
450/*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
453
454/* In A1 Silicon, these bits are in the HC register */
455#define HOOKN_BIT (1L << 12)
456#define HANDN_BIT (1L << 11)
457#define PULSEN_BIT (1L << 10)
458
459#define EC_GDI1 (1 << 13)
460#define EC_GDI0 (1 << 14)
461
462#define EC_NUM_CONTROL_BITS 20
463
464#define EC_AC3_DATA_SELN 0x0001L
465#define EC_EE_DATA_SEL 0x0002L
466#define EC_EE_CNTRL_SELN 0x0004L
467#define EC_EECLK 0x0008L
468#define EC_EECS 0x0010L
469#define EC_EESDO 0x0020L
470#define EC_TRIM_CSN 0x0040L
471#define EC_TRIM_SCLK 0x0080L
472#define EC_TRIM_SDATA 0x0100L
473#define EC_TRIM_MUTEN 0x0200L
474#define EC_ADCCAL 0x0400L
475#define EC_ADCRSTN 0x0800L
476#define EC_DACCAL 0x1000L
477#define EC_DACMUTEN 0x2000L
478#define EC_LEDN 0x4000L
479
480#define EC_SPDIF0_SEL_SHIFT 15
481#define EC_SPDIF1_SEL_SHIFT 17
482#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
489
490#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491
492/* Addresses for special values stored in to EEPROM */
493#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496
497#define EC_LAST_PROMFILE_ADDR 0x2f
498
67679b1f 499#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
1da177e4
LT		 500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
505
506
67679b1f
VM		 507/* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
1da177e4
LT		 509 * offset problem. Weird.
510 */
511#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
512 EC_TRIM_CSN)
513
514
515#define EC_DEFAULT_ADC_GAIN 0xC4C4
516#define EC_DEFAULT_SPDIF0_SEL 0x0
517#define EC_DEFAULT_SPDIF1_SEL 0x4
518
519/**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
524 * register.
525 */
526
67679b1f 527static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
1da177e4
LT		 528{
529 unsigned short count;
530 unsigned int data;
531 unsigned long hc_port;
532 unsigned int hc_value;
533
534 hc_port = emu->port + HCFG;
535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 outl(hc_value, hc_port);
537
538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539
540 /* Set up the value */
541 data = ((value & 0x1) ? PULSEN_BIT : 0);
542 value >>= 1;
543
544 outl(hc_value | data, hc_port);
545
546 /* Clock the shift register */
547 outl(hc_value | data | HANDN_BIT, hc_port);
548 outl(hc_value | data, hc_port);
549 }
550
551 /* Latch the bits */
552 outl(hc_value | HOOKN_BIT, hc_port);
553 outl(hc_value, hc_port);
554}
555
556/**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
562 * channel.
563 */
564
67679b1f 565static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
1da177e4
LT		 566 unsigned short gain)
567{
568 unsigned int bit;
569
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575
576 for (bit = (1 << 15); bit; bit >>= 1) {
577 unsigned int value;
67679b1f 578
1da177e4
LT		 579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
580
581 if (gain & bit)
582 value |= EC_TRIM_SDATA;
583
584 /* Clock the bit */
585 snd_emu10k1_ecard_write(emu, value);
586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 snd_emu10k1_ecard_write(emu, value);
588 }
589
590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
591}
592
67679b1f 593static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
1da177e4
LT		 594{
595 unsigned int hc_value;
596
597 /* Set up the initial settings */
598 emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601
67679b1f 602 /* Step 0: Set the codec type in the hardware control register
1da177e4
LT		 603 * and enable audio output */
604 hc_value = inl(emu->port + HCFG);
605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 inl(emu->port + HCFG);
607
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
616 * way. */
617 snd_emu10k1_wait(emu, 48000);
618
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
629
630 return 0;
631}
632
67679b1f 633static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
d83c671f
JCD		 634{
635 unsigned long special_port;
636 unsigned int value;
637
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
640 */
641 special_port = emu->port + 0x38;
642 value = inl(special_port);
643 outl(0x00d00000, special_port);
644 value = inl(special_port);
645 outl(0x00d00001, special_port);
646 value = inl(special_port);
647 outl(0x00d0005f, special_port);
648 value = inl(special_port);
649 outl(0x00d0007f, special_port);
650 value = inl(special_port);
651 outl(0x0090007f, special_port);
652 value = inl(special_port);
653
e2b15f8f 654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
c94fa4c9
JCD		 655 /* Delay to give time for ADC chip to switch on. It needs 113ms */
656 msleep(200);
d83c671f
JCD		 657 return 0;
658}
659
67679b1f 660static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename)
19b99fba 661{
9f4bd5dd
JCD		 662 int err;
663 int n, i;
664 int reg;
665 int value;
190d2c46
JCD		 666 unsigned int write_post;
667 unsigned long flags;
9f4bd5dd
JCD		 668 const struct firmware *fw_entry;
669
67679b1f
VM		 670 err = request_firmware(&fw_entry, filename, &emu->pci->dev);
671 if (err != 0) {
672 snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err);
9f4bd5dd
JCD		 673 return err;
674 }
67679b1f 675 snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size);
19b99fba 676
9f4bd5dd
JCD		 677 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
678 /* GPIO7 -> FPGA PGMN
679 * GPIO6 -> FPGA CCLK
680 * GPIO5 -> FPGA DIN
681 * FPGA CONFIG OFF -> FPGA PGMN
682 */
190d2c46 683 spin_lock_irqsave(&emu->emu_lock, flags);
9f4bd5dd 684 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
190d2c46
JCD		 685 write_post = inl(emu->port + A_IOCFG);
686 udelay(100);
9f4bd5dd 687 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
190d2c46 688 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 689 udelay(100); /* Allow FPGA memory to clean */
67679b1f
VM		 690 for (n = 0; n < fw_entry->size; n++) {
691 value = fw_entry->data[n];
692 for (i = 0; i < 8; i++) {
9f4bd5dd
JCD		 693 reg = 0x80;
694 if (value & 0x1)
695 reg = reg | 0x20;
67679b1f 696 value = value >> 1;
9f4bd5dd 697 outl(reg, emu->port + A_IOCFG);
190d2c46 698 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 699 outl(reg | 0x40, emu->port + A_IOCFG);
190d2c46 700 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd
JCD		 701 }
702 }
703 /* After programming, set GPIO bit 4 high again. */
704 outl(0x10, emu->port + A_IOCFG);
190d2c46
JCD		 705 write_post = inl(emu->port + A_IOCFG);
706 spin_unlock_irqrestore(&emu->emu_lock, flags);
19b99fba 707
67679b1f 708 release_firmware(fw_entry);
19b99fba
JCD		 709 return 0;
710}
711
bd3d1c20
TI		 712static int emu1010_firmware_thread(void *data)
713{
67679b1f 714 struct snd_emu10k1 *emu = data;
730d45f9 715 u32 tmp, tmp2, reg;
42f53226
JCD		 716 int err;
717
718 for (;;) {
719 /* Delay to allow Audio Dock to settle */
190d2c46 720 msleep_interruptible(1000);
42f53226
JCD		 721 if (kthread_should_stop())
722 break;
67679b1f
VM		 723 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
724 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
42f53226
JCD		 725 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
726 /* Audio Dock attached */
727 /* Return to Audio Dock programming mode */
728 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
67679b1f 729 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
3839e4f1
TI		 730 if (emu->card_capabilities->emu_model ==
731 EMU_MODEL_EMU1010) {
67679b1f
VM		 732 err = snd_emu1010_load_firmware(emu, DOCK_FILENAME);
733 if (err != 0)
190d2c46 734 continue;
3839e4f1
TI		 735 } else if (emu->card_capabilities->emu_model ==
736 EMU_MODEL_EMU1010B) {
67679b1f
VM		 737 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
738 if (err != 0)
190d2c46 739 continue;
3839e4f1
TI		 740 } else if (emu->card_capabilities->emu_model ==
741 EMU_MODEL_EMU1616) {
67679b1f
VM		 742 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
743 if (err != 0)
190d2c46 744 continue;
42f53226
JCD		 745 }
746
67679b1f
VM		 747 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
748 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
749 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
42f53226 750 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
67679b1f
VM		 751 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
752 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
42f53226
JCD		 753 if ((reg & 0x1f) != 0x15) {
754 /* FPGA failed to be programmed */
67679b1f 755 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
190d2c46 756 continue;
42f53226
JCD		 757 }
758 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
67679b1f
VM		 759 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
760 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
730d45f9 761 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
28a97c19 762 tmp, tmp2);
c93d1c25
JCD		 763 /* Sync clocking between 1010 and Dock */
764 /* Allow DLL to settle */
765 msleep(10);
766 /* Unmute all. Default is muted after a firmware load */
67679b1f 767 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
42f53226
JCD		 768 }
769 }
190d2c46 770 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
42f53226
JCD		 771 return 0;
772}
773
13d45709
PH		 774/*
775 * EMU-1010 - details found out from this driver, official MS Win drivers,
776 * testing the card:
777 *
778 * Audigy2 (aka Alice2):
779 * ---------------------
780 * * communication over PCI
781 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
782 * to 2 x 16-bit, using internal DSP instructions
783 * * slave mode, clock supplied by HANA
784 * * linked to HANA using:
785 * 32 x 32-bit serial EMU32 output channels
786 * 16 x EMU32 input channels
787 * (?) x I2S I/O channels (?)
788 *
789 * FPGA (aka HANA):
790 * ---------------
791 * * provides all (?) physical inputs and outputs of the card
792 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
793 * * provides clock signal for the card and Alice2
794 * * two crystals - for 44.1kHz and 48kHz multiples
795 * * provides internal routing of signal sources to signal destinations
796 * * inputs/outputs to Alice2 - see above
797 *
798 * Current status of the driver:
799 * ----------------------------
800 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
801 * * PCM device nb. 2:
802 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
803 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
804 */
67679b1f 805static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
19b99fba
JCD		 806{
807 unsigned int i;
730d45f9 808 u32 tmp, tmp2, reg;
9f4bd5dd 809 int err;
190d2c46 810 const char *filename = NULL;
9f4bd5dd
JCD		 811
812 snd_printk(KERN_INFO "emu1010: Special config.\n");
813 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
814 * Lock Sound Memory Cache, Lock Tank Memory Cache,
815 * Mute all codecs.
816 */
19b99fba 817 outl(0x0005a00c, emu->port + HCFG);
9f4bd5dd
JCD		 818 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
819 * Lock Tank Memory Cache,
820 * Mute all codecs.
821 */
67679b1f 822 outl(0x0005a004, emu->port + HCFG);
9f4bd5dd
JCD		 823 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
824 * Mute all codecs.
825 */
19b99fba 826 outl(0x0005a000, emu->port + HCFG);
9f4bd5dd
JCD		 827 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
828 * Mute all codecs.
829 */
19b99fba
JCD		 830 outl(0x0005a000, emu->port + HCFG);
831
9f4bd5dd 832 /* Disable 48Volt power to Audio Dock */
67679b1f 833 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
9f4bd5dd
JCD		 834
835 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
67679b1f
VM		 836 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
837 snd_printdd("reg1 = 0x%x\n", reg);
d9e8a552 838 if ((reg & 0x3f) == 0x15) {
9f4bd5dd
JCD		 839 /* FPGA netlist already present so clear it */
840 /* Return to programming mode */
841
67679b1f 842 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
19b99fba 843 }
67679b1f
VM		 844 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
845 snd_printdd("reg2 = 0x%x\n", reg);
d9e8a552 846 if ((reg & 0x3f) == 0x15) {
9f4bd5dd 847 /* FPGA failed to return to programming mode */
d9e8a552 848 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
9f4bd5dd 849 return -ENODEV;
19b99fba 850 }
67679b1f 851 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
190d2c46 852 switch (emu->card_capabilities->emu_model) {
3839e4f1 853 case EMU_MODEL_EMU1010:
190d2c46
JCD		 854 filename = HANA_FILENAME;
855 break;
3839e4f1 856 case EMU_MODEL_EMU1010B:
190d2c46
JCD		 857 filename = EMU1010B_FILENAME;
858 break;
3839e4f1 859 case EMU_MODEL_EMU1616:
190d2c46
JCD		 860 filename = EMU1010_NOTEBOOK_FILENAME;
861 break;
3839e4f1 862 case EMU_MODEL_EMU0404:
190d2c46
JCD		 863 filename = EMU0404_FILENAME;
864 break;
865 default:
866 filename = NULL;
867 return -ENODEV;
868 break;
869 }
870 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
871 err = snd_emu1010_load_firmware(emu, filename);
872 if (err != 0) {
873 snd_printk(
874 KERN_INFO "emu1010: Loading Firmware file %s failed\n",
875 filename);
876 return err;
19b99fba 877 }
9f4bd5dd
JCD		 878
879 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
67679b1f 880 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
d9e8a552 881 if ((reg & 0x3f) != 0x15) {
9f4bd5dd 882 /* FPGA failed to be programmed */
67679b1f 883 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
9f4bd5dd 884 return -ENODEV;
19b99fba 885 }
19b99fba 886
9f4bd5dd 887 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
67679b1f
VM		 888 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
889 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
730d45f9 890 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
9f4bd5dd 891 /* Enable 48Volt power to Audio Dock */
67679b1f 892 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
9f4bd5dd 893
67679b1f
VM		 894 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
895 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
896 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
897 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
898 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
edec7bbb 899 /* Optical -> ADAT I/O */
f93abe51
JCD		 900 /* 0 : SPDIF
901 * 1 : ADAT
902 */
903 emu->emu1010.optical_in = 1; /* IN_ADAT */
904 emu->emu1010.optical_out = 1; /* IN_ADAT */
905 tmp = 0;
906 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
907 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
67679b1f
VM		 908 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
909 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
9f4bd5dd 910 /* Set no attenuation on Audio Dock pads. */
67679b1f 911 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
9148cc50 912 emu->emu1010.adc_pads = 0x00;
67679b1f 913 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
9f4bd5dd 914 /* Unmute Audio dock DACs, Headphone source DAC-4. */
67679b1f
VM		 915 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
916 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
917 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
9148cc50 918 /* DAC PADs. */
67679b1f 919 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
9148cc50 920 emu->emu1010.dac_pads = 0x0f;
67679b1f
VM		 921 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
922 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
923 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
9f4bd5dd 924 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
67679b1f 925 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
9f4bd5dd 926 /* MIDI routing */
67679b1f 927 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
9f4bd5dd 928 /* Unknown. */
67679b1f 929 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
fb9b5a0e 930 /* IRQ Enable: All on */
67679b1f 931 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
9f4bd5dd 932 /* IRQ Enable: All off */
67679b1f 933 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
9f4bd5dd 934
67679b1f
VM		 935 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
936 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
9f4bd5dd 937 /* Default WCLK set to 48kHz. */
67679b1f 938 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
9f4bd5dd 939 /* Word Clock source, Internal 48kHz x1 */
67679b1f
VM		 940 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
941 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
9f4bd5dd 942 /* Audio Dock LEDs. */
67679b1f 943 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
19b99fba 944
9f4bd5dd
JCD		 945#if 0
946 /* For 96kHz */
947 snd_emu1010_fpga_link_dst_src_write(emu,
948 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
949 snd_emu1010_fpga_link_dst_src_write(emu,
950 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
951 snd_emu1010_fpga_link_dst_src_write(emu,
952 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
953 snd_emu1010_fpga_link_dst_src_write(emu,
954 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
955#endif
956#if 0
957 /* For 192kHz */
958 snd_emu1010_fpga_link_dst_src_write(emu,
959 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
960 snd_emu1010_fpga_link_dst_src_write(emu,
961 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
962 snd_emu1010_fpga_link_dst_src_write(emu,
963 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
964 snd_emu1010_fpga_link_dst_src_write(emu,
965 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
966 snd_emu1010_fpga_link_dst_src_write(emu,
967 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
968 snd_emu1010_fpga_link_dst_src_write(emu,
969 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
970 snd_emu1010_fpga_link_dst_src_write(emu,
971 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
972 snd_emu1010_fpga_link_dst_src_write(emu,
973 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
974#endif
975#if 1
976 /* For 48kHz */
977 snd_emu1010_fpga_link_dst_src_write(emu,
978 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
979 snd_emu1010_fpga_link_dst_src_write(emu,
980 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
981 snd_emu1010_fpga_link_dst_src_write(emu,
982 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
983 snd_emu1010_fpga_link_dst_src_write(emu,
984 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
985 snd_emu1010_fpga_link_dst_src_write(emu,
986 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
987 snd_emu1010_fpga_link_dst_src_write(emu,
988 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
989 snd_emu1010_fpga_link_dst_src_write(emu,
990 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
991 snd_emu1010_fpga_link_dst_src_write(emu,
992 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
13d45709
PH		 993 /* Pavel Hofman - setting defaults for 8 more capture channels
994 * Defaults only, users will set their own values anyways, let's
995 * just copy/paste.
996 */
67679b1f 997
13d45709
PH		 998 snd_emu1010_fpga_link_dst_src_write(emu,
999 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1000 snd_emu1010_fpga_link_dst_src_write(emu,
1001 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1008 snd_emu1010_fpga_link_dst_src_write(emu,
1009 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1010 snd_emu1010_fpga_link_dst_src_write(emu,
1011 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1012 snd_emu1010_fpga_link_dst_src_write(emu,
1013 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
9f4bd5dd
JCD		 1014#endif
1015#if 0
1016 /* Original */
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1027 snd_emu1010_fpga_link_dst_src_write(emu,
1028 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1031 snd_emu1010_fpga_link_dst_src_write(emu,
1032 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1033 snd_emu1010_fpga_link_dst_src_write(emu,
1034 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1035 snd_emu1010_fpga_link_dst_src_write(emu,
1036 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1037 snd_emu1010_fpga_link_dst_src_write(emu,
1038 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1039 snd_emu1010_fpga_link_dst_src_write(emu,
1040 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1041#endif
67679b1f
VM		 1042 for (i = 0; i < 0x20; i++) {
1043 /* AudioDock Elink <- Silence */
1044 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
9f4bd5dd 1045 }
67679b1f 1046 for (i = 0; i < 4; i++) {
9f4bd5dd 1047 /* Hana SPDIF Out <- Silence */
67679b1f 1048 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
9f4bd5dd 1049 }
67679b1f 1050 for (i = 0; i < 7; i++) {
9f4bd5dd 1051 /* Hamoa DAC <- Silence */
67679b1f 1052 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
9f4bd5dd 1053 }
67679b1f 1054 for (i = 0; i < 7; i++) {
9f4bd5dd
JCD		 1055 /* Hana ADAT Out <- Silence */
1056 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1057 }
1058 snd_emu1010_fpga_link_dst_src_write(emu,
1059 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1060 snd_emu1010_fpga_link_dst_src_write(emu,
1061 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1062 snd_emu1010_fpga_link_dst_src_write(emu,
1063 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1064 snd_emu1010_fpga_link_dst_src_write(emu,
1065 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1066 snd_emu1010_fpga_link_dst_src_write(emu,
1067 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1068 snd_emu1010_fpga_link_dst_src_write(emu,
1069 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
67679b1f
VM		 1070 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1071
1072 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
9f4bd5dd 1073
9f4bd5dd
JCD		 1074 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1075 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1076 * Mute all codecs.
1077 */
67679b1f 1078 outl(0x0000a000, emu->port + HCFG);
9f4bd5dd
JCD		 1079 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1080 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1081 * Un-Mute all codecs.
1082 */
19b99fba 1083 outl(0x0000a001, emu->port + HCFG);
67679b1f 1084
19b99fba
JCD		 1085 /* Initial boot complete. Now patches */
1086
67679b1f
VM		 1087 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1088 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1089 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1090 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1091 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1092 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1093 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
9f4bd5dd 1094
42f53226 1095 /* Start Micro/Audio Dock firmware loader thread */
bd3d1c20
TI		 1096 if (!emu->emu1010.firmware_thread) {
1097 emu->emu1010.firmware_thread =
1098 kthread_create(emu1010_firmware_thread, emu,
1099 "emu1010_firmware");
1100 wake_up_process(emu->emu1010.firmware_thread);
1101 }
3663d845 1102
9f4bd5dd
JCD		 1103#if 0
1104 snd_emu1010_fpga_link_dst_src_write(emu,
1105 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1106 snd_emu1010_fpga_link_dst_src_write(emu,
1107 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1110 snd_emu1010_fpga_link_dst_src_write(emu,
1111 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1112#endif
1113 /* Default outputs */
3839e4f1 1114 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1c02e366
CF		 1115 /* 1616(M) cardbus default outputs */
1116 /* ALICE2 bus 0xa0 */
1117 snd_emu1010_fpga_link_dst_src_write(emu,
1118 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1119 emu->emu1010.output_source[0] = 17;
1120 snd_emu1010_fpga_link_dst_src_write(emu,
1121 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1122 emu->emu1010.output_source[1] = 18;
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1125 emu->emu1010.output_source[2] = 19;
1126 snd_emu1010_fpga_link_dst_src_write(emu,
1127 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1128 emu->emu1010.output_source[3] = 20;
1129 snd_emu1010_fpga_link_dst_src_write(emu,
1130 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1131 emu->emu1010.output_source[4] = 21;
1132 snd_emu1010_fpga_link_dst_src_write(emu,
1133 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1134 emu->emu1010.output_source[5] = 22;
1135 /* ALICE2 bus 0xa0 */
1136 snd_emu1010_fpga_link_dst_src_write(emu,
1137 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1138 emu->emu1010.output_source[16] = 17;
1139 snd_emu1010_fpga_link_dst_src_write(emu,
1140 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1141 emu->emu1010.output_source[17] = 18;
1142 } else {
1143 /* ALICE2 bus 0xa0 */
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1146 emu->emu1010.output_source[0] = 21;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1149 emu->emu1010.output_source[1] = 22;
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1152 emu->emu1010.output_source[2] = 23;
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1155 emu->emu1010.output_source[3] = 24;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1158 emu->emu1010.output_source[4] = 25;
1159 snd_emu1010_fpga_link_dst_src_write(emu,
1160 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1161 emu->emu1010.output_source[5] = 26;
1162 snd_emu1010_fpga_link_dst_src_write(emu,
1163 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1164 emu->emu1010.output_source[6] = 27;
1165 snd_emu1010_fpga_link_dst_src_write(emu,
1166 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1167 emu->emu1010.output_source[7] = 28;
1168 /* ALICE2 bus 0xa0 */
1169 snd_emu1010_fpga_link_dst_src_write(emu,
1170 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1171 emu->emu1010.output_source[8] = 21;
1172 snd_emu1010_fpga_link_dst_src_write(emu,
1173 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1174 emu->emu1010.output_source[9] = 22;
1175 /* ALICE2 bus 0xa0 */
1176 snd_emu1010_fpga_link_dst_src_write(emu,
1177 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1178 emu->emu1010.output_source[10] = 21;
1179 snd_emu1010_fpga_link_dst_src_write(emu,
1180 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1181 emu->emu1010.output_source[11] = 22;
1182 /* ALICE2 bus 0xa0 */
1183 snd_emu1010_fpga_link_dst_src_write(emu,
1184 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1185 emu->emu1010.output_source[12] = 21;
1186 snd_emu1010_fpga_link_dst_src_write(emu,
1187 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1188 emu->emu1010.output_source[13] = 22;
1189 /* ALICE2 bus 0xa0 */
1190 snd_emu1010_fpga_link_dst_src_write(emu,
1191 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1192 emu->emu1010.output_source[14] = 21;
1193 snd_emu1010_fpga_link_dst_src_write(emu,
1194 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1195 emu->emu1010.output_source[15] = 22;
1196 /* ALICE2 bus 0xa0 */
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1199 emu->emu1010.output_source[16] = 21;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1202 emu->emu1010.output_source[17] = 22;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1205 emu->emu1010.output_source[18] = 23;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1208 emu->emu1010.output_source[19] = 24;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1211 emu->emu1010.output_source[20] = 25;
1212 snd_emu1010_fpga_link_dst_src_write(emu,
1213 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1214 emu->emu1010.output_source[21] = 26;
1215 snd_emu1010_fpga_link_dst_src_write(emu,
1216 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1217 emu->emu1010.output_source[22] = 27;
1218 snd_emu1010_fpga_link_dst_src_write(emu,
1219 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1220 emu->emu1010.output_source[23] = 28;
1221 }
9f4bd5dd 1222 /* TEMP: Select SPDIF in/out */
67679b1f 1223 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
9f4bd5dd
JCD		 1224
1225 /* TEMP: Select 48kHz SPDIF out */
1226 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1227 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1228 /* Word Clock source, Internal 48kHz x1 */
67679b1f
VM		 1229 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1230 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
b0dbdaea 1231 emu->emu1010.internal_clock = 1; /* 48000 */
67679b1f 1232 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
9f4bd5dd 1233 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
67679b1f
VM		 1234 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1235 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1236 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
19b99fba
JCD		 1237
1238 return 0;
1239}
1da177e4
LT		 1240/*
1241 * Create the EMU10K1 instance
1242 */
1243
c7561cd8 1244#ifdef CONFIG_PM_SLEEP
09668b44
TI		 1245static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1246static void free_pm_buffer(struct snd_emu10k1 *emu);
1247#endif
1248
eb4698f3 1249static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1da177e4
LT		 1250{
1251 if (emu->port) { /* avoid access to already used hardware */
67679b1f 1252 snd_emu10k1_fx8010_tram_setup(emu, 0);
1da177e4 1253 snd_emu10k1_done(emu);
09668b44 1254 snd_emu10k1_free_efx(emu);
67679b1f 1255 }
3839e4f1 1256 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
9f4bd5dd 1257 /* Disable 48Volt power to Audio Dock */
67679b1f 1258 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
9f4bd5dd 1259 }
bd3d1c20 1260 if (emu->emu1010.firmware_thread)
190d2c46 1261 kthread_stop(emu->emu1010.firmware_thread);
ebf029da
TI		 1262 if (emu->irq >= 0)
1263 free_irq(emu->irq, emu);
1264 /* remove reserved page */
1265 if (emu->reserved_page) {
1266 snd_emu10k1_synth_free(emu,
1267 (struct snd_util_memblk *)emu->reserved_page);
1268 emu->reserved_page = NULL;
1269 }
1da177e4
LT		 1270 if (emu->memhdr)
1271 snd_util_memhdr_free(emu->memhdr);
1272 if (emu->silent_page.area)
1273 snd_dma_free_pages(&emu->silent_page);
1274 if (emu->ptb_pages.area)
1275 snd_dma_free_pages(&emu->ptb_pages);
1276 vfree(emu->page_ptr_table);
1277 vfree(emu->page_addr_table);
c7561cd8 1278#ifdef CONFIG_PM_SLEEP
09668b44
TI		 1279 free_pm_buffer(emu);
1280#endif
1da177e4
LT		 1281 if (emu->port)
1282 pci_release_regions(emu->pci);
67679b1f 1283 if (emu->card_capabilities->ca0151_chip) /* P16V */
1da177e4 1284 snd_p16v_free(emu);
09668b44 1285 pci_disable_device(emu->pci);
1da177e4
LT		 1286 kfree(emu);
1287 return 0;
1288}
1289
eb4698f3 1290static int snd_emu10k1_dev_free(struct snd_device *device)
1da177e4 1291{
eb4698f3 1292 struct snd_emu10k1 *emu = device->device_data;
1da177e4
LT		 1293 return snd_emu10k1_free(emu);
1294}
1295
eb4698f3 1296static struct snd_emu_chip_details emu_chip_details[] = {
21fdddea
JCD		 1297 /* Audigy4 (Not PRO) SB0610 */
1298 /* Tested by James@superbug.co.uk 4th April 2006 */
1299 /* A_IOCFG bits
1300 * Output
1301 * 0: ?
1302 * 1: ?
1303 * 2: ?
1304 * 3: 0 - Digital Out, 1 - Line in
1305 * 4: ?
1306 * 5: ?
1307 * 6: ?
1308 * 7: ?
1309 * Input
1310 * 8: ?
1311 * 9: ?
1312 * A: Green jack sense (Front)
1313 * B: ?
1314 * C: Black jack sense (Rear/Side Right)
1315 * D: Yellow jack sense (Center/LFE/Side Left)
1316 * E: ?
1317 * F: ?
1318 *
1319 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1320 * 0 - Digital Out
1321 * 1 - Line in
1322 */
1323 /* Mic input not tested.
1324 * Analog CD input not tested
1325 * Digital Out not tested.
1326 * Line in working.
1327 * Audio output 5.1 working. Side outputs not working.
1328 */
1329 /* DSP: CA10300-IAT LF
1330 * DAC: Cirrus Logic CS4382-KQZ
1331 * ADC: Philips 1361T
1332 * AC97: Sigmatel STAC9750
1333 * CA0151: None
1334 */
1335 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
18c71092 1336 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
21fdddea
JCD		 1337 .id = "Audigy2",
1338 .emu10k2_chip = 1,
1339 .ca0108_chip = 1,
1340 .spk71 = 1,
1341 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1342 .ac97_chip = 1} ,
18c71092
VM		 1343 /* Audigy 2 Value AC3 out does not work yet.
1344 * Need to find out how to turn off interpolators.
1345 */
1346 /* Tested by James@superbug.co.uk 3rd July 2005 */
1347 /* DSP: CA0108-IAT
1348 * DAC: CS4382-KQ
1349 * ADC: Philips 1361T
1350 * AC97: STAC9750
1351 * CA0151: None
1352 */
1353 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1354 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1355 .id = "Audigy2",
1356 .emu10k2_chip = 1,
1357 .ca0108_chip = 1,
1358 .spk71 = 1,
1359 .ac97_chip = 1} ,
d83c671f 1360 /* Audigy 2 ZS Notebook Cardbus card.*/
184c1e2c 1361 /* Tested by James@superbug.co.uk 6th November 2006 */
f951fd3c
JCD		 1362 /* Audio output 7.1/Headphones working.
1363 * Digital output working. (AC3 not checked, only PCM)
184c1e2c
JCD		 1364 * Audio Mic/Line inputs working.
1365 * Digital input not tested.
18c71092 1366 */
21fdddea 1367 /* DSP: Tina2
f951fd3c
JCD		 1368 * DAC: Wolfson WM8768/WM8568
1369 * ADC: Wolfson WM8775
1370 * AC97: None
1371 * CA0151: None
1372 */
184c1e2c
JCD		 1373 /* Tested by James@superbug.co.uk 4th April 2006 */
1374 /* A_IOCFG bits
1375 * Output
1376 * 0: Not Used
1377 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1378 * 2: Analog input 0 = line in, 1 = mic in
1379 * 3: Not Used
1380 * 4: Digital output 0 = off, 1 = on.
1381 * 5: Not Used
1382 * 6: Not Used
1383 * 7: Not Used
1384 * Input
1385 * All bits 1 (0x3fxx) means nothing plugged in.
1386 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1387 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1388 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1389 * E-F: Always 0
1390 *
1391 */
d83c671f 1392 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
18c71092 1393 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
d83c671f
JCD		 1394 .id = "Audigy2",
1395 .emu10k2_chip = 1,
1396 .ca0108_chip = 1,
1397 .ca_cardbus_chip = 1,
27fe864e 1398 .spi_dac = 1,
184c1e2c 1399 .i2c_adc = 1,
d83c671f 1400 .spk71 = 1} ,
190d2c46 1401 /* Tested by James@superbug.co.uk 4th Nov 2007. */
82c8c741 1402 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
18c71092 1403 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
82c8c741
JCD		 1404 .id = "EMU1010",
1405 .emu10k2_chip = 1,
1406 .ca0108_chip = 1,
1407 .ca_cardbus_chip = 1,
d9e8a552 1408 .spk71 = 1 ,
3839e4f1 1409 .emu_model = EMU_MODEL_EMU1616},
190d2c46 1410 /* Tested by James@superbug.co.uk 4th Nov 2007. */
18c71092 1411 /* This is MAEM8960, 0202 is MAEM 8980 */
3663d845 1412 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
18c71092 1413 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
3663d845
JCD		 1414 .id = "EMU1010",
1415 .emu10k2_chip = 1,
1416 .ca0108_chip = 1,
190d2c46 1417 .spk71 = 1,
18c71092 1418 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
190d2c46 1419 /* Tested by James@superbug.co.uk 8th July 2005. */
18c71092 1420 /* This is MAEM8810, 0202 is MAEM8820 */
190d2c46 1421 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
18c71092 1422 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
190d2c46
JCD		 1423 .id = "EMU1010",
1424 .emu10k2_chip = 1,
1425 .ca0102_chip = 1,
1426 .spk71 = 1,
18c71092 1427 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
493b4acb
VMV		 1428 /* EMU0404b */
1429 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
18c71092 1430 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
493b4acb
VMV		 1431 .id = "EMU0404",
1432 .emu10k2_chip = 1,
1433 .ca0108_chip = 1,
1434 .spk71 = 1,
18c71092 1435 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
493b4acb
VMV		 1436 /* Tested by James@superbug.co.uk 20-3-2007. */
1437 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
18c71092 1438 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
493b4acb
VMV		 1439 .id = "EMU0404",
1440 .emu10k2_chip = 1,
1441 .ca0102_chip = 1,
1442 .spk71 = 1,
1443 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
ac5d4b40
FZ		 1444 /* EMU0404 PCIe */
1445 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1446 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1447 .id = "EMU0404",
1448 .emu10k2_chip = 1,
1449 .ca0108_chip = 1,
1450 .spk71 = 1,
1451 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
718a2594 1452 /* Note that all E-mu cards require kernel 2.6 or newer. */
18c71092
VM		 1453 {.vendor = 0x1102, .device = 0x0008,
1454 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
aec72e0a 1455 .id = "Audigy2",
1da177e4 1456 .emu10k2_chip = 1,
2668907a
PZ		 1457 .ca0108_chip = 1,
1458 .ac97_chip = 1} ,
88dc0e5d 1459 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4 1460 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
18c71092 1461 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
aec72e0a 1462 .id = "Audigy2",
1da177e4
LT		 1463 .emu10k2_chip = 1,
1464 .ca0102_chip = 1,
1465 .ca0151_chip = 1,
1466 .spk71 = 1,
1467 .spdif_bug = 1,
1468 .ac97_chip = 1} ,
f6f8bb64 1469 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
5b0e4985
JCD		 1470 /* The 0x20061102 does have SB0350 written on it
1471 * Just like 0x20021102
1472 */
f6f8bb64 1473 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
18c71092 1474 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
f6f8bb64
LR		 1475 .id = "Audigy2",
1476 .emu10k2_chip = 1,
1477 .ca0102_chip = 1,
1478 .ca0151_chip = 1,
1479 .spk71 = 1,
1480 .spdif_bug = 1,
55e03a68 1481 .invert_shared_spdif = 1, /* digital/analog switch swapped */
f6f8bb64 1482 .ac97_chip = 1} ,
dcc2cf75
TY		 1483 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1484 Creative's Windows driver */
1485 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1486 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1487 .id = "Audigy2",
1488 .emu10k2_chip = 1,
1489 .ca0102_chip = 1,
1490 .ca0151_chip = 1,
1491 .spk71 = 1,
1492 .spdif_bug = 1,
1493 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1494 .ac97_chip = 1} ,
1da177e4 1495 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
18c71092 1496 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
aec72e0a 1497 .id = "Audigy2",
1da177e4
LT		 1498 .emu10k2_chip = 1,
1499 .ca0102_chip = 1,
1500 .ca0151_chip = 1,
1501 .spk71 = 1,
1502 .spdif_bug = 1,
55e03a68 1503 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1da177e4
LT		 1504 .ac97_chip = 1} ,
1505 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
18c71092 1506 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
aec72e0a 1507 .id = "Audigy2",
1da177e4
LT		 1508 .emu10k2_chip = 1,
1509 .ca0102_chip = 1,
1510 .ca0151_chip = 1,
1511 .spk71 = 1,
1512 .spdif_bug = 1,
55e03a68 1513 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1da177e4 1514 .ac97_chip = 1} ,
54efc96d
JCD		 1515 /* Audigy 2 */
1516 /* Tested by James@superbug.co.uk 3rd July 2005 */
1517 /* DSP: CA0102-IAT
1518 * DAC: CS4382-KQ
1519 * ADC: Philips 1361T
1520 * AC97: STAC9721
1521 * CA0151: Yes
1522 */
1da177e4 1523 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
18c71092 1524 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
aec72e0a 1525 .id = "Audigy2",
1da177e4
LT		 1526 .emu10k2_chip = 1,
1527 .ca0102_chip = 1,
1528 .ca0151_chip = 1,
1529 .spk71 = 1,
1530 .spdif_bug = 1,
11b3a755 1531 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1da177e4
LT		 1532 .ac97_chip = 1} ,
1533 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
18c71092 1534 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
aec72e0a 1535 .id = "Audigy2",
1da177e4
LT		 1536 .emu10k2_chip = 1,
1537 .ca0102_chip = 1,
1538 .ca0151_chip = 1,
2f020aa7 1539 .spk71 = 1,
1da177e4 1540 .spdif_bug = 1} ,
264f9577
JCD		 1541 /* Dell OEM/Creative Labs Audigy 2 ZS */
1542 /* See ALSA bug#1365 */
1543 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
18c71092 1544 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
264f9577
JCD		 1545 .id = "Audigy2",
1546 .emu10k2_chip = 1,
1547 .ca0102_chip = 1,
1548 .ca0151_chip = 1,
1549 .spk71 = 1,
1550 .spdif_bug = 1,
1f9da554 1551 .invert_shared_spdif = 1, /* digital/analog switch swapped */
264f9577 1552 .ac97_chip = 1} ,
1da177e4 1553 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
18c71092 1554 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
aec72e0a 1555 .id = "Audigy2",
1da177e4
LT		 1556 .emu10k2_chip = 1,
1557 .ca0102_chip = 1,
1558 .ca0151_chip = 1,
1559 .spk71 = 1,
1560 .spdif_bug = 1,
d2cd74b1 1561 .invert_shared_spdif = 1, /* digital/analog switch swapped */
3271b7b2 1562 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1da177e4 1563 .ac97_chip = 1} ,
bdaed502 1564 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
18c71092 1565 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
bdaed502
TI		 1566 .id = "Audigy2",
1567 .emu10k2_chip = 1,
1568 .ca0102_chip = 1,
1569 .ca0151_chip = 1,
1570 .spdif_bug = 1,
1571 .ac97_chip = 1} ,
ae3a72d8 1572 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
18c71092 1573 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
aec72e0a 1574 .id = "Audigy",
56f5ceed
JCD		 1575 .emu10k2_chip = 1,
1576 .ca0102_chip = 1,
2668907a 1577 .ac97_chip = 1} ,
ae3a72d8 1578 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
18c71092 1579 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
2668907a
PZ		 1580 .id = "Audigy",
1581 .emu10k2_chip = 1,
1582 .ca0102_chip = 1,
ae3a72d8 1583 .spdif_bug = 1,
2668907a 1584 .ac97_chip = 1} ,
a6c17ec8 1585 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
18c71092 1586 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
a6c17ec8
AP		 1587 .id = "Audigy",
1588 .emu10k2_chip = 1,
1589 .ca0102_chip = 1,
1590 .ac97_chip = 1} ,
1da177e4 1591 {.vendor = 0x1102, .device = 0x0004,
18c71092 1592 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
aec72e0a 1593 .id = "Audigy",
1da177e4
LT		 1594 .emu10k2_chip = 1,
1595 .ca0102_chip = 1,
2668907a 1596 .ac97_chip = 1} ,
18c71092
VM		 1597 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1598 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1599 .id = "Live",
1600 .emu10k1_chip = 1,
1601 .ac97_chip = 1,
1602 .sblive51 = 1} ,
1603 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1604 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
f7de9cfd
MM		 1605 .id = "Live",
1606 .emu10k1_chip = 1,
1607 .ac97_chip = 1,
1608 .sblive51 = 1} ,
18c71092
VM		 1609 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1610 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
aec72e0a 1611 .id = "Live",
1da177e4 1612 .emu10k1_chip = 1,
2b637da5
LR		 1613 .ac97_chip = 1,
1614 .sblive51 = 1} ,
a6f6192b 1615 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
18c71092 1616 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
2b6b22f3
JCD		 1617 .id = "Live",
1618 .emu10k1_chip = 1,
1619 .ac97_chip = 1,
1620 .sblive51 = 1} ,
0ba656d0 1621 /* Tested by ALSA bug#1680 26th December 2005 */
18c71092
VM		 1622 /* note: It really has SB0220 written on the card, */
1623 /* but it's SB0228 according to kx.inf */
0ba656d0 1624 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
18c71092 1625 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
0ba656d0
JCD		 1626 .id = "Live",
1627 .emu10k1_chip = 1,
1628 .ac97_chip = 1,
1629 .sblive51 = 1} ,
c6c0b841
LR		 1630 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1631 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
18c71092 1632 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
a8ee7295
GT		 1633 .id = "Live",
1634 .emu10k1_chip = 1,
1635 .ac97_chip = 1,
1636 .sblive51 = 1} ,
a6f6192b 1637 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
18c71092 1638 .driver = "EMU10K1", .name = "SB Live! 5.1",
2b6b22f3
JCD		 1639 .id = "Live",
1640 .emu10k1_chip = 1,
1641 .ac97_chip = 1,
1642 .sblive51 = 1} ,
afe0f1f6 1643 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
a6f6192b 1644 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
18c71092 1645 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
2b6b22f3
JCD		 1646 .id = "Live",
1647 .emu10k1_chip = 1,
f12aa40c
TI		 1648 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1649 * share the same IDs!
1650 */
2b6b22f3 1651 .sblive51 = 1} ,
a6f6192b 1652 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
18c71092 1653 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
2b6b22f3
JCD		 1654 .id = "Live",
1655 .emu10k1_chip = 1,
1656 .ac97_chip = 1,
1657 .sblive51 = 1} ,
a6f6192b 1658 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
18c71092 1659 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
a6f6192b
JCD		 1660 .id = "Live",
1661 .emu10k1_chip = 1,
1662 .ac97_chip = 1} ,
1663 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
18c71092 1664 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
2b6b22f3
JCD		 1665 .id = "Live",
1666 .emu10k1_chip = 1,
1667 .ac97_chip = 1,
1668 .sblive51 = 1} ,
1669 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
18c71092 1670 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
2b6b22f3
JCD		 1671 .id = "Live",
1672 .emu10k1_chip = 1,
1673 .ac97_chip = 1,
1674 .sblive51 = 1} ,
a6f6192b 1675 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
18c71092 1676 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
aec72e0a 1677 .id = "Live",
2b637da5
LR		 1678 .emu10k1_chip = 1,
1679 .ac97_chip = 1,
1680 .sblive51 = 1} ,
88dc0e5d 1681 /* Tested by James@superbug.co.uk 3rd July 2005 */
a6f6192b 1682 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
18c71092 1683 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
2b6b22f3
JCD		 1684 .id = "Live",
1685 .emu10k1_chip = 1,
1686 .ac97_chip = 1,
1687 .sblive51 = 1} ,
a6f6192b 1688 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
18c71092 1689 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
2b6b22f3
JCD		 1690 .id = "Live",
1691 .emu10k1_chip = 1,
1692 .ac97_chip = 1,
1693 .sblive51 = 1} ,
a6f6192b 1694 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
18c71092 1695 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
2b6b22f3
JCD		 1696 .id = "Live",
1697 .emu10k1_chip = 1,
1698 .ac97_chip = 1,
1699 .sblive51 = 1} ,
a6f6192b 1700 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
18c71092 1701 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
2b6b22f3
JCD		 1702 .id = "Live",
1703 .emu10k1_chip = 1,
1704 .ac97_chip = 1,
1705 .sblive51 = 1} ,
a6f6192b 1706 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
18c71092 1707 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
a6f6192b 1708 .id = "APS",
2b6b22f3 1709 .emu10k1_chip = 1,
a6f6192b
JCD		 1710 .ecard = 1} ,
1711 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
18c71092 1712 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
2b6b22f3
JCD		 1713 .id = "Live",
1714 .emu10k1_chip = 1,
1715 .ac97_chip = 1,
1716 .sblive51 = 1} ,
a6f6192b 1717 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
18c71092 1718 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
2b6b22f3
JCD		 1719 .id = "Live",
1720 .emu10k1_chip = 1,
1721 .ac97_chip = 1,
1722 .sblive51 = 1} ,
1da177e4 1723 {.vendor = 0x1102, .device = 0x0002,
18c71092 1724 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
aec72e0a 1725 .id = "Live",
1da177e4 1726 .emu10k1_chip = 1,
2b637da5
LR		 1727 .ac97_chip = 1,
1728 .sblive51 = 1} ,
1da177e4
LT		 1729 { } /* terminator */
1730};
1731
eb4698f3 1732int __devinit snd_emu10k1_create(struct snd_card *card,
67679b1f 1733 struct pci_dev *pci,
1da177e4
LT		 1734 unsigned short extin_mask,
1735 unsigned short extout_mask,
1736 long max_cache_bytes,
1737 int enable_ir,
e66bc8b2 1738 uint subsystem,
67679b1f 1739 struct snd_emu10k1 **remu)
1da177e4 1740{
eb4698f3 1741 struct snd_emu10k1 *emu;
09668b44 1742 int idx, err;
1da177e4 1743 int is_audigy;
09668b44 1744 unsigned int silent_page;
eb4698f3
TI		 1745 const struct snd_emu_chip_details *c;
1746 static struct snd_device_ops ops = {
1da177e4
LT		 1747 .dev_free = snd_emu10k1_dev_free,
1748 };
67679b1f 1749
1da177e4
LT		 1750 *remu = NULL;
1751
1752 /* enable PCI device */
67679b1f
VM		 1753 err = pci_enable_device(pci);
1754 if (err < 0)
1da177e4
LT		 1755 return err;
1756
e560d8d8 1757 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1da177e4
LT		 1758 if (emu == NULL) {
1759 pci_disable_device(pci);
1760 return -ENOMEM;
1761 }
1762 emu->card = card;
1763 spin_lock_init(&emu->reg_lock);
1764 spin_lock_init(&emu->emu_lock);
c94fa4c9
JCD		 1765 spin_lock_init(&emu->spi_lock);
1766 spin_lock_init(&emu->i2c_lock);
1da177e4
LT		 1767 spin_lock_init(&emu->voice_lock);
1768 spin_lock_init(&emu->synth_lock);
1769 spin_lock_init(&emu->memblk_lock);
62932df8 1770 mutex_init(&emu->fx8010.lock);
1da177e4
LT		 1771 INIT_LIST_HEAD(&emu->mapped_link_head);
1772 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1773 emu->pci = pci;
1774 emu->irq = -1;
1775 emu->synth = NULL;
1776 emu->get_synth_voice = NULL;
1777 /* read revision & serial */
44c10138 1778 emu->revision = pci->revision;
1da177e4
LT		 1779 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1780 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
67679b1f 1781 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1da177e4
LT		 1782
1783 for (c = emu_chip_details; c->vendor; c++) {
1784 if (c->vendor == pci->vendor && c->device == pci->device) {
e66bc8b2 1785 if (subsystem) {
67679b1f 1786 if (c->subsystem && (c->subsystem == subsystem))
e66bc8b2 1787 break;
67679b1f
VM		 1788 else
1789 continue;
e66bc8b2 1790 } else {
67679b1f 1791 if (c->subsystem && (c->subsystem != emu->serial))
e66bc8b2
JCD		 1792 continue;
1793 if (c->revision && c->revision != emu->revision)
1794 continue;
1795 }
bdaed502 1796 break;
1da177e4
LT		 1797 }
1798 }
1799 if (c->vendor == 0) {
1800 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1801 kfree(emu);
1802 pci_disable_device(pci);
1803 return -ENOENT;
1804 }
1805 emu->card_capabilities = c;
e66bc8b2 1806 if (c->subsystem && !subsystem)
67679b1f
VM		 1807 snd_printdd("Sound card name = %s\n", c->name);
1808 else if (subsystem)
1809 snd_printdd("Sound card name = %s, "
1810 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
88393161 1811 "Forced to subsystem = 0x%x\n", c->name,
67679b1f
VM		 1812 pci->vendor, pci->device, emu->serial, c->subsystem);
1813 else
1814 snd_printdd("Sound card name = %s, "
1815 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1816 c->name, pci->vendor, pci->device,
1817 emu->serial);
1818
85a655d6
TI		 1819 if (!*card->id && c->id) {
1820 int i, n = 0;
aec72e0a 1821 strlcpy(card->id, c->id, sizeof(card->id));
85a655d6
TI		 1822 for (;;) {
1823 for (i = 0; i < snd_ecards_limit; i++) {
1824 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1825 break;
1826 }
1827 if (i >= snd_ecards_limit)
1828 break;
1829 n++;
1830 if (n >= SNDRV_CARDS)
1831 break;
1832 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1833 }
1834 }
aec72e0a 1835
1da177e4
LT		 1836 is_audigy = emu->audigy = c->emu10k2_chip;
1837
1838 /* set the DMA transfer mask */
1839 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1840 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1841 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1842 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1843 kfree(emu);
1844 pci_disable_device(pci);
1845 return -ENXIO;
1846 }
1847 if (is_audigy)
1848 emu->gpr_base = A_FXGPREGBASE;
1849 else
1850 emu->gpr_base = FXGPREGBASE;
1851
67679b1f
VM		 1852 err = pci_request_regions(pci, "EMU10K1");
1853 if (err < 0) {
1da177e4
LT		 1854 kfree(emu);
1855 pci_disable_device(pci);
1856 return err;
1857 }
1858 emu->port = pci_resource_start(pci, 0);
1859
1da177e4
LT		 1860 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1861 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1862 32 * 1024, &emu->ptb_pages) < 0) {
09668b44
TI		 1863 err = -ENOMEM;
1864 goto error;
1da177e4
LT		 1865 }
1866
36726d9d
JJ		 1867 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1868 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1869 sizeof(unsigned long));
1da177e4 1870 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
09668b44
TI		 1871 err = -ENOMEM;
1872 goto error;
1da177e4
LT		 1873 }
1874
1875 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1876 EMUPAGESIZE, &emu->silent_page) < 0) {
09668b44
TI		 1877 err = -ENOMEM;
1878 goto error;
1da177e4
LT		 1879 }
1880 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1881 if (emu->memhdr == NULL) {
09668b44
TI		 1882 err = -ENOMEM;
1883 goto error;
1da177e4 1884 }
eb4698f3
TI		 1885 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1886 sizeof(struct snd_util_memblk);
1da177e4
LT		 1887
1888 pci_set_master(pci);
1889
1da177e4
LT		 1890 emu->fx8010.fxbus_mask = 0x303f;
1891 if (extin_mask == 0)
1892 extin_mask = 0x3fcf;
1893 if (extout_mask == 0)
1894 extout_mask = 0x7fff;
1895 emu->fx8010.extin_mask = extin_mask;
1896 emu->fx8010.extout_mask = extout_mask;
09668b44 1897 emu->enable_ir = enable_ir;
1da177e4 1898
d9e8a552 1899 if (emu->card_capabilities->ca_cardbus_chip) {
67679b1f
VM		 1900 err = snd_emu10k1_cardbus_init(emu);
1901 if (err < 0)
d9e8a552
JCD		 1902 goto error;
1903 }
2b637da5 1904 if (emu->card_capabilities->ecard) {
67679b1f
VM		 1905 err = snd_emu10k1_ecard_init(emu);
1906 if (err < 0)
09668b44 1907 goto error;
190d2c46 1908 } else if (emu->card_capabilities->emu_model) {
67679b1f
VM		 1909 err = snd_emu10k1_emu1010_init(emu);
1910 if (err < 0) {
1911 snd_emu10k1_free(emu);
1912 return err;
1913 }
1da177e4
LT		 1914 } else {
1915 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1916 does not support this, it shouldn't do any harm */
67679b1f
VM		 1917 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1918 AC97SLOT_CNTR|AC97SLOT_LFE);
1da177e4
LT		 1919 }
1920
09668b44
TI		 1921 /* initialize TRAM setup */
1922 emu->fx8010.itram_size = (16 * 1024)/2;
1923 emu->fx8010.etram_pages.area = NULL;
1924 emu->fx8010.etram_pages.bytes = 0;
1da177e4 1925
868e15db
JF		 1926 /* irq handler must be registered after I/O ports are activated */
1927 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
934c2b6d 1928 KBUILD_MODNAME, emu)) {
868e15db
JF		 1929 err = -EBUSY;
1930 goto error;
1931 }
1932 emu->irq = pci->irq;
1933
09668b44
TI		 1934 /*
1935 * Init to 0x02109204 :
1936 * Clock accuracy = 0 (1000ppm)
1937 * Sample Rate = 2 (48kHz)
1938 * Audio Channel = 1 (Left of 2)
1939 * Source Number = 0 (Unspecified)
1940 * Generation Status = 1 (Original for Cat Code 12)
1941 * Cat Code = 12 (Digital Signal Mixer)
1942 * Mode = 0 (Mode 0)
1943 * Emphasis = 0 (None)
1944 * CP = 1 (Copyright unasserted)
1945 * AN = 0 (Audio data)
1946 * P = 0 (Consumer)
1947 */
1948 emu->spdif_bits[0] = emu->spdif_bits[1] =
1949 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1950 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1951 SPCS_GENERATIONSTATUS | 0x00001200 |
1952 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1953
1954 emu->reserved_page = (struct snd_emu10k1_memblk *)
1955 snd_emu10k1_synth_alloc(emu, 4096);
1956 if (emu->reserved_page)
1957 emu->reserved_page->map_locked = 1;
67679b1f 1958
09668b44
TI		 1959 /* Clear silent pages and set up pointers */
1960 memset(emu->silent_page.area, 0, PAGE_SIZE);
1961 silent_page = emu->silent_page.addr << 1;
1962 for (idx = 0; idx < MAXPAGES; idx++)
1963 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1964
1965 /* set up voice indices */
1966 for (idx = 0; idx < NUM_G; idx++) {
1967 emu->voices[idx].emu = emu;
1968 emu->voices[idx].number = idx;
1da177e4
LT		 1969 }
1970
67679b1f
VM		 1971 err = snd_emu10k1_init(emu, enable_ir, 0);
1972 if (err < 0)
09668b44 1973 goto error;
c7561cd8 1974#ifdef CONFIG_PM_SLEEP
67679b1f
VM		 1975 err = alloc_pm_buffer(emu);
1976 if (err < 0)
09668b44
TI		 1977 goto error;
1978#endif
1979
1980 /* Initialize the effect engine */
67679b1f
VM		 1981 err = snd_emu10k1_init_efx(emu);
1982 if (err < 0)
09668b44
TI		 1983 goto error;
1984 snd_emu10k1_audio_enable(emu);
1985
67679b1f
VM		 1986 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1987 if (err < 0)
09668b44
TI		 1988 goto error;
1989
adf1b3d2 1990#ifdef CONFIG_PROC_FS
1da177e4 1991 snd_emu10k1_proc_init(emu);
adf1b3d2 1992#endif
1da177e4
LT		 1993
1994 snd_card_set_dev(card, &pci->dev);
1995 *remu = emu;
1996 return 0;
09668b44
TI		 1997
1998 error:
1999 snd_emu10k1_free(emu);
2000 return err;
1da177e4
LT		 2001}
2002
c7561cd8 2003#ifdef CONFIG_PM_SLEEP
09668b44
TI		 2004static unsigned char saved_regs[] = {
2005 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2006 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2007 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2008 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2009 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2010 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2011 0xff /* end */
2012};
2013static unsigned char saved_regs_audigy[] = {
2014 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2015 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2016 0xff /* end */
2017};
2018
2019static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
2020{
2021 int size;
2022
2023 size = ARRAY_SIZE(saved_regs);
2024 if (emu->audigy)
2025 size += ARRAY_SIZE(saved_regs_audigy);
2026 emu->saved_ptr = vmalloc(4 * NUM_G * size);
67679b1f 2027 if (!emu->saved_ptr)
09668b44
TI		 2028 return -ENOMEM;
2029 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2030 return -ENOMEM;
2031 if (emu->card_capabilities->ca0151_chip &&
2032 snd_p16v_alloc_pm_buffer(emu) < 0)
2033 return -ENOMEM;
2034 return 0;
2035}
2036
2037static void free_pm_buffer(struct snd_emu10k1 *emu)
2038{
2039 vfree(emu->saved_ptr);
2040 snd_emu10k1_efx_free_pm_buffer(emu);
2041 if (emu->card_capabilities->ca0151_chip)
2042 snd_p16v_free_pm_buffer(emu);
2043}
2044
2045void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2046{
2047 int i;
2048 unsigned char *reg;
2049 unsigned int *val;
2050
2051 val = emu->saved_ptr;
2052 for (reg = saved_regs; *reg != 0xff; reg++)
2053 for (i = 0; i < NUM_G; i++, val++)
2054 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2055 if (emu->audigy) {
2056 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2057 for (i = 0; i < NUM_G; i++, val++)
2058 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2059 }
2060 if (emu->audigy)
2061 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2062 emu->saved_hcfg = inl(emu->port + HCFG);
2063}
2064
2065void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2066{
d9e8a552
JCD		 2067 if (emu->card_capabilities->ca_cardbus_chip)
2068 snd_emu10k1_cardbus_init(emu);
09668b44
TI		 2069 if (emu->card_capabilities->ecard)
2070 snd_emu10k1_ecard_init(emu);
190d2c46 2071 else if (emu->card_capabilities->emu_model)
67679b1f 2072 snd_emu10k1_emu1010_init(emu);
09668b44
TI		 2073 else
2074 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2075 snd_emu10k1_init(emu, emu->enable_ir, 1);
2076}
2077
2078void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2079{
2080 int i;
2081 unsigned char *reg;
2082 unsigned int *val;
2083
2084 snd_emu10k1_audio_enable(emu);
2085
2086 /* resore for spdif */
2087 if (emu->audigy)
4130d59b
AP		 2088 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2089 outl(emu->saved_hcfg, emu->port + HCFG);
09668b44
TI		 2090
2091 val = emu->saved_ptr;
2092 for (reg = saved_regs; *reg != 0xff; reg++)
2093 for (i = 0; i < NUM_G; i++, val++)
2094 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2095 if (emu->audigy) {
2096 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2097 for (i = 0; i < NUM_G; i++, val++)
2098 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2099 }
2100}
2101#endif
Linux kernel - Deliverables
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