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Linux 2.6.29-rc3
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1_main.c
CommitLineData
1da177e4 1/*
c1017a4c 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
9f4bd5dd 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
1da177e4 7 * Added support for Audigy 2 Value.
9f4bd5dd
JCD		 8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
1da177e4
LT		 10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
42f53226
JCD		 34#include <linux/sched.h>
35#include <linux/kthread.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/init.h>
38#include <linux/interrupt.h>
39#include <linux/pci.h>
40#include <linux/slab.h>
41#include <linux/vmalloc.h>
62932df8
IM		 42#include <linux/mutex.h>
43
1da177e4
LT		 44
45#include <sound/core.h>
46#include <sound/emu10k1.h>
9f4bd5dd 47#include <linux/firmware.h>
1da177e4 48#include "p16v.h"
e2b15f8f 49#include "tina2.h"
184c1e2c 50#include "p17v.h"
1da177e4 51
19b99fba 52
7e0af29d
CL		 53#define HANA_FILENAME "emu/hana.fw"
54#define DOCK_FILENAME "emu/audio_dock.fw"
3663d845
JCD		 55#define EMU1010B_FILENAME "emu/emu1010b.fw"
56#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
190d2c46 57#define EMU0404_FILENAME "emu/emu0404.fw"
d9e8a552 58#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
7e0af29d
CL		 59
60MODULE_FIRMWARE(HANA_FILENAME);
61MODULE_FIRMWARE(DOCK_FILENAME);
3663d845
JCD		 62MODULE_FIRMWARE(EMU1010B_FILENAME);
63MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
190d2c46 64MODULE_FIRMWARE(EMU0404_FILENAME);
d9e8a552 65MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
7e0af29d
CL		 66
67
1da177e4
LT		 68/*************************************************************************
69 * EMU10K1 init / done
70 *************************************************************************/
71
67679b1f 72void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
1da177e4
LT		 73{
74 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
75 snd_emu10k1_ptr_write(emu, IP, ch, 0);
76 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
77 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
79 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
80 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
81
82 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
83 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
84 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
85 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
87 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
88
89 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
90 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
91 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
92 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
93 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
94 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
97
98 /*** these are last so OFF prevents writing ***/
99 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
100 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
101 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
102 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
104
105 /* Audigy extra stuffs */
106 if (emu->audigy) {
107 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
112 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
113 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
114 }
115}
116
18f3c59f
JCD		 117static unsigned int spi_dac_init[] = {
118 0x00ff,
119 0x02ff,
120 0x0400,
121 0x0520,
122 0x0600,
123 0x08ff,
124 0x0aff,
125 0x0cff,
126 0x0eff,
127 0x10ff,
128 0x1200,
129 0x1400,
130 0x1480,
131 0x1800,
132 0x1aff,
133 0x1cff,
134 0x1e00,
135 0x0530,
136 0x0602,
137 0x0622,
138 0x1400,
139};
184c1e2c
JCD		 140
141static unsigned int i2c_adc_init[][2] = {
142 { 0x17, 0x00 }, /* Reset */
143 { 0x07, 0x00 }, /* Timeout */
144 { 0x0b, 0x22 }, /* Interface control */
145 { 0x0c, 0x22 }, /* Master mode control */
146 { 0x0d, 0x08 }, /* Powerdown control */
147 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
148 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
149 { 0x10, 0x7b }, /* ALC Control 1 */
150 { 0x11, 0x00 }, /* ALC Control 2 */
151 { 0x12, 0x32 }, /* ALC Control 3 */
152 { 0x13, 0x00 }, /* Noise gate control */
153 { 0x14, 0xa6 }, /* Limiter control */
67679b1f 154 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
184c1e2c 155};
67679b1f 156
09668b44 157static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
1da177e4 158{
1da177e4 159 unsigned int silent_page;
09668b44 160 int ch;
184c1e2c 161 u32 tmp;
1da177e4
LT		 162
163 /* disable audio and lock cache */
67679b1f
VM		 164 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
165 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
1da177e4
LT		 166
167 /* reset recording buffers */
168 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
169 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
170 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
171 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
172 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
173 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
174
175 /* disable channel interrupt */
176 outl(0, emu->port + INTE);
177 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
178 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
179 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
181
67679b1f 182 if (emu->audigy) {
1da177e4
LT		 183 /* set SPDIF bypass mode */
184 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
185 /* enable rear left + rear right AC97 slots */
09668b44
TI		 186 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
187 AC97SLOT_REAR_LEFT);
1da177e4
LT		 188 }
189
190 /* init envelope engine */
09668b44 191 for (ch = 0; ch < NUM_G; ch++)
1da177e4 192 snd_emu10k1_voice_init(emu, ch);
1da177e4 193
09668b44
TI		 194 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
195 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
196 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
1da177e4 197
2b637da5 198 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4 199 /* Hacks for Alice3 to work independent of haP16V driver */
67679b1f 200 /* Setup SRCMulti_I2S SamplingRate */
1da177e4
LT		 201 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
202 tmp &= 0xfffff1ff;
203 tmp |= (0x2<<9);
204 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
67679b1f 205
1da177e4
LT		 206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
208 /* Setup SRCMulti Input Audio Enable */
209 /* Use 0xFFFFFFFF to enable P16V sounds. */
210 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
211
212 /* Enabled Phased (8-channel) P16V playback */
213 outl(0x0201, emu->port + HCFG2);
214 /* Set playback routing. */
fd9a98ec 215 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
1da177e4 216 }
e0474e53 217 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
1da177e4 218 /* Hacks for Alice3 to work independent of haP16V driver */
09668b44 219 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
67679b1f 220 /* Setup SRCMulti_I2S SamplingRate */
1da177e4
LT		 221 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
222 tmp &= 0xfffff1ff;
223 tmp |= (0x2<<9);
224 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
225
226 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
227 outl(0x600000, emu->port + 0x20);
228 outl(0x14, emu->port + 0x24);
229
230 /* Setup SRCMulti Input Audio Enable */
231 outl(0x7b0000, emu->port + 0x20);
232 outl(0xFF000000, emu->port + 0x24);
233
234 /* Setup SPDIF Out Audio Enable */
235 /* The Audigy 2 Value has a separate SPDIF out,
236 * so no need for a mixer switch
237 */
238 outl(0x7a0000, emu->port + 0x20);
239 outl(0xFF000000, emu->port + 0x24);
240 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
241 outl(tmp, emu->port + A_IOCFG);
242 }
27fe864e 243 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
18f3c59f
JCD		 244 int size, n;
245
246 size = ARRAY_SIZE(spi_dac_init);
9f4bd5dd 247 for (n = 0; n < size; n++)
18f3c59f
JCD		 248 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
249
27fe864e 250 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
ccadc3e3
JCD		 251 /* Enable GPIOs
252 * GPIO0: Unknown
253 * GPIO1: Speakers-enabled.
254 * GPIO2: Unknown
255 * GPIO3: Unknown
256 * GPIO4: IEC958 Output on.
257 * GPIO5: Unknown
258 * GPIO6: Unknown
259 * GPIO7: Unknown
260 */
261 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
27fe864e 262 }
184c1e2c
JCD		 263 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
264 int size, n;
265
266 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
267 tmp = inl(emu->port + A_IOCFG);
268 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
269 tmp = inl(emu->port + A_IOCFG);
270 size = ARRAY_SIZE(i2c_adc_init);
271 for (n = 0; n < size; n++)
272 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
67679b1f
VM		 273 for (n = 0; n < 4; n++) {
274 emu->i2c_capture_volume[n][0] = 0xcf;
275 emu->i2c_capture_volume[n][1] = 0xcf;
184c1e2c 276 }
184c1e2c
JCD		 277 }
278
67679b1f 279
1da177e4
LT		 280 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
281 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
282 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
283
284 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
285 for (ch = 0; ch < NUM_G; ch++) {
286 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
287 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
288 }
289
190d2c46 290 if (emu->card_capabilities->emu_model) {
9f4bd5dd
JCD		 291 outl(HCFG_AUTOMUTE_ASYNC |
292 HCFG_EMU32_SLAVE |
293 HCFG_AUDIOENABLE, emu->port + HCFG);
1da177e4
LT		 294 /*
295 * Hokay, setup HCFG
296 * Mute Disable Audio = 0
297 * Lock Tank Memory = 1
298 * Lock Sound Memory = 0
299 * Auto Mute = 1
300 */
9f4bd5dd 301 } else if (emu->audigy) {
1da177e4
LT		 302 if (emu->revision == 4) /* audigy2 */
303 outl(HCFG_AUDIOENABLE |
304 HCFG_AC3ENABLE_CDSPDIF |
305 HCFG_AC3ENABLE_GPSPDIF |
306 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
307 else
308 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
e0474e53
JCD		 309 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
310 * e.g. card_capabilities->joystick */
1da177e4
LT		 311 } else if (emu->model == 0x20 ||
312 emu->model == 0xc400 ||
313 (emu->model == 0x21 && emu->revision < 6))
314 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
315 else
67679b1f 316 /* With on-chip joystick */
1da177e4
LT		 317 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
318
319 if (enable_ir) { /* enable IR for SB Live */
190d2c46 320 if (emu->card_capabilities->emu_model) {
9f4bd5dd 321 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 322 } else if (emu->card_capabilities->i2c_adc) {
323 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 324 } else if (emu->audigy) {
1da177e4
LT		 325 unsigned int reg = inl(emu->port + A_IOCFG);
326 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
327 udelay(500);
328 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
329 udelay(100);
330 outl(reg, emu->port + A_IOCFG);
331 } else {
332 unsigned int reg = inl(emu->port + HCFG);
333 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
334 udelay(500);
335 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
336 udelay(100);
337 outl(reg, emu->port + HCFG);
67679b1f 338 }
1da177e4 339 }
67679b1f 340
190d2c46 341 if (emu->card_capabilities->emu_model) {
9f4bd5dd 342 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 343 } else if (emu->card_capabilities->i2c_adc) {
344 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 345 } else if (emu->audigy) { /* enable analog output */
1da177e4
LT		 346 unsigned int reg = inl(emu->port + A_IOCFG);
347 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
348 }
349
09668b44
TI		 350 return 0;
351}
1da177e4 352
09668b44
TI		 353static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
354{
1da177e4
LT		 355 /*
356 * Enable the audio bit
357 */
358 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
359
360 /* Enable analog/digital outs on audigy */
190d2c46 361 if (emu->card_capabilities->emu_model) {
9f4bd5dd 362 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 363 } else if (emu->card_capabilities->i2c_adc) {
364 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 365 } else if (emu->audigy) {
1da177e4 366 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
67679b1f 367
e0474e53 368 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT		 369 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
370 * This has to be done after init ALice3 I2SOut beyond 48KHz.
371 * So, sequence is important. */
372 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
e0474e53 373 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
1da177e4
LT		 374 /* Unmute Analog now. */
375 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
376 } else {
377 /* Disable routing from AC97 line out to Front speakers */
378 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
379 }
380 }
67679b1f 381
1da177e4
LT		 382#if 0
383 {
384 unsigned int tmp;
385 /* FIXME: the following routine disables LiveDrive-II !! */
67679b1f 386 /* TOSLink detection */
1da177e4
LT		 387 emu->tos_link = 0;
388 tmp = inl(emu->port + HCFG);
389 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
390 outl(tmp|0x800, emu->port + HCFG);
391 udelay(50);
392 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
393 emu->tos_link = 1;
394 outl(tmp, emu->port + HCFG);
395 }
396 }
397 }
398#endif
399
400 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
1da177e4
LT		 401}
402
67679b1f 403int snd_emu10k1_done(struct snd_emu10k1 *emu)
1da177e4
LT		 404{
405 int ch;
406
407 outl(0, emu->port + INTE);
408
409 /*
410 * Shutdown the chip
411 */
412 for (ch = 0; ch < NUM_G; ch++)
413 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
414 for (ch = 0; ch < NUM_G; ch++) {
415 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
416 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
417 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
418 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
419 }
420
421 /* reset recording buffers */
422 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
423 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
424 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
427 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
428 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
429 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
430 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
431 if (emu->audigy)
432 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
433 else
434 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
435
436 /* disable channel interrupt */
437 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
438 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
439 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
441
1da177e4
LT		 442 /* disable audio and lock cache */
443 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
444 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
445
1da177e4
LT		 446 return 0;
447}
448
449/*************************************************************************
450 * ECARD functional implementation
451 *************************************************************************/
452
453/* In A1 Silicon, these bits are in the HC register */
454#define HOOKN_BIT (1L << 12)
455#define HANDN_BIT (1L << 11)
456#define PULSEN_BIT (1L << 10)
457
458#define EC_GDI1 (1 << 13)
459#define EC_GDI0 (1 << 14)
460
461#define EC_NUM_CONTROL_BITS 20
462
463#define EC_AC3_DATA_SELN 0x0001L
464#define EC_EE_DATA_SEL 0x0002L
465#define EC_EE_CNTRL_SELN 0x0004L
466#define EC_EECLK 0x0008L
467#define EC_EECS 0x0010L
468#define EC_EESDO 0x0020L
469#define EC_TRIM_CSN 0x0040L
470#define EC_TRIM_SCLK 0x0080L
471#define EC_TRIM_SDATA 0x0100L
472#define EC_TRIM_MUTEN 0x0200L
473#define EC_ADCCAL 0x0400L
474#define EC_ADCRSTN 0x0800L
475#define EC_DACCAL 0x1000L
476#define EC_DACMUTEN 0x2000L
477#define EC_LEDN 0x4000L
478
479#define EC_SPDIF0_SEL_SHIFT 15
480#define EC_SPDIF1_SEL_SHIFT 17
481#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
482#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
483#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
484#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
485#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
486 * be incremented any time the EEPROM's
487 * format is changed. */
488
489#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
490
491/* Addresses for special values stored in to EEPROM */
492#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
493#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
494#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
495
496#define EC_LAST_PROMFILE_ADDR 0x2f
497
67679b1f 498#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
1da177e4
LT		 499 * can be up to 30 characters in length
500 * and is stored as a NULL-terminated
501 * ASCII string. Any unused bytes must be
502 * filled with zeros */
503#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
504
505
67679b1f
VM		 506/* Most of this stuff is pretty self-evident. According to the hardware
507 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
1da177e4
LT		 508 * offset problem. Weird.
509 */
510#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
511 EC_TRIM_CSN)
512
513
514#define EC_DEFAULT_ADC_GAIN 0xC4C4
515#define EC_DEFAULT_SPDIF0_SEL 0x0
516#define EC_DEFAULT_SPDIF1_SEL 0x4
517
518/**************************************************************************
519 * @func Clock bits into the Ecard's control latch. The Ecard uses a
520 * control latch will is loaded bit-serially by toggling the Modem control
521 * lines from function 2 on the E8010. This function hides these details
522 * and presents the illusion that we are actually writing to a distinct
523 * register.
524 */
525
67679b1f 526static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
1da177e4
LT		 527{
528 unsigned short count;
529 unsigned int data;
530 unsigned long hc_port;
531 unsigned int hc_value;
532
533 hc_port = emu->port + HCFG;
534 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
535 outl(hc_value, hc_port);
536
537 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
538
539 /* Set up the value */
540 data = ((value & 0x1) ? PULSEN_BIT : 0);
541 value >>= 1;
542
543 outl(hc_value | data, hc_port);
544
545 /* Clock the shift register */
546 outl(hc_value | data | HANDN_BIT, hc_port);
547 outl(hc_value | data, hc_port);
548 }
549
550 /* Latch the bits */
551 outl(hc_value | HOOKN_BIT, hc_port);
552 outl(hc_value, hc_port);
553}
554
555/**************************************************************************
556 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
557 * trim value consists of a 16bit value which is composed of two
558 * 8 bit gain/trim values, one for the left channel and one for the
559 * right channel. The following table maps from the Gain/Attenuation
560 * value in decibels into the corresponding bit pattern for a single
561 * channel.
562 */
563
67679b1f 564static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
1da177e4
LT		 565 unsigned short gain)
566{
567 unsigned int bit;
568
569 /* Enable writing to the TRIM registers */
570 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
571
572 /* Do it again to insure that we meet hold time requirements */
573 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
574
575 for (bit = (1 << 15); bit; bit >>= 1) {
576 unsigned int value;
67679b1f 577
1da177e4
LT		 578 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
579
580 if (gain & bit)
581 value |= EC_TRIM_SDATA;
582
583 /* Clock the bit */
584 snd_emu10k1_ecard_write(emu, value);
585 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
586 snd_emu10k1_ecard_write(emu, value);
587 }
588
589 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
590}
591
67679b1f 592static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
1da177e4
LT		 593{
594 unsigned int hc_value;
595
596 /* Set up the initial settings */
597 emu->ecard_ctrl = EC_RAW_RUN_MODE |
598 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
599 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
600
67679b1f 601 /* Step 0: Set the codec type in the hardware control register
1da177e4
LT		 602 * and enable audio output */
603 hc_value = inl(emu->port + HCFG);
604 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
605 inl(emu->port + HCFG);
606
607 /* Step 1: Turn off the led and deassert TRIM_CS */
608 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
609
610 /* Step 2: Calibrate the ADC and DAC */
611 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
612
613 /* Step 3: Wait for awhile; XXX We can't get away with this
614 * under a real operating system; we'll need to block and wait that
615 * way. */
616 snd_emu10k1_wait(emu, 48000);
617
618 /* Step 4: Switch off the DAC and ADC calibration. Note
619 * That ADC_CAL is actually an inverted signal, so we assert
620 * it here to stop calibration. */
621 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
622
623 /* Step 4: Switch into run mode */
624 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
625
626 /* Step 5: Set the analog input gain */
627 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
628
629 return 0;
630}
631
67679b1f 632static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
d83c671f
JCD		 633{
634 unsigned long special_port;
635 unsigned int value;
636
637 /* Special initialisation routine
638 * before the rest of the IO-Ports become active.
639 */
640 special_port = emu->port + 0x38;
641 value = inl(special_port);
642 outl(0x00d00000, special_port);
643 value = inl(special_port);
644 outl(0x00d00001, special_port);
645 value = inl(special_port);
646 outl(0x00d0005f, special_port);
647 value = inl(special_port);
648 outl(0x00d0007f, special_port);
649 value = inl(special_port);
650 outl(0x0090007f, special_port);
651 value = inl(special_port);
652
e2b15f8f 653 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
c94fa4c9
JCD		 654 /* Delay to give time for ADC chip to switch on. It needs 113ms */
655 msleep(200);
d83c671f
JCD		 656 return 0;
657}
658
67679b1f 659static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename)
19b99fba 660{
9f4bd5dd
JCD		 661 int err;
662 int n, i;
663 int reg;
664 int value;
190d2c46
JCD		 665 unsigned int write_post;
666 unsigned long flags;
9f4bd5dd
JCD		 667 const struct firmware *fw_entry;
668
67679b1f
VM		 669 err = request_firmware(&fw_entry, filename, &emu->pci->dev);
670 if (err != 0) {
671 snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err);
9f4bd5dd
JCD		 672 return err;
673 }
67679b1f 674 snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size);
19b99fba 675
9f4bd5dd
JCD		 676 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
677 /* GPIO7 -> FPGA PGMN
678 * GPIO6 -> FPGA CCLK
679 * GPIO5 -> FPGA DIN
680 * FPGA CONFIG OFF -> FPGA PGMN
681 */
190d2c46 682 spin_lock_irqsave(&emu->emu_lock, flags);
9f4bd5dd 683 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
190d2c46
JCD		 684 write_post = inl(emu->port + A_IOCFG);
685 udelay(100);
9f4bd5dd 686 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
190d2c46 687 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 688 udelay(100); /* Allow FPGA memory to clean */
67679b1f
VM		 689 for (n = 0; n < fw_entry->size; n++) {
690 value = fw_entry->data[n];
691 for (i = 0; i < 8; i++) {
9f4bd5dd
JCD		 692 reg = 0x80;
693 if (value & 0x1)
694 reg = reg | 0x20;
67679b1f 695 value = value >> 1;
9f4bd5dd 696 outl(reg, emu->port + A_IOCFG);
190d2c46 697 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 698 outl(reg | 0x40, emu->port + A_IOCFG);
190d2c46 699 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd
JCD		 700 }
701 }
702 /* After programming, set GPIO bit 4 high again. */
703 outl(0x10, emu->port + A_IOCFG);
190d2c46
JCD		 704 write_post = inl(emu->port + A_IOCFG);
705 spin_unlock_irqrestore(&emu->emu_lock, flags);
19b99fba 706
67679b1f 707 release_firmware(fw_entry);
19b99fba
JCD		 708 return 0;
709}
710
bd3d1c20
TI		 711static int emu1010_firmware_thread(void *data)
712{
67679b1f
VM		 713 struct snd_emu10k1 *emu = data;
714 int tmp, tmp2;
42f53226
JCD		 715 int reg;
716 int err;
717
718 for (;;) {
719 /* Delay to allow Audio Dock to settle */
190d2c46 720 msleep_interruptible(1000);
42f53226
JCD		 721 if (kthread_should_stop())
722 break;
67679b1f
VM		 723 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
724 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
42f53226
JCD		 725 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
726 /* Audio Dock attached */
727 /* Return to Audio Dock programming mode */
728 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
67679b1f 729 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
3839e4f1
TI		 730 if (emu->card_capabilities->emu_model ==
731 EMU_MODEL_EMU1010) {
67679b1f
VM		 732 err = snd_emu1010_load_firmware(emu, DOCK_FILENAME);
733 if (err != 0)
190d2c46 734 continue;
3839e4f1
TI		 735 } else if (emu->card_capabilities->emu_model ==
736 EMU_MODEL_EMU1010B) {
67679b1f
VM		 737 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
738 if (err != 0)
190d2c46 739 continue;
3839e4f1
TI		 740 } else if (emu->card_capabilities->emu_model ==
741 EMU_MODEL_EMU1616) {
67679b1f
VM		 742 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
743 if (err != 0)
190d2c46 744 continue;
42f53226
JCD		 745 }
746
67679b1f
VM		 747 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
748 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
749 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
42f53226 750 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
67679b1f
VM		 751 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
752 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
42f53226
JCD		 753 if ((reg & 0x1f) != 0x15) {
754 /* FPGA failed to be programmed */
67679b1f 755 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
190d2c46 756 continue;
42f53226
JCD		 757 }
758 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
67679b1f
VM		 759 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
760 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
761 snd_printk("Audio Dock ver:%d.%d\n", tmp, tmp2);
c93d1c25
JCD		 762 /* Sync clocking between 1010 and Dock */
763 /* Allow DLL to settle */
764 msleep(10);
765 /* Unmute all. Default is muted after a firmware load */
67679b1f 766 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
42f53226
JCD		 767 }
768 }
190d2c46 769 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
42f53226
JCD		 770 return 0;
771}
772
13d45709
PH		 773/*
774 * EMU-1010 - details found out from this driver, official MS Win drivers,
775 * testing the card:
776 *
777 * Audigy2 (aka Alice2):
778 * ---------------------
779 * * communication over PCI
780 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
781 * to 2 x 16-bit, using internal DSP instructions
782 * * slave mode, clock supplied by HANA
783 * * linked to HANA using:
784 * 32 x 32-bit serial EMU32 output channels
785 * 16 x EMU32 input channels
786 * (?) x I2S I/O channels (?)
787 *
788 * FPGA (aka HANA):
789 * ---------------
790 * * provides all (?) physical inputs and outputs of the card
791 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
792 * * provides clock signal for the card and Alice2
793 * * two crystals - for 44.1kHz and 48kHz multiples
794 * * provides internal routing of signal sources to signal destinations
795 * * inputs/outputs to Alice2 - see above
796 *
797 * Current status of the driver:
798 * ----------------------------
799 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
800 * * PCM device nb. 2:
801 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
802 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
803 */
67679b1f 804static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
19b99fba
JCD		 805{
806 unsigned int i;
67679b1f 807 int tmp, tmp2;
9f4bd5dd
JCD		 808 int reg;
809 int err;
190d2c46 810 const char *filename = NULL;
9f4bd5dd
JCD		 811
812 snd_printk(KERN_INFO "emu1010: Special config.\n");
813 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
814 * Lock Sound Memory Cache, Lock Tank Memory Cache,
815 * Mute all codecs.
816 */
19b99fba 817 outl(0x0005a00c, emu->port + HCFG);
9f4bd5dd
JCD		 818 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
819 * Lock Tank Memory Cache,
820 * Mute all codecs.
821 */
67679b1f 822 outl(0x0005a004, emu->port + HCFG);
9f4bd5dd
JCD		 823 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
824 * Mute all codecs.
825 */
19b99fba 826 outl(0x0005a000, emu->port + HCFG);
9f4bd5dd
JCD		 827 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
828 * Mute all codecs.
829 */
19b99fba
JCD		 830 outl(0x0005a000, emu->port + HCFG);
831
9f4bd5dd 832 /* Disable 48Volt power to Audio Dock */
67679b1f 833 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
9f4bd5dd
JCD		 834
835 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
67679b1f
VM		 836 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
837 snd_printdd("reg1 = 0x%x\n", reg);
d9e8a552 838 if ((reg & 0x3f) == 0x15) {
9f4bd5dd
JCD		 839 /* FPGA netlist already present so clear it */
840 /* Return to programming mode */
841
67679b1f 842 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
19b99fba 843 }
67679b1f
VM		 844 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
845 snd_printdd("reg2 = 0x%x\n", reg);
d9e8a552 846 if ((reg & 0x3f) == 0x15) {
9f4bd5dd 847 /* FPGA failed to return to programming mode */
d9e8a552 848 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
9f4bd5dd 849 return -ENODEV;
19b99fba 850 }
67679b1f 851 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
190d2c46 852 switch (emu->card_capabilities->emu_model) {
3839e4f1 853 case EMU_MODEL_EMU1010:
190d2c46
JCD		 854 filename = HANA_FILENAME;
855 break;
3839e4f1 856 case EMU_MODEL_EMU1010B:
190d2c46
JCD		 857 filename = EMU1010B_FILENAME;
858 break;
3839e4f1 859 case EMU_MODEL_EMU1616:
190d2c46
JCD		 860 filename = EMU1010_NOTEBOOK_FILENAME;
861 break;
3839e4f1 862 case EMU_MODEL_EMU0404:
190d2c46
JCD		 863 filename = EMU0404_FILENAME;
864 break;
865 default:
866 filename = NULL;
867 return -ENODEV;
868 break;
869 }
870 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
871 err = snd_emu1010_load_firmware(emu, filename);
872 if (err != 0) {
873 snd_printk(
874 KERN_INFO "emu1010: Loading Firmware file %s failed\n",
875 filename);
876 return err;
19b99fba 877 }
9f4bd5dd
JCD		 878
879 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
67679b1f 880 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
d9e8a552 881 if ((reg & 0x3f) != 0x15) {
9f4bd5dd 882 /* FPGA failed to be programmed */
67679b1f 883 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
9f4bd5dd 884 return -ENODEV;
19b99fba 885 }
19b99fba 886
9f4bd5dd 887 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
67679b1f
VM		 888 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
889 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
890 snd_printk("emu1010: Hana version: %d.%d\n", tmp, tmp2);
9f4bd5dd 891 /* Enable 48Volt power to Audio Dock */
67679b1f 892 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
9f4bd5dd 893
67679b1f
VM		 894 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
895 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
896 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
897 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
898 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
edec7bbb 899 /* Optical -> ADAT I/O */
f93abe51
JCD		 900 /* 0 : SPDIF
901 * 1 : ADAT
902 */
903 emu->emu1010.optical_in = 1; /* IN_ADAT */
904 emu->emu1010.optical_out = 1; /* IN_ADAT */
905 tmp = 0;
906 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
907 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
67679b1f
VM		 908 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
909 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
9f4bd5dd 910 /* Set no attenuation on Audio Dock pads. */
67679b1f 911 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
9148cc50 912 emu->emu1010.adc_pads = 0x00;
67679b1f 913 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
9f4bd5dd 914 /* Unmute Audio dock DACs, Headphone source DAC-4. */
67679b1f
VM		 915 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
916 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
917 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
9148cc50 918 /* DAC PADs. */
67679b1f 919 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
9148cc50 920 emu->emu1010.dac_pads = 0x0f;
67679b1f
VM		 921 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
922 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
923 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
9f4bd5dd 924 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
67679b1f 925 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
9f4bd5dd 926 /* MIDI routing */
67679b1f 927 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
9f4bd5dd 928 /* Unknown. */
67679b1f
VM		 929 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
930 /* IRQ Enable: Alll on */
931 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
9f4bd5dd 932 /* IRQ Enable: All off */
67679b1f 933 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
9f4bd5dd 934
67679b1f
VM		 935 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
936 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
9f4bd5dd 937 /* Default WCLK set to 48kHz. */
67679b1f 938 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
9f4bd5dd 939 /* Word Clock source, Internal 48kHz x1 */
67679b1f
VM		 940 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
941 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
9f4bd5dd 942 /* Audio Dock LEDs. */
67679b1f 943 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
19b99fba 944
9f4bd5dd
JCD		 945#if 0
946 /* For 96kHz */
947 snd_emu1010_fpga_link_dst_src_write(emu,
948 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
949 snd_emu1010_fpga_link_dst_src_write(emu,
950 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
951 snd_emu1010_fpga_link_dst_src_write(emu,
952 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
953 snd_emu1010_fpga_link_dst_src_write(emu,
954 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
955#endif
956#if 0
957 /* For 192kHz */
958 snd_emu1010_fpga_link_dst_src_write(emu,
959 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
960 snd_emu1010_fpga_link_dst_src_write(emu,
961 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
962 snd_emu1010_fpga_link_dst_src_write(emu,
963 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
964 snd_emu1010_fpga_link_dst_src_write(emu,
965 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
966 snd_emu1010_fpga_link_dst_src_write(emu,
967 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
968 snd_emu1010_fpga_link_dst_src_write(emu,
969 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
970 snd_emu1010_fpga_link_dst_src_write(emu,
971 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
972 snd_emu1010_fpga_link_dst_src_write(emu,
973 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
974#endif
975#if 1
976 /* For 48kHz */
977 snd_emu1010_fpga_link_dst_src_write(emu,
978 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
979 snd_emu1010_fpga_link_dst_src_write(emu,
980 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
981 snd_emu1010_fpga_link_dst_src_write(emu,
982 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
983 snd_emu1010_fpga_link_dst_src_write(emu,
984 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
985 snd_emu1010_fpga_link_dst_src_write(emu,
986 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
987 snd_emu1010_fpga_link_dst_src_write(emu,
988 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
989 snd_emu1010_fpga_link_dst_src_write(emu,
990 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
991 snd_emu1010_fpga_link_dst_src_write(emu,
992 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
13d45709
PH		 993 /* Pavel Hofman - setting defaults for 8 more capture channels
994 * Defaults only, users will set their own values anyways, let's
995 * just copy/paste.
996 */
67679b1f 997
13d45709
PH		 998 snd_emu1010_fpga_link_dst_src_write(emu,
999 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1000 snd_emu1010_fpga_link_dst_src_write(emu,
1001 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1008 snd_emu1010_fpga_link_dst_src_write(emu,
1009 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1010 snd_emu1010_fpga_link_dst_src_write(emu,
1011 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1012 snd_emu1010_fpga_link_dst_src_write(emu,
1013 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
9f4bd5dd
JCD		 1014#endif
1015#if 0
1016 /* Original */
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1027 snd_emu1010_fpga_link_dst_src_write(emu,
1028 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1031 snd_emu1010_fpga_link_dst_src_write(emu,
1032 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1033 snd_emu1010_fpga_link_dst_src_write(emu,
1034 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1035 snd_emu1010_fpga_link_dst_src_write(emu,
1036 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1037 snd_emu1010_fpga_link_dst_src_write(emu,
1038 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1039 snd_emu1010_fpga_link_dst_src_write(emu,
1040 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1041#endif
67679b1f
VM		 1042 for (i = 0; i < 0x20; i++) {
1043 /* AudioDock Elink <- Silence */
1044 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
9f4bd5dd 1045 }
67679b1f 1046 for (i = 0; i < 4; i++) {
9f4bd5dd 1047 /* Hana SPDIF Out <- Silence */
67679b1f 1048 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
9f4bd5dd 1049 }
67679b1f 1050 for (i = 0; i < 7; i++) {
9f4bd5dd 1051 /* Hamoa DAC <- Silence */
67679b1f 1052 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
9f4bd5dd 1053 }
67679b1f 1054 for (i = 0; i < 7; i++) {
9f4bd5dd
JCD		 1055 /* Hana ADAT Out <- Silence */
1056 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1057 }
1058 snd_emu1010_fpga_link_dst_src_write(emu,
1059 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1060 snd_emu1010_fpga_link_dst_src_write(emu,
1061 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1062 snd_emu1010_fpga_link_dst_src_write(emu,
1063 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1064 snd_emu1010_fpga_link_dst_src_write(emu,
1065 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1066 snd_emu1010_fpga_link_dst_src_write(emu,
1067 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1068 snd_emu1010_fpga_link_dst_src_write(emu,
1069 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
67679b1f
VM		 1070 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1071
1072 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
9f4bd5dd 1073
9f4bd5dd
JCD		 1074 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1075 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1076 * Mute all codecs.
1077 */
67679b1f 1078 outl(0x0000a000, emu->port + HCFG);
9f4bd5dd
JCD		 1079 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1080 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1081 * Un-Mute all codecs.
1082 */
19b99fba 1083 outl(0x0000a001, emu->port + HCFG);
67679b1f 1084
19b99fba
JCD		 1085 /* Initial boot complete. Now patches */
1086
67679b1f
VM		 1087 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1088 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1089 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1090 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1091 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1092 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1093 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
9f4bd5dd 1094
42f53226 1095 /* Start Micro/Audio Dock firmware loader thread */
bd3d1c20
TI		 1096 if (!emu->emu1010.firmware_thread) {
1097 emu->emu1010.firmware_thread =
1098 kthread_create(emu1010_firmware_thread, emu,
1099 "emu1010_firmware");
1100 wake_up_process(emu->emu1010.firmware_thread);
1101 }
3663d845 1102
9f4bd5dd
JCD		 1103#if 0
1104 snd_emu1010_fpga_link_dst_src_write(emu,
1105 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1106 snd_emu1010_fpga_link_dst_src_write(emu,
1107 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1110 snd_emu1010_fpga_link_dst_src_write(emu,
1111 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1112#endif
1113 /* Default outputs */
3839e4f1 1114 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1c02e366
CF		 1115 /* 1616(M) cardbus default outputs */
1116 /* ALICE2 bus 0xa0 */
1117 snd_emu1010_fpga_link_dst_src_write(emu,
1118 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1119 emu->emu1010.output_source[0] = 17;
1120 snd_emu1010_fpga_link_dst_src_write(emu,
1121 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1122 emu->emu1010.output_source[1] = 18;
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1125 emu->emu1010.output_source[2] = 19;
1126 snd_emu1010_fpga_link_dst_src_write(emu,
1127 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1128 emu->emu1010.output_source[3] = 20;
1129 snd_emu1010_fpga_link_dst_src_write(emu,
1130 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1131 emu->emu1010.output_source[4] = 21;
1132 snd_emu1010_fpga_link_dst_src_write(emu,
1133 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1134 emu->emu1010.output_source[5] = 22;
1135 /* ALICE2 bus 0xa0 */
1136 snd_emu1010_fpga_link_dst_src_write(emu,
1137 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1138 emu->emu1010.output_source[16] = 17;
1139 snd_emu1010_fpga_link_dst_src_write(emu,
1140 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1141 emu->emu1010.output_source[17] = 18;
1142 } else {
1143 /* ALICE2 bus 0xa0 */
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1146 emu->emu1010.output_source[0] = 21;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1149 emu->emu1010.output_source[1] = 22;
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1152 emu->emu1010.output_source[2] = 23;
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1155 emu->emu1010.output_source[3] = 24;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1158 emu->emu1010.output_source[4] = 25;
1159 snd_emu1010_fpga_link_dst_src_write(emu,
1160 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1161 emu->emu1010.output_source[5] = 26;
1162 snd_emu1010_fpga_link_dst_src_write(emu,
1163 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1164 emu->emu1010.output_source[6] = 27;
1165 snd_emu1010_fpga_link_dst_src_write(emu,
1166 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1167 emu->emu1010.output_source[7] = 28;
1168 /* ALICE2 bus 0xa0 */
1169 snd_emu1010_fpga_link_dst_src_write(emu,
1170 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1171 emu->emu1010.output_source[8] = 21;
1172 snd_emu1010_fpga_link_dst_src_write(emu,
1173 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1174 emu->emu1010.output_source[9] = 22;
1175 /* ALICE2 bus 0xa0 */
1176 snd_emu1010_fpga_link_dst_src_write(emu,
1177 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1178 emu->emu1010.output_source[10] = 21;
1179 snd_emu1010_fpga_link_dst_src_write(emu,
1180 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1181 emu->emu1010.output_source[11] = 22;
1182 /* ALICE2 bus 0xa0 */
1183 snd_emu1010_fpga_link_dst_src_write(emu,
1184 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1185 emu->emu1010.output_source[12] = 21;
1186 snd_emu1010_fpga_link_dst_src_write(emu,
1187 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1188 emu->emu1010.output_source[13] = 22;
1189 /* ALICE2 bus 0xa0 */
1190 snd_emu1010_fpga_link_dst_src_write(emu,
1191 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1192 emu->emu1010.output_source[14] = 21;
1193 snd_emu1010_fpga_link_dst_src_write(emu,
1194 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1195 emu->emu1010.output_source[15] = 22;
1196 /* ALICE2 bus 0xa0 */
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1199 emu->emu1010.output_source[16] = 21;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1202 emu->emu1010.output_source[17] = 22;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1205 emu->emu1010.output_source[18] = 23;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1208 emu->emu1010.output_source[19] = 24;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1211 emu->emu1010.output_source[20] = 25;
1212 snd_emu1010_fpga_link_dst_src_write(emu,
1213 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1214 emu->emu1010.output_source[21] = 26;
1215 snd_emu1010_fpga_link_dst_src_write(emu,
1216 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1217 emu->emu1010.output_source[22] = 27;
1218 snd_emu1010_fpga_link_dst_src_write(emu,
1219 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1220 emu->emu1010.output_source[23] = 28;
1221 }
9f4bd5dd 1222 /* TEMP: Select SPDIF in/out */
67679b1f 1223 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
9f4bd5dd
JCD		 1224
1225 /* TEMP: Select 48kHz SPDIF out */
1226 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1227 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1228 /* Word Clock source, Internal 48kHz x1 */
67679b1f
VM		 1229 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1230 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
b0dbdaea 1231 emu->emu1010.internal_clock = 1; /* 48000 */
67679b1f 1232 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
9f4bd5dd 1233 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
67679b1f
VM		 1234 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1235 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1236 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
19b99fba
JCD		 1237
1238 return 0;
1239}
1da177e4
LT		 1240/*
1241 * Create the EMU10K1 instance
1242 */
1243
09668b44
TI		 1244#ifdef CONFIG_PM
1245static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1246static void free_pm_buffer(struct snd_emu10k1 *emu);
1247#endif
1248
eb4698f3 1249static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1da177e4
LT		 1250{
1251 if (emu->port) { /* avoid access to already used hardware */
67679b1f 1252 snd_emu10k1_fx8010_tram_setup(emu, 0);
1da177e4 1253 snd_emu10k1_done(emu);
09668b44 1254 snd_emu10k1_free_efx(emu);
67679b1f 1255 }
3839e4f1 1256 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
9f4bd5dd 1257 /* Disable 48Volt power to Audio Dock */
67679b1f 1258 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
9f4bd5dd 1259 }
bd3d1c20 1260 if (emu->emu1010.firmware_thread)
190d2c46 1261 kthread_stop(emu->emu1010.firmware_thread);
ebf029da
TI		 1262 if (emu->irq >= 0)
1263 free_irq(emu->irq, emu);
1264 /* remove reserved page */
1265 if (emu->reserved_page) {
1266 snd_emu10k1_synth_free(emu,
1267 (struct snd_util_memblk *)emu->reserved_page);
1268 emu->reserved_page = NULL;
1269 }
1da177e4
LT		 1270 if (emu->memhdr)
1271 snd_util_memhdr_free(emu->memhdr);
1272 if (emu->silent_page.area)
1273 snd_dma_free_pages(&emu->silent_page);
1274 if (emu->ptb_pages.area)
1275 snd_dma_free_pages(&emu->ptb_pages);
1276 vfree(emu->page_ptr_table);
1277 vfree(emu->page_addr_table);
09668b44
TI		 1278#ifdef CONFIG_PM
1279 free_pm_buffer(emu);
1280#endif
1da177e4
LT		 1281 if (emu->port)
1282 pci_release_regions(emu->pci);
67679b1f 1283 if (emu->card_capabilities->ca0151_chip) /* P16V */
1da177e4 1284 snd_p16v_free(emu);
09668b44 1285 pci_disable_device(emu->pci);
1da177e4
LT		 1286 kfree(emu);
1287 return 0;
1288}
1289
eb4698f3 1290static int snd_emu10k1_dev_free(struct snd_device *device)
1da177e4 1291{
eb4698f3 1292 struct snd_emu10k1 *emu = device->device_data;
1da177e4
LT		 1293 return snd_emu10k1_free(emu);
1294}
1295
eb4698f3 1296static struct snd_emu_chip_details emu_chip_details[] = {
21fdddea
JCD		 1297 /* Audigy4 (Not PRO) SB0610 */
1298 /* Tested by James@superbug.co.uk 4th April 2006 */
1299 /* A_IOCFG bits
1300 * Output
1301 * 0: ?
1302 * 1: ?
1303 * 2: ?
1304 * 3: 0 - Digital Out, 1 - Line in
1305 * 4: ?
1306 * 5: ?
1307 * 6: ?
1308 * 7: ?
1309 * Input
1310 * 8: ?
1311 * 9: ?
1312 * A: Green jack sense (Front)
1313 * B: ?
1314 * C: Black jack sense (Rear/Side Right)
1315 * D: Yellow jack sense (Center/LFE/Side Left)
1316 * E: ?
1317 * F: ?
1318 *
1319 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1320 * 0 - Digital Out
1321 * 1 - Line in
1322 */
1323 /* Mic input not tested.
1324 * Analog CD input not tested
1325 * Digital Out not tested.
1326 * Line in working.
1327 * Audio output 5.1 working. Side outputs not working.
1328 */
1329 /* DSP: CA10300-IAT LF
1330 * DAC: Cirrus Logic CS4382-KQZ
1331 * ADC: Philips 1361T
1332 * AC97: Sigmatel STAC9750
1333 * CA0151: None
1334 */
1335 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
18c71092 1336 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
21fdddea
JCD		 1337 .id = "Audigy2",
1338 .emu10k2_chip = 1,
1339 .ca0108_chip = 1,
1340 .spk71 = 1,
1341 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1342 .ac97_chip = 1} ,
18c71092
VM		 1343 /* Audigy 2 Value AC3 out does not work yet.
1344 * Need to find out how to turn off interpolators.
1345 */
1346 /* Tested by James@superbug.co.uk 3rd July 2005 */
1347 /* DSP: CA0108-IAT
1348 * DAC: CS4382-KQ
1349 * ADC: Philips 1361T
1350 * AC97: STAC9750
1351 * CA0151: None
1352 */
1353 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1354 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1355 .id = "Audigy2",
1356 .emu10k2_chip = 1,
1357 .ca0108_chip = 1,
1358 .spk71 = 1,
1359 .ac97_chip = 1} ,
d83c671f 1360 /* Audigy 2 ZS Notebook Cardbus card.*/
184c1e2c 1361 /* Tested by James@superbug.co.uk 6th November 2006 */
f951fd3c
JCD		 1362 /* Audio output 7.1/Headphones working.
1363 * Digital output working. (AC3 not checked, only PCM)
184c1e2c
JCD		 1364 * Audio Mic/Line inputs working.
1365 * Digital input not tested.
18c71092 1366 */
21fdddea 1367 /* DSP: Tina2
f951fd3c
JCD		 1368 * DAC: Wolfson WM8768/WM8568
1369 * ADC: Wolfson WM8775
1370 * AC97: None
1371 * CA0151: None
1372 */
184c1e2c
JCD		 1373 /* Tested by James@superbug.co.uk 4th April 2006 */
1374 /* A_IOCFG bits
1375 * Output
1376 * 0: Not Used
1377 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1378 * 2: Analog input 0 = line in, 1 = mic in
1379 * 3: Not Used
1380 * 4: Digital output 0 = off, 1 = on.
1381 * 5: Not Used
1382 * 6: Not Used
1383 * 7: Not Used
1384 * Input
1385 * All bits 1 (0x3fxx) means nothing plugged in.
1386 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1387 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1388 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1389 * E-F: Always 0
1390 *
1391 */
d83c671f 1392 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
18c71092 1393 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
d83c671f
JCD		 1394 .id = "Audigy2",
1395 .emu10k2_chip = 1,
1396 .ca0108_chip = 1,
1397 .ca_cardbus_chip = 1,
27fe864e 1398 .spi_dac = 1,
184c1e2c 1399 .i2c_adc = 1,
d83c671f 1400 .spk71 = 1} ,
190d2c46 1401 /* Tested by James@superbug.co.uk 4th Nov 2007. */
82c8c741 1402 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
18c71092 1403 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
82c8c741
JCD		 1404 .id = "EMU1010",
1405 .emu10k2_chip = 1,
1406 .ca0108_chip = 1,
1407 .ca_cardbus_chip = 1,
d9e8a552 1408 .spk71 = 1 ,
3839e4f1 1409 .emu_model = EMU_MODEL_EMU1616},
190d2c46 1410 /* Tested by James@superbug.co.uk 4th Nov 2007. */
18c71092 1411 /* This is MAEM8960, 0202 is MAEM 8980 */
3663d845 1412 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
18c71092 1413 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
3663d845
JCD		 1414 .id = "EMU1010",
1415 .emu10k2_chip = 1,
1416 .ca0108_chip = 1,
190d2c46 1417 .spk71 = 1,
18c71092 1418 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
190d2c46 1419 /* Tested by James@superbug.co.uk 8th July 2005. */
18c71092 1420 /* This is MAEM8810, 0202 is MAEM8820 */
190d2c46 1421 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
18c71092 1422 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
190d2c46
JCD		 1423 .id = "EMU1010",
1424 .emu10k2_chip = 1,
1425 .ca0102_chip = 1,
1426 .spk71 = 1,
18c71092 1427 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
493b4acb
VMV		 1428 /* EMU0404b */
1429 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
18c71092 1430 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
493b4acb
VMV		 1431 .id = "EMU0404",
1432 .emu10k2_chip = 1,
1433 .ca0108_chip = 1,
1434 .spk71 = 1,
18c71092 1435 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
493b4acb
VMV		 1436 /* Tested by James@superbug.co.uk 20-3-2007. */
1437 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
18c71092 1438 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
493b4acb
VMV		 1439 .id = "EMU0404",
1440 .emu10k2_chip = 1,
1441 .ca0102_chip = 1,
1442 .spk71 = 1,
1443 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
718a2594 1444 /* Note that all E-mu cards require kernel 2.6 or newer. */
18c71092
VM		 1445 {.vendor = 0x1102, .device = 0x0008,
1446 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
aec72e0a 1447 .id = "Audigy2",
1da177e4 1448 .emu10k2_chip = 1,
2668907a
PZ		 1449 .ca0108_chip = 1,
1450 .ac97_chip = 1} ,
88dc0e5d 1451 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4 1452 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
18c71092 1453 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
aec72e0a 1454 .id = "Audigy2",
1da177e4
LT		 1455 .emu10k2_chip = 1,
1456 .ca0102_chip = 1,
1457 .ca0151_chip = 1,
1458 .spk71 = 1,
1459 .spdif_bug = 1,
1460 .ac97_chip = 1} ,
f6f8bb64 1461 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
5b0e4985
JCD		 1462 /* The 0x20061102 does have SB0350 written on it
1463 * Just like 0x20021102
1464 */
f6f8bb64 1465 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
18c71092 1466 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
f6f8bb64
LR		 1467 .id = "Audigy2",
1468 .emu10k2_chip = 1,
1469 .ca0102_chip = 1,
1470 .ca0151_chip = 1,
1471 .spk71 = 1,
1472 .spdif_bug = 1,
55e03a68 1473 .invert_shared_spdif = 1, /* digital/analog switch swapped */
f6f8bb64 1474 .ac97_chip = 1} ,
1da177e4 1475 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
18c71092 1476 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
aec72e0a 1477 .id = "Audigy2",
1da177e4
LT		 1478 .emu10k2_chip = 1,
1479 .ca0102_chip = 1,
1480 .ca0151_chip = 1,
1481 .spk71 = 1,
1482 .spdif_bug = 1,
55e03a68 1483 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1da177e4
LT		 1484 .ac97_chip = 1} ,
1485 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
18c71092 1486 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
aec72e0a 1487 .id = "Audigy2",
1da177e4
LT		 1488 .emu10k2_chip = 1,
1489 .ca0102_chip = 1,
1490 .ca0151_chip = 1,
1491 .spk71 = 1,
1492 .spdif_bug = 1,
55e03a68 1493 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1da177e4 1494 .ac97_chip = 1} ,
54efc96d
JCD		 1495 /* Audigy 2 */
1496 /* Tested by James@superbug.co.uk 3rd July 2005 */
1497 /* DSP: CA0102-IAT
1498 * DAC: CS4382-KQ
1499 * ADC: Philips 1361T
1500 * AC97: STAC9721
1501 * CA0151: Yes
1502 */
1da177e4 1503 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
18c71092 1504 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
aec72e0a 1505 .id = "Audigy2",
1da177e4
LT		 1506 .emu10k2_chip = 1,
1507 .ca0102_chip = 1,
1508 .ca0151_chip = 1,
1509 .spk71 = 1,
1510 .spdif_bug = 1,
11b3a755 1511 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1da177e4
LT		 1512 .ac97_chip = 1} ,
1513 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
18c71092 1514 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
aec72e0a 1515 .id = "Audigy2",
1da177e4
LT		 1516 .emu10k2_chip = 1,
1517 .ca0102_chip = 1,
1518 .ca0151_chip = 1,
2f020aa7 1519 .spk71 = 1,
1da177e4 1520 .spdif_bug = 1} ,
264f9577
JCD		 1521 /* Dell OEM/Creative Labs Audigy 2 ZS */
1522 /* See ALSA bug#1365 */
1523 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
18c71092 1524 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
264f9577
JCD		 1525 .id = "Audigy2",
1526 .emu10k2_chip = 1,
1527 .ca0102_chip = 1,
1528 .ca0151_chip = 1,
1529 .spk71 = 1,
1530 .spdif_bug = 1,
1531 .ac97_chip = 1} ,
1da177e4 1532 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
18c71092 1533 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
aec72e0a 1534 .id = "Audigy2",
1da177e4
LT		 1535 .emu10k2_chip = 1,
1536 .ca0102_chip = 1,
1537 .ca0151_chip = 1,
1538 .spk71 = 1,
1539 .spdif_bug = 1,
d2cd74b1 1540 .invert_shared_spdif = 1, /* digital/analog switch swapped */
3271b7b2 1541 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1da177e4 1542 .ac97_chip = 1} ,
bdaed502 1543 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
18c71092 1544 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
bdaed502
TI		 1545 .id = "Audigy2",
1546 .emu10k2_chip = 1,
1547 .ca0102_chip = 1,
1548 .ca0151_chip = 1,
1549 .spdif_bug = 1,
1550 .ac97_chip = 1} ,
ae3a72d8 1551 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
18c71092 1552 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
aec72e0a 1553 .id = "Audigy",
56f5ceed
JCD		 1554 .emu10k2_chip = 1,
1555 .ca0102_chip = 1,
2668907a 1556 .ac97_chip = 1} ,
ae3a72d8 1557 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
18c71092 1558 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
2668907a
PZ		 1559 .id = "Audigy",
1560 .emu10k2_chip = 1,
1561 .ca0102_chip = 1,
ae3a72d8 1562 .spdif_bug = 1,
2668907a 1563 .ac97_chip = 1} ,
a6c17ec8 1564 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
18c71092 1565 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
a6c17ec8
AP		 1566 .id = "Audigy",
1567 .emu10k2_chip = 1,
1568 .ca0102_chip = 1,
1569 .ac97_chip = 1} ,
1da177e4 1570 {.vendor = 0x1102, .device = 0x0004,
18c71092 1571 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
aec72e0a 1572 .id = "Audigy",
1da177e4
LT		 1573 .emu10k2_chip = 1,
1574 .ca0102_chip = 1,
2668907a 1575 .ac97_chip = 1} ,
18c71092
VM		 1576 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1577 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1578 .id = "Live",
1579 .emu10k1_chip = 1,
1580 .ac97_chip = 1,
1581 .sblive51 = 1} ,
1582 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1583 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
f7de9cfd
MM		 1584 .id = "Live",
1585 .emu10k1_chip = 1,
1586 .ac97_chip = 1,
1587 .sblive51 = 1} ,
18c71092
VM		 1588 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1589 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
aec72e0a 1590 .id = "Live",
1da177e4 1591 .emu10k1_chip = 1,
2b637da5
LR		 1592 .ac97_chip = 1,
1593 .sblive51 = 1} ,
a6f6192b 1594 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
18c71092 1595 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
2b6b22f3
JCD		 1596 .id = "Live",
1597 .emu10k1_chip = 1,
1598 .ac97_chip = 1,
1599 .sblive51 = 1} ,
0ba656d0 1600 /* Tested by ALSA bug#1680 26th December 2005 */
18c71092
VM		 1601 /* note: It really has SB0220 written on the card, */
1602 /* but it's SB0228 according to kx.inf */
0ba656d0 1603 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
18c71092 1604 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
0ba656d0
JCD		 1605 .id = "Live",
1606 .emu10k1_chip = 1,
1607 .ac97_chip = 1,
1608 .sblive51 = 1} ,
c6c0b841
LR		 1609 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1610 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
18c71092 1611 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
a8ee7295
GT		 1612 .id = "Live",
1613 .emu10k1_chip = 1,
1614 .ac97_chip = 1,
1615 .sblive51 = 1} ,
a6f6192b 1616 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
18c71092 1617 .driver = "EMU10K1", .name = "SB Live! 5.1",
2b6b22f3
JCD		 1618 .id = "Live",
1619 .emu10k1_chip = 1,
1620 .ac97_chip = 1,
1621 .sblive51 = 1} ,
afe0f1f6 1622 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
a6f6192b 1623 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
18c71092 1624 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
2b6b22f3
JCD		 1625 .id = "Live",
1626 .emu10k1_chip = 1,
f12aa40c
TI		 1627 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1628 * share the same IDs!
1629 */
2b6b22f3 1630 .sblive51 = 1} ,
a6f6192b 1631 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
18c71092 1632 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
2b6b22f3
JCD		 1633 .id = "Live",
1634 .emu10k1_chip = 1,
1635 .ac97_chip = 1,
1636 .sblive51 = 1} ,
a6f6192b 1637 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
18c71092 1638 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
a6f6192b
JCD		 1639 .id = "Live",
1640 .emu10k1_chip = 1,
1641 .ac97_chip = 1} ,
1642 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
18c71092 1643 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
2b6b22f3
JCD		 1644 .id = "Live",
1645 .emu10k1_chip = 1,
1646 .ac97_chip = 1,
1647 .sblive51 = 1} ,
1648 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
18c71092 1649 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
2b6b22f3
JCD		 1650 .id = "Live",
1651 .emu10k1_chip = 1,
1652 .ac97_chip = 1,
1653 .sblive51 = 1} ,
a6f6192b 1654 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
18c71092 1655 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
aec72e0a 1656 .id = "Live",
2b637da5
LR		 1657 .emu10k1_chip = 1,
1658 .ac97_chip = 1,
1659 .sblive51 = 1} ,
88dc0e5d 1660 /* Tested by James@superbug.co.uk 3rd July 2005 */
a6f6192b 1661 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
18c71092 1662 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
2b6b22f3
JCD		 1663 .id = "Live",
1664 .emu10k1_chip = 1,
1665 .ac97_chip = 1,
1666 .sblive51 = 1} ,
a6f6192b 1667 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
18c71092 1668 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
2b6b22f3
JCD		 1669 .id = "Live",
1670 .emu10k1_chip = 1,
1671 .ac97_chip = 1,
1672 .sblive51 = 1} ,
a6f6192b 1673 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
18c71092 1674 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
2b6b22f3
JCD		 1675 .id = "Live",
1676 .emu10k1_chip = 1,
1677 .ac97_chip = 1,
1678 .sblive51 = 1} ,
a6f6192b 1679 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
18c71092 1680 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
2b6b22f3
JCD		 1681 .id = "Live",
1682 .emu10k1_chip = 1,
1683 .ac97_chip = 1,
1684 .sblive51 = 1} ,
a6f6192b 1685 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
18c71092 1686 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
a6f6192b 1687 .id = "APS",
2b6b22f3 1688 .emu10k1_chip = 1,
a6f6192b
JCD		 1689 .ecard = 1} ,
1690 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
18c71092 1691 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
2b6b22f3
JCD		 1692 .id = "Live",
1693 .emu10k1_chip = 1,
1694 .ac97_chip = 1,
1695 .sblive51 = 1} ,
a6f6192b 1696 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
18c71092 1697 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
2b6b22f3
JCD		 1698 .id = "Live",
1699 .emu10k1_chip = 1,
1700 .ac97_chip = 1,
1701 .sblive51 = 1} ,
1da177e4 1702 {.vendor = 0x1102, .device = 0x0002,
18c71092 1703 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
aec72e0a 1704 .id = "Live",
1da177e4 1705 .emu10k1_chip = 1,
2b637da5
LR		 1706 .ac97_chip = 1,
1707 .sblive51 = 1} ,
1da177e4
LT		 1708 { } /* terminator */
1709};
1710
eb4698f3 1711int __devinit snd_emu10k1_create(struct snd_card *card,
67679b1f 1712 struct pci_dev *pci,
1da177e4
LT		 1713 unsigned short extin_mask,
1714 unsigned short extout_mask,
1715 long max_cache_bytes,
1716 int enable_ir,
e66bc8b2 1717 uint subsystem,
67679b1f 1718 struct snd_emu10k1 **remu)
1da177e4 1719{
eb4698f3 1720 struct snd_emu10k1 *emu;
09668b44 1721 int idx, err;
1da177e4 1722 int is_audigy;
09668b44 1723 unsigned int silent_page;
eb4698f3
TI		 1724 const struct snd_emu_chip_details *c;
1725 static struct snd_device_ops ops = {
1da177e4
LT		 1726 .dev_free = snd_emu10k1_dev_free,
1727 };
67679b1f 1728
1da177e4
LT		 1729 *remu = NULL;
1730
1731 /* enable PCI device */
67679b1f
VM		 1732 err = pci_enable_device(pci);
1733 if (err < 0)
1da177e4
LT		 1734 return err;
1735
e560d8d8 1736 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1da177e4
LT		 1737 if (emu == NULL) {
1738 pci_disable_device(pci);
1739 return -ENOMEM;
1740 }
1741 emu->card = card;
1742 spin_lock_init(&emu->reg_lock);
1743 spin_lock_init(&emu->emu_lock);
c94fa4c9
JCD		 1744 spin_lock_init(&emu->spi_lock);
1745 spin_lock_init(&emu->i2c_lock);
1da177e4
LT		 1746 spin_lock_init(&emu->voice_lock);
1747 spin_lock_init(&emu->synth_lock);
1748 spin_lock_init(&emu->memblk_lock);
62932df8 1749 mutex_init(&emu->fx8010.lock);
1da177e4
LT		 1750 INIT_LIST_HEAD(&emu->mapped_link_head);
1751 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1752 emu->pci = pci;
1753 emu->irq = -1;
1754 emu->synth = NULL;
1755 emu->get_synth_voice = NULL;
1756 /* read revision & serial */
44c10138 1757 emu->revision = pci->revision;
1da177e4
LT		 1758 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1759 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
67679b1f 1760 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1da177e4
LT		 1761
1762 for (c = emu_chip_details; c->vendor; c++) {
1763 if (c->vendor == pci->vendor && c->device == pci->device) {
e66bc8b2 1764 if (subsystem) {
67679b1f 1765 if (c->subsystem && (c->subsystem == subsystem))
e66bc8b2 1766 break;
67679b1f
VM		 1767 else
1768 continue;
e66bc8b2 1769 } else {
67679b1f 1770 if (c->subsystem && (c->subsystem != emu->serial))
e66bc8b2
JCD		 1771 continue;
1772 if (c->revision && c->revision != emu->revision)
1773 continue;
1774 }
bdaed502 1775 break;
1da177e4
LT		 1776 }
1777 }
1778 if (c->vendor == 0) {
1779 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1780 kfree(emu);
1781 pci_disable_device(pci);
1782 return -ENOENT;
1783 }
1784 emu->card_capabilities = c;
e66bc8b2 1785 if (c->subsystem && !subsystem)
67679b1f
VM		 1786 snd_printdd("Sound card name = %s\n", c->name);
1787 else if (subsystem)
1788 snd_printdd("Sound card name = %s, "
1789 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1790 "Forced to subsytem = 0x%x\n", c->name,
1791 pci->vendor, pci->device, emu->serial, c->subsystem);
1792 else
1793 snd_printdd("Sound card name = %s, "
1794 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1795 c->name, pci->vendor, pci->device,
1796 emu->serial);
1797
85a655d6
TI		 1798 if (!*card->id && c->id) {
1799 int i, n = 0;
aec72e0a 1800 strlcpy(card->id, c->id, sizeof(card->id));
85a655d6
TI		 1801 for (;;) {
1802 for (i = 0; i < snd_ecards_limit; i++) {
1803 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1804 break;
1805 }
1806 if (i >= snd_ecards_limit)
1807 break;
1808 n++;
1809 if (n >= SNDRV_CARDS)
1810 break;
1811 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1812 }
1813 }
aec72e0a 1814
1da177e4
LT		 1815 is_audigy = emu->audigy = c->emu10k2_chip;
1816
1817 /* set the DMA transfer mask */
1818 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1819 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1820 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1821 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1822 kfree(emu);
1823 pci_disable_device(pci);
1824 return -ENXIO;
1825 }
1826 if (is_audigy)
1827 emu->gpr_base = A_FXGPREGBASE;
1828 else
1829 emu->gpr_base = FXGPREGBASE;
1830
67679b1f
VM		 1831 err = pci_request_regions(pci, "EMU10K1");
1832 if (err < 0) {
1da177e4
LT		 1833 kfree(emu);
1834 pci_disable_device(pci);
1835 return err;
1836 }
1837 emu->port = pci_resource_start(pci, 0);
1838
1da177e4
LT		 1839 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1840 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1841 32 * 1024, &emu->ptb_pages) < 0) {
09668b44
TI		 1842 err = -ENOMEM;
1843 goto error;
1da177e4
LT		 1844 }
1845
36726d9d
JJ		 1846 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1847 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1848 sizeof(unsigned long));
1da177e4 1849 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
09668b44
TI		 1850 err = -ENOMEM;
1851 goto error;
1da177e4
LT		 1852 }
1853
1854 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1855 EMUPAGESIZE, &emu->silent_page) < 0) {
09668b44
TI		 1856 err = -ENOMEM;
1857 goto error;
1da177e4
LT		 1858 }
1859 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1860 if (emu->memhdr == NULL) {
09668b44
TI		 1861 err = -ENOMEM;
1862 goto error;
1da177e4 1863 }
eb4698f3
TI		 1864 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1865 sizeof(struct snd_util_memblk);
1da177e4
LT		 1866
1867 pci_set_master(pci);
1868
1da177e4
LT		 1869 emu->fx8010.fxbus_mask = 0x303f;
1870 if (extin_mask == 0)
1871 extin_mask = 0x3fcf;
1872 if (extout_mask == 0)
1873 extout_mask = 0x7fff;
1874 emu->fx8010.extin_mask = extin_mask;
1875 emu->fx8010.extout_mask = extout_mask;
09668b44 1876 emu->enable_ir = enable_ir;
1da177e4 1877
d9e8a552 1878 if (emu->card_capabilities->ca_cardbus_chip) {
67679b1f
VM		 1879 err = snd_emu10k1_cardbus_init(emu);
1880 if (err < 0)
d9e8a552
JCD		 1881 goto error;
1882 }
2b637da5 1883 if (emu->card_capabilities->ecard) {
67679b1f
VM		 1884 err = snd_emu10k1_ecard_init(emu);
1885 if (err < 0)
09668b44 1886 goto error;
190d2c46 1887 } else if (emu->card_capabilities->emu_model) {
67679b1f
VM		 1888 err = snd_emu10k1_emu1010_init(emu);
1889 if (err < 0) {
1890 snd_emu10k1_free(emu);
1891 return err;
1892 }
1da177e4
LT		 1893 } else {
1894 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1895 does not support this, it shouldn't do any harm */
67679b1f
VM		 1896 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1897 AC97SLOT_CNTR|AC97SLOT_LFE);
1da177e4
LT		 1898 }
1899
09668b44
TI		 1900 /* initialize TRAM setup */
1901 emu->fx8010.itram_size = (16 * 1024)/2;
1902 emu->fx8010.etram_pages.area = NULL;
1903 emu->fx8010.etram_pages.bytes = 0;
1da177e4 1904
868e15db
JF		 1905 /* irq handler must be registered after I/O ports are activated */
1906 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1907 "EMU10K1", emu)) {
1908 err = -EBUSY;
1909 goto error;
1910 }
1911 emu->irq = pci->irq;
1912
09668b44
TI		 1913 /*
1914 * Init to 0x02109204 :
1915 * Clock accuracy = 0 (1000ppm)
1916 * Sample Rate = 2 (48kHz)
1917 * Audio Channel = 1 (Left of 2)
1918 * Source Number = 0 (Unspecified)
1919 * Generation Status = 1 (Original for Cat Code 12)
1920 * Cat Code = 12 (Digital Signal Mixer)
1921 * Mode = 0 (Mode 0)
1922 * Emphasis = 0 (None)
1923 * CP = 1 (Copyright unasserted)
1924 * AN = 0 (Audio data)
1925 * P = 0 (Consumer)
1926 */
1927 emu->spdif_bits[0] = emu->spdif_bits[1] =
1928 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1929 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1930 SPCS_GENERATIONSTATUS | 0x00001200 |
1931 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1932
1933 emu->reserved_page = (struct snd_emu10k1_memblk *)
1934 snd_emu10k1_synth_alloc(emu, 4096);
1935 if (emu->reserved_page)
1936 emu->reserved_page->map_locked = 1;
67679b1f 1937
09668b44
TI		 1938 /* Clear silent pages and set up pointers */
1939 memset(emu->silent_page.area, 0, PAGE_SIZE);
1940 silent_page = emu->silent_page.addr << 1;
1941 for (idx = 0; idx < MAXPAGES; idx++)
1942 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1943
1944 /* set up voice indices */
1945 for (idx = 0; idx < NUM_G; idx++) {
1946 emu->voices[idx].emu = emu;
1947 emu->voices[idx].number = idx;
1da177e4
LT		 1948 }
1949
67679b1f
VM		 1950 err = snd_emu10k1_init(emu, enable_ir, 0);
1951 if (err < 0)
09668b44
TI		 1952 goto error;
1953#ifdef CONFIG_PM
67679b1f
VM		 1954 err = alloc_pm_buffer(emu);
1955 if (err < 0)
09668b44
TI		 1956 goto error;
1957#endif
1958
1959 /* Initialize the effect engine */
67679b1f
VM		 1960 err = snd_emu10k1_init_efx(emu);
1961 if (err < 0)
09668b44
TI		 1962 goto error;
1963 snd_emu10k1_audio_enable(emu);
1964
67679b1f
VM		 1965 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1966 if (err < 0)
09668b44
TI		 1967 goto error;
1968
adf1b3d2 1969#ifdef CONFIG_PROC_FS
1da177e4 1970 snd_emu10k1_proc_init(emu);
adf1b3d2 1971#endif
1da177e4
LT		 1972
1973 snd_card_set_dev(card, &pci->dev);
1974 *remu = emu;
1975 return 0;
09668b44
TI		 1976
1977 error:
1978 snd_emu10k1_free(emu);
1979 return err;
1da177e4
LT		 1980}
1981
09668b44
TI		 1982#ifdef CONFIG_PM
1983static unsigned char saved_regs[] = {
1984 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1985 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1986 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1987 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1988 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1989 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1990 0xff /* end */
1991};
1992static unsigned char saved_regs_audigy[] = {
1993 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1994 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1995 0xff /* end */
1996};
1997
1998static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1999{
2000 int size;
2001
2002 size = ARRAY_SIZE(saved_regs);
2003 if (emu->audigy)
2004 size += ARRAY_SIZE(saved_regs_audigy);
2005 emu->saved_ptr = vmalloc(4 * NUM_G * size);
67679b1f 2006 if (!emu->saved_ptr)
09668b44
TI		 2007 return -ENOMEM;
2008 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2009 return -ENOMEM;
2010 if (emu->card_capabilities->ca0151_chip &&
2011 snd_p16v_alloc_pm_buffer(emu) < 0)
2012 return -ENOMEM;
2013 return 0;
2014}
2015
2016static void free_pm_buffer(struct snd_emu10k1 *emu)
2017{
2018 vfree(emu->saved_ptr);
2019 snd_emu10k1_efx_free_pm_buffer(emu);
2020 if (emu->card_capabilities->ca0151_chip)
2021 snd_p16v_free_pm_buffer(emu);
2022}
2023
2024void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2025{
2026 int i;
2027 unsigned char *reg;
2028 unsigned int *val;
2029
2030 val = emu->saved_ptr;
2031 for (reg = saved_regs; *reg != 0xff; reg++)
2032 for (i = 0; i < NUM_G; i++, val++)
2033 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2034 if (emu->audigy) {
2035 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2036 for (i = 0; i < NUM_G; i++, val++)
2037 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2038 }
2039 if (emu->audigy)
2040 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2041 emu->saved_hcfg = inl(emu->port + HCFG);
2042}
2043
2044void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2045{
d9e8a552
JCD		 2046 if (emu->card_capabilities->ca_cardbus_chip)
2047 snd_emu10k1_cardbus_init(emu);
09668b44
TI		 2048 if (emu->card_capabilities->ecard)
2049 snd_emu10k1_ecard_init(emu);
190d2c46 2050 else if (emu->card_capabilities->emu_model)
67679b1f 2051 snd_emu10k1_emu1010_init(emu);
09668b44
TI		 2052 else
2053 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2054 snd_emu10k1_init(emu, emu->enable_ir, 1);
2055}
2056
2057void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2058{
2059 int i;
2060 unsigned char *reg;
2061 unsigned int *val;
2062
2063 snd_emu10k1_audio_enable(emu);
2064
2065 /* resore for spdif */
2066 if (emu->audigy)
4130d59b
AP		 2067 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2068 outl(emu->saved_hcfg, emu->port + HCFG);
09668b44
TI		 2069
2070 val = emu->saved_ptr;
2071 for (reg = saved_regs; *reg != 0xff; reg++)
2072 for (i = 0; i < NUM_G; i++, val++)
2073 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2074 if (emu->audigy) {
2075 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2076 for (i = 0; i < NUM_G; i++, val++)
2077 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2078 }
2079}
2080#endif
Linux kernel - Deliverables
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