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ALSA: ice1724: M-Audio Audiophile192: Fix SPDIF input
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1_main.c
CommitLineData
1da177e4 1/*
c1017a4c 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4
LT		 3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
9f4bd5dd 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
1da177e4 7 * Added support for Audigy 2 Value.
9f4bd5dd
JCD		 8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
1da177e4
LT		 10 *
11 *
12 * BUGS:
13 * --
14 *
15 * TODO:
16 * --
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 */
33
42f53226
JCD		 34#include <linux/sched.h>
35#include <linux/kthread.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/init.h>
da155d5b 38#include <linux/module.h>
1da177e4
LT		 39#include <linux/interrupt.h>
40#include <linux/pci.h>
41#include <linux/slab.h>
42#include <linux/vmalloc.h>
62932df8
IM		 43#include <linux/mutex.h>
44
1da177e4
LT		 45
46#include <sound/core.h>
47#include <sound/emu10k1.h>
9f4bd5dd 48#include <linux/firmware.h>
1da177e4 49#include "p16v.h"
e2b15f8f 50#include "tina2.h"
184c1e2c 51#include "p17v.h"
1da177e4 52
19b99fba 53
7e0af29d
CL		 54#define HANA_FILENAME "emu/hana.fw"
55#define DOCK_FILENAME "emu/audio_dock.fw"
3663d845
JCD		 56#define EMU1010B_FILENAME "emu/emu1010b.fw"
57#define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
190d2c46 58#define EMU0404_FILENAME "emu/emu0404.fw"
d9e8a552 59#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
7e0af29d
CL		 60
61MODULE_FIRMWARE(HANA_FILENAME);
62MODULE_FIRMWARE(DOCK_FILENAME);
3663d845
JCD		 63MODULE_FIRMWARE(EMU1010B_FILENAME);
64MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
190d2c46 65MODULE_FIRMWARE(EMU0404_FILENAME);
d9e8a552 66MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
7e0af29d
CL		 67
68
1da177e4
LT		 69/*************************************************************************
70 * EMU10K1 init / done
71 *************************************************************************/
72
67679b1f 73void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
1da177e4
LT		 74{
75 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
76 snd_emu10k1_ptr_write(emu, IP, ch, 0);
77 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
79 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
80 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
81 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82
83 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
84 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
85 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
87 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
88 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89
90 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
91 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
92 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
93 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
94 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
95 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
97 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98
99 /*** these are last so OFF prevents writing ***/
100 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105
106 /* Audigy extra stuffs */
107 if (emu->audigy) {
108 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 }
116}
117
18f3c59f
JCD		 118static unsigned int spi_dac_init[] = {
119 0x00ff,
120 0x02ff,
121 0x0400,
122 0x0520,
123 0x0600,
124 0x08ff,
125 0x0aff,
126 0x0cff,
127 0x0eff,
128 0x10ff,
129 0x1200,
130 0x1400,
131 0x1480,
132 0x1800,
133 0x1aff,
134 0x1cff,
135 0x1e00,
136 0x0530,
137 0x0602,
138 0x0622,
139 0x1400,
140};
184c1e2c
JCD		 141
142static unsigned int i2c_adc_init[][2] = {
143 { 0x17, 0x00 }, /* Reset */
144 { 0x07, 0x00 }, /* Timeout */
145 { 0x0b, 0x22 }, /* Interface control */
146 { 0x0c, 0x22 }, /* Master mode control */
147 { 0x0d, 0x08 }, /* Powerdown control */
148 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
149 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
150 { 0x10, 0x7b }, /* ALC Control 1 */
151 { 0x11, 0x00 }, /* ALC Control 2 */
152 { 0x12, 0x32 }, /* ALC Control 3 */
153 { 0x13, 0x00 }, /* Noise gate control */
154 { 0x14, 0xa6 }, /* Limiter control */
67679b1f 155 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
184c1e2c 156};
67679b1f 157
09668b44 158static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
1da177e4 159{
1da177e4 160 unsigned int silent_page;
09668b44 161 int ch;
184c1e2c 162 u32 tmp;
1da177e4
LT		 163
164 /* disable audio and lock cache */
67679b1f
VM		 165 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
1da177e4
LT		 167
168 /* reset recording buffers */
169 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175
176 /* disable channel interrupt */
177 outl(0, emu->port + INTE);
178 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182
67679b1f 183 if (emu->audigy) {
1da177e4
LT		 184 /* set SPDIF bypass mode */
185 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186 /* enable rear left + rear right AC97 slots */
09668b44
TI		 187 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 AC97SLOT_REAR_LEFT);
1da177e4
LT		 189 }
190
191 /* init envelope engine */
09668b44 192 for (ch = 0; ch < NUM_G; ch++)
1da177e4 193 snd_emu10k1_voice_init(emu, ch);
1da177e4 194
09668b44
TI		 195 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
1da177e4 198
2b637da5 199 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4 200 /* Hacks for Alice3 to work independent of haP16V driver */
67679b1f 201 /* Setup SRCMulti_I2S SamplingRate */
1da177e4
LT		 202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 tmp &= 0xfffff1ff;
204 tmp |= (0x2<<9);
205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
67679b1f 206
1da177e4
LT		 207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209 /* Setup SRCMulti Input Audio Enable */
210 /* Use 0xFFFFFFFF to enable P16V sounds. */
211 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212
213 /* Enabled Phased (8-channel) P16V playback */
214 outl(0x0201, emu->port + HCFG2);
215 /* Set playback routing. */
fd9a98ec 216 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
1da177e4 217 }
e0474e53 218 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
1da177e4 219 /* Hacks for Alice3 to work independent of haP16V driver */
09668b44 220 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
67679b1f 221 /* Setup SRCMulti_I2S SamplingRate */
1da177e4
LT		 222 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223 tmp &= 0xfffff1ff;
224 tmp |= (0x2<<9);
225 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226
227 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228 outl(0x600000, emu->port + 0x20);
229 outl(0x14, emu->port + 0x24);
230
231 /* Setup SRCMulti Input Audio Enable */
232 outl(0x7b0000, emu->port + 0x20);
233 outl(0xFF000000, emu->port + 0x24);
234
235 /* Setup SPDIF Out Audio Enable */
236 /* The Audigy 2 Value has a separate SPDIF out,
237 * so no need for a mixer switch
238 */
239 outl(0x7a0000, emu->port + 0x20);
240 outl(0xFF000000, emu->port + 0x24);
241 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242 outl(tmp, emu->port + A_IOCFG);
243 }
27fe864e 244 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
18f3c59f
JCD		 245 int size, n;
246
247 size = ARRAY_SIZE(spi_dac_init);
9f4bd5dd 248 for (n = 0; n < size; n++)
18f3c59f
JCD		 249 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250
27fe864e 251 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
ccadc3e3
JCD		 252 /* Enable GPIOs
253 * GPIO0: Unknown
254 * GPIO1: Speakers-enabled.
255 * GPIO2: Unknown
256 * GPIO3: Unknown
257 * GPIO4: IEC958 Output on.
258 * GPIO5: Unknown
259 * GPIO6: Unknown
260 * GPIO7: Unknown
261 */
262 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
27fe864e 263 }
184c1e2c
JCD		 264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 int size, n;
266
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
67679b1f
VM		 274 for (n = 0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0] = 0xcf;
276 emu->i2c_capture_volume[n][1] = 0xcf;
184c1e2c 277 }
184c1e2c
JCD		 278 }
279
67679b1f 280
1da177e4
LT		 281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284
285 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
286 for (ch = 0; ch < NUM_G; ch++) {
287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 }
290
190d2c46 291 if (emu->card_capabilities->emu_model) {
9f4bd5dd
JCD		 292 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_EMU32_SLAVE |
294 HCFG_AUDIOENABLE, emu->port + HCFG);
1da177e4
LT		 295 /*
296 * Hokay, setup HCFG
297 * Mute Disable Audio = 0
298 * Lock Tank Memory = 1
299 * Lock Sound Memory = 0
300 * Auto Mute = 1
301 */
9f4bd5dd 302 } else if (emu->audigy) {
1da177e4
LT		 303 if (emu->revision == 4) /* audigy2 */
304 outl(HCFG_AUDIOENABLE |
305 HCFG_AC3ENABLE_CDSPDIF |
306 HCFG_AC3ENABLE_GPSPDIF |
307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 else
309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
e0474e53
JCD		 310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 * e.g. card_capabilities->joystick */
1da177e4
LT		 312 } else if (emu->model == 0x20 ||
313 emu->model == 0xc400 ||
314 (emu->model == 0x21 && emu->revision < 6))
315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 else
67679b1f 317 /* With on-chip joystick */
1da177e4
LT		 318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319
320 if (enable_ir) { /* enable IR for SB Live */
190d2c46 321 if (emu->card_capabilities->emu_model) {
9f4bd5dd 322 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 323 } else if (emu->card_capabilities->i2c_adc) {
324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 325 } else if (emu->audigy) {
1da177e4
LT		 326 unsigned int reg = inl(emu->port + A_IOCFG);
327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 udelay(500);
329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 udelay(100);
331 outl(reg, emu->port + A_IOCFG);
332 } else {
333 unsigned int reg = inl(emu->port + HCFG);
334 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 udelay(500);
336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 udelay(100);
338 outl(reg, emu->port + HCFG);
67679b1f 339 }
1da177e4 340 }
67679b1f 341
190d2c46 342 if (emu->card_capabilities->emu_model) {
9f4bd5dd 343 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 344 } else if (emu->card_capabilities->i2c_adc) {
345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 346 } else if (emu->audigy) { /* enable analog output */
1da177e4
LT		 347 unsigned int reg = inl(emu->port + A_IOCFG);
348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 }
350
09668b44
TI		 351 return 0;
352}
1da177e4 353
09668b44
TI		 354static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
355{
1da177e4
LT		 356 /*
357 * Enable the audio bit
358 */
359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360
361 /* Enable analog/digital outs on audigy */
190d2c46 362 if (emu->card_capabilities->emu_model) {
9f4bd5dd 363 ; /* Disable all access to A_IOCFG for the emu1010 */
184c1e2c
JCD		 364 } else if (emu->card_capabilities->i2c_adc) {
365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
19b99fba 366 } else if (emu->audigy) {
1da177e4 367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
67679b1f 368
e0474e53 369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT		 370 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
371 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 * So, sequence is important. */
373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
e0474e53 374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
1da177e4
LT		 375 /* Unmute Analog now. */
376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 } else {
378 /* Disable routing from AC97 line out to Front speakers */
379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 }
381 }
67679b1f 382
1da177e4
LT		 383#if 0
384 {
385 unsigned int tmp;
386 /* FIXME: the following routine disables LiveDrive-II !! */
67679b1f 387 /* TOSLink detection */
1da177e4
LT		 388 emu->tos_link = 0;
389 tmp = inl(emu->port + HCFG);
390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 outl(tmp|0x800, emu->port + HCFG);
392 udelay(50);
393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 emu->tos_link = 1;
395 outl(tmp, emu->port + HCFG);
396 }
397 }
398 }
399#endif
400
401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
1da177e4
LT		 402}
403
67679b1f 404int snd_emu10k1_done(struct snd_emu10k1 *emu)
1da177e4
LT		 405{
406 int ch;
407
408 outl(0, emu->port + INTE);
409
410 /*
411 * Shutdown the chip
412 */
413 for (ch = 0; ch < NUM_G; ch++)
414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 for (ch = 0; ch < NUM_G; ch++) {
416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
420 }
421
422 /* reset recording buffers */
423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 if (emu->audigy)
433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 else
435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436
437 /* disable channel interrupt */
438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442
1da177e4
LT		 443 /* disable audio and lock cache */
444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
446
1da177e4
LT		 447 return 0;
448}
449
450/*************************************************************************
451 * ECARD functional implementation
452 *************************************************************************/
453
454/* In A1 Silicon, these bits are in the HC register */
455#define HOOKN_BIT (1L << 12)
456#define HANDN_BIT (1L << 11)
457#define PULSEN_BIT (1L << 10)
458
459#define EC_GDI1 (1 << 13)
460#define EC_GDI0 (1 << 14)
461
462#define EC_NUM_CONTROL_BITS 20
463
464#define EC_AC3_DATA_SELN 0x0001L
465#define EC_EE_DATA_SEL 0x0002L
466#define EC_EE_CNTRL_SELN 0x0004L
467#define EC_EECLK 0x0008L
468#define EC_EECS 0x0010L
469#define EC_EESDO 0x0020L
470#define EC_TRIM_CSN 0x0040L
471#define EC_TRIM_SCLK 0x0080L
472#define EC_TRIM_SDATA 0x0100L
473#define EC_TRIM_MUTEN 0x0200L
474#define EC_ADCCAL 0x0400L
475#define EC_ADCRSTN 0x0800L
476#define EC_DACCAL 0x1000L
477#define EC_DACMUTEN 0x2000L
478#define EC_LEDN 0x4000L
479
480#define EC_SPDIF0_SEL_SHIFT 15
481#define EC_SPDIF1_SEL_SHIFT 17
482#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
483#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
484#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
487 * be incremented any time the EEPROM's
488 * format is changed. */
489
490#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491
492/* Addresses for special values stored in to EEPROM */
493#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
494#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
495#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496
497#define EC_LAST_PROMFILE_ADDR 0x2f
498
67679b1f 499#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
1da177e4
LT		 500 * can be up to 30 characters in length
501 * and is stored as a NULL-terminated
502 * ASCII string. Any unused bytes must be
503 * filled with zeros */
504#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
505
506
67679b1f
VM		 507/* Most of this stuff is pretty self-evident. According to the hardware
508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
1da177e4
LT		 509 * offset problem. Weird.
510 */
511#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
512 EC_TRIM_CSN)
513
514
515#define EC_DEFAULT_ADC_GAIN 0xC4C4
516#define EC_DEFAULT_SPDIF0_SEL 0x0
517#define EC_DEFAULT_SPDIF1_SEL 0x4
518
519/**************************************************************************
520 * @func Clock bits into the Ecard's control latch. The Ecard uses a
521 * control latch will is loaded bit-serially by toggling the Modem control
522 * lines from function 2 on the E8010. This function hides these details
523 * and presents the illusion that we are actually writing to a distinct
524 * register.
525 */
526
67679b1f 527static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
1da177e4
LT		 528{
529 unsigned short count;
530 unsigned int data;
531 unsigned long hc_port;
532 unsigned int hc_value;
533
534 hc_port = emu->port + HCFG;
535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 outl(hc_value, hc_port);
537
538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539
540 /* Set up the value */
541 data = ((value & 0x1) ? PULSEN_BIT : 0);
542 value >>= 1;
543
544 outl(hc_value | data, hc_port);
545
546 /* Clock the shift register */
547 outl(hc_value | data | HANDN_BIT, hc_port);
548 outl(hc_value | data, hc_port);
549 }
550
551 /* Latch the bits */
552 outl(hc_value | HOOKN_BIT, hc_port);
553 outl(hc_value, hc_port);
554}
555
556/**************************************************************************
557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
558 * trim value consists of a 16bit value which is composed of two
559 * 8 bit gain/trim values, one for the left channel and one for the
560 * right channel. The following table maps from the Gain/Attenuation
561 * value in decibels into the corresponding bit pattern for a single
562 * channel.
563 */
564
67679b1f 565static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
1da177e4
LT		 566 unsigned short gain)
567{
568 unsigned int bit;
569
570 /* Enable writing to the TRIM registers */
571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572
573 /* Do it again to insure that we meet hold time requirements */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575
576 for (bit = (1 << 15); bit; bit >>= 1) {
577 unsigned int value;
67679b1f 578
1da177e4
LT		 579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
580
581 if (gain & bit)
582 value |= EC_TRIM_SDATA;
583
584 /* Clock the bit */
585 snd_emu10k1_ecard_write(emu, value);
586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 snd_emu10k1_ecard_write(emu, value);
588 }
589
590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
591}
592
67679b1f 593static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
1da177e4
LT		 594{
595 unsigned int hc_value;
596
597 /* Set up the initial settings */
598 emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601
67679b1f 602 /* Step 0: Set the codec type in the hardware control register
1da177e4
LT		 603 * and enable audio output */
604 hc_value = inl(emu->port + HCFG);
605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 inl(emu->port + HCFG);
607
608 /* Step 1: Turn off the led and deassert TRIM_CS */
609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610
611 /* Step 2: Calibrate the ADC and DAC */
612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613
614 /* Step 3: Wait for awhile; XXX We can't get away with this
615 * under a real operating system; we'll need to block and wait that
616 * way. */
617 snd_emu10k1_wait(emu, 48000);
618
619 /* Step 4: Switch off the DAC and ADC calibration. Note
620 * That ADC_CAL is actually an inverted signal, so we assert
621 * it here to stop calibration. */
622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623
624 /* Step 4: Switch into run mode */
625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626
627 /* Step 5: Set the analog input gain */
628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
629
630 return 0;
631}
632
67679b1f 633static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
d83c671f
JCD		 634{
635 unsigned long special_port;
636 unsigned int value;
637
638 /* Special initialisation routine
639 * before the rest of the IO-Ports become active.
640 */
641 special_port = emu->port + 0x38;
642 value = inl(special_port);
643 outl(0x00d00000, special_port);
644 value = inl(special_port);
645 outl(0x00d00001, special_port);
646 value = inl(special_port);
647 outl(0x00d0005f, special_port);
648 value = inl(special_port);
649 outl(0x00d0007f, special_port);
650 value = inl(special_port);
651 outl(0x0090007f, special_port);
652 value = inl(special_port);
653
e2b15f8f 654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
c94fa4c9
JCD		 655 /* Delay to give time for ADC chip to switch on. It needs 113ms */
656 msleep(200);
d83c671f
JCD		 657 return 0;
658}
659
b209c4df 660static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu)
19b99fba 661{
9f4bd5dd
JCD		 662 int n, i;
663 int reg;
664 int value;
190d2c46
JCD		 665 unsigned int write_post;
666 unsigned long flags;
b209c4df 667 const struct firmware *fw_entry = emu->firmware;
9f4bd5dd 668
b209c4df
TI		 669 if (!fw_entry)
670 return -EIO;
19b99fba 671
9f4bd5dd
JCD		 672 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
673 /* GPIO7 -> FPGA PGMN
674 * GPIO6 -> FPGA CCLK
675 * GPIO5 -> FPGA DIN
676 * FPGA CONFIG OFF -> FPGA PGMN
677 */
190d2c46 678 spin_lock_irqsave(&emu->emu_lock, flags);
9f4bd5dd 679 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
190d2c46
JCD		 680 write_post = inl(emu->port + A_IOCFG);
681 udelay(100);
9f4bd5dd 682 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
190d2c46 683 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 684 udelay(100); /* Allow FPGA memory to clean */
67679b1f
VM		 685 for (n = 0; n < fw_entry->size; n++) {
686 value = fw_entry->data[n];
687 for (i = 0; i < 8; i++) {
9f4bd5dd
JCD		 688 reg = 0x80;
689 if (value & 0x1)
690 reg = reg | 0x20;
67679b1f 691 value = value >> 1;
9f4bd5dd 692 outl(reg, emu->port + A_IOCFG);
190d2c46 693 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd 694 outl(reg | 0x40, emu->port + A_IOCFG);
190d2c46 695 write_post = inl(emu->port + A_IOCFG);
9f4bd5dd
JCD		 696 }
697 }
698 /* After programming, set GPIO bit 4 high again. */
699 outl(0x10, emu->port + A_IOCFG);
190d2c46
JCD		 700 write_post = inl(emu->port + A_IOCFG);
701 spin_unlock_irqrestore(&emu->emu_lock, flags);
19b99fba
JCD		 702
703 return 0;
704}
705
bd3d1c20
TI		 706static int emu1010_firmware_thread(void *data)
707{
67679b1f 708 struct snd_emu10k1 *emu = data;
730d45f9 709 u32 tmp, tmp2, reg;
42f53226
JCD		 710 int err;
711
712 for (;;) {
713 /* Delay to allow Audio Dock to settle */
190d2c46 714 msleep_interruptible(1000);
42f53226
JCD		 715 if (kthread_should_stop())
716 break;
2efa1d59 717#ifdef CONFIG_PM_SLEEP
4f86f120
TI		 718 if (emu->suspend)
719 continue;
2efa1d59 720#endif
67679b1f
VM		 721 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
722 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
42f53226
JCD		 723 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
724 /* Audio Dock attached */
725 /* Return to Audio Dock programming mode */
726 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
67679b1f 727 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
b209c4df
TI		 728 err = snd_emu1010_load_firmware(emu);
729 if (err != 0)
730 continue;
42f53226 731
67679b1f
VM		 732 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
733 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
734 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
42f53226 735 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
67679b1f
VM		 736 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
737 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
42f53226
JCD		 738 if ((reg & 0x1f) != 0x15) {
739 /* FPGA failed to be programmed */
67679b1f 740 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
190d2c46 741 continue;
42f53226
JCD		 742 }
743 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
67679b1f
VM		 744 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
745 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
730d45f9 746 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
28a97c19 747 tmp, tmp2);
c93d1c25
JCD		 748 /* Sync clocking between 1010 and Dock */
749 /* Allow DLL to settle */
750 msleep(10);
751 /* Unmute all. Default is muted after a firmware load */
67679b1f 752 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
42f53226
JCD		 753 }
754 }
190d2c46 755 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
42f53226
JCD		 756 return 0;
757}
758
13d45709
PH		 759/*
760 * EMU-1010 - details found out from this driver, official MS Win drivers,
761 * testing the card:
762 *
763 * Audigy2 (aka Alice2):
764 * ---------------------
765 * * communication over PCI
766 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
767 * to 2 x 16-bit, using internal DSP instructions
768 * * slave mode, clock supplied by HANA
769 * * linked to HANA using:
770 * 32 x 32-bit serial EMU32 output channels
771 * 16 x EMU32 input channels
772 * (?) x I2S I/O channels (?)
773 *
774 * FPGA (aka HANA):
775 * ---------------
776 * * provides all (?) physical inputs and outputs of the card
777 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
778 * * provides clock signal for the card and Alice2
779 * * two crystals - for 44.1kHz and 48kHz multiples
780 * * provides internal routing of signal sources to signal destinations
781 * * inputs/outputs to Alice2 - see above
782 *
783 * Current status of the driver:
784 * ----------------------------
785 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
786 * * PCM device nb. 2:
787 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
788 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
789 */
67679b1f 790static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
19b99fba
JCD		 791{
792 unsigned int i;
730d45f9 793 u32 tmp, tmp2, reg;
9f4bd5dd 794 int err;
9f4bd5dd
JCD		 795
796 snd_printk(KERN_INFO "emu1010: Special config.\n");
797 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
798 * Lock Sound Memory Cache, Lock Tank Memory Cache,
799 * Mute all codecs.
800 */
19b99fba 801 outl(0x0005a00c, emu->port + HCFG);
9f4bd5dd
JCD		 802 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
803 * Lock Tank Memory Cache,
804 * Mute all codecs.
805 */
67679b1f 806 outl(0x0005a004, emu->port + HCFG);
9f4bd5dd
JCD		 807 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
808 * Mute all codecs.
809 */
19b99fba 810 outl(0x0005a000, emu->port + HCFG);
9f4bd5dd
JCD		 811 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
812 * Mute all codecs.
813 */
19b99fba
JCD		 814 outl(0x0005a000, emu->port + HCFG);
815
9f4bd5dd 816 /* Disable 48Volt power to Audio Dock */
67679b1f 817 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
9f4bd5dd
JCD		 818
819 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
67679b1f
VM		 820 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
821 snd_printdd("reg1 = 0x%x\n", reg);
d9e8a552 822 if ((reg & 0x3f) == 0x15) {
9f4bd5dd
JCD		 823 /* FPGA netlist already present so clear it */
824 /* Return to programming mode */
825
67679b1f 826 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
19b99fba 827 }
67679b1f
VM		 828 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
829 snd_printdd("reg2 = 0x%x\n", reg);
d9e8a552 830 if ((reg & 0x3f) == 0x15) {
9f4bd5dd 831 /* FPGA failed to return to programming mode */
d9e8a552 832 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
9f4bd5dd 833 return -ENODEV;
19b99fba 834 }
67679b1f 835 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
b209c4df
TI		 836
837 if (!emu->firmware) {
838 const char *filename;
839 switch (emu->card_capabilities->emu_model) {
840 case EMU_MODEL_EMU1010:
841 filename = HANA_FILENAME;
842 break;
843 case EMU_MODEL_EMU1010B:
844 filename = EMU1010B_FILENAME;
845 break;
846 case EMU_MODEL_EMU1616:
847 filename = EMU1010_NOTEBOOK_FILENAME;
848 break;
849 case EMU_MODEL_EMU0404:
850 filename = EMU0404_FILENAME;
851 break;
852 default:
853 return -ENODEV;
854 }
855
856 err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
857 if (err != 0) {
858 snd_printk(KERN_ERR "emu1010: firmware: %s not found. Err = %d\n", filename, err);
859 return err;
860 }
861 snd_printk(KERN_INFO "emu1010: firmware file = %s, size = 0x%zx\n",
862 filename, emu->firmware->size);
d2821599
MZ		 863 err = snd_emu1010_load_firmware(emu);
864 if (err != 0) {
865 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", filename);
866 return err;
867 }
19b99fba 868 }
9f4bd5dd
JCD		 869
870 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
67679b1f 871 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
d9e8a552 872 if ((reg & 0x3f) != 0x15) {
9f4bd5dd 873 /* FPGA failed to be programmed */
67679b1f 874 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
9f4bd5dd 875 return -ENODEV;
19b99fba 876 }
19b99fba 877
9f4bd5dd 878 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
67679b1f
VM		 879 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
880 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
730d45f9 881 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
9f4bd5dd 882 /* Enable 48Volt power to Audio Dock */
67679b1f 883 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
9f4bd5dd 884
67679b1f
VM		 885 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
886 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
887 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
888 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
889 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
edec7bbb 890 /* Optical -> ADAT I/O */
f93abe51
JCD		 891 /* 0 : SPDIF
892 * 1 : ADAT
893 */
894 emu->emu1010.optical_in = 1; /* IN_ADAT */
895 emu->emu1010.optical_out = 1; /* IN_ADAT */
896 tmp = 0;
897 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
898 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
67679b1f
VM		 899 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
900 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
9f4bd5dd 901 /* Set no attenuation on Audio Dock pads. */
67679b1f 902 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
9148cc50 903 emu->emu1010.adc_pads = 0x00;
67679b1f 904 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
9f4bd5dd 905 /* Unmute Audio dock DACs, Headphone source DAC-4. */
67679b1f
VM		 906 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
907 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
908 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
9148cc50 909 /* DAC PADs. */
67679b1f 910 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
9148cc50 911 emu->emu1010.dac_pads = 0x0f;
67679b1f
VM		 912 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
913 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
914 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
9f4bd5dd 915 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
67679b1f 916 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
9f4bd5dd 917 /* MIDI routing */
67679b1f 918 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
9f4bd5dd 919 /* Unknown. */
67679b1f 920 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
fb9b5a0e 921 /* IRQ Enable: All on */
67679b1f 922 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
9f4bd5dd 923 /* IRQ Enable: All off */
67679b1f 924 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
9f4bd5dd 925
67679b1f
VM		 926 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
927 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
9f4bd5dd 928 /* Default WCLK set to 48kHz. */
67679b1f 929 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
9f4bd5dd 930 /* Word Clock source, Internal 48kHz x1 */
67679b1f
VM		 931 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
932 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
9f4bd5dd 933 /* Audio Dock LEDs. */
67679b1f 934 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
19b99fba 935
9f4bd5dd
JCD		 936#if 0
937 /* For 96kHz */
938 snd_emu1010_fpga_link_dst_src_write(emu,
939 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
940 snd_emu1010_fpga_link_dst_src_write(emu,
941 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
942 snd_emu1010_fpga_link_dst_src_write(emu,
943 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
944 snd_emu1010_fpga_link_dst_src_write(emu,
945 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
946#endif
947#if 0
948 /* For 192kHz */
949 snd_emu1010_fpga_link_dst_src_write(emu,
950 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
951 snd_emu1010_fpga_link_dst_src_write(emu,
952 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
953 snd_emu1010_fpga_link_dst_src_write(emu,
954 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
955 snd_emu1010_fpga_link_dst_src_write(emu,
956 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
957 snd_emu1010_fpga_link_dst_src_write(emu,
958 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
961 snd_emu1010_fpga_link_dst_src_write(emu,
962 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
963 snd_emu1010_fpga_link_dst_src_write(emu,
964 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
965#endif
966#if 1
967 /* For 48kHz */
968 snd_emu1010_fpga_link_dst_src_write(emu,
969 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
970 snd_emu1010_fpga_link_dst_src_write(emu,
971 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
972 snd_emu1010_fpga_link_dst_src_write(emu,
973 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
974 snd_emu1010_fpga_link_dst_src_write(emu,
975 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
976 snd_emu1010_fpga_link_dst_src_write(emu,
977 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
978 snd_emu1010_fpga_link_dst_src_write(emu,
979 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
980 snd_emu1010_fpga_link_dst_src_write(emu,
981 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
982 snd_emu1010_fpga_link_dst_src_write(emu,
983 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
13d45709
PH		 984 /* Pavel Hofman - setting defaults for 8 more capture channels
985 * Defaults only, users will set their own values anyways, let's
986 * just copy/paste.
987 */
67679b1f 988
13d45709
PH		 989 snd_emu1010_fpga_link_dst_src_write(emu,
990 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
991 snd_emu1010_fpga_link_dst_src_write(emu,
992 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
993 snd_emu1010_fpga_link_dst_src_write(emu,
994 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
995 snd_emu1010_fpga_link_dst_src_write(emu,
996 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
9f4bd5dd
JCD		 1005#endif
1006#if 0
1007 /* Original */
1008 snd_emu1010_fpga_link_dst_src_write(emu,
1009 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1010 snd_emu1010_fpga_link_dst_src_write(emu,
1011 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1012 snd_emu1010_fpga_link_dst_src_write(emu,
1013 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1014 snd_emu1010_fpga_link_dst_src_write(emu,
1015 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1016 snd_emu1010_fpga_link_dst_src_write(emu,
1017 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1018 snd_emu1010_fpga_link_dst_src_write(emu,
1019 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1020 snd_emu1010_fpga_link_dst_src_write(emu,
1021 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1022 snd_emu1010_fpga_link_dst_src_write(emu,
1023 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1024 snd_emu1010_fpga_link_dst_src_write(emu,
1025 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1026 snd_emu1010_fpga_link_dst_src_write(emu,
1027 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1028 snd_emu1010_fpga_link_dst_src_write(emu,
1029 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1030 snd_emu1010_fpga_link_dst_src_write(emu,
1031 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1032#endif
67679b1f
VM		 1033 for (i = 0; i < 0x20; i++) {
1034 /* AudioDock Elink <- Silence */
1035 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
9f4bd5dd 1036 }
67679b1f 1037 for (i = 0; i < 4; i++) {
9f4bd5dd 1038 /* Hana SPDIF Out <- Silence */
67679b1f 1039 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
9f4bd5dd 1040 }
67679b1f 1041 for (i = 0; i < 7; i++) {
9f4bd5dd 1042 /* Hamoa DAC <- Silence */
67679b1f 1043 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
9f4bd5dd 1044 }
67679b1f 1045 for (i = 0; i < 7; i++) {
9f4bd5dd
JCD		 1046 /* Hana ADAT Out <- Silence */
1047 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1048 }
1049 snd_emu1010_fpga_link_dst_src_write(emu,
1050 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1051 snd_emu1010_fpga_link_dst_src_write(emu,
1052 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1053 snd_emu1010_fpga_link_dst_src_write(emu,
1054 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1055 snd_emu1010_fpga_link_dst_src_write(emu,
1056 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1057 snd_emu1010_fpga_link_dst_src_write(emu,
1058 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1059 snd_emu1010_fpga_link_dst_src_write(emu,
1060 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
67679b1f
VM		 1061 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1062
1063 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
9f4bd5dd 1064
9f4bd5dd
JCD		 1065 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1066 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1067 * Mute all codecs.
1068 */
67679b1f 1069 outl(0x0000a000, emu->port + HCFG);
9f4bd5dd
JCD		 1070 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1071 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1072 * Un-Mute all codecs.
1073 */
19b99fba 1074 outl(0x0000a001, emu->port + HCFG);
67679b1f 1075
19b99fba
JCD		 1076 /* Initial boot complete. Now patches */
1077
67679b1f
VM		 1078 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1079 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1080 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1081 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1082 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1083 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1084 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
9f4bd5dd 1085
42f53226 1086 /* Start Micro/Audio Dock firmware loader thread */
bd3d1c20
TI		 1087 if (!emu->emu1010.firmware_thread) {
1088 emu->emu1010.firmware_thread =
1089 kthread_create(emu1010_firmware_thread, emu,
1090 "emu1010_firmware");
1091 wake_up_process(emu->emu1010.firmware_thread);
1092 }
3663d845 1093
9f4bd5dd
JCD		 1094#if 0
1095 snd_emu1010_fpga_link_dst_src_write(emu,
1096 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1097 snd_emu1010_fpga_link_dst_src_write(emu,
1098 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1101 snd_emu1010_fpga_link_dst_src_write(emu,
1102 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1103#endif
1104 /* Default outputs */
3839e4f1 1105 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1c02e366
CF		 1106 /* 1616(M) cardbus default outputs */
1107 /* ALICE2 bus 0xa0 */
1108 snd_emu1010_fpga_link_dst_src_write(emu,
1109 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1110 emu->emu1010.output_source[0] = 17;
1111 snd_emu1010_fpga_link_dst_src_write(emu,
1112 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1113 emu->emu1010.output_source[1] = 18;
1114 snd_emu1010_fpga_link_dst_src_write(emu,
1115 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1116 emu->emu1010.output_source[2] = 19;
1117 snd_emu1010_fpga_link_dst_src_write(emu,
1118 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1119 emu->emu1010.output_source[3] = 20;
1120 snd_emu1010_fpga_link_dst_src_write(emu,
1121 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1122 emu->emu1010.output_source[4] = 21;
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1125 emu->emu1010.output_source[5] = 22;
1126 /* ALICE2 bus 0xa0 */
1127 snd_emu1010_fpga_link_dst_src_write(emu,
1128 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1129 emu->emu1010.output_source[16] = 17;
1130 snd_emu1010_fpga_link_dst_src_write(emu,
1131 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1132 emu->emu1010.output_source[17] = 18;
1133 } else {
1134 /* ALICE2 bus 0xa0 */
1135 snd_emu1010_fpga_link_dst_src_write(emu,
1136 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1137 emu->emu1010.output_source[0] = 21;
1138 snd_emu1010_fpga_link_dst_src_write(emu,
1139 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1140 emu->emu1010.output_source[1] = 22;
1141 snd_emu1010_fpga_link_dst_src_write(emu,
1142 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1143 emu->emu1010.output_source[2] = 23;
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1146 emu->emu1010.output_source[3] = 24;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1149 emu->emu1010.output_source[4] = 25;
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1152 emu->emu1010.output_source[5] = 26;
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1155 emu->emu1010.output_source[6] = 27;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1158 emu->emu1010.output_source[7] = 28;
1159 /* ALICE2 bus 0xa0 */
1160 snd_emu1010_fpga_link_dst_src_write(emu,
1161 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1162 emu->emu1010.output_source[8] = 21;
1163 snd_emu1010_fpga_link_dst_src_write(emu,
1164 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1165 emu->emu1010.output_source[9] = 22;
1166 /* ALICE2 bus 0xa0 */
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1169 emu->emu1010.output_source[10] = 21;
1170 snd_emu1010_fpga_link_dst_src_write(emu,
1171 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1172 emu->emu1010.output_source[11] = 22;
1173 /* ALICE2 bus 0xa0 */
1174 snd_emu1010_fpga_link_dst_src_write(emu,
1175 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1176 emu->emu1010.output_source[12] = 21;
1177 snd_emu1010_fpga_link_dst_src_write(emu,
1178 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1179 emu->emu1010.output_source[13] = 22;
1180 /* ALICE2 bus 0xa0 */
1181 snd_emu1010_fpga_link_dst_src_write(emu,
1182 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1183 emu->emu1010.output_source[14] = 21;
1184 snd_emu1010_fpga_link_dst_src_write(emu,
1185 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1186 emu->emu1010.output_source[15] = 22;
1187 /* ALICE2 bus 0xa0 */
1188 snd_emu1010_fpga_link_dst_src_write(emu,
1189 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1190 emu->emu1010.output_source[16] = 21;
1191 snd_emu1010_fpga_link_dst_src_write(emu,
1192 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1193 emu->emu1010.output_source[17] = 22;
1194 snd_emu1010_fpga_link_dst_src_write(emu,
1195 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1196 emu->emu1010.output_source[18] = 23;
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1199 emu->emu1010.output_source[19] = 24;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1202 emu->emu1010.output_source[20] = 25;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1205 emu->emu1010.output_source[21] = 26;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1208 emu->emu1010.output_source[22] = 27;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1211 emu->emu1010.output_source[23] = 28;
1212 }
9f4bd5dd 1213 /* TEMP: Select SPDIF in/out */
67679b1f 1214 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
9f4bd5dd
JCD		 1215
1216 /* TEMP: Select 48kHz SPDIF out */
1217 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1218 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1219 /* Word Clock source, Internal 48kHz x1 */
67679b1f
VM		 1220 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1221 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
b0dbdaea 1222 emu->emu1010.internal_clock = 1; /* 48000 */
67679b1f 1223 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
9f4bd5dd 1224 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
67679b1f
VM		 1225 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1226 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1227 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
19b99fba
JCD		 1228
1229 return 0;
1230}
1da177e4
LT		 1231/*
1232 * Create the EMU10K1 instance
1233 */
1234
c7561cd8 1235#ifdef CONFIG_PM_SLEEP
09668b44
TI		 1236static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1237static void free_pm_buffer(struct snd_emu10k1 *emu);
1238#endif
1239
eb4698f3 1240static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1da177e4
LT		 1241{
1242 if (emu->port) { /* avoid access to already used hardware */
67679b1f 1243 snd_emu10k1_fx8010_tram_setup(emu, 0);
1da177e4 1244 snd_emu10k1_done(emu);
09668b44 1245 snd_emu10k1_free_efx(emu);
67679b1f 1246 }
3839e4f1 1247 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
9f4bd5dd 1248 /* Disable 48Volt power to Audio Dock */
67679b1f 1249 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
9f4bd5dd 1250 }
bd3d1c20 1251 if (emu->emu1010.firmware_thread)
190d2c46 1252 kthread_stop(emu->emu1010.firmware_thread);
b209c4df
TI		 1253 if (emu->firmware)
1254 release_firmware(emu->firmware);
ebf029da
TI		 1255 if (emu->irq >= 0)
1256 free_irq(emu->irq, emu);
1257 /* remove reserved page */
1258 if (emu->reserved_page) {
1259 snd_emu10k1_synth_free(emu,
1260 (struct snd_util_memblk *)emu->reserved_page);
1261 emu->reserved_page = NULL;
1262 }
1da177e4
LT		 1263 if (emu->memhdr)
1264 snd_util_memhdr_free(emu->memhdr);
1265 if (emu->silent_page.area)
1266 snd_dma_free_pages(&emu->silent_page);
1267 if (emu->ptb_pages.area)
1268 snd_dma_free_pages(&emu->ptb_pages);
1269 vfree(emu->page_ptr_table);
1270 vfree(emu->page_addr_table);
c7561cd8 1271#ifdef CONFIG_PM_SLEEP
09668b44
TI		 1272 free_pm_buffer(emu);
1273#endif
1da177e4
LT		 1274 if (emu->port)
1275 pci_release_regions(emu->pci);
67679b1f 1276 if (emu->card_capabilities->ca0151_chip) /* P16V */
1da177e4 1277 snd_p16v_free(emu);
09668b44 1278 pci_disable_device(emu->pci);
1da177e4
LT		 1279 kfree(emu);
1280 return 0;
1281}
1282
eb4698f3 1283static int snd_emu10k1_dev_free(struct snd_device *device)
1da177e4 1284{
eb4698f3 1285 struct snd_emu10k1 *emu = device->device_data;
1da177e4
LT		 1286 return snd_emu10k1_free(emu);
1287}
1288
eb4698f3 1289static struct snd_emu_chip_details emu_chip_details[] = {
21fdddea
JCD		 1290 /* Audigy4 (Not PRO) SB0610 */
1291 /* Tested by James@superbug.co.uk 4th April 2006 */
1292 /* A_IOCFG bits
1293 * Output
1294 * 0: ?
1295 * 1: ?
1296 * 2: ?
1297 * 3: 0 - Digital Out, 1 - Line in
1298 * 4: ?
1299 * 5: ?
1300 * 6: ?
1301 * 7: ?
1302 * Input
1303 * 8: ?
1304 * 9: ?
1305 * A: Green jack sense (Front)
1306 * B: ?
1307 * C: Black jack sense (Rear/Side Right)
1308 * D: Yellow jack sense (Center/LFE/Side Left)
1309 * E: ?
1310 * F: ?
1311 *
1312 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1313 * 0 - Digital Out
1314 * 1 - Line in
1315 */
1316 /* Mic input not tested.
1317 * Analog CD input not tested
1318 * Digital Out not tested.
1319 * Line in working.
1320 * Audio output 5.1 working. Side outputs not working.
1321 */
1322 /* DSP: CA10300-IAT LF
1323 * DAC: Cirrus Logic CS4382-KQZ
1324 * ADC: Philips 1361T
1325 * AC97: Sigmatel STAC9750
1326 * CA0151: None
1327 */
1328 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
18c71092 1329 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
21fdddea
JCD		 1330 .id = "Audigy2",
1331 .emu10k2_chip = 1,
1332 .ca0108_chip = 1,
1333 .spk71 = 1,
1334 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1335 .ac97_chip = 1} ,
18c71092
VM		 1336 /* Audigy 2 Value AC3 out does not work yet.
1337 * Need to find out how to turn off interpolators.
1338 */
1339 /* Tested by James@superbug.co.uk 3rd July 2005 */
1340 /* DSP: CA0108-IAT
1341 * DAC: CS4382-KQ
1342 * ADC: Philips 1361T
1343 * AC97: STAC9750
1344 * CA0151: None
1345 */
1346 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1347 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1348 .id = "Audigy2",
1349 .emu10k2_chip = 1,
1350 .ca0108_chip = 1,
1351 .spk71 = 1,
1352 .ac97_chip = 1} ,
d83c671f 1353 /* Audigy 2 ZS Notebook Cardbus card.*/
184c1e2c 1354 /* Tested by James@superbug.co.uk 6th November 2006 */
f951fd3c
JCD		 1355 /* Audio output 7.1/Headphones working.
1356 * Digital output working. (AC3 not checked, only PCM)
184c1e2c
JCD		 1357 * Audio Mic/Line inputs working.
1358 * Digital input not tested.
18c71092 1359 */
21fdddea 1360 /* DSP: Tina2
f951fd3c
JCD		 1361 * DAC: Wolfson WM8768/WM8568
1362 * ADC: Wolfson WM8775
1363 * AC97: None
1364 * CA0151: None
1365 */
184c1e2c
JCD		 1366 /* Tested by James@superbug.co.uk 4th April 2006 */
1367 /* A_IOCFG bits
1368 * Output
1369 * 0: Not Used
1370 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1371 * 2: Analog input 0 = line in, 1 = mic in
1372 * 3: Not Used
1373 * 4: Digital output 0 = off, 1 = on.
1374 * 5: Not Used
1375 * 6: Not Used
1376 * 7: Not Used
1377 * Input
1378 * All bits 1 (0x3fxx) means nothing plugged in.
1379 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1380 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1381 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1382 * E-F: Always 0
1383 *
1384 */
d83c671f 1385 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
18c71092 1386 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
d83c671f
JCD		 1387 .id = "Audigy2",
1388 .emu10k2_chip = 1,
1389 .ca0108_chip = 1,
1390 .ca_cardbus_chip = 1,
27fe864e 1391 .spi_dac = 1,
184c1e2c 1392 .i2c_adc = 1,
d83c671f 1393 .spk71 = 1} ,
190d2c46 1394 /* Tested by James@superbug.co.uk 4th Nov 2007. */
82c8c741 1395 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
18c71092 1396 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
82c8c741
JCD		 1397 .id = "EMU1010",
1398 .emu10k2_chip = 1,
1399 .ca0108_chip = 1,
1400 .ca_cardbus_chip = 1,
d9e8a552 1401 .spk71 = 1 ,
3839e4f1 1402 .emu_model = EMU_MODEL_EMU1616},
190d2c46 1403 /* Tested by James@superbug.co.uk 4th Nov 2007. */
18c71092 1404 /* This is MAEM8960, 0202 is MAEM 8980 */
3663d845 1405 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
18c71092 1406 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
3663d845
JCD		 1407 .id = "EMU1010",
1408 .emu10k2_chip = 1,
1409 .ca0108_chip = 1,
190d2c46 1410 .spk71 = 1,
18c71092 1411 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
10f571d0
MK		 1412 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1413 /* This is MAEM8986, 0202 is MAEM8980 */
1414 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1415 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1416 .id = "EMU1010",
1417 .emu10k2_chip = 1,
1418 .ca0108_chip = 1,
1419 .spk71 = 1,
1420 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
190d2c46 1421 /* Tested by James@superbug.co.uk 8th July 2005. */
18c71092 1422 /* This is MAEM8810, 0202 is MAEM8820 */
190d2c46 1423 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
18c71092 1424 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
190d2c46
JCD		 1425 .id = "EMU1010",
1426 .emu10k2_chip = 1,
1427 .ca0102_chip = 1,
1428 .spk71 = 1,
18c71092 1429 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
493b4acb
VMV		 1430 /* EMU0404b */
1431 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
18c71092 1432 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
493b4acb
VMV		 1433 .id = "EMU0404",
1434 .emu10k2_chip = 1,
1435 .ca0108_chip = 1,
1436 .spk71 = 1,
18c71092 1437 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
493b4acb
VMV		 1438 /* Tested by James@superbug.co.uk 20-3-2007. */
1439 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
18c71092 1440 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
493b4acb
VMV		 1441 .id = "EMU0404",
1442 .emu10k2_chip = 1,
1443 .ca0102_chip = 1,
1444 .spk71 = 1,
1445 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
ac5d4b40
FZ		 1446 /* EMU0404 PCIe */
1447 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1448 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1449 .id = "EMU0404",
1450 .emu10k2_chip = 1,
1451 .ca0108_chip = 1,
1452 .spk71 = 1,
1453 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
718a2594 1454 /* Note that all E-mu cards require kernel 2.6 or newer. */
18c71092
VM		 1455 {.vendor = 0x1102, .device = 0x0008,
1456 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
aec72e0a 1457 .id = "Audigy2",
1da177e4 1458 .emu10k2_chip = 1,
2668907a
PZ		 1459 .ca0108_chip = 1,
1460 .ac97_chip = 1} ,
88dc0e5d 1461 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4 1462 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
18c71092 1463 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
aec72e0a 1464 .id = "Audigy2",
1da177e4
LT		 1465 .emu10k2_chip = 1,
1466 .ca0102_chip = 1,
1467 .ca0151_chip = 1,
1468 .spk71 = 1,
1469 .spdif_bug = 1,
1470 .ac97_chip = 1} ,
f6f8bb64 1471 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
5b0e4985
JCD		 1472 /* The 0x20061102 does have SB0350 written on it
1473 * Just like 0x20021102
1474 */
f6f8bb64 1475 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
18c71092 1476 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
f6f8bb64
LR		 1477 .id = "Audigy2",
1478 .emu10k2_chip = 1,
1479 .ca0102_chip = 1,
1480 .ca0151_chip = 1,
1481 .spk71 = 1,
1482 .spdif_bug = 1,
55e03a68 1483 .invert_shared_spdif = 1, /* digital/analog switch swapped */
f6f8bb64 1484 .ac97_chip = 1} ,
dcc2cf75
TY		 1485 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1486 Creative's Windows driver */
1487 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1488 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1489 .id = "Audigy2",
1490 .emu10k2_chip = 1,
1491 .ca0102_chip = 1,
1492 .ca0151_chip = 1,
1493 .spk71 = 1,
1494 .spdif_bug = 1,
1495 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1496 .ac97_chip = 1} ,
1da177e4 1497 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
18c71092 1498 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
aec72e0a 1499 .id = "Audigy2",
1da177e4
LT		 1500 .emu10k2_chip = 1,
1501 .ca0102_chip = 1,
1502 .ca0151_chip = 1,
1503 .spk71 = 1,
1504 .spdif_bug = 1,
55e03a68 1505 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1da177e4
LT		 1506 .ac97_chip = 1} ,
1507 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
18c71092 1508 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
aec72e0a 1509 .id = "Audigy2",
1da177e4
LT		 1510 .emu10k2_chip = 1,
1511 .ca0102_chip = 1,
1512 .ca0151_chip = 1,
1513 .spk71 = 1,
1514 .spdif_bug = 1,
55e03a68 1515 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1da177e4 1516 .ac97_chip = 1} ,
54efc96d
JCD		 1517 /* Audigy 2 */
1518 /* Tested by James@superbug.co.uk 3rd July 2005 */
1519 /* DSP: CA0102-IAT
1520 * DAC: CS4382-KQ
1521 * ADC: Philips 1361T
1522 * AC97: STAC9721
1523 * CA0151: Yes
1524 */
1da177e4 1525 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
18c71092 1526 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
aec72e0a 1527 .id = "Audigy2",
1da177e4
LT		 1528 .emu10k2_chip = 1,
1529 .ca0102_chip = 1,
1530 .ca0151_chip = 1,
1531 .spk71 = 1,
1532 .spdif_bug = 1,
11b3a755 1533 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1da177e4
LT		 1534 .ac97_chip = 1} ,
1535 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
18c71092 1536 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
aec72e0a 1537 .id = "Audigy2",
1da177e4
LT		 1538 .emu10k2_chip = 1,
1539 .ca0102_chip = 1,
1540 .ca0151_chip = 1,
2f020aa7 1541 .spk71 = 1,
1da177e4 1542 .spdif_bug = 1} ,
264f9577
JCD		 1543 /* Dell OEM/Creative Labs Audigy 2 ZS */
1544 /* See ALSA bug#1365 */
1545 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
18c71092 1546 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
264f9577
JCD		 1547 .id = "Audigy2",
1548 .emu10k2_chip = 1,
1549 .ca0102_chip = 1,
1550 .ca0151_chip = 1,
1551 .spk71 = 1,
1552 .spdif_bug = 1,
1f9da554 1553 .invert_shared_spdif = 1, /* digital/analog switch swapped */
264f9577 1554 .ac97_chip = 1} ,
1da177e4 1555 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
18c71092 1556 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
aec72e0a 1557 .id = "Audigy2",
1da177e4
LT		 1558 .emu10k2_chip = 1,
1559 .ca0102_chip = 1,
1560 .ca0151_chip = 1,
1561 .spk71 = 1,
1562 .spdif_bug = 1,
d2cd74b1 1563 .invert_shared_spdif = 1, /* digital/analog switch swapped */
3271b7b2 1564 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1da177e4 1565 .ac97_chip = 1} ,
bdaed502 1566 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
18c71092 1567 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
bdaed502
TI		 1568 .id = "Audigy2",
1569 .emu10k2_chip = 1,
1570 .ca0102_chip = 1,
1571 .ca0151_chip = 1,
1572 .spdif_bug = 1,
1573 .ac97_chip = 1} ,
ae3a72d8 1574 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
18c71092 1575 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
aec72e0a 1576 .id = "Audigy",
56f5ceed
JCD		 1577 .emu10k2_chip = 1,
1578 .ca0102_chip = 1,
2668907a 1579 .ac97_chip = 1} ,
ae3a72d8 1580 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
18c71092 1581 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
2668907a
PZ		 1582 .id = "Audigy",
1583 .emu10k2_chip = 1,
1584 .ca0102_chip = 1,
ae3a72d8 1585 .spdif_bug = 1,
2668907a 1586 .ac97_chip = 1} ,
a6c17ec8 1587 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
18c71092 1588 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
a6c17ec8
AP		 1589 .id = "Audigy",
1590 .emu10k2_chip = 1,
1591 .ca0102_chip = 1,
1592 .ac97_chip = 1} ,
1da177e4 1593 {.vendor = 0x1102, .device = 0x0004,
18c71092 1594 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
aec72e0a 1595 .id = "Audigy",
1da177e4
LT		 1596 .emu10k2_chip = 1,
1597 .ca0102_chip = 1,
2668907a 1598 .ac97_chip = 1} ,
18c71092
VM		 1599 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1600 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1601 .id = "Live",
1602 .emu10k1_chip = 1,
1603 .ac97_chip = 1,
1604 .sblive51 = 1} ,
1605 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1606 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
f7de9cfd
MM		 1607 .id = "Live",
1608 .emu10k1_chip = 1,
1609 .ac97_chip = 1,
1610 .sblive51 = 1} ,
18c71092
VM		 1611 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1612 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
aec72e0a 1613 .id = "Live",
1da177e4 1614 .emu10k1_chip = 1,
2b637da5
LR		 1615 .ac97_chip = 1,
1616 .sblive51 = 1} ,
a6f6192b 1617 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
18c71092 1618 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
2b6b22f3
JCD		 1619 .id = "Live",
1620 .emu10k1_chip = 1,
1621 .ac97_chip = 1,
1622 .sblive51 = 1} ,
0ba656d0 1623 /* Tested by ALSA bug#1680 26th December 2005 */
18c71092
VM		 1624 /* note: It really has SB0220 written on the card, */
1625 /* but it's SB0228 according to kx.inf */
0ba656d0 1626 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
18c71092 1627 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
0ba656d0
JCD		 1628 .id = "Live",
1629 .emu10k1_chip = 1,
1630 .ac97_chip = 1,
1631 .sblive51 = 1} ,
c6c0b841
LR		 1632 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1633 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
18c71092 1634 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
a8ee7295
GT		 1635 .id = "Live",
1636 .emu10k1_chip = 1,
1637 .ac97_chip = 1,
1638 .sblive51 = 1} ,
a6f6192b 1639 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
18c71092 1640 .driver = "EMU10K1", .name = "SB Live! 5.1",
2b6b22f3
JCD		 1641 .id = "Live",
1642 .emu10k1_chip = 1,
1643 .ac97_chip = 1,
1644 .sblive51 = 1} ,
afe0f1f6 1645 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
a6f6192b 1646 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
18c71092 1647 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
2b6b22f3
JCD		 1648 .id = "Live",
1649 .emu10k1_chip = 1,
f12aa40c
TI		 1650 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1651 * share the same IDs!
1652 */
2b6b22f3 1653 .sblive51 = 1} ,
a6f6192b 1654 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
18c71092 1655 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
2b6b22f3
JCD		 1656 .id = "Live",
1657 .emu10k1_chip = 1,
1658 .ac97_chip = 1,
1659 .sblive51 = 1} ,
a6f6192b 1660 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
18c71092 1661 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
a6f6192b
JCD		 1662 .id = "Live",
1663 .emu10k1_chip = 1,
1664 .ac97_chip = 1} ,
1665 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
18c71092 1666 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
2b6b22f3
JCD		 1667 .id = "Live",
1668 .emu10k1_chip = 1,
1669 .ac97_chip = 1,
1670 .sblive51 = 1} ,
1671 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
18c71092 1672 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
2b6b22f3
JCD		 1673 .id = "Live",
1674 .emu10k1_chip = 1,
1675 .ac97_chip = 1,
1676 .sblive51 = 1} ,
a6f6192b 1677 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
18c71092 1678 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
aec72e0a 1679 .id = "Live",
2b637da5
LR		 1680 .emu10k1_chip = 1,
1681 .ac97_chip = 1,
1682 .sblive51 = 1} ,
88dc0e5d 1683 /* Tested by James@superbug.co.uk 3rd July 2005 */
a6f6192b 1684 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
18c71092 1685 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
2b6b22f3
JCD		 1686 .id = "Live",
1687 .emu10k1_chip = 1,
1688 .ac97_chip = 1,
1689 .sblive51 = 1} ,
a6f6192b 1690 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
18c71092 1691 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
2b6b22f3
JCD		 1692 .id = "Live",
1693 .emu10k1_chip = 1,
1694 .ac97_chip = 1,
1695 .sblive51 = 1} ,
a6f6192b 1696 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
18c71092 1697 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
2b6b22f3
JCD		 1698 .id = "Live",
1699 .emu10k1_chip = 1,
1700 .ac97_chip = 1,
1701 .sblive51 = 1} ,
a6f6192b 1702 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
18c71092 1703 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
2b6b22f3
JCD		 1704 .id = "Live",
1705 .emu10k1_chip = 1,
1706 .ac97_chip = 1,
1707 .sblive51 = 1} ,
a6f6192b 1708 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
18c71092 1709 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
a6f6192b 1710 .id = "APS",
2b6b22f3 1711 .emu10k1_chip = 1,
a6f6192b
JCD		 1712 .ecard = 1} ,
1713 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
18c71092 1714 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
2b6b22f3
JCD		 1715 .id = "Live",
1716 .emu10k1_chip = 1,
1717 .ac97_chip = 1,
1718 .sblive51 = 1} ,
a6f6192b 1719 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
18c71092 1720 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
2b6b22f3
JCD		 1721 .id = "Live",
1722 .emu10k1_chip = 1,
1723 .ac97_chip = 1,
1724 .sblive51 = 1} ,
1da177e4 1725 {.vendor = 0x1102, .device = 0x0002,
18c71092 1726 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
aec72e0a 1727 .id = "Live",
1da177e4 1728 .emu10k1_chip = 1,
2b637da5
LR		 1729 .ac97_chip = 1,
1730 .sblive51 = 1} ,
1da177e4
LT		 1731 { } /* terminator */
1732};
1733
e23e7a14 1734int snd_emu10k1_create(struct snd_card *card,
67679b1f 1735 struct pci_dev *pci,
1da177e4
LT		 1736 unsigned short extin_mask,
1737 unsigned short extout_mask,
1738 long max_cache_bytes,
1739 int enable_ir,
e66bc8b2 1740 uint subsystem,
67679b1f 1741 struct snd_emu10k1 **remu)
1da177e4 1742{
eb4698f3 1743 struct snd_emu10k1 *emu;
09668b44 1744 int idx, err;
1da177e4 1745 int is_audigy;
09668b44 1746 unsigned int silent_page;
eb4698f3
TI		 1747 const struct snd_emu_chip_details *c;
1748 static struct snd_device_ops ops = {
1da177e4
LT		 1749 .dev_free = snd_emu10k1_dev_free,
1750 };
67679b1f 1751
1da177e4
LT		 1752 *remu = NULL;
1753
1754 /* enable PCI device */
67679b1f
VM		 1755 err = pci_enable_device(pci);
1756 if (err < 0)
1da177e4
LT		 1757 return err;
1758
e560d8d8 1759 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1da177e4
LT		 1760 if (emu == NULL) {
1761 pci_disable_device(pci);
1762 return -ENOMEM;
1763 }
1764 emu->card = card;
1765 spin_lock_init(&emu->reg_lock);
1766 spin_lock_init(&emu->emu_lock);
c94fa4c9
JCD		 1767 spin_lock_init(&emu->spi_lock);
1768 spin_lock_init(&emu->i2c_lock);
1da177e4
LT		 1769 spin_lock_init(&emu->voice_lock);
1770 spin_lock_init(&emu->synth_lock);
1771 spin_lock_init(&emu->memblk_lock);
62932df8 1772 mutex_init(&emu->fx8010.lock);
1da177e4
LT		 1773 INIT_LIST_HEAD(&emu->mapped_link_head);
1774 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1775 emu->pci = pci;
1776 emu->irq = -1;
1777 emu->synth = NULL;
1778 emu->get_synth_voice = NULL;
1779 /* read revision & serial */
44c10138 1780 emu->revision = pci->revision;
1da177e4
LT		 1781 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1782 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
67679b1f 1783 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1da177e4
LT		 1784
1785 for (c = emu_chip_details; c->vendor; c++) {
1786 if (c->vendor == pci->vendor && c->device == pci->device) {
e66bc8b2 1787 if (subsystem) {
67679b1f 1788 if (c->subsystem && (c->subsystem == subsystem))
e66bc8b2 1789 break;
67679b1f
VM		 1790 else
1791 continue;
e66bc8b2 1792 } else {
67679b1f 1793 if (c->subsystem && (c->subsystem != emu->serial))
e66bc8b2
JCD		 1794 continue;
1795 if (c->revision && c->revision != emu->revision)
1796 continue;
1797 }
bdaed502 1798 break;
1da177e4
LT		 1799 }
1800 }
1801 if (c->vendor == 0) {
1802 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1803 kfree(emu);
1804 pci_disable_device(pci);
1805 return -ENOENT;
1806 }
1807 emu->card_capabilities = c;
e66bc8b2 1808 if (c->subsystem && !subsystem)
67679b1f
VM		 1809 snd_printdd("Sound card name = %s\n", c->name);
1810 else if (subsystem)
1811 snd_printdd("Sound card name = %s, "
1812 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
88393161 1813 "Forced to subsystem = 0x%x\n", c->name,
67679b1f
VM		 1814 pci->vendor, pci->device, emu->serial, c->subsystem);
1815 else
1816 snd_printdd("Sound card name = %s, "
1817 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1818 c->name, pci->vendor, pci->device,
1819 emu->serial);
1820
85a655d6
TI		 1821 if (!*card->id && c->id) {
1822 int i, n = 0;
aec72e0a 1823 strlcpy(card->id, c->id, sizeof(card->id));
85a655d6
TI		 1824 for (;;) {
1825 for (i = 0; i < snd_ecards_limit; i++) {
1826 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1827 break;
1828 }
1829 if (i >= snd_ecards_limit)
1830 break;
1831 n++;
1832 if (n >= SNDRV_CARDS)
1833 break;
1834 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1835 }
1836 }
aec72e0a 1837
1da177e4
LT		 1838 is_audigy = emu->audigy = c->emu10k2_chip;
1839
1840 /* set the DMA transfer mask */
1841 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1842 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1843 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1844 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1845 kfree(emu);
1846 pci_disable_device(pci);
1847 return -ENXIO;
1848 }
1849 if (is_audigy)
1850 emu->gpr_base = A_FXGPREGBASE;
1851 else
1852 emu->gpr_base = FXGPREGBASE;
1853
67679b1f
VM		 1854 err = pci_request_regions(pci, "EMU10K1");
1855 if (err < 0) {
1da177e4
LT		 1856 kfree(emu);
1857 pci_disable_device(pci);
1858 return err;
1859 }
1860 emu->port = pci_resource_start(pci, 0);
1861
1da177e4
LT		 1862 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1863 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1864 32 * 1024, &emu->ptb_pages) < 0) {
09668b44
TI		 1865 err = -ENOMEM;
1866 goto error;
1da177e4
LT		 1867 }
1868
36726d9d
JJ		 1869 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1870 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1871 sizeof(unsigned long));
1da177e4 1872 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
09668b44
TI		 1873 err = -ENOMEM;
1874 goto error;
1da177e4
LT		 1875 }
1876
1877 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1878 EMUPAGESIZE, &emu->silent_page) < 0) {
09668b44
TI		 1879 err = -ENOMEM;
1880 goto error;
1da177e4
LT		 1881 }
1882 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1883 if (emu->memhdr == NULL) {
09668b44
TI		 1884 err = -ENOMEM;
1885 goto error;
1da177e4 1886 }
eb4698f3
TI		 1887 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1888 sizeof(struct snd_util_memblk);
1da177e4
LT		 1889
1890 pci_set_master(pci);
1891
1da177e4
LT		 1892 emu->fx8010.fxbus_mask = 0x303f;
1893 if (extin_mask == 0)
1894 extin_mask = 0x3fcf;
1895 if (extout_mask == 0)
1896 extout_mask = 0x7fff;
1897 emu->fx8010.extin_mask = extin_mask;
1898 emu->fx8010.extout_mask = extout_mask;
09668b44 1899 emu->enable_ir = enable_ir;
1da177e4 1900
d9e8a552 1901 if (emu->card_capabilities->ca_cardbus_chip) {
67679b1f
VM		 1902 err = snd_emu10k1_cardbus_init(emu);
1903 if (err < 0)
d9e8a552
JCD		 1904 goto error;
1905 }
2b637da5 1906 if (emu->card_capabilities->ecard) {
67679b1f
VM		 1907 err = snd_emu10k1_ecard_init(emu);
1908 if (err < 0)
09668b44 1909 goto error;
190d2c46 1910 } else if (emu->card_capabilities->emu_model) {
67679b1f
VM		 1911 err = snd_emu10k1_emu1010_init(emu);
1912 if (err < 0) {
1913 snd_emu10k1_free(emu);
1914 return err;
1915 }
1da177e4
LT		 1916 } else {
1917 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1918 does not support this, it shouldn't do any harm */
67679b1f
VM		 1919 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1920 AC97SLOT_CNTR|AC97SLOT_LFE);
1da177e4
LT		 1921 }
1922
09668b44
TI		 1923 /* initialize TRAM setup */
1924 emu->fx8010.itram_size = (16 * 1024)/2;
1925 emu->fx8010.etram_pages.area = NULL;
1926 emu->fx8010.etram_pages.bytes = 0;
1da177e4 1927
868e15db
JF		 1928 /* irq handler must be registered after I/O ports are activated */
1929 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
934c2b6d 1930 KBUILD_MODNAME, emu)) {
868e15db
JF		 1931 err = -EBUSY;
1932 goto error;
1933 }
1934 emu->irq = pci->irq;
1935
09668b44
TI		 1936 /*
1937 * Init to 0x02109204 :
1938 * Clock accuracy = 0 (1000ppm)
1939 * Sample Rate = 2 (48kHz)
1940 * Audio Channel = 1 (Left of 2)
1941 * Source Number = 0 (Unspecified)
1942 * Generation Status = 1 (Original for Cat Code 12)
1943 * Cat Code = 12 (Digital Signal Mixer)
1944 * Mode = 0 (Mode 0)
1945 * Emphasis = 0 (None)
1946 * CP = 1 (Copyright unasserted)
1947 * AN = 0 (Audio data)
1948 * P = 0 (Consumer)
1949 */
1950 emu->spdif_bits[0] = emu->spdif_bits[1] =
1951 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1952 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1953 SPCS_GENERATIONSTATUS | 0x00001200 |
1954 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1955
1956 emu->reserved_page = (struct snd_emu10k1_memblk *)
1957 snd_emu10k1_synth_alloc(emu, 4096);
1958 if (emu->reserved_page)
1959 emu->reserved_page->map_locked = 1;
67679b1f 1960
09668b44
TI		 1961 /* Clear silent pages and set up pointers */
1962 memset(emu->silent_page.area, 0, PAGE_SIZE);
1963 silent_page = emu->silent_page.addr << 1;
1964 for (idx = 0; idx < MAXPAGES; idx++)
1965 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1966
1967 /* set up voice indices */
1968 for (idx = 0; idx < NUM_G; idx++) {
1969 emu->voices[idx].emu = emu;
1970 emu->voices[idx].number = idx;
1da177e4
LT		 1971 }
1972
67679b1f
VM		 1973 err = snd_emu10k1_init(emu, enable_ir, 0);
1974 if (err < 0)
09668b44 1975 goto error;
c7561cd8 1976#ifdef CONFIG_PM_SLEEP
67679b1f
VM		 1977 err = alloc_pm_buffer(emu);
1978 if (err < 0)
09668b44
TI		 1979 goto error;
1980#endif
1981
1982 /* Initialize the effect engine */
67679b1f
VM		 1983 err = snd_emu10k1_init_efx(emu);
1984 if (err < 0)
09668b44
TI		 1985 goto error;
1986 snd_emu10k1_audio_enable(emu);
1987
67679b1f
VM		 1988 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1989 if (err < 0)
09668b44
TI		 1990 goto error;
1991
adf1b3d2 1992#ifdef CONFIG_PROC_FS
1da177e4 1993 snd_emu10k1_proc_init(emu);
adf1b3d2 1994#endif
1da177e4
LT		 1995
1996 snd_card_set_dev(card, &pci->dev);
1997 *remu = emu;
1998 return 0;
09668b44
TI		 1999
2000 error:
2001 snd_emu10k1_free(emu);
2002 return err;
1da177e4
LT		 2003}
2004
c7561cd8 2005#ifdef CONFIG_PM_SLEEP
09668b44
TI		 2006static unsigned char saved_regs[] = {
2007 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2008 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2009 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2010 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2011 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2012 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2013 0xff /* end */
2014};
2015static unsigned char saved_regs_audigy[] = {
2016 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2017 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2018 0xff /* end */
2019};
2020
e23e7a14 2021static int alloc_pm_buffer(struct snd_emu10k1 *emu)
09668b44
TI		 2022{
2023 int size;
2024
2025 size = ARRAY_SIZE(saved_regs);
2026 if (emu->audigy)
2027 size += ARRAY_SIZE(saved_regs_audigy);
2028 emu->saved_ptr = vmalloc(4 * NUM_G * size);
67679b1f 2029 if (!emu->saved_ptr)
09668b44
TI		 2030 return -ENOMEM;
2031 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2032 return -ENOMEM;
2033 if (emu->card_capabilities->ca0151_chip &&
2034 snd_p16v_alloc_pm_buffer(emu) < 0)
2035 return -ENOMEM;
2036 return 0;
2037}
2038
2039static void free_pm_buffer(struct snd_emu10k1 *emu)
2040{
2041 vfree(emu->saved_ptr);
2042 snd_emu10k1_efx_free_pm_buffer(emu);
2043 if (emu->card_capabilities->ca0151_chip)
2044 snd_p16v_free_pm_buffer(emu);
2045}
2046
2047void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2048{
2049 int i;
2050 unsigned char *reg;
2051 unsigned int *val;
2052
2053 val = emu->saved_ptr;
2054 for (reg = saved_regs; *reg != 0xff; reg++)
2055 for (i = 0; i < NUM_G; i++, val++)
2056 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2057 if (emu->audigy) {
2058 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2059 for (i = 0; i < NUM_G; i++, val++)
2060 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2061 }
2062 if (emu->audigy)
2063 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2064 emu->saved_hcfg = inl(emu->port + HCFG);
2065}
2066
2067void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2068{
d9e8a552
JCD		 2069 if (emu->card_capabilities->ca_cardbus_chip)
2070 snd_emu10k1_cardbus_init(emu);
09668b44
TI		 2071 if (emu->card_capabilities->ecard)
2072 snd_emu10k1_ecard_init(emu);
190d2c46 2073 else if (emu->card_capabilities->emu_model)
67679b1f 2074 snd_emu10k1_emu1010_init(emu);
09668b44
TI		 2075 else
2076 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2077 snd_emu10k1_init(emu, emu->enable_ir, 1);
2078}
2079
2080void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2081{
2082 int i;
2083 unsigned char *reg;
2084 unsigned int *val;
2085
2086 snd_emu10k1_audio_enable(emu);
2087
2088 /* resore for spdif */
2089 if (emu->audigy)
4130d59b
AP		 2090 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2091 outl(emu->saved_hcfg, emu->port + HCFG);
09668b44
TI		 2092
2093 val = emu->saved_ptr;
2094 for (reg = saved_regs; *reg != 0xff; reg++)
2095 for (i = 0; i < NUM_G; i++, val++)
2096 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2097 if (emu->audigy) {
2098 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2099 for (i = 0; i < NUM_G; i++, val++)
2100 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2101 }
2102}
2103#endif
Linux kernel - Deliverables
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