/spare/repo/netdev-2.6 branch 'master'
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1_main.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
8 *
9 *
10 * BUGS:
11 * --
12 *
13 * TODO:
14 * --
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 *
30 */
31
32#include <sound/driver.h>
33#include <linux/delay.h>
34#include <linux/init.h>
35#include <linux/interrupt.h>
36#include <linux/pci.h>
37#include <linux/slab.h>
38#include <linux/vmalloc.h>
39
40#include <sound/core.h>
41#include <sound/emu10k1.h>
42#include "p16v.h"
43
44#if 0
45MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
46MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
47MODULE_LICENSE("GPL");
48#endif
49
50/*************************************************************************
51 * EMU10K1 init / done
52 *************************************************************************/
53
54void snd_emu10k1_voice_init(emu10k1_t * emu, int ch)
55{
56 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
57 snd_emu10k1_ptr_write(emu, IP, ch, 0);
58 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
59 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
60 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
61 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
62 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
63
64 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
65 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
66 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
67 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
68 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
69 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
70
71 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
72 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
73 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
74 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
75 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
76 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
77 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
78 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
79
80 /*** these are last so OFF prevents writing ***/
81 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
82 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
83 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
84 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
85 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
86
87 /* Audigy extra stuffs */
88 if (emu->audigy) {
89 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
90 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
92 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
93 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
94 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
95 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
96 }
97}
98
99static int __devinit snd_emu10k1_init(emu10k1_t * emu, int enable_ir)
100{
101 int ch, idx, err;
102 unsigned int silent_page;
103
104 emu->fx8010.itram_size = (16 * 1024)/2;
105 emu->fx8010.etram_pages.area = NULL;
106 emu->fx8010.etram_pages.bytes = 0;
107
108 /* disable audio and lock cache */
109 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
110
111 /* reset recording buffers */
112 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
113 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
114 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
115 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
116 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
117 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
118
119 /* disable channel interrupt */
120 outl(0, emu->port + INTE);
121 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
122 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
123 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
124 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
125
126 if (emu->audigy){
127 /* set SPDIF bypass mode */
128 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
129 /* enable rear left + rear right AC97 slots */
130 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | AC97SLOT_REAR_LEFT);
131 }
132
133 /* init envelope engine */
134 for (ch = 0; ch < NUM_G; ch++) {
135 emu->voices[ch].emu = emu;
136 emu->voices[ch].number = ch;
137 snd_emu10k1_voice_init(emu, ch);
138 }
139
140 /*
141 * Init to 0x02109204 :
142 * Clock accuracy = 0 (1000ppm)
143 * Sample Rate = 2 (48kHz)
144 * Audio Channel = 1 (Left of 2)
145 * Source Number = 0 (Unspecified)
146 * Generation Status = 1 (Original for Cat Code 12)
147 * Cat Code = 12 (Digital Signal Mixer)
148 * Mode = 0 (Mode 0)
149 * Emphasis = 0 (None)
150 * CP = 1 (Copyright unasserted)
151 * AN = 0 (Audio data)
152 * P = 0 (Consumer)
153 */
154 snd_emu10k1_ptr_write(emu, SPCS0, 0,
155 emu->spdif_bits[0] =
156 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
157 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
158 SPCS_GENERATIONSTATUS | 0x00001200 |
159 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
160 snd_emu10k1_ptr_write(emu, SPCS1, 0,
161 emu->spdif_bits[1] =
162 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
163 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
164 SPCS_GENERATIONSTATUS | 0x00001200 |
165 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
166 snd_emu10k1_ptr_write(emu, SPCS2, 0,
167 emu->spdif_bits[2] =
168 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
169 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
170 SPCS_GENERATIONSTATUS | 0x00001200 |
171 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
172
2b637da5 173 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT
174 /* Hacks for Alice3 to work independent of haP16V driver */
175 u32 tmp;
176
177 //Setup SRCMulti_I2S SamplingRate
178 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
179 tmp &= 0xfffff1ff;
180 tmp |= (0x2<<9);
181 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
182
183 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
184 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
185 /* Setup SRCMulti Input Audio Enable */
186 /* Use 0xFFFFFFFF to enable P16V sounds. */
187 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
188
189 /* Enabled Phased (8-channel) P16V playback */
190 outl(0x0201, emu->port + HCFG2);
191 /* Set playback routing. */
fd9a98ec 192 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
1da177e4 193 }
e0474e53 194 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
1da177e4
LT
195 /* Hacks for Alice3 to work independent of haP16V driver */
196 u32 tmp;
197
198 snd_printk(KERN_ERR "Audigy2 value:Special config.\n");
199 //Setup SRCMulti_I2S SamplingRate
200 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
201 tmp &= 0xfffff1ff;
202 tmp |= (0x2<<9);
203 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
204
205 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
206 outl(0x600000, emu->port + 0x20);
207 outl(0x14, emu->port + 0x24);
208
209 /* Setup SRCMulti Input Audio Enable */
210 outl(0x7b0000, emu->port + 0x20);
211 outl(0xFF000000, emu->port + 0x24);
212
213 /* Setup SPDIF Out Audio Enable */
214 /* The Audigy 2 Value has a separate SPDIF out,
215 * so no need for a mixer switch
216 */
217 outl(0x7a0000, emu->port + 0x20);
218 outl(0xFF000000, emu->port + 0x24);
219 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
220 outl(tmp, emu->port + A_IOCFG);
221 }
222
223
224 /*
225 * Clear page with silence & setup all pointers to this page
226 */
227 memset(emu->silent_page.area, 0, PAGE_SIZE);
228 silent_page = emu->silent_page.addr << 1;
229 for (idx = 0; idx < MAXPAGES; idx++)
230 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
231 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
232 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
233 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
234
235 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
236 for (ch = 0; ch < NUM_G; ch++) {
237 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
238 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
239 }
240
241 /*
242 * Hokay, setup HCFG
243 * Mute Disable Audio = 0
244 * Lock Tank Memory = 1
245 * Lock Sound Memory = 0
246 * Auto Mute = 1
247 */
248 if (emu->audigy) {
249 if (emu->revision == 4) /* audigy2 */
250 outl(HCFG_AUDIOENABLE |
251 HCFG_AC3ENABLE_CDSPDIF |
252 HCFG_AC3ENABLE_GPSPDIF |
253 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
254 else
255 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
e0474e53
JCD
256 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
257 * e.g. card_capabilities->joystick */
1da177e4
LT
258 } else if (emu->model == 0x20 ||
259 emu->model == 0xc400 ||
260 (emu->model == 0x21 && emu->revision < 6))
261 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
262 else
263 // With on-chip joystick
264 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
265
266 if (enable_ir) { /* enable IR for SB Live */
267 if (emu->audigy) {
268 unsigned int reg = inl(emu->port + A_IOCFG);
269 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
270 udelay(500);
271 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
272 udelay(100);
273 outl(reg, emu->port + A_IOCFG);
274 } else {
275 unsigned int reg = inl(emu->port + HCFG);
276 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
277 udelay(500);
278 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
279 udelay(100);
280 outl(reg, emu->port + HCFG);
281 }
282 }
283
284 if (emu->audigy) { /* enable analog output */
285 unsigned int reg = inl(emu->port + A_IOCFG);
286 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
287 }
288
289 /*
290 * Initialize the effect engine
291 */
292 if ((err = snd_emu10k1_init_efx(emu)) < 0)
293 return err;
294
295 /*
296 * Enable the audio bit
297 */
298 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
299
300 /* Enable analog/digital outs on audigy */
301 if (emu->audigy) {
302 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
303
e0474e53 304 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
1da177e4
LT
305 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
306 * This has to be done after init ALice3 I2SOut beyond 48KHz.
307 * So, sequence is important. */
308 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
e0474e53 309 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
1da177e4
LT
310 /* Unmute Analog now. */
311 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
312 } else {
313 /* Disable routing from AC97 line out to Front speakers */
314 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
315 }
316 }
317
318#if 0
319 {
320 unsigned int tmp;
321 /* FIXME: the following routine disables LiveDrive-II !! */
322 // TOSLink detection
323 emu->tos_link = 0;
324 tmp = inl(emu->port + HCFG);
325 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
326 outl(tmp|0x800, emu->port + HCFG);
327 udelay(50);
328 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
329 emu->tos_link = 1;
330 outl(tmp, emu->port + HCFG);
331 }
332 }
333 }
334#endif
335
336 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
337
338 emu->reserved_page = (emu10k1_memblk_t *)snd_emu10k1_synth_alloc(emu, 4096);
339 if (emu->reserved_page)
340 emu->reserved_page->map_locked = 1;
341
342 return 0;
343}
344
345static int snd_emu10k1_done(emu10k1_t * emu)
346{
347 int ch;
348
349 outl(0, emu->port + INTE);
350
351 /*
352 * Shutdown the chip
353 */
354 for (ch = 0; ch < NUM_G; ch++)
355 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
356 for (ch = 0; ch < NUM_G; ch++) {
357 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
358 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
359 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
360 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
361 }
362
363 /* reset recording buffers */
364 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
365 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
366 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
367 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
368 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
369 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
370 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
371 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
372 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
373 if (emu->audigy)
374 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
375 else
376 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
377
378 /* disable channel interrupt */
379 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
380 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
381 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
382 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
383
384 /* remove reserved page */
385 if (emu->reserved_page != NULL) {
386 snd_emu10k1_synth_free(emu, (snd_util_memblk_t *)emu->reserved_page);
387 emu->reserved_page = NULL;
388 }
389
390 /* disable audio and lock cache */
391 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
392 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
393
394 snd_emu10k1_free_efx(emu);
395
396 return 0;
397}
398
399/*************************************************************************
400 * ECARD functional implementation
401 *************************************************************************/
402
403/* In A1 Silicon, these bits are in the HC register */
404#define HOOKN_BIT (1L << 12)
405#define HANDN_BIT (1L << 11)
406#define PULSEN_BIT (1L << 10)
407
408#define EC_GDI1 (1 << 13)
409#define EC_GDI0 (1 << 14)
410
411#define EC_NUM_CONTROL_BITS 20
412
413#define EC_AC3_DATA_SELN 0x0001L
414#define EC_EE_DATA_SEL 0x0002L
415#define EC_EE_CNTRL_SELN 0x0004L
416#define EC_EECLK 0x0008L
417#define EC_EECS 0x0010L
418#define EC_EESDO 0x0020L
419#define EC_TRIM_CSN 0x0040L
420#define EC_TRIM_SCLK 0x0080L
421#define EC_TRIM_SDATA 0x0100L
422#define EC_TRIM_MUTEN 0x0200L
423#define EC_ADCCAL 0x0400L
424#define EC_ADCRSTN 0x0800L
425#define EC_DACCAL 0x1000L
426#define EC_DACMUTEN 0x2000L
427#define EC_LEDN 0x4000L
428
429#define EC_SPDIF0_SEL_SHIFT 15
430#define EC_SPDIF1_SEL_SHIFT 17
431#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
432#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
433#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
434#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
435#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
436 * be incremented any time the EEPROM's
437 * format is changed. */
438
439#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
440
441/* Addresses for special values stored in to EEPROM */
442#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
443#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
444#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
445
446#define EC_LAST_PROMFILE_ADDR 0x2f
447
448#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
449 * can be up to 30 characters in length
450 * and is stored as a NULL-terminated
451 * ASCII string. Any unused bytes must be
452 * filled with zeros */
453#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
454
455
456/* Most of this stuff is pretty self-evident. According to the hardware
457 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
458 * offset problem. Weird.
459 */
460#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
461 EC_TRIM_CSN)
462
463
464#define EC_DEFAULT_ADC_GAIN 0xC4C4
465#define EC_DEFAULT_SPDIF0_SEL 0x0
466#define EC_DEFAULT_SPDIF1_SEL 0x4
467
468/**************************************************************************
469 * @func Clock bits into the Ecard's control latch. The Ecard uses a
470 * control latch will is loaded bit-serially by toggling the Modem control
471 * lines from function 2 on the E8010. This function hides these details
472 * and presents the illusion that we are actually writing to a distinct
473 * register.
474 */
475
476static void snd_emu10k1_ecard_write(emu10k1_t * emu, unsigned int value)
477{
478 unsigned short count;
479 unsigned int data;
480 unsigned long hc_port;
481 unsigned int hc_value;
482
483 hc_port = emu->port + HCFG;
484 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
485 outl(hc_value, hc_port);
486
487 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
488
489 /* Set up the value */
490 data = ((value & 0x1) ? PULSEN_BIT : 0);
491 value >>= 1;
492
493 outl(hc_value | data, hc_port);
494
495 /* Clock the shift register */
496 outl(hc_value | data | HANDN_BIT, hc_port);
497 outl(hc_value | data, hc_port);
498 }
499
500 /* Latch the bits */
501 outl(hc_value | HOOKN_BIT, hc_port);
502 outl(hc_value, hc_port);
503}
504
505/**************************************************************************
506 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
507 * trim value consists of a 16bit value which is composed of two
508 * 8 bit gain/trim values, one for the left channel and one for the
509 * right channel. The following table maps from the Gain/Attenuation
510 * value in decibels into the corresponding bit pattern for a single
511 * channel.
512 */
513
514static void snd_emu10k1_ecard_setadcgain(emu10k1_t * emu,
515 unsigned short gain)
516{
517 unsigned int bit;
518
519 /* Enable writing to the TRIM registers */
520 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
521
522 /* Do it again to insure that we meet hold time requirements */
523 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
524
525 for (bit = (1 << 15); bit; bit >>= 1) {
526 unsigned int value;
527
528 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
529
530 if (gain & bit)
531 value |= EC_TRIM_SDATA;
532
533 /* Clock the bit */
534 snd_emu10k1_ecard_write(emu, value);
535 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
536 snd_emu10k1_ecard_write(emu, value);
537 }
538
539 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
540}
541
542static int __devinit snd_emu10k1_ecard_init(emu10k1_t * emu)
543{
544 unsigned int hc_value;
545
546 /* Set up the initial settings */
547 emu->ecard_ctrl = EC_RAW_RUN_MODE |
548 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
549 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
550
551 /* Step 0: Set the codec type in the hardware control register
552 * and enable audio output */
553 hc_value = inl(emu->port + HCFG);
554 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
555 inl(emu->port + HCFG);
556
557 /* Step 1: Turn off the led and deassert TRIM_CS */
558 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
559
560 /* Step 2: Calibrate the ADC and DAC */
561 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
562
563 /* Step 3: Wait for awhile; XXX We can't get away with this
564 * under a real operating system; we'll need to block and wait that
565 * way. */
566 snd_emu10k1_wait(emu, 48000);
567
568 /* Step 4: Switch off the DAC and ADC calibration. Note
569 * That ADC_CAL is actually an inverted signal, so we assert
570 * it here to stop calibration. */
571 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
572
573 /* Step 4: Switch into run mode */
574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
575
576 /* Step 5: Set the analog input gain */
577 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
578
579 return 0;
580}
581
582/*
583 * Create the EMU10K1 instance
584 */
585
586static int snd_emu10k1_free(emu10k1_t *emu)
587{
588 if (emu->port) { /* avoid access to already used hardware */
589 snd_emu10k1_fx8010_tram_setup(emu, 0);
590 snd_emu10k1_done(emu);
591 }
592 if (emu->memhdr)
593 snd_util_memhdr_free(emu->memhdr);
594 if (emu->silent_page.area)
595 snd_dma_free_pages(&emu->silent_page);
596 if (emu->ptb_pages.area)
597 snd_dma_free_pages(&emu->ptb_pages);
598 vfree(emu->page_ptr_table);
599 vfree(emu->page_addr_table);
600 if (emu->irq >= 0)
601 free_irq(emu->irq, (void *)emu);
602 if (emu->port)
603 pci_release_regions(emu->pci);
604 pci_disable_device(emu->pci);
2b637da5 605 if (emu->card_capabilities->ca0151_chip) /* P16V */
1da177e4
LT
606 snd_p16v_free(emu);
607 kfree(emu);
608 return 0;
609}
610
611static int snd_emu10k1_dev_free(snd_device_t *device)
612{
613 emu10k1_t *emu = device->device_data;
614 return snd_emu10k1_free(emu);
615}
616
1da177e4
LT
617static emu_chip_details_t emu_chip_details[] = {
618 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
88dc0e5d 619 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4
LT
620 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
621 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
aec72e0a 622 .id = "Audigy2",
1da177e4
LT
623 .emu10k2_chip = 1,
624 .ca0108_chip = 1,
2668907a
PZ
625 .spk71 = 1,
626 .ac97_chip = 1} ,
1da177e4
LT
627 {.vendor = 0x1102, .device = 0x0008,
628 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
aec72e0a 629 .id = "Audigy2",
1da177e4 630 .emu10k2_chip = 1,
2668907a
PZ
631 .ca0108_chip = 1,
632 .ac97_chip = 1} ,
7c1d549a
JCD
633 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
634 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
635 .driver = "Audigy2", .name = "E-mu 1212m [4001]",
636 .id = "EMU1212m",
637 .emu10k2_chip = 1,
638 .ca0102_chip = 1,
639 .ecard = 1} ,
88dc0e5d 640 /* Tested by James@superbug.co.uk 3rd July 2005 */
1da177e4
LT
641 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
642 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
aec72e0a 643 .id = "Audigy2",
1da177e4
LT
644 .emu10k2_chip = 1,
645 .ca0102_chip = 1,
646 .ca0151_chip = 1,
647 .spk71 = 1,
648 .spdif_bug = 1,
649 .ac97_chip = 1} ,
650 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
651 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
aec72e0a 652 .id = "Audigy2",
1da177e4
LT
653 .emu10k2_chip = 1,
654 .ca0102_chip = 1,
655 .ca0151_chip = 1,
656 .spk71 = 1,
657 .spdif_bug = 1,
658 .ac97_chip = 1} ,
659 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
660 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
aec72e0a 661 .id = "Audigy2",
1da177e4
LT
662 .emu10k2_chip = 1,
663 .ca0102_chip = 1,
664 .ca0151_chip = 1,
665 .spk71 = 1,
666 .spdif_bug = 1,
667 .ac97_chip = 1} ,
668 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
669 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
aec72e0a 670 .id = "Audigy2",
1da177e4
LT
671 .emu10k2_chip = 1,
672 .ca0102_chip = 1,
673 .ca0151_chip = 1,
674 .spk71 = 1,
675 .spdif_bug = 1,
676 .ac97_chip = 1} ,
677 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
678 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
aec72e0a 679 .id = "Audigy2",
1da177e4
LT
680 .emu10k2_chip = 1,
681 .ca0102_chip = 1,
682 .ca0151_chip = 1,
683 .spdif_bug = 1} ,
684 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
685 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
aec72e0a 686 .id = "Audigy2",
1da177e4
LT
687 .emu10k2_chip = 1,
688 .ca0102_chip = 1,
689 .ca0151_chip = 1,
690 .spk71 = 1,
691 .spdif_bug = 1,
692 .ac97_chip = 1} ,
bdaed502
TI
693 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
694 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
695 .id = "Audigy2",
696 .emu10k2_chip = 1,
697 .ca0102_chip = 1,
698 .ca0151_chip = 1,
699 .spdif_bug = 1,
700 .ac97_chip = 1} ,
ae3a72d8
JCD
701 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
702 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
aec72e0a 703 .id = "Audigy",
56f5ceed
JCD
704 .emu10k2_chip = 1,
705 .ca0102_chip = 1,
2668907a 706 .ac97_chip = 1} ,
ae3a72d8
JCD
707 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
708 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
2668907a
PZ
709 .id = "Audigy",
710 .emu10k2_chip = 1,
711 .ca0102_chip = 1,
ae3a72d8 712 .spdif_bug = 1,
2668907a 713 .ac97_chip = 1} ,
a6c17ec8
AP
714 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
715 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
716 .id = "Audigy",
717 .emu10k2_chip = 1,
718 .ca0102_chip = 1,
719 .ac97_chip = 1} ,
1da177e4 720 {.vendor = 0x1102, .device = 0x0004,
bdaed502 721 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
aec72e0a 722 .id = "Audigy",
1da177e4
LT
723 .emu10k2_chip = 1,
724 .ca0102_chip = 1,
2668907a 725 .ac97_chip = 1} ,
a6f6192b
JCD
726 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
727 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
f7de9cfd
MM
728 .id = "Live",
729 .emu10k1_chip = 1,
730 .ac97_chip = 1,
731 .sblive51 = 1} ,
a6f6192b
JCD
732 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
733 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
aec72e0a 734 .id = "Live",
1da177e4 735 .emu10k1_chip = 1,
2b637da5
LR
736 .ac97_chip = 1,
737 .sblive51 = 1} ,
a6f6192b
JCD
738 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
739 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
2b6b22f3
JCD
740 .id = "Live",
741 .emu10k1_chip = 1,
742 .ac97_chip = 1,
743 .sblive51 = 1} ,
c6c0b841
LR
744 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
745 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
746 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
747 .id = "Live",
748 .emu10k1_chip = 1,
749 .ac97_chip = 1,
750 .sblive51 = 1} ,
a6f6192b
JCD
751 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
752 .driver = "EMU10K1", .name = "SB Live 5.1",
2b6b22f3
JCD
753 .id = "Live",
754 .emu10k1_chip = 1,
755 .ac97_chip = 1,
756 .sblive51 = 1} ,
99250872 757 /* Tested by alsa bugtrack user "hus" 12th Sept 2005 */
a6f6192b
JCD
758 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
759 .driver = "EMU10K1", .name = "SBLive! Player 5.1 [SB0060]",
2b6b22f3
JCD
760 .id = "Live",
761 .emu10k1_chip = 1,
6a293552 762 .ac97_chip = 1,
2b6b22f3 763 .sblive51 = 1} ,
a6f6192b
JCD
764 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
765 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
2b6b22f3
JCD
766 .id = "Live",
767 .emu10k1_chip = 1,
768 .ac97_chip = 1,
769 .sblive51 = 1} ,
a6f6192b
JCD
770 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
771 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
772 .id = "Live",
773 .emu10k1_chip = 1,
774 .ac97_chip = 1} ,
775 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
776 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
2b6b22f3
JCD
777 .id = "Live",
778 .emu10k1_chip = 1,
779 .ac97_chip = 1,
780 .sblive51 = 1} ,
781 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
782 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
783 .id = "Live",
784 .emu10k1_chip = 1,
785 .ac97_chip = 1,
786 .sblive51 = 1} ,
a6f6192b
JCD
787 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
788 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
aec72e0a 789 .id = "Live",
2b637da5
LR
790 .emu10k1_chip = 1,
791 .ac97_chip = 1,
792 .sblive51 = 1} ,
88dc0e5d 793 /* Tested by James@superbug.co.uk 3rd July 2005 */
a6f6192b
JCD
794 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
795 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
2b6b22f3
JCD
796 .id = "Live",
797 .emu10k1_chip = 1,
798 .ac97_chip = 1,
799 .sblive51 = 1} ,
a6f6192b
JCD
800 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
801 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
2b6b22f3
JCD
802 .id = "Live",
803 .emu10k1_chip = 1,
804 .ac97_chip = 1,
805 .sblive51 = 1} ,
a6f6192b
JCD
806 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
807 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
2b6b22f3
JCD
808 .id = "Live",
809 .emu10k1_chip = 1,
810 .ac97_chip = 1,
811 .sblive51 = 1} ,
a6f6192b
JCD
812 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
813 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
2b6b22f3
JCD
814 .id = "Live",
815 .emu10k1_chip = 1,
816 .ac97_chip = 1,
817 .sblive51 = 1} ,
a6f6192b
JCD
818 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
819 .driver = "EMU10K1", .name = "E-mu APS [4001]",
820 .id = "APS",
2b6b22f3 821 .emu10k1_chip = 1,
a6f6192b
JCD
822 .ecard = 1} ,
823 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
824 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
2b6b22f3
JCD
825 .id = "Live",
826 .emu10k1_chip = 1,
827 .ac97_chip = 1,
828 .sblive51 = 1} ,
a6f6192b
JCD
829 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
830 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
2b6b22f3
JCD
831 .id = "Live",
832 .emu10k1_chip = 1,
833 .ac97_chip = 1,
834 .sblive51 = 1} ,
1da177e4
LT
835 {.vendor = 0x1102, .device = 0x0002,
836 .driver = "EMU10K1", .name = "SB Live [Unknown]",
aec72e0a 837 .id = "Live",
1da177e4 838 .emu10k1_chip = 1,
2b637da5
LR
839 .ac97_chip = 1,
840 .sblive51 = 1} ,
1da177e4
LT
841 { } /* terminator */
842};
843
844int __devinit snd_emu10k1_create(snd_card_t * card,
845 struct pci_dev * pci,
846 unsigned short extin_mask,
847 unsigned short extout_mask,
848 long max_cache_bytes,
849 int enable_ir,
e66bc8b2 850 uint subsystem,
1da177e4
LT
851 emu10k1_t ** remu)
852{
853 emu10k1_t *emu;
854 int err;
855 int is_audigy;
856 unsigned char revision;
857 const emu_chip_details_t *c;
858 static snd_device_ops_t ops = {
859 .dev_free = snd_emu10k1_dev_free,
860 };
861
862 *remu = NULL;
863
864 /* enable PCI device */
865 if ((err = pci_enable_device(pci)) < 0)
866 return err;
867
868 emu = kcalloc(1, sizeof(*emu), GFP_KERNEL);
869 if (emu == NULL) {
870 pci_disable_device(pci);
871 return -ENOMEM;
872 }
873 emu->card = card;
874 spin_lock_init(&emu->reg_lock);
875 spin_lock_init(&emu->emu_lock);
876 spin_lock_init(&emu->voice_lock);
877 spin_lock_init(&emu->synth_lock);
878 spin_lock_init(&emu->memblk_lock);
879 init_MUTEX(&emu->ptb_lock);
880 init_MUTEX(&emu->fx8010.lock);
881 INIT_LIST_HEAD(&emu->mapped_link_head);
882 INIT_LIST_HEAD(&emu->mapped_order_link_head);
883 emu->pci = pci;
884 emu->irq = -1;
885 emu->synth = NULL;
886 emu->get_synth_voice = NULL;
887 /* read revision & serial */
888 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
889 emu->revision = revision;
890 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
891 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1da177e4
LT
892 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
893
894 for (c = emu_chip_details; c->vendor; c++) {
895 if (c->vendor == pci->vendor && c->device == pci->device) {
e66bc8b2
JCD
896 if (subsystem) {
897 if (c->subsystem && (c->subsystem == subsystem) ) {
898 break;
899 } else continue;
900 } else {
901 if (c->subsystem && (c->subsystem != emu->serial) )
902 continue;
903 if (c->revision && c->revision != emu->revision)
904 continue;
905 }
bdaed502 906 break;
1da177e4
LT
907 }
908 }
909 if (c->vendor == 0) {
910 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
911 kfree(emu);
912 pci_disable_device(pci);
913 return -ENOENT;
914 }
915 emu->card_capabilities = c;
e66bc8b2 916 if (c->subsystem && !subsystem)
1da177e4 917 snd_printdd("Sound card name=%s\n", c->name);
e66bc8b2
JCD
918 else if (subsystem)
919 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
920 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
921 else
922 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
923 c->name, pci->vendor, pci->device, emu->serial);
1da177e4 924
85a655d6
TI
925 if (!*card->id && c->id) {
926 int i, n = 0;
aec72e0a 927 strlcpy(card->id, c->id, sizeof(card->id));
85a655d6
TI
928 for (;;) {
929 for (i = 0; i < snd_ecards_limit; i++) {
930 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
931 break;
932 }
933 if (i >= snd_ecards_limit)
934 break;
935 n++;
936 if (n >= SNDRV_CARDS)
937 break;
938 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
939 }
940 }
aec72e0a 941
1da177e4
LT
942 is_audigy = emu->audigy = c->emu10k2_chip;
943
944 /* set the DMA transfer mask */
945 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
946 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
947 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
948 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
949 kfree(emu);
950 pci_disable_device(pci);
951 return -ENXIO;
952 }
953 if (is_audigy)
954 emu->gpr_base = A_FXGPREGBASE;
955 else
956 emu->gpr_base = FXGPREGBASE;
957
958 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
959 kfree(emu);
960 pci_disable_device(pci);
961 return err;
962 }
963 emu->port = pci_resource_start(pci, 0);
964
965 if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
966 snd_emu10k1_free(emu);
967 return -EBUSY;
968 }
969 emu->irq = pci->irq;
970
971 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
972 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
973 32 * 1024, &emu->ptb_pages) < 0) {
974 snd_emu10k1_free(emu);
975 return -ENOMEM;
976 }
977
978 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
979 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
980 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
981 snd_emu10k1_free(emu);
982 return -ENOMEM;
983 }
984
985 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
986 EMUPAGESIZE, &emu->silent_page) < 0) {
987 snd_emu10k1_free(emu);
988 return -ENOMEM;
989 }
990 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
991 if (emu->memhdr == NULL) {
992 snd_emu10k1_free(emu);
993 return -ENOMEM;
994 }
995 emu->memhdr->block_extra_size = sizeof(emu10k1_memblk_t) - sizeof(snd_util_memblk_t);
996
997 pci_set_master(pci);
998
1da177e4
LT
999 emu->fx8010.fxbus_mask = 0x303f;
1000 if (extin_mask == 0)
1001 extin_mask = 0x3fcf;
1002 if (extout_mask == 0)
1003 extout_mask = 0x7fff;
1004 emu->fx8010.extin_mask = extin_mask;
1005 emu->fx8010.extout_mask = extout_mask;
1006
2b637da5 1007 if (emu->card_capabilities->ecard) {
1da177e4
LT
1008 if ((err = snd_emu10k1_ecard_init(emu)) < 0) {
1009 snd_emu10k1_free(emu);
1010 return err;
1011 }
1012 } else {
1013 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1014 does not support this, it shouldn't do any harm */
1015 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1016 }
1017
1018 if ((err = snd_emu10k1_init(emu, enable_ir)) < 0) {
1019 snd_emu10k1_free(emu);
1020 return err;
1021 }
1022
1023 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) {
1024 snd_emu10k1_free(emu);
1025 return err;
1026 }
1027
1028 snd_emu10k1_proc_init(emu);
1029
1030 snd_card_set_dev(card, &pci->dev);
1031 *remu = emu;
1032 return 0;
1033}
1034
1035/* memory.c */
1036EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
1037EXPORT_SYMBOL(snd_emu10k1_synth_free);
1038EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
1039EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
1040EXPORT_SYMBOL(snd_emu10k1_memblk_map);
1041/* voice.c */
1042EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
1043EXPORT_SYMBOL(snd_emu10k1_voice_free);
1044/* io.c */
1045EXPORT_SYMBOL(snd_emu10k1_ptr_read);
1046EXPORT_SYMBOL(snd_emu10k1_ptr_write);
This page took 0.101899 seconds and 5 git commands to generate.