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[ALSA] Make buffer size of proc text interface variable
[deliverable/linux.git] / sound / pci / emu10k1 / emu10k1x.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
3 * Driver EMU10K1X chips
4 *
5 * Parts of this code were adapted from audigyls.c driver which is
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 *
8 * BUGS:
9 * --
10 *
11 * TODO:
12 *
13 * Chips (SB0200 model):
14 * - EMU10K1X-DBQ
15 * - STAC 9708T
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 *
31 */
32#include <sound/driver.h>
33#include <linux/init.h>
34#include <linux/interrupt.h>
35#include <linux/pci.h>
9d2f928d 36#include <linux/dma-mapping.h>
1da177e4
LT		 37#include <linux/slab.h>
38#include <linux/moduleparam.h>
39#include <sound/core.h>
40#include <sound/initval.h>
41#include <sound/pcm.h>
42#include <sound/ac97_codec.h>
43#include <sound/info.h>
44#include <sound/rawmidi.h>
45
46MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
47MODULE_DESCRIPTION("EMU10K1X");
48MODULE_LICENSE("GPL");
49MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
50
51// module parameters (see "Module Parameters")
52static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
53static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
54static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
55
56module_param_array(index, int, NULL, 0444);
57MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
58module_param_array(id, charp, NULL, 0444);
59MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
60module_param_array(enable, bool, NULL, 0444);
61MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
62
63
64// some definitions were borrowed from emu10k1 driver as they seem to be the same
65/************************************************************************************************/
66/* PCI function 0 registers, address = <val> + PCIBASE0 */
67/************************************************************************************************/
68
69#define PTR 0x00 /* Indexed register set pointer register */
70 /* NOTE: The CHANNELNUM and ADDRESS words can */
71 /* be modified independently of each other. */
72
73#define DATA 0x04 /* Indexed register set data register */
74
75#define IPR 0x08 /* Global interrupt pending register */
76 /* Clear pending interrupts by writing a 1 to */
77 /* the relevant bits and zero to the other bits */
78#define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
79#define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
80#define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
81#define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
82#define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
83#define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
84
85#define INTE 0x0c /* Interrupt enable register */
86#define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
87#define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
88#define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
89#define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
90#define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
91#define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
92
93#define HCFG 0x14 /* Hardware config register */
94
95#define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
96 /* NOTE: This should generally never be used. */
97#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
98 /* Should be set to 1 when the EMU10K1 is */
99 /* completely initialized. */
100#define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
101
102
103#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
104
105#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
106
107/********************************************************************************************************/
108/* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
109/********************************************************************************************************/
110#define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
111 /* One list entry: 4 bytes for DMA address,
112 * 4 bytes for period_size << 16.
113 * One list entry is 8 bytes long.
114 * One list entry for each period in the buffer.
115 */
116#define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
117#define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
118#define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */
119#define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
120#define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
121#define PLAYBACK_UNKNOWN1 0x07
122#define PLAYBACK_UNKNOWN2 0x08
123
124/* Only one capture channel supported */
125#define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
126#define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
127#define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
128#define CAPTURE_UNKNOWN 0x13
129
130/* From 0x20 - 0x3f, last samples played on each channel */
131
132#define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
133#define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
134#define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
135#define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
136#define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
137
138#define ROUTING 0x41 /* Setup sound routing ? */
139#define ROUTING_FRONT_LEFT 0x00000001
140#define ROUTING_FRONT_RIGHT 0x00000002
141#define ROUTING_REAR_LEFT 0x00000004
142#define ROUTING_REAR_RIGHT 0x00000008
143#define ROUTING_CENTER_LFE 0x00010000
144
145#define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
146
147#define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
148
149#define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
150
151#define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
152#define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
153#define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
154#define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
155#define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
156#define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
157#define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
158#define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
159#define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
160#define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
161#define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
162#define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
163#define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
164#define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
165#define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
166#define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
167#define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
168#define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
169#define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
170#define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
171#define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
172#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
173#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
174
175#define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
176
177/* This is the MPU port on the card */
178#define MUDATA 0x47
179#define MUCMD 0x48
180#define MUSTAT MUCMD
181
182/* From 0x50 - 0x5f, last samples captured */
183
184/**
185 * The hardware has 3 channels for playback and 1 for capture.
186 * - channel 0 is the front channel
187 * - channel 1 is the rear channel
188 * - channel 2 is the center/lfe chanel
189 * Volume is controlled by the AC97 for the front and rear channels by
190 * the PCM Playback Volume, Sigmatel Surround Playback Volume and
191 * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
192 * the front/rear channel mixing in the REAR OUT jack. When using the
193 * 4-Speaker Stereo, both front and rear channels will be mixed in the
194 * REAR OUT.
195 * The center/lfe channel has no volume control and cannot be muted during
196 * playback.
197 */
198
4b32f1aa
TI		 199struct emu10k1x_voice {
200 struct emu10k1x *emu;
1da177e4
LT		 201 int number;
202 int use;
203
4b32f1aa 204 struct emu10k1x_pcm *epcm;
1da177e4
LT		 205};
206
4b32f1aa
TI		 207struct emu10k1x_pcm {
208 struct emu10k1x *emu;
209 struct snd_pcm_substream *substream;
210 struct emu10k1x_voice *voice;
1da177e4
LT		 211 unsigned short running;
212};
213
4b32f1aa
TI		 214struct emu10k1x_midi {
215 struct emu10k1x *emu;
216 struct snd_rawmidi *rmidi;
217 struct snd_rawmidi_substream *substream_input;
218 struct snd_rawmidi_substream *substream_output;
1da177e4
LT		 219 unsigned int midi_mode;
220 spinlock_t input_lock;
221 spinlock_t output_lock;
222 spinlock_t open_lock;
223 int tx_enable, rx_enable;
224 int port;
225 int ipr_tx, ipr_rx;
4b32f1aa
TI		 226 void (*interrupt)(struct emu10k1x *emu, unsigned int status);
227};
1da177e4
LT		 228
229// definition of the chip-specific record
4b32f1aa
TI		 230struct emu10k1x {
231 struct snd_card *card;
1da177e4
LT		 232 struct pci_dev *pci;
233
234 unsigned long port;
235 struct resource *res_port;
236 int irq;
237
238 unsigned int revision; /* chip revision */
239 unsigned int serial; /* serial number */
240 unsigned short model; /* subsystem id */
241
242 spinlock_t emu_lock;
243 spinlock_t voice_lock;
244
4b32f1aa
TI		 245 struct snd_ac97 *ac97;
246 struct snd_pcm *pcm;
1da177e4 247
4b32f1aa
TI		 248 struct emu10k1x_voice voices[3];
249 struct emu10k1x_voice capture_voice;
1da177e4
LT		 250 u32 spdif_bits[3]; // SPDIF out setup
251
252 struct snd_dma_buffer dma_buffer;
253
4b32f1aa 254 struct emu10k1x_midi midi;
1da177e4
LT		 255};
256
257/* hardware definition */
4b32f1aa 258static struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
1da177e4
LT		 259 .info = (SNDRV_PCM_INFO_MMAP |
260 SNDRV_PCM_INFO_INTERLEAVED |
261 SNDRV_PCM_INFO_BLOCK_TRANSFER |
262 SNDRV_PCM_INFO_MMAP_VALID),
263 .formats = SNDRV_PCM_FMTBIT_S16_LE,
264 .rates = SNDRV_PCM_RATE_48000,
265 .rate_min = 48000,
266 .rate_max = 48000,
267 .channels_min = 2,
268 .channels_max = 2,
269 .buffer_bytes_max = (32*1024),
270 .period_bytes_min = 64,
271 .period_bytes_max = (16*1024),
272 .periods_min = 2,
273 .periods_max = 8,
274 .fifo_size = 0,
275};
276
4b32f1aa 277static struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
1da177e4
LT		 278 .info = (SNDRV_PCM_INFO_MMAP |
279 SNDRV_PCM_INFO_INTERLEAVED |
280 SNDRV_PCM_INFO_BLOCK_TRANSFER |
281 SNDRV_PCM_INFO_MMAP_VALID),
282 .formats = SNDRV_PCM_FMTBIT_S16_LE,
283 .rates = SNDRV_PCM_RATE_48000,
284 .rate_min = 48000,
285 .rate_max = 48000,
286 .channels_min = 2,
287 .channels_max = 2,
288 .buffer_bytes_max = (32*1024),
289 .period_bytes_min = 64,
290 .period_bytes_max = (16*1024),
291 .periods_min = 2,
292 .periods_max = 2,
293 .fifo_size = 0,
294};
295
4b32f1aa 296static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
1da177e4
LT		 297 unsigned int reg,
298 unsigned int chn)
299{
300 unsigned long flags;
301 unsigned int regptr, val;
302
303 regptr = (reg << 16) | chn;
304
305 spin_lock_irqsave(&emu->emu_lock, flags);
306 outl(regptr, emu->port + PTR);
307 val = inl(emu->port + DATA);
308 spin_unlock_irqrestore(&emu->emu_lock, flags);
309 return val;
310}
311
4b32f1aa 312static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
1da177e4
LT		 313 unsigned int reg,
314 unsigned int chn,
315 unsigned int data)
316{
317 unsigned int regptr;
318 unsigned long flags;
319
320 regptr = (reg << 16) | chn;
321
322 spin_lock_irqsave(&emu->emu_lock, flags);
323 outl(regptr, emu->port + PTR);
324 outl(data, emu->port + DATA);
325 spin_unlock_irqrestore(&emu->emu_lock, flags);
326}
327
4b32f1aa 328static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
1da177e4
LT		 329{
330 unsigned long flags;
331 unsigned int enable;
332
333 spin_lock_irqsave(&emu->emu_lock, flags);
334 enable = inl(emu->port + INTE) | intrenb;
335 outl(enable, emu->port + INTE);
336 spin_unlock_irqrestore(&emu->emu_lock, flags);
337}
338
4b32f1aa 339static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
1da177e4
LT		 340{
341 unsigned long flags;
342 unsigned int enable;
343
344 spin_lock_irqsave(&emu->emu_lock, flags);
345 enable = inl(emu->port + INTE) & ~intrenb;
346 outl(enable, emu->port + INTE);
347 spin_unlock_irqrestore(&emu->emu_lock, flags);
348}
349
4b32f1aa 350static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
1da177e4
LT		 351{
352 unsigned long flags;
353
354 spin_lock_irqsave(&emu->emu_lock, flags);
355 outl(value, emu->port + GPIO);
356 spin_unlock_irqrestore(&emu->emu_lock, flags);
357}
358
4b32f1aa 359static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
1da177e4 360{
4d572776 361 kfree(runtime->private_data);
1da177e4
LT		 362}
363
4b32f1aa 364static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
1da177e4 365{
4b32f1aa 366 struct emu10k1x_pcm *epcm;
1da177e4
LT		 367
368 if ((epcm = voice->epcm) == NULL)
369 return;
370 if (epcm->substream == NULL)
371 return;
372#if 0
373 snd_printk(KERN_INFO "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
374 epcm->substream->ops->pointer(epcm->substream),
375 snd_pcm_lib_period_bytes(epcm->substream),
376 snd_pcm_lib_buffer_bytes(epcm->substream));
377#endif
378 snd_pcm_period_elapsed(epcm->substream);
379}
380
381/* open callback */
4b32f1aa 382static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
1da177e4 383{
4b32f1aa
TI		 384 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
385 struct emu10k1x_pcm *epcm;
386 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 387 int err;
388
389 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
390 return err;
391 }
392 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
393 return err;
394
e560d8d8 395 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 396 if (epcm == NULL)
397 return -ENOMEM;
398 epcm->emu = chip;
399 epcm->substream = substream;
400
401 runtime->private_data = epcm;
402 runtime->private_free = snd_emu10k1x_pcm_free_substream;
403
404 runtime->hw = snd_emu10k1x_playback_hw;
405
406 return 0;
407}
408
409/* close callback */
4b32f1aa 410static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
1da177e4
LT		 411{
412 return 0;
413}
414
415/* hw_params callback */
4b32f1aa
TI		 416static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
417 struct snd_pcm_hw_params *hw_params)
1da177e4 418{
4b32f1aa
TI		 419 struct snd_pcm_runtime *runtime = substream->runtime;
420 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 421
422 if (! epcm->voice) {
423 epcm->voice = &epcm->emu->voices[substream->pcm->device];
424 epcm->voice->use = 1;
425 epcm->voice->epcm = epcm;
426 }
427
428 return snd_pcm_lib_malloc_pages(substream,
429 params_buffer_bytes(hw_params));
430}
431
432/* hw_free callback */
4b32f1aa 433static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4 434{
4b32f1aa
TI		 435 struct snd_pcm_runtime *runtime = substream->runtime;
436 struct emu10k1x_pcm *epcm;
1da177e4
LT		 437
438 if (runtime->private_data == NULL)
439 return 0;
440
441 epcm = runtime->private_data;
442
443 if (epcm->voice) {
444 epcm->voice->use = 0;
445 epcm->voice->epcm = NULL;
446 epcm->voice = NULL;
447 }
448
449 return snd_pcm_lib_free_pages(substream);
450}
451
452/* prepare callback */
4b32f1aa 453static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
1da177e4 454{
4b32f1aa
TI		 455 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
456 struct snd_pcm_runtime *runtime = substream->runtime;
457 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 458 int voice = epcm->voice->number;
459 u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
460 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
461 int i;
462
463 for(i=0; i < runtime->periods; i++) {
464 *table_base++=runtime->dma_addr+(i*period_size_bytes);
465 *table_base++=period_size_bytes<<16;
466 }
467
468 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
469 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
470 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
471 snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
472 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
473 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
474 snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
475
476 snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
477
478 return 0;
479}
480
481/* trigger callback */
4b32f1aa 482static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 483 int cmd)
484{
4b32f1aa
TI		 485 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
486 struct snd_pcm_runtime *runtime = substream->runtime;
487 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 488 int channel = epcm->voice->number;
489 int result = 0;
490
491// snd_printk(KERN_INFO "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", (int)emu, cmd, (int)substream->ops->pointer(substream));
492
493 switch (cmd) {
494 case SNDRV_PCM_TRIGGER_START:
495 if(runtime->periods == 2)
496 snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
497 else
498 snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
499 epcm->running = 1;
500 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
501 break;
502 case SNDRV_PCM_TRIGGER_STOP:
503 epcm->running = 0;
504 snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
505 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
506 break;
507 default:
508 result = -EINVAL;
509 break;
510 }
511 return result;
512}
513
514/* pointer callback */
515static snd_pcm_uframes_t
4b32f1aa 516snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
1da177e4 517{
4b32f1aa
TI		 518 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
519 struct snd_pcm_runtime *runtime = substream->runtime;
520 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 521 int channel = epcm->voice->number;
522 snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
523
524 if (!epcm->running)
525 return 0;
526
527 ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
528 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
529 ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
530
531 if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
532 return 0;
533
534 if (ptr3 != ptr4)
535 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
536 ptr2 = bytes_to_frames(runtime, ptr1);
537 ptr2 += (ptr4 >> 3) * runtime->period_size;
538 ptr = ptr2;
539
540 if (ptr >= runtime->buffer_size)
541 ptr -= runtime->buffer_size;
542
543 return ptr;
544}
545
546/* operators */
4b32f1aa 547static struct snd_pcm_ops snd_emu10k1x_playback_ops = {
1da177e4
LT		 548 .open = snd_emu10k1x_playback_open,
549 .close = snd_emu10k1x_playback_close,
550 .ioctl = snd_pcm_lib_ioctl,
551 .hw_params = snd_emu10k1x_pcm_hw_params,
552 .hw_free = snd_emu10k1x_pcm_hw_free,
553 .prepare = snd_emu10k1x_pcm_prepare,
554 .trigger = snd_emu10k1x_pcm_trigger,
555 .pointer = snd_emu10k1x_pcm_pointer,
556};
557
558/* open_capture callback */
4b32f1aa 559static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
1da177e4 560{
4b32f1aa
TI		 561 struct emu10k1x *chip = snd_pcm_substream_chip(substream);
562 struct emu10k1x_pcm *epcm;
563 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 564 int err;
565
566 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
567 return err;
568 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
569 return err;
570
e560d8d8 571 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
1da177e4
LT		 572 if (epcm == NULL)
573 return -ENOMEM;
574
575 epcm->emu = chip;
576 epcm->substream = substream;
577
578 runtime->private_data = epcm;
579 runtime->private_free = snd_emu10k1x_pcm_free_substream;
580
581 runtime->hw = snd_emu10k1x_capture_hw;
582
583 return 0;
584}
585
586/* close callback */
4b32f1aa 587static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
1da177e4
LT		 588{
589 return 0;
590}
591
592/* hw_params callback */
4b32f1aa
TI		 593static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
594 struct snd_pcm_hw_params *hw_params)
1da177e4 595{
4b32f1aa
TI		 596 struct snd_pcm_runtime *runtime = substream->runtime;
597 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 598
599 if (! epcm->voice) {
600 if (epcm->emu->capture_voice.use)
601 return -EBUSY;
602 epcm->voice = &epcm->emu->capture_voice;
603 epcm->voice->epcm = epcm;
604 epcm->voice->use = 1;
605 }
606
607 return snd_pcm_lib_malloc_pages(substream,
608 params_buffer_bytes(hw_params));
609}
610
611/* hw_free callback */
4b32f1aa 612static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
1da177e4 613{
4b32f1aa 614 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4 615
4b32f1aa 616 struct emu10k1x_pcm *epcm;
1da177e4
LT		 617
618 if (runtime->private_data == NULL)
619 return 0;
620 epcm = runtime->private_data;
621
622 if (epcm->voice) {
623 epcm->voice->use = 0;
624 epcm->voice->epcm = NULL;
625 epcm->voice = NULL;
626 }
627
628 return snd_pcm_lib_free_pages(substream);
629}
630
631/* prepare capture callback */
4b32f1aa 632static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
1da177e4 633{
4b32f1aa
TI		 634 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
635 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 636
637 snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
638 snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
639 snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
640 snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
641
642 return 0;
643}
644
645/* trigger_capture callback */
4b32f1aa 646static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
1da177e4
LT		 647 int cmd)
648{
4b32f1aa
TI		 649 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
650 struct snd_pcm_runtime *runtime = substream->runtime;
651 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 652 int result = 0;
653
654 switch (cmd) {
655 case SNDRV_PCM_TRIGGER_START:
656 snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
657 INTE_CAP_0_HALF_LOOP);
658 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
659 epcm->running = 1;
660 break;
661 case SNDRV_PCM_TRIGGER_STOP:
662 epcm->running = 0;
663 snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
664 INTE_CAP_0_HALF_LOOP);
665 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
666 break;
667 default:
668 result = -EINVAL;
669 break;
670 }
671 return result;
672}
673
674/* pointer_capture callback */
675static snd_pcm_uframes_t
4b32f1aa 676snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
1da177e4 677{
4b32f1aa
TI		 678 struct emu10k1x *emu = snd_pcm_substream_chip(substream);
679 struct snd_pcm_runtime *runtime = substream->runtime;
680 struct emu10k1x_pcm *epcm = runtime->private_data;
1da177e4
LT		 681 snd_pcm_uframes_t ptr;
682
683 if (!epcm->running)
684 return 0;
685
686 ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
687 if (ptr >= runtime->buffer_size)
688 ptr -= runtime->buffer_size;
689
690 return ptr;
691}
692
4b32f1aa 693static struct snd_pcm_ops snd_emu10k1x_capture_ops = {
1da177e4
LT		 694 .open = snd_emu10k1x_pcm_open_capture,
695 .close = snd_emu10k1x_pcm_close_capture,
696 .ioctl = snd_pcm_lib_ioctl,
697 .hw_params = snd_emu10k1x_pcm_hw_params_capture,
698 .hw_free = snd_emu10k1x_pcm_hw_free_capture,
699 .prepare = snd_emu10k1x_pcm_prepare_capture,
700 .trigger = snd_emu10k1x_pcm_trigger_capture,
701 .pointer = snd_emu10k1x_pcm_pointer_capture,
702};
703
4b32f1aa 704static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
1da177e4
LT		 705 unsigned short reg)
706{
4b32f1aa 707 struct emu10k1x *emu = ac97->private_data;
1da177e4
LT		 708 unsigned long flags;
709 unsigned short val;
710
711 spin_lock_irqsave(&emu->emu_lock, flags);
712 outb(reg, emu->port + AC97ADDRESS);
713 val = inw(emu->port + AC97DATA);
714 spin_unlock_irqrestore(&emu->emu_lock, flags);
715 return val;
716}
717
4b32f1aa 718static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
1da177e4
LT		 719 unsigned short reg, unsigned short val)
720{
4b32f1aa 721 struct emu10k1x *emu = ac97->private_data;
1da177e4
LT		 722 unsigned long flags;
723
724 spin_lock_irqsave(&emu->emu_lock, flags);
725 outb(reg, emu->port + AC97ADDRESS);
726 outw(val, emu->port + AC97DATA);
727 spin_unlock_irqrestore(&emu->emu_lock, flags);
728}
729
4b32f1aa 730static int snd_emu10k1x_ac97(struct emu10k1x *chip)
1da177e4 731{
4b32f1aa
TI		 732 struct snd_ac97_bus *pbus;
733 struct snd_ac97_template ac97;
1da177e4 734 int err;
4b32f1aa 735 static struct snd_ac97_bus_ops ops = {
1da177e4
LT		 736 .write = snd_emu10k1x_ac97_write,
737 .read = snd_emu10k1x_ac97_read,
738 };
739
740 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
741 return err;
742 pbus->no_vra = 1; /* we don't need VRA */
743
744 memset(&ac97, 0, sizeof(ac97));
745 ac97.private_data = chip;
746 ac97.scaps = AC97_SCAP_NO_SPDIF;
747 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
748}
749
4b32f1aa 750static int snd_emu10k1x_free(struct emu10k1x *chip)
1da177e4
LT		 751{
752 snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
753 // disable interrupts
754 outl(0, chip->port + INTE);
755 // disable audio
756 outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
757
758 // release the i/o port
b1d5776d
TI		 759 release_and_free_resource(chip->res_port);
760
1da177e4
LT		 761 // release the irq
762 if (chip->irq >= 0)
763 free_irq(chip->irq, (void *)chip);
764
765 // release the DMA
766 if (chip->dma_buffer.area) {
767 snd_dma_free_pages(&chip->dma_buffer);
768 }
769
770 pci_disable_device(chip->pci);
771
772 // release the data
773 kfree(chip);
774 return 0;
775}
776
4b32f1aa 777static int snd_emu10k1x_dev_free(struct snd_device *device)
1da177e4 778{
4b32f1aa 779 struct emu10k1x *chip = device->device_data;
1da177e4
LT		 780 return snd_emu10k1x_free(chip);
781}
782
783static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id,
784 struct pt_regs *regs)
785{
786 unsigned int status;
787
4b32f1aa
TI		 788 struct emu10k1x *chip = dev_id;
789 struct emu10k1x_voice *pvoice = chip->voices;
1da177e4
LT		 790 int i;
791 int mask;
792
793 status = inl(chip->port + IPR);
794
89173bd4
TI		 795 if (! status)
796 return IRQ_NONE;
797
798 // capture interrupt
799 if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
4b32f1aa
TI		 800 struct emu10k1x_voice *pvoice = &chip->capture_voice;
801 if (pvoice->use)
89173bd4
TI		 802 snd_emu10k1x_pcm_interrupt(chip, pvoice);
803 else
804 snd_emu10k1x_intr_disable(chip,
805 INTE_CAP_0_LOOP |
806 INTE_CAP_0_HALF_LOOP);
807 }
1da177e4 808
89173bd4
TI		 809 mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
810 for (i = 0; i < 3; i++) {
811 if (status & mask) {
812 if (pvoice->use)
813 snd_emu10k1x_pcm_interrupt(chip, pvoice);
814 else
815 snd_emu10k1x_intr_disable(chip, mask);
1da177e4 816 }
89173bd4
TI		 817 pvoice++;
818 mask <<= 1;
819 }
1da177e4 820
89173bd4
TI		 821 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
822 if (chip->midi.interrupt)
823 chip->midi.interrupt(chip, status);
824 else
825 snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
1da177e4 826 }
89173bd4
TI		 827
828 // acknowledge the interrupt if necessary
829 outl(status, chip->port + IPR);
1da177e4 830
89173bd4 831 // snd_printk(KERN_INFO "interrupt %08x\n", status);
1da177e4
LT		 832 return IRQ_HANDLED;
833}
834
4b32f1aa 835static int __devinit snd_emu10k1x_pcm(struct emu10k1x *emu, int device, struct snd_pcm **rpcm)
1da177e4 836{
4b32f1aa 837 struct snd_pcm *pcm;
1da177e4
LT		 838 int err;
839 int capture = 0;
840
841 if (rpcm)
842 *rpcm = NULL;
843 if (device == 0)
844 capture = 1;
845
846 if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
847 return err;
848
849 pcm->private_data = emu;
1da177e4
LT		 850
851 switch(device) {
852 case 0:
853 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
854 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
855 break;
856 case 1:
857 case 2:
858 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
859 break;
860 }
861
862 pcm->info_flags = 0;
863 pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
864 switch(device) {
865 case 0:
866 strcpy(pcm->name, "EMU10K1X Front");
867 break;
868 case 1:
869 strcpy(pcm->name, "EMU10K1X Rear");
870 break;
871 case 2:
872 strcpy(pcm->name, "EMU10K1X Center/LFE");
873 break;
874 }
875 emu->pcm = pcm;
876
877 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
878 snd_dma_pci_data(emu->pci),
879 32*1024, 32*1024);
880
881 if (rpcm)
882 *rpcm = pcm;
883
884 return 0;
885}
886
4b32f1aa 887static int __devinit snd_emu10k1x_create(struct snd_card *card,
1da177e4 888 struct pci_dev *pci,
4b32f1aa 889 struct emu10k1x **rchip)
1da177e4 890{
4b32f1aa 891 struct emu10k1x *chip;
1da177e4
LT		 892 int err;
893 int ch;
4b32f1aa 894 static struct snd_device_ops ops = {
1da177e4
LT		 895 .dev_free = snd_emu10k1x_dev_free,
896 };
9d2f928d 897
1da177e4 898 *rchip = NULL;
9d2f928d 899
1da177e4
LT		 900 if ((err = pci_enable_device(pci)) < 0)
901 return err;
9d2f928d
TK		 902 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
903 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
1da177e4
LT		 904 snd_printk(KERN_ERR "error to set 28bit mask DMA\n");
905 pci_disable_device(pci);
906 return -ENXIO;
907 }
9d2f928d 908
e560d8d8 909 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 910 if (chip == NULL) {
911 pci_disable_device(pci);
912 return -ENOMEM;
913 }
9d2f928d 914
1da177e4
LT		 915 chip->card = card;
916 chip->pci = pci;
917 chip->irq = -1;
918
919 spin_lock_init(&chip->emu_lock);
920 spin_lock_init(&chip->voice_lock);
921
922 chip->port = pci_resource_start(pci, 0);
923 if ((chip->res_port = request_region(chip->port, 8,
924 "EMU10K1X")) == NULL) {
925 snd_printk(KERN_ERR "emu10k1x: cannot allocate the port 0x%lx\n", chip->port);
926 snd_emu10k1x_free(chip);
927 return -EBUSY;
928 }
929
930 if (request_irq(pci->irq, snd_emu10k1x_interrupt,
931 SA_INTERRUPT|SA_SHIRQ, "EMU10K1X",
932 (void *)chip)) {
933 snd_printk(KERN_ERR "emu10k1x: cannot grab irq %d\n", pci->irq);
934 snd_emu10k1x_free(chip);
935 return -EBUSY;
936 }
937 chip->irq = pci->irq;
938
939 if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
940 4 * 1024, &chip->dma_buffer) < 0) {
941 snd_emu10k1x_free(chip);
942 return -ENOMEM;
943 }
944
945 pci_set_master(pci);
946 /* read revision & serial */
947 pci_read_config_byte(pci, PCI_REVISION_ID, (char *)&chip->revision);
948 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
949 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
950 snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
951 chip->revision, chip->serial);
952
953 outl(0, chip->port + INTE);
954
955 for(ch = 0; ch < 3; ch++) {
956 chip->voices[ch].emu = chip;
957 chip->voices[ch].number = ch;
958 }
959
960 /*
961 * Init to 0x02109204 :
962 * Clock accuracy = 0 (1000ppm)
963 * Sample Rate = 2 (48kHz)
964 * Audio Channel = 1 (Left of 2)
965 * Source Number = 0 (Unspecified)
966 * Generation Status = 1 (Original for Cat Code 12)
967 * Cat Code = 12 (Digital Signal Mixer)
968 * Mode = 0 (Mode 0)
969 * Emphasis = 0 (None)
970 * CP = 1 (Copyright unasserted)
971 * AN = 0 (Audio data)
972 * P = 0 (Consumer)
973 */
974 snd_emu10k1x_ptr_write(chip, SPCS0, 0,
975 chip->spdif_bits[0] =
976 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
977 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
978 SPCS_GENERATIONSTATUS | 0x00001200 |
979 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
980 snd_emu10k1x_ptr_write(chip, SPCS1, 0,
981 chip->spdif_bits[1] =
982 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
983 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
984 SPCS_GENERATIONSTATUS | 0x00001200 |
985 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
986 snd_emu10k1x_ptr_write(chip, SPCS2, 0,
987 chip->spdif_bits[2] =
988 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
989 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
990 SPCS_GENERATIONSTATUS | 0x00001200 |
991 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
992
993 snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
994 snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
995 snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
996
997 outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
998
999 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1000 chip, &ops)) < 0) {
1001 snd_emu10k1x_free(chip);
1002 return err;
1003 }
1004 *rchip = chip;
1005 return 0;
1006}
1007
4b32f1aa
TI		 1008static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
1009 struct snd_info_buffer *buffer)
1da177e4 1010{
4b32f1aa 1011 struct emu10k1x *emu = entry->private_data;
1da177e4
LT		 1012 unsigned long value,value1,value2;
1013 unsigned long flags;
1014 int i;
1015
1016 snd_iprintf(buffer, "Registers:\n\n");
1017 for(i = 0; i < 0x20; i+=4) {
1018 spin_lock_irqsave(&emu->emu_lock, flags);
1019 value = inl(emu->port + i);
1020 spin_unlock_irqrestore(&emu->emu_lock, flags);
1021 snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
1022 }
1023 snd_iprintf(buffer, "\nRegisters\n\n");
1024 for(i = 0; i <= 0x48; i++) {
1025 value = snd_emu10k1x_ptr_read(emu, i, 0);
1026 if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
1027 value1 = snd_emu10k1x_ptr_read(emu, i, 1);
1028 value2 = snd_emu10k1x_ptr_read(emu, i, 2);
1029 snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
1030 } else {
1031 snd_iprintf(buffer, "%02X: %08lX\n", i, value);
1032 }
1033 }
1034}
1035
4b32f1aa
TI		 1036static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
1037 struct snd_info_buffer *buffer)
1da177e4 1038{
4b32f1aa 1039 struct emu10k1x *emu = entry->private_data;
1da177e4
LT		 1040 char line[64];
1041 unsigned int reg, channel_id , val;
1042
1043 while (!snd_info_get_line(buffer, line, sizeof(line))) {
1044 if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
1045 continue;
1046
1047 if ((reg < 0x49) && (reg >=0) && (val <= 0xffffffff)
1048 && (channel_id >=0) && (channel_id <= 2) )
1049 snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
1050 }
1051}
1052
4b32f1aa 1053static int __devinit snd_emu10k1x_proc_init(struct emu10k1x * emu)
1da177e4 1054{
4b32f1aa 1055 struct snd_info_entry *entry;
1da177e4
LT		 1056
1057 if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
1058 snd_info_set_text_ops(entry, emu, 1024, snd_emu10k1x_proc_reg_read);
1059 entry->c.text.write_size = 64;
1060 entry->c.text.write = snd_emu10k1x_proc_reg_write;
bd7bf042 1061 entry->mode |= S_IWUSR;
1da177e4
LT		 1062 entry->private_data = emu;
1063 }
1064
1065 return 0;
1066}
1067
4b32f1aa 1068static int snd_emu10k1x_shared_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1069{
1070 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1071 uinfo->count = 1;
1072 uinfo->value.integer.min = 0;
1073 uinfo->value.integer.max = 1;
1074 return 0;
1075}
1076
4b32f1aa
TI		 1077static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1da177e4 1079{
4b32f1aa 1080 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1081
1082 ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
1083
1084 return 0;
1085}
1086
4b32f1aa
TI		 1087static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1da177e4 1089{
4b32f1aa 1090 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1091 unsigned int val;
1092 int change = 0;
1093
1094 val = ucontrol->value.integer.value[0] ;
1095
1096 if (val) {
1097 // enable spdif output
1098 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
1099 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
1100 snd_emu10k1x_gpio_write(emu, 0x1000);
1101 } else {
1102 // disable spdif output
1103 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
1104 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
1105 snd_emu10k1x_gpio_write(emu, 0x1080);
1106 }
1107 return change;
1108}
1109
4b32f1aa 1110static struct snd_kcontrol_new snd_emu10k1x_shared_spdif __devinitdata =
1da177e4
LT		 1111{
1112 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1113 .name = "Analog/Digital Output Jack",
1114 .info = snd_emu10k1x_shared_spdif_info,
1115 .get = snd_emu10k1x_shared_spdif_get,
1116 .put = snd_emu10k1x_shared_spdif_put
1117};
1118
4b32f1aa 1119static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1120{
1121 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1122 uinfo->count = 1;
1123 return 0;
1124}
1125
4b32f1aa
TI		 1126static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
1127 struct snd_ctl_elem_value *ucontrol)
1da177e4 1128{
4b32f1aa 1129 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1130 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1131
1132 ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
1133 ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
1134 ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
1135 ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
1136 return 0;
1137}
1138
4b32f1aa
TI		 1139static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
1140 struct snd_ctl_elem_value *ucontrol)
1da177e4
LT		 1141{
1142 ucontrol->value.iec958.status[0] = 0xff;
1143 ucontrol->value.iec958.status[1] = 0xff;
1144 ucontrol->value.iec958.status[2] = 0xff;
1145 ucontrol->value.iec958.status[3] = 0xff;
1146 return 0;
1147}
1148
4b32f1aa
TI		 1149static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
1150 struct snd_ctl_elem_value *ucontrol)
1da177e4 1151{
4b32f1aa 1152 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1153 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1154 int change;
1155 unsigned int val;
1156
1157 val = (ucontrol->value.iec958.status[0] << 0) |
1158 (ucontrol->value.iec958.status[1] << 8) |
1159 (ucontrol->value.iec958.status[2] << 16) |
1160 (ucontrol->value.iec958.status[3] << 24);
1161 change = val != emu->spdif_bits[idx];
1162 if (change) {
1163 snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
1164 emu->spdif_bits[idx] = val;
1165 }
1166 return change;
1167}
1168
4b32f1aa 1169static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
1da177e4
LT		 1170{
1171 .access = SNDRV_CTL_ELEM_ACCESS_READ,
5549d549 1172 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1173 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
1174 .count = 3,
1175 .info = snd_emu10k1x_spdif_info,
1176 .get = snd_emu10k1x_spdif_get_mask
1177};
1178
4b32f1aa 1179static struct snd_kcontrol_new snd_emu10k1x_spdif_control =
1da177e4 1180{
5549d549 1181 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1da177e4
LT		 1182 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1183 .count = 3,
1184 .info = snd_emu10k1x_spdif_info,
1185 .get = snd_emu10k1x_spdif_get,
1186 .put = snd_emu10k1x_spdif_put
1187};
1188
4b32f1aa 1189static int __devinit snd_emu10k1x_mixer(struct emu10k1x *emu)
1da177e4
LT		 1190{
1191 int err;
4b32f1aa
TI		 1192 struct snd_kcontrol *kctl;
1193 struct snd_card *card = emu->card;
1da177e4
LT		 1194
1195 if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
1196 return -ENOMEM;
1197 if ((err = snd_ctl_add(card, kctl)))
1198 return err;
1199 if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
1200 return -ENOMEM;
1201 if ((err = snd_ctl_add(card, kctl)))
1202 return err;
1203 if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
1204 return -ENOMEM;
1205 if ((err = snd_ctl_add(card, kctl)))
1206 return err;
1207
1208 return 0;
1209}
1210
1211#define EMU10K1X_MIDI_MODE_INPUT (1<<0)
1212#define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
1213
4b32f1aa 1214static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
1da177e4
LT		 1215{
1216 return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
1217}
1218
4b32f1aa 1219static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
1da177e4
LT		 1220{
1221 snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
1222}
1223
1224#define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
1225#define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
1226#define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
1227#define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
1228
1229#define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
1230#define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
1231
1232#define MPU401_RESET 0xff
1233#define MPU401_ENTER_UART 0x3f
1234#define MPU401_ACK 0xfe
1235
4b32f1aa 1236static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
1da177e4
LT		 1237{
1238 int timeout = 100000;
1239 for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
1240 mpu401_read_data(emu, mpu);
1241#ifdef CONFIG_SND_DEBUG
1242 if (timeout <= 0)
1243 snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n", mpu401_read_stat(emu, mpu));
1244#endif
1245}
1246
1247/*
1248
1249 */
1250
4b32f1aa
TI		 1251static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
1252 struct emu10k1x_midi *midi, unsigned int status)
1da177e4
LT		 1253{
1254 unsigned char byte;
1255
1256 if (midi->rmidi == NULL) {
1257 snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
1258 return;
1259 }
1260
1261 spin_lock(&midi->input_lock);
1262 if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
1263 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1264 mpu401_clear_rx(emu, midi);
1265 } else {
1266 byte = mpu401_read_data(emu, midi);
1267 if (midi->substream_input)
1268 snd_rawmidi_receive(midi->substream_input, &byte, 1);
1269 }
1270 }
1271 spin_unlock(&midi->input_lock);
1272
1273 spin_lock(&midi->output_lock);
1274 if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
1275 if (midi->substream_output &&
1276 snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
1277 mpu401_write_data(emu, midi, byte);
1278 } else {
1279 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1280 }
1281 }
1282 spin_unlock(&midi->output_lock);
1283}
1284
4b32f1aa 1285static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
1da177e4
LT		 1286{
1287 do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
1288}
1289
4b32f1aa
TI		 1290static void snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
1291 struct emu10k1x_midi *midi, unsigned char cmd, int ack)
1da177e4
LT		 1292{
1293 unsigned long flags;
1294 int timeout, ok;
1295
1296 spin_lock_irqsave(&midi->input_lock, flags);
1297 mpu401_write_data(emu, midi, 0x00);
1298 /* mpu401_clear_rx(emu, midi); */
1299
1300 mpu401_write_cmd(emu, midi, cmd);
1301 if (ack) {
1302 ok = 0;
1303 timeout = 10000;
1304 while (!ok && timeout-- > 0) {
1305 if (mpu401_input_avail(emu, midi)) {
1306 if (mpu401_read_data(emu, midi) == MPU401_ACK)
1307 ok = 1;
1308 }
1309 }
1310 if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
1311 ok = 1;
1312 } else {
1313 ok = 1;
1314 }
1315 spin_unlock_irqrestore(&midi->input_lock, flags);
1316 if (!ok)
1317 snd_printk(KERN_ERR "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
1318 cmd, emu->port,
1319 mpu401_read_stat(emu, midi),
1320 mpu401_read_data(emu, midi));
1321}
1322
4b32f1aa 1323static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
1da177e4 1324{
4b32f1aa
TI		 1325 struct emu10k1x *emu;
1326 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1327 unsigned long flags;
1328
1329 emu = midi->emu;
1330 snd_assert(emu, return -ENXIO);
1331 spin_lock_irqsave(&midi->open_lock, flags);
1332 midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
1333 midi->substream_input = substream;
1334 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1335 spin_unlock_irqrestore(&midi->open_lock, flags);
1336 snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
1337 snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
1338 } else {
1339 spin_unlock_irqrestore(&midi->open_lock, flags);
1340 }
1341 return 0;
1342}
1343
4b32f1aa 1344static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
1da177e4 1345{
4b32f1aa
TI		 1346 struct emu10k1x *emu;
1347 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1348 unsigned long flags;
1349
1350 emu = midi->emu;
1351 snd_assert(emu, return -ENXIO);
1352 spin_lock_irqsave(&midi->open_lock, flags);
1353 midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
1354 midi->substream_output = substream;
1355 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1356 spin_unlock_irqrestore(&midi->open_lock, flags);
1357 snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
1358 snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
1359 } else {
1360 spin_unlock_irqrestore(&midi->open_lock, flags);
1361 }
1362 return 0;
1363}
1364
4b32f1aa 1365static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
1da177e4 1366{
4b32f1aa
TI		 1367 struct emu10k1x *emu;
1368 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1369 unsigned long flags;
1370
1371 emu = midi->emu;
1372 snd_assert(emu, return -ENXIO);
1373 spin_lock_irqsave(&midi->open_lock, flags);
1374 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1375 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
1376 midi->substream_input = NULL;
1377 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1378 spin_unlock_irqrestore(&midi->open_lock, flags);
1379 snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1380 } else {
1381 spin_unlock_irqrestore(&midi->open_lock, flags);
1382 }
1383 return 0;
1384}
1385
4b32f1aa 1386static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
1da177e4 1387{
4b32f1aa
TI		 1388 struct emu10k1x *emu;
1389 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1390 unsigned long flags;
1391
1392 emu = midi->emu;
1393 snd_assert(emu, return -ENXIO);
1394 spin_lock_irqsave(&midi->open_lock, flags);
1395 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1396 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
1397 midi->substream_output = NULL;
1398 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1399 spin_unlock_irqrestore(&midi->open_lock, flags);
1400 snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1401 } else {
1402 spin_unlock_irqrestore(&midi->open_lock, flags);
1403 }
1404 return 0;
1405}
1406
4b32f1aa 1407static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1da177e4 1408{
4b32f1aa
TI		 1409 struct emu10k1x *emu;
1410 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1411 emu = midi->emu;
1412 snd_assert(emu, return);
1413
1414 if (up)
1415 snd_emu10k1x_intr_enable(emu, midi->rx_enable);
1416 else
1417 snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1418}
1419
4b32f1aa 1420static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1da177e4 1421{
4b32f1aa
TI		 1422 struct emu10k1x *emu;
1423 struct emu10k1x_midi *midi = substream->rmidi->private_data;
1da177e4
LT		 1424 unsigned long flags;
1425
1426 emu = midi->emu;
1427 snd_assert(emu, return);
1428
1429 if (up) {
1430 int max = 4;
1431 unsigned char byte;
1432
1433 /* try to send some amount of bytes here before interrupts */
1434 spin_lock_irqsave(&midi->output_lock, flags);
1435 while (max > 0) {
1436 if (mpu401_output_ready(emu, midi)) {
1437 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
1438 snd_rawmidi_transmit(substream, &byte, 1) != 1) {
1439 /* no more data */
1440 spin_unlock_irqrestore(&midi->output_lock, flags);
1441 return;
1442 }
1443 mpu401_write_data(emu, midi, byte);
1444 max--;
1445 } else {
1446 break;
1447 }
1448 }
1449 spin_unlock_irqrestore(&midi->output_lock, flags);
1450 snd_emu10k1x_intr_enable(emu, midi->tx_enable);
1451 } else {
1452 snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1453 }
1454}
1455
1456/*
1457
1458 */
1459
4b32f1aa 1460static struct snd_rawmidi_ops snd_emu10k1x_midi_output =
1da177e4
LT		 1461{
1462 .open = snd_emu10k1x_midi_output_open,
1463 .close = snd_emu10k1x_midi_output_close,
1464 .trigger = snd_emu10k1x_midi_output_trigger,
1465};
1466
4b32f1aa 1467static struct snd_rawmidi_ops snd_emu10k1x_midi_input =
1da177e4
LT		 1468{
1469 .open = snd_emu10k1x_midi_input_open,
1470 .close = snd_emu10k1x_midi_input_close,
1471 .trigger = snd_emu10k1x_midi_input_trigger,
1472};
1473
4b32f1aa 1474static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
1da177e4 1475{
4b32f1aa 1476 struct emu10k1x_midi *midi = rmidi->private_data;
1da177e4
LT		 1477 midi->interrupt = NULL;
1478 midi->rmidi = NULL;
1479}
1480
4b32f1aa
TI		 1481static int __devinit emu10k1x_midi_init(struct emu10k1x *emu,
1482 struct emu10k1x_midi *midi, int device, char *name)
1da177e4 1483{
4b32f1aa 1484 struct snd_rawmidi *rmidi;
1da177e4
LT		 1485 int err;
1486
1487 if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
1488 return err;
1489 midi->emu = emu;
1490 spin_lock_init(&midi->open_lock);
1491 spin_lock_init(&midi->input_lock);
1492 spin_lock_init(&midi->output_lock);
1493 strcpy(rmidi->name, name);
1494 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
1495 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
1496 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1497 SNDRV_RAWMIDI_INFO_INPUT |
1498 SNDRV_RAWMIDI_INFO_DUPLEX;
1499 rmidi->private_data = midi;
1500 rmidi->private_free = snd_emu10k1x_midi_free;
1501 midi->rmidi = rmidi;
1502 return 0;
1503}
1504
4b32f1aa 1505static int __devinit snd_emu10k1x_midi(struct emu10k1x *emu)
1da177e4 1506{
4b32f1aa 1507 struct emu10k1x_midi *midi = &emu->midi;
1da177e4
LT		 1508 int err;
1509
1510 if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
1511 return err;
1512
1513 midi->tx_enable = INTE_MIDITXENABLE;
1514 midi->rx_enable = INTE_MIDIRXENABLE;
1515 midi->port = MUDATA;
1516 midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
1517 midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
1518 midi->interrupt = snd_emu10k1x_midi_interrupt;
1519 return 0;
1520}
1521
1522static int __devinit snd_emu10k1x_probe(struct pci_dev *pci,
1523 const struct pci_device_id *pci_id)
1524{
1525 static int dev;
4b32f1aa
TI		 1526 struct snd_card *card;
1527 struct emu10k1x *chip;
1da177e4
LT		 1528 int err;
1529
1530 if (dev >= SNDRV_CARDS)
1531 return -ENODEV;
1532 if (!enable[dev]) {
1533 dev++;
1534 return -ENOENT;
1535 }
1536
1537 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1538 if (card == NULL)
1539 return -ENOMEM;
1540
1541 if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
1542 snd_card_free(card);
1543 return err;
1544 }
1545
1546 if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) {
1547 snd_card_free(card);
1548 return err;
1549 }
1550 if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) {
1551 snd_card_free(card);
1552 return err;
1553 }
1554 if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) {
1555 snd_card_free(card);
1556 return err;
1557 }
1558
1559 if ((err = snd_emu10k1x_ac97(chip)) < 0) {
1560 snd_card_free(card);
1561 return err;
1562 }
1563
1564 if ((err = snd_emu10k1x_mixer(chip)) < 0) {
1565 snd_card_free(card);
1566 return err;
1567 }
1568
1569 if ((err = snd_emu10k1x_midi(chip)) < 0) {
1570 snd_card_free(card);
1571 return err;
1572 }
1573
1574 snd_emu10k1x_proc_init(chip);
1575
1576 strcpy(card->driver, "EMU10K1X");
1577 strcpy(card->shortname, "Dell Sound Blaster Live!");
1578 sprintf(card->longname, "%s at 0x%lx irq %i",
1579 card->shortname, chip->port, chip->irq);
1580
1581 if ((err = snd_card_register(card)) < 0) {
1582 snd_card_free(card);
1583 return err;
1584 }
1585
1586 pci_set_drvdata(pci, card);
1587 dev++;
1588 return 0;
1589}
1590
1591static void __devexit snd_emu10k1x_remove(struct pci_dev *pci)
1592{
1593 snd_card_free(pci_get_drvdata(pci));
1594 pci_set_drvdata(pci, NULL);
1595}
1596
1597// PCI IDs
396c9b92 1598static struct pci_device_id snd_emu10k1x_ids[] __devinitdata = {
1da177e4
LT		 1599 { 0x1102, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Dell OEM version (EMU10K1) */
1600 { 0, }
1601};
1602MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
1603
1604// pci_driver definition
1605static struct pci_driver driver = {
1606 .name = "EMU10K1X",
1607 .id_table = snd_emu10k1x_ids,
1608 .probe = snd_emu10k1x_probe,
1609 .remove = __devexit_p(snd_emu10k1x_remove),
1610};
1611
1612// initialization of the module
1613static int __init alsa_card_emu10k1x_init(void)
1614{
1615 int err;
1616
01d25d46 1617 if ((err = pci_register_driver(&driver)) > 0)
1da177e4
LT		 1618 return err;
1619
1620 return 0;
1621}
1622
1623// clean up the module
1624static void __exit alsa_card_emu10k1x_exit(void)
1625{
1626 pci_unregister_driver(&driver);
1627}
1628
1629module_init(alsa_card_emu10k1x_init)
1630module_exit(alsa_card_emu10k1x_exit)
Linux kernel - Deliverables
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