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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / sound / pci / es1938.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
1da177e4
LT		 50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
65a77217 55#include <linux/module.h>
1da177e4 56#include <linux/delay.h>
910638ae 57#include <linux/dma-mapping.h>
1da177e4
LT		 58#include <sound/core.h>
59#include <sound/control.h>
60#include <sound/pcm.h>
61#include <sound/opl3.h>
62#include <sound/mpu401.h>
63#include <sound/initval.h>
0b593972 64#include <sound/tlv.h>
1da177e4
LT		 65
66#include <asm/io.h>
67
68MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
69MODULE_DESCRIPTION("ESS Solo-1");
70MODULE_LICENSE("GPL");
71MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
72 "{ESS,ES1946},"
73 "{ESS,ES1969},"
74 "{TerraTec,128i PCI}}");
75
76#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
77#define SUPPORT_JOYSTICK 1
78#endif
79
1da177e4
LT		 80static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
81static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
a67ff6a5 82static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
1da177e4
LT		 83
84module_param_array(index, int, NULL, 0444);
85MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
86module_param_array(id, charp, NULL, 0444);
87MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
88module_param_array(enable, bool, NULL, 0444);
89MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
90
91#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
92
93#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
94
95#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
96
97#define SL_PCI_LEGACYCONTROL 0x40
98#define SL_PCI_CONFIG 0x50
99#define SL_PCI_DDMACONTROL 0x60
100
101#define ESSIO_REG_AUDIO2DMAADDR 0
102#define ESSIO_REG_AUDIO2DMACOUNT 4
103#define ESSIO_REG_AUDIO2MODE 6
104#define ESSIO_REG_IRQCONTROL 7
105
106#define ESSDM_REG_DMAADDR 0x00
107#define ESSDM_REG_DMACOUNT 0x04
108#define ESSDM_REG_DMACOMMAND 0x08
109#define ESSDM_REG_DMASTATUS 0x08
110#define ESSDM_REG_DMAMODE 0x0b
111#define ESSDM_REG_DMACLEAR 0x0d
112#define ESSDM_REG_DMAMASK 0x0f
113
114#define ESSSB_REG_FMLOWADDR 0x00
115#define ESSSB_REG_FMHIGHADDR 0x02
116#define ESSSB_REG_MIXERADDR 0x04
117#define ESSSB_REG_MIXERDATA 0x05
118
119#define ESSSB_IREG_AUDIO1 0x14
120#define ESSSB_IREG_MICMIX 0x1a
121#define ESSSB_IREG_RECSRC 0x1c
122#define ESSSB_IREG_MASTER 0x32
123#define ESSSB_IREG_FM 0x36
124#define ESSSB_IREG_AUXACD 0x38
125#define ESSSB_IREG_AUXB 0x3a
126#define ESSSB_IREG_PCSPEAKER 0x3c
127#define ESSSB_IREG_LINE 0x3e
128#define ESSSB_IREG_SPATCONTROL 0x50
129#define ESSSB_IREG_SPATLEVEL 0x52
130#define ESSSB_IREG_MASTER_LEFT 0x60
131#define ESSSB_IREG_MASTER_RIGHT 0x62
132#define ESSSB_IREG_MPU401CONTROL 0x64
133#define ESSSB_IREG_MICMIXRECORD 0x68
134#define ESSSB_IREG_AUDIO2RECORD 0x69
135#define ESSSB_IREG_AUXACDRECORD 0x6a
136#define ESSSB_IREG_FMRECORD 0x6b
137#define ESSSB_IREG_AUXBRECORD 0x6c
138#define ESSSB_IREG_MONO 0x6d
139#define ESSSB_IREG_LINERECORD 0x6e
140#define ESSSB_IREG_MONORECORD 0x6f
141#define ESSSB_IREG_AUDIO2SAMPLE 0x70
142#define ESSSB_IREG_AUDIO2MODE 0x71
143#define ESSSB_IREG_AUDIO2FILTER 0x72
144#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
145#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
146#define ESSSB_IREG_AUDIO2CONTROL1 0x78
147#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
148#define ESSSB_IREG_AUDIO2 0x7c
149
150#define ESSSB_REG_RESET 0x06
151
152#define ESSSB_REG_READDATA 0x0a
153#define ESSSB_REG_WRITEDATA 0x0c
154#define ESSSB_REG_READSTATUS 0x0c
155
156#define ESSSB_REG_STATUS 0x0e
157
158#define ESS_CMD_EXTSAMPLERATE 0xa1
159#define ESS_CMD_FILTERDIV 0xa2
160#define ESS_CMD_DMACNTRELOADL 0xa4
161#define ESS_CMD_DMACNTRELOADH 0xa5
162#define ESS_CMD_ANALOGCONTROL 0xa8
163#define ESS_CMD_IRQCONTROL 0xb1
164#define ESS_CMD_DRQCONTROL 0xb2
165#define ESS_CMD_RECLEVEL 0xb4
166#define ESS_CMD_SETFORMAT 0xb6
167#define ESS_CMD_SETFORMAT2 0xb7
168#define ESS_CMD_DMACONTROL 0xb8
169#define ESS_CMD_DMATYPE 0xb9
170#define ESS_CMD_OFFSETLEFT 0xba
171#define ESS_CMD_OFFSETRIGHT 0xbb
172#define ESS_CMD_READREG 0xc0
173#define ESS_CMD_ENABLEEXT 0xc6
174#define ESS_CMD_PAUSEDMA 0xd0
175#define ESS_CMD_ENABLEAUDIO1 0xd1
176#define ESS_CMD_STOPAUDIO1 0xd3
177#define ESS_CMD_AUDIO1STATUS 0xd8
178#define ESS_CMD_CONTDMA 0xd4
179#define ESS_CMD_TESTIRQ 0xf2
180
181#define ESS_RECSRC_MIC 0
182#define ESS_RECSRC_AUXACD 2
183#define ESS_RECSRC_AUXB 5
184#define ESS_RECSRC_LINE 6
185#define ESS_RECSRC_NONE 7
186
187#define DAC1 0x01
188#define ADC1 0x02
189#define DAC2 0x04
190
191/*
192
193 */
194
1da177e4
LT		 195#define SAVED_REG_SIZE 32 /* max. number of registers to save */
196
e571f594 197struct es1938 {
1da177e4
LT		 198 int irq;
199
200 unsigned long io_port;
201 unsigned long sb_port;
202 unsigned long vc_port;
203 unsigned long mpu_port;
204 unsigned long game_port;
205 unsigned long ddma_port;
206
207 unsigned char irqmask;
208 unsigned char revision;
209
e571f594
TI		 210 struct snd_kcontrol *hw_volume;
211 struct snd_kcontrol *hw_switch;
212 struct snd_kcontrol *master_volume;
213 struct snd_kcontrol *master_switch;
1da177e4
LT		 214
215 struct pci_dev *pci;
e571f594
TI		 216 struct snd_card *card;
217 struct snd_pcm *pcm;
218 struct snd_pcm_substream *capture_substream;
219 struct snd_pcm_substream *playback1_substream;
220 struct snd_pcm_substream *playback2_substream;
221 struct snd_rawmidi *rmidi;
1da177e4
LT		 222
223 unsigned int dma1_size;
224 unsigned int dma2_size;
225 unsigned int dma1_start;
226 unsigned int dma2_start;
227 unsigned int dma1_shift;
228 unsigned int dma2_shift;
19e2e3c3 229 unsigned int last_capture_dmaaddr;
1da177e4
LT		 230 unsigned int active;
231
232 spinlock_t reg_lock;
233 spinlock_t mixer_lock;
e571f594 234 struct snd_info_entry *proc_entry;
1da177e4
LT		 235
236#ifdef SUPPORT_JOYSTICK
237 struct gameport *gameport;
238#endif
c7561cd8 239#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 240 unsigned char saved_regs[SAVED_REG_SIZE];
241#endif
242};
243
7d12e780 244static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 245
9baa3c34 246static const struct pci_device_id snd_es1938_ids[] = {
28d27aae 247 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
1da177e4
LT		 248 { 0, }
249};
250
251MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
252
253#define RESET_LOOP_TIMEOUT 0x10000
254#define WRITE_LOOP_TIMEOUT 0x10000
255#define GET_LOOP_TIMEOUT 0x01000
256
1da177e4
LT		 257/* -----------------------------------------------------------------
258 * Write to a mixer register
259 * -----------------------------------------------------------------*/
e571f594 260static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 261{
262 unsigned long flags;
263 spin_lock_irqsave(&chip->mixer_lock, flags);
264 outb(reg, SLSB_REG(chip, MIXERADDR));
265 outb(val, SLSB_REG(chip, MIXERDATA));
266 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 267 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 268}
269
270/* -----------------------------------------------------------------
271 * Read from a mixer register
272 * -----------------------------------------------------------------*/
e571f594 273static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 274{
275 int data;
276 unsigned long flags;
277 spin_lock_irqsave(&chip->mixer_lock, flags);
278 outb(reg, SLSB_REG(chip, MIXERADDR));
279 data = inb(SLSB_REG(chip, MIXERDATA));
280 spin_unlock_irqrestore(&chip->mixer_lock, flags);
ebebecaa 281 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 282 return data;
283}
284
285/* -----------------------------------------------------------------
286 * Write to some bits of a mixer register (return old value)
287 * -----------------------------------------------------------------*/
e571f594
TI		 288static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
289 unsigned char mask, unsigned char val)
1da177e4
LT		 290{
291 unsigned long flags;
292 unsigned char old, new, oval;
293 spin_lock_irqsave(&chip->mixer_lock, flags);
294 outb(reg, SLSB_REG(chip, MIXERADDR));
295 old = inb(SLSB_REG(chip, MIXERDATA));
296 oval = old & mask;
297 if (val != oval) {
298 new = (old & ~mask) | (val & mask);
299 outb(new, SLSB_REG(chip, MIXERDATA));
ebebecaa
TI		 300 dev_dbg(chip->card->dev,
301 "Mixer reg %02x was %02x, set to %02x\n",
99b359ba 302 reg, old, new);
1da177e4
LT		 303 }
304 spin_unlock_irqrestore(&chip->mixer_lock, flags);
305 return oval;
306}
307
308/* -----------------------------------------------------------------
309 * Write command to Controller Registers
310 * -----------------------------------------------------------------*/
e571f594 311static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 312{
313 int i;
314 unsigned char v;
315 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
316 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
317 outb(cmd, SLSB_REG(chip, WRITEDATA));
318 return;
319 }
320 }
ebebecaa
TI		 321 dev_err(chip->card->dev,
322 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 323}
324
325/* -----------------------------------------------------------------
326 * Read the Read Data Buffer
327 * -----------------------------------------------------------------*/
e571f594 328static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 329{
330 int i;
331 unsigned char v;
332 for (i = GET_LOOP_TIMEOUT; i; i--)
333 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
334 return inb(SLSB_REG(chip, READDATA));
ebebecaa 335 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 336 return -ENODEV;
337}
338
339/* -----------------------------------------------------------------
340 * Write value cmd register
341 * -----------------------------------------------------------------*/
e571f594 342static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 343{
344 unsigned long flags;
345 spin_lock_irqsave(&chip->reg_lock, flags);
346 snd_es1938_write_cmd(chip, reg);
347 snd_es1938_write_cmd(chip, val);
348 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 349 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 350}
351
352/* -----------------------------------------------------------------
353 * Read data from cmd register and return it
354 * -----------------------------------------------------------------*/
e571f594 355static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 356{
357 unsigned char val;
358 unsigned long flags;
359 spin_lock_irqsave(&chip->reg_lock, flags);
360 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
361 snd_es1938_write_cmd(chip, reg);
362 val = snd_es1938_get_byte(chip);
363 spin_unlock_irqrestore(&chip->reg_lock, flags);
ebebecaa 364 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 365 return val;
366}
367
368/* -----------------------------------------------------------------
369 * Write data to cmd register and return old value
370 * -----------------------------------------------------------------*/
e571f594
TI		 371static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
372 unsigned char val)
1da177e4
LT		 373{
374 unsigned long flags;
375 unsigned char old, new, oval;
376 spin_lock_irqsave(&chip->reg_lock, flags);
377 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
378 snd_es1938_write_cmd(chip, reg);
379 old = snd_es1938_get_byte(chip);
380 oval = old & mask;
381 if (val != oval) {
382 snd_es1938_write_cmd(chip, reg);
383 new = (old & ~mask) | (val & mask);
384 snd_es1938_write_cmd(chip, new);
ebebecaa 385 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
99b359ba 386 reg, old, new);
1da177e4
LT		 387 }
388 spin_unlock_irqrestore(&chip->reg_lock, flags);
389 return oval;
390}
391
392/* --------------------------------------------------------------------
393 * Reset the chip
394 * --------------------------------------------------------------------*/
e571f594 395static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 396{
397 int i;
398
399 outb(3, SLSB_REG(chip, RESET));
400 inb(SLSB_REG(chip, RESET));
401 outb(0, SLSB_REG(chip, RESET));
402 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
403 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
404 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
405 goto __next;
406 }
407 }
ebebecaa 408 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
1da177e4
LT		 409
410 __next:
411 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
412
413 /* Demand transfer DMA: 4 bytes per DMA request */
414 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
415
416 /* Change behaviour of register A1
417 4x oversampling
418 2nd channel DAC asynchronous */
419 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
420 /* enable/select DMA channel and IRQ channel */
421 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
422 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
423 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
424 /* Set spatializer parameters to recommended values */
425 snd_es1938_mixer_write(chip, 0x54, 0x8f);
426 snd_es1938_mixer_write(chip, 0x56, 0x95);
427 snd_es1938_mixer_write(chip, 0x58, 0x94);
428 snd_es1938_mixer_write(chip, 0x5a, 0x80);
429}
430
431/* --------------------------------------------------------------------
432 * Reset the FIFOs
433 * --------------------------------------------------------------------*/
e571f594 434static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 435{
436 outb(2, SLSB_REG(chip, RESET));
437 outb(0, SLSB_REG(chip, RESET));
438}
439
e571f594 440static struct snd_ratnum clocks[2] = {
1da177e4
LT		 441 {
442 .num = 793800,
443 .den_min = 1,
444 .den_max = 128,
445 .den_step = 1,
446 },
447 {
448 .num = 768000,
449 .den_min = 1,
450 .den_max = 128,
451 .den_step = 1,
452 }
453};
454
e571f594 455static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 456 .nrats = 2,
457 .rats = clocks,
458};
459
460
e571f594
TI		 461static void snd_es1938_rate_set(struct es1938 *chip,
462 struct snd_pcm_substream *substream,
1da177e4
LT		 463 int mode)
464{
465 unsigned int bits, div0;
e571f594 466 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 467 if (runtime->rate_num == clocks[0].num)
468 bits = 128 - runtime->rate_den;
469 else
470 bits = 256 - runtime->rate_den;
471
472 /* set filter register */
473 div0 = 256 - 7160000*20/(8*82*runtime->rate);
474
475 if (mode == DAC2) {
476 snd_es1938_mixer_write(chip, 0x70, bits);
477 snd_es1938_mixer_write(chip, 0x72, div0);
478 } else {
479 snd_es1938_write(chip, 0xA1, bits);
480 snd_es1938_write(chip, 0xA2, div0);
481 }
482}
483
484/* --------------------------------------------------------------------
485 * Configure Solo1 builtin DMA Controller
486 * --------------------------------------------------------------------*/
487
e571f594 488static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 489{
490 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
491 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
492 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
493 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
494}
495
e571f594 496static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 497{
498 /* Enable DMA controller */
499 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
500 /* 1. Master reset */
501 outb(0, SLDM_REG(chip, DMACLEAR));
502 /* 2. Mask DMA */
503 outb(1, SLDM_REG(chip, DMAMASK));
504 outb(0x18, SLDM_REG(chip, DMAMODE));
505 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
506 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
507 /* 3. Unmask DMA */
508 outb(0, SLDM_REG(chip, DMAMASK));
509}
510
e571f594 511static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 512{
513 /* Enable DMA controller */
514 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
515 /* 1. Master reset */
516 outb(0, SLDM_REG(chip, DMACLEAR));
517 /* 2. Mask DMA */
518 outb(1, SLDM_REG(chip, DMAMASK));
519 outb(0x14, SLDM_REG(chip, DMAMODE));
520 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 521 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT		 522 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
523 /* 3. Unmask DMA */
524 outb(0, SLDM_REG(chip, DMAMASK));
525}
526
527/* ----------------------------------------------------------------------
528 *
529 * *** PCM part ***
530 */
531
e571f594 532static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 533 int cmd)
534{
e571f594 535 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 536 int val;
537 switch (cmd) {
538 case SNDRV_PCM_TRIGGER_START:
93b9f426 539 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 540 val = 0x0f;
541 chip->active |= ADC1;
542 break;
543 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 544 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 545 val = 0x00;
546 chip->active &= ~ADC1;
547 break;
548 default:
549 return -EINVAL;
550 }
551 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
552 return 0;
553}
554
e571f594 555static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 556 int cmd)
557{
e571f594 558 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 559 switch (cmd) {
560 case SNDRV_PCM_TRIGGER_START:
93b9f426 561 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 562 /* According to the documentation this should be:
563 0x13 but that value may randomly swap stereo channels */
564 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
565 udelay(10);
566 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
567 /* This two stage init gives the FIFO -> DAC connection time to
568 * settle before first data from DMA flows in. This should ensure
569 * no swapping of stereo channels. Report a bug if otherwise :-) */
570 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
571 chip->active |= DAC2;
572 break;
573 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 574 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 575 outb(0, SLIO_REG(chip, AUDIO2MODE));
576 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
577 chip->active &= ~DAC2;
578 break;
579 default:
580 return -EINVAL;
581 }
582 return 0;
583}
584
e571f594 585static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 586 int cmd)
587{
e571f594 588 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 589 int val;
590 switch (cmd) {
591 case SNDRV_PCM_TRIGGER_START:
93b9f426 592 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 593 val = 5;
594 chip->active |= DAC1;
595 break;
596 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 597 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 598 val = 0;
599 chip->active &= ~DAC1;
600 break;
601 default:
602 return -EINVAL;
603 }
604 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
605 return 0;
606}
607
e571f594 608static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 609 int cmd)
610{
611 switch (substream->number) {
612 case 0:
613 return snd_es1938_playback1_trigger(substream, cmd);
614 case 1:
615 return snd_es1938_playback2_trigger(substream, cmd);
616 }
617 snd_BUG();
618 return -EINVAL;
619}
620
621/* --------------------------------------------------------------------
622 * First channel for Extended Mode Audio 1 ADC Operation
623 * --------------------------------------------------------------------*/
e571f594 624static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 625{
e571f594
TI		 626 struct es1938 *chip = snd_pcm_substream_chip(substream);
627 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 628 int u, is8, mono;
629 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
630 unsigned int count = snd_pcm_lib_period_bytes(substream);
631
632 chip->dma1_size = size;
633 chip->dma1_start = runtime->dma_addr;
634
635 mono = (runtime->channels > 1) ? 0 : 1;
636 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
637 u = snd_pcm_format_unsigned(runtime->format);
638
639 chip->dma1_shift = 2 - mono - is8;
640
641 snd_es1938_reset_fifo(chip);
642
643 /* program type */
644 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
645
646 /* set clock and counters */
647 snd_es1938_rate_set(chip, substream, ADC1);
648
649 count = 0x10000 - count;
650 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
651 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
652
653 /* initialize and configure ADC */
654 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
655 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
656 (u ? 0x00 : 0x20) |
657 (is8 ? 0x00 : 0x04) |
658 (mono ? 0x40 : 0x08));
659
660 // snd_es1938_reset_fifo(chip);
661
662 /* 11. configure system interrupt controller and DMA controller */
663 snd_es1938_capture_setdma(chip);
664
665 return 0;
666}
667
668
669/* ------------------------------------------------------------------------------
670 * Second Audio channel DAC Operation
671 * ------------------------------------------------------------------------------*/
e571f594 672static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 673{
e571f594
TI		 674 struct es1938 *chip = snd_pcm_substream_chip(substream);
675 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 676 int u, is8, mono;
677 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
678 unsigned int count = snd_pcm_lib_period_bytes(substream);
679
680 chip->dma2_size = size;
681 chip->dma2_start = runtime->dma_addr;
682
683 mono = (runtime->channels > 1) ? 0 : 1;
684 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
685 u = snd_pcm_format_unsigned(runtime->format);
686
687 chip->dma2_shift = 2 - mono - is8;
688
689 snd_es1938_reset_fifo(chip);
690
691 /* set clock and counters */
692 snd_es1938_rate_set(chip, substream, DAC2);
693
694 count >>= 1;
695 count = 0x10000 - count;
696 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
697 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
698
699 /* initialize and configure Audio 2 DAC */
e571f594
TI		 700 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
701 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 702
703 /* program DMA */
704 snd_es1938_playback1_setdma(chip);
705
706 return 0;
707}
708
e571f594 709static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 710{
e571f594
TI		 711 struct es1938 *chip = snd_pcm_substream_chip(substream);
712 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 713 int u, is8, mono;
714 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
715 unsigned int count = snd_pcm_lib_period_bytes(substream);
716
717 chip->dma1_size = size;
718 chip->dma1_start = runtime->dma_addr;
719
720 mono = (runtime->channels > 1) ? 0 : 1;
721 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
722 u = snd_pcm_format_unsigned(runtime->format);
723
724 chip->dma1_shift = 2 - mono - is8;
725
726 count = 0x10000 - count;
727
728 /* reset */
729 snd_es1938_reset_fifo(chip);
730
731 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
732
733 /* set clock and counters */
734 snd_es1938_rate_set(chip, substream, DAC1);
735 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
736 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
737
738 /* initialized and configure DAC */
739 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
740 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
741 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
742 0x90 | (mono ? 0x40 : 0x08) |
743 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
744
745 /* program DMA */
746 snd_es1938_playback2_setdma(chip);
747
748 return 0;
749}
750
e571f594 751static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 752{
753 switch (substream->number) {
754 case 0:
755 return snd_es1938_playback1_prepare(substream);
756 case 1:
757 return snd_es1938_playback2_prepare(substream);
758 }
759 snd_BUG();
760 return -EINVAL;
761}
762
19e2e3c3
HL		 763/* during the incrementing of dma counters the DMA register reads sometimes
764 returns garbage. To ensure a valid hw pointer, the following checks which
765 should be very unlikely to fail are used:
766 - is the current DMA address in the valid DMA range ?
767 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
768 One can argue this could differ by one byte depending on which register is
769 updated first, so the implementation below allows for that.
770*/
e571f594 771static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 772{
e571f594 773 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 774 size_t ptr;
19e2e3c3 775#if 0
1da177e4 776 size_t old, new;
1da177e4
LT		 777 /* This stuff is *needed*, don't ask why - AB */
778 old = inw(SLDM_REG(chip, DMACOUNT));
779 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
780 old = new;
781 ptr = chip->dma1_size - 1 - new;
782#else
19e2e3c3
HL		 783 size_t count;
784 unsigned int diff;
785
786 ptr = inl(SLDM_REG(chip, DMAADDR));
787 count = inw(SLDM_REG(chip, DMACOUNT));
788 diff = chip->dma1_start + chip->dma1_size - ptr - count;
789
790 if (diff > 3 || ptr < chip->dma1_start
791 || ptr >= chip->dma1_start+chip->dma1_size)
792 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
793 else
794 chip->last_capture_dmaaddr = ptr; /* good, remember it */
795
796 ptr -= chip->dma1_start;
1da177e4
LT		 797#endif
798 return ptr >> chip->dma1_shift;
799}
800
e571f594 801static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 802{
e571f594 803 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 804 size_t ptr;
805#if 1
806 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
807#else
808 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
809#endif
810 return ptr >> chip->dma2_shift;
811}
812
e571f594 813static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 814{
e571f594 815 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 816 size_t ptr;
817 size_t old, new;
818#if 1
819 /* This stuff is *needed*, don't ask why - AB */
820 old = inw(SLDM_REG(chip, DMACOUNT));
821 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
822 old = new;
823 ptr = chip->dma1_size - 1 - new;
824#else
825 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
826#endif
827 return ptr >> chip->dma1_shift;
828}
829
e571f594 830static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 831{
832 switch (substream->number) {
833 case 0:
834 return snd_es1938_playback1_pointer(substream);
835 case 1:
836 return snd_es1938_playback2_pointer(substream);
837 }
838 snd_BUG();
839 return -EINVAL;
840}
841
e571f594 842static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 843 int channel,
844 snd_pcm_uframes_t pos,
845 void __user *dst,
846 snd_pcm_uframes_t count)
847{
e571f594
TI		 848 struct snd_pcm_runtime *runtime = substream->runtime;
849 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 850 pos <<= chip->dma1_shift;
851 count <<= chip->dma1_shift;
da3cec35
TI		 852 if (snd_BUG_ON(pos + count > chip->dma1_size))
853 return -EINVAL;
1da177e4
LT		 854 if (pos + count < chip->dma1_size) {
855 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
856 return -EFAULT;
857 } else {
858 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
859 return -EFAULT;
860 if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
861 return -EFAULT;
862 }
863 return 0;
864}
865
866/*
867 * buffer management
868 */
e571f594
TI		 869static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
870 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 871
872{
873 int err;
874
875 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
876 return err;
877 return 0;
878}
879
e571f594 880static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 881{
882 return snd_pcm_lib_free_pages(substream);
883}
884
885/* ----------------------------------------------------------------------
886 * Audio1 Capture (ADC)
887 * ----------------------------------------------------------------------*/
e571f594 888static struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 889{
890 .info = (SNDRV_PCM_INFO_INTERLEAVED |
891 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 892 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
893 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 894 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
895 .rate_min = 6000,
896 .rate_max = 48000,
897 .channels_min = 1,
898 .channels_max = 2,
899 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
900 .period_bytes_min = 64,
901 .period_bytes_max = 0x8000,
902 .periods_min = 1,
903 .periods_max = 1024,
904 .fifo_size = 256,
905};
906
907/* -----------------------------------------------------------------------
908 * Audio2 Playback (DAC)
909 * -----------------------------------------------------------------------*/
e571f594 910static struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 911{
912 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
913 SNDRV_PCM_INFO_BLOCK_TRANSFER |
914 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 915 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
916 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 917 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
918 .rate_min = 6000,
919 .rate_max = 48000,
920 .channels_min = 1,
921 .channels_max = 2,
922 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
923 .period_bytes_min = 64,
924 .period_bytes_max = 0x8000,
925 .periods_min = 1,
926 .periods_max = 1024,
927 .fifo_size = 256,
928};
929
e571f594 930static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 931{
e571f594
TI		 932 struct es1938 *chip = snd_pcm_substream_chip(substream);
933 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 934
935 if (chip->playback2_substream)
936 return -EAGAIN;
937 chip->capture_substream = substream;
938 runtime->hw = snd_es1938_capture;
939 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
940 &hw_constraints_clocks);
941 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
942 return 0;
943}
944
e571f594 945static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 946{
e571f594
TI		 947 struct es1938 *chip = snd_pcm_substream_chip(substream);
948 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 949
950 switch (substream->number) {
951 case 0:
952 chip->playback1_substream = substream;
953 break;
954 case 1:
955 if (chip->capture_substream)
956 return -EAGAIN;
957 chip->playback2_substream = substream;
958 break;
959 default:
960 snd_BUG();
961 return -EINVAL;
962 }
963 runtime->hw = snd_es1938_playback;
964 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
965 &hw_constraints_clocks);
966 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
967 return 0;
968}
969
e571f594 970static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 971{
e571f594 972 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 973
974 chip->capture_substream = NULL;
975 return 0;
976}
977
e571f594 978static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 979{
e571f594 980 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 981
982 switch (substream->number) {
983 case 0:
984 chip->playback1_substream = NULL;
985 break;
986 case 1:
987 chip->playback2_substream = NULL;
988 break;
989 default:
990 snd_BUG();
991 return -EINVAL;
992 }
993 return 0;
994}
995
e571f594 996static struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 997 .open = snd_es1938_playback_open,
998 .close = snd_es1938_playback_close,
999 .ioctl = snd_pcm_lib_ioctl,
1000 .hw_params = snd_es1938_pcm_hw_params,
1001 .hw_free = snd_es1938_pcm_hw_free,
1002 .prepare = snd_es1938_playback_prepare,
1003 .trigger = snd_es1938_playback_trigger,
1004 .pointer = snd_es1938_playback_pointer,
1005};
1006
e571f594 1007static struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 1008 .open = snd_es1938_capture_open,
1009 .close = snd_es1938_capture_close,
1010 .ioctl = snd_pcm_lib_ioctl,
1011 .hw_params = snd_es1938_pcm_hw_params,
1012 .hw_free = snd_es1938_pcm_hw_free,
1013 .prepare = snd_es1938_capture_prepare,
1014 .trigger = snd_es1938_capture_trigger,
1015 .pointer = snd_es1938_capture_pointer,
1016 .copy = snd_es1938_capture_copy,
1017};
1018
e23e7a14 1019static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1020{
e571f594 1021 struct snd_pcm *pcm;
1da177e4
LT		 1022 int err;
1023
1024 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1025 return err;
1026 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1027 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1028
1029 pcm->private_data = chip;
1da177e4
LT		 1030 pcm->info_flags = 0;
1031 strcpy(pcm->name, "ESS Solo-1");
1032
1033 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1034 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1035
1036 chip->pcm = pcm;
1037 return 0;
1038}
1039
1040/* -------------------------------------------------------------------
1041 *
1042 * *** Mixer part ***
1043 */
1044
e571f594
TI		 1045static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1046 struct snd_ctl_elem_info *uinfo)
1da177e4 1047{
6b6b295e 1048 static const char * const texts[8] = {
1da177e4
LT		 1049 "Mic", "Mic Master", "CD", "AOUT",
1050 "Mic1", "Mix", "Line", "Master"
1051 };
1052
6b6b295e 1053 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1da177e4
LT		 1054}
1055
e571f594
TI		 1056static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_value *ucontrol)
1da177e4 1058{
e571f594 1059 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1060 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1061 return 0;
1062}
1063
e571f594
TI		 1064static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1065 struct snd_ctl_elem_value *ucontrol)
1da177e4 1066{
e571f594 1067 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1068 unsigned char val = ucontrol->value.enumerated.item[0];
1069
1070 if (val > 7)
1071 return -EINVAL;
1072 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1073}
1074
a5ce8890 1075#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1076
e571f594
TI		 1077static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1da177e4 1079{
e571f594 1080 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1081 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1082 ucontrol->value.integer.value[0] = !!(val & 8);
1083 return 0;
1084}
1085
e571f594
TI		 1086static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1087 struct snd_ctl_elem_value *ucontrol)
1da177e4 1088{
e571f594 1089 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1090 unsigned char oval, nval;
1091 int change;
1092 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1093 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1094 change = nval != oval;
1095 if (change) {
1096 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1097 snd_es1938_mixer_write(chip, 0x50, nval);
1098 }
1099 return change;
1100}
1101
e571f594
TI		 1102static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1104{
1105 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1106 uinfo->count = 2;
1107 uinfo->value.integer.min = 0;
1108 uinfo->value.integer.max = 63;
1109 return 0;
1110}
1111
e571f594
TI		 1112static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1113 struct snd_ctl_elem_value *ucontrol)
1da177e4 1114{
e571f594 1115 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1116 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1117 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1118 return 0;
1119}
1120
a5ce8890 1121#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1122
e571f594
TI		 1123static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1da177e4 1125{
e571f594 1126 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1127 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1128 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1129 return 0;
1130}
1131
e571f594 1132static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1133{
e571f594 1134 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1135 chip->master_volume = NULL;
1136 chip->master_switch = NULL;
1137 chip->hw_volume = NULL;
1138 chip->hw_switch = NULL;
1139}
1140
e571f594 1141static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1142 unsigned char mask, unsigned char val)
1143{
1144 if (reg < 0xa0)
1145 return snd_es1938_mixer_bits(chip, reg, mask, val);
1146 else
1147 return snd_es1938_bits(chip, reg, mask, val);
1148}
1149
e571f594 1150static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1151{
1152 if (reg < 0xa0)
1153 return snd_es1938_mixer_read(chip, reg);
1154 else
1155 return snd_es1938_read(chip, reg);
1156}
1157
0b593972
TI		 1158#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1159{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1160 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1161 .name = xname, .index = xindex, \
1162 .info = snd_es1938_info_single, \
1163 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1164 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1165 .tlv = { .p = xtlv } }
1da177e4
LT		 1166#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1167{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1168 .info = snd_es1938_info_single, \
1169 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1170 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1171
e571f594
TI		 1172static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1173 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1174{
1175 int mask = (kcontrol->private_value >> 16) & 0xff;
1176
1177 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1178 uinfo->count = 1;
1179 uinfo->value.integer.min = 0;
1180 uinfo->value.integer.max = mask;
1181 return 0;
1182}
1183
e571f594
TI		 1184static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1185 struct snd_ctl_elem_value *ucontrol)
1da177e4 1186{
e571f594 1187 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1188 int reg = kcontrol->private_value & 0xff;
1189 int shift = (kcontrol->private_value >> 8) & 0xff;
1190 int mask = (kcontrol->private_value >> 16) & 0xff;
1191 int invert = (kcontrol->private_value >> 24) & 0xff;
1192 int val;
1193
1194 val = snd_es1938_reg_read(chip, reg);
1195 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1196 if (invert)
1197 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1198 return 0;
1199}
1200
e571f594
TI		 1201static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1202 struct snd_ctl_elem_value *ucontrol)
1da177e4 1203{
e571f594 1204 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1205 int reg = kcontrol->private_value & 0xff;
1206 int shift = (kcontrol->private_value >> 8) & 0xff;
1207 int mask = (kcontrol->private_value >> 16) & 0xff;
1208 int invert = (kcontrol->private_value >> 24) & 0xff;
1209 unsigned char val;
1210
1211 val = (ucontrol->value.integer.value[0] & mask);
1212 if (invert)
1213 val = mask - val;
1214 mask <<= shift;
1215 val <<= shift;
1216 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1217}
1218
0b593972
TI		 1219#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1220{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1221 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1222 .name = xname, .index = xindex, \
1223 .info = snd_es1938_info_double, \
1224 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1225 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1226 .tlv = { .p = xtlv } }
1da177e4
LT		 1227#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1228{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1229 .info = snd_es1938_info_double, \
1230 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1231 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1232
e571f594
TI		 1233static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1234 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1235{
1236 int mask = (kcontrol->private_value >> 24) & 0xff;
1237
1238 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1239 uinfo->count = 2;
1240 uinfo->value.integer.min = 0;
1241 uinfo->value.integer.max = mask;
1242 return 0;
1243}
1244
e571f594
TI		 1245static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1246 struct snd_ctl_elem_value *ucontrol)
1da177e4 1247{
e571f594 1248 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1249 int left_reg = kcontrol->private_value & 0xff;
1250 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1251 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1252 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1253 int mask = (kcontrol->private_value >> 24) & 0xff;
1254 int invert = (kcontrol->private_value >> 22) & 1;
1255 unsigned char left, right;
1256
1257 left = snd_es1938_reg_read(chip, left_reg);
1258 if (left_reg != right_reg)
1259 right = snd_es1938_reg_read(chip, right_reg);
1260 else
1261 right = left;
1262 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1263 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1264 if (invert) {
1265 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1266 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1267 }
1268 return 0;
1269}
1270
e571f594
TI		 1271static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1272 struct snd_ctl_elem_value *ucontrol)
1da177e4 1273{
e571f594 1274 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1275 int left_reg = kcontrol->private_value & 0xff;
1276 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1277 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1278 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1279 int mask = (kcontrol->private_value >> 24) & 0xff;
1280 int invert = (kcontrol->private_value >> 22) & 1;
1281 int change;
1282 unsigned char val1, val2, mask1, mask2;
1283
1284 val1 = ucontrol->value.integer.value[0] & mask;
1285 val2 = ucontrol->value.integer.value[1] & mask;
1286 if (invert) {
1287 val1 = mask - val1;
1288 val2 = mask - val2;
1289 }
1290 val1 <<= shift_left;
1291 val2 <<= shift_right;
1292 mask1 = mask << shift_left;
1293 mask2 = mask << shift_right;
1294 if (left_reg != right_reg) {
1295 change = 0;
1296 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1297 change = 1;
1298 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1299 change = 1;
1300 } else {
1301 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1302 val1 | val2) != (val1 | val2));
1303 }
1304 return change;
1305}
1306
093eef41 1307static const DECLARE_TLV_DB_RANGE(db_scale_master,
0b593972
TI		 1308 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1309 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
093eef41 1310);
0b593972 1311
093eef41 1312static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
0b593972
TI		 1313 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1314 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
093eef41 1315);
0b593972 1316
093eef41 1317static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
0b593972
TI		 1318 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1319 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
093eef41 1320);
0b593972 1321
093eef41 1322static const DECLARE_TLV_DB_RANGE(db_scale_mic,
0b593972
TI		 1323 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1324 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
093eef41 1325);
0b593972 1326
093eef41 1327static const DECLARE_TLV_DB_RANGE(db_scale_line,
0b593972
TI		 1328 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1329 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
093eef41 1330);
0b593972 1331
0cb29ea0 1332static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1333
e571f594 1334static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1335ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1336 db_scale_master),
1da177e4
LT		 1337ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1338{
1339 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1340 .name = "Hardware Master Playback Volume",
1341 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1342 .info = snd_es1938_info_hw_volume,
1343 .get = snd_es1938_get_hw_volume,
1344},
1345{
1346 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1347 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1348 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1349 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1350 .info = snd_es1938_info_hw_switch,
1351 .get = snd_es1938_get_hw_switch,
0b593972 1352 .tlv = { .p = db_scale_master },
1da177e4
LT		 1353},
1354ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1355ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1356 db_scale_line),
1da177e4 1357ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1358ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1359 db_scale_mic),
1360ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1361 db_scale_line),
1362ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1363 db_scale_mic),
1364ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1365 db_scale_line),
1366ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1367 db_scale_capture),
d355c82a 1368ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1da177e4
LT		 1369ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1370ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1371{
1372 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1373 .name = "Capture Source",
1374 .info = snd_es1938_info_mux,
1375 .get = snd_es1938_get_mux,
1376 .put = snd_es1938_put_mux,
1377},
0b593972
TI		 1378ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1379 db_scale_line),
1380ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1381 db_scale_audio2),
1382ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1383 db_scale_mic),
1384ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1385 db_scale_line),
1386ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1387 db_scale_mic),
1388ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1389 db_scale_line),
1390ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1391 db_scale_line),
1392ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1393 db_scale_line),
1394ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1395 db_scale_audio2),
1396ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1397 db_scale_audio1),
1da177e4
LT		 1398ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1399{
1400 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1401 .name = "3D Control - Switch",
1402 .info = snd_es1938_info_spatializer_enable,
1403 .get = snd_es1938_get_spatializer_enable,
1404 .put = snd_es1938_put_spatializer_enable,
1405},
1406ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1407};
1408
1409
1410/* ---------------------------------------------------------------------------- */
1411/* ---------------------------------------------------------------------------- */
1412
1413/*
1414 * initialize the chip - used by resume callback, too
1415 */
e571f594 1416static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1417{
1418 /* reset chip */
1419 snd_es1938_reset(chip);
1420
1421 /* configure native mode */
1422
1423 /* enable bus master */
1424 pci_set_master(chip->pci);
1425
1426 /* disable legacy audio */
1427 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1428
1429 /* set DDMA base */
1430 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1431
1432 /* set DMA/IRQ policy */
1433 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1434
1435 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1436 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1437
1438 /* reset DMA */
1439 outb(0, SLDM_REG(chip, DMACLEAR));
1440}
1441
c7561cd8 1442#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 1443/*
1444 * PM support
1445 */
1446
1447static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1448 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1449 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1450 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1451 0xa8, 0xb4,
1452};
1453
1454
68cb2b55 1455static int es1938_suspend(struct device *dev)
1da177e4 1456{
68cb2b55
TI		 1457 struct pci_dev *pci = to_pci_dev(dev);
1458 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1459 struct es1938 *chip = card->private_data;
1da177e4
LT		 1460 unsigned char *s, *d;
1461
b34a580e 1462 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1463 snd_pcm_suspend_all(chip->pcm);
1464
1465 /* save mixer-related registers */
1466 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1467 *d = snd_es1938_reg_read(chip, *s);
1468
1469 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399 1470 if (chip->irq >= 0) {
b34a580e 1471 free_irq(chip->irq, chip);
30b35399
TI		 1472 chip->irq = -1;
1473 }
b34a580e
TI		 1474 pci_disable_device(pci);
1475 pci_save_state(pci);
68cb2b55 1476 pci_set_power_state(pci, PCI_D3hot);
1da177e4
LT		 1477 return 0;
1478}
1479
68cb2b55 1480static int es1938_resume(struct device *dev)
1da177e4 1481{
68cb2b55
TI		 1482 struct pci_dev *pci = to_pci_dev(dev);
1483 struct snd_card *card = dev_get_drvdata(dev);
b34a580e 1484 struct es1938 *chip = card->private_data;
1da177e4
LT		 1485 unsigned char *s, *d;
1486
30b35399 1487 pci_set_power_state(pci, PCI_D0);
b34a580e 1488 pci_restore_state(pci);
30b35399 1489 if (pci_enable_device(pci) < 0) {
ebebecaa 1490 dev_err(dev, "pci_enable_device failed, disabling device\n");
30b35399
TI		 1491 snd_card_disconnect(card);
1492 return -EIO;
1493 }
1494
1495 if (request_irq(pci->irq, snd_es1938_interrupt,
934c2b6d 1496 IRQF_SHARED, KBUILD_MODNAME, chip)) {
ebebecaa
TI		 1497 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1498 pci->irq);
30b35399
TI		 1499 snd_card_disconnect(card);
1500 return -EIO;
1501 }
b34a580e 1502 chip->irq = pci->irq;
1da177e4
LT		 1503 snd_es1938_chip_init(chip);
1504
1505 /* restore mixer-related registers */
1506 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1507 if (*s < 0xa0)
1508 snd_es1938_mixer_write(chip, *s, *d);
1509 else
1510 snd_es1938_write(chip, *s, *d);
1511 }
1512
b34a580e 1513 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1514 return 0;
1515}
68cb2b55
TI		 1516
1517static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1518#define ES1938_PM_OPS &es1938_pm
1519#else
1520#define ES1938_PM_OPS NULL
c7561cd8 1521#endif /* CONFIG_PM_SLEEP */
1da177e4
LT		 1522
1523#ifdef SUPPORT_JOYSTICK
e23e7a14 1524static int snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1525{
1526 struct gameport *gp;
1527
1528 chip->gameport = gp = gameport_allocate_port();
1529 if (!gp) {
ebebecaa
TI		 1530 dev_err(chip->card->dev,
1531 "cannot allocate memory for gameport\n");
1da177e4
LT		 1532 return -ENOMEM;
1533 }
1534
1535 gameport_set_name(gp, "ES1938");
1536 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1537 gameport_set_dev_parent(gp, &chip->pci->dev);
1538 gp->io = chip->game_port;
1539
1540 gameport_register_port(gp);
1541
1542 return 0;
1543}
1544
e571f594 1545static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1546{
1547 if (chip->gameport) {
1548 gameport_unregister_port(chip->gameport);
1549 chip->gameport = NULL;
1550 }
1551}
1552#else
e571f594
TI		 1553static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1554static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1555#endif /* SUPPORT_JOYSTICK */
1556
e571f594 1557static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1558{
1559 /* disable irqs */
1560 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1561 if (chip->rmidi)
1562 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1563
1564 snd_es1938_free_gameport(chip);
1565
f000fd80 1566 if (chip->irq >= 0)
e571f594 1567 free_irq(chip->irq, chip);
1da177e4
LT		 1568 pci_release_regions(chip->pci);
1569 pci_disable_device(chip->pci);
1570 kfree(chip);
1571 return 0;
1572}
1573
e571f594 1574static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1575{
e571f594 1576 struct es1938 *chip = device->device_data;
1da177e4
LT		 1577 return snd_es1938_free(chip);
1578}
1579
e23e7a14
BP		 1580static int snd_es1938_create(struct snd_card *card,
1581 struct pci_dev *pci,
1582 struct es1938 **rchip)
1da177e4 1583{
e571f594 1584 struct es1938 *chip;
1da177e4 1585 int err;
e571f594 1586 static struct snd_device_ops ops = {
1da177e4
LT		 1587 .dev_free = snd_es1938_dev_free,
1588 };
1589
1590 *rchip = NULL;
1591
1592 /* enable PCI device */
1593 if ((err = pci_enable_device(pci)) < 0)
1594 return err;
1595 /* check, if we can restrict PCI DMA transfers to 24 bits */
2f4f27d4
YH		 1596 if (pci_set_dma_mask(pci, DMA_BIT_MASK(24)) < 0 ||
1597 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(24)) < 0) {
ebebecaa
TI		 1598 dev_err(card->dev,
1599 "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1600 pci_disable_device(pci);
1601 return -ENXIO;
1602 }
1603
e560d8d8 1604 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1605 if (chip == NULL) {
1606 pci_disable_device(pci);
1607 return -ENOMEM;
1608 }
1609 spin_lock_init(&chip->reg_lock);
1610 spin_lock_init(&chip->mixer_lock);
1611 chip->card = card;
1612 chip->pci = pci;
30b35399 1613 chip->irq = -1;
1da177e4
LT		 1614 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1615 kfree(chip);
1616 pci_disable_device(pci);
1617 return err;
1618 }
1619 chip->io_port = pci_resource_start(pci, 0);
1620 chip->sb_port = pci_resource_start(pci, 1);
1621 chip->vc_port = pci_resource_start(pci, 2);
1622 chip->mpu_port = pci_resource_start(pci, 3);
1623 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1624 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
934c2b6d 1625 KBUILD_MODNAME, chip)) {
ebebecaa 1626 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1627 snd_es1938_free(chip);
1628 return -EBUSY;
1629 }
1630 chip->irq = pci->irq;
ebebecaa
TI		 1631 dev_dbg(card->dev,
1632 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4 1633 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1da177e4
LT		 1634
1635 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1636
1637 snd_es1938_chip_init(chip);
1638
1da177e4
LT		 1639 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1640 snd_es1938_free(chip);
1641 return err;
1642 }
1643
1da177e4
LT		 1644 *rchip = chip;
1645 return 0;
1646}
1647
1648/* --------------------------------------------------------------------
1649 * Interrupt handler
1650 * -------------------------------------------------------------------- */
7d12e780 1651static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1652{
e571f594 1653 struct es1938 *chip = dev_id;
1da177e4
LT		 1654 unsigned char status, audiostatus;
1655 int handled = 0;
1656
1657 status = inb(SLIO_REG(chip, IRQCONTROL));
1658#if 0
ebebecaa
TI		 1659 dev_dbg(chip->card->dev,
1660 "Es1938debug - interrupt status: =0x%x\n", status);
1da177e4
LT		 1661#endif
1662
1663 /* AUDIO 1 */
1664 if (status & 0x10) {
1665#if 0
ebebecaa 1666 dev_dbg(chip->card->dev,
ee419653 1667 "Es1938debug - AUDIO channel 1 interrupt\n");
ebebecaa 1668 dev_dbg(chip->card->dev,
ee419653 1669 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
e571f594 1670 inw(SLDM_REG(chip, DMACOUNT)));
ebebecaa 1671 dev_dbg(chip->card->dev,
ee419653 1672 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
e571f594 1673 inl(SLDM_REG(chip, DMAADDR)));
ebebecaa 1674 dev_dbg(chip->card->dev,
ee419653 1675 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
e571f594 1676 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1677#endif
1678 /* clear irq */
1679 handled = 1;
1680 audiostatus = inb(SLSB_REG(chip, STATUS));
1681 if (chip->active & ADC1)
1682 snd_pcm_period_elapsed(chip->capture_substream);
1683 else if (chip->active & DAC1)
1684 snd_pcm_period_elapsed(chip->playback2_substream);
1685 }
1686
1687 /* AUDIO 2 */
1688 if (status & 0x20) {
1689#if 0
ebebecaa 1690 dev_dbg(chip->card->dev,
ee419653 1691 "Es1938debug - AUDIO channel 2 interrupt\n");
ebebecaa 1692 dev_dbg(chip->card->dev,
ee419653 1693 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
e571f594 1694 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
ebebecaa 1695 dev_dbg(chip->card->dev,
ee419653 1696 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
e571f594 1697 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1698
1699#endif
1700 /* clear irq */
1701 handled = 1;
1702 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1703 if (chip->active & DAC2)
1704 snd_pcm_period_elapsed(chip->playback1_substream);
1705 }
1706
1707 /* Hardware volume */
1708 if (status & 0x40) {
1709 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1710 handled = 1;
1711 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1712 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1713 if (!split) {
e571f594
TI		 1714 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1715 &chip->master_switch->id);
1716 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1717 &chip->master_volume->id);
1da177e4
LT		 1718 }
1719 /* ack interrupt */
1720 snd_es1938_mixer_write(chip, 0x66, 0x00);
1721 }
1722
1723 /* MPU401 */
1724 if (status & 0x80) {
1725 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1726 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1727 // andreas@flying-snail.de
1728 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1729 if (chip->rmidi) {
1730 handled = 1;
7d12e780 1731 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1732 }
1733 }
1734 return IRQ_RETVAL(handled);
1735}
1736
1737#define ES1938_DMA_SIZE 64
1738
e23e7a14 1739static int snd_es1938_mixer(struct es1938 *chip)
1da177e4 1740{
e571f594 1741 struct snd_card *card;
1da177e4
LT		 1742 unsigned int idx;
1743 int err;
1744
1745 card = chip->card;
1746
1747 strcpy(card->mixername, "ESS Solo-1");
1748
1749 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1750 struct snd_kcontrol *kctl;
1da177e4
LT		 1751 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1752 switch (idx) {
1753 case 0:
1754 chip->master_volume = kctl;
1755 kctl->private_free = snd_es1938_hwv_free;
1756 break;
1757 case 1:
1758 chip->master_switch = kctl;
1759 kctl->private_free = snd_es1938_hwv_free;
1760 break;
1761 case 2:
1762 chip->hw_volume = kctl;
1763 kctl->private_free = snd_es1938_hwv_free;
1764 break;
1765 case 3:
1766 chip->hw_switch = kctl;
1767 kctl->private_free = snd_es1938_hwv_free;
1768 break;
1769 }
1770 if ((err = snd_ctl_add(card, kctl)) < 0)
1771 return err;
1772 }
1773 return 0;
1774}
1775
1776
e23e7a14
BP		 1777static int snd_es1938_probe(struct pci_dev *pci,
1778 const struct pci_device_id *pci_id)
1da177e4
LT		 1779{
1780 static int dev;
e571f594
TI		 1781 struct snd_card *card;
1782 struct es1938 *chip;
1783 struct snd_opl3 *opl3;
1da177e4
LT		 1784 int idx, err;
1785
1786 if (dev >= SNDRV_CARDS)
1787 return -ENODEV;
1788 if (!enable[dev]) {
1789 dev++;
1790 return -ENOENT;
1791 }
1792
60c5772b
TI		 1793 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1794 0, &card);
e58de7ba
TI		 1795 if (err < 0)
1796 return err;
1da177e4
LT		 1797 for (idx = 0; idx < 5; idx++) {
1798 if (pci_resource_start(pci, idx) == 0 ||
1799 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1800 snd_card_free(card);
1801 return -ENODEV;
1802 }
1803 }
1804 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1805 snd_card_free(card);
1806 return err;
1807 }
b34a580e 1808 card->private_data = chip;
1da177e4
LT		 1809
1810 strcpy(card->driver, "ES1938");
1811 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1812 sprintf(card->longname, "%s rev %i, irq %i",
1813 card->shortname,
1814 chip->revision,
1815 chip->irq);
1816
1817 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1818 snd_card_free(card);
1819 return err;
1820 }
1821 if ((err = snd_es1938_mixer(chip)) < 0) {
1822 snd_card_free(card);
1823 return err;
1824 }
1825 if (snd_opl3_create(card,
1826 SLSB_REG(chip, FMLOWADDR),
1827 SLSB_REG(chip, FMHIGHADDR),
1828 OPL3_HW_OPL3, 1, &opl3) < 0) {
ebebecaa 1829 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1da177e4
LT		 1830 SLSB_REG(chip, FMLOWADDR));
1831 } else {
1832 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1833 snd_card_free(card);
1834 return err;
1835 }
1836 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1837 snd_card_free(card);
1838 return err;
1839 }
1840 }
1841 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
dba8b469
CL		 1842 chip->mpu_port,
1843 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1844 -1, &chip->rmidi) < 0) {
ebebecaa 1845 dev_err(card->dev, "unable to initialize MPU-401\n");
1da177e4
LT		 1846 } else {
1847 // this line is vital for MIDI interrupt handling on ess-solo1
1848 // andreas@flying-snail.de
1849 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1850 }
1851
1852 snd_es1938_create_gameport(chip);
1853
1854 if ((err = snd_card_register(card)) < 0) {
1855 snd_card_free(card);
1856 return err;
1857 }
1858
1859 pci_set_drvdata(pci, card);
1860 dev++;
1861 return 0;
1862}
1863
e23e7a14 1864static void snd_es1938_remove(struct pci_dev *pci)
1da177e4
LT		 1865{
1866 snd_card_free(pci_get_drvdata(pci));
1da177e4
LT		 1867}
1868
e9f66d9b 1869static struct pci_driver es1938_driver = {
3733e424 1870 .name = KBUILD_MODNAME,
1da177e4
LT		 1871 .id_table = snd_es1938_ids,
1872 .probe = snd_es1938_probe,
e23e7a14 1873 .remove = snd_es1938_remove,
68cb2b55
TI		 1874 .driver = {
1875 .pm = ES1938_PM_OPS,
1876 },
1da177e4
LT		 1877};
1878
e9f66d9b 1879module_pci_driver(es1938_driver);
Linux kernel - Deliverables
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