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1da177e4 LT |
1 | /* |
2 | * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard | |
3 | * Copyright (c) by Jaromir Koutek <miri@punknet.cz>, | |
4 | * Jaroslav Kysela <perex@suse.cz>, | |
5 | * Thomas Sailer <sailer@ife.ee.ethz.ch>, | |
6 | * Abramo Bagnara <abramo@alsa-project.org>, | |
7 | * Markus Gruber <gruber@eikon.tum.de> | |
8 | * | |
9 | * Rewritten from sonicvibes.c source. | |
10 | * | |
11 | * TODO: | |
12 | * Rewrite better spinlocks | |
13 | * | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
28 | * | |
29 | */ | |
30 | ||
31 | /* | |
32 | NOTES: | |
33 | - Capture data is written unaligned starting from dma_base + 1 so I need to | |
34 | disable mmap and to add a copy callback. | |
35 | - After several cycle of the following: | |
36 | while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done | |
37 | a "playback write error (DMA or IRQ trouble?)" may happen. | |
38 | This is due to playback interrupts not generated. | |
39 | I suspect a timing issue. | |
40 | - Sometimes the interrupt handler is invoked wrongly during playback. | |
41 | This generates some harmless "Unexpected hw_pointer: wrong interrupt | |
42 | acknowledge". | |
43 | I've seen that using small period sizes. | |
44 | Reproducible with: | |
45 | mpg123 test.mp3 & | |
46 | hdparm -t -T /dev/hda | |
47 | */ | |
48 | ||
49 | ||
50 | #include <sound/driver.h> | |
51 | #include <linux/init.h> | |
52 | #include <linux/interrupt.h> | |
53 | #include <linux/pci.h> | |
54 | #include <linux/slab.h> | |
55 | #include <linux/gameport.h> | |
56 | #include <linux/moduleparam.h> | |
57 | #include <linux/delay.h> | |
910638ae | 58 | #include <linux/dma-mapping.h> |
1da177e4 LT |
59 | #include <sound/core.h> |
60 | #include <sound/control.h> | |
61 | #include <sound/pcm.h> | |
62 | #include <sound/opl3.h> | |
63 | #include <sound/mpu401.h> | |
64 | #include <sound/initval.h> | |
65 | ||
66 | #include <asm/io.h> | |
67 | ||
68 | MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>"); | |
69 | MODULE_DESCRIPTION("ESS Solo-1"); | |
70 | MODULE_LICENSE("GPL"); | |
71 | MODULE_SUPPORTED_DEVICE("{{ESS,ES1938}," | |
72 | "{ESS,ES1946}," | |
73 | "{ESS,ES1969}," | |
74 | "{TerraTec,128i PCI}}"); | |
75 | ||
76 | #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) | |
77 | #define SUPPORT_JOYSTICK 1 | |
78 | #endif | |
79 | ||
1da177e4 LT |
80 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
81 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
82 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
83 | ||
84 | module_param_array(index, int, NULL, 0444); | |
85 | MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard."); | |
86 | module_param_array(id, charp, NULL, 0444); | |
87 | MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard."); | |
88 | module_param_array(enable, bool, NULL, 0444); | |
89 | MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard."); | |
90 | ||
91 | #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x) | |
92 | ||
93 | #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x) | |
94 | ||
95 | #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x) | |
96 | ||
97 | #define SL_PCI_LEGACYCONTROL 0x40 | |
98 | #define SL_PCI_CONFIG 0x50 | |
99 | #define SL_PCI_DDMACONTROL 0x60 | |
100 | ||
101 | #define ESSIO_REG_AUDIO2DMAADDR 0 | |
102 | #define ESSIO_REG_AUDIO2DMACOUNT 4 | |
103 | #define ESSIO_REG_AUDIO2MODE 6 | |
104 | #define ESSIO_REG_IRQCONTROL 7 | |
105 | ||
106 | #define ESSDM_REG_DMAADDR 0x00 | |
107 | #define ESSDM_REG_DMACOUNT 0x04 | |
108 | #define ESSDM_REG_DMACOMMAND 0x08 | |
109 | #define ESSDM_REG_DMASTATUS 0x08 | |
110 | #define ESSDM_REG_DMAMODE 0x0b | |
111 | #define ESSDM_REG_DMACLEAR 0x0d | |
112 | #define ESSDM_REG_DMAMASK 0x0f | |
113 | ||
114 | #define ESSSB_REG_FMLOWADDR 0x00 | |
115 | #define ESSSB_REG_FMHIGHADDR 0x02 | |
116 | #define ESSSB_REG_MIXERADDR 0x04 | |
117 | #define ESSSB_REG_MIXERDATA 0x05 | |
118 | ||
119 | #define ESSSB_IREG_AUDIO1 0x14 | |
120 | #define ESSSB_IREG_MICMIX 0x1a | |
121 | #define ESSSB_IREG_RECSRC 0x1c | |
122 | #define ESSSB_IREG_MASTER 0x32 | |
123 | #define ESSSB_IREG_FM 0x36 | |
124 | #define ESSSB_IREG_AUXACD 0x38 | |
125 | #define ESSSB_IREG_AUXB 0x3a | |
126 | #define ESSSB_IREG_PCSPEAKER 0x3c | |
127 | #define ESSSB_IREG_LINE 0x3e | |
128 | #define ESSSB_IREG_SPATCONTROL 0x50 | |
129 | #define ESSSB_IREG_SPATLEVEL 0x52 | |
130 | #define ESSSB_IREG_MASTER_LEFT 0x60 | |
131 | #define ESSSB_IREG_MASTER_RIGHT 0x62 | |
132 | #define ESSSB_IREG_MPU401CONTROL 0x64 | |
133 | #define ESSSB_IREG_MICMIXRECORD 0x68 | |
134 | #define ESSSB_IREG_AUDIO2RECORD 0x69 | |
135 | #define ESSSB_IREG_AUXACDRECORD 0x6a | |
136 | #define ESSSB_IREG_FMRECORD 0x6b | |
137 | #define ESSSB_IREG_AUXBRECORD 0x6c | |
138 | #define ESSSB_IREG_MONO 0x6d | |
139 | #define ESSSB_IREG_LINERECORD 0x6e | |
140 | #define ESSSB_IREG_MONORECORD 0x6f | |
141 | #define ESSSB_IREG_AUDIO2SAMPLE 0x70 | |
142 | #define ESSSB_IREG_AUDIO2MODE 0x71 | |
143 | #define ESSSB_IREG_AUDIO2FILTER 0x72 | |
144 | #define ESSSB_IREG_AUDIO2TCOUNTL 0x74 | |
145 | #define ESSSB_IREG_AUDIO2TCOUNTH 0x76 | |
146 | #define ESSSB_IREG_AUDIO2CONTROL1 0x78 | |
147 | #define ESSSB_IREG_AUDIO2CONTROL2 0x7a | |
148 | #define ESSSB_IREG_AUDIO2 0x7c | |
149 | ||
150 | #define ESSSB_REG_RESET 0x06 | |
151 | ||
152 | #define ESSSB_REG_READDATA 0x0a | |
153 | #define ESSSB_REG_WRITEDATA 0x0c | |
154 | #define ESSSB_REG_READSTATUS 0x0c | |
155 | ||
156 | #define ESSSB_REG_STATUS 0x0e | |
157 | ||
158 | #define ESS_CMD_EXTSAMPLERATE 0xa1 | |
159 | #define ESS_CMD_FILTERDIV 0xa2 | |
160 | #define ESS_CMD_DMACNTRELOADL 0xa4 | |
161 | #define ESS_CMD_DMACNTRELOADH 0xa5 | |
162 | #define ESS_CMD_ANALOGCONTROL 0xa8 | |
163 | #define ESS_CMD_IRQCONTROL 0xb1 | |
164 | #define ESS_CMD_DRQCONTROL 0xb2 | |
165 | #define ESS_CMD_RECLEVEL 0xb4 | |
166 | #define ESS_CMD_SETFORMAT 0xb6 | |
167 | #define ESS_CMD_SETFORMAT2 0xb7 | |
168 | #define ESS_CMD_DMACONTROL 0xb8 | |
169 | #define ESS_CMD_DMATYPE 0xb9 | |
170 | #define ESS_CMD_OFFSETLEFT 0xba | |
171 | #define ESS_CMD_OFFSETRIGHT 0xbb | |
172 | #define ESS_CMD_READREG 0xc0 | |
173 | #define ESS_CMD_ENABLEEXT 0xc6 | |
174 | #define ESS_CMD_PAUSEDMA 0xd0 | |
175 | #define ESS_CMD_ENABLEAUDIO1 0xd1 | |
176 | #define ESS_CMD_STOPAUDIO1 0xd3 | |
177 | #define ESS_CMD_AUDIO1STATUS 0xd8 | |
178 | #define ESS_CMD_CONTDMA 0xd4 | |
179 | #define ESS_CMD_TESTIRQ 0xf2 | |
180 | ||
181 | #define ESS_RECSRC_MIC 0 | |
182 | #define ESS_RECSRC_AUXACD 2 | |
183 | #define ESS_RECSRC_AUXB 5 | |
184 | #define ESS_RECSRC_LINE 6 | |
185 | #define ESS_RECSRC_NONE 7 | |
186 | ||
187 | #define DAC1 0x01 | |
188 | #define ADC1 0x02 | |
189 | #define DAC2 0x04 | |
190 | ||
191 | /* | |
192 | ||
193 | */ | |
194 | ||
1da177e4 LT |
195 | #define SAVED_REG_SIZE 32 /* max. number of registers to save */ |
196 | ||
e571f594 | 197 | struct es1938 { |
1da177e4 LT |
198 | int irq; |
199 | ||
200 | unsigned long io_port; | |
201 | unsigned long sb_port; | |
202 | unsigned long vc_port; | |
203 | unsigned long mpu_port; | |
204 | unsigned long game_port; | |
205 | unsigned long ddma_port; | |
206 | ||
207 | unsigned char irqmask; | |
208 | unsigned char revision; | |
209 | ||
e571f594 TI |
210 | struct snd_kcontrol *hw_volume; |
211 | struct snd_kcontrol *hw_switch; | |
212 | struct snd_kcontrol *master_volume; | |
213 | struct snd_kcontrol *master_switch; | |
1da177e4 LT |
214 | |
215 | struct pci_dev *pci; | |
e571f594 TI |
216 | struct snd_card *card; |
217 | struct snd_pcm *pcm; | |
218 | struct snd_pcm_substream *capture_substream; | |
219 | struct snd_pcm_substream *playback1_substream; | |
220 | struct snd_pcm_substream *playback2_substream; | |
221 | struct snd_rawmidi *rmidi; | |
1da177e4 LT |
222 | |
223 | unsigned int dma1_size; | |
224 | unsigned int dma2_size; | |
225 | unsigned int dma1_start; | |
226 | unsigned int dma2_start; | |
227 | unsigned int dma1_shift; | |
228 | unsigned int dma2_shift; | |
229 | unsigned int active; | |
230 | ||
231 | spinlock_t reg_lock; | |
232 | spinlock_t mixer_lock; | |
e571f594 | 233 | struct snd_info_entry *proc_entry; |
1da177e4 LT |
234 | |
235 | #ifdef SUPPORT_JOYSTICK | |
236 | struct gameport *gameport; | |
237 | #endif | |
238 | #ifdef CONFIG_PM | |
239 | unsigned char saved_regs[SAVED_REG_SIZE]; | |
240 | #endif | |
241 | }; | |
242 | ||
243 | static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs); | |
244 | ||
396c9b92 | 245 | static struct pci_device_id snd_es1938_ids[] __devinitdata = { |
1da177e4 LT |
246 | { 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */ |
247 | { 0, } | |
248 | }; | |
249 | ||
250 | MODULE_DEVICE_TABLE(pci, snd_es1938_ids); | |
251 | ||
252 | #define RESET_LOOP_TIMEOUT 0x10000 | |
253 | #define WRITE_LOOP_TIMEOUT 0x10000 | |
254 | #define GET_LOOP_TIMEOUT 0x01000 | |
255 | ||
256 | #undef REG_DEBUG | |
257 | /* ----------------------------------------------------------------- | |
258 | * Write to a mixer register | |
259 | * -----------------------------------------------------------------*/ | |
e571f594 | 260 | static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val) |
1da177e4 LT |
261 | { |
262 | unsigned long flags; | |
263 | spin_lock_irqsave(&chip->mixer_lock, flags); | |
264 | outb(reg, SLSB_REG(chip, MIXERADDR)); | |
265 | outb(val, SLSB_REG(chip, MIXERDATA)); | |
266 | spin_unlock_irqrestore(&chip->mixer_lock, flags); | |
267 | #ifdef REG_DEBUG | |
99b359ba | 268 | snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val); |
1da177e4 LT |
269 | #endif |
270 | } | |
271 | ||
272 | /* ----------------------------------------------------------------- | |
273 | * Read from a mixer register | |
274 | * -----------------------------------------------------------------*/ | |
e571f594 | 275 | static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg) |
1da177e4 LT |
276 | { |
277 | int data; | |
278 | unsigned long flags; | |
279 | spin_lock_irqsave(&chip->mixer_lock, flags); | |
280 | outb(reg, SLSB_REG(chip, MIXERADDR)); | |
281 | data = inb(SLSB_REG(chip, MIXERDATA)); | |
282 | spin_unlock_irqrestore(&chip->mixer_lock, flags); | |
283 | #ifdef REG_DEBUG | |
99b359ba | 284 | snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data); |
1da177e4 LT |
285 | #endif |
286 | return data; | |
287 | } | |
288 | ||
289 | /* ----------------------------------------------------------------- | |
290 | * Write to some bits of a mixer register (return old value) | |
291 | * -----------------------------------------------------------------*/ | |
e571f594 TI |
292 | static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg, |
293 | unsigned char mask, unsigned char val) | |
1da177e4 LT |
294 | { |
295 | unsigned long flags; | |
296 | unsigned char old, new, oval; | |
297 | spin_lock_irqsave(&chip->mixer_lock, flags); | |
298 | outb(reg, SLSB_REG(chip, MIXERADDR)); | |
299 | old = inb(SLSB_REG(chip, MIXERDATA)); | |
300 | oval = old & mask; | |
301 | if (val != oval) { | |
302 | new = (old & ~mask) | (val & mask); | |
303 | outb(new, SLSB_REG(chip, MIXERDATA)); | |
304 | #ifdef REG_DEBUG | |
99b359ba TI |
305 | snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n", |
306 | reg, old, new); | |
1da177e4 LT |
307 | #endif |
308 | } | |
309 | spin_unlock_irqrestore(&chip->mixer_lock, flags); | |
310 | return oval; | |
311 | } | |
312 | ||
313 | /* ----------------------------------------------------------------- | |
314 | * Write command to Controller Registers | |
315 | * -----------------------------------------------------------------*/ | |
e571f594 | 316 | static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd) |
1da177e4 LT |
317 | { |
318 | int i; | |
319 | unsigned char v; | |
320 | for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) { | |
321 | if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) { | |
322 | outb(cmd, SLSB_REG(chip, WRITEDATA)); | |
323 | return; | |
324 | } | |
325 | } | |
99b359ba | 326 | printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v); |
1da177e4 LT |
327 | } |
328 | ||
329 | /* ----------------------------------------------------------------- | |
330 | * Read the Read Data Buffer | |
331 | * -----------------------------------------------------------------*/ | |
e571f594 | 332 | static int snd_es1938_get_byte(struct es1938 *chip) |
1da177e4 LT |
333 | { |
334 | int i; | |
335 | unsigned char v; | |
336 | for (i = GET_LOOP_TIMEOUT; i; i--) | |
337 | if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80) | |
338 | return inb(SLSB_REG(chip, READDATA)); | |
99b359ba | 339 | snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v); |
1da177e4 LT |
340 | return -ENODEV; |
341 | } | |
342 | ||
343 | /* ----------------------------------------------------------------- | |
344 | * Write value cmd register | |
345 | * -----------------------------------------------------------------*/ | |
e571f594 | 346 | static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val) |
1da177e4 LT |
347 | { |
348 | unsigned long flags; | |
349 | spin_lock_irqsave(&chip->reg_lock, flags); | |
350 | snd_es1938_write_cmd(chip, reg); | |
351 | snd_es1938_write_cmd(chip, val); | |
352 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
353 | #ifdef REG_DEBUG | |
99b359ba | 354 | snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val); |
1da177e4 LT |
355 | #endif |
356 | } | |
357 | ||
358 | /* ----------------------------------------------------------------- | |
359 | * Read data from cmd register and return it | |
360 | * -----------------------------------------------------------------*/ | |
e571f594 | 361 | static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg) |
1da177e4 LT |
362 | { |
363 | unsigned char val; | |
364 | unsigned long flags; | |
365 | spin_lock_irqsave(&chip->reg_lock, flags); | |
366 | snd_es1938_write_cmd(chip, ESS_CMD_READREG); | |
367 | snd_es1938_write_cmd(chip, reg); | |
368 | val = snd_es1938_get_byte(chip); | |
369 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
370 | #ifdef REG_DEBUG | |
99b359ba | 371 | snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val); |
1da177e4 LT |
372 | #endif |
373 | return val; | |
374 | } | |
375 | ||
376 | /* ----------------------------------------------------------------- | |
377 | * Write data to cmd register and return old value | |
378 | * -----------------------------------------------------------------*/ | |
e571f594 TI |
379 | static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask, |
380 | unsigned char val) | |
1da177e4 LT |
381 | { |
382 | unsigned long flags; | |
383 | unsigned char old, new, oval; | |
384 | spin_lock_irqsave(&chip->reg_lock, flags); | |
385 | snd_es1938_write_cmd(chip, ESS_CMD_READREG); | |
386 | snd_es1938_write_cmd(chip, reg); | |
387 | old = snd_es1938_get_byte(chip); | |
388 | oval = old & mask; | |
389 | if (val != oval) { | |
390 | snd_es1938_write_cmd(chip, reg); | |
391 | new = (old & ~mask) | (val & mask); | |
392 | snd_es1938_write_cmd(chip, new); | |
393 | #ifdef REG_DEBUG | |
99b359ba TI |
394 | snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n", |
395 | reg, old, new); | |
1da177e4 LT |
396 | #endif |
397 | } | |
398 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
399 | return oval; | |
400 | } | |
401 | ||
402 | /* -------------------------------------------------------------------- | |
403 | * Reset the chip | |
404 | * --------------------------------------------------------------------*/ | |
e571f594 | 405 | static void snd_es1938_reset(struct es1938 *chip) |
1da177e4 LT |
406 | { |
407 | int i; | |
408 | ||
409 | outb(3, SLSB_REG(chip, RESET)); | |
410 | inb(SLSB_REG(chip, RESET)); | |
411 | outb(0, SLSB_REG(chip, RESET)); | |
412 | for (i = 0; i < RESET_LOOP_TIMEOUT; i++) { | |
413 | if (inb(SLSB_REG(chip, STATUS)) & 0x80) { | |
414 | if (inb(SLSB_REG(chip, READDATA)) == 0xaa) | |
415 | goto __next; | |
416 | } | |
417 | } | |
99b359ba | 418 | snd_printk(KERN_ERR "ESS Solo-1 reset failed\n"); |
1da177e4 LT |
419 | |
420 | __next: | |
421 | snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT); | |
422 | ||
423 | /* Demand transfer DMA: 4 bytes per DMA request */ | |
424 | snd_es1938_write(chip, ESS_CMD_DMATYPE, 2); | |
425 | ||
426 | /* Change behaviour of register A1 | |
427 | 4x oversampling | |
428 | 2nd channel DAC asynchronous */ | |
429 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32); | |
430 | /* enable/select DMA channel and IRQ channel */ | |
431 | snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50); | |
432 | snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50); | |
433 | snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1); | |
434 | /* Set spatializer parameters to recommended values */ | |
435 | snd_es1938_mixer_write(chip, 0x54, 0x8f); | |
436 | snd_es1938_mixer_write(chip, 0x56, 0x95); | |
437 | snd_es1938_mixer_write(chip, 0x58, 0x94); | |
438 | snd_es1938_mixer_write(chip, 0x5a, 0x80); | |
439 | } | |
440 | ||
441 | /* -------------------------------------------------------------------- | |
442 | * Reset the FIFOs | |
443 | * --------------------------------------------------------------------*/ | |
e571f594 | 444 | static void snd_es1938_reset_fifo(struct es1938 *chip) |
1da177e4 LT |
445 | { |
446 | outb(2, SLSB_REG(chip, RESET)); | |
447 | outb(0, SLSB_REG(chip, RESET)); | |
448 | } | |
449 | ||
e571f594 | 450 | static struct snd_ratnum clocks[2] = { |
1da177e4 LT |
451 | { |
452 | .num = 793800, | |
453 | .den_min = 1, | |
454 | .den_max = 128, | |
455 | .den_step = 1, | |
456 | }, | |
457 | { | |
458 | .num = 768000, | |
459 | .den_min = 1, | |
460 | .den_max = 128, | |
461 | .den_step = 1, | |
462 | } | |
463 | }; | |
464 | ||
e571f594 | 465 | static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = { |
1da177e4 LT |
466 | .nrats = 2, |
467 | .rats = clocks, | |
468 | }; | |
469 | ||
470 | ||
e571f594 TI |
471 | static void snd_es1938_rate_set(struct es1938 *chip, |
472 | struct snd_pcm_substream *substream, | |
1da177e4 LT |
473 | int mode) |
474 | { | |
475 | unsigned int bits, div0; | |
e571f594 | 476 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
477 | if (runtime->rate_num == clocks[0].num) |
478 | bits = 128 - runtime->rate_den; | |
479 | else | |
480 | bits = 256 - runtime->rate_den; | |
481 | ||
482 | /* set filter register */ | |
483 | div0 = 256 - 7160000*20/(8*82*runtime->rate); | |
484 | ||
485 | if (mode == DAC2) { | |
486 | snd_es1938_mixer_write(chip, 0x70, bits); | |
487 | snd_es1938_mixer_write(chip, 0x72, div0); | |
488 | } else { | |
489 | snd_es1938_write(chip, 0xA1, bits); | |
490 | snd_es1938_write(chip, 0xA2, div0); | |
491 | } | |
492 | } | |
493 | ||
494 | /* -------------------------------------------------------------------- | |
495 | * Configure Solo1 builtin DMA Controller | |
496 | * --------------------------------------------------------------------*/ | |
497 | ||
e571f594 | 498 | static void snd_es1938_playback1_setdma(struct es1938 *chip) |
1da177e4 LT |
499 | { |
500 | outb(0x00, SLIO_REG(chip, AUDIO2MODE)); | |
501 | outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR)); | |
502 | outw(0, SLIO_REG(chip, AUDIO2DMACOUNT)); | |
503 | outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT)); | |
504 | } | |
505 | ||
e571f594 | 506 | static void snd_es1938_playback2_setdma(struct es1938 *chip) |
1da177e4 LT |
507 | { |
508 | /* Enable DMA controller */ | |
509 | outb(0xc4, SLDM_REG(chip, DMACOMMAND)); | |
510 | /* 1. Master reset */ | |
511 | outb(0, SLDM_REG(chip, DMACLEAR)); | |
512 | /* 2. Mask DMA */ | |
513 | outb(1, SLDM_REG(chip, DMAMASK)); | |
514 | outb(0x18, SLDM_REG(chip, DMAMODE)); | |
515 | outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); | |
516 | outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); | |
517 | /* 3. Unmask DMA */ | |
518 | outb(0, SLDM_REG(chip, DMAMASK)); | |
519 | } | |
520 | ||
e571f594 | 521 | static void snd_es1938_capture_setdma(struct es1938 *chip) |
1da177e4 LT |
522 | { |
523 | /* Enable DMA controller */ | |
524 | outb(0xc4, SLDM_REG(chip, DMACOMMAND)); | |
525 | /* 1. Master reset */ | |
526 | outb(0, SLDM_REG(chip, DMACLEAR)); | |
527 | /* 2. Mask DMA */ | |
528 | outb(1, SLDM_REG(chip, DMAMASK)); | |
529 | outb(0x14, SLDM_REG(chip, DMAMODE)); | |
530 | outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); | |
531 | outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); | |
532 | /* 3. Unmask DMA */ | |
533 | outb(0, SLDM_REG(chip, DMAMASK)); | |
534 | } | |
535 | ||
536 | /* ---------------------------------------------------------------------- | |
537 | * | |
538 | * *** PCM part *** | |
539 | */ | |
540 | ||
e571f594 | 541 | static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
542 | int cmd) |
543 | { | |
e571f594 | 544 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
545 | int val; |
546 | switch (cmd) { | |
547 | case SNDRV_PCM_TRIGGER_START: | |
93b9f426 | 548 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
549 | val = 0x0f; |
550 | chip->active |= ADC1; | |
551 | break; | |
552 | case SNDRV_PCM_TRIGGER_STOP: | |
93b9f426 | 553 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
554 | val = 0x00; |
555 | chip->active &= ~ADC1; | |
556 | break; | |
557 | default: | |
558 | return -EINVAL; | |
559 | } | |
560 | snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); | |
561 | return 0; | |
562 | } | |
563 | ||
e571f594 | 564 | static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
565 | int cmd) |
566 | { | |
e571f594 | 567 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
568 | switch (cmd) { |
569 | case SNDRV_PCM_TRIGGER_START: | |
93b9f426 | 570 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
571 | /* According to the documentation this should be: |
572 | 0x13 but that value may randomly swap stereo channels */ | |
573 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92); | |
574 | udelay(10); | |
575 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93); | |
576 | /* This two stage init gives the FIFO -> DAC connection time to | |
577 | * settle before first data from DMA flows in. This should ensure | |
578 | * no swapping of stereo channels. Report a bug if otherwise :-) */ | |
579 | outb(0x0a, SLIO_REG(chip, AUDIO2MODE)); | |
580 | chip->active |= DAC2; | |
581 | break; | |
582 | case SNDRV_PCM_TRIGGER_STOP: | |
93b9f426 | 583 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
584 | outb(0, SLIO_REG(chip, AUDIO2MODE)); |
585 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0); | |
586 | chip->active &= ~DAC2; | |
587 | break; | |
588 | default: | |
589 | return -EINVAL; | |
590 | } | |
591 | return 0; | |
592 | } | |
593 | ||
e571f594 | 594 | static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
595 | int cmd) |
596 | { | |
e571f594 | 597 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
598 | int val; |
599 | switch (cmd) { | |
600 | case SNDRV_PCM_TRIGGER_START: | |
93b9f426 | 601 | case SNDRV_PCM_TRIGGER_RESUME: |
1da177e4 LT |
602 | val = 5; |
603 | chip->active |= DAC1; | |
604 | break; | |
605 | case SNDRV_PCM_TRIGGER_STOP: | |
93b9f426 | 606 | case SNDRV_PCM_TRIGGER_SUSPEND: |
1da177e4 LT |
607 | val = 0; |
608 | chip->active &= ~DAC1; | |
609 | break; | |
610 | default: | |
611 | return -EINVAL; | |
612 | } | |
613 | snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); | |
614 | return 0; | |
615 | } | |
616 | ||
e571f594 | 617 | static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream, |
1da177e4 LT |
618 | int cmd) |
619 | { | |
620 | switch (substream->number) { | |
621 | case 0: | |
622 | return snd_es1938_playback1_trigger(substream, cmd); | |
623 | case 1: | |
624 | return snd_es1938_playback2_trigger(substream, cmd); | |
625 | } | |
626 | snd_BUG(); | |
627 | return -EINVAL; | |
628 | } | |
629 | ||
630 | /* -------------------------------------------------------------------- | |
631 | * First channel for Extended Mode Audio 1 ADC Operation | |
632 | * --------------------------------------------------------------------*/ | |
e571f594 | 633 | static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 634 | { |
e571f594 TI |
635 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
636 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
637 | int u, is8, mono; |
638 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); | |
639 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
640 | ||
641 | chip->dma1_size = size; | |
642 | chip->dma1_start = runtime->dma_addr; | |
643 | ||
644 | mono = (runtime->channels > 1) ? 0 : 1; | |
645 | is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; | |
646 | u = snd_pcm_format_unsigned(runtime->format); | |
647 | ||
648 | chip->dma1_shift = 2 - mono - is8; | |
649 | ||
650 | snd_es1938_reset_fifo(chip); | |
651 | ||
652 | /* program type */ | |
653 | snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); | |
654 | ||
655 | /* set clock and counters */ | |
656 | snd_es1938_rate_set(chip, substream, ADC1); | |
657 | ||
658 | count = 0x10000 - count; | |
659 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); | |
660 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); | |
661 | ||
662 | /* initialize and configure ADC */ | |
663 | snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71); | |
664 | snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 | | |
665 | (u ? 0x00 : 0x20) | | |
666 | (is8 ? 0x00 : 0x04) | | |
667 | (mono ? 0x40 : 0x08)); | |
668 | ||
669 | // snd_es1938_reset_fifo(chip); | |
670 | ||
671 | /* 11. configure system interrupt controller and DMA controller */ | |
672 | snd_es1938_capture_setdma(chip); | |
673 | ||
674 | return 0; | |
675 | } | |
676 | ||
677 | ||
678 | /* ------------------------------------------------------------------------------ | |
679 | * Second Audio channel DAC Operation | |
680 | * ------------------------------------------------------------------------------*/ | |
e571f594 | 681 | static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 682 | { |
e571f594 TI |
683 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
684 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
685 | int u, is8, mono; |
686 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); | |
687 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
688 | ||
689 | chip->dma2_size = size; | |
690 | chip->dma2_start = runtime->dma_addr; | |
691 | ||
692 | mono = (runtime->channels > 1) ? 0 : 1; | |
693 | is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; | |
694 | u = snd_pcm_format_unsigned(runtime->format); | |
695 | ||
696 | chip->dma2_shift = 2 - mono - is8; | |
697 | ||
698 | snd_es1938_reset_fifo(chip); | |
699 | ||
700 | /* set clock and counters */ | |
701 | snd_es1938_rate_set(chip, substream, DAC2); | |
702 | ||
703 | count >>= 1; | |
704 | count = 0x10000 - count; | |
705 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff); | |
706 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8); | |
707 | ||
708 | /* initialize and configure Audio 2 DAC */ | |
e571f594 TI |
709 | snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | |
710 | (mono ? 0 : 2) | (is8 ? 0 : 1)); | |
1da177e4 LT |
711 | |
712 | /* program DMA */ | |
713 | snd_es1938_playback1_setdma(chip); | |
714 | ||
715 | return 0; | |
716 | } | |
717 | ||
e571f594 | 718 | static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 719 | { |
e571f594 TI |
720 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
721 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
722 | int u, is8, mono; |
723 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); | |
724 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
725 | ||
726 | chip->dma1_size = size; | |
727 | chip->dma1_start = runtime->dma_addr; | |
728 | ||
729 | mono = (runtime->channels > 1) ? 0 : 1; | |
730 | is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; | |
731 | u = snd_pcm_format_unsigned(runtime->format); | |
732 | ||
733 | chip->dma1_shift = 2 - mono - is8; | |
734 | ||
735 | count = 0x10000 - count; | |
736 | ||
737 | /* reset */ | |
738 | snd_es1938_reset_fifo(chip); | |
739 | ||
740 | snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); | |
741 | ||
742 | /* set clock and counters */ | |
743 | snd_es1938_rate_set(chip, substream, DAC1); | |
744 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); | |
745 | snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); | |
746 | ||
747 | /* initialized and configure DAC */ | |
748 | snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00); | |
749 | snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71); | |
750 | snd_es1938_write(chip, ESS_CMD_SETFORMAT2, | |
751 | 0x90 | (mono ? 0x40 : 0x08) | | |
752 | (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20)); | |
753 | ||
754 | /* program DMA */ | |
755 | snd_es1938_playback2_setdma(chip); | |
756 | ||
757 | return 0; | |
758 | } | |
759 | ||
e571f594 | 760 | static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
761 | { |
762 | switch (substream->number) { | |
763 | case 0: | |
764 | return snd_es1938_playback1_prepare(substream); | |
765 | case 1: | |
766 | return snd_es1938_playback2_prepare(substream); | |
767 | } | |
768 | snd_BUG(); | |
769 | return -EINVAL; | |
770 | } | |
771 | ||
e571f594 | 772 | static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 773 | { |
e571f594 | 774 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
775 | size_t ptr; |
776 | size_t old, new; | |
777 | #if 1 | |
778 | /* This stuff is *needed*, don't ask why - AB */ | |
779 | old = inw(SLDM_REG(chip, DMACOUNT)); | |
780 | while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) | |
781 | old = new; | |
782 | ptr = chip->dma1_size - 1 - new; | |
783 | #else | |
784 | ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start; | |
785 | #endif | |
786 | return ptr >> chip->dma1_shift; | |
787 | } | |
788 | ||
e571f594 | 789 | static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 790 | { |
e571f594 | 791 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
792 | size_t ptr; |
793 | #if 1 | |
794 | ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT)); | |
795 | #else | |
796 | ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start; | |
797 | #endif | |
798 | return ptr >> chip->dma2_shift; | |
799 | } | |
800 | ||
e571f594 | 801 | static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 802 | { |
e571f594 | 803 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
804 | size_t ptr; |
805 | size_t old, new; | |
806 | #if 1 | |
807 | /* This stuff is *needed*, don't ask why - AB */ | |
808 | old = inw(SLDM_REG(chip, DMACOUNT)); | |
809 | while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) | |
810 | old = new; | |
811 | ptr = chip->dma1_size - 1 - new; | |
812 | #else | |
813 | ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start; | |
814 | #endif | |
815 | return ptr >> chip->dma1_shift; | |
816 | } | |
817 | ||
e571f594 | 818 | static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 LT |
819 | { |
820 | switch (substream->number) { | |
821 | case 0: | |
822 | return snd_es1938_playback1_pointer(substream); | |
823 | case 1: | |
824 | return snd_es1938_playback2_pointer(substream); | |
825 | } | |
826 | snd_BUG(); | |
827 | return -EINVAL; | |
828 | } | |
829 | ||
e571f594 | 830 | static int snd_es1938_capture_copy(struct snd_pcm_substream *substream, |
1da177e4 LT |
831 | int channel, |
832 | snd_pcm_uframes_t pos, | |
833 | void __user *dst, | |
834 | snd_pcm_uframes_t count) | |
835 | { | |
e571f594 TI |
836 | struct snd_pcm_runtime *runtime = substream->runtime; |
837 | struct es1938 *chip = snd_pcm_substream_chip(substream); | |
1da177e4 LT |
838 | pos <<= chip->dma1_shift; |
839 | count <<= chip->dma1_shift; | |
840 | snd_assert(pos + count <= chip->dma1_size, return -EINVAL); | |
841 | if (pos + count < chip->dma1_size) { | |
842 | if (copy_to_user(dst, runtime->dma_area + pos + 1, count)) | |
843 | return -EFAULT; | |
844 | } else { | |
845 | if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1)) | |
846 | return -EFAULT; | |
847 | if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1)) | |
848 | return -EFAULT; | |
849 | } | |
850 | return 0; | |
851 | } | |
852 | ||
853 | /* | |
854 | * buffer management | |
855 | */ | |
e571f594 TI |
856 | static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream, |
857 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 LT |
858 | |
859 | { | |
860 | int err; | |
861 | ||
862 | if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) | |
863 | return err; | |
864 | return 0; | |
865 | } | |
866 | ||
e571f594 | 867 | static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream) |
1da177e4 LT |
868 | { |
869 | return snd_pcm_lib_free_pages(substream); | |
870 | } | |
871 | ||
872 | /* ---------------------------------------------------------------------- | |
873 | * Audio1 Capture (ADC) | |
874 | * ----------------------------------------------------------------------*/ | |
e571f594 | 875 | static struct snd_pcm_hardware snd_es1938_capture = |
1da177e4 LT |
876 | { |
877 | .info = (SNDRV_PCM_INFO_INTERLEAVED | | |
878 | SNDRV_PCM_INFO_BLOCK_TRANSFER), | |
e571f594 TI |
879 | .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | |
880 | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), | |
1da177e4 LT |
881 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
882 | .rate_min = 6000, | |
883 | .rate_max = 48000, | |
884 | .channels_min = 1, | |
885 | .channels_max = 2, | |
886 | .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ | |
887 | .period_bytes_min = 64, | |
888 | .period_bytes_max = 0x8000, | |
889 | .periods_min = 1, | |
890 | .periods_max = 1024, | |
891 | .fifo_size = 256, | |
892 | }; | |
893 | ||
894 | /* ----------------------------------------------------------------------- | |
895 | * Audio2 Playback (DAC) | |
896 | * -----------------------------------------------------------------------*/ | |
e571f594 | 897 | static struct snd_pcm_hardware snd_es1938_playback = |
1da177e4 LT |
898 | { |
899 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | |
900 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | |
901 | SNDRV_PCM_INFO_MMAP_VALID), | |
e571f594 TI |
902 | .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | |
903 | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), | |
1da177e4 LT |
904 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
905 | .rate_min = 6000, | |
906 | .rate_max = 48000, | |
907 | .channels_min = 1, | |
908 | .channels_max = 2, | |
909 | .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ | |
910 | .period_bytes_min = 64, | |
911 | .period_bytes_max = 0x8000, | |
912 | .periods_min = 1, | |
913 | .periods_max = 1024, | |
914 | .fifo_size = 256, | |
915 | }; | |
916 | ||
e571f594 | 917 | static int snd_es1938_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 918 | { |
e571f594 TI |
919 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
920 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
921 | |
922 | if (chip->playback2_substream) | |
923 | return -EAGAIN; | |
924 | chip->capture_substream = substream; | |
925 | runtime->hw = snd_es1938_capture; | |
926 | snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
927 | &hw_constraints_clocks); | |
928 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); | |
929 | return 0; | |
930 | } | |
931 | ||
e571f594 | 932 | static int snd_es1938_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 933 | { |
e571f594 TI |
934 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
935 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
936 | |
937 | switch (substream->number) { | |
938 | case 0: | |
939 | chip->playback1_substream = substream; | |
940 | break; | |
941 | case 1: | |
942 | if (chip->capture_substream) | |
943 | return -EAGAIN; | |
944 | chip->playback2_substream = substream; | |
945 | break; | |
946 | default: | |
947 | snd_BUG(); | |
948 | return -EINVAL; | |
949 | } | |
950 | runtime->hw = snd_es1938_playback; | |
951 | snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
952 | &hw_constraints_clocks); | |
953 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); | |
954 | return 0; | |
955 | } | |
956 | ||
e571f594 | 957 | static int snd_es1938_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 958 | { |
e571f594 | 959 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
960 | |
961 | chip->capture_substream = NULL; | |
962 | return 0; | |
963 | } | |
964 | ||
e571f594 | 965 | static int snd_es1938_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 966 | { |
e571f594 | 967 | struct es1938 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
968 | |
969 | switch (substream->number) { | |
970 | case 0: | |
971 | chip->playback1_substream = NULL; | |
972 | break; | |
973 | case 1: | |
974 | chip->playback2_substream = NULL; | |
975 | break; | |
976 | default: | |
977 | snd_BUG(); | |
978 | return -EINVAL; | |
979 | } | |
980 | return 0; | |
981 | } | |
982 | ||
e571f594 | 983 | static struct snd_pcm_ops snd_es1938_playback_ops = { |
1da177e4 LT |
984 | .open = snd_es1938_playback_open, |
985 | .close = snd_es1938_playback_close, | |
986 | .ioctl = snd_pcm_lib_ioctl, | |
987 | .hw_params = snd_es1938_pcm_hw_params, | |
988 | .hw_free = snd_es1938_pcm_hw_free, | |
989 | .prepare = snd_es1938_playback_prepare, | |
990 | .trigger = snd_es1938_playback_trigger, | |
991 | .pointer = snd_es1938_playback_pointer, | |
992 | }; | |
993 | ||
e571f594 | 994 | static struct snd_pcm_ops snd_es1938_capture_ops = { |
1da177e4 LT |
995 | .open = snd_es1938_capture_open, |
996 | .close = snd_es1938_capture_close, | |
997 | .ioctl = snd_pcm_lib_ioctl, | |
998 | .hw_params = snd_es1938_pcm_hw_params, | |
999 | .hw_free = snd_es1938_pcm_hw_free, | |
1000 | .prepare = snd_es1938_capture_prepare, | |
1001 | .trigger = snd_es1938_capture_trigger, | |
1002 | .pointer = snd_es1938_capture_pointer, | |
1003 | .copy = snd_es1938_capture_copy, | |
1004 | }; | |
1005 | ||
e571f594 | 1006 | static int __devinit snd_es1938_new_pcm(struct es1938 *chip, int device) |
1da177e4 | 1007 | { |
e571f594 | 1008 | struct snd_pcm *pcm; |
1da177e4 LT |
1009 | int err; |
1010 | ||
1011 | if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0) | |
1012 | return err; | |
1013 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops); | |
1014 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops); | |
1015 | ||
1016 | pcm->private_data = chip; | |
1da177e4 LT |
1017 | pcm->info_flags = 0; |
1018 | strcpy(pcm->name, "ESS Solo-1"); | |
1019 | ||
1020 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1021 | snd_dma_pci_data(chip->pci), 64*1024, 64*1024); | |
1022 | ||
1023 | chip->pcm = pcm; | |
1024 | return 0; | |
1025 | } | |
1026 | ||
1027 | /* ------------------------------------------------------------------- | |
1028 | * | |
1029 | * *** Mixer part *** | |
1030 | */ | |
1031 | ||
e571f594 TI |
1032 | static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol, |
1033 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1034 | { |
1035 | static char *texts[8] = { | |
1036 | "Mic", "Mic Master", "CD", "AOUT", | |
1037 | "Mic1", "Mix", "Line", "Master" | |
1038 | }; | |
1039 | ||
1040 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
1041 | uinfo->count = 1; | |
1042 | uinfo->value.enumerated.items = 8; | |
1043 | if (uinfo->value.enumerated.item > 7) | |
1044 | uinfo->value.enumerated.item = 7; | |
1045 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); | |
1046 | return 0; | |
1047 | } | |
1048 | ||
e571f594 TI |
1049 | static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol, |
1050 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1051 | { |
e571f594 | 1052 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1053 | ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07; |
1054 | return 0; | |
1055 | } | |
1056 | ||
e571f594 TI |
1057 | static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol, |
1058 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1059 | { |
e571f594 | 1060 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1061 | unsigned char val = ucontrol->value.enumerated.item[0]; |
1062 | ||
1063 | if (val > 7) | |
1064 | return -EINVAL; | |
1065 | return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val; | |
1066 | } | |
1067 | ||
e571f594 TI |
1068 | static int snd_es1938_info_spatializer_enable(struct snd_kcontrol *kcontrol, |
1069 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1070 | { |
1071 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1072 | uinfo->count = 1; | |
1073 | uinfo->value.integer.min = 0; | |
1074 | uinfo->value.integer.max = 1; | |
1075 | return 0; | |
1076 | } | |
1077 | ||
e571f594 TI |
1078 | static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol, |
1079 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1080 | { |
e571f594 | 1081 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1082 | unsigned char val = snd_es1938_mixer_read(chip, 0x50); |
1083 | ucontrol->value.integer.value[0] = !!(val & 8); | |
1084 | return 0; | |
1085 | } | |
1086 | ||
e571f594 TI |
1087 | static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol, |
1088 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1089 | { |
e571f594 | 1090 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1091 | unsigned char oval, nval; |
1092 | int change; | |
1093 | nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04; | |
1094 | oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c; | |
1095 | change = nval != oval; | |
1096 | if (change) { | |
1097 | snd_es1938_mixer_write(chip, 0x50, nval & ~0x04); | |
1098 | snd_es1938_mixer_write(chip, 0x50, nval); | |
1099 | } | |
1100 | return change; | |
1101 | } | |
1102 | ||
e571f594 TI |
1103 | static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol, |
1104 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1105 | { |
1106 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1107 | uinfo->count = 2; | |
1108 | uinfo->value.integer.min = 0; | |
1109 | uinfo->value.integer.max = 63; | |
1110 | return 0; | |
1111 | } | |
1112 | ||
e571f594 TI |
1113 | static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol, |
1114 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1115 | { |
e571f594 | 1116 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1117 | ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f; |
1118 | ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f; | |
1119 | return 0; | |
1120 | } | |
1121 | ||
e571f594 TI |
1122 | static int snd_es1938_info_hw_switch(struct snd_kcontrol *kcontrol, |
1123 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1124 | { |
1125 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
1126 | uinfo->count = 2; | |
1127 | uinfo->value.integer.min = 0; | |
1128 | uinfo->value.integer.max = 1; | |
1129 | return 0; | |
1130 | } | |
1131 | ||
e571f594 TI |
1132 | static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol, |
1133 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1134 | { |
e571f594 | 1135 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1136 | ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40); |
1137 | ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40); | |
1138 | return 0; | |
1139 | } | |
1140 | ||
e571f594 | 1141 | static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol) |
1da177e4 | 1142 | { |
e571f594 | 1143 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1144 | chip->master_volume = NULL; |
1145 | chip->master_switch = NULL; | |
1146 | chip->hw_volume = NULL; | |
1147 | chip->hw_switch = NULL; | |
1148 | } | |
1149 | ||
e571f594 | 1150 | static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg, |
1da177e4 LT |
1151 | unsigned char mask, unsigned char val) |
1152 | { | |
1153 | if (reg < 0xa0) | |
1154 | return snd_es1938_mixer_bits(chip, reg, mask, val); | |
1155 | else | |
1156 | return snd_es1938_bits(chip, reg, mask, val); | |
1157 | } | |
1158 | ||
e571f594 | 1159 | static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg) |
1da177e4 LT |
1160 | { |
1161 | if (reg < 0xa0) | |
1162 | return snd_es1938_mixer_read(chip, reg); | |
1163 | else | |
1164 | return snd_es1938_read(chip, reg); | |
1165 | } | |
1166 | ||
1167 | #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \ | |
1168 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ | |
1169 | .info = snd_es1938_info_single, \ | |
1170 | .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ | |
1171 | .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } | |
1172 | ||
e571f594 TI |
1173 | static int snd_es1938_info_single(struct snd_kcontrol *kcontrol, |
1174 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1175 | { |
1176 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1177 | ||
1178 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1179 | uinfo->count = 1; | |
1180 | uinfo->value.integer.min = 0; | |
1181 | uinfo->value.integer.max = mask; | |
1182 | return 0; | |
1183 | } | |
1184 | ||
e571f594 TI |
1185 | static int snd_es1938_get_single(struct snd_kcontrol *kcontrol, |
1186 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1187 | { |
e571f594 | 1188 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1189 | int reg = kcontrol->private_value & 0xff; |
1190 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1191 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1192 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1193 | int val; | |
1194 | ||
1195 | val = snd_es1938_reg_read(chip, reg); | |
1196 | ucontrol->value.integer.value[0] = (val >> shift) & mask; | |
1197 | if (invert) | |
1198 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; | |
1199 | return 0; | |
1200 | } | |
1201 | ||
e571f594 TI |
1202 | static int snd_es1938_put_single(struct snd_kcontrol *kcontrol, |
1203 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1204 | { |
e571f594 | 1205 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1206 | int reg = kcontrol->private_value & 0xff; |
1207 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1208 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1209 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1210 | unsigned char val; | |
1211 | ||
1212 | val = (ucontrol->value.integer.value[0] & mask); | |
1213 | if (invert) | |
1214 | val = mask - val; | |
1215 | mask <<= shift; | |
1216 | val <<= shift; | |
1217 | return snd_es1938_reg_bits(chip, reg, mask, val) != val; | |
1218 | } | |
1219 | ||
1220 | #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ | |
1221 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ | |
1222 | .info = snd_es1938_info_double, \ | |
1223 | .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ | |
1224 | .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) } | |
1225 | ||
e571f594 TI |
1226 | static int snd_es1938_info_double(struct snd_kcontrol *kcontrol, |
1227 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1228 | { |
1229 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1230 | ||
1231 | uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1232 | uinfo->count = 2; | |
1233 | uinfo->value.integer.min = 0; | |
1234 | uinfo->value.integer.max = mask; | |
1235 | return 0; | |
1236 | } | |
1237 | ||
e571f594 TI |
1238 | static int snd_es1938_get_double(struct snd_kcontrol *kcontrol, |
1239 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1240 | { |
e571f594 | 1241 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1242 | int left_reg = kcontrol->private_value & 0xff; |
1243 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1244 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1245 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1246 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1247 | int invert = (kcontrol->private_value >> 22) & 1; | |
1248 | unsigned char left, right; | |
1249 | ||
1250 | left = snd_es1938_reg_read(chip, left_reg); | |
1251 | if (left_reg != right_reg) | |
1252 | right = snd_es1938_reg_read(chip, right_reg); | |
1253 | else | |
1254 | right = left; | |
1255 | ucontrol->value.integer.value[0] = (left >> shift_left) & mask; | |
1256 | ucontrol->value.integer.value[1] = (right >> shift_right) & mask; | |
1257 | if (invert) { | |
1258 | ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; | |
1259 | ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; | |
1260 | } | |
1261 | return 0; | |
1262 | } | |
1263 | ||
e571f594 TI |
1264 | static int snd_es1938_put_double(struct snd_kcontrol *kcontrol, |
1265 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1266 | { |
e571f594 | 1267 | struct es1938 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1268 | int left_reg = kcontrol->private_value & 0xff; |
1269 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1270 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1271 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1272 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1273 | int invert = (kcontrol->private_value >> 22) & 1; | |
1274 | int change; | |
1275 | unsigned char val1, val2, mask1, mask2; | |
1276 | ||
1277 | val1 = ucontrol->value.integer.value[0] & mask; | |
1278 | val2 = ucontrol->value.integer.value[1] & mask; | |
1279 | if (invert) { | |
1280 | val1 = mask - val1; | |
1281 | val2 = mask - val2; | |
1282 | } | |
1283 | val1 <<= shift_left; | |
1284 | val2 <<= shift_right; | |
1285 | mask1 = mask << shift_left; | |
1286 | mask2 = mask << shift_right; | |
1287 | if (left_reg != right_reg) { | |
1288 | change = 0; | |
1289 | if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1) | |
1290 | change = 1; | |
1291 | if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2) | |
1292 | change = 1; | |
1293 | } else { | |
1294 | change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2, | |
1295 | val1 | val2) != (val1 | val2)); | |
1296 | } | |
1297 | return change; | |
1298 | } | |
1299 | ||
e571f594 | 1300 | static struct snd_kcontrol_new snd_es1938_controls[] = { |
1da177e4 LT |
1301 | ES1938_DOUBLE("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0), |
1302 | ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1), | |
1303 | { | |
1304 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1305 | .name = "Hardware Master Playback Volume", | |
1306 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1307 | .info = snd_es1938_info_hw_volume, | |
1308 | .get = snd_es1938_get_hw_volume, | |
1309 | }, | |
1310 | { | |
1311 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1312 | .name = "Hardware Master Playback Switch", | |
1313 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
1314 | .info = snd_es1938_info_hw_switch, | |
1315 | .get = snd_es1938_get_hw_switch, | |
1316 | }, | |
1317 | ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0), | |
1318 | ES1938_DOUBLE("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0), | |
1319 | ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0), | |
1320 | ES1938_DOUBLE("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0), | |
1321 | ES1938_DOUBLE("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0), | |
1322 | ES1938_DOUBLE("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0), | |
1323 | ES1938_DOUBLE("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0), | |
1324 | ES1938_DOUBLE("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0), | |
1325 | ES1938_SINGLE("PC Speaker Volume", 0, 0x3c, 0, 7, 0), | |
1326 | ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0), | |
1327 | ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1), | |
1328 | { | |
1329 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1330 | .name = "Capture Source", | |
1331 | .info = snd_es1938_info_mux, | |
1332 | .get = snd_es1938_get_mux, | |
1333 | .put = snd_es1938_put_mux, | |
1334 | }, | |
1335 | ES1938_DOUBLE("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0), | |
1336 | ES1938_DOUBLE("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0), | |
1337 | ES1938_DOUBLE("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0), | |
1338 | ES1938_DOUBLE("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0), | |
1339 | ES1938_DOUBLE("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0), | |
1340 | ES1938_DOUBLE("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0), | |
1341 | ES1938_DOUBLE("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0), | |
1342 | ES1938_DOUBLE("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0), | |
1343 | ES1938_DOUBLE("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0), | |
1344 | ES1938_DOUBLE("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0), | |
1345 | ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0), | |
1346 | { | |
1347 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1348 | .name = "3D Control - Switch", | |
1349 | .info = snd_es1938_info_spatializer_enable, | |
1350 | .get = snd_es1938_get_spatializer_enable, | |
1351 | .put = snd_es1938_put_spatializer_enable, | |
1352 | }, | |
1353 | ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0) | |
1354 | }; | |
1355 | ||
1356 | ||
1357 | /* ---------------------------------------------------------------------------- */ | |
1358 | /* ---------------------------------------------------------------------------- */ | |
1359 | ||
1360 | /* | |
1361 | * initialize the chip - used by resume callback, too | |
1362 | */ | |
e571f594 | 1363 | static void snd_es1938_chip_init(struct es1938 *chip) |
1da177e4 LT |
1364 | { |
1365 | /* reset chip */ | |
1366 | snd_es1938_reset(chip); | |
1367 | ||
1368 | /* configure native mode */ | |
1369 | ||
1370 | /* enable bus master */ | |
1371 | pci_set_master(chip->pci); | |
1372 | ||
1373 | /* disable legacy audio */ | |
1374 | pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f); | |
1375 | ||
1376 | /* set DDMA base */ | |
1377 | pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1); | |
1378 | ||
1379 | /* set DMA/IRQ policy */ | |
1380 | pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0); | |
1381 | ||
1382 | /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/ | |
1383 | outb(0xf0, SLIO_REG(chip, IRQCONTROL)); | |
1384 | ||
1385 | /* reset DMA */ | |
1386 | outb(0, SLDM_REG(chip, DMACLEAR)); | |
1387 | } | |
1388 | ||
1389 | #ifdef CONFIG_PM | |
1390 | /* | |
1391 | * PM support | |
1392 | */ | |
1393 | ||
1394 | static unsigned char saved_regs[SAVED_REG_SIZE+1] = { | |
1395 | 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38, | |
1396 | 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68, | |
1397 | 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d, | |
1398 | 0xa8, 0xb4, | |
1399 | }; | |
1400 | ||
1401 | ||
b34a580e | 1402 | static int es1938_suspend(struct pci_dev *pci, pm_message_t state) |
1da177e4 | 1403 | { |
b34a580e TI |
1404 | struct snd_card *card = pci_get_drvdata(pci); |
1405 | struct es1938 *chip = card->private_data; | |
1da177e4 LT |
1406 | unsigned char *s, *d; |
1407 | ||
b34a580e | 1408 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
1da177e4 LT |
1409 | snd_pcm_suspend_all(chip->pcm); |
1410 | ||
1411 | /* save mixer-related registers */ | |
1412 | for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) | |
1413 | *d = snd_es1938_reg_read(chip, *s); | |
1414 | ||
1415 | outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */ | |
93b9f426 | 1416 | if (chip->irq >= 0) |
b34a580e TI |
1417 | free_irq(chip->irq, chip); |
1418 | pci_disable_device(pci); | |
1419 | pci_save_state(pci); | |
1da177e4 LT |
1420 | return 0; |
1421 | } | |
1422 | ||
b34a580e | 1423 | static int es1938_resume(struct pci_dev *pci) |
1da177e4 | 1424 | { |
b34a580e TI |
1425 | struct snd_card *card = pci_get_drvdata(pci); |
1426 | struct es1938 *chip = card->private_data; | |
1da177e4 LT |
1427 | unsigned char *s, *d; |
1428 | ||
b34a580e TI |
1429 | pci_restore_state(pci); |
1430 | pci_enable_device(pci); | |
1431 | request_irq(pci->irq, snd_es1938_interrupt, | |
65ca68b3 | 1432 | IRQF_DISABLED|IRQF_SHARED, "ES1938", chip); |
b34a580e | 1433 | chip->irq = pci->irq; |
1da177e4 LT |
1434 | snd_es1938_chip_init(chip); |
1435 | ||
1436 | /* restore mixer-related registers */ | |
1437 | for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) { | |
1438 | if (*s < 0xa0) | |
1439 | snd_es1938_mixer_write(chip, *s, *d); | |
1440 | else | |
1441 | snd_es1938_write(chip, *s, *d); | |
1442 | } | |
1443 | ||
b34a580e | 1444 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
1da177e4 LT |
1445 | return 0; |
1446 | } | |
1447 | #endif /* CONFIG_PM */ | |
1448 | ||
1449 | #ifdef SUPPORT_JOYSTICK | |
e571f594 | 1450 | static int __devinit snd_es1938_create_gameport(struct es1938 *chip) |
1da177e4 LT |
1451 | { |
1452 | struct gameport *gp; | |
1453 | ||
1454 | chip->gameport = gp = gameport_allocate_port(); | |
1455 | if (!gp) { | |
1456 | printk(KERN_ERR "es1938: cannot allocate memory for gameport\n"); | |
1457 | return -ENOMEM; | |
1458 | } | |
1459 | ||
1460 | gameport_set_name(gp, "ES1938"); | |
1461 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | |
1462 | gameport_set_dev_parent(gp, &chip->pci->dev); | |
1463 | gp->io = chip->game_port; | |
1464 | ||
1465 | gameport_register_port(gp); | |
1466 | ||
1467 | return 0; | |
1468 | } | |
1469 | ||
e571f594 | 1470 | static void snd_es1938_free_gameport(struct es1938 *chip) |
1da177e4 LT |
1471 | { |
1472 | if (chip->gameport) { | |
1473 | gameport_unregister_port(chip->gameport); | |
1474 | chip->gameport = NULL; | |
1475 | } | |
1476 | } | |
1477 | #else | |
e571f594 TI |
1478 | static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; } |
1479 | static inline void snd_es1938_free_gameport(struct es1938 *chip) { } | |
1da177e4 LT |
1480 | #endif /* SUPPORT_JOYSTICK */ |
1481 | ||
e571f594 | 1482 | static int snd_es1938_free(struct es1938 *chip) |
1da177e4 LT |
1483 | { |
1484 | /* disable irqs */ | |
1485 | outb(0x00, SLIO_REG(chip, IRQCONTROL)); | |
1486 | if (chip->rmidi) | |
1487 | snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); | |
1488 | ||
1489 | snd_es1938_free_gameport(chip); | |
1490 | ||
1491 | if (chip->irq >= 0) | |
e571f594 | 1492 | free_irq(chip->irq, chip); |
1da177e4 LT |
1493 | pci_release_regions(chip->pci); |
1494 | pci_disable_device(chip->pci); | |
1495 | kfree(chip); | |
1496 | return 0; | |
1497 | } | |
1498 | ||
e571f594 | 1499 | static int snd_es1938_dev_free(struct snd_device *device) |
1da177e4 | 1500 | { |
e571f594 | 1501 | struct es1938 *chip = device->device_data; |
1da177e4 LT |
1502 | return snd_es1938_free(chip); |
1503 | } | |
1504 | ||
e571f594 | 1505 | static int __devinit snd_es1938_create(struct snd_card *card, |
1da177e4 | 1506 | struct pci_dev * pci, |
e571f594 | 1507 | struct es1938 ** rchip) |
1da177e4 | 1508 | { |
e571f594 | 1509 | struct es1938 *chip; |
1da177e4 | 1510 | int err; |
e571f594 | 1511 | static struct snd_device_ops ops = { |
1da177e4 LT |
1512 | .dev_free = snd_es1938_dev_free, |
1513 | }; | |
1514 | ||
1515 | *rchip = NULL; | |
1516 | ||
1517 | /* enable PCI device */ | |
1518 | if ((err = pci_enable_device(pci)) < 0) | |
1519 | return err; | |
1520 | /* check, if we can restrict PCI DMA transfers to 24 bits */ | |
910638ae MG |
1521 | if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 || |
1522 | pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) { | |
99b359ba | 1523 | snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n"); |
1da177e4 LT |
1524 | pci_disable_device(pci); |
1525 | return -ENXIO; | |
1526 | } | |
1527 | ||
e560d8d8 | 1528 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
1529 | if (chip == NULL) { |
1530 | pci_disable_device(pci); | |
1531 | return -ENOMEM; | |
1532 | } | |
1533 | spin_lock_init(&chip->reg_lock); | |
1534 | spin_lock_init(&chip->mixer_lock); | |
1535 | chip->card = card; | |
1536 | chip->pci = pci; | |
1537 | if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) { | |
1538 | kfree(chip); | |
1539 | pci_disable_device(pci); | |
1540 | return err; | |
1541 | } | |
1542 | chip->io_port = pci_resource_start(pci, 0); | |
1543 | chip->sb_port = pci_resource_start(pci, 1); | |
1544 | chip->vc_port = pci_resource_start(pci, 2); | |
1545 | chip->mpu_port = pci_resource_start(pci, 3); | |
1546 | chip->game_port = pci_resource_start(pci, 4); | |
65ca68b3 | 1547 | if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_DISABLED|IRQF_SHARED, |
e571f594 | 1548 | "ES1938", chip)) { |
99b359ba | 1549 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
1da177e4 LT |
1550 | snd_es1938_free(chip); |
1551 | return -EBUSY; | |
1552 | } | |
1553 | chip->irq = pci->irq; | |
1554 | #ifdef ES1938_DDEBUG | |
99b359ba | 1555 | snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n", |
1da177e4 LT |
1556 | chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port); |
1557 | #endif | |
1558 | ||
1559 | chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */ | |
1560 | ||
1561 | snd_es1938_chip_init(chip); | |
1562 | ||
1da177e4 LT |
1563 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
1564 | snd_es1938_free(chip); | |
1565 | return err; | |
1566 | } | |
1567 | ||
1568 | snd_card_set_dev(card, &pci->dev); | |
1569 | ||
1570 | *rchip = chip; | |
1571 | return 0; | |
1572 | } | |
1573 | ||
1574 | /* -------------------------------------------------------------------- | |
1575 | * Interrupt handler | |
1576 | * -------------------------------------------------------------------- */ | |
1577 | static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1578 | { | |
e571f594 | 1579 | struct es1938 *chip = dev_id; |
1da177e4 LT |
1580 | unsigned char status, audiostatus; |
1581 | int handled = 0; | |
1582 | ||
1583 | status = inb(SLIO_REG(chip, IRQCONTROL)); | |
1584 | #if 0 | |
1585 | printk("Es1938debug - interrupt status: =0x%x\n", status); | |
1586 | #endif | |
1587 | ||
1588 | /* AUDIO 1 */ | |
1589 | if (status & 0x10) { | |
1590 | #if 0 | |
1591 | printk("Es1938debug - AUDIO channel 1 interrupt\n"); | |
e571f594 TI |
1592 | printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n", |
1593 | inw(SLDM_REG(chip, DMACOUNT))); | |
1594 | printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n", | |
1595 | inl(SLDM_REG(chip, DMAADDR))); | |
1596 | printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n", | |
1597 | inl(SLDM_REG(chip, DMASTATUS))); | |
1da177e4 LT |
1598 | #endif |
1599 | /* clear irq */ | |
1600 | handled = 1; | |
1601 | audiostatus = inb(SLSB_REG(chip, STATUS)); | |
1602 | if (chip->active & ADC1) | |
1603 | snd_pcm_period_elapsed(chip->capture_substream); | |
1604 | else if (chip->active & DAC1) | |
1605 | snd_pcm_period_elapsed(chip->playback2_substream); | |
1606 | } | |
1607 | ||
1608 | /* AUDIO 2 */ | |
1609 | if (status & 0x20) { | |
1610 | #if 0 | |
1611 | printk("Es1938debug - AUDIO channel 2 interrupt\n"); | |
e571f594 TI |
1612 | printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n", |
1613 | inw(SLIO_REG(chip, AUDIO2DMACOUNT))); | |
1614 | printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n", | |
1615 | inl(SLIO_REG(chip, AUDIO2DMAADDR))); | |
1da177e4 LT |
1616 | |
1617 | #endif | |
1618 | /* clear irq */ | |
1619 | handled = 1; | |
1620 | snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0); | |
1621 | if (chip->active & DAC2) | |
1622 | snd_pcm_period_elapsed(chip->playback1_substream); | |
1623 | } | |
1624 | ||
1625 | /* Hardware volume */ | |
1626 | if (status & 0x40) { | |
1627 | int split = snd_es1938_mixer_read(chip, 0x64) & 0x80; | |
1628 | handled = 1; | |
1629 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id); | |
1630 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id); | |
1631 | if (!split) { | |
e571f594 TI |
1632 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, |
1633 | &chip->master_switch->id); | |
1634 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
1635 | &chip->master_volume->id); | |
1da177e4 LT |
1636 | } |
1637 | /* ack interrupt */ | |
1638 | snd_es1938_mixer_write(chip, 0x66, 0x00); | |
1639 | } | |
1640 | ||
1641 | /* MPU401 */ | |
1642 | if (status & 0x80) { | |
1643 | // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received. | |
1644 | // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well! | |
1645 | // andreas@flying-snail.de | |
1646 | // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */ | |
1647 | if (chip->rmidi) { | |
1648 | handled = 1; | |
1649 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); | |
1650 | } | |
1651 | } | |
1652 | return IRQ_RETVAL(handled); | |
1653 | } | |
1654 | ||
1655 | #define ES1938_DMA_SIZE 64 | |
1656 | ||
e571f594 | 1657 | static int __devinit snd_es1938_mixer(struct es1938 *chip) |
1da177e4 | 1658 | { |
e571f594 | 1659 | struct snd_card *card; |
1da177e4 LT |
1660 | unsigned int idx; |
1661 | int err; | |
1662 | ||
1663 | card = chip->card; | |
1664 | ||
1665 | strcpy(card->mixername, "ESS Solo-1"); | |
1666 | ||
1667 | for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) { | |
e571f594 | 1668 | struct snd_kcontrol *kctl; |
1da177e4 LT |
1669 | kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip); |
1670 | switch (idx) { | |
1671 | case 0: | |
1672 | chip->master_volume = kctl; | |
1673 | kctl->private_free = snd_es1938_hwv_free; | |
1674 | break; | |
1675 | case 1: | |
1676 | chip->master_switch = kctl; | |
1677 | kctl->private_free = snd_es1938_hwv_free; | |
1678 | break; | |
1679 | case 2: | |
1680 | chip->hw_volume = kctl; | |
1681 | kctl->private_free = snd_es1938_hwv_free; | |
1682 | break; | |
1683 | case 3: | |
1684 | chip->hw_switch = kctl; | |
1685 | kctl->private_free = snd_es1938_hwv_free; | |
1686 | break; | |
1687 | } | |
1688 | if ((err = snd_ctl_add(card, kctl)) < 0) | |
1689 | return err; | |
1690 | } | |
1691 | return 0; | |
1692 | } | |
1693 | ||
1694 | ||
1695 | static int __devinit snd_es1938_probe(struct pci_dev *pci, | |
1696 | const struct pci_device_id *pci_id) | |
1697 | { | |
1698 | static int dev; | |
e571f594 TI |
1699 | struct snd_card *card; |
1700 | struct es1938 *chip; | |
1701 | struct snd_opl3 *opl3; | |
1da177e4 LT |
1702 | int idx, err; |
1703 | ||
1704 | if (dev >= SNDRV_CARDS) | |
1705 | return -ENODEV; | |
1706 | if (!enable[dev]) { | |
1707 | dev++; | |
1708 | return -ENOENT; | |
1709 | } | |
1710 | ||
1711 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); | |
1712 | if (card == NULL) | |
1713 | return -ENOMEM; | |
1714 | for (idx = 0; idx < 5; idx++) { | |
1715 | if (pci_resource_start(pci, idx) == 0 || | |
1716 | !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) { | |
1717 | snd_card_free(card); | |
1718 | return -ENODEV; | |
1719 | } | |
1720 | } | |
1721 | if ((err = snd_es1938_create(card, pci, &chip)) < 0) { | |
1722 | snd_card_free(card); | |
1723 | return err; | |
1724 | } | |
b34a580e | 1725 | card->private_data = chip; |
1da177e4 LT |
1726 | |
1727 | strcpy(card->driver, "ES1938"); | |
1728 | strcpy(card->shortname, "ESS ES1938 (Solo-1)"); | |
1729 | sprintf(card->longname, "%s rev %i, irq %i", | |
1730 | card->shortname, | |
1731 | chip->revision, | |
1732 | chip->irq); | |
1733 | ||
1734 | if ((err = snd_es1938_new_pcm(chip, 0)) < 0) { | |
1735 | snd_card_free(card); | |
1736 | return err; | |
1737 | } | |
1738 | if ((err = snd_es1938_mixer(chip)) < 0) { | |
1739 | snd_card_free(card); | |
1740 | return err; | |
1741 | } | |
1742 | if (snd_opl3_create(card, | |
1743 | SLSB_REG(chip, FMLOWADDR), | |
1744 | SLSB_REG(chip, FMHIGHADDR), | |
1745 | OPL3_HW_OPL3, 1, &opl3) < 0) { | |
1746 | printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n", | |
1747 | SLSB_REG(chip, FMLOWADDR)); | |
1748 | } else { | |
1749 | if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) { | |
1750 | snd_card_free(card); | |
1751 | return err; | |
1752 | } | |
1753 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { | |
1754 | snd_card_free(card); | |
1755 | return err; | |
1756 | } | |
1757 | } | |
1758 | if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, | |
302e4c2f TI |
1759 | chip->mpu_port, MPU401_INFO_INTEGRATED, |
1760 | chip->irq, 0, &chip->rmidi) < 0) { | |
1da177e4 LT |
1761 | printk(KERN_ERR "es1938: unable to initialize MPU-401\n"); |
1762 | } else { | |
1763 | // this line is vital for MIDI interrupt handling on ess-solo1 | |
1764 | // andreas@flying-snail.de | |
1765 | snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40); | |
1766 | } | |
1767 | ||
1768 | snd_es1938_create_gameport(chip); | |
1769 | ||
1770 | if ((err = snd_card_register(card)) < 0) { | |
1771 | snd_card_free(card); | |
1772 | return err; | |
1773 | } | |
1774 | ||
1775 | pci_set_drvdata(pci, card); | |
1776 | dev++; | |
1777 | return 0; | |
1778 | } | |
1779 | ||
1780 | static void __devexit snd_es1938_remove(struct pci_dev *pci) | |
1781 | { | |
1782 | snd_card_free(pci_get_drvdata(pci)); | |
1783 | pci_set_drvdata(pci, NULL); | |
1784 | } | |
1785 | ||
1786 | static struct pci_driver driver = { | |
1787 | .name = "ESS ES1938 (Solo-1)", | |
1788 | .id_table = snd_es1938_ids, | |
1789 | .probe = snd_es1938_probe, | |
1790 | .remove = __devexit_p(snd_es1938_remove), | |
b34a580e TI |
1791 | #ifdef CONFIG_PM |
1792 | .suspend = es1938_suspend, | |
1793 | .resume = es1938_resume, | |
1794 | #endif | |
1da177e4 LT |
1795 | }; |
1796 | ||
1797 | static int __init alsa_card_es1938_init(void) | |
1798 | { | |
01d25d46 | 1799 | return pci_register_driver(&driver); |
1da177e4 LT |
1800 | } |
1801 | ||
1802 | static void __exit alsa_card_es1938_exit(void) | |
1803 | { | |
1804 | pci_unregister_driver(&driver); | |
1805 | } | |
1806 | ||
1807 | module_init(alsa_card_es1938_init) | |
1808 | module_exit(alsa_card_es1938_exit) |