ALSA: hda - Allow codec-specific set_power_state ops
[deliverable/linux.git] / sound / pci / hda / hda_codec.h
CommitLineData
1da177e4
LT
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __SOUND_HDA_CODEC_H
22#define __SOUND_HDA_CODEC_H
23
24#include <sound/info.h>
25#include <sound/control.h>
26#include <sound/pcm.h>
2807314d 27#include <sound/hwdep.h>
1da177e4
LT
28
29/*
30 * nodes
31 */
32#define AC_NODE_ROOT 0x00
33
34/*
35 * function group types
36 */
37enum {
38 AC_GRP_AUDIO_FUNCTION = 0x01,
39 AC_GRP_MODEM_FUNCTION = 0x02,
40};
41
42/*
43 * widget types
44 */
45enum {
46 AC_WID_AUD_OUT, /* Audio Out */
47 AC_WID_AUD_IN, /* Audio In */
48 AC_WID_AUD_MIX, /* Audio Mixer */
49 AC_WID_AUD_SEL, /* Audio Selector */
50 AC_WID_PIN, /* Pin Complex */
51 AC_WID_POWER, /* Power */
52 AC_WID_VOL_KNB, /* Volume Knob */
53 AC_WID_BEEP, /* Beep Generator */
54 AC_WID_VENDOR = 0x0f /* Vendor specific */
55};
56
57/*
58 * GET verbs
59 */
60#define AC_VERB_GET_STREAM_FORMAT 0x0a00
61#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
62#define AC_VERB_GET_PROC_COEF 0x0c00
63#define AC_VERB_GET_COEF_INDEX 0x0d00
64#define AC_VERB_PARAMETERS 0x0f00
65#define AC_VERB_GET_CONNECT_SEL 0x0f01
66#define AC_VERB_GET_CONNECT_LIST 0x0f02
67#define AC_VERB_GET_PROC_STATE 0x0f03
68#define AC_VERB_GET_SDI_SELECT 0x0f04
69#define AC_VERB_GET_POWER_STATE 0x0f05
70#define AC_VERB_GET_CONV 0x0f06
71#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
72#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
73#define AC_VERB_GET_PIN_SENSE 0x0f09
74#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
75#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
3982d17e 76#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
a1855d80 77#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
1da177e4
LT
78#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
79/* f10-f1a: GPIO */
16ded525
TI
80#define AC_VERB_GET_GPIO_DATA 0x0f15
81#define AC_VERB_GET_GPIO_MASK 0x0f16
82#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
797760ab 83#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
3982d17e 84#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
797760ab 85#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
1da177e4 86#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
86284e45
TI
87/* f20: AFG/MFG */
88#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
955d2488
TI
89#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
90#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
91#define AC_VERB_GET_HDMI_ELDD 0x0f2f
92#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
93#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
94#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
95#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
96#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
1da177e4
LT
97
98/*
99 * SET verbs
100 */
101#define AC_VERB_SET_STREAM_FORMAT 0x200
102#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
103#define AC_VERB_SET_PROC_COEF 0x400
104#define AC_VERB_SET_COEF_INDEX 0x500
105#define AC_VERB_SET_CONNECT_SEL 0x701
106#define AC_VERB_SET_PROC_STATE 0x703
107#define AC_VERB_SET_SDI_SELECT 0x704
108#define AC_VERB_SET_POWER_STATE 0x705
109#define AC_VERB_SET_CHANNEL_STREAMID 0x706
110#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
111#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
112#define AC_VERB_SET_PIN_SENSE 0x709
113#define AC_VERB_SET_BEEP_CONTROL 0x70a
a2a20939 114#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
1da177e4
LT
115#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
116#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
117#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
16ded525
TI
118#define AC_VERB_SET_GPIO_DATA 0x715
119#define AC_VERB_SET_GPIO_MASK 0x716
120#define AC_VERB_SET_GPIO_DIRECTION 0x717
797760ab 121#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
3982d17e 122#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
797760ab 123#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
1da177e4
LT
124#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
125#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
126#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
127#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
d0513fc6 128#define AC_VERB_SET_EAPD 0x788
1da177e4 129#define AC_VERB_SET_CODEC_RESET 0x7ff
955d2488
TI
130#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
131#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
132#define AC_VERB_SET_HDMI_DIP_DATA 0x731
133#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
134#define AC_VERB_SET_HDMI_CP_CTRL 0x733
135#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
1da177e4
LT
136
137/*
138 * Parameter IDs
139 */
140#define AC_PAR_VENDOR_ID 0x00
141#define AC_PAR_SUBSYSTEM_ID 0x01
142#define AC_PAR_REV_ID 0x02
143#define AC_PAR_NODE_COUNT 0x04
144#define AC_PAR_FUNCTION_TYPE 0x05
145#define AC_PAR_AUDIO_FG_CAP 0x08
146#define AC_PAR_AUDIO_WIDGET_CAP 0x09
147#define AC_PAR_PCM 0x0a
148#define AC_PAR_STREAM 0x0b
149#define AC_PAR_PIN_CAP 0x0c
150#define AC_PAR_AMP_IN_CAP 0x0d
151#define AC_PAR_CONNLIST_LEN 0x0e
152#define AC_PAR_POWER_STATE 0x0f
153#define AC_PAR_PROC_CAP 0x10
154#define AC_PAR_GPIO_CAP 0x11
155#define AC_PAR_AMP_OUT_CAP 0x12
e1716139 156#define AC_PAR_VOL_KNB_CAP 0x13
955d2488 157#define AC_PAR_HDMI_LPCM_CAP 0x20
1da177e4
LT
158
159/*
160 * AC_VERB_PARAMETERS results (32bit)
161 */
162
163/* Function Group Type */
164#define AC_FGT_TYPE (0xff<<0)
165#define AC_FGT_TYPE_SHIFT 0
166#define AC_FGT_UNSOL_CAP (1<<8)
167
168/* Audio Function Group Capabilities */
169#define AC_AFG_OUT_DELAY (0xf<<0)
170#define AC_AFG_IN_DELAY (0xf<<8)
171#define AC_AFG_BEEP_GEN (1<<16)
172
173/* Audio Widget Capabilities */
174#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
175#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
176#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
177#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
178#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
179#define AC_WCAP_STRIPE (1<<5) /* stripe */
180#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
181#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
182#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
183#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
184#define AC_WCAP_POWER (1<<10) /* power control */
185#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
955d2488
TI
186#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
187#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
1da177e4
LT
188#define AC_WCAP_DELAY (0xf<<16)
189#define AC_WCAP_DELAY_SHIFT 16
190#define AC_WCAP_TYPE (0xf<<20)
191#define AC_WCAP_TYPE_SHIFT 20
192
193/* supported PCM rates and bits */
194#define AC_SUPPCM_RATES (0xfff << 0)
195#define AC_SUPPCM_BITS_8 (1<<16)
196#define AC_SUPPCM_BITS_16 (1<<17)
197#define AC_SUPPCM_BITS_20 (1<<18)
198#define AC_SUPPCM_BITS_24 (1<<19)
199#define AC_SUPPCM_BITS_32 (1<<20)
200
201/* supported PCM stream format */
202#define AC_SUPFMT_PCM (1<<0)
203#define AC_SUPFMT_FLOAT32 (1<<1)
204#define AC_SUPFMT_AC3 (1<<2)
205
797760ab
AP
206/* GP I/O count */
207#define AC_GPIO_IO_COUNT (0xff<<0)
208#define AC_GPIO_O_COUNT (0xff<<8)
209#define AC_GPIO_O_COUNT_SHIFT 8
210#define AC_GPIO_I_COUNT (0xff<<16)
211#define AC_GPIO_I_COUNT_SHIFT 16
212#define AC_GPIO_UNSOLICITED (1<<30)
213#define AC_GPIO_WAKE (1<<31)
214
215/* Converter stream, channel */
216#define AC_CONV_CHANNEL (0xf<<0)
217#define AC_CONV_STREAM (0xf<<4)
218#define AC_CONV_STREAM_SHIFT 4
219
220/* Input converter SDI select */
221#define AC_SDI_SELECT (0xf<<0)
222
92f10b3f
TI
223/* stream format id */
224#define AC_FMT_CHAN_SHIFT 0
225#define AC_FMT_CHAN_MASK (0x0f << 0)
226#define AC_FMT_BITS_SHIFT 4
227#define AC_FMT_BITS_MASK (7 << 4)
228#define AC_FMT_BITS_8 (0 << 4)
229#define AC_FMT_BITS_16 (1 << 4)
230#define AC_FMT_BITS_20 (2 << 4)
231#define AC_FMT_BITS_24 (3 << 4)
232#define AC_FMT_BITS_32 (4 << 4)
233#define AC_FMT_DIV_SHIFT 8
234#define AC_FMT_DIV_MASK (7 << 8)
235#define AC_FMT_MULT_SHIFT 11
236#define AC_FMT_MULT_MASK (7 << 11)
237#define AC_FMT_BASE_SHIFT 14
238#define AC_FMT_BASE_48K (0 << 14)
239#define AC_FMT_BASE_44K (1 << 14)
240#define AC_FMT_TYPE_SHIFT 15
241#define AC_FMT_TYPE_PCM (0 << 15)
242#define AC_FMT_TYPE_NON_PCM (1 << 15)
243
955d2488 244/* Unsolicited response control */
797760ab
AP
245#define AC_UNSOL_TAG (0x3f<<0)
246#define AC_UNSOL_ENABLED (1<<7)
955d2488
TI
247#define AC_USRSP_EN AC_UNSOL_ENABLED
248
249/* Unsolicited responses */
250#define AC_UNSOL_RES_TAG (0x3f<<26)
251#define AC_UNSOL_RES_TAG_SHIFT 26
252#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
253#define AC_UNSOL_RES_SUBTAG_SHIFT 21
254#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
255#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
256#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
257#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
797760ab 258
1da177e4
LT
259/* Pin widget capabilies */
260#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
261#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
262#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
263#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
264#define AC_PINCAP_OUT (1<<4) /* output capable */
265#define AC_PINCAP_IN (1<<5) /* input capable */
266#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
3982d17e
AP
267/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
268 * but is marked reserved in the Intel HDA specification.
269 */
270#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
955d2488
TI
271/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
272 * in HD-audio specification
273 */
274#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
728765b3
WF
275#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
276 * coexist with AC_PINCAP_HDMI
277 */
1a12de1e 278#define AC_PINCAP_VREF (0x37<<8)
1da177e4
LT
279#define AC_PINCAP_VREF_SHIFT 8
280#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
b923528e 281#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
1a12de1e
M
282/* Vref status (used in pin cap) */
283#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
284#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
285#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
286#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
287#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
1da177e4
LT
288
289/* Amplifier capabilities */
290#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
291#define AC_AMPCAP_OFFSET_SHIFT 0
292#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
293#define AC_AMPCAP_NUM_STEPS_SHIFT 8
d01ce99f
TI
294#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
295 * in 0.25dB
296 */
1da177e4
LT
297#define AC_AMPCAP_STEP_SIZE_SHIFT 16
298#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
299#define AC_AMPCAP_MUTE_SHIFT 31
300
301/* Connection list */
302#define AC_CLIST_LENGTH (0x7f<<0)
303#define AC_CLIST_LONG (1<<7)
304
305/* Supported power status */
306#define AC_PWRST_D0SUP (1<<0)
307#define AC_PWRST_D1SUP (1<<1)
308#define AC_PWRST_D2SUP (1<<2)
309#define AC_PWRST_D3SUP (1<<3)
83d605fd
WF
310#define AC_PWRST_D3COLDSUP (1<<4)
311#define AC_PWRST_S3D3COLDSUP (1<<29)
312#define AC_PWRST_CLKSTOP (1<<30)
313#define AC_PWRST_EPSS (1U<<31)
1da177e4 314
54d17403 315/* Power state values */
797760ab
AP
316#define AC_PWRST_SETTING (0xf<<0)
317#define AC_PWRST_ACTUAL (0xf<<4)
318#define AC_PWRST_ACTUAL_SHIFT 4
54d17403
TI
319#define AC_PWRST_D0 0x00
320#define AC_PWRST_D1 0x01
321#define AC_PWRST_D2 0x02
322#define AC_PWRST_D3 0x03
323
1da177e4
LT
324/* Processing capabilies */
325#define AC_PCAP_BENIGN (1<<0)
326#define AC_PCAP_NUM_COEF (0xff<<8)
797760ab 327#define AC_PCAP_NUM_COEF_SHIFT 8
1da177e4
LT
328
329/* Volume knobs capabilities */
330#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
38fcaf8e 331#define AC_KNBCAP_DELTA (1<<7)
1da177e4 332
955d2488
TI
333/* HDMI LPCM capabilities */
334#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
335#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
336#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
337#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
338#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
339#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
340#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
341#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
342#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
343#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
344#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
345#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
346#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
347#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
348
1da177e4
LT
349/*
350 * Control Parameters
351 */
352
353/* Amp gain/mute */
d427c77e 354#define AC_AMP_MUTE (1<<7)
1da177e4
LT
355#define AC_AMP_GAIN (0x7f)
356#define AC_AMP_GET_INDEX (0xf<<0)
357
358#define AC_AMP_GET_LEFT (1<<13)
359#define AC_AMP_GET_RIGHT (0<<13)
360#define AC_AMP_GET_OUTPUT (1<<15)
361#define AC_AMP_GET_INPUT (0<<15)
362
363#define AC_AMP_SET_INDEX (0xf<<8)
364#define AC_AMP_SET_INDEX_SHIFT 8
365#define AC_AMP_SET_RIGHT (1<<12)
366#define AC_AMP_SET_LEFT (1<<13)
367#define AC_AMP_SET_INPUT (1<<14)
368#define AC_AMP_SET_OUTPUT (1<<15)
369
370/* DIGITAL1 bits */
371#define AC_DIG1_ENABLE (1<<0)
372#define AC_DIG1_V (1<<1)
373#define AC_DIG1_VCFG (1<<2)
374#define AC_DIG1_EMPHASIS (1<<3)
375#define AC_DIG1_COPYRIGHT (1<<4)
376#define AC_DIG1_NONAUDIO (1<<5)
377#define AC_DIG1_PROFESSIONAL (1<<6)
378#define AC_DIG1_LEVEL (1<<7)
379
797760ab
AP
380/* DIGITAL2 bits */
381#define AC_DIG2_CC (0x7f<<0)
382
1da177e4 383/* Pin widget control - 8bit */
ea87d1c4
AH
384#define AC_PINCTL_EPT (0x3<<0)
385#define AC_PINCTL_EPT_NATIVE 0
386#define AC_PINCTL_EPT_HBR 3
1da177e4 387#define AC_PINCTL_VREFEN (0x7<<0)
98f759a6
TI
388#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
389#define AC_PINCTL_VREF_50 1 /* 50% */
390#define AC_PINCTL_VREF_GRD 2 /* ground */
391#define AC_PINCTL_VREF_80 4 /* 80% */
392#define AC_PINCTL_VREF_100 5 /* 100% */
1da177e4
LT
393#define AC_PINCTL_IN_EN (1<<5)
394#define AC_PINCTL_OUT_EN (1<<6)
395#define AC_PINCTL_HP_EN (1<<7)
396
797760ab
AP
397/* Pin sense - 32bit */
398#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
399#define AC_PINSENSE_PRESENCE (1<<31)
955d2488 400#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
797760ab
AP
401
402/* EAPD/BTL enable - 32bit */
403#define AC_EAPDBTL_BALANCED (1<<0)
404#define AC_EAPDBTL_EAPD (1<<1)
405#define AC_EAPDBTL_LR_SWAP (1<<2)
406
955d2488
TI
407/* HDMI ELD data */
408#define AC_ELDD_ELD_VALID (1<<31)
409#define AC_ELDD_ELD_DATA 0xff
410
411/* HDMI DIP size */
412#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
413#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
414
415/* HDMI DIP index */
416#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
417#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
418
419/* HDMI DIP xmit (transmit) control */
420#define AC_DIPXMIT_MASK (0x3<<6)
421#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
422#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
423#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
424
425/* HDMI content protection (CP) control */
426#define AC_CPCTRL_CES (1<<9) /* current encryption state */
427#define AC_CPCTRL_READY (1<<8) /* ready bit */
428#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
429#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
430
431/* Converter channel <-> HDMI slot mapping */
432#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
433#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
434
1da177e4
LT
435/* configuration default - 32bit */
436#define AC_DEFCFG_SEQUENCE (0xf<<0)
437#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
d21b37ea 438#define AC_DEFCFG_ASSOC_SHIFT 4
1da177e4 439#define AC_DEFCFG_MISC (0xf<<8)
d21b37ea 440#define AC_DEFCFG_MISC_SHIFT 8
797760ab 441#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
1da177e4
LT
442#define AC_DEFCFG_COLOR (0xf<<12)
443#define AC_DEFCFG_COLOR_SHIFT 12
444#define AC_DEFCFG_CONN_TYPE (0xf<<16)
445#define AC_DEFCFG_CONN_TYPE_SHIFT 16
446#define AC_DEFCFG_DEVICE (0xf<<20)
447#define AC_DEFCFG_DEVICE_SHIFT 20
448#define AC_DEFCFG_LOCATION (0x3f<<24)
449#define AC_DEFCFG_LOCATION_SHIFT 24
450#define AC_DEFCFG_PORT_CONN (0x3<<30)
451#define AC_DEFCFG_PORT_CONN_SHIFT 30
452
453/* device device types (0x0-0xf) */
454enum {
455 AC_JACK_LINE_OUT,
456 AC_JACK_SPEAKER,
457 AC_JACK_HP_OUT,
458 AC_JACK_CD,
459 AC_JACK_SPDIF_OUT,
460 AC_JACK_DIG_OTHER_OUT,
461 AC_JACK_MODEM_LINE_SIDE,
462 AC_JACK_MODEM_HAND_SIDE,
463 AC_JACK_LINE_IN,
464 AC_JACK_AUX,
465 AC_JACK_MIC_IN,
466 AC_JACK_TELEPHONY,
467 AC_JACK_SPDIF_IN,
468 AC_JACK_DIG_OTHER_IN,
469 AC_JACK_OTHER = 0xf,
470};
471
472/* jack connection types (0x0-0xf) */
473enum {
474 AC_JACK_CONN_UNKNOWN,
475 AC_JACK_CONN_1_8,
476 AC_JACK_CONN_1_4,
477 AC_JACK_CONN_ATAPI,
478 AC_JACK_CONN_RCA,
479 AC_JACK_CONN_OPTICAL,
480 AC_JACK_CONN_OTHER_DIGITAL,
481 AC_JACK_CONN_OTHER_ANALOG,
482 AC_JACK_CONN_DIN,
483 AC_JACK_CONN_XLR,
484 AC_JACK_CONN_RJ11,
485 AC_JACK_CONN_COMB,
486 AC_JACK_CONN_OTHER = 0xf,
487};
488
489/* jack colors (0x0-0xf) */
490enum {
491 AC_JACK_COLOR_UNKNOWN,
492 AC_JACK_COLOR_BLACK,
493 AC_JACK_COLOR_GREY,
494 AC_JACK_COLOR_BLUE,
495 AC_JACK_COLOR_GREEN,
496 AC_JACK_COLOR_RED,
497 AC_JACK_COLOR_ORANGE,
498 AC_JACK_COLOR_YELLOW,
499 AC_JACK_COLOR_PURPLE,
500 AC_JACK_COLOR_PINK,
501 AC_JACK_COLOR_WHITE = 0xe,
502 AC_JACK_COLOR_OTHER,
503};
504
505/* Jack location (0x0-0x3f) */
506/* common case */
507enum {
508 AC_JACK_LOC_NONE,
509 AC_JACK_LOC_REAR,
510 AC_JACK_LOC_FRONT,
511 AC_JACK_LOC_LEFT,
512 AC_JACK_LOC_RIGHT,
513 AC_JACK_LOC_TOP,
514 AC_JACK_LOC_BOTTOM,
515};
516/* bits 4-5 */
517enum {
518 AC_JACK_LOC_EXTERNAL = 0x00,
519 AC_JACK_LOC_INTERNAL = 0x10,
520 AC_JACK_LOC_SEPARATE = 0x20,
521 AC_JACK_LOC_OTHER = 0x30,
522};
523enum {
524 /* external on primary chasis */
525 AC_JACK_LOC_REAR_PANEL = 0x07,
526 AC_JACK_LOC_DRIVE_BAY,
527 /* internal */
528 AC_JACK_LOC_RISER = 0x17,
529 AC_JACK_LOC_HDMI,
530 AC_JACK_LOC_ATAPI,
531 /* others */
532 AC_JACK_LOC_MOBILE_IN = 0x37,
533 AC_JACK_LOC_MOBILE_OUT,
534};
535
536/* Port connectivity (0-3) */
537enum {
538 AC_JACK_PORT_COMPLEX,
539 AC_JACK_PORT_NONE,
540 AC_JACK_PORT_FIXED,
541 AC_JACK_PORT_BOTH,
542};
543
544/* max. connections to a widget */
54d17403 545#define HDA_MAX_CONNECTIONS 32
1da177e4
LT
546
547/* max. codec address */
548#define HDA_MAX_CODEC_ADDRESS 0x0f
549
c8936222
TI
550/* max number of PCM devics per card */
551#define HDA_MAX_PCMS 10
552
b2e18597
TI
553/*
554 * generic arrays
555 */
556struct snd_array {
557 unsigned int used;
558 unsigned int alloced;
559 unsigned int elem_size;
560 unsigned int alloc_align;
561 void *list;
562};
563
564void *snd_array_new(struct snd_array *array);
565void snd_array_free(struct snd_array *array);
566static inline void snd_array_init(struct snd_array *array, unsigned int size,
567 unsigned int align)
568{
569 array->elem_size = size;
570 array->alloc_align = align;
571}
572
f43aa025
TI
573static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
574{
575 return array->list + idx * array->elem_size;
576}
577
578static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
579{
580 return (unsigned long)(ptr - array->list) / array->elem_size;
581}
582
1da177e4
LT
583/*
584 * Structures
585 */
586
587struct hda_bus;
1cd2224c 588struct hda_beep;
1da177e4
LT
589struct hda_codec;
590struct hda_pcm;
591struct hda_pcm_stream;
592struct hda_bus_unsolicited;
593
594/* NID type */
595typedef u16 hda_nid_t;
596
597/* bus operators */
598struct hda_bus_ops {
599 /* send a single command */
33fa35ed 600 int (*command)(struct hda_bus *bus, unsigned int cmd);
1da177e4 601 /* get a response from the last command */
deadff16 602 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
1da177e4
LT
603 /* free the private data */
604 void (*private_free)(struct hda_bus *);
176d5335 605 /* attach a PCM stream */
33fa35ed
TI
606 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
607 struct hda_pcm *pcm);
8dd78330
TI
608 /* reset bus for retry verb */
609 void (*bus_reset)(struct hda_bus *bus);
cb53c626 610#ifdef CONFIG_SND_HDA_POWER_SAVE
561de31a 611 /* notify power-up/down from codec to controller */
33fa35ed 612 void (*pm_notify)(struct hda_bus *bus);
cb53c626 613#endif
1da177e4
LT
614};
615
616/* template to pass to the bus constructor */
617struct hda_bus_template {
618 void *private_data;
619 struct pci_dev *pci;
620 const char *modelname;
fee2fba3 621 int *power_save;
1da177e4
LT
622 struct hda_bus_ops ops;
623};
624
625/*
626 * codec bus
627 *
628 * each controller needs to creata a hda_bus to assign the accessor.
629 * A hda_bus contains several codecs in the list codec_list.
630 */
631struct hda_bus {
c8b6bf9b 632 struct snd_card *card;
1da177e4
LT
633
634 /* copied from template */
635 void *private_data;
636 struct pci_dev *pci;
637 const char *modelname;
fee2fba3 638 int *power_save;
1da177e4
LT
639 struct hda_bus_ops ops;
640
641 /* codec linked list */
642 struct list_head codec_list;
d01ce99f
TI
643 /* link caddr -> codec */
644 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
1da177e4 645
62932df8 646 struct mutex cmd_mutex;
3f50ac6a 647 struct mutex prepare_mutex;
1da177e4
LT
648
649 /* unsolicited event queue */
650 struct hda_bus_unsolicited *unsol;
e8c0ee5d 651 char workq_name[16];
6acaed38 652 struct workqueue_struct *workq; /* common workqueue for codecs */
1da177e4 653
529bd6c4
TI
654 /* assigned PCMs */
655 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
656
52987656
TI
657 /* misc op flags */
658 unsigned int needs_damn_long_delay :1;
b20f3b83
TI
659 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
660 unsigned int sync_write:1; /* sync after verb write */
661 /* status for codec/controller */
b94d3539 662 unsigned int shutdown :1; /* being unloaded */
b613291f 663 unsigned int rirb_error:1; /* error in codec communication */
8dd78330
TI
664 unsigned int response_reset:1; /* controller was reset */
665 unsigned int in_reset:1; /* during reset operation */
0287d970 666 unsigned int power_keep_link_on:1; /* don't power off HDA link */
1da177e4
LT
667};
668
669/*
670 * codec preset
671 *
672 * Known codecs have the patch to build and set up the controls/PCMs
673 * better than the generic parser.
674 */
675struct hda_codec_preset {
676 unsigned int id;
677 unsigned int mask;
678 unsigned int subs;
679 unsigned int subs_mask;
680 unsigned int rev;
ca7cfae9 681 hda_nid_t afg, mfg;
1da177e4
LT
682 const char *name;
683 int (*patch)(struct hda_codec *codec);
684};
685
1289e9e8
TI
686struct hda_codec_preset_list {
687 const struct hda_codec_preset *preset;
688 struct module *owner;
689 struct list_head list;
690};
691
692/* initial hook */
693int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
694int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
695
1da177e4
LT
696/* ops set by the preset patch */
697struct hda_codec_ops {
698 int (*build_controls)(struct hda_codec *codec);
699 int (*build_pcms)(struct hda_codec *codec);
700 int (*init)(struct hda_codec *codec);
701 void (*free)(struct hda_codec *codec);
702 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
4d7fbdbc
TI
703 void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
704 unsigned int power_state);
2a43952a 705#ifdef CONFIG_PM
1da177e4 706 int (*suspend)(struct hda_codec *codec, pm_message_t state);
e581f3db 707 int (*post_suspend)(struct hda_codec *codec);
2a43952a 708 int (*pre_resume)(struct hda_codec *codec);
1da177e4
LT
709 int (*resume)(struct hda_codec *codec);
710#endif
cb53c626
TI
711#ifdef CONFIG_SND_HDA_POWER_SAVE
712 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
713#endif
fb8d1a34 714 void (*reboot_notify)(struct hda_codec *codec);
1da177e4
LT
715};
716
717/* record for amp information cache */
01751f54 718struct hda_cache_head {
1da177e4 719 u32 key; /* hash key */
01751f54
TI
720 u16 val; /* assigned value */
721 u16 next; /* next link; -1 = terminal */
722};
723
724struct hda_amp_info {
725 struct hda_cache_head head;
1da177e4 726 u32 amp_caps; /* amp capabilities */
7f0e2f8b 727 u16 vol[2]; /* current volume & mute */
01751f54
TI
728};
729
730struct hda_cache_rec {
731 u16 hash[64]; /* hash table for index */
603c4019 732 struct snd_array buf; /* record entries */
1da177e4
LT
733};
734
735/* PCM callbacks */
736struct hda_pcm_ops {
737 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 738 struct snd_pcm_substream *substream);
1da177e4 739 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 740 struct snd_pcm_substream *substream);
1da177e4
LT
741 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
742 unsigned int stream_tag, unsigned int format,
c8b6bf9b 743 struct snd_pcm_substream *substream);
1da177e4 744 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 745 struct snd_pcm_substream *substream);
1da177e4
LT
746};
747
748/* PCM information for each substream */
749struct hda_pcm_stream {
d01ce99f 750 unsigned int substreams; /* number of substreams, 0 = not exist*/
1da177e4
LT
751 unsigned int channels_min; /* min. number of channels */
752 unsigned int channels_max; /* max. number of channels */
753 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
754 u32 rates; /* supported rates */
755 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
756 unsigned int maxbps; /* supported max. bit per sample */
757 struct hda_pcm_ops ops;
758};
759
7ba72ba1
TI
760/* PCM types */
761enum {
762 HDA_PCM_TYPE_AUDIO,
763 HDA_PCM_TYPE_SPDIF,
764 HDA_PCM_TYPE_HDMI,
765 HDA_PCM_TYPE_MODEM,
766 HDA_PCM_NTYPES
767};
768
1da177e4
LT
769/* for PCM creation */
770struct hda_pcm {
771 char *name;
772 struct hda_pcm_stream stream[2];
7ba72ba1 773 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
176d5335
TI
774 int device; /* device number to assign */
775 struct snd_pcm *pcm; /* assigned PCM instance */
1da177e4
LT
776};
777
778/* codec information */
779struct hda_codec {
780 struct hda_bus *bus;
781 unsigned int addr; /* codec addr*/
782 struct list_head list; /* list point */
783
784 hda_nid_t afg; /* AFG node id */
673b683a 785 hda_nid_t mfg; /* MFG node id */
1da177e4
LT
786
787 /* ids */
79c944ad
JK
788 u8 afg_function_id;
789 u8 mfg_function_id;
790 u8 afg_unsol;
791 u8 mfg_unsol;
1da177e4
LT
792 u32 vendor_id;
793 u32 subsystem_id;
794 u32 revision_id;
795
796 /* detected preset */
797 const struct hda_codec_preset *preset;
1289e9e8 798 struct module *owner;
812a2cca
TI
799 const char *vendor_name; /* codec vendor name */
800 const char *chip_name; /* codec chip name */
f44ac837 801 const char *modelname; /* model name for preset */
1da177e4
LT
802
803 /* set by patch */
804 struct hda_codec_ops patch_ops;
805
1da177e4
LT
806 /* PCM to create, set by patch_ops.build_pcms callback */
807 unsigned int num_pcms;
808 struct hda_pcm *pcm_info;
809
810 /* codec specific info */
811 void *spec;
812
1cd2224c
MR
813 /* beep device */
814 struct hda_beep *beep;
2dca0bba 815 unsigned int beep_mode;
1cd2224c 816
54d17403
TI
817 /* widget capabilities cache */
818 unsigned int num_nodes;
819 hda_nid_t start_nid;
820 u32 *wcaps;
821
d13bd412 822 struct snd_array mixers; /* list of assigned mixer elements */
5b0cb1d8 823 struct snd_array nids; /* list of mapped mixer elements */
d13bd412 824
01751f54 825 struct hda_cache_rec amp_cache; /* cache for amp access */
b3ac5636 826 struct hda_cache_rec cmd_cache; /* cache for other commands */
1da177e4 827
a12d3e1e
TI
828 struct snd_array conn_lists; /* connection-list array */
829
62932df8 830 struct mutex spdif_mutex;
5a9e02e9 831 struct mutex control_mutex;
7c935976 832 struct snd_array spdif_out;
1da177e4 833 unsigned int spdif_in_enable; /* SPDIF input enable? */
dda14410 834 const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
3be14149 835 struct snd_array init_pins; /* initial (BIOS) pin configurations */
346ff70f 836 struct snd_array driver_pins; /* pin configs set by codec parser */
eb541337 837 struct snd_array cvt_setups; /* audio convert setups */
2807314d 838
11aeff08 839#ifdef CONFIG_SND_HDA_HWDEP
2807314d 840 struct snd_hwdep *hwdep; /* assigned hwdep device */
11aeff08 841 struct snd_array init_verbs; /* additional init verbs */
1e1be432 842 struct snd_array hints; /* additional hints */
346ff70f 843 struct snd_array user_pins; /* default pin configs to override */
11aeff08 844#endif
cb53c626 845
963f803f
TI
846 /* misc flags */
847 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
848 * status change
849 * (e.g. Realtek codecs)
850 */
9421f954
TI
851 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
852 * (e.g. Conexant codecs)
853 */
0e7adbe2 854 unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
ac0547dc 855 unsigned int pins_shutup:1; /* pins are shut up */
729d55ba 856 unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
cb53c626 857#ifdef CONFIG_SND_HDA_POWER_SAVE
a221e287
TI
858 unsigned int power_on :1; /* current (global) power-state */
859 unsigned int power_transition :1; /* power-state in transition */
cb53c626
TI
860 int power_count; /* current (global) power refcount */
861 struct delayed_work power_work; /* delayed task for powerdown */
a2f6309e
TI
862 unsigned long power_on_acct;
863 unsigned long power_off_acct;
864 unsigned long power_jiffies;
cb53c626 865#endif
daead538
TI
866
867 /* codec-specific additional proc output */
868 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
869 struct hda_codec *codec, hda_nid_t nid);
cd372fb3
TI
870
871#ifdef CONFIG_SND_HDA_INPUT_JACK
872 /* jack detection */
873 struct snd_array jacks;
874#endif
1da177e4
LT
875};
876
877/* direction */
878enum {
879 HDA_INPUT, HDA_OUTPUT
880};
881
882
883/*
884 * constructors
885 */
c8b6bf9b 886int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
1da177e4
LT
887 struct hda_bus **busp);
888int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
a1e21c90
TI
889 struct hda_codec **codecp);
890int snd_hda_codec_configure(struct hda_codec *codec);
1da177e4
LT
891
892/*
893 * low level functions
894 */
d01ce99f
TI
895unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
896 int direct,
1da177e4
LT
897 unsigned int verb, unsigned int parm);
898int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
899 unsigned int verb, unsigned int parm);
d01ce99f
TI
900#define snd_hda_param_read(codec, nid, param) \
901 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
902int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
903 hda_nid_t *start_id);
904int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
905 hda_nid_t *conn_list, int max_conns);
9e7717c9
TI
906int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
907 hda_nid_t *conn_list, int max_conns);
dce2079b
TI
908int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
909 const hda_nid_t **listp);
b2f934a0
TI
910int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
911 const hda_nid_t *list);
8d087c76
TI
912int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
913 hda_nid_t nid, int recursive);
384a48d7
SW
914int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
915 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
1da177e4
LT
916
917struct hda_verb {
918 hda_nid_t nid;
919 u32 verb;
920 u32 param;
921};
922
d01ce99f
TI
923void snd_hda_sequence_write(struct hda_codec *codec,
924 const struct hda_verb *seq);
1da177e4
LT
925
926/* unsolicited event */
927int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
928
b3ac5636 929/* cached write */
2a43952a 930#ifdef CONFIG_PM
b3ac5636
TI
931int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
932 int direct, unsigned int verb, unsigned int parm);
933void snd_hda_sequence_write_cache(struct hda_codec *codec,
934 const struct hda_verb *seq);
a68d5a54
TI
935int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
936 int direct, unsigned int verb, unsigned int parm);
b3ac5636 937void snd_hda_codec_resume_cache(struct hda_codec *codec);
82beb8fd
TI
938#else
939#define snd_hda_codec_write_cache snd_hda_codec_write
a68d5a54 940#define snd_hda_codec_update_cache snd_hda_codec_write
82beb8fd
TI
941#define snd_hda_sequence_write_cache snd_hda_sequence_write
942#endif
b3ac5636 943
3be14149
TI
944/* the struct for codec->pin_configs */
945struct hda_pincfg {
946 hda_nid_t nid;
ac0547dc
TI
947 unsigned char ctrl; /* current pin control value */
948 unsigned char pad; /* reserved */
949 unsigned int cfg; /* default configuration */
3be14149
TI
950};
951
952unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
953int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
954 unsigned int cfg);
955int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
956 hda_nid_t nid, unsigned int cfg); /* for hwdep */
92ee6162 957void snd_hda_shutup_pins(struct hda_codec *codec);
3be14149 958
7c935976
SW
959/* SPDIF controls */
960struct hda_spdif_out {
961 hda_nid_t nid; /* Converter nid values relate to */
962 unsigned int status; /* IEC958 status bits */
963 unsigned short ctls; /* SPDIF control bits */
964};
965struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
966 hda_nid_t nid);
74b654c9
SW
967void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
968void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
7c935976 969
1da177e4
LT
970/*
971 * Mixer
972 */
973int snd_hda_build_controls(struct hda_bus *bus);
6c1f45ea 974int snd_hda_codec_build_controls(struct hda_codec *codec);
1da177e4
LT
975
976/*
977 * PCM
978 */
979int snd_hda_build_pcms(struct hda_bus *bus);
529bd6c4 980int snd_hda_codec_build_pcms(struct hda_codec *codec);
eb541337
TI
981
982int snd_hda_codec_prepare(struct hda_codec *codec,
983 struct hda_pcm_stream *hinfo,
984 unsigned int stream,
985 unsigned int format,
986 struct snd_pcm_substream *substream);
987void snd_hda_codec_cleanup(struct hda_codec *codec,
988 struct hda_pcm_stream *hinfo,
989 struct snd_pcm_substream *substream);
990
d01ce99f
TI
991void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
992 u32 stream_tag,
1da177e4 993 int channel_id, int format);
f0cea797
TI
994void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
995 int do_now);
996#define snd_hda_codec_cleanup_stream(codec, nid) \
997 __snd_hda_codec_cleanup_stream(codec, nid, 0)
d01ce99f
TI
998unsigned int snd_hda_calc_stream_format(unsigned int rate,
999 unsigned int channels,
1000 unsigned int format,
32c168c8
AH
1001 unsigned int maxbps,
1002 unsigned short spdif_ctls);
1da177e4
LT
1003int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
1004 unsigned int format);
1005
1006/*
1007 * Misc
1008 */
1009void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
fb8d1a34 1010void snd_hda_bus_reboot_notify(struct hda_bus *bus);
4d7fbdbc
TI
1011void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
1012 unsigned int power_state,
1013 bool eapd_workaround);
1da177e4
LT
1014
1015/*
1016 * power management
1017 */
1018#ifdef CONFIG_PM
8dd78330 1019int snd_hda_suspend(struct hda_bus *bus);
1da177e4
LT
1020int snd_hda_resume(struct hda_bus *bus);
1021#endif
1022
9e5341b9
TI
1023static inline
1024int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1025{
ff2b7e2a 1026#ifdef CONFIG_SND_HDA_POWER_SAVE
9e5341b9
TI
1027 if (codec->patch_ops.check_power_status)
1028 return codec->patch_ops.check_power_status(codec, nid);
ff2b7e2a 1029#endif
9e5341b9
TI
1030 return 0;
1031}
9e5341b9 1032
50a9f790
MR
1033/*
1034 * get widget information
1035 */
1036const char *snd_hda_get_jack_connectivity(u32 cfg);
1037const char *snd_hda_get_jack_type(u32 cfg);
1038const char *snd_hda_get_jack_location(u32 cfg);
1039
cb53c626
TI
1040/*
1041 * power saving
1042 */
1043#ifdef CONFIG_SND_HDA_POWER_SAVE
1044void snd_hda_power_up(struct hda_codec *codec);
1045void snd_hda_power_down(struct hda_codec *codec);
d804ad92 1046#define snd_hda_codec_needs_resume(codec) codec->power_count
a2f6309e 1047void snd_hda_update_power_acct(struct hda_codec *codec);
cb53c626
TI
1048#else
1049static inline void snd_hda_power_up(struct hda_codec *codec) {}
1050static inline void snd_hda_power_down(struct hda_codec *codec) {}
d804ad92 1051#define snd_hda_codec_needs_resume(codec) 1
cb53c626
TI
1052#endif
1053
4ea6fbc8
TI
1054#ifdef CONFIG_SND_HDA_PATCH_LOADER
1055/*
1056 * patch firmware
1057 */
1058int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
1059#endif
1060
ff7a3267
TI
1061/*
1062 * Codec modularization
1063 */
1064
1065/* Export symbols only for communication with codec drivers;
1066 * When built in kernel, all HD-audio drivers are supposed to be statically
1067 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
1068 * exported unless it's built as a module.
1069 */
1070#ifdef MODULE
1071#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1072#else
1073#define EXPORT_SYMBOL_HDA(sym)
1074#endif
1075
1da177e4 1076#endif /* __SOUND_HDA_CODEC_H */
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