ALSA: hda - Make is_jack_detectable() as non-inlined
[deliverable/linux.git] / sound / pci / hda / hda_codec.h
CommitLineData
1da177e4
LT
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __SOUND_HDA_CODEC_H
22#define __SOUND_HDA_CODEC_H
23
24#include <sound/info.h>
25#include <sound/control.h>
26#include <sound/pcm.h>
2807314d 27#include <sound/hwdep.h>
1da177e4
LT
28
29/*
30 * nodes
31 */
32#define AC_NODE_ROOT 0x00
33
34/*
35 * function group types
36 */
37enum {
38 AC_GRP_AUDIO_FUNCTION = 0x01,
39 AC_GRP_MODEM_FUNCTION = 0x02,
40};
41
42/*
43 * widget types
44 */
45enum {
46 AC_WID_AUD_OUT, /* Audio Out */
47 AC_WID_AUD_IN, /* Audio In */
48 AC_WID_AUD_MIX, /* Audio Mixer */
49 AC_WID_AUD_SEL, /* Audio Selector */
50 AC_WID_PIN, /* Pin Complex */
51 AC_WID_POWER, /* Power */
52 AC_WID_VOL_KNB, /* Volume Knob */
53 AC_WID_BEEP, /* Beep Generator */
54 AC_WID_VENDOR = 0x0f /* Vendor specific */
55};
56
57/*
58 * GET verbs
59 */
60#define AC_VERB_GET_STREAM_FORMAT 0x0a00
61#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
62#define AC_VERB_GET_PROC_COEF 0x0c00
63#define AC_VERB_GET_COEF_INDEX 0x0d00
64#define AC_VERB_PARAMETERS 0x0f00
65#define AC_VERB_GET_CONNECT_SEL 0x0f01
66#define AC_VERB_GET_CONNECT_LIST 0x0f02
67#define AC_VERB_GET_PROC_STATE 0x0f03
68#define AC_VERB_GET_SDI_SELECT 0x0f04
69#define AC_VERB_GET_POWER_STATE 0x0f05
70#define AC_VERB_GET_CONV 0x0f06
71#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
72#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
73#define AC_VERB_GET_PIN_SENSE 0x0f09
74#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
75#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
3982d17e 76#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
a1855d80 77#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
1da177e4
LT
78#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
79/* f10-f1a: GPIO */
16ded525
TI
80#define AC_VERB_GET_GPIO_DATA 0x0f15
81#define AC_VERB_GET_GPIO_MASK 0x0f16
82#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
797760ab 83#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
3982d17e 84#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
797760ab 85#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
1da177e4 86#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
86284e45
TI
87/* f20: AFG/MFG */
88#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
955d2488
TI
89#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
90#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
91#define AC_VERB_GET_HDMI_ELDD 0x0f2f
92#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
93#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
94#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
95#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
96#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
1da177e4
LT
97
98/*
99 * SET verbs
100 */
101#define AC_VERB_SET_STREAM_FORMAT 0x200
102#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
103#define AC_VERB_SET_PROC_COEF 0x400
104#define AC_VERB_SET_COEF_INDEX 0x500
105#define AC_VERB_SET_CONNECT_SEL 0x701
106#define AC_VERB_SET_PROC_STATE 0x703
107#define AC_VERB_SET_SDI_SELECT 0x704
108#define AC_VERB_SET_POWER_STATE 0x705
109#define AC_VERB_SET_CHANNEL_STREAMID 0x706
110#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
111#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
112#define AC_VERB_SET_PIN_SENSE 0x709
113#define AC_VERB_SET_BEEP_CONTROL 0x70a
a2a20939 114#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
1da177e4
LT
115#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
116#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
117#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
16ded525
TI
118#define AC_VERB_SET_GPIO_DATA 0x715
119#define AC_VERB_SET_GPIO_MASK 0x716
120#define AC_VERB_SET_GPIO_DIRECTION 0x717
797760ab 121#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
3982d17e 122#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
797760ab 123#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
1da177e4
LT
124#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
125#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
126#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
127#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
d0513fc6 128#define AC_VERB_SET_EAPD 0x788
1da177e4 129#define AC_VERB_SET_CODEC_RESET 0x7ff
955d2488
TI
130#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
131#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
132#define AC_VERB_SET_HDMI_DIP_DATA 0x731
133#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
134#define AC_VERB_SET_HDMI_CP_CTRL 0x733
135#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
1da177e4
LT
136
137/*
138 * Parameter IDs
139 */
140#define AC_PAR_VENDOR_ID 0x00
141#define AC_PAR_SUBSYSTEM_ID 0x01
142#define AC_PAR_REV_ID 0x02
143#define AC_PAR_NODE_COUNT 0x04
144#define AC_PAR_FUNCTION_TYPE 0x05
145#define AC_PAR_AUDIO_FG_CAP 0x08
146#define AC_PAR_AUDIO_WIDGET_CAP 0x09
147#define AC_PAR_PCM 0x0a
148#define AC_PAR_STREAM 0x0b
149#define AC_PAR_PIN_CAP 0x0c
150#define AC_PAR_AMP_IN_CAP 0x0d
151#define AC_PAR_CONNLIST_LEN 0x0e
152#define AC_PAR_POWER_STATE 0x0f
153#define AC_PAR_PROC_CAP 0x10
154#define AC_PAR_GPIO_CAP 0x11
155#define AC_PAR_AMP_OUT_CAP 0x12
e1716139 156#define AC_PAR_VOL_KNB_CAP 0x13
955d2488 157#define AC_PAR_HDMI_LPCM_CAP 0x20
1da177e4
LT
158
159/*
160 * AC_VERB_PARAMETERS results (32bit)
161 */
162
163/* Function Group Type */
164#define AC_FGT_TYPE (0xff<<0)
165#define AC_FGT_TYPE_SHIFT 0
166#define AC_FGT_UNSOL_CAP (1<<8)
167
168/* Audio Function Group Capabilities */
169#define AC_AFG_OUT_DELAY (0xf<<0)
170#define AC_AFG_IN_DELAY (0xf<<8)
171#define AC_AFG_BEEP_GEN (1<<16)
172
173/* Audio Widget Capabilities */
174#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
175#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
176#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
177#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
178#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
179#define AC_WCAP_STRIPE (1<<5) /* stripe */
180#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
181#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
182#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
183#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
184#define AC_WCAP_POWER (1<<10) /* power control */
185#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
955d2488
TI
186#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
187#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
1da177e4
LT
188#define AC_WCAP_DELAY (0xf<<16)
189#define AC_WCAP_DELAY_SHIFT 16
190#define AC_WCAP_TYPE (0xf<<20)
191#define AC_WCAP_TYPE_SHIFT 20
192
193/* supported PCM rates and bits */
194#define AC_SUPPCM_RATES (0xfff << 0)
195#define AC_SUPPCM_BITS_8 (1<<16)
196#define AC_SUPPCM_BITS_16 (1<<17)
197#define AC_SUPPCM_BITS_20 (1<<18)
198#define AC_SUPPCM_BITS_24 (1<<19)
199#define AC_SUPPCM_BITS_32 (1<<20)
200
201/* supported PCM stream format */
202#define AC_SUPFMT_PCM (1<<0)
203#define AC_SUPFMT_FLOAT32 (1<<1)
204#define AC_SUPFMT_AC3 (1<<2)
205
797760ab
AP
206/* GP I/O count */
207#define AC_GPIO_IO_COUNT (0xff<<0)
208#define AC_GPIO_O_COUNT (0xff<<8)
209#define AC_GPIO_O_COUNT_SHIFT 8
210#define AC_GPIO_I_COUNT (0xff<<16)
211#define AC_GPIO_I_COUNT_SHIFT 16
212#define AC_GPIO_UNSOLICITED (1<<30)
213#define AC_GPIO_WAKE (1<<31)
214
215/* Converter stream, channel */
216#define AC_CONV_CHANNEL (0xf<<0)
217#define AC_CONV_STREAM (0xf<<4)
218#define AC_CONV_STREAM_SHIFT 4
219
220/* Input converter SDI select */
221#define AC_SDI_SELECT (0xf<<0)
222
92f10b3f
TI
223/* stream format id */
224#define AC_FMT_CHAN_SHIFT 0
225#define AC_FMT_CHAN_MASK (0x0f << 0)
226#define AC_FMT_BITS_SHIFT 4
227#define AC_FMT_BITS_MASK (7 << 4)
228#define AC_FMT_BITS_8 (0 << 4)
229#define AC_FMT_BITS_16 (1 << 4)
230#define AC_FMT_BITS_20 (2 << 4)
231#define AC_FMT_BITS_24 (3 << 4)
232#define AC_FMT_BITS_32 (4 << 4)
233#define AC_FMT_DIV_SHIFT 8
234#define AC_FMT_DIV_MASK (7 << 8)
235#define AC_FMT_MULT_SHIFT 11
236#define AC_FMT_MULT_MASK (7 << 11)
237#define AC_FMT_BASE_SHIFT 14
238#define AC_FMT_BASE_48K (0 << 14)
239#define AC_FMT_BASE_44K (1 << 14)
240#define AC_FMT_TYPE_SHIFT 15
241#define AC_FMT_TYPE_PCM (0 << 15)
242#define AC_FMT_TYPE_NON_PCM (1 << 15)
243
955d2488 244/* Unsolicited response control */
797760ab
AP
245#define AC_UNSOL_TAG (0x3f<<0)
246#define AC_UNSOL_ENABLED (1<<7)
955d2488
TI
247#define AC_USRSP_EN AC_UNSOL_ENABLED
248
249/* Unsolicited responses */
250#define AC_UNSOL_RES_TAG (0x3f<<26)
251#define AC_UNSOL_RES_TAG_SHIFT 26
252#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
253#define AC_UNSOL_RES_SUBTAG_SHIFT 21
254#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
255#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
256#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
257#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
797760ab 258
1da177e4
LT
259/* Pin widget capabilies */
260#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
261#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
262#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
263#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
264#define AC_PINCAP_OUT (1<<4) /* output capable */
265#define AC_PINCAP_IN (1<<5) /* input capable */
266#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
3982d17e
AP
267/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
268 * but is marked reserved in the Intel HDA specification.
269 */
270#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
955d2488
TI
271/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
272 * in HD-audio specification
273 */
274#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
728765b3
WF
275#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
276 * coexist with AC_PINCAP_HDMI
277 */
1a12de1e 278#define AC_PINCAP_VREF (0x37<<8)
1da177e4
LT
279#define AC_PINCAP_VREF_SHIFT 8
280#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
b923528e 281#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
1a12de1e
M
282/* Vref status (used in pin cap) */
283#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
284#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
285#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
286#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
287#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
1da177e4
LT
288
289/* Amplifier capabilities */
290#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
291#define AC_AMPCAP_OFFSET_SHIFT 0
292#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
293#define AC_AMPCAP_NUM_STEPS_SHIFT 8
d01ce99f
TI
294#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
295 * in 0.25dB
296 */
1da177e4
LT
297#define AC_AMPCAP_STEP_SIZE_SHIFT 16
298#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
299#define AC_AMPCAP_MUTE_SHIFT 31
300
301/* Connection list */
302#define AC_CLIST_LENGTH (0x7f<<0)
303#define AC_CLIST_LONG (1<<7)
304
305/* Supported power status */
306#define AC_PWRST_D0SUP (1<<0)
307#define AC_PWRST_D1SUP (1<<1)
308#define AC_PWRST_D2SUP (1<<2)
309#define AC_PWRST_D3SUP (1<<3)
83d605fd
WF
310#define AC_PWRST_D3COLDSUP (1<<4)
311#define AC_PWRST_S3D3COLDSUP (1<<29)
312#define AC_PWRST_CLKSTOP (1<<30)
313#define AC_PWRST_EPSS (1U<<31)
1da177e4 314
54d17403 315/* Power state values */
797760ab
AP
316#define AC_PWRST_SETTING (0xf<<0)
317#define AC_PWRST_ACTUAL (0xf<<4)
318#define AC_PWRST_ACTUAL_SHIFT 4
54d17403
TI
319#define AC_PWRST_D0 0x00
320#define AC_PWRST_D1 0x01
321#define AC_PWRST_D2 0x02
322#define AC_PWRST_D3 0x03
323
1da177e4
LT
324/* Processing capabilies */
325#define AC_PCAP_BENIGN (1<<0)
326#define AC_PCAP_NUM_COEF (0xff<<8)
797760ab 327#define AC_PCAP_NUM_COEF_SHIFT 8
1da177e4
LT
328
329/* Volume knobs capabilities */
330#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
38fcaf8e 331#define AC_KNBCAP_DELTA (1<<7)
1da177e4 332
955d2488
TI
333/* HDMI LPCM capabilities */
334#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
335#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
336#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
337#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
338#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
339#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
340#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
341#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
342#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
343#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
344#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
345#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
346#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
347#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
348
1da177e4
LT
349/*
350 * Control Parameters
351 */
352
353/* Amp gain/mute */
d427c77e 354#define AC_AMP_MUTE (1<<7)
1da177e4
LT
355#define AC_AMP_GAIN (0x7f)
356#define AC_AMP_GET_INDEX (0xf<<0)
357
358#define AC_AMP_GET_LEFT (1<<13)
359#define AC_AMP_GET_RIGHT (0<<13)
360#define AC_AMP_GET_OUTPUT (1<<15)
361#define AC_AMP_GET_INPUT (0<<15)
362
363#define AC_AMP_SET_INDEX (0xf<<8)
364#define AC_AMP_SET_INDEX_SHIFT 8
365#define AC_AMP_SET_RIGHT (1<<12)
366#define AC_AMP_SET_LEFT (1<<13)
367#define AC_AMP_SET_INPUT (1<<14)
368#define AC_AMP_SET_OUTPUT (1<<15)
369
370/* DIGITAL1 bits */
371#define AC_DIG1_ENABLE (1<<0)
372#define AC_DIG1_V (1<<1)
373#define AC_DIG1_VCFG (1<<2)
374#define AC_DIG1_EMPHASIS (1<<3)
375#define AC_DIG1_COPYRIGHT (1<<4)
376#define AC_DIG1_NONAUDIO (1<<5)
377#define AC_DIG1_PROFESSIONAL (1<<6)
378#define AC_DIG1_LEVEL (1<<7)
379
797760ab
AP
380/* DIGITAL2 bits */
381#define AC_DIG2_CC (0x7f<<0)
382
1da177e4 383/* Pin widget control - 8bit */
ea87d1c4
AH
384#define AC_PINCTL_EPT (0x3<<0)
385#define AC_PINCTL_EPT_NATIVE 0
386#define AC_PINCTL_EPT_HBR 3
1da177e4 387#define AC_PINCTL_VREFEN (0x7<<0)
98f759a6
TI
388#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
389#define AC_PINCTL_VREF_50 1 /* 50% */
390#define AC_PINCTL_VREF_GRD 2 /* ground */
391#define AC_PINCTL_VREF_80 4 /* 80% */
392#define AC_PINCTL_VREF_100 5 /* 100% */
1da177e4
LT
393#define AC_PINCTL_IN_EN (1<<5)
394#define AC_PINCTL_OUT_EN (1<<6)
395#define AC_PINCTL_HP_EN (1<<7)
396
797760ab
AP
397/* Pin sense - 32bit */
398#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
399#define AC_PINSENSE_PRESENCE (1<<31)
955d2488 400#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
797760ab
AP
401
402/* EAPD/BTL enable - 32bit */
403#define AC_EAPDBTL_BALANCED (1<<0)
404#define AC_EAPDBTL_EAPD (1<<1)
405#define AC_EAPDBTL_LR_SWAP (1<<2)
406
955d2488
TI
407/* HDMI ELD data */
408#define AC_ELDD_ELD_VALID (1<<31)
409#define AC_ELDD_ELD_DATA 0xff
410
411/* HDMI DIP size */
412#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
413#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
414
415/* HDMI DIP index */
416#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
417#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
418
419/* HDMI DIP xmit (transmit) control */
420#define AC_DIPXMIT_MASK (0x3<<6)
421#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
422#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
423#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
424
425/* HDMI content protection (CP) control */
426#define AC_CPCTRL_CES (1<<9) /* current encryption state */
427#define AC_CPCTRL_READY (1<<8) /* ready bit */
428#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
429#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
430
431/* Converter channel <-> HDMI slot mapping */
432#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
433#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
434
1da177e4
LT
435/* configuration default - 32bit */
436#define AC_DEFCFG_SEQUENCE (0xf<<0)
437#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
d21b37ea 438#define AC_DEFCFG_ASSOC_SHIFT 4
1da177e4 439#define AC_DEFCFG_MISC (0xf<<8)
d21b37ea 440#define AC_DEFCFG_MISC_SHIFT 8
797760ab 441#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
1da177e4
LT
442#define AC_DEFCFG_COLOR (0xf<<12)
443#define AC_DEFCFG_COLOR_SHIFT 12
444#define AC_DEFCFG_CONN_TYPE (0xf<<16)
445#define AC_DEFCFG_CONN_TYPE_SHIFT 16
446#define AC_DEFCFG_DEVICE (0xf<<20)
447#define AC_DEFCFG_DEVICE_SHIFT 20
448#define AC_DEFCFG_LOCATION (0x3f<<24)
449#define AC_DEFCFG_LOCATION_SHIFT 24
450#define AC_DEFCFG_PORT_CONN (0x3<<30)
451#define AC_DEFCFG_PORT_CONN_SHIFT 30
452
453/* device device types (0x0-0xf) */
454enum {
455 AC_JACK_LINE_OUT,
456 AC_JACK_SPEAKER,
457 AC_JACK_HP_OUT,
458 AC_JACK_CD,
459 AC_JACK_SPDIF_OUT,
460 AC_JACK_DIG_OTHER_OUT,
461 AC_JACK_MODEM_LINE_SIDE,
462 AC_JACK_MODEM_HAND_SIDE,
463 AC_JACK_LINE_IN,
464 AC_JACK_AUX,
465 AC_JACK_MIC_IN,
466 AC_JACK_TELEPHONY,
467 AC_JACK_SPDIF_IN,
468 AC_JACK_DIG_OTHER_IN,
469 AC_JACK_OTHER = 0xf,
470};
471
472/* jack connection types (0x0-0xf) */
473enum {
474 AC_JACK_CONN_UNKNOWN,
475 AC_JACK_CONN_1_8,
476 AC_JACK_CONN_1_4,
477 AC_JACK_CONN_ATAPI,
478 AC_JACK_CONN_RCA,
479 AC_JACK_CONN_OPTICAL,
480 AC_JACK_CONN_OTHER_DIGITAL,
481 AC_JACK_CONN_OTHER_ANALOG,
482 AC_JACK_CONN_DIN,
483 AC_JACK_CONN_XLR,
484 AC_JACK_CONN_RJ11,
485 AC_JACK_CONN_COMB,
486 AC_JACK_CONN_OTHER = 0xf,
487};
488
489/* jack colors (0x0-0xf) */
490enum {
491 AC_JACK_COLOR_UNKNOWN,
492 AC_JACK_COLOR_BLACK,
493 AC_JACK_COLOR_GREY,
494 AC_JACK_COLOR_BLUE,
495 AC_JACK_COLOR_GREEN,
496 AC_JACK_COLOR_RED,
497 AC_JACK_COLOR_ORANGE,
498 AC_JACK_COLOR_YELLOW,
499 AC_JACK_COLOR_PURPLE,
500 AC_JACK_COLOR_PINK,
501 AC_JACK_COLOR_WHITE = 0xe,
502 AC_JACK_COLOR_OTHER,
503};
504
505/* Jack location (0x0-0x3f) */
506/* common case */
507enum {
508 AC_JACK_LOC_NONE,
509 AC_JACK_LOC_REAR,
510 AC_JACK_LOC_FRONT,
511 AC_JACK_LOC_LEFT,
512 AC_JACK_LOC_RIGHT,
513 AC_JACK_LOC_TOP,
514 AC_JACK_LOC_BOTTOM,
515};
516/* bits 4-5 */
517enum {
518 AC_JACK_LOC_EXTERNAL = 0x00,
519 AC_JACK_LOC_INTERNAL = 0x10,
520 AC_JACK_LOC_SEPARATE = 0x20,
521 AC_JACK_LOC_OTHER = 0x30,
522};
523enum {
524 /* external on primary chasis */
525 AC_JACK_LOC_REAR_PANEL = 0x07,
526 AC_JACK_LOC_DRIVE_BAY,
527 /* internal */
528 AC_JACK_LOC_RISER = 0x17,
529 AC_JACK_LOC_HDMI,
530 AC_JACK_LOC_ATAPI,
531 /* others */
532 AC_JACK_LOC_MOBILE_IN = 0x37,
533 AC_JACK_LOC_MOBILE_OUT,
534};
535
536/* Port connectivity (0-3) */
537enum {
538 AC_JACK_PORT_COMPLEX,
539 AC_JACK_PORT_NONE,
540 AC_JACK_PORT_FIXED,
541 AC_JACK_PORT_BOTH,
542};
543
544/* max. connections to a widget */
54d17403 545#define HDA_MAX_CONNECTIONS 32
1da177e4
LT
546
547/* max. codec address */
548#define HDA_MAX_CODEC_ADDRESS 0x0f
549
b2e18597
TI
550/*
551 * generic arrays
552 */
553struct snd_array {
554 unsigned int used;
555 unsigned int alloced;
556 unsigned int elem_size;
557 unsigned int alloc_align;
558 void *list;
559};
560
561void *snd_array_new(struct snd_array *array);
562void snd_array_free(struct snd_array *array);
563static inline void snd_array_init(struct snd_array *array, unsigned int size,
564 unsigned int align)
565{
566 array->elem_size = size;
567 array->alloc_align = align;
568}
569
f43aa025
TI
570static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
571{
572 return array->list + idx * array->elem_size;
573}
574
575static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
576{
577 return (unsigned long)(ptr - array->list) / array->elem_size;
578}
579
1da177e4
LT
580/*
581 * Structures
582 */
583
584struct hda_bus;
1cd2224c 585struct hda_beep;
1da177e4
LT
586struct hda_codec;
587struct hda_pcm;
588struct hda_pcm_stream;
589struct hda_bus_unsolicited;
590
591/* NID type */
592typedef u16 hda_nid_t;
593
594/* bus operators */
595struct hda_bus_ops {
596 /* send a single command */
33fa35ed 597 int (*command)(struct hda_bus *bus, unsigned int cmd);
1da177e4 598 /* get a response from the last command */
deadff16 599 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
1da177e4
LT
600 /* free the private data */
601 void (*private_free)(struct hda_bus *);
176d5335 602 /* attach a PCM stream */
33fa35ed
TI
603 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
604 struct hda_pcm *pcm);
8dd78330
TI
605 /* reset bus for retry verb */
606 void (*bus_reset)(struct hda_bus *bus);
cb53c626 607#ifdef CONFIG_SND_HDA_POWER_SAVE
561de31a 608 /* notify power-up/down from codec to controller */
33fa35ed 609 void (*pm_notify)(struct hda_bus *bus);
cb53c626 610#endif
1da177e4
LT
611};
612
613/* template to pass to the bus constructor */
614struct hda_bus_template {
615 void *private_data;
616 struct pci_dev *pci;
617 const char *modelname;
fee2fba3 618 int *power_save;
1da177e4
LT
619 struct hda_bus_ops ops;
620};
621
622/*
623 * codec bus
624 *
625 * each controller needs to creata a hda_bus to assign the accessor.
626 * A hda_bus contains several codecs in the list codec_list.
627 */
628struct hda_bus {
c8b6bf9b 629 struct snd_card *card;
1da177e4
LT
630
631 /* copied from template */
632 void *private_data;
633 struct pci_dev *pci;
634 const char *modelname;
fee2fba3 635 int *power_save;
1da177e4
LT
636 struct hda_bus_ops ops;
637
638 /* codec linked list */
639 struct list_head codec_list;
d01ce99f
TI
640 /* link caddr -> codec */
641 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
1da177e4 642
62932df8 643 struct mutex cmd_mutex;
3f50ac6a 644 struct mutex prepare_mutex;
1da177e4
LT
645
646 /* unsolicited event queue */
647 struct hda_bus_unsolicited *unsol;
e8c0ee5d 648 char workq_name[16];
6acaed38 649 struct workqueue_struct *workq; /* common workqueue for codecs */
1da177e4 650
529bd6c4
TI
651 /* assigned PCMs */
652 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
653
52987656
TI
654 /* misc op flags */
655 unsigned int needs_damn_long_delay :1;
b20f3b83
TI
656 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
657 unsigned int sync_write:1; /* sync after verb write */
658 /* status for codec/controller */
b94d3539 659 unsigned int shutdown :1; /* being unloaded */
b613291f 660 unsigned int rirb_error:1; /* error in codec communication */
8dd78330
TI
661 unsigned int response_reset:1; /* controller was reset */
662 unsigned int in_reset:1; /* during reset operation */
0287d970 663 unsigned int power_keep_link_on:1; /* don't power off HDA link */
1da177e4
LT
664};
665
666/*
667 * codec preset
668 *
669 * Known codecs have the patch to build and set up the controls/PCMs
670 * better than the generic parser.
671 */
672struct hda_codec_preset {
673 unsigned int id;
674 unsigned int mask;
675 unsigned int subs;
676 unsigned int subs_mask;
677 unsigned int rev;
ca7cfae9 678 hda_nid_t afg, mfg;
1da177e4
LT
679 const char *name;
680 int (*patch)(struct hda_codec *codec);
681};
682
1289e9e8
TI
683struct hda_codec_preset_list {
684 const struct hda_codec_preset *preset;
685 struct module *owner;
686 struct list_head list;
687};
688
689/* initial hook */
690int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
691int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
692
1da177e4
LT
693/* ops set by the preset patch */
694struct hda_codec_ops {
695 int (*build_controls)(struct hda_codec *codec);
696 int (*build_pcms)(struct hda_codec *codec);
697 int (*init)(struct hda_codec *codec);
698 void (*free)(struct hda_codec *codec);
699 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
4d7fbdbc
TI
700 void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
701 unsigned int power_state);
2a43952a 702#ifdef CONFIG_PM
1da177e4 703 int (*suspend)(struct hda_codec *codec, pm_message_t state);
e581f3db 704 int (*post_suspend)(struct hda_codec *codec);
2a43952a 705 int (*pre_resume)(struct hda_codec *codec);
1da177e4
LT
706 int (*resume)(struct hda_codec *codec);
707#endif
cb53c626
TI
708#ifdef CONFIG_SND_HDA_POWER_SAVE
709 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
710#endif
fb8d1a34 711 void (*reboot_notify)(struct hda_codec *codec);
1da177e4
LT
712};
713
714/* record for amp information cache */
01751f54 715struct hda_cache_head {
1da177e4 716 u32 key; /* hash key */
01751f54
TI
717 u16 val; /* assigned value */
718 u16 next; /* next link; -1 = terminal */
719};
720
721struct hda_amp_info {
722 struct hda_cache_head head;
1da177e4 723 u32 amp_caps; /* amp capabilities */
7f0e2f8b 724 u16 vol[2]; /* current volume & mute */
01751f54
TI
725};
726
727struct hda_cache_rec {
728 u16 hash[64]; /* hash table for index */
603c4019 729 struct snd_array buf; /* record entries */
1da177e4
LT
730};
731
732/* PCM callbacks */
733struct hda_pcm_ops {
734 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 735 struct snd_pcm_substream *substream);
1da177e4 736 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 737 struct snd_pcm_substream *substream);
1da177e4
LT
738 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
739 unsigned int stream_tag, unsigned int format,
c8b6bf9b 740 struct snd_pcm_substream *substream);
1da177e4 741 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 742 struct snd_pcm_substream *substream);
1da177e4
LT
743};
744
745/* PCM information for each substream */
746struct hda_pcm_stream {
d01ce99f 747 unsigned int substreams; /* number of substreams, 0 = not exist*/
1da177e4
LT
748 unsigned int channels_min; /* min. number of channels */
749 unsigned int channels_max; /* max. number of channels */
750 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
751 u32 rates; /* supported rates */
752 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
753 unsigned int maxbps; /* supported max. bit per sample */
754 struct hda_pcm_ops ops;
755};
756
7ba72ba1
TI
757/* PCM types */
758enum {
759 HDA_PCM_TYPE_AUDIO,
760 HDA_PCM_TYPE_SPDIF,
761 HDA_PCM_TYPE_HDMI,
762 HDA_PCM_TYPE_MODEM,
763 HDA_PCM_NTYPES
764};
765
1da177e4
LT
766/* for PCM creation */
767struct hda_pcm {
768 char *name;
769 struct hda_pcm_stream stream[2];
7ba72ba1 770 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
176d5335
TI
771 int device; /* device number to assign */
772 struct snd_pcm *pcm; /* assigned PCM instance */
1da177e4
LT
773};
774
775/* codec information */
776struct hda_codec {
777 struct hda_bus *bus;
778 unsigned int addr; /* codec addr*/
779 struct list_head list; /* list point */
780
781 hda_nid_t afg; /* AFG node id */
673b683a 782 hda_nid_t mfg; /* MFG node id */
1da177e4
LT
783
784 /* ids */
79c944ad
JK
785 u8 afg_function_id;
786 u8 mfg_function_id;
787 u8 afg_unsol;
788 u8 mfg_unsol;
1da177e4
LT
789 u32 vendor_id;
790 u32 subsystem_id;
791 u32 revision_id;
792
793 /* detected preset */
794 const struct hda_codec_preset *preset;
1289e9e8 795 struct module *owner;
812a2cca
TI
796 const char *vendor_name; /* codec vendor name */
797 const char *chip_name; /* codec chip name */
f44ac837 798 const char *modelname; /* model name for preset */
1da177e4
LT
799
800 /* set by patch */
801 struct hda_codec_ops patch_ops;
802
1da177e4
LT
803 /* PCM to create, set by patch_ops.build_pcms callback */
804 unsigned int num_pcms;
805 struct hda_pcm *pcm_info;
806
807 /* codec specific info */
808 void *spec;
809
1cd2224c
MR
810 /* beep device */
811 struct hda_beep *beep;
2dca0bba 812 unsigned int beep_mode;
1cd2224c 813
54d17403
TI
814 /* widget capabilities cache */
815 unsigned int num_nodes;
816 hda_nid_t start_nid;
817 u32 *wcaps;
818
d13bd412 819 struct snd_array mixers; /* list of assigned mixer elements */
5b0cb1d8 820 struct snd_array nids; /* list of mapped mixer elements */
d13bd412 821
01751f54 822 struct hda_cache_rec amp_cache; /* cache for amp access */
b3ac5636 823 struct hda_cache_rec cmd_cache; /* cache for other commands */
1da177e4 824
a12d3e1e
TI
825 struct snd_array conn_lists; /* connection-list array */
826
62932df8 827 struct mutex spdif_mutex;
5a9e02e9 828 struct mutex control_mutex;
7c935976 829 struct snd_array spdif_out;
1da177e4 830 unsigned int spdif_in_enable; /* SPDIF input enable? */
dda14410 831 const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
3be14149 832 struct snd_array init_pins; /* initial (BIOS) pin configurations */
346ff70f 833 struct snd_array driver_pins; /* pin configs set by codec parser */
eb541337 834 struct snd_array cvt_setups; /* audio convert setups */
2807314d 835
11aeff08 836#ifdef CONFIG_SND_HDA_HWDEP
2807314d 837 struct snd_hwdep *hwdep; /* assigned hwdep device */
11aeff08 838 struct snd_array init_verbs; /* additional init verbs */
1e1be432 839 struct snd_array hints; /* additional hints */
346ff70f 840 struct snd_array user_pins; /* default pin configs to override */
11aeff08 841#endif
cb53c626 842
963f803f
TI
843 /* misc flags */
844 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
845 * status change
846 * (e.g. Realtek codecs)
847 */
9421f954
TI
848 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
849 * (e.g. Conexant codecs)
850 */
0e7adbe2 851 unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
ac0547dc 852 unsigned int pins_shutup:1; /* pins are shut up */
729d55ba 853 unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
2f451d2a 854 unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */
cb53c626 855#ifdef CONFIG_SND_HDA_POWER_SAVE
a221e287
TI
856 unsigned int power_on :1; /* current (global) power-state */
857 unsigned int power_transition :1; /* power-state in transition */
cb53c626
TI
858 int power_count; /* current (global) power refcount */
859 struct delayed_work power_work; /* delayed task for powerdown */
a2f6309e
TI
860 unsigned long power_on_acct;
861 unsigned long power_off_acct;
862 unsigned long power_jiffies;
cb53c626 863#endif
daead538
TI
864
865 /* codec-specific additional proc output */
866 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
867 struct hda_codec *codec, hda_nid_t nid);
cd372fb3 868
1835a0f9
TI
869 /* jack detection */
870 struct snd_array jacktbl;
871
cd372fb3
TI
872#ifdef CONFIG_SND_HDA_INPUT_JACK
873 /* jack detection */
874 struct snd_array jacks;
875#endif
1da177e4
LT
876};
877
878/* direction */
879enum {
880 HDA_INPUT, HDA_OUTPUT
881};
882
883
884/*
885 * constructors
886 */
c8b6bf9b 887int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
1da177e4
LT
888 struct hda_bus **busp);
889int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
a1e21c90
TI
890 struct hda_codec **codecp);
891int snd_hda_codec_configure(struct hda_codec *codec);
1da177e4
LT
892
893/*
894 * low level functions
895 */
d01ce99f
TI
896unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
897 int direct,
1da177e4
LT
898 unsigned int verb, unsigned int parm);
899int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
900 unsigned int verb, unsigned int parm);
d01ce99f
TI
901#define snd_hda_param_read(codec, nid, param) \
902 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
903int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
904 hda_nid_t *start_id);
905int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
906 hda_nid_t *conn_list, int max_conns);
9e7717c9
TI
907int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
908 hda_nid_t *conn_list, int max_conns);
dce2079b
TI
909int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
910 const hda_nid_t **listp);
b2f934a0
TI
911int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
912 const hda_nid_t *list);
8d087c76
TI
913int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
914 hda_nid_t nid, int recursive);
384a48d7
SW
915int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
916 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
1da177e4
LT
917
918struct hda_verb {
919 hda_nid_t nid;
920 u32 verb;
921 u32 param;
922};
923
d01ce99f
TI
924void snd_hda_sequence_write(struct hda_codec *codec,
925 const struct hda_verb *seq);
1da177e4
LT
926
927/* unsolicited event */
928int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
929
b3ac5636 930/* cached write */
2a43952a 931#ifdef CONFIG_PM
b3ac5636
TI
932int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
933 int direct, unsigned int verb, unsigned int parm);
934void snd_hda_sequence_write_cache(struct hda_codec *codec,
935 const struct hda_verb *seq);
a68d5a54
TI
936int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
937 int direct, unsigned int verb, unsigned int parm);
b3ac5636 938void snd_hda_codec_resume_cache(struct hda_codec *codec);
82beb8fd
TI
939#else
940#define snd_hda_codec_write_cache snd_hda_codec_write
a68d5a54 941#define snd_hda_codec_update_cache snd_hda_codec_write
82beb8fd
TI
942#define snd_hda_sequence_write_cache snd_hda_sequence_write
943#endif
b3ac5636 944
3be14149
TI
945/* the struct for codec->pin_configs */
946struct hda_pincfg {
947 hda_nid_t nid;
ac0547dc
TI
948 unsigned char ctrl; /* current pin control value */
949 unsigned char pad; /* reserved */
950 unsigned int cfg; /* default configuration */
3be14149
TI
951};
952
953unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
954int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
955 unsigned int cfg);
956int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
957 hda_nid_t nid, unsigned int cfg); /* for hwdep */
92ee6162 958void snd_hda_shutup_pins(struct hda_codec *codec);
3be14149 959
7c935976
SW
960/* SPDIF controls */
961struct hda_spdif_out {
962 hda_nid_t nid; /* Converter nid values relate to */
963 unsigned int status; /* IEC958 status bits */
964 unsigned short ctls; /* SPDIF control bits */
965};
966struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
967 hda_nid_t nid);
74b654c9
SW
968void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
969void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
7c935976 970
1da177e4
LT
971/*
972 * Mixer
973 */
974int snd_hda_build_controls(struct hda_bus *bus);
6c1f45ea 975int snd_hda_codec_build_controls(struct hda_codec *codec);
1da177e4
LT
976
977/*
978 * PCM
979 */
980int snd_hda_build_pcms(struct hda_bus *bus);
529bd6c4 981int snd_hda_codec_build_pcms(struct hda_codec *codec);
eb541337
TI
982
983int snd_hda_codec_prepare(struct hda_codec *codec,
984 struct hda_pcm_stream *hinfo,
985 unsigned int stream,
986 unsigned int format,
987 struct snd_pcm_substream *substream);
988void snd_hda_codec_cleanup(struct hda_codec *codec,
989 struct hda_pcm_stream *hinfo,
990 struct snd_pcm_substream *substream);
991
d01ce99f
TI
992void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
993 u32 stream_tag,
1da177e4 994 int channel_id, int format);
f0cea797
TI
995void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
996 int do_now);
997#define snd_hda_codec_cleanup_stream(codec, nid) \
998 __snd_hda_codec_cleanup_stream(codec, nid, 0)
d01ce99f
TI
999unsigned int snd_hda_calc_stream_format(unsigned int rate,
1000 unsigned int channels,
1001 unsigned int format,
32c168c8
AH
1002 unsigned int maxbps,
1003 unsigned short spdif_ctls);
1da177e4
LT
1004int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
1005 unsigned int format);
1006
1007/*
1008 * Misc
1009 */
1010void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
fb8d1a34 1011void snd_hda_bus_reboot_notify(struct hda_bus *bus);
4d7fbdbc
TI
1012void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
1013 unsigned int power_state,
1014 bool eapd_workaround);
1da177e4
LT
1015
1016/*
1017 * power management
1018 */
1019#ifdef CONFIG_PM
8dd78330 1020int snd_hda_suspend(struct hda_bus *bus);
1da177e4
LT
1021int snd_hda_resume(struct hda_bus *bus);
1022#endif
1023
9e5341b9
TI
1024static inline
1025int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1026{
ff2b7e2a 1027#ifdef CONFIG_SND_HDA_POWER_SAVE
9e5341b9
TI
1028 if (codec->patch_ops.check_power_status)
1029 return codec->patch_ops.check_power_status(codec, nid);
ff2b7e2a 1030#endif
9e5341b9
TI
1031 return 0;
1032}
9e5341b9 1033
50a9f790
MR
1034/*
1035 * get widget information
1036 */
1037const char *snd_hda_get_jack_connectivity(u32 cfg);
1038const char *snd_hda_get_jack_type(u32 cfg);
1039const char *snd_hda_get_jack_location(u32 cfg);
1040
cb53c626
TI
1041/*
1042 * power saving
1043 */
1044#ifdef CONFIG_SND_HDA_POWER_SAVE
1045void snd_hda_power_up(struct hda_codec *codec);
1046void snd_hda_power_down(struct hda_codec *codec);
d804ad92 1047#define snd_hda_codec_needs_resume(codec) codec->power_count
a2f6309e 1048void snd_hda_update_power_acct(struct hda_codec *codec);
cb53c626
TI
1049#else
1050static inline void snd_hda_power_up(struct hda_codec *codec) {}
1051static inline void snd_hda_power_down(struct hda_codec *codec) {}
d804ad92 1052#define snd_hda_codec_needs_resume(codec) 1
cb53c626
TI
1053#endif
1054
4ea6fbc8
TI
1055#ifdef CONFIG_SND_HDA_PATCH_LOADER
1056/*
1057 * patch firmware
1058 */
1059int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
1060#endif
1061
ff7a3267
TI
1062/*
1063 * Codec modularization
1064 */
1065
1066/* Export symbols only for communication with codec drivers;
1067 * When built in kernel, all HD-audio drivers are supposed to be statically
1068 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
1069 * exported unless it's built as a module.
1070 */
1071#ifdef MODULE
1072#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1073#else
1074#define EXPORT_SYMBOL_HDA(sym)
1075#endif
1076
1da177e4 1077#endif /* __SOUND_HDA_CODEC_H */
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