ALSA: hda - Add sysfs entries to hwdep devices
[deliverable/linux.git] / sound / pci / hda / hda_codec.h
CommitLineData
1da177e4
LT
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __SOUND_HDA_CODEC_H
22#define __SOUND_HDA_CODEC_H
23
24#include <sound/info.h>
25#include <sound/control.h>
26#include <sound/pcm.h>
2807314d 27#include <sound/hwdep.h>
1da177e4 28
cb53c626
TI
29#if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
30#define SND_HDA_NEEDS_RESUME /* resume control code is required */
31#endif
32
1da177e4
LT
33/*
34 * nodes
35 */
36#define AC_NODE_ROOT 0x00
37
38/*
39 * function group types
40 */
41enum {
42 AC_GRP_AUDIO_FUNCTION = 0x01,
43 AC_GRP_MODEM_FUNCTION = 0x02,
44};
45
46/*
47 * widget types
48 */
49enum {
50 AC_WID_AUD_OUT, /* Audio Out */
51 AC_WID_AUD_IN, /* Audio In */
52 AC_WID_AUD_MIX, /* Audio Mixer */
53 AC_WID_AUD_SEL, /* Audio Selector */
54 AC_WID_PIN, /* Pin Complex */
55 AC_WID_POWER, /* Power */
56 AC_WID_VOL_KNB, /* Volume Knob */
57 AC_WID_BEEP, /* Beep Generator */
58 AC_WID_VENDOR = 0x0f /* Vendor specific */
59};
60
61/*
62 * GET verbs
63 */
64#define AC_VERB_GET_STREAM_FORMAT 0x0a00
65#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
66#define AC_VERB_GET_PROC_COEF 0x0c00
67#define AC_VERB_GET_COEF_INDEX 0x0d00
68#define AC_VERB_PARAMETERS 0x0f00
69#define AC_VERB_GET_CONNECT_SEL 0x0f01
70#define AC_VERB_GET_CONNECT_LIST 0x0f02
71#define AC_VERB_GET_PROC_STATE 0x0f03
72#define AC_VERB_GET_SDI_SELECT 0x0f04
73#define AC_VERB_GET_POWER_STATE 0x0f05
74#define AC_VERB_GET_CONV 0x0f06
75#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
76#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
77#define AC_VERB_GET_PIN_SENSE 0x0f09
78#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
79#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
3982d17e 80#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
a1855d80 81#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
1da177e4
LT
82#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
83/* f10-f1a: GPIO */
16ded525
TI
84#define AC_VERB_GET_GPIO_DATA 0x0f15
85#define AC_VERB_GET_GPIO_MASK 0x0f16
86#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
797760ab 87#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
3982d17e 88#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
797760ab 89#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
1da177e4 90#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
86284e45
TI
91/* f20: AFG/MFG */
92#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
955d2488
TI
93#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
94#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
95#define AC_VERB_GET_HDMI_ELDD 0x0f2f
96#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
97#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
98#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
99#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
100#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
1da177e4
LT
101
102/*
103 * SET verbs
104 */
105#define AC_VERB_SET_STREAM_FORMAT 0x200
106#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
107#define AC_VERB_SET_PROC_COEF 0x400
108#define AC_VERB_SET_COEF_INDEX 0x500
109#define AC_VERB_SET_CONNECT_SEL 0x701
110#define AC_VERB_SET_PROC_STATE 0x703
111#define AC_VERB_SET_SDI_SELECT 0x704
112#define AC_VERB_SET_POWER_STATE 0x705
113#define AC_VERB_SET_CHANNEL_STREAMID 0x706
114#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
115#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
116#define AC_VERB_SET_PIN_SENSE 0x709
117#define AC_VERB_SET_BEEP_CONTROL 0x70a
a2a20939 118#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
1da177e4
LT
119#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
120#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
121#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
16ded525
TI
122#define AC_VERB_SET_GPIO_DATA 0x715
123#define AC_VERB_SET_GPIO_MASK 0x716
124#define AC_VERB_SET_GPIO_DIRECTION 0x717
797760ab 125#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
3982d17e 126#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
797760ab 127#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
1da177e4
LT
128#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
129#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
130#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
131#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
d0513fc6 132#define AC_VERB_SET_EAPD 0x788
1da177e4 133#define AC_VERB_SET_CODEC_RESET 0x7ff
955d2488
TI
134#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
135#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
136#define AC_VERB_SET_HDMI_DIP_DATA 0x731
137#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
138#define AC_VERB_SET_HDMI_CP_CTRL 0x733
139#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
1da177e4
LT
140
141/*
142 * Parameter IDs
143 */
144#define AC_PAR_VENDOR_ID 0x00
145#define AC_PAR_SUBSYSTEM_ID 0x01
146#define AC_PAR_REV_ID 0x02
147#define AC_PAR_NODE_COUNT 0x04
148#define AC_PAR_FUNCTION_TYPE 0x05
149#define AC_PAR_AUDIO_FG_CAP 0x08
150#define AC_PAR_AUDIO_WIDGET_CAP 0x09
151#define AC_PAR_PCM 0x0a
152#define AC_PAR_STREAM 0x0b
153#define AC_PAR_PIN_CAP 0x0c
154#define AC_PAR_AMP_IN_CAP 0x0d
155#define AC_PAR_CONNLIST_LEN 0x0e
156#define AC_PAR_POWER_STATE 0x0f
157#define AC_PAR_PROC_CAP 0x10
158#define AC_PAR_GPIO_CAP 0x11
159#define AC_PAR_AMP_OUT_CAP 0x12
e1716139 160#define AC_PAR_VOL_KNB_CAP 0x13
955d2488 161#define AC_PAR_HDMI_LPCM_CAP 0x20
1da177e4
LT
162
163/*
164 * AC_VERB_PARAMETERS results (32bit)
165 */
166
167/* Function Group Type */
168#define AC_FGT_TYPE (0xff<<0)
169#define AC_FGT_TYPE_SHIFT 0
170#define AC_FGT_UNSOL_CAP (1<<8)
171
172/* Audio Function Group Capabilities */
173#define AC_AFG_OUT_DELAY (0xf<<0)
174#define AC_AFG_IN_DELAY (0xf<<8)
175#define AC_AFG_BEEP_GEN (1<<16)
176
177/* Audio Widget Capabilities */
178#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183#define AC_WCAP_STRIPE (1<<5) /* stripe */
184#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188#define AC_WCAP_POWER (1<<10) /* power control */
189#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
955d2488
TI
190#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
1da177e4
LT
192#define AC_WCAP_DELAY (0xf<<16)
193#define AC_WCAP_DELAY_SHIFT 16
194#define AC_WCAP_TYPE (0xf<<20)
195#define AC_WCAP_TYPE_SHIFT 20
196
197/* supported PCM rates and bits */
198#define AC_SUPPCM_RATES (0xfff << 0)
199#define AC_SUPPCM_BITS_8 (1<<16)
200#define AC_SUPPCM_BITS_16 (1<<17)
201#define AC_SUPPCM_BITS_20 (1<<18)
202#define AC_SUPPCM_BITS_24 (1<<19)
203#define AC_SUPPCM_BITS_32 (1<<20)
204
205/* supported PCM stream format */
206#define AC_SUPFMT_PCM (1<<0)
207#define AC_SUPFMT_FLOAT32 (1<<1)
208#define AC_SUPFMT_AC3 (1<<2)
209
797760ab
AP
210/* GP I/O count */
211#define AC_GPIO_IO_COUNT (0xff<<0)
212#define AC_GPIO_O_COUNT (0xff<<8)
213#define AC_GPIO_O_COUNT_SHIFT 8
214#define AC_GPIO_I_COUNT (0xff<<16)
215#define AC_GPIO_I_COUNT_SHIFT 16
216#define AC_GPIO_UNSOLICITED (1<<30)
217#define AC_GPIO_WAKE (1<<31)
218
219/* Converter stream, channel */
220#define AC_CONV_CHANNEL (0xf<<0)
221#define AC_CONV_STREAM (0xf<<4)
222#define AC_CONV_STREAM_SHIFT 4
223
224/* Input converter SDI select */
225#define AC_SDI_SELECT (0xf<<0)
226
955d2488 227/* Unsolicited response control */
797760ab
AP
228#define AC_UNSOL_TAG (0x3f<<0)
229#define AC_UNSOL_ENABLED (1<<7)
955d2488
TI
230#define AC_USRSP_EN AC_UNSOL_ENABLED
231
232/* Unsolicited responses */
233#define AC_UNSOL_RES_TAG (0x3f<<26)
234#define AC_UNSOL_RES_TAG_SHIFT 26
235#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
236#define AC_UNSOL_RES_SUBTAG_SHIFT 21
237#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
238#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
239#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
240#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
797760ab 241
1da177e4
LT
242/* Pin widget capabilies */
243#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
244#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
245#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
246#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
247#define AC_PINCAP_OUT (1<<4) /* output capable */
248#define AC_PINCAP_IN (1<<5) /* input capable */
249#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
3982d17e
AP
250/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
251 * but is marked reserved in the Intel HDA specification.
252 */
253#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
955d2488
TI
254/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
255 * in HD-audio specification
256 */
257#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
1a12de1e 258#define AC_PINCAP_VREF (0x37<<8)
1da177e4
LT
259#define AC_PINCAP_VREF_SHIFT 8
260#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
1a12de1e
M
261/* Vref status (used in pin cap) */
262#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
263#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
264#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
265#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
266#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
1da177e4
LT
267
268/* Amplifier capabilities */
269#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
270#define AC_AMPCAP_OFFSET_SHIFT 0
271#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
272#define AC_AMPCAP_NUM_STEPS_SHIFT 8
d01ce99f
TI
273#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
274 * in 0.25dB
275 */
1da177e4
LT
276#define AC_AMPCAP_STEP_SIZE_SHIFT 16
277#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
278#define AC_AMPCAP_MUTE_SHIFT 31
279
280/* Connection list */
281#define AC_CLIST_LENGTH (0x7f<<0)
282#define AC_CLIST_LONG (1<<7)
283
284/* Supported power status */
285#define AC_PWRST_D0SUP (1<<0)
286#define AC_PWRST_D1SUP (1<<1)
287#define AC_PWRST_D2SUP (1<<2)
288#define AC_PWRST_D3SUP (1<<3)
289
54d17403 290/* Power state values */
797760ab
AP
291#define AC_PWRST_SETTING (0xf<<0)
292#define AC_PWRST_ACTUAL (0xf<<4)
293#define AC_PWRST_ACTUAL_SHIFT 4
54d17403
TI
294#define AC_PWRST_D0 0x00
295#define AC_PWRST_D1 0x01
296#define AC_PWRST_D2 0x02
297#define AC_PWRST_D3 0x03
298
1da177e4
LT
299/* Processing capabilies */
300#define AC_PCAP_BENIGN (1<<0)
301#define AC_PCAP_NUM_COEF (0xff<<8)
797760ab 302#define AC_PCAP_NUM_COEF_SHIFT 8
1da177e4
LT
303
304/* Volume knobs capabilities */
305#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
38fcaf8e 306#define AC_KNBCAP_DELTA (1<<7)
1da177e4 307
955d2488
TI
308/* HDMI LPCM capabilities */
309#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
310#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
311#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
312#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
313#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
314#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
315#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
316#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
317#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
318#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
319#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
320#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
321#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
322#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
323
1da177e4
LT
324/*
325 * Control Parameters
326 */
327
328/* Amp gain/mute */
d427c77e 329#define AC_AMP_MUTE (1<<7)
1da177e4
LT
330#define AC_AMP_GAIN (0x7f)
331#define AC_AMP_GET_INDEX (0xf<<0)
332
333#define AC_AMP_GET_LEFT (1<<13)
334#define AC_AMP_GET_RIGHT (0<<13)
335#define AC_AMP_GET_OUTPUT (1<<15)
336#define AC_AMP_GET_INPUT (0<<15)
337
338#define AC_AMP_SET_INDEX (0xf<<8)
339#define AC_AMP_SET_INDEX_SHIFT 8
340#define AC_AMP_SET_RIGHT (1<<12)
341#define AC_AMP_SET_LEFT (1<<13)
342#define AC_AMP_SET_INPUT (1<<14)
343#define AC_AMP_SET_OUTPUT (1<<15)
344
345/* DIGITAL1 bits */
346#define AC_DIG1_ENABLE (1<<0)
347#define AC_DIG1_V (1<<1)
348#define AC_DIG1_VCFG (1<<2)
349#define AC_DIG1_EMPHASIS (1<<3)
350#define AC_DIG1_COPYRIGHT (1<<4)
351#define AC_DIG1_NONAUDIO (1<<5)
352#define AC_DIG1_PROFESSIONAL (1<<6)
353#define AC_DIG1_LEVEL (1<<7)
354
797760ab
AP
355/* DIGITAL2 bits */
356#define AC_DIG2_CC (0x7f<<0)
357
1da177e4
LT
358/* Pin widget control - 8bit */
359#define AC_PINCTL_VREFEN (0x7<<0)
98f759a6
TI
360#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
361#define AC_PINCTL_VREF_50 1 /* 50% */
362#define AC_PINCTL_VREF_GRD 2 /* ground */
363#define AC_PINCTL_VREF_80 4 /* 80% */
364#define AC_PINCTL_VREF_100 5 /* 100% */
1da177e4
LT
365#define AC_PINCTL_IN_EN (1<<5)
366#define AC_PINCTL_OUT_EN (1<<6)
367#define AC_PINCTL_HP_EN (1<<7)
368
797760ab
AP
369/* Pin sense - 32bit */
370#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
371#define AC_PINSENSE_PRESENCE (1<<31)
955d2488 372#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
797760ab
AP
373
374/* EAPD/BTL enable - 32bit */
375#define AC_EAPDBTL_BALANCED (1<<0)
376#define AC_EAPDBTL_EAPD (1<<1)
377#define AC_EAPDBTL_LR_SWAP (1<<2)
378
955d2488
TI
379/* HDMI ELD data */
380#define AC_ELDD_ELD_VALID (1<<31)
381#define AC_ELDD_ELD_DATA 0xff
382
383/* HDMI DIP size */
384#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
385#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
386
387/* HDMI DIP index */
388#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
389#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
390
391/* HDMI DIP xmit (transmit) control */
392#define AC_DIPXMIT_MASK (0x3<<6)
393#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
394#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
395#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
396
397/* HDMI content protection (CP) control */
398#define AC_CPCTRL_CES (1<<9) /* current encryption state */
399#define AC_CPCTRL_READY (1<<8) /* ready bit */
400#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
401#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
402
403/* Converter channel <-> HDMI slot mapping */
404#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
405#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
406
1da177e4
LT
407/* configuration default - 32bit */
408#define AC_DEFCFG_SEQUENCE (0xf<<0)
409#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
d21b37ea 410#define AC_DEFCFG_ASSOC_SHIFT 4
1da177e4 411#define AC_DEFCFG_MISC (0xf<<8)
d21b37ea 412#define AC_DEFCFG_MISC_SHIFT 8
797760ab 413#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
1da177e4
LT
414#define AC_DEFCFG_COLOR (0xf<<12)
415#define AC_DEFCFG_COLOR_SHIFT 12
416#define AC_DEFCFG_CONN_TYPE (0xf<<16)
417#define AC_DEFCFG_CONN_TYPE_SHIFT 16
418#define AC_DEFCFG_DEVICE (0xf<<20)
419#define AC_DEFCFG_DEVICE_SHIFT 20
420#define AC_DEFCFG_LOCATION (0x3f<<24)
421#define AC_DEFCFG_LOCATION_SHIFT 24
422#define AC_DEFCFG_PORT_CONN (0x3<<30)
423#define AC_DEFCFG_PORT_CONN_SHIFT 30
424
425/* device device types (0x0-0xf) */
426enum {
427 AC_JACK_LINE_OUT,
428 AC_JACK_SPEAKER,
429 AC_JACK_HP_OUT,
430 AC_JACK_CD,
431 AC_JACK_SPDIF_OUT,
432 AC_JACK_DIG_OTHER_OUT,
433 AC_JACK_MODEM_LINE_SIDE,
434 AC_JACK_MODEM_HAND_SIDE,
435 AC_JACK_LINE_IN,
436 AC_JACK_AUX,
437 AC_JACK_MIC_IN,
438 AC_JACK_TELEPHONY,
439 AC_JACK_SPDIF_IN,
440 AC_JACK_DIG_OTHER_IN,
441 AC_JACK_OTHER = 0xf,
442};
443
444/* jack connection types (0x0-0xf) */
445enum {
446 AC_JACK_CONN_UNKNOWN,
447 AC_JACK_CONN_1_8,
448 AC_JACK_CONN_1_4,
449 AC_JACK_CONN_ATAPI,
450 AC_JACK_CONN_RCA,
451 AC_JACK_CONN_OPTICAL,
452 AC_JACK_CONN_OTHER_DIGITAL,
453 AC_JACK_CONN_OTHER_ANALOG,
454 AC_JACK_CONN_DIN,
455 AC_JACK_CONN_XLR,
456 AC_JACK_CONN_RJ11,
457 AC_JACK_CONN_COMB,
458 AC_JACK_CONN_OTHER = 0xf,
459};
460
461/* jack colors (0x0-0xf) */
462enum {
463 AC_JACK_COLOR_UNKNOWN,
464 AC_JACK_COLOR_BLACK,
465 AC_JACK_COLOR_GREY,
466 AC_JACK_COLOR_BLUE,
467 AC_JACK_COLOR_GREEN,
468 AC_JACK_COLOR_RED,
469 AC_JACK_COLOR_ORANGE,
470 AC_JACK_COLOR_YELLOW,
471 AC_JACK_COLOR_PURPLE,
472 AC_JACK_COLOR_PINK,
473 AC_JACK_COLOR_WHITE = 0xe,
474 AC_JACK_COLOR_OTHER,
475};
476
477/* Jack location (0x0-0x3f) */
478/* common case */
479enum {
480 AC_JACK_LOC_NONE,
481 AC_JACK_LOC_REAR,
482 AC_JACK_LOC_FRONT,
483 AC_JACK_LOC_LEFT,
484 AC_JACK_LOC_RIGHT,
485 AC_JACK_LOC_TOP,
486 AC_JACK_LOC_BOTTOM,
487};
488/* bits 4-5 */
489enum {
490 AC_JACK_LOC_EXTERNAL = 0x00,
491 AC_JACK_LOC_INTERNAL = 0x10,
492 AC_JACK_LOC_SEPARATE = 0x20,
493 AC_JACK_LOC_OTHER = 0x30,
494};
495enum {
496 /* external on primary chasis */
497 AC_JACK_LOC_REAR_PANEL = 0x07,
498 AC_JACK_LOC_DRIVE_BAY,
499 /* internal */
500 AC_JACK_LOC_RISER = 0x17,
501 AC_JACK_LOC_HDMI,
502 AC_JACK_LOC_ATAPI,
503 /* others */
504 AC_JACK_LOC_MOBILE_IN = 0x37,
505 AC_JACK_LOC_MOBILE_OUT,
506};
507
508/* Port connectivity (0-3) */
509enum {
510 AC_JACK_PORT_COMPLEX,
511 AC_JACK_PORT_NONE,
512 AC_JACK_PORT_FIXED,
513 AC_JACK_PORT_BOTH,
514};
515
516/* max. connections to a widget */
54d17403 517#define HDA_MAX_CONNECTIONS 32
1da177e4
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518
519/* max. codec address */
520#define HDA_MAX_CODEC_ADDRESS 0x0f
521
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522/*
523 * generic arrays
524 */
525struct snd_array {
526 unsigned int used;
527 unsigned int alloced;
528 unsigned int elem_size;
529 unsigned int alloc_align;
530 void *list;
531};
532
533void *snd_array_new(struct snd_array *array);
534void snd_array_free(struct snd_array *array);
535static inline void snd_array_init(struct snd_array *array, unsigned int size,
536 unsigned int align)
537{
538 array->elem_size = size;
539 array->alloc_align = align;
540}
541
1da177e4
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542/*
543 * Structures
544 */
545
546struct hda_bus;
1cd2224c 547struct hda_beep;
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548struct hda_codec;
549struct hda_pcm;
550struct hda_pcm_stream;
551struct hda_bus_unsolicited;
552
553/* NID type */
554typedef u16 hda_nid_t;
555
556/* bus operators */
557struct hda_bus_ops {
558 /* send a single command */
559 int (*command)(struct hda_codec *codec, hda_nid_t nid, int direct,
560 unsigned int verb, unsigned int parm);
561 /* get a response from the last command */
562 unsigned int (*get_response)(struct hda_codec *codec);
563 /* free the private data */
564 void (*private_free)(struct hda_bus *);
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565 /* attach a PCM stream */
566 int (*attach_pcm)(struct hda_codec *codec, struct hda_pcm *pcm);
cb53c626 567#ifdef CONFIG_SND_HDA_POWER_SAVE
561de31a 568 /* notify power-up/down from codec to controller */
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569 void (*pm_notify)(struct hda_codec *codec);
570#endif
1da177e4
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571};
572
573/* template to pass to the bus constructor */
574struct hda_bus_template {
575 void *private_data;
576 struct pci_dev *pci;
577 const char *modelname;
578 struct hda_bus_ops ops;
579};
580
581/*
582 * codec bus
583 *
584 * each controller needs to creata a hda_bus to assign the accessor.
585 * A hda_bus contains several codecs in the list codec_list.
586 */
587struct hda_bus {
c8b6bf9b 588 struct snd_card *card;
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589
590 /* copied from template */
591 void *private_data;
592 struct pci_dev *pci;
593 const char *modelname;
594 struct hda_bus_ops ops;
595
596 /* codec linked list */
597 struct list_head codec_list;
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598 /* link caddr -> codec */
599 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
1da177e4 600
62932df8 601 struct mutex cmd_mutex;
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602
603 /* unsolicited event queue */
604 struct hda_bus_unsolicited *unsol;
605
c8b6bf9b 606 struct snd_info_entry *proc;
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607
608 /* misc op flags */
609 unsigned int needs_damn_long_delay :1;
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610};
611
612/*
613 * codec preset
614 *
615 * Known codecs have the patch to build and set up the controls/PCMs
616 * better than the generic parser.
617 */
618struct hda_codec_preset {
619 unsigned int id;
620 unsigned int mask;
621 unsigned int subs;
622 unsigned int subs_mask;
623 unsigned int rev;
ca7cfae9 624 hda_nid_t afg, mfg;
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625 const char *name;
626 int (*patch)(struct hda_codec *codec);
627};
628
629/* ops set by the preset patch */
630struct hda_codec_ops {
631 int (*build_controls)(struct hda_codec *codec);
632 int (*build_pcms)(struct hda_codec *codec);
633 int (*init)(struct hda_codec *codec);
634 void (*free)(struct hda_codec *codec);
635 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
cb53c626 636#ifdef SND_HDA_NEEDS_RESUME
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637 int (*suspend)(struct hda_codec *codec, pm_message_t state);
638 int (*resume)(struct hda_codec *codec);
639#endif
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640#ifdef CONFIG_SND_HDA_POWER_SAVE
641 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
642#endif
1da177e4
LT
643};
644
645/* record for amp information cache */
01751f54 646struct hda_cache_head {
1da177e4 647 u32 key; /* hash key */
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648 u16 val; /* assigned value */
649 u16 next; /* next link; -1 = terminal */
650};
651
652struct hda_amp_info {
653 struct hda_cache_head head;
1da177e4 654 u32 amp_caps; /* amp capabilities */
7f0e2f8b 655 u16 vol[2]; /* current volume & mute */
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656};
657
658struct hda_cache_rec {
659 u16 hash[64]; /* hash table for index */
603c4019 660 struct snd_array buf; /* record entries */
1da177e4
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661};
662
663/* PCM callbacks */
664struct hda_pcm_ops {
665 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 666 struct snd_pcm_substream *substream);
1da177e4 667 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 668 struct snd_pcm_substream *substream);
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669 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
670 unsigned int stream_tag, unsigned int format,
c8b6bf9b 671 struct snd_pcm_substream *substream);
1da177e4 672 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 673 struct snd_pcm_substream *substream);
1da177e4
LT
674};
675
676/* PCM information for each substream */
677struct hda_pcm_stream {
d01ce99f 678 unsigned int substreams; /* number of substreams, 0 = not exist*/
1da177e4
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679 unsigned int channels_min; /* min. number of channels */
680 unsigned int channels_max; /* max. number of channels */
681 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
682 u32 rates; /* supported rates */
683 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
684 unsigned int maxbps; /* supported max. bit per sample */
685 struct hda_pcm_ops ops;
686};
687
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688/* PCM types */
689enum {
690 HDA_PCM_TYPE_AUDIO,
691 HDA_PCM_TYPE_SPDIF,
692 HDA_PCM_TYPE_HDMI,
693 HDA_PCM_TYPE_MODEM,
694 HDA_PCM_NTYPES
695};
696
1da177e4
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697/* for PCM creation */
698struct hda_pcm {
699 char *name;
700 struct hda_pcm_stream stream[2];
7ba72ba1 701 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
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702 int device; /* device number to assign */
703 struct snd_pcm *pcm; /* assigned PCM instance */
1da177e4
LT
704};
705
706/* codec information */
707struct hda_codec {
708 struct hda_bus *bus;
709 unsigned int addr; /* codec addr*/
710 struct list_head list; /* list point */
711
712 hda_nid_t afg; /* AFG node id */
673b683a 713 hda_nid_t mfg; /* MFG node id */
1da177e4
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714
715 /* ids */
716 u32 vendor_id;
717 u32 subsystem_id;
718 u32 revision_id;
719
720 /* detected preset */
721 const struct hda_codec_preset *preset;
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722 const char *name; /* codec name */
723 const char *modelname; /* model name for preset */
1da177e4
LT
724
725 /* set by patch */
726 struct hda_codec_ops patch_ops;
727
1da177e4
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728 /* PCM to create, set by patch_ops.build_pcms callback */
729 unsigned int num_pcms;
730 struct hda_pcm *pcm_info;
731
732 /* codec specific info */
733 void *spec;
734
1cd2224c
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735 /* beep device */
736 struct hda_beep *beep;
737
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738 /* widget capabilities cache */
739 unsigned int num_nodes;
740 hda_nid_t start_nid;
741 u32 *wcaps;
742
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743 struct snd_array mixers; /* list of assigned mixer elements */
744
01751f54 745 struct hda_cache_rec amp_cache; /* cache for amp access */
b3ac5636 746 struct hda_cache_rec cmd_cache; /* cache for other commands */
1da177e4 747
62932df8 748 struct mutex spdif_mutex;
1da177e4
LT
749 unsigned int spdif_status; /* IEC958 status bits */
750 unsigned short spdif_ctls; /* SPDIF control bits */
751 unsigned int spdif_in_enable; /* SPDIF input enable? */
de51ca12 752 hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
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753
754 struct snd_hwdep *hwdep; /* assigned hwdep device */
cb53c626 755
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756 /* misc flags */
757 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
758 * status change
759 * (e.g. Realtek codecs)
760 */
cb53c626 761#ifdef CONFIG_SND_HDA_POWER_SAVE
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762 unsigned int power_on :1; /* current (global) power-state */
763 unsigned int power_transition :1; /* power-state in transition */
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764 int power_count; /* current (global) power refcount */
765 struct delayed_work power_work; /* delayed task for powerdown */
766#endif
1da177e4
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767};
768
769/* direction */
770enum {
771 HDA_INPUT, HDA_OUTPUT
772};
773
774
775/*
776 * constructors
777 */
c8b6bf9b 778int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
1da177e4
LT
779 struct hda_bus **busp);
780int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
781 struct hda_codec **codecp);
782
783/*
784 * low level functions
785 */
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786unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
787 int direct,
1da177e4
LT
788 unsigned int verb, unsigned int parm);
789int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
790 unsigned int verb, unsigned int parm);
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791#define snd_hda_param_read(codec, nid, param) \
792 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
793int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
794 hda_nid_t *start_id);
795int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
796 hda_nid_t *conn_list, int max_conns);
1da177e4
LT
797
798struct hda_verb {
799 hda_nid_t nid;
800 u32 verb;
801 u32 param;
802};
803
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804void snd_hda_sequence_write(struct hda_codec *codec,
805 const struct hda_verb *seq);
1da177e4
LT
806
807/* unsolicited event */
808int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
809
b3ac5636 810/* cached write */
cb53c626 811#ifdef SND_HDA_NEEDS_RESUME
b3ac5636
TI
812int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
813 int direct, unsigned int verb, unsigned int parm);
814void snd_hda_sequence_write_cache(struct hda_codec *codec,
815 const struct hda_verb *seq);
816void snd_hda_codec_resume_cache(struct hda_codec *codec);
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817#else
818#define snd_hda_codec_write_cache snd_hda_codec_write
819#define snd_hda_sequence_write_cache snd_hda_sequence_write
820#endif
b3ac5636 821
1da177e4
LT
822/*
823 * Mixer
824 */
825int snd_hda_build_controls(struct hda_bus *bus);
6c1f45ea 826int snd_hda_codec_build_controls(struct hda_codec *codec);
1da177e4
LT
827
828/*
829 * PCM
830 */
831int snd_hda_build_pcms(struct hda_bus *bus);
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832void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
833 u32 stream_tag,
1da177e4 834 int channel_id, int format);
888afa15 835void snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid);
d01ce99f
TI
836unsigned int snd_hda_calc_stream_format(unsigned int rate,
837 unsigned int channels,
838 unsigned int format,
839 unsigned int maxbps);
1da177e4
LT
840int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
841 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
842int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
843 unsigned int format);
844
845/*
846 * Misc
847 */
848void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
849
850/*
851 * power management
852 */
853#ifdef CONFIG_PM
854int snd_hda_suspend(struct hda_bus *bus, pm_message_t state);
855int snd_hda_resume(struct hda_bus *bus);
856#endif
857
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858/*
859 * power saving
860 */
861#ifdef CONFIG_SND_HDA_POWER_SAVE
862void snd_hda_power_up(struct hda_codec *codec);
863void snd_hda_power_down(struct hda_codec *codec);
d804ad92
ML
864#define snd_hda_codec_needs_resume(codec) codec->power_count
865int snd_hda_codecs_inuse(struct hda_bus *bus);
cb53c626
TI
866#else
867static inline void snd_hda_power_up(struct hda_codec *codec) {}
868static inline void snd_hda_power_down(struct hda_codec *codec) {}
d804ad92
ML
869#define snd_hda_codec_needs_resume(codec) 1
870#define snd_hda_codecs_inuse(bus) 1
cb53c626
TI
871#endif
872
1da177e4 873#endif /* __SOUND_HDA_CODEC_H */
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