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ALSA: hda/realtek - Make fixup regs persist after resume
[deliverable/linux.git] / sound / pci / hda / patch_cirrus.c
CommitLineData
e5f14248
TI		 1/*
2 * HD audio interface patch for Cirrus Logic CS420x chip
3 *
4 * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
5 *
6 * This driver is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This driver is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
e5f14248
TI		 22#include <linux/slab.h>
23#include <linux/pci.h>
da155d5b 24#include <linux/module.h>
e5f14248 25#include <sound/core.h>
1077a024 26#include <sound/tlv.h>
e5f14248
TI		 27#include "hda_codec.h"
28#include "hda_local.h"
128bc4ba 29#include "hda_auto_parser.h"
1835a0f9 30#include "hda_jack.h"
1077a024 31#include "hda_generic.h"
e5f14248
TI		 32
33/*
34 */
35
36struct cs_spec {
1077a024 37 struct hda_gen_spec gen;
e5f14248 38
ed208255
TI		 39 unsigned int gpio_mask;
40 unsigned int gpio_dir;
41 unsigned int gpio_data;
6dfeb703
TI		 42 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
43 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
ed208255 44
56487c27
TH		 45 /* CS421x */
46 unsigned int spdif_detect:1;
1077a024 47 unsigned int spdif_present:1;
56487c27
TH		 48 unsigned int sense_b:1;
49 hda_nid_t vendor_nid;
e5f14248
TI		 50};
51
56487c27 52/* available models with CS420x */
a6bae205 53enum {
4e7d7c60 54 CS420X_MBP53,
a6bae205 55 CS420X_MBP55,
1a5ba2e9 56 CS420X_IMAC27,
b35aabd7
TI		 57 CS420X_GPIO_13,
58 CS420X_GPIO_23,
ef596a57 59 CS420X_MBP101,
ffe4d12b 60 CS420X_MBP81,
6ab982e8 61 CS420X_MBA42,
a6bae205 62 CS420X_AUTO,
03efce75
TI		 63 /* aliases */
64 CS420X_IMAC27_122 = CS420X_GPIO_23,
65 CS420X_APPLE = CS420X_GPIO_13,
a6bae205
TI		 66};
67
56487c27
TH		 68/* CS421x boards */
69enum {
70 CS421X_CDB4210,
b35aabd7 71 CS421X_SENSE_B,
4af16107 72 CS421X_STUMPY,
56487c27
TH		 73};
74
40c20fa0
TI		 75/* Vendor-specific processing widget */
76#define CS420X_VENDOR_NID 0x11
77#define CS_DIG_OUT1_PIN_NID 0x10
78#define CS_DIG_OUT2_PIN_NID 0x15
16337e02
DB		 79#define CS_DMIC1_PIN_NID 0x0e
80#define CS_DMIC2_PIN_NID 0x12
40c20fa0
TI		 81
82/* coef indices */
83#define IDX_SPDIF_STAT 0x0000
84#define IDX_SPDIF_CTL 0x0001
85#define IDX_ADC_CFG 0x0002
86/* SZC bitmask, 4 modes below:
87 * 0 = immediate,
88 * 1 = digital immediate, analog zero-cross
89 * 2 = digtail & analog soft-ramp
90 * 3 = digital soft-ramp, analog zero-cross
91 */
92#define CS_COEF_ADC_SZC_MASK (3 << 0)
93#define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
94#define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
95/* PGA mode: 0 = differential, 1 = signle-ended */
96#define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
97#define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
98#define IDX_DAC_CFG 0x0003
99/* SZC bitmask, 4 modes below:
100 * 0 = Immediate
101 * 1 = zero-cross
102 * 2 = soft-ramp
103 * 3 = soft-ramp on zero-cross
104 */
105#define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
106#define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
107#define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
108
109#define IDX_BEEP_CFG 0x0004
110/* 0x0008 - test reg key */
111/* 0x0009 - 0x0014 -> 12 test regs */
112/* 0x0015 - visibility reg */
113
b5bf0a92
BW		 114/* Cirrus Logic CS4208 */
115#define CS4208_VENDOR_NID 0x24
116
56487c27
TH		 117/*
118 * Cirrus Logic CS4210
119 *
120 * 1 DAC => HP(sense) / Speakers,
121 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
122 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
123*/
124#define CS4210_DAC_NID 0x02
125#define CS4210_ADC_NID 0x03
5660ffd0 126#define CS4210_VENDOR_NID 0x0B
56487c27
TH		 127#define CS421X_DMIC_PIN_NID 0x09 /* Port E */
128#define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
129
1077a024
TI		 130#define CS421X_IDX_DEV_CFG 0x01
131#define CS421X_IDX_ADC_CFG 0x02
132#define CS421X_IDX_DAC_CFG 0x03
133#define CS421X_IDX_SPK_CTL 0x04
e5f14248 134
1077a024 135#define SPDIF_EVENT 0x04
6a92934d 136
1077a024
TI		 137/* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
138#define CS4213_VENDOR_NID 0x09
e5f14248 139
21a4dc43 140
1077a024 141static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
e5f14248
TI		 142{
143 struct cs_spec *spec = codec->spec;
1077a024
TI		 144 snd_hda_codec_write(codec, spec->vendor_nid, 0,
145 AC_VERB_SET_COEF_INDEX, idx);
146 return snd_hda_codec_read(codec, spec->vendor_nid, 0,
147 AC_VERB_GET_PROC_COEF, 0);
e5f14248
TI		 148}
149
1077a024
TI		 150static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
151 unsigned int coef)
e5f14248
TI		 152{
153 struct cs_spec *spec = codec->spec;
1077a024
TI		 154 snd_hda_codec_write(codec, spec->vendor_nid, 0,
155 AC_VERB_SET_COEF_INDEX, idx);
156 snd_hda_codec_write(codec, spec->vendor_nid, 0,
157 AC_VERB_SET_PROC_COEF, coef);
e5f14248
TI		 158}
159
21a4dc43
TI		 160/*
161 * auto-mute and auto-mic switching
56487c27
TH		 162 * CS421x auto-output redirecting
163 * HP/SPK/SPDIF
21a4dc43
TI		 164 */
165
1077a024 166static void cs_automute(struct hda_codec *codec)
e5f14248
TI		 167{
168 struct cs_spec *spec = codec->spec;
e5f14248 169
1077a024
TI		 170 /* mute HPs if spdif jack (SENSE_B) is present */
171 spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
56487c27 172
1077a024 173 snd_hda_gen_update_outputs(codec);
78e2a928 174
be8cf445 175 if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
039eb753 176 spec->gpio_data = spec->gen.hp_jack_present ?
6dfeb703 177 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
3a385167 178 snd_hda_codec_write(codec, 0x01, 0,
039eb753 179 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
3a385167 180 }
e5f14248
TI		 181}
182
1077a024 183static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
e5f14248 184{
1077a024
TI		 185 unsigned int val;
186 val = snd_hda_codec_get_pincfg(codec, nid);
187 return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
e5f14248
TI		 188}
189
1077a024 190static void init_input_coef(struct hda_codec *codec)
e5f14248
TI		 191{
192 struct cs_spec *spec = codec->spec;
40c20fa0 193 unsigned int coef;
e5f14248 194
5660ffd0
DH		 195 /* CS420x has multiple ADC, CS421x has single ADC */
196 if (spec->vendor_nid == CS420X_VENDOR_NID) {
16337e02 197 coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
56487c27 198 if (is_active_pin(codec, CS_DMIC2_PIN_NID))
16337e02 199 coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
56487c27 200 if (is_active_pin(codec, CS_DMIC1_PIN_NID))
16337e02 201 coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
56487c27
TH		 202 * No effect if SPDIF_OUT2 is
203 * selected in IDX_SPDIF_CTL.
204 */
16337e02
DB		 205
206 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
56487c27 207 }
40c20fa0
TI		 208}
209
c42d4782 210static const struct hda_verb cs_coef_init_verbs[] = {
40c20fa0
TI		 211 {0x11, AC_VERB_SET_PROC_STATE, 1},
212 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
213 {0x11, AC_VERB_SET_PROC_COEF,
214 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
215 | 0x0040 /* Mute DACs on FIFO error */
216 | 0x1000 /* Enable DACs High Pass Filter */
217 | 0x0400 /* Disable Coefficient Auto increment */
218 )},
829e87e0
TI		 219 /* ADC1/2 - Digital and Analog Soft Ramp */
220 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
221 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
40c20fa0 222 /* Beep */
5a83b4b5 223 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
40c20fa0
TI		 224 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
225
226 {} /* terminator */
227};
228
b5bf0a92
BW		 229static const struct hda_verb cs4208_coef_init_verbs[] = {
230 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
231 {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
232 {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
233 {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
234 {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
235 {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
236 {} /* terminator */
237};
238
a769cbcf
BA		 239/* Errata: CS4207 rev C0/C1/C2 Silicon
240 *
241 * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
242 *
243 * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
244 * may be excessive (up to an additional 200 μA), which is most easily
245 * observed while the part is being held in reset (RESET# active low).
246 *
247 * Root Cause: At initial powerup of the device, the logic that drives
248 * the clock and write enable to the S/PDIF SRC RAMs is not properly
249 * initialized.
250 * Certain random patterns will cause a steady leakage current in those
251 * RAM cells. The issue will resolve once the SRCs are used (turned on).
252 *
253 * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
254 * blocks, which will alleviate the issue.
255 */
256
c42d4782 257static const struct hda_verb cs_errata_init_verbs[] = {
a769cbcf
BA		 258 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
259 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
260
261 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
262 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
263 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
264 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
265 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
266 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
267
268 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
269 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
270
271 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
272 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
273 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
274 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
275 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
276 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
277 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
278
38c07641 279#if 0 /* Don't to set to D3 as we are in power-up sequence */
a769cbcf
BA		 280 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
281 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
282 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
38c07641 283#endif
a769cbcf
BA		 284
285 {} /* terminator */
286};
287
40c20fa0 288/* SPDIF setup */
1077a024 289static void init_digital_coef(struct hda_codec *codec)
40c20fa0
TI		 290{
291 unsigned int coef;
292
293 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
294 coef |= 0x0008; /* Replace with mute on error */
295 if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
296 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
297 * SPDIF_OUT2 is shared with GPIO1 and
298 * DMIC_SDA2.
299 */
300 cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
e5f14248
TI		 301}
302
303static int cs_init(struct hda_codec *codec)
304{
305 struct cs_spec *spec = codec->spec;
306
be8cf445
TI		 307 if (spec->vendor_nid == CS420X_VENDOR_NID) {
308 /* init_verb sequence for C0/C1/C2 errata*/
309 snd_hda_sequence_write(codec, cs_errata_init_verbs);
310 snd_hda_sequence_write(codec, cs_coef_init_verbs);
b5bf0a92
BW		 311 } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
312 snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
be8cf445 313 }
ed208255 314
1077a024 315 snd_hda_gen_init(codec);
98415eac 316
ed208255
TI		 317 if (spec->gpio_mask) {
318 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
319 spec->gpio_mask);
320 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
321 spec->gpio_dir);
322 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
323 spec->gpio_data);
324 }
325
be8cf445
TI		 326 if (spec->vendor_nid == CS420X_VENDOR_NID) {
327 init_input_coef(codec);
328 init_digital_coef(codec);
329 }
01a61e12
TI		 330
331 return 0;
e5f14248
TI		 332}
333
1077a024 334#define cs_free snd_hda_gen_free
e5f14248 335
c42d4782 336static const struct hda_codec_ops cs_patch_ops = {
1077a024
TI		 337 .build_controls = snd_hda_gen_build_controls,
338 .build_pcms = snd_hda_gen_build_pcms,
e5f14248
TI		 339 .init = cs_init,
340 .free = cs_free,
5c2e4e0a 341 .unsol_event = snd_hda_jack_unsol_event,
e5f14248
TI		 342};
343
344static int cs_parse_auto_config(struct hda_codec *codec)
345{
346 struct cs_spec *spec = codec->spec;
347 int err;
348
1077a024 349 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
ed208255
TI		 350 if (err < 0)
351 return err;
352
1077a024 353 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
e5f14248
TI		 354 if (err < 0)
355 return err;
1077a024 356
e5f14248
TI		 357 return 0;
358}
359
b35aabd7
TI		 360static const struct hda_model_fixup cs420x_models[] = {
361 { .id = CS420X_MBP53, .name = "mbp53" },
362 { .id = CS420X_MBP55, .name = "mbp55" },
363 { .id = CS420X_IMAC27, .name = "imac27" },
364 { .id = CS420X_IMAC27_122, .name = "imac27_122" },
365 { .id = CS420X_APPLE, .name = "apple" },
ef596a57 366 { .id = CS420X_MBP101, .name = "mbp101" },
ffe4d12b 367 { .id = CS420X_MBP81, .name = "mbp81" },
6ab982e8 368 { .id = CS420X_MBA42, .name = "mba42" },
b35aabd7 369 {}
a6bae205
TI		 370};
371
b35aabd7 372static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
4e7d7c60 373 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
87232dd4 374 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
a6bae205 375 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
f46119b7 376 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
6dfeb703
TI		 377 /* this conflicts with too many other models */
378 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
6dfeb703 379
b35aabd7 380 /* codec SSID */
ffe4d12b 381 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
7e5bea19 382 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
ef596a57 383 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
6ab982e8 384 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
6dfeb703 385 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
a6bae205
TI		 386 {} /* terminator */
387};
388
b35aabd7 389static const struct hda_pintbl mbp53_pincfgs[] = {
4e7d7c60
VW		 390 { 0x09, 0x012b4050 },
391 { 0x0a, 0x90100141 },
392 { 0x0b, 0x90100140 },
393 { 0x0c, 0x018b3020 },
394 { 0x0d, 0x90a00110 },
395 { 0x0e, 0x400000f0 },
396 { 0x0f, 0x01cbe030 },
397 { 0x10, 0x014be060 },
398 { 0x12, 0x400000f0 },
399 { 0x15, 0x400000f0 },
400 {} /* terminator */
401};
402
b35aabd7 403static const struct hda_pintbl mbp55_pincfgs[] = {
a6bae205
TI		 404 { 0x09, 0x012b4030 },
405 { 0x0a, 0x90100121 },
406 { 0x0b, 0x90100120 },
407 { 0x0c, 0x400000f0 },
408 { 0x0d, 0x90a00110 },
409 { 0x0e, 0x400000f0 },
410 { 0x0f, 0x400000f0 },
411 { 0x10, 0x014be040 },
412 { 0x12, 0x400000f0 },
413 { 0x15, 0x400000f0 },
414 {} /* terminator */
415};
416
b35aabd7 417static const struct hda_pintbl imac27_pincfgs[] = {
1a5ba2e9
RAE		 418 { 0x09, 0x012b4050 },
419 { 0x0a, 0x90100140 },
420 { 0x0b, 0x90100142 },
421 { 0x0c, 0x018b3020 },
422 { 0x0d, 0x90a00110 },
423 { 0x0e, 0x400000f0 },
424 { 0x0f, 0x01cbe030 },
425 { 0x10, 0x014be060 },
426 { 0x12, 0x01ab9070 },
427 { 0x15, 0x400000f0 },
428 {} /* terminator */
429};
430
ef596a57
TI		 431static const struct hda_pintbl mbp101_pincfgs[] = {
432 { 0x0d, 0x40ab90f0 },
433 { 0x0e, 0x90a600f0 },
434 { 0x12, 0x50a600f0 },
435 {} /* terminator */
436};
437
6ab982e8
TI		 438static const struct hda_pintbl mba42_pincfgs[] = {
439 { 0x09, 0x012b4030 }, /* HP */
440 { 0x0a, 0x400000f0 },
441 { 0x0b, 0x90100120 }, /* speaker */
442 { 0x0c, 0x400000f0 },
443 { 0x0d, 0x90a00110 }, /* mic */
444 { 0x0e, 0x400000f0 },
445 { 0x0f, 0x400000f0 },
446 { 0x10, 0x400000f0 },
447 { 0x12, 0x400000f0 },
448 { 0x15, 0x400000f0 },
449 {} /* terminator */
450};
451
b5bf0a92
BW		 452static const struct hda_pintbl mba6_pincfgs[] = {
453 { 0x10, 0x032120f0 }, /* HP */
454 { 0x11, 0x500000f0 },
455 { 0x12, 0x90100010 }, /* Speaker */
456 { 0x13, 0x500000f0 },
457 { 0x14, 0x500000f0 },
458 { 0x15, 0x770000f0 },
459 { 0x16, 0x770000f0 },
460 { 0x17, 0x430000f0 },
461 { 0x18, 0x43ab9030 }, /* Mic */
462 { 0x19, 0x770000f0 },
463 { 0x1a, 0x770000f0 },
464 { 0x1b, 0x770000f0 },
465 { 0x1c, 0x90a00090 },
466 { 0x1d, 0x500000f0 },
467 { 0x1e, 0x500000f0 },
468 { 0x1f, 0x500000f0 },
469 { 0x20, 0x500000f0 },
470 { 0x21, 0x430000f0 },
471 { 0x22, 0x430000f0 },
472 {} /* terminator */
473};
474
b35aabd7
TI		 475static void cs420x_fixup_gpio_13(struct hda_codec *codec,
476 const struct hda_fixup *fix, int action)
477{
478 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
479 struct cs_spec *spec = codec->spec;
480 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
481 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
482 spec->gpio_mask = spec->gpio_dir =
483 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
484 }
485}
a6bae205 486
b35aabd7
TI		 487static void cs420x_fixup_gpio_23(struct hda_codec *codec,
488 const struct hda_fixup *fix, int action)
a6bae205 489{
b35aabd7
TI		 490 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
491 struct cs_spec *spec = codec->spec;
492 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
493 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
494 spec->gpio_mask = spec->gpio_dir =
495 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
496 }
a6bae205
TI		 497}
498
b35aabd7
TI		 499static const struct hda_fixup cs420x_fixups[] = {
500 [CS420X_MBP53] = {
501 .type = HDA_FIXUP_PINS,
502 .v.pins = mbp53_pincfgs,
503 .chained = true,
504 .chain_id = CS420X_APPLE,
505 },
506 [CS420X_MBP55] = {
507 .type = HDA_FIXUP_PINS,
508 .v.pins = mbp55_pincfgs,
509 .chained = true,
510 .chain_id = CS420X_GPIO_13,
511 },
512 [CS420X_IMAC27] = {
513 .type = HDA_FIXUP_PINS,
514 .v.pins = imac27_pincfgs,
515 .chained = true,
516 .chain_id = CS420X_GPIO_13,
517 },
518 [CS420X_GPIO_13] = {
519 .type = HDA_FIXUP_FUNC,
520 .v.func = cs420x_fixup_gpio_13,
521 },
522 [CS420X_GPIO_23] = {
523 .type = HDA_FIXUP_FUNC,
524 .v.func = cs420x_fixup_gpio_23,
525 },
ef596a57
TI		 526 [CS420X_MBP101] = {
527 .type = HDA_FIXUP_PINS,
528 .v.pins = mbp101_pincfgs,
529 .chained = true,
ef596a57
TI		 530 .chain_id = CS420X_GPIO_13,
531 },
ffe4d12b
TI		 532 [CS420X_MBP81] = {
533 .type = HDA_FIXUP_VERBS,
534 .v.verbs = (const struct hda_verb[]) {
535 /* internal mic ADC2: right only, single ended */
536 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
537 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
538 {}
539 },
540 .chained = true,
541 .chain_id = CS420X_GPIO_13,
542 },
6ab982e8
TI		 543 [CS420X_MBA42] = {
544 .type = HDA_FIXUP_PINS,
545 .v.pins = mba42_pincfgs,
546 .chained = true,
547 .chain_id = CS420X_GPIO_13,
548 },
b35aabd7
TI		 549};
550
1077a024 551static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
e5f14248
TI		 552{
553 struct cs_spec *spec;
e5f14248
TI		 554
555 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
556 if (!spec)
1077a024 557 return NULL;
e5f14248 558 codec->spec = spec;
1077a024
TI		 559 spec->vendor_nid = vendor_nid;
560 snd_hda_gen_spec_init(&spec->gen);
561
562 return spec;
563}
564
565static int patch_cs420x(struct hda_codec *codec)
566{
567 struct cs_spec *spec;
568 int err;
e5f14248 569
1077a024
TI		 570 spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
571 if (!spec)
572 return -ENOMEM;
56487c27 573
6d3073e1
TI		 574 spec->gen.automute_hook = cs_automute;
575
b35aabd7
TI		 576 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
577 cs420x_fixups);
578 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
e5f14248 579
ed208255 580 err = cs_parse_auto_config(codec);
21a4dc43
TI		 581 if (err < 0)
582 goto error;
583
e5f14248
TI		 584 codec->patch_ops = cs_patch_ops;
585
b35aabd7
TI		 586 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
587
e5f14248
TI		 588 return 0;
589
590 error:
c5e0b6db 591 cs_free(codec);
e5f14248
TI		 592 return err;
593}
594
be8cf445
TI		 595/*
596 * CS4208 support:
b5bf0a92 597 * Its layout is no longer compatible with CS4206/CS4207
be8cf445
TI		 598 */
599enum {
b5bf0a92 600 CS4208_MBA6,
be8cf445
TI		 601 CS4208_GPIO0,
602};
603
604static const struct hda_model_fixup cs4208_models[] = {
605 { .id = CS4208_GPIO0, .name = "gpio0" },
b5bf0a92 606 { .id = CS4208_MBA6, .name = "mba6" },
be8cf445
TI		 607 {}
608};
609
610static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
611 /* codec SSID */
b5bf0a92
BW		 612 SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
613 SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
8fe7b65a 614 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_GPIO0),
be8cf445
TI		 615 {} /* terminator */
616};
617
618static void cs4208_fixup_gpio0(struct hda_codec *codec,
619 const struct hda_fixup *fix, int action)
620{
621 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
622 struct cs_spec *spec = codec->spec;
623 spec->gpio_eapd_hp = 0;
624 spec->gpio_eapd_speaker = 1;
625 spec->gpio_mask = spec->gpio_dir =
626 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
627 }
628}
629
630static const struct hda_fixup cs4208_fixups[] = {
b5bf0a92
BW		 631 [CS4208_MBA6] = {
632 .type = HDA_FIXUP_PINS,
633 .v.pins = mba6_pincfgs,
634 .chained = true,
635 .chain_id = CS4208_GPIO0,
636 },
be8cf445
TI		 637 [CS4208_GPIO0] = {
638 .type = HDA_FIXUP_FUNC,
639 .v.func = cs4208_fixup_gpio0,
640 },
641};
642
b5bf0a92
BW		 643/* correct the 0dB offset of input pins */
644static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
645{
646 unsigned int caps;
647
648 caps = query_amp_caps(codec, adc, HDA_INPUT);
649 caps &= ~(AC_AMPCAP_OFFSET);
650 caps |= 0x02;
651 snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
652}
653
be8cf445
TI		 654static int patch_cs4208(struct hda_codec *codec)
655{
656 struct cs_spec *spec;
657 int err;
658
b5bf0a92 659 spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
be8cf445
TI		 660 if (!spec)
661 return -ENOMEM;
662
663 spec->gen.automute_hook = cs_automute;
a1114a8c
TI		 664 /* exclude NID 0x10 (HP) from output volumes due to different steps */
665 spec->gen.out_vol_mask = 1ULL << 0x10;
be8cf445
TI		 666
667 snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
668 cs4208_fixups);
669 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
670
b5bf0a92
BW		 671 snd_hda_override_wcaps(codec, 0x18,
672 get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
673 cs4208_fix_amp_caps(codec, 0x18);
674 cs4208_fix_amp_caps(codec, 0x1b);
675 cs4208_fix_amp_caps(codec, 0x1c);
676
be8cf445
TI		 677 err = cs_parse_auto_config(codec);
678 if (err < 0)
679 goto error;
680
681 codec->patch_ops = cs_patch_ops;
682
683 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
684
685 return 0;
686
687 error:
688 cs_free(codec);
689 return err;
690}
691
56487c27
TH		 692/*
693 * Cirrus Logic CS4210
694 *
695 * 1 DAC => HP(sense) / Speakers,
696 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
697 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
698*/
699
700/* CS4210 board names */
b35aabd7
TI		 701static const struct hda_model_fixup cs421x_models[] = {
702 { .id = CS421X_CDB4210, .name = "cdb4210" },
4af16107 703 { .id = CS421X_STUMPY, .name = "stumpy" },
b35aabd7 704 {}
56487c27
TH		 705};
706
b35aabd7 707static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
56487c27
TH		 708 /* Test Intel board + CDB2410 */
709 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
710 {} /* terminator */
711};
712
713/* CS4210 board pinconfigs */
714/* Default CS4210 (CDB4210)*/
b35aabd7 715static const struct hda_pintbl cdb4210_pincfgs[] = {
56487c27
TH		 716 { 0x05, 0x0321401f },
717 { 0x06, 0x90170010 },
718 { 0x07, 0x03813031 },
719 { 0x08, 0xb7a70037 },
720 { 0x09, 0xb7a6003e },
721 { 0x0a, 0x034510f0 },
722 {} /* terminator */
723};
724
4af16107
DR		 725/* Stumpy ChromeBox */
726static const struct hda_pintbl stumpy_pincfgs[] = {
727 { 0x05, 0x022120f0 },
728 { 0x06, 0x901700f0 },
729 { 0x07, 0x02a120f0 },
730 { 0x08, 0x77a70037 },
731 { 0x09, 0x77a6003e },
732 { 0x0a, 0x434510f0 },
733 {} /* terminator */
734};
735
b35aabd7
TI		 736/* Setup GPIO/SENSE for each board (if used) */
737static void cs421x_fixup_sense_b(struct hda_codec *codec,
738 const struct hda_fixup *fix, int action)
739{
740 struct cs_spec *spec = codec->spec;
741 if (action == HDA_FIXUP_ACT_PRE_PROBE)
742 spec->sense_b = 1;
743}
744
745static const struct hda_fixup cs421x_fixups[] = {
746 [CS421X_CDB4210] = {
747 .type = HDA_FIXUP_PINS,
748 .v.pins = cdb4210_pincfgs,
749 .chained = true,
750 .chain_id = CS421X_SENSE_B,
751 },
752 [CS421X_SENSE_B] = {
753 .type = HDA_FIXUP_FUNC,
754 .v.func = cs421x_fixup_sense_b,
4af16107
DR		 755 },
756 [CS421X_STUMPY] = {
757 .type = HDA_FIXUP_PINS,
758 .v.pins = stumpy_pincfgs,
759 },
56487c27
TH		 760};
761
762static const struct hda_verb cs421x_coef_init_verbs[] = {
763 {0x0B, AC_VERB_SET_PROC_STATE, 1},
764 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
765 /*
766 Disable Coefficient Index Auto-Increment(DAI)=1,
767 PDREF=0
768 */
769 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
770
771 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
772 /* ADC SZCMode = Digital Soft Ramp */
773 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
774
775 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
776 {0x0B, AC_VERB_SET_PROC_COEF,
777 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
778 | 0x0004 /* Mute DAC on FIFO error */
779 | 0x0008 /* Enable DAC High Pass Filter */
780 )},
781 {} /* terminator */
782};
783
784/* Errata: CS4210 rev A1 Silicon
785 *
786 * http://www.cirrus.com/en/pubs/errata/
787 *
788 * Description:
789 * 1. Performance degredation is present in the ADC.
790 * 2. Speaker output is not completely muted upon HP detect.
791 * 3. Noise is present when clipping occurs on the amplified
792 * speaker outputs.
793 *
794 * Workaround:
795 * The following verb sequence written to the registers during
796 * initialization will correct the issues listed above.
797 */
798
799static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
800 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
801
802 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
803 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
804
805 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
806 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
807
808 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
809 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
810
811 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
812 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
813
814 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
815 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
816
817 {} /* terminator */
818};
819
820/* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
821static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
822
823static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
824 struct snd_ctl_elem_info *uinfo)
825{
826 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
827 uinfo->count = 1;
828 uinfo->value.integer.min = 0;
829 uinfo->value.integer.max = 3;
830 return 0;
831}
832
833static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
834 struct snd_ctl_elem_value *ucontrol)
835{
836 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
837
838 ucontrol->value.integer.value[0] =
839 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
840 return 0;
841}
842
843static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
844 struct snd_ctl_elem_value *ucontrol)
845{
846 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
847
848 unsigned int vol = ucontrol->value.integer.value[0];
849 unsigned int coef =
850 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
851 unsigned int original_coef = coef;
852
853 coef &= ~0x0003;
854 coef |= (vol & 0x0003);
855 if (original_coef == coef)
856 return 0;
857 else {
858 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
859 return 1;
860 }
861}
862
1077a024 863static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
56487c27
TH		 864
865 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
866 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
867 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
868 .name = "Speaker Boost Playback Volume",
869 .info = cs421x_boost_vol_info,
870 .get = cs421x_boost_vol_get,
871 .put = cs421x_boost_vol_put,
872 .tlv = { .p = cs421x_speaker_boost_db_scale },
873};
874
5660ffd0 875static void cs4210_pinmux_init(struct hda_codec *codec)
56487c27
TH		 876{
877 struct cs_spec *spec = codec->spec;
878 unsigned int def_conf, coef;
879
880 /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
881 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
882
883 if (spec->gpio_mask)
884 coef |= 0x0008; /* B1,B2 are GPIOs */
885 else
886 coef &= ~0x0008;
887
888 if (spec->sense_b)
889 coef |= 0x0010; /* B2 is SENSE_B, not inverted */
890 else
891 coef &= ~0x0010;
892
893 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
894
895 if ((spec->gpio_mask || spec->sense_b) &&
896 is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
897
898 /*
899 GPIO or SENSE_B forced - disconnect the DMIC pin.
900 */
901 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
902 def_conf &= ~AC_DEFCFG_PORT_CONN;
903 def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
904 snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
905 }
906}
907
1077a024
TI		 908static void cs4210_spdif_automute(struct hda_codec *codec,
909 struct hda_jack_tbl *tbl)
56487c27
TH		 910{
911 struct cs_spec *spec = codec->spec;
1077a024
TI		 912 bool spdif_present = false;
913 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
914
915 /* detect on spdif is specific to CS4210 */
916 if (!spec->spdif_detect ||
917 spec->vendor_nid != CS4210_VENDOR_NID)
918 return;
919
920 spdif_present = snd_hda_jack_detect(codec, spdif_pin);
921 if (spdif_present == spec->spdif_present)
922 return;
923
924 spec->spdif_present = spdif_present;
925 /* SPDIF TX on/off */
926 if (spdif_present)
927 snd_hda_set_pin_ctl(codec, spdif_pin,
928 spdif_present ? PIN_OUT : 0);
56487c27 929
1077a024
TI		 930 cs_automute(codec);
931}
932
933static void parse_cs421x_digital(struct hda_codec *codec)
934{
935 struct cs_spec *spec = codec->spec;
936 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
937 int i;
56487c27
TH		 938
939 for (i = 0; i < cfg->dig_outs; i++) {
940 hda_nid_t nid = cfg->dig_out_pins[i];
56487c27 941 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
56487c27 942 spec->spdif_detect = 1;
1077a024
TI		 943 snd_hda_jack_detect_enable_callback(codec, nid,
944 SPDIF_EVENT,
945 cs4210_spdif_automute);
56487c27
TH		 946 }
947 }
948}
949
950static int cs421x_init(struct hda_codec *codec)
951{
952 struct cs_spec *spec = codec->spec;
953
5660ffd0
DH		 954 if (spec->vendor_nid == CS4210_VENDOR_NID) {
955 snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
956 snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
957 cs4210_pinmux_init(codec);
958 }
56487c27 959
1077a024
TI		 960 snd_hda_gen_init(codec);
961
56487c27
TH		 962 if (spec->gpio_mask) {
963 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
964 spec->gpio_mask);
965 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
966 spec->gpio_dir);
967 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
968 spec->gpio_data);
969 }
970
1077a024 971 init_input_coef(codec);
56487c27 972
1077a024 973 cs4210_spdif_automute(codec, NULL);
56487c27
TH		 974
975 return 0;
976}
977
1077a024 978static int cs421x_build_controls(struct hda_codec *codec)
56487c27 979{
56487c27 980 struct cs_spec *spec = codec->spec;
56487c27 981 int err;
56487c27 982
1077a024 983 err = snd_hda_gen_build_controls(codec);
56487c27
TH		 984 if (err < 0)
985 return err;
56487c27 986
1077a024
TI		 987 if (spec->gen.autocfg.speaker_outs &&
988 spec->vendor_nid == CS4210_VENDOR_NID) {
56487c27 989 err = snd_hda_ctl_add(codec, 0,
1077a024 990 snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
56487c27
TH		 991 if (err < 0)
992 return err;
993 }
01a61e12 994 return 0;
56487c27
TH		 995}
996
1077a024 997static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
56487c27 998{
1077a024 999 unsigned int caps;
56487c27 1000
1077a024
TI		 1001 /* set the upper-limit for mixer amp to 0dB */
1002 caps = query_amp_caps(codec, dac, HDA_OUTPUT);
1003 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
1004 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
1005 << AC_AMPCAP_NUM_STEPS_SHIFT;
1006 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
56487c27
TH		 1007}
1008
1009static int cs421x_parse_auto_config(struct hda_codec *codec)
1010{
1011 struct cs_spec *spec = codec->spec;
1077a024 1012 hda_nid_t dac = CS4210_DAC_NID;
56487c27
TH		 1013 int err;
1014
1077a024
TI		 1015 fix_volume_caps(codec, dac);
1016
1017 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
56487c27
TH		 1018 if (err < 0)
1019 return err;
1077a024
TI		 1020
1021 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
56487c27
TH		 1022 if (err < 0)
1023 return err;
1077a024
TI		 1024
1025 parse_cs421x_digital(codec);
56487c27
TH		 1026 return 0;
1027}
1028
1029#ifdef CONFIG_PM
1030/*
1031 Manage PDREF, when transitioning to D3hot
1032 (DAC,ADC) -> D3, PDREF=1, AFG->D3
1033*/
68cb2b55 1034static int cs421x_suspend(struct hda_codec *codec)
56487c27 1035{
5660ffd0 1036 struct cs_spec *spec = codec->spec;
56487c27
TH		 1037 unsigned int coef;
1038
1039 snd_hda_shutup_pins(codec);
1040
1041 snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
1042 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1043 snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
1044 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1045
5660ffd0
DH		 1046 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1047 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1048 coef |= 0x0004; /* PDREF */
1049 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1050 }
56487c27
TH		 1051
1052 return 0;
1053}
1054#endif
1055
00e17f76 1056static const struct hda_codec_ops cs421x_patch_ops = {
56487c27 1057 .build_controls = cs421x_build_controls,
1077a024 1058 .build_pcms = snd_hda_gen_build_pcms,
56487c27
TH		 1059 .init = cs421x_init,
1060 .free = cs_free,
5c2e4e0a 1061 .unsol_event = snd_hda_jack_unsol_event,
56487c27
TH		 1062#ifdef CONFIG_PM
1063 .suspend = cs421x_suspend,
1064#endif
1065};
1066
5660ffd0 1067static int patch_cs4210(struct hda_codec *codec)
56487c27
TH		 1068{
1069 struct cs_spec *spec;
1070 int err;
1071
1077a024 1072 spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
56487c27
TH		 1073 if (!spec)
1074 return -ENOMEM;
56487c27 1075
6d3073e1
TI		 1076 spec->gen.automute_hook = cs_automute;
1077
b35aabd7
TI		 1078 snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
1079 cs421x_fixups);
1080 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
56487c27
TH		 1081
1082 /*
1083 Update the GPIO/DMIC/SENSE_B pinmux before the configuration
1084 is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
1085 is disabled.
1086 */
5660ffd0 1087 cs4210_pinmux_init(codec);
56487c27
TH		 1088
1089 err = cs421x_parse_auto_config(codec);
1090 if (err < 0)
1091 goto error;
1092
5660ffd0
DH		 1093 codec->patch_ops = cs421x_patch_ops;
1094
b35aabd7
TI		 1095 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
1096
5660ffd0
DH		 1097 return 0;
1098
1099 error:
c5e0b6db 1100 cs_free(codec);
5660ffd0
DH		 1101 return err;
1102}
1103
1104static int patch_cs4213(struct hda_codec *codec)
1105{
1106 struct cs_spec *spec;
1107 int err;
1108
1077a024 1109 spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
5660ffd0
DH		 1110 if (!spec)
1111 return -ENOMEM;
5660ffd0
DH		 1112
1113 err = cs421x_parse_auto_config(codec);
1114 if (err < 0)
1115 goto error;
56487c27 1116
5660ffd0 1117 codec->patch_ops = cs421x_patch_ops;
56487c27
TH		 1118 return 0;
1119
1120 error:
c5e0b6db 1121 cs_free(codec);
56487c27
TH		 1122 return err;
1123}
1124
e5f14248
TI		 1125
1126/*
1127 * patch entries
1128 */
c42d4782 1129static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
e5f14248
TI		 1130 { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
1131 { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
be8cf445 1132 { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 },
5660ffd0
DH		 1133 { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
1134 { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
e5f14248
TI		 1135 {} /* terminator */
1136};
1137
1138MODULE_ALIAS("snd-hda-codec-id:10134206");
1139MODULE_ALIAS("snd-hda-codec-id:10134207");
be8cf445 1140MODULE_ALIAS("snd-hda-codec-id:10134208");
56487c27 1141MODULE_ALIAS("snd-hda-codec-id:10134210");
5660ffd0 1142MODULE_ALIAS("snd-hda-codec-id:10134213");
e5f14248
TI		 1143
1144MODULE_LICENSE("GPL");
1145MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
1146
1147static struct hda_codec_preset_list cirrus_list = {
1148 .preset = snd_hda_preset_cirrus,
1149 .owner = THIS_MODULE,
1150};
1151
1152static int __init patch_cirrus_init(void)
1153{
1154 return snd_hda_add_codec_preset(&cirrus_list);
1155}
1156
1157static void __exit patch_cirrus_exit(void)
1158{
1159 snd_hda_delete_codec_preset(&cirrus_list);
1160}
1161
1162module_init(patch_cirrus_init)
1163module_exit(patch_cirrus_exit)
Linux kernel - Deliverables
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