ALSA: hda - Add support for HDMI HBR passthrough
[deliverable/linux.git] / sound / pci / hda / patch_intelhdmi.c
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1/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
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33#include "hda_codec.h"
34#include "hda_local.h"
91504877 35
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36/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
e48b0087 43#define MAX_HDMI_CVTS 3
079d88cc 44#define MAX_HDMI_PINS 3
91504877 45
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46#include "patch_hdmi.c"
47
48static char *intel_hdmi_pcm_names[MAX_HDMI_CVTS] = {
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49 "INTEL HDMI 0",
50 "INTEL HDMI 1",
e48b0087 51 "INTEL HDMI 2",
54a25f87 52};
91504877 53
91504877 54/*
079d88cc 55 * HDMI callbacks
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56 */
57
ddb8152b 58static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
70ca35fb 59 struct hda_codec *codec,
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60 unsigned int stream_tag,
61 unsigned int format,
70ca35fb 62 struct snd_pcm_substream *substream)
91504877 63{
54a25f87 64 hdmi_set_channel_count(codec, hinfo->nid,
ddb8152b 65 substream->runtime->channels);
91504877 66
54a25f87 67 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
91504877 68
ea87d1c4 69 return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
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70}
71
ddb8152b 72static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
91504877 73 struct hda_codec *codec,
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74 struct snd_pcm_substream *substream)
75{
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76 return 0;
77}
78
79static struct hda_pcm_stream intel_hdmi_pcm_playback = {
80 .substreams = 1,
81 .channels_min = 2,
91504877 82 .ops = {
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83 .prepare = intel_hdmi_playback_pcm_prepare,
84 .cleanup = intel_hdmi_playback_pcm_cleanup,
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85 },
86};
87
88static int intel_hdmi_build_pcms(struct hda_codec *codec)
89{
079d88cc 90 struct hdmi_spec *spec = codec->spec;
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91 struct hda_pcm *info = spec->pcm_rec;
92 int i;
91504877 93
54a25f87 94 codec->num_pcms = spec->num_cvts;
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95 codec->pcm_info = info;
96
54a25f87 97 for (i = 0; i < codec->num_pcms; i++, info++) {
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98 unsigned int chans;
99
100 chans = get_wcaps(codec, spec->cvt[i]);
101 chans = get_wcaps_channels(chans);
102
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103 info->name = intel_hdmi_pcm_names[i];
104 info->pcm_type = HDA_PCM_TYPE_HDMI;
105 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
106 intel_hdmi_pcm_playback;
107 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
69fb3468 108 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
54a25f87 109 }
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110
111 return 0;
112}
113
114static int intel_hdmi_build_controls(struct hda_codec *codec)
115{
079d88cc 116 struct hdmi_spec *spec = codec->spec;
91504877 117 int err;
54a25f87 118 int i;
91504877 119
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120 for (i = 0; i < codec->num_pcms; i++) {
121 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
122 if (err < 0)
123 return err;
124 }
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125
126 return 0;
127}
128
129static int intel_hdmi_init(struct hda_codec *codec)
130{
079d88cc 131 struct hdmi_spec *spec = codec->spec;
54a25f87 132 int i;
91504877 133
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134 for (i = 0; spec->pin[i]; i++) {
135 hdmi_enable_output(codec, spec->pin[i]);
136 snd_hda_codec_write(codec, spec->pin[i], 0,
137 AC_VERB_SET_UNSOLICITED_ENABLE,
138 AC_USRSP_EN | spec->pin[i]);
139 }
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140 return 0;
141}
142
143static void intel_hdmi_free(struct hda_codec *codec)
144{
079d88cc 145 struct hdmi_spec *spec = codec->spec;
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146 int i;
147
148 for (i = 0; i < spec->num_pins; i++)
149 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
f208dba9 150
f208dba9 151 kfree(spec);
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152}
153
154static struct hda_codec_ops intel_hdmi_patch_ops = {
155 .init = intel_hdmi_init,
156 .free = intel_hdmi_free,
157 .build_pcms = intel_hdmi_build_pcms,
158 .build_controls = intel_hdmi_build_controls,
079d88cc 159 .unsol_event = hdmi_unsol_event,
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160};
161
fd080b2d 162static int patch_intel_hdmi(struct hda_codec *codec)
91504877 163{
079d88cc 164 struct hdmi_spec *spec;
54a25f87 165 int i;
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166
167 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
168 if (spec == NULL)
169 return -ENOMEM;
170
91504877 171 codec->spec = spec;
079d88cc 172 if (hdmi_parse_codec(codec) < 0) {
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173 codec->spec = NULL;
174 kfree(spec);
175 return -EINVAL;
176 }
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177 codec->patch_ops = intel_hdmi_patch_ops;
178
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179 for (i = 0; i < spec->num_pins; i++)
180 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
5f1e71b1 181
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182 init_channel_allocations();
183
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184 return 0;
185}
186
1289e9e8 187static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
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188{ .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_intel_hdmi },
189{ .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_intel_hdmi },
190{ .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_intel_hdmi },
191{ .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_intel_hdmi },
192{ .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_intel_hdmi },
193{ .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_intel_hdmi },
e48b0087 194{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_intel_hdmi },
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195{ .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
196{} /* terminator */
91504877 197};
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198
199MODULE_ALIAS("snd-hda-codec-id:808629fb");
200MODULE_ALIAS("snd-hda-codec-id:80862801");
201MODULE_ALIAS("snd-hda-codec-id:80862802");
202MODULE_ALIAS("snd-hda-codec-id:80862803");
a57c0eb6 203MODULE_ALIAS("snd-hda-codec-id:80862804");
e48b0087 204MODULE_ALIAS("snd-hda-codec-id:80862805");
87a8c370 205MODULE_ALIAS("snd-hda-codec-id:80860054");
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206MODULE_ALIAS("snd-hda-codec-id:10951392");
207
208MODULE_LICENSE("GPL");
209MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
210
211static struct hda_codec_preset_list intel_list = {
212 .preset = snd_hda_preset_intelhdmi,
213 .owner = THIS_MODULE,
214};
215
216static int __init patch_intelhdmi_init(void)
217{
218 return snd_hda_add_codec_preset(&intel_list);
219}
220
221static void __exit patch_intelhdmi_exit(void)
222{
223 snd_hda_delete_codec_preset(&intel_list);
224}
225
226module_init(patch_intelhdmi_init)
227module_exit(patch_intelhdmi_exit)
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