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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
45a6ac16 34#include <sound/jack.h>
2f2f4251
M		 35#include "hda_codec.h"
36#include "hda_local.h"
128bc4ba 37#include "hda_auto_parser.h"
1cd2224c 38#include "hda_beep.h"
1835a0f9 39#include "hda_jack.h"
36c9db7a 40#include "hda_generic.h"
2f2f4251 41
f5fcc13c
TI		 42enum {
43 STAC_REF,
bf277785 44 STAC_9200_OQO,
dfe495d0
TI		 45 STAC_9200_DELL_D21,
46 STAC_9200_DELL_D22,
47 STAC_9200_DELL_D23,
48 STAC_9200_DELL_M21,
49 STAC_9200_DELL_M22,
50 STAC_9200_DELL_M23,
51 STAC_9200_DELL_M24,
52 STAC_9200_DELL_M25,
53 STAC_9200_DELL_M26,
54 STAC_9200_DELL_M27,
58eec423
MCC		 55 STAC_9200_M4,
56 STAC_9200_M4_2,
117f257d 57 STAC_9200_PANASONIC,
d39a3ae8 58 STAC_9200_EAPD_INIT,
f5fcc13c
TI		 59 STAC_9200_MODELS
60};
61
62enum {
63 STAC_9205_REF,
dfe495d0 64 STAC_9205_DELL_M42,
ae0a8ed8
TD		 65 STAC_9205_DELL_M43,
66 STAC_9205_DELL_M44,
d9a4268e 67 STAC_9205_EAPD,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669 71enum {
9e43f0de 72 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 73 STAC_92HD73XX_REF,
ae709440 74 STAC_92HD73XX_INTEL,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
842ae638 79 STAC_ALIENWARE_M17X,
1de7ca5e 80 STAC_92HD89XX_HP_FRONT_JACK,
7440850c 81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
6426460e 82 STAC_92HD73XX_ASUS_MOBO,
e1f0d669
MR		 83 STAC_92HD73XX_MODELS
84};
85
d0513fc6
MR		 86enum {
87 STAC_92HD83XXX_REF,
32ed3f46 88 STAC_92HD83XXX_PWR_REF,
8bb0ac55 89 STAC_DELL_S14,
f7f9bdfa 90 STAC_DELL_VOSTRO_3500,
0c27c180 91 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 92 STAC_HP_DV7_4000,
5556e147 93 STAC_HP_ZEPHYR,
a3e19973 94 STAC_92HD83XXX_HP_LED,
ff8a1e27 95 STAC_92HD83XXX_HP_INV_LED,
62cbde18 96 STAC_92HD83XXX_HP_MIC_LED,
37c367ec 97 STAC_HP_LED_GPIO10,
8d032a8f 98 STAC_92HD83XXX_HEADSET_JACK,
372f8c75 99 STAC_92HD83XXX_HP,
49920427 100 STAC_HP_ENVY_BASS,
d009f3de 101 STAC_HP_BNB13_EQ,
8695a003 102 STAC_HP_ENVY_TS_BASS,
6ab42ff4 103 STAC_HP_ENVY_TS_DAC_BIND,
4227de2a 104 STAC_92HD83XXX_GPIO10_EAPD,
d0513fc6
MR		 105 STAC_92HD83XXX_MODELS
106};
107
e035b841
MR		 108enum {
109 STAC_92HD71BXX_REF,
a7662640
MR		 110 STAC_DELL_M4_1,
111 STAC_DELL_M4_2,
3a7abfd2 112 STAC_DELL_M4_3,
6a14f585 113 STAC_HP_M4,
2a6ce6e5 114 STAC_HP_DV4,
1b0652eb 115 STAC_HP_DV5,
ae6241fb 116 STAC_HP_HDX,
0f6fcb73
TI		 117 STAC_92HD71BXX_HP,
118 STAC_92HD71BXX_NO_DMIC,
119 STAC_92HD71BXX_NO_SMUX,
e035b841
MR		 120 STAC_92HD71BXX_MODELS
121};
122
8b3dfdaf
TI		 123enum {
124 STAC_92HD95_HP_LED,
125 STAC_92HD95_HP_BASS,
126 STAC_92HD95_MODELS
127};
128
8e21c34c
TD		 129enum {
130 STAC_925x_REF,
9cb36c2a
MCC		 131 STAC_M1,
132 STAC_M1_2,
133 STAC_M2,
8e21c34c 134 STAC_M2_2,
9cb36c2a
MCC		 135 STAC_M3,
136 STAC_M5,
137 STAC_M6,
8e21c34c
TD		 138 STAC_925x_MODELS
139};
140
f5fcc13c
TI		 141enum {
142 STAC_D945_REF,
143 STAC_D945GTP3,
144 STAC_D945GTP5,
5d5d3bc3
IZ		 145 STAC_INTEL_MAC_V1,
146 STAC_INTEL_MAC_V2,
147 STAC_INTEL_MAC_V3,
148 STAC_INTEL_MAC_V4,
149 STAC_INTEL_MAC_V5,
0a427846 150 STAC_INTEL_MAC_AUTO,
8c650087 151 STAC_ECS_202,
dfe495d0
TI		 152 STAC_922X_DELL_D81,
153 STAC_922X_DELL_D82,
154 STAC_922X_DELL_M81,
155 STAC_922X_DELL_M82,
0a427846 156 STAC_922X_INTEL_MAC_GPIO,
f5fcc13c
TI		 157 STAC_922X_MODELS
158};
159
160enum {
e28d8322 161 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 162 STAC_D965_REF,
163 STAC_D965_3ST,
164 STAC_D965_5ST,
679d92ed 165 STAC_D965_5ST_NO_FP,
29ac8363 166 STAC_D965_VERBS,
4ff076e5 167 STAC_DELL_3ST,
8e9068b1 168 STAC_DELL_BIOS,
eefb8be4 169 STAC_DELL_BIOS_AMIC,
29ac8363
TI		 170 STAC_DELL_BIOS_SPDIF,
171 STAC_927X_DELL_DMIC,
54930531 172 STAC_927X_VOLKNOB,
f5fcc13c
TI		 173 STAC_927X_MODELS
174};
403d1944 175
307282c8 176enum {
307282c8
TI		 177 STAC_9872_VAIO,
178 STAC_9872_MODELS
179};
180
2f2f4251 181struct sigmatel_spec {
36c9db7a 182 struct hda_gen_spec gen;
c7d4b2fa 183
c0cea0d0 184 unsigned int eapd_switch: 1;
1b0e372d 185 unsigned int linear_tone_beep:1;
8d032a8f 186 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
29ac8363 187 unsigned int volknob_init:1; /* special volume-knob initialization */
36c9db7a 188 unsigned int powerdown_adcs:1;
42875479 189 unsigned int have_spdif_mux:1;
c7d4b2fa 190
4fe5195c 191 /* gpio lines */
0fc9dec4 192 unsigned int eapd_mask;
4fe5195c
MR		 193 unsigned int gpio_mask;
194 unsigned int gpio_dir;
195 unsigned int gpio_data;
196 unsigned int gpio_mute;
86d190e7 197 unsigned int gpio_led;
c357aab0 198 unsigned int gpio_led_polarity;
f1a73746 199 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 200 unsigned int vref_led;
372f8c75 201 int default_polarity;
4fe5195c 202
62cbde18 203 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
7fe30711 204 unsigned int mic_enabled; /* current mic mute state (bitmask) */
62cbde18 205
8daaaa97
MR		 206 /* stream */
207 unsigned int stream_delay;
208
4fe5195c 209 /* analog loopback */
2b63536f 210 const struct snd_kcontrol_new *aloopback_ctl;
36c9db7a 211 unsigned int aloopback;
e1f0d669
MR		 212 unsigned char aloopback_mask;
213 unsigned char aloopback_shift;
8259980e 214
a64135a2 215 /* power management */
c882246d 216 unsigned int power_map_bits;
a64135a2 217 unsigned int num_pwrs;
2b63536f 218 const hda_nid_t *pwr_nids;
36c9db7a
TI		 219 unsigned int active_adcs;
220
221 /* beep widgets */
1cd2224c 222 hda_nid_t anabeep_nid;
42875479
TI		 223
224 /* SPDIF-out mux */
225 const char * const *spdif_labels;
226 struct hda_input_mux spdif_mux;
227 unsigned int cur_smux[2];
2f2f4251
M		 228};
229
c882246d
TI		 230#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
231#define AC_VERB_IDT_GET_POWER_MAP 0xfec
232
2b63536f 233static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 234 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
235 0x0f, 0x10, 0x11
236};
237
afef2cfa
CC		 238static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
239 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
240 0x0f, 0x10
d0513fc6
MR		 241};
242
2b63536f 243static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 244 0x0a, 0x0d, 0x0f
245};
246
f3302a59 247
36c9db7a
TI		 248/*
249 * PCM hooks
250 */
251static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
252 struct hda_codec *codec,
253 struct snd_pcm_substream *substream,
254 int action)
8b65727b 255{
8b65727b 256 struct sigmatel_spec *spec = codec->spec;
36c9db7a
TI		 257 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
258 msleep(spec->stream_delay);
8b65727b
MP		 259}
260
36c9db7a
TI		 261static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
262 struct hda_codec *codec,
263 struct snd_pcm_substream *substream,
264 int action)
8b65727b 265{
8b65727b 266 struct sigmatel_spec *spec = codec->spec;
36c9db7a 267 int i, idx = 0;
8b65727b 268
36c9db7a
TI		 269 if (!spec->powerdown_adcs)
270 return;
8b65727b 271
36c9db7a
TI		 272 for (i = 0; i < spec->gen.num_all_adcs; i++) {
273 if (spec->gen.all_adcs[i] == hinfo->nid) {
274 idx = i;
275 break;
276 }
277 }
8b65727b 278
36c9db7a
TI		 279 switch (action) {
280 case HDA_GEN_PCM_ACT_OPEN:
281 msleep(40);
282 snd_hda_codec_write(codec, hinfo->nid, 0,
283 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
284 spec->active_adcs |= (1 << idx);
285 break;
286 case HDA_GEN_PCM_ACT_CLOSE:
287 snd_hda_codec_write(codec, hinfo->nid, 0,
288 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
289 spec->active_adcs &= ~(1 << idx);
290 break;
291 }
8b65727b
MP		 292}
293
36c9db7a
TI		 294/*
295 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
296 * funky external mute control using GPIO pins.
297 */
d9737751 298
36c9db7a
TI		 299static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
300 unsigned int dir_mask, unsigned int data)
d9737751 301{
36c9db7a 302 unsigned int gpiostate, gpiomask, gpiodir;
7639a06c 303 hda_nid_t fg = codec->core.afg;
d9737751 304
4e76a883 305 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
36c9db7a 306
7639a06c 307 gpiostate = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 308 AC_VERB_GET_GPIO_DATA, 0);
309 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
310
7639a06c 311 gpiomask = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 312 AC_VERB_GET_GPIO_MASK, 0);
313 gpiomask |= mask;
314
7639a06c 315 gpiodir = snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 316 AC_VERB_GET_GPIO_DIRECTION, 0);
317 gpiodir |= dir_mask;
318
319 /* Configure GPIOx as CMOS */
7639a06c 320 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
36c9db7a 321
7639a06c 322 snd_hda_codec_write(codec, fg, 0,
36c9db7a 323 AC_VERB_SET_GPIO_MASK, gpiomask);
7639a06c 324 snd_hda_codec_read(codec, fg, 0,
36c9db7a
TI		 325 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
326
327 msleep(1);
328
7639a06c 329 snd_hda_codec_read(codec, fg, 0,
36c9db7a 330 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
d9737751
MR		 331}
332
36c9db7a 333/* hook for controlling mic-mute LED GPIO */
a90229e0 334static void stac_capture_led_hook(struct hda_codec *codec,
7fe30711
TI		 335 struct snd_kcontrol *kcontrol,
336 struct snd_ctl_elem_value *ucontrol)
d9737751 337{
d9737751 338 struct sigmatel_spec *spec = codec->spec;
7fe30711
TI		 339 unsigned int mask;
340 bool cur_mute, prev_mute;
00ef50c2 341
7fe30711 342 if (!kcontrol || !ucontrol)
a90229e0
TI		 343 return;
344
7fe30711
TI		 345 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
346 prev_mute = !spec->mic_enabled;
347 if (ucontrol->value.integer.value[0] ||
348 ucontrol->value.integer.value[1])
349 spec->mic_enabled |= mask;
350 else
351 spec->mic_enabled &= ~mask;
352 cur_mute = !spec->mic_enabled;
353 if (cur_mute != prev_mute) {
354 if (cur_mute)
36c9db7a 355 spec->gpio_data |= spec->mic_mute_led_gpio;
00ef50c2 356 else
36c9db7a
TI		 357 spec->gpio_data &= ~spec->mic_mute_led_gpio;
358 stac_gpio_set(codec, spec->gpio_mask,
359 spec->gpio_dir, spec->gpio_data);
00ef50c2 360 }
d9737751
MR		 361}
362
45eebda7
VK		 363static int stac_vrefout_set(struct hda_codec *codec,
364 hda_nid_t nid, unsigned int new_vref)
365{
366 int error, pinctl;
367
4e76a883 368 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
45eebda7
VK		 369 pinctl = snd_hda_codec_read(codec, nid, 0,
370 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
371
372 if (pinctl < 0)
373 return pinctl;
374
375 pinctl &= 0xff;
376 pinctl &= ~AC_PINCTL_VREFEN;
377 pinctl |= (new_vref & AC_PINCTL_VREFEN);
378
cdd03ced 379 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 380 if (error < 0)
381 return error;
382
383 return 1;
384}
385
dfc6e469
TI		 386/* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
387/* this hook is set in stac_setup_gpio() */
388static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
389 hda_nid_t nid,
390 unsigned int power_state)
391{
7639a06c 392 if (nid == codec->core.afg && power_state == AC_PWRST_D3)
dfc6e469
TI		 393 return AC_PWRST_D1;
394 return snd_hda_gen_path_power_filter(codec, nid, power_state);
395}
396
36c9db7a
TI		 397/* update mute-LED accoring to the master switch */
398static void stac_update_led_status(struct hda_codec *codec, int enabled)
2f2f4251 399{
2f2f4251 400 struct sigmatel_spec *spec = codec->spec;
36c9db7a 401 int muted = !enabled;
2f2f4251 402
36c9db7a
TI		 403 if (!spec->gpio_led)
404 return;
2f2f4251 405
36c9db7a
TI		 406 /* LED state is inverted on these systems */
407 if (spec->gpio_led_polarity)
408 muted = !muted;
2f2f4251 409
36c9db7a
TI		 410 if (!spec->vref_mute_led_nid) {
411 if (muted)
412 spec->gpio_data |= spec->gpio_led;
413 else
414 spec->gpio_data &= ~spec->gpio_led;
415 stac_gpio_set(codec, spec->gpio_mask,
416 spec->gpio_dir, spec->gpio_data);
5207e10e 417 } else {
36c9db7a
TI		 418 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
419 stac_vrefout_set(codec, spec->vref_mute_led_nid,
420 spec->vref_led);
5207e10e 421 }
2f2f4251
M		 422}
423
36c9db7a
TI		 424/* vmaster hook to update mute LED */
425static void stac_vmaster_hook(void *private_data, int val)
b22b4821 426{
36c9db7a 427 stac_update_led_status(private_data, val);
b22b4821
MR		 428}
429
36c9db7a
TI		 430/* automute hook to handle GPIO mute and EAPD updates */
431static void stac_update_outputs(struct hda_codec *codec)
b22b4821 432{
b22b4821
MR		 433 struct sigmatel_spec *spec = codec->spec;
434
36c9db7a
TI		 435 if (spec->gpio_mute)
436 spec->gen.master_mute =
7639a06c 437 !(snd_hda_codec_read(codec, codec->core.afg, 0,
36c9db7a 438 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
b22b4821 439
36c9db7a 440 snd_hda_gen_update_outputs(codec);
b22b4821 441
36c9db7a
TI		 442 if (spec->eapd_mask && spec->eapd_switch) {
443 unsigned int val = spec->gpio_data;
444 if (spec->gen.speaker_muted)
445 val &= ~spec->eapd_mask;
446 else
447 val |= spec->eapd_mask;
1ea9a69d
TI		 448 if (spec->gpio_data != val) {
449 spec->gpio_data = val;
36c9db7a
TI		 450 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
451 val);
1ea9a69d 452 }
36c9db7a 453 }
b22b4821
MR		 454}
455
36c9db7a
TI		 456static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
457 bool enable, bool do_write)
5f10c4a9 458{
5f10c4a9 459 struct sigmatel_spec *spec = codec->spec;
36c9db7a 460 unsigned int idx, val;
5f10c4a9 461
36c9db7a
TI		 462 for (idx = 0; idx < spec->num_pwrs; idx++) {
463 if (spec->pwr_nids[idx] == nid)
464 break;
465 }
466 if (idx >= spec->num_pwrs)
467 return;
468
469 idx = 1 << idx;
470
471 val = spec->power_map_bits;
472 if (enable)
473 val &= ~idx;
474 else
475 val |= idx;
476
477 /* power down unused output ports */
478 if (val != spec->power_map_bits) {
479 spec->power_map_bits = val;
480 if (do_write)
7639a06c 481 snd_hda_codec_write(codec, codec->core.afg, 0,
36c9db7a
TI		 482 AC_VERB_IDT_SET_POWER_MAP, val);
483 }
484}
485
486/* update power bit per jack plug/unplug */
487static void jack_update_power(struct hda_codec *codec,
1a4f69d5 488 struct hda_jack_callback *jack)
36c9db7a
TI		 489{
490 struct sigmatel_spec *spec = codec->spec;
491 int i;
492
493 if (!spec->num_pwrs)
494 return;
495
2ebab40e
TI		 496 if (jack && jack->nid) {
497 stac_toggle_power_map(codec, jack->nid,
498 snd_hda_jack_detect(codec, jack->nid),
36c9db7a
TI		 499 true);
500 return;
501 }
502
503 /* update all jacks */
504 for (i = 0; i < spec->num_pwrs; i++) {
505 hda_nid_t nid = spec->pwr_nids[i];
1a4f69d5 506 if (!snd_hda_jack_tbl_get(codec, nid))
36c9db7a 507 continue;
62f949bf
TI		 508 stac_toggle_power_map(codec, nid,
509 snd_hda_jack_detect(codec, nid),
510 false);
36c9db7a
TI		 511 }
512
7639a06c
TI		 513 snd_hda_codec_write(codec, codec->core.afg, 0,
514 AC_VERB_IDT_SET_POWER_MAP,
36c9db7a
TI		 515 spec->power_map_bits);
516}
517
1a4f69d5
TI		 518static void stac_vref_event(struct hda_codec *codec,
519 struct hda_jack_callback *event)
36c9db7a
TI		 520{
521 unsigned int data;
522
7639a06c 523 data = snd_hda_codec_read(codec, codec->core.afg, 0,
36c9db7a
TI		 524 AC_VERB_GET_GPIO_DATA, 0);
525 /* toggle VREF state based on GPIOx status */
7639a06c 526 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
36c9db7a
TI		 527 !!(data & (1 << event->private_data)));
528}
529
530/* initialize the power map and enable the power event to jacks that
531 * haven't been assigned to automute
532 */
533static void stac_init_power_map(struct hda_codec *codec)
534{
535 struct sigmatel_spec *spec = codec->spec;
536 int i;
537
538 for (i = 0; i < spec->num_pwrs; i++) {
539 hda_nid_t nid = spec->pwr_nids[i];
540 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
541 def_conf = get_defcfg_connect(def_conf);
36c9db7a 542 if (def_conf == AC_JACK_PORT_COMPLEX &&
7a9744cb
TI		 543 spec->vref_mute_led_nid != nid &&
544 is_jack_detectable(codec, nid)) {
36c9db7a 545 snd_hda_jack_detect_enable_callback(codec, nid,
36c9db7a
TI		 546 jack_update_power);
547 } else {
548 if (def_conf == AC_JACK_PORT_NONE)
549 stac_toggle_power_map(codec, nid, false, false);
550 else
551 stac_toggle_power_map(codec, nid, true, false);
552 }
553 }
554}
555
556/*
557 */
558
559static inline bool get_int_hint(struct hda_codec *codec, const char *key,
560 int *valp)
561{
562 return !snd_hda_get_int_hint(codec, key, valp);
563}
564
565/* override some hints from the hwdep entry */
566static void stac_store_hints(struct hda_codec *codec)
567{
568 struct sigmatel_spec *spec = codec->spec;
569 int val;
570
571 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
572 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
573 spec->gpio_mask;
574 }
575 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
36c9db7a 576 spec->gpio_dir &= spec->gpio_mask;
c507de88
TI		 577 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
578 spec->gpio_data &= spec->gpio_mask;
36c9db7a
TI		 579 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
580 spec->eapd_mask &= spec->gpio_mask;
581 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
582 spec->gpio_mute &= spec->gpio_mask;
583 val = snd_hda_get_bool_hint(codec, "eapd_switch");
584 if (val >= 0)
585 spec->eapd_switch = val;
586}
587
588/*
589 * loopback controls
590 */
591
592#define stac_aloopback_info snd_ctl_boolean_mono_info
593
594static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
595 struct snd_ctl_elem_value *ucontrol)
596{
597 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
598 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
599 struct sigmatel_spec *spec = codec->spec;
600
601 ucontrol->value.integer.value[0] = !!(spec->aloopback &
602 (spec->aloopback_mask << idx));
603 return 0;
5f10c4a9
ML		 604}
605
36c9db7a
TI		 606static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
607 struct snd_ctl_elem_value *ucontrol)
5f10c4a9
ML		 608{
609 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
610 struct sigmatel_spec *spec = codec->spec;
e1f0d669 611 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 612 unsigned int dac_mode;
e1f0d669 613 unsigned int val, idx_val;
5f10c4a9 614
e1f0d669
MR		 615 idx_val = spec->aloopback_mask << idx;
616 if (ucontrol->value.integer.value[0])
617 val = spec->aloopback | idx_val;
618 else
619 val = spec->aloopback & ~idx_val;
68ea7b2f 620 if (spec->aloopback == val)
5f10c4a9
ML		 621 return 0;
622
68ea7b2f 623 spec->aloopback = val;
5f10c4a9 624
e1f0d669
MR		 625 /* Only return the bits defined by the shift value of the
626 * first two bytes of the mask
627 */
7639a06c 628 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
e1f0d669
MR		 629 kcontrol->private_value & 0xFFFF, 0x0);
630 dac_mode >>= spec->aloopback_shift;
5f10c4a9 631
e1f0d669 632 if (spec->aloopback & idx_val) {
5f10c4a9 633 snd_hda_power_up(codec);
e1f0d669 634 dac_mode |= idx_val;
5f10c4a9
ML		 635 } else {
636 snd_hda_power_down(codec);
e1f0d669 637 dac_mode &= ~idx_val;
5f10c4a9
ML		 638 }
639
7639a06c 640 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
5f10c4a9
ML		 641 kcontrol->private_value >> 16, dac_mode);
642
643 return 1;
644}
645
e1f0d669 646#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 647 { \
648 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
649 .name = "Analog Loopback", \
e1f0d669 650 .count = cnt, \
36c9db7a
TI		 651 .info = stac_aloopback_info, \
652 .get = stac_aloopback_get, \
653 .put = stac_aloopback_put, \
5f10c4a9
ML		 654 .private_value = verb_read | (verb_write << 16), \
655 }
656
36c9db7a
TI		 657/*
658 * Mute LED handling on HP laptops
659 */
2fc99890 660
36c9db7a
TI		 661/* check whether it's a HP laptop with a docking port */
662static bool hp_bnb2011_with_dock(struct hda_codec *codec)
663{
7639a06c
TI		 664 if (codec->core.vendor_id != 0x111d7605 &&
665 codec->core.vendor_id != 0x111d76d1)
36c9db7a 666 return false;
2f2f4251 667
7639a06c 668 switch (codec->core.subsystem_id) {
36c9db7a
TI		 669 case 0x103c1618:
670 case 0x103c1619:
671 case 0x103c161a:
672 case 0x103c161b:
673 case 0x103c161c:
674 case 0x103c161d:
675 case 0x103c161e:
676 case 0x103c161f:
d78d7a90 677
36c9db7a
TI		 678 case 0x103c162a:
679 case 0x103c162b:
e1f0d669 680
36c9db7a
TI		 681 case 0x103c1630:
682 case 0x103c1631:
d78d7a90 683
36c9db7a
TI		 684 case 0x103c1633:
685 case 0x103c1634:
686 case 0x103c1635:
d0513fc6 687
36c9db7a
TI		 688 case 0x103c3587:
689 case 0x103c3588:
690 case 0x103c3589:
691 case 0x103c358a:
541eee87 692
36c9db7a
TI		 693 case 0x103c3667:
694 case 0x103c3668:
695 case 0x103c3669:
2f2f4251 696
36c9db7a
TI		 697 return true;
698 }
699 return false;
700}
1697055e 701
36c9db7a
TI		 702static bool hp_blike_system(u32 subsystem_id)
703{
704 switch (subsystem_id) {
c932b98c 705 case 0x103c1473: /* HP ProBook 6550b */
36c9db7a
TI		 706 case 0x103c1520:
707 case 0x103c1521:
708 case 0x103c1523:
709 case 0x103c1524:
710 case 0x103c1525:
711 case 0x103c1722:
712 case 0x103c1723:
713 case 0x103c1724:
714 case 0x103c1725:
715 case 0x103c1726:
716 case 0x103c1727:
717 case 0x103c1728:
718 case 0x103c1729:
719 case 0x103c172a:
720 case 0x103c172b:
721 case 0x103c307e:
722 case 0x103c307f:
723 case 0x103c3080:
724 case 0x103c3081:
725 case 0x103c7007:
726 case 0x103c7008:
727 return true;
728 }
729 return false;
730}
d9737751 731
36c9db7a
TI		 732static void set_hp_led_gpio(struct hda_codec *codec)
733{
734 struct sigmatel_spec *spec = codec->spec;
735 unsigned int gpio;
2134ea4f 736
36c9db7a
TI		 737 if (spec->gpio_led)
738 return;
2faa3bf1 739
7639a06c 740 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
36c9db7a
TI		 741 gpio &= AC_GPIO_IO_COUNT;
742 if (gpio > 3)
743 spec->gpio_led = 0x08; /* GPIO 3 */
744 else
745 spec->gpio_led = 0x01; /* GPIO 0 */
2faa3bf1
TI		 746}
747
36c9db7a
TI		 748/*
749 * This method searches for the mute LED GPIO configuration
750 * provided as OEM string in SMBIOS. The format of that string
751 * is HP_Mute_LED_P_G or HP_Mute_LED_P
752 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
753 * that corresponds to the NOT muted state of the master volume
754 * and G is the index of the GPIO to use as the mute LED control (0..9)
755 * If _G portion is missing it is assigned based on the codec ID
756 *
757 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
758 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
759 *
760 *
761 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
762 * SMBIOS - at least the ones I have seen do not have them - which include
763 * my own system (HP Pavilion dv6-1110ax) and my cousin's
764 * HP Pavilion dv9500t CTO.
765 * Need more information on whether it is true across the entire series.
766 * -- kunal
767 */
768static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
2f2f4251
M		 769{
770 struct sigmatel_spec *spec = codec->spec;
36c9db7a 771 const struct dmi_device *dev = NULL;
2f2f4251 772
36c9db7a
TI		 773 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
774 get_int_hint(codec, "gpio_led_polarity",
775 &spec->gpio_led_polarity);
776 return 1;
6479c631 777 }
c7d4b2fa 778
36c9db7a 779 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
e7fc4960 780 if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
36c9db7a
TI		 781 &spec->gpio_led_polarity,
782 &spec->gpio_led) == 2) {
783 unsigned int max_gpio;
7639a06c 784 max_gpio = snd_hda_param_read(codec, codec->core.afg,
36c9db7a
TI		 785 AC_PAR_GPIO_CAP);
786 max_gpio &= AC_GPIO_IO_COUNT;
787 if (spec->gpio_led < max_gpio)
788 spec->gpio_led = 1 << spec->gpio_led;
789 else
790 spec->vref_mute_led_nid = spec->gpio_led;
791 return 1;
792 }
e7fc4960 793 if (sscanf(dev->name, "HP_Mute_LED_%u",
36c9db7a
TI		 794 &spec->gpio_led_polarity) == 1) {
795 set_hp_led_gpio(codec);
796 return 1;
797 }
798 /* BIOS bug: unfilled OEM string */
799 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
800 set_hp_led_gpio(codec);
801 if (default_polarity >= 0)
802 spec->gpio_led_polarity = default_polarity;
803 else
804 spec->gpio_led_polarity = 1;
805 return 1;
00ef50c2 806 }
d9737751 807 }
c7d4b2fa 808
36c9db7a
TI		 809 /*
810 * Fallback case - if we don't find the DMI strings,
811 * we statically set the GPIO - if not a B-series system
812 * and default polarity is provided
813 */
7639a06c 814 if (!hp_blike_system(codec->core.subsystem_id) &&
36c9db7a
TI		 815 (default_polarity == 0 || default_polarity == 1)) {
816 set_hp_led_gpio(codec);
817 spec->gpio_led_polarity = default_polarity;
818 return 1;
dabbed6f 819 }
36c9db7a
TI		 820 return 0;
821}
2134ea4f 822
303985f8
DH		 823/* check whether a built-in speaker is included in parsed pins */
824static bool has_builtin_speaker(struct hda_codec *codec)
825{
826 struct sigmatel_spec *spec = codec->spec;
827 hda_nid_t *nid_pin;
828 int nids, i;
829
830 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
831 nid_pin = spec->gen.autocfg.line_out_pins;
832 nids = spec->gen.autocfg.line_outs;
833 } else {
834 nid_pin = spec->gen.autocfg.speaker_pins;
835 nids = spec->gen.autocfg.speaker_outs;
836 }
837
838 for (i = 0; i < nids; i++) {
839 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
840 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
841 return true;
842 }
843 return false;
844}
845
36c9db7a
TI		 846/*
847 * PC beep controls
848 */
2faa3bf1 849
36c9db7a
TI		 850/* create PC beep volume controls */
851static int stac_auto_create_beep_ctls(struct hda_codec *codec,
852 hda_nid_t nid)
853{
854 struct sigmatel_spec *spec = codec->spec;
855 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
856 struct snd_kcontrol_new *knew;
857 static struct snd_kcontrol_new abeep_mute_ctl =
858 HDA_CODEC_MUTE(NULL, 0, 0, 0);
859 static struct snd_kcontrol_new dbeep_mute_ctl =
860 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
861 static struct snd_kcontrol_new beep_vol_ctl =
862 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
2faa3bf1 863
36c9db7a
TI		 864 /* check for mute support for the the amp */
865 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
866 const struct snd_kcontrol_new *temp;
867 if (spec->anabeep_nid == nid)
868 temp = &abeep_mute_ctl;
869 else
870 temp = &dbeep_mute_ctl;
871 knew = snd_hda_gen_add_kctl(&spec->gen,
872 "Beep Playback Switch", temp);
873 if (!knew)
874 return -ENOMEM;
875 knew->private_value =
876 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
2134ea4f
TI		 877 }
878
36c9db7a
TI		 879 /* check to see if there is volume support for the amp */
880 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
881 knew = snd_hda_gen_add_kctl(&spec->gen,
882 "Beep Playback Volume",
883 &beep_vol_ctl);
884 if (!knew)
885 return -ENOMEM;
886 knew->private_value =
887 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
d78d7a90 888 }
36c9db7a
TI		 889 return 0;
890}
d78d7a90 891
36c9db7a
TI		 892#ifdef CONFIG_SND_HDA_INPUT_BEEP
893#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
e4973e1e 894
36c9db7a
TI		 895static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
896 struct snd_ctl_elem_value *ucontrol)
897{
898 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
899 ucontrol->value.integer.value[0] = codec->beep->enabled;
900 return 0;
901}
e4973e1e 902
36c9db7a
TI		 903static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
904 struct snd_ctl_elem_value *ucontrol)
905{
906 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
907 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
2f2f4251
M		 908}
909
36c9db7a
TI		 910static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
911 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
912 .name = "Beep Playback Switch",
913 .info = stac_dig_beep_switch_info,
914 .get = stac_dig_beep_switch_get,
915 .put = stac_dig_beep_switch_put,
2f2f4251
M		 916};
917
36c9db7a
TI		 918static int stac_beep_switch_ctl(struct hda_codec *codec)
919{
920 struct sigmatel_spec *spec = codec->spec;
921
922 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
923 return -ENOMEM;
924 return 0;
925}
926#endif
927
42875479
TI		 928/*
929 * SPDIF-out mux controls
930 */
931
932static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
933 struct snd_ctl_elem_info *uinfo)
934{
935 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
936 struct sigmatel_spec *spec = codec->spec;
937 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
938}
939
940static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
941 struct snd_ctl_elem_value *ucontrol)
942{
943 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
944 struct sigmatel_spec *spec = codec->spec;
945 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
946
947 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
948 return 0;
949}
950
951static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
952 struct snd_ctl_elem_value *ucontrol)
953{
954 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
955 struct sigmatel_spec *spec = codec->spec;
956 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
957
958 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
959 spec->gen.autocfg.dig_out_pins[smux_idx],
960 &spec->cur_smux[smux_idx]);
961}
962
963static struct snd_kcontrol_new stac_smux_mixer = {
964 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
965 .name = "IEC958 Playback Source",
966 /* count set later */
967 .info = stac_smux_enum_info,
968 .get = stac_smux_enum_get,
969 .put = stac_smux_enum_put,
970};
971
972static const char * const stac_spdif_labels[] = {
973 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
974};
975
976static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
977{
978 struct sigmatel_spec *spec = codec->spec;
979 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
980 const char * const *labels = spec->spdif_labels;
981 struct snd_kcontrol_new *kctl;
982 int i, num_cons;
983
984 if (cfg->dig_outs < 1)
985 return 0;
986
987 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
988 if (num_cons <= 1)
989 return 0;
990
991 if (!labels)
992 labels = stac_spdif_labels;
993 for (i = 0; i < num_cons; i++) {
994 if (snd_BUG_ON(!labels[i]))
995 return -EINVAL;
6194b99d 996 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
42875479
TI		 997 }
998
999 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1000 if (!kctl)
1001 return -ENOMEM;
1002 kctl->count = cfg->dig_outs;
1003
1004 return 0;
1005}
1006
36c9db7a
TI		 1007/*
1008 */
1009
1010static const struct hda_verb stac9200_core_init[] = {
1011 /* set dac0mux for dac converter */
1012 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
d39a3ae8 1013 {}
58eec423 1014};
d39a3ae8 1015
36c9db7a
TI		 1016static const struct hda_verb stac9200_eapd_init[] = {
1017 /* set dac0mux for dac converter */
1018 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1019 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
d39a3ae8 1020 {}
58eec423
MCC		 1021};
1022
36c9db7a
TI		 1023static const struct hda_verb dell_eq_core_init[] = {
1024 /* set master volume to max value without distortion
1025 * and direct control */
1026 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d39a3ae8 1027 {}
dfe495d0
TI		 1028};
1029
36c9db7a
TI		 1030static const struct hda_verb stac92hd73xx_core_init[] = {
1031 /* set master volume and direct control */
1032 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d39a3ae8 1033 {}
dfe495d0
TI		 1034};
1035
36c9db7a
TI		 1036static const struct hda_verb stac92hd83xxx_core_init[] = {
1037 /* power state controls amps */
1038 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1039 {}
1040};
1041
1042static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1043 { 0x22, 0x785, 0x43 },
1044 { 0x22, 0x782, 0xe0 },
1045 { 0x22, 0x795, 0x00 },
1046 {}
1047};
1048
1049static const struct hda_verb stac92hd71bxx_core_init[] = {
1050 /* set master volume and direct control */
1051 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1052 {}
1053};
1054
a551d914 1055static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
36c9db7a 1056 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
a551d914 1057 0x0f, 0x0a, 0x0d, 0
36c9db7a
TI		 1058};
1059
1060static const struct hda_verb stac925x_core_init[] = {
1061 /* set dac0mux for dac converter */
1062 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1063 /* mute the master volume */
1064 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1065 {}
1066};
1067
1068static const struct hda_verb stac922x_core_init[] = {
1069 /* set master volume and direct control */
1070 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1071 {}
1072};
1073
1074static const struct hda_verb d965_core_init[] = {
1075 /* unmute node 0x1b */
1076 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1077 /* select node 0x03 as DAC */
1078 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1079 {}
1080};
1081
1082static const struct hda_verb dell_3st_core_init[] = {
1083 /* don't set delta bit */
1084 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1085 /* unmute node 0x1b */
1086 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1087 /* select node 0x03 as DAC */
1088 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1089 {}
1090};
1091
1092static const struct hda_verb stac927x_core_init[] = {
1093 /* set master volume and direct control */
1094 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1095 /* enable analog pc beep path */
1096 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1097 {}
1098};
1099
1100static const struct hda_verb stac927x_volknob_core_init[] = {
1101 /* don't set delta bit */
1102 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1103 /* enable analog pc beep path */
1104 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1105 {}
1106};
1107
1108static const struct hda_verb stac9205_core_init[] = {
1109 /* set master volume and direct control */
1110 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1111 /* enable analog pc beep path */
1112 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1113 {}
1114};
1115
1116static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1117 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1118
1119static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1120 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1121
1122static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1123 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1124
1125static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1126 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1127
1128static const struct snd_kcontrol_new stac9205_loopback =
1129 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1130
1131static const struct snd_kcontrol_new stac927x_loopback =
1132 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1133
1134static const struct hda_pintbl ref9200_pin_configs[] = {
1135 { 0x08, 0x01c47010 },
1136 { 0x09, 0x01447010 },
1137 { 0x0d, 0x0221401f },
1138 { 0x0e, 0x01114010 },
1139 { 0x0f, 0x02a19020 },
1140 { 0x10, 0x01a19021 },
1141 { 0x11, 0x90100140 },
1142 { 0x12, 0x01813122 },
1143 {}
1144};
1145
1146static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1147 { 0x08, 0x400000fe },
1148 { 0x09, 0x404500f4 },
1149 { 0x0d, 0x400100f0 },
1150 { 0x0e, 0x90110010 },
1151 { 0x0f, 0x400100f1 },
1152 { 0x10, 0x02a1902e },
1153 { 0x11, 0x500000f2 },
1154 { 0x12, 0x500000f3 },
1155 {}
1156};
1157
1158static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1159 { 0x08, 0x400000fe },
1160 { 0x09, 0x404500f4 },
1161 { 0x0d, 0x400100f0 },
1162 { 0x0e, 0x90110010 },
1163 { 0x0f, 0x400100f1 },
1164 { 0x10, 0x02a1902e },
1165 { 0x11, 0x500000f2 },
1166 { 0x12, 0x500000f3 },
1167 {}
1168};
1169
1170/*
1171 STAC 9200 pin configs for
1172 102801A8
1173 102801DE
1174 102801E8
1175*/
1176static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1177 { 0x08, 0x400001f0 },
1178 { 0x09, 0x400001f1 },
1179 { 0x0d, 0x02214030 },
1180 { 0x0e, 0x01014010 },
1181 { 0x0f, 0x02a19020 },
1182 { 0x10, 0x01a19021 },
1183 { 0x11, 0x90100140 },
1184 { 0x12, 0x01813122 },
1185 {}
1186};
1187
1188/*
1189 STAC 9200 pin configs for
1190 102801C0
1191 102801C1
1192*/
1193static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1194 { 0x08, 0x400001f0 },
1195 { 0x09, 0x400001f1 },
1196 { 0x0d, 0x0221401f },
1197 { 0x0e, 0x01014010 },
1198 { 0x0f, 0x01813020 },
1199 { 0x10, 0x02a19021 },
1200 { 0x11, 0x90100140 },
1201 { 0x12, 0x400001f2 },
1202 {}
1203};
1204
1205/*
dfe495d0
TI		 1206 STAC 9200 pin configs for
1207 102801C4 (Dell Dimension E310)
1208 102801C5
1209 102801C7
1210 102801D9
1211 102801DA
1212 102801E3
1213*/
d39a3ae8
TI		 1214static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1215 { 0x08, 0x400001f0 },
1216 { 0x09, 0x400001f1 },
1217 { 0x0d, 0x0221401f },
1218 { 0x0e, 0x01014010 },
1219 { 0x0f, 0x01813020 },
1220 { 0x10, 0x01a19021 },
1221 { 0x11, 0x90100140 },
1222 { 0x12, 0x400001f2 },
1223 {}
dfe495d0
TI		 1224};
1225
1226
1227/*
1228 STAC 9200-32 pin configs for
1229 102801B5 (Dell Inspiron 630m)
1230 102801D8 (Dell Inspiron 640m)
1231*/
d39a3ae8
TI		 1232static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1233 { 0x08, 0x40c003fa },
1234 { 0x09, 0x03441340 },
1235 { 0x0d, 0x0321121f },
1236 { 0x0e, 0x90170310 },
1237 { 0x0f, 0x408003fb },
1238 { 0x10, 0x03a11020 },
1239 { 0x11, 0x401003fc },
1240 { 0x12, 0x403003fd },
1241 {}
dfe495d0
TI		 1242};
1243
1244/*
1245 STAC 9200-32 pin configs for
1246 102801C2 (Dell Latitude D620)
1247 102801C8
1248 102801CC (Dell Latitude D820)
1249 102801D4
1250 102801D6
1251*/
d39a3ae8
TI		 1252static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1253 { 0x08, 0x40c003fa },
1254 { 0x09, 0x0144131f },
1255 { 0x0d, 0x0321121f },
1256 { 0x0e, 0x90170310 },
1257 { 0x0f, 0x90a70321 },
1258 { 0x10, 0x03a11020 },
1259 { 0x11, 0x401003fb },
1260 { 0x12, 0x40f000fc },
1261 {}
dfe495d0
TI		 1262};
1263
1264/*
1265 STAC 9200-32 pin configs for
1266 102801CE (Dell XPS M1710)
1267 102801CF (Dell Precision M90)
1268*/
d39a3ae8
TI		 1269static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1270 { 0x08, 0x40c003fa },
1271 { 0x09, 0x01441340 },
1272 { 0x0d, 0x0421421f },
1273 { 0x0e, 0x90170310 },
1274 { 0x0f, 0x408003fb },
1275 { 0x10, 0x04a1102e },
1276 { 0x11, 0x90170311 },
1277 { 0x12, 0x403003fc },
1278 {}
dfe495d0
TI		 1279};
1280
1281/*
1282 STAC 9200-32 pin configs for
1283 102801C9
1284 102801CA
1285 102801CB (Dell Latitude 120L)
1286 102801D3
1287*/
d39a3ae8
TI		 1288static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1289 { 0x08, 0x40c003fa },
1290 { 0x09, 0x404003fb },
1291 { 0x0d, 0x0321121f },
1292 { 0x0e, 0x90170310 },
1293 { 0x0f, 0x408003fc },
1294 { 0x10, 0x03a11020 },
1295 { 0x11, 0x401003fd },
1296 { 0x12, 0x403003fe },
1297 {}
dfe495d0
TI		 1298};
1299
1300/*
1301 STAC 9200-32 pin configs for
1302 102801BD (Dell Inspiron E1505n)
1303 102801EE
1304 102801EF
1305*/
d39a3ae8
TI		 1306static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1307 { 0x08, 0x40c003fa },
1308 { 0x09, 0x01441340 },
1309 { 0x0d, 0x0421121f },
1310 { 0x0e, 0x90170310 },
1311 { 0x0f, 0x408003fb },
1312 { 0x10, 0x04a11020 },
1313 { 0x11, 0x401003fc },
1314 { 0x12, 0x403003fd },
1315 {}
dfe495d0
TI		 1316};
1317
1318/*
1319 STAC 9200-32 pin configs for
1320 102801F5 (Dell Inspiron 1501)
1321 102801F6
1322*/
d39a3ae8
TI		 1323static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1324 { 0x08, 0x40c003fa },
1325 { 0x09, 0x404003fb },
1326 { 0x0d, 0x0421121f },
1327 { 0x0e, 0x90170310 },
1328 { 0x0f, 0x408003fc },
1329 { 0x10, 0x04a11020 },
1330 { 0x11, 0x401003fd },
1331 { 0x12, 0x403003fe },
1332 {}
dfe495d0
TI		 1333};
1334
1335/*
1336 STAC 9200-32
1337 102801CD (Dell Inspiron E1705/9400)
1338*/
d39a3ae8
TI		 1339static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1340 { 0x08, 0x40c003fa },
1341 { 0x09, 0x01441340 },
1342 { 0x0d, 0x0421121f },
1343 { 0x0e, 0x90170310 },
1344 { 0x0f, 0x90170310 },
1345 { 0x10, 0x04a11020 },
1346 { 0x11, 0x90170310 },
1347 { 0x12, 0x40f003fc },
1348 {}
dfe495d0
TI		 1349};
1350
d39a3ae8
TI		 1351static const struct hda_pintbl oqo9200_pin_configs[] = {
1352 { 0x08, 0x40c000f0 },
1353 { 0x09, 0x404000f1 },
1354 { 0x0d, 0x0221121f },
1355 { 0x0e, 0x02211210 },
1356 { 0x0f, 0x90170111 },
1357 { 0x10, 0x90a70120 },
1358 { 0x11, 0x400000f2 },
1359 { 0x12, 0x400000f3 },
1360 {}
bf277785
TD		 1361};
1362
dfe495d0 1363
d39a3ae8
TI		 1364static void stac9200_fixup_panasonic(struct hda_codec *codec,
1365 const struct hda_fixup *fix, int action)
1366{
1367 struct sigmatel_spec *spec = codec->spec;
1368
36c9db7a 1369 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
d39a3ae8
TI		 1370 spec->gpio_mask = spec->gpio_dir = 0x09;
1371 spec->gpio_data = 0x00;
d39a3ae8
TI		 1372 /* CF-74 has no headphone detection, and the driver should *NOT*
1373 * do detection and HP/speaker toggle because the hardware does it.
1374 */
36c9db7a 1375 spec->gen.suppress_auto_mute = 1;
d39a3ae8
TI		 1376 }
1377}
1378
1379
1380static const struct hda_fixup stac9200_fixups[] = {
1381 [STAC_REF] = {
1382 .type = HDA_FIXUP_PINS,
1383 .v.pins = ref9200_pin_configs,
1384 },
1385 [STAC_9200_OQO] = {
1386 .type = HDA_FIXUP_PINS,
1387 .v.pins = oqo9200_pin_configs,
1388 .chained = true,
1389 .chain_id = STAC_9200_EAPD_INIT,
1390 },
1391 [STAC_9200_DELL_D21] = {
1392 .type = HDA_FIXUP_PINS,
1393 .v.pins = dell9200_d21_pin_configs,
1394 },
1395 [STAC_9200_DELL_D22] = {
1396 .type = HDA_FIXUP_PINS,
1397 .v.pins = dell9200_d22_pin_configs,
1398 },
1399 [STAC_9200_DELL_D23] = {
1400 .type = HDA_FIXUP_PINS,
1401 .v.pins = dell9200_d23_pin_configs,
1402 },
1403 [STAC_9200_DELL_M21] = {
1404 .type = HDA_FIXUP_PINS,
1405 .v.pins = dell9200_m21_pin_configs,
1406 },
1407 [STAC_9200_DELL_M22] = {
1408 .type = HDA_FIXUP_PINS,
1409 .v.pins = dell9200_m22_pin_configs,
1410 },
1411 [STAC_9200_DELL_M23] = {
1412 .type = HDA_FIXUP_PINS,
1413 .v.pins = dell9200_m23_pin_configs,
1414 },
1415 [STAC_9200_DELL_M24] = {
1416 .type = HDA_FIXUP_PINS,
1417 .v.pins = dell9200_m24_pin_configs,
1418 },
1419 [STAC_9200_DELL_M25] = {
1420 .type = HDA_FIXUP_PINS,
1421 .v.pins = dell9200_m25_pin_configs,
1422 },
1423 [STAC_9200_DELL_M26] = {
1424 .type = HDA_FIXUP_PINS,
1425 .v.pins = dell9200_m26_pin_configs,
1426 },
1427 [STAC_9200_DELL_M27] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = dell9200_m27_pin_configs,
1430 },
1431 [STAC_9200_M4] = {
1432 .type = HDA_FIXUP_PINS,
1433 .v.pins = gateway9200_m4_pin_configs,
1434 .chained = true,
1435 .chain_id = STAC_9200_EAPD_INIT,
1436 },
1437 [STAC_9200_M4_2] = {
1438 .type = HDA_FIXUP_PINS,
1439 .v.pins = gateway9200_m4_2_pin_configs,
1440 .chained = true,
1441 .chain_id = STAC_9200_EAPD_INIT,
1442 },
1443 [STAC_9200_PANASONIC] = {
1444 .type = HDA_FIXUP_FUNC,
1445 .v.func = stac9200_fixup_panasonic,
1446 },
1447 [STAC_9200_EAPD_INIT] = {
1448 .type = HDA_FIXUP_VERBS,
1449 .v.verbs = (const struct hda_verb[]) {
1450 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1451 {}
1452 },
1453 },
403d1944
MP		 1454};
1455
d39a3ae8
TI		 1456static const struct hda_model_fixup stac9200_models[] = {
1457 { .id = STAC_REF, .name = "ref" },
1458 { .id = STAC_9200_OQO, .name = "oqo" },
1459 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1460 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1461 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1462 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1463 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1464 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1465 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1466 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1467 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1468 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1469 { .id = STAC_9200_M4, .name = "gateway-m4" },
1470 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1471 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1472 {}
1473};
1474
1475static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
f5fcc13c
TI		 1476 /* SigmaTel reference board */
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1478 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1480 "DFI LanParty", STAC_REF),
e7377071 1481 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1483 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1485 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1487 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1489 "unknown Dell", STAC_9200_DELL_D22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1491 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1493 "Dell Latitude D620", STAC_9200_DELL_M22),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1495 "unknown Dell", STAC_9200_DELL_D23),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1497 "unknown Dell", STAC_9200_DELL_D23),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1499 "unknown Dell", STAC_9200_DELL_M22),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1501 "unknown Dell", STAC_9200_DELL_M24),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1503 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1505 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1507 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1509 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1511 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1513 "Dell Precision M90", STAC_9200_DELL_M23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1515 "unknown Dell", STAC_9200_DELL_M22),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1517 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1519 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1521 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1523 "unknown Dell", STAC_9200_DELL_D23),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1525 "unknown Dell", STAC_9200_DELL_D23),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1527 "unknown Dell", STAC_9200_DELL_D21),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1529 "unknown Dell", STAC_9200_DELL_D23),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1531 "unknown Dell", STAC_9200_DELL_D21),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1533 "unknown Dell", STAC_9200_DELL_M25),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1535 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1537 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1539 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1540 /* Panasonic */
117f257d 1541 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1542 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1543 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1544 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1545 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1546 /* OQO Mobile */
1547 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1548 {} /* terminator */
1549};
1550
d2077d40
TI		 1551static const struct hda_pintbl ref925x_pin_configs[] = {
1552 { 0x07, 0x40c003f0 },
1553 { 0x08, 0x424503f2 },
1554 { 0x0a, 0x01813022 },
1555 { 0x0b, 0x02a19021 },
1556 { 0x0c, 0x90a70320 },
1557 { 0x0d, 0x02214210 },
1558 { 0x10, 0x01019020 },
1559 { 0x11, 0x9033032e },
1560 {}
8e21c34c
TD		 1561};
1562
d2077d40
TI		 1563static const struct hda_pintbl stac925xM1_pin_configs[] = {
1564 { 0x07, 0x40c003f4 },
1565 { 0x08, 0x424503f2 },
1566 { 0x0a, 0x400000f3 },
1567 { 0x0b, 0x02a19020 },
1568 { 0x0c, 0x40a000f0 },
1569 { 0x0d, 0x90100210 },
1570 { 0x10, 0x400003f1 },
1571 { 0x11, 0x9033032e },
1572 {}
8e21c34c
TD		 1573};
1574
d2077d40
TI		 1575static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1576 { 0x07, 0x40c003f4 },
1577 { 0x08, 0x424503f2 },
1578 { 0x0a, 0x400000f3 },
1579 { 0x0b, 0x02a19020 },
1580 { 0x0c, 0x40a000f0 },
1581 { 0x0d, 0x90100210 },
1582 { 0x10, 0x400003f1 },
1583 { 0x11, 0x9033032e },
1584 {}
9cb36c2a 1585};
58eec423 1586
d2077d40
TI		 1587static const struct hda_pintbl stac925xM2_pin_configs[] = {
1588 { 0x07, 0x40c003f4 },
1589 { 0x08, 0x424503f2 },
1590 { 0x0a, 0x400000f3 },
1591 { 0x0b, 0x02a19020 },
1592 { 0x0c, 0x40a000f0 },
1593 { 0x0d, 0x90100210 },
1594 { 0x10, 0x400003f1 },
1595 { 0x11, 0x9033032e },
1596 {}
2c11f955
TD		 1597};
1598
d2077d40
TI		 1599static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1600 { 0x07, 0x40c003f4 },
1601 { 0x08, 0x424503f2 },
1602 { 0x0a, 0x400000f3 },
1603 { 0x0b, 0x02a19020 },
1604 { 0x0c, 0x40a000f0 },
1605 { 0x0d, 0x90100210 },
1606 { 0x10, 0x400003f1 },
1607 { 0x11, 0x9033032e },
1608 {}
58eec423
MCC		 1609};
1610
d2077d40
TI		 1611static const struct hda_pintbl stac925xM3_pin_configs[] = {
1612 { 0x07, 0x40c003f4 },
1613 { 0x08, 0x424503f2 },
1614 { 0x0a, 0x400000f3 },
1615 { 0x0b, 0x02a19020 },
1616 { 0x0c, 0x40a000f0 },
1617 { 0x0d, 0x90100210 },
1618 { 0x10, 0x400003f1 },
1619 { 0x11, 0x503303f3 },
1620 {}
9cb36c2a 1621};
58eec423 1622
d2077d40
TI		 1623static const struct hda_pintbl stac925xM5_pin_configs[] = {
1624 { 0x07, 0x40c003f4 },
1625 { 0x08, 0x424503f2 },
1626 { 0x0a, 0x400000f3 },
1627 { 0x0b, 0x02a19020 },
1628 { 0x0c, 0x40a000f0 },
1629 { 0x0d, 0x90100210 },
1630 { 0x10, 0x400003f1 },
1631 { 0x11, 0x9033032e },
1632 {}
9cb36c2a
MCC		 1633};
1634
d2077d40
TI		 1635static const struct hda_pintbl stac925xM6_pin_configs[] = {
1636 { 0x07, 0x40c003f4 },
1637 { 0x08, 0x424503f2 },
1638 { 0x0a, 0x400000f3 },
1639 { 0x0b, 0x02a19020 },
1640 { 0x0c, 0x40a000f0 },
1641 { 0x0d, 0x90100210 },
1642 { 0x10, 0x400003f1 },
1643 { 0x11, 0x90330320 },
1644 {}
8e21c34c
TD		 1645};
1646
d2077d40
TI		 1647static const struct hda_fixup stac925x_fixups[] = {
1648 [STAC_REF] = {
1649 .type = HDA_FIXUP_PINS,
1650 .v.pins = ref925x_pin_configs,
1651 },
1652 [STAC_M1] = {
1653 .type = HDA_FIXUP_PINS,
1654 .v.pins = stac925xM1_pin_configs,
1655 },
1656 [STAC_M1_2] = {
1657 .type = HDA_FIXUP_PINS,
1658 .v.pins = stac925xM1_2_pin_configs,
1659 },
1660 [STAC_M2] = {
1661 .type = HDA_FIXUP_PINS,
1662 .v.pins = stac925xM2_pin_configs,
1663 },
1664 [STAC_M2_2] = {
1665 .type = HDA_FIXUP_PINS,
1666 .v.pins = stac925xM2_2_pin_configs,
1667 },
1668 [STAC_M3] = {
1669 .type = HDA_FIXUP_PINS,
1670 .v.pins = stac925xM3_pin_configs,
1671 },
1672 [STAC_M5] = {
1673 .type = HDA_FIXUP_PINS,
1674 .v.pins = stac925xM5_pin_configs,
1675 },
1676 [STAC_M6] = {
1677 .type = HDA_FIXUP_PINS,
1678 .v.pins = stac925xM6_pin_configs,
1679 },
8e21c34c
TD		 1680};
1681
d2077d40
TI		 1682static const struct hda_model_fixup stac925x_models[] = {
1683 { .id = STAC_REF, .name = "ref" },
1684 { .id = STAC_M1, .name = "m1" },
1685 { .id = STAC_M1_2, .name = "m1-2" },
1686 { .id = STAC_M2, .name = "m2" },
1687 { .id = STAC_M2_2, .name = "m2-2" },
1688 { .id = STAC_M3, .name = "m3" },
1689 { .id = STAC_M5, .name = "m5" },
1690 { .id = STAC_M6, .name = "m6" },
1691 {}
8e21c34c
TD		 1692};
1693
d2077d40
TI		 1694static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1695 /* SigmaTel reference board */
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1698 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1699
1700 /* Default table for unknown ID */
1701 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1702
1703 /* gateway machines are checked via codec ssid */
58eec423
MCC		 1704 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1705 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1706 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1707 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1708 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1709 /* Not sure about the brand name for those */
1710 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1711 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1712 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1713 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1714 {} /* terminator */
8e21c34c
TD		 1715};
1716
55e30141
TI		 1717static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1718 { 0x0a, 0x02214030 },
1719 { 0x0b, 0x02a19040 },
1720 { 0x0c, 0x01a19020 },
1721 { 0x0d, 0x02214030 },
1722 { 0x0e, 0x0181302e },
1723 { 0x0f, 0x01014010 },
1724 { 0x10, 0x01014020 },
1725 { 0x11, 0x01014030 },
1726 { 0x12, 0x02319040 },
1727 { 0x13, 0x90a000f0 },
1728 { 0x14, 0x90a000f0 },
1729 { 0x22, 0x01452050 },
1730 { 0x23, 0x01452050 },
1731 {}
a7662640
MR		 1732};
1733
55e30141
TI		 1734static const struct hda_pintbl dell_m6_pin_configs[] = {
1735 { 0x0a, 0x0321101f },
1736 { 0x0b, 0x4f00000f },
1737 { 0x0c, 0x4f0000f0 },
1738 { 0x0d, 0x90170110 },
1739 { 0x0e, 0x03a11020 },
1740 { 0x0f, 0x0321101f },
1741 { 0x10, 0x4f0000f0 },
1742 { 0x11, 0x4f0000f0 },
1743 { 0x12, 0x4f0000f0 },
1744 { 0x13, 0x90a60160 },
1745 { 0x14, 0x4f0000f0 },
1746 { 0x22, 0x4f0000f0 },
1747 { 0x23, 0x4f0000f0 },
1748 {}
e1f0d669
MR		 1749};
1750
55e30141
TI		 1751static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1752 { 0x0a, 0x0321101f },
1753 { 0x0b, 0x0321101f },
1754 { 0x0c, 0x03a11020 },
1755 { 0x0d, 0x03014020 },
1756 { 0x0e, 0x90170110 },
1757 { 0x0f, 0x4f0000f0 },
1758 { 0x10, 0x4f0000f0 },
1759 { 0x11, 0x4f0000f0 },
1760 { 0x12, 0x4f0000f0 },
1761 { 0x13, 0x90a60160 },
1762 { 0x14, 0x4f0000f0 },
1763 { 0x22, 0x4f0000f0 },
1764 { 0x23, 0x904601b0 },
1765 {}
842ae638
TI		 1766};
1767
55e30141
TI		 1768static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1769 { 0x0a, 0x02214230 },
1770 { 0x0b, 0x02A19240 },
1771 { 0x0c, 0x01013214 },
1772 { 0x0d, 0x01014210 },
1773 { 0x0e, 0x01A19250 },
1774 { 0x0f, 0x01011212 },
1775 { 0x10, 0x01016211 },
1776 {}
52dc4386
AF		 1777};
1778
1de7ca5e
HW		 1779static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1780 { 0x0a, 0x02214030 },
1781 { 0x0b, 0x02A19010 },
1782 {}
1783};
1784
7440850c
HW		 1785static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1786 { 0x0e, 0x400000f0 },
1787 {}
1788};
1789
55e30141
TI		 1790static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1791 const struct hda_fixup *fix, int action)
1792{
1793 struct sigmatel_spec *spec = codec->spec;
1794
1795 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1796 return;
1797
1798 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1799 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1800}
1801
1802static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1803{
1804 struct sigmatel_spec *spec = codec->spec;
1805
1806 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
55e30141
TI		 1807 spec->eapd_switch = 0;
1808}
1809
1810static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1811 const struct hda_fixup *fix, int action)
1812{
1813 struct sigmatel_spec *spec = codec->spec;
1814
1815 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1816 return;
1817
1818 stac92hd73xx_fixup_dell(codec);
1819 snd_hda_add_verbs(codec, dell_eq_core_init);
1820 spec->volknob_init = 1;
1821}
1822
1823/* Analog Mics */
1824static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1825 const struct hda_fixup *fix, int action)
1826{
55e30141
TI		 1827 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1828 return;
1829
1830 stac92hd73xx_fixup_dell(codec);
1831 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
55e30141
TI		 1832}
1833
1834/* Digital Mics */
1835static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1836 const struct hda_fixup *fix, int action)
1837{
55e30141
TI		 1838 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1839 return;
1840
1841 stac92hd73xx_fixup_dell(codec);
1842 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1843}
1844
1845/* Both */
1846static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1847 const struct hda_fixup *fix, int action)
1848{
55e30141
TI		 1849 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1850 return;
1851
1852 stac92hd73xx_fixup_dell(codec);
1853 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1854 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1855}
1856
1857static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1858 const struct hda_fixup *fix, int action)
1859{
1860 struct sigmatel_spec *spec = codec->spec;
1861
1862 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1863 return;
1864
1865 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
55e30141
TI		 1866 spec->eapd_switch = 0;
1867}
1868
1869static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1870 const struct hda_fixup *fix, int action)
1871{
36c9db7a
TI		 1872 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1873 codec->no_jack_detect = 1;
55e30141
TI		 1874}
1875
1876static const struct hda_fixup stac92hd73xx_fixups[] = {
1877 [STAC_92HD73XX_REF] = {
1878 .type = HDA_FIXUP_FUNC,
1879 .v.func = stac92hd73xx_fixup_ref,
1880 },
1881 [STAC_DELL_M6_AMIC] = {
1882 .type = HDA_FIXUP_FUNC,
1883 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1884 },
1885 [STAC_DELL_M6_DMIC] = {
1886 .type = HDA_FIXUP_FUNC,
1887 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1888 },
1889 [STAC_DELL_M6_BOTH] = {
1890 .type = HDA_FIXUP_FUNC,
1891 .v.func = stac92hd73xx_fixup_dell_m6_both,
1892 },
1893 [STAC_DELL_EQ] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_dell_eq,
1896 },
1897 [STAC_ALIENWARE_M17X] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_alienware_m17x,
1900 },
1901 [STAC_92HD73XX_INTEL] = {
1902 .type = HDA_FIXUP_PINS,
1903 .v.pins = intel_dg45id_pin_configs,
1904 },
1905 [STAC_92HD73XX_NO_JD] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_no_jd,
1de7ca5e
HW		 1908 },
1909 [STAC_92HD89XX_HP_FRONT_JACK] = {
1910 .type = HDA_FIXUP_PINS,
1911 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
7440850c
HW		 1912 },
1913 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1914 .type = HDA_FIXUP_PINS,
1915 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
6426460e
TI		 1916 },
1917 [STAC_92HD73XX_ASUS_MOBO] = {
1918 .type = HDA_FIXUP_PINS,
1919 .v.pins = (const struct hda_pintbl[]) {
1920 /* enable 5.1 and SPDIF out */
1921 { 0x0c, 0x01014411 },
1922 { 0x0d, 0x01014410 },
1923 { 0x0e, 0x01014412 },
1924 { 0x22, 0x014b1180 },
1925 { }
1926 }
1927 },
e1f0d669
MR		 1928};
1929
55e30141
TI		 1930static const struct hda_model_fixup stac92hd73xx_models[] = {
1931 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1932 { .id = STAC_92HD73XX_REF, .name = "ref" },
1933 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1934 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1935 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1936 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1937 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1938 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
6426460e 1939 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
55e30141 1940 {}
e1f0d669
MR		 1941};
1942
55e30141 1943static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
e1f0d669
MR		 1944 /* SigmaTel reference board */
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1946 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1948 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1950 "Intel DG45ID", STAC_92HD73XX_INTEL),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1952 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1954 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1956 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1957 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1958 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1960 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1962 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1964 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1966 "unknown Dell", STAC_DELL_M6_DMIC),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1968 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1970 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1972 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1974 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1976 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1978 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1980 "Dell Studio 1558", STAC_DELL_M6_DMIC),
55e30141 1981 /* codec SSID matching */
842ae638
TI		 1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1983 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1985 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1987 "Alienware M17x R3", STAC_DELL_EQ),
7440850c
HW		 1988 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
1989 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
1de7ca5e
HW		 1990 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
1991 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
6426460e
TI		 1992 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
1993 STAC_92HD73XX_ASUS_MOBO),
842ae638
TI		 1994 {} /* terminator */
1995};
1996
372f8c75
TI		 1997static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1998 { 0x0a, 0x02214030 },
1999 { 0x0b, 0x02211010 },
2000 { 0x0c, 0x02a19020 },
2001 { 0x0d, 0x02170130 },
2002 { 0x0e, 0x01014050 },
2003 { 0x0f, 0x01819040 },
2004 { 0x10, 0x01014020 },
2005 { 0x11, 0x90a3014e },
2006 { 0x1f, 0x01451160 },
2007 { 0x20, 0x98560170 },
2008 {}
d0513fc6
MR		 2009};
2010
372f8c75
TI		 2011static const struct hda_pintbl dell_s14_pin_configs[] = {
2012 { 0x0a, 0x0221403f },
2013 { 0x0b, 0x0221101f },
2014 { 0x0c, 0x02a19020 },
2015 { 0x0d, 0x90170110 },
2016 { 0x0e, 0x40f000f0 },
2017 { 0x0f, 0x40f000f0 },
2018 { 0x10, 0x40f000f0 },
2019 { 0x11, 0x90a60160 },
2020 { 0x1f, 0x40f000f0 },
2021 { 0x20, 0x40f000f0 },
2022 {}
8bb0ac55
MR		 2023};
2024
372f8c75
TI		 2025static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2026 { 0x0a, 0x02a11020 },
2027 { 0x0b, 0x0221101f },
2028 { 0x0c, 0x400000f0 },
2029 { 0x0d, 0x90170110 },
2030 { 0x0e, 0x400000f1 },
2031 { 0x0f, 0x400000f2 },
2032 { 0x10, 0x400000f3 },
2033 { 0x11, 0x90a60160 },
2034 { 0x1f, 0x400000f4 },
2035 { 0x20, 0x400000f5 },
2036 {}
f7f9bdfa
JW		 2037};
2038
372f8c75
TI		 2039static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2040 { 0x0a, 0x03a12050 },
2041 { 0x0b, 0x0321201f },
2042 { 0x0c, 0x40f000f0 },
2043 { 0x0d, 0x90170110 },
2044 { 0x0e, 0x40f000f0 },
2045 { 0x0f, 0x40f000f0 },
2046 { 0x10, 0x90170110 },
2047 { 0x11, 0xd5a30140 },
2048 { 0x1f, 0x40f000f0 },
2049 { 0x20, 0x40f000f0 },
2050 {}
48315590
SE		 2051};
2052
372f8c75
TI		 2053static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2054 { 0x0a, 0x01813050 },
2055 { 0x0b, 0x0421201f },
2056 { 0x0c, 0x04a1205e },
2057 { 0x0d, 0x96130310 },
2058 { 0x0e, 0x96130310 },
2059 { 0x0f, 0x0101401f },
2060 { 0x10, 0x1111611f },
2061 { 0x11, 0xd5a30130 },
2062 {}
5556e147
VK		 2063};
2064
372f8c75
TI		 2065static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2066 { 0x0a, 0x40f000f0 },
2067 { 0x0b, 0x0221101f },
2068 { 0x0c, 0x02a11020 },
2069 { 0x0d, 0x92170110 },
2070 { 0x0e, 0x40f000f0 },
2071 { 0x0f, 0x92170110 },
2072 { 0x10, 0x40f000f0 },
2073 { 0x11, 0xd5a30130 },
2074 { 0x1f, 0x40f000f0 },
2075 { 0x20, 0x40f000f0 },
2076 {}
0c27c180
VK		 2077};
2078
372f8c75
TI		 2079static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2080 const struct hda_fixup *fix, int action)
2081{
2082 struct sigmatel_spec *spec = codec->spec;
2083
2084 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2085 return;
2086
2087 if (hp_bnb2011_with_dock(codec)) {
2088 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2089 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2090 }
2091
2092 if (find_mute_led_cfg(codec, spec->default_polarity))
4e76a883 2093 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
372f8c75
TI		 2094 spec->gpio_led,
2095 spec->gpio_led_polarity);
e8b99a1d
TI		 2096
2097 /* allow auto-switching of dock line-in */
2098 spec->gen.line_in_auto_switch = true;
372f8c75
TI		 2099}
2100
2101static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2102 const struct hda_fixup *fix, int action)
2103{
2104 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2105 return;
2106
2107 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2108 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2109}
2110
2111static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2112 const struct hda_fixup *fix, int action)
2113{
2114 struct sigmatel_spec *spec = codec->spec;
2115
2116 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2117 spec->default_polarity = 0;
2118}
2119
2120static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2121 const struct hda_fixup *fix, int action)
2122{
2123 struct sigmatel_spec *spec = codec->spec;
2124
2125 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2126 spec->default_polarity = 1;
2127}
2128
2129static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2130 const struct hda_fixup *fix, int action)
2131{
2132 struct sigmatel_spec *spec = codec->spec;
2133
95f74c41 2134 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
372f8c75 2135 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
55ed9cd1 2136#ifdef CONFIG_PM
873ce8ad 2137 /* resetting controller clears GPIO, so we need to keep on */
7639a06c 2138 codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
55ed9cd1 2139#endif
95f74c41 2140 }
372f8c75
TI		 2141}
2142
37c367ec
TI		 2143static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2144 const struct hda_fixup *fix, int action)
2145{
2146 struct sigmatel_spec *spec = codec->spec;
2147
2148 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2149 spec->gpio_led = 0x10; /* GPIO4 */
2150 spec->default_polarity = 0;
2151 }
2152}
2153
372f8c75
TI		 2154static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2155 const struct hda_fixup *fix, int action)
2156{
2157 struct sigmatel_spec *spec = codec->spec;
2158
2159 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2160 spec->headset_jack = 1;
2161}
2162
4227de2a
TI		 2163static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2164 const struct hda_fixup *fix,
2165 int action)
2166{
2167 struct sigmatel_spec *spec = codec->spec;
2168
2169 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2170 return;
2171 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2172 spec->gpio_data = 0x10;
2173 spec->eapd_switch = 0;
2174}
2175
6ab42ff4
HW		 2176static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2177 const struct hda_fixup *fix,
2178 int action)
2179{
2180 struct sigmatel_spec *spec = codec->spec;
2181 static hda_nid_t preferred_pairs[] = {
2182 0xd, 0x13,
2183 0
2184 };
2185
2186 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2187 return;
2188
2189 spec->gen.preferred_dacs = preferred_pairs;
2190}
2191
d009f3de
VK		 2192static const struct hda_verb hp_bnb13_eq_verbs[] = {
2193 /* 44.1KHz base */
2194 { 0x22, 0x7A6, 0x3E },
2195 { 0x22, 0x7A7, 0x68 },
2196 { 0x22, 0x7A8, 0x17 },
2197 { 0x22, 0x7A9, 0x3E },
2198 { 0x22, 0x7AA, 0x68 },
2199 { 0x22, 0x7AB, 0x17 },
2200 { 0x22, 0x7AC, 0x00 },
2201 { 0x22, 0x7AD, 0x80 },
2202 { 0x22, 0x7A6, 0x83 },
2203 { 0x22, 0x7A7, 0x2F },
2204 { 0x22, 0x7A8, 0xD1 },
2205 { 0x22, 0x7A9, 0x83 },
2206 { 0x22, 0x7AA, 0x2F },
2207 { 0x22, 0x7AB, 0xD1 },
2208 { 0x22, 0x7AC, 0x01 },
2209 { 0x22, 0x7AD, 0x80 },
2210 { 0x22, 0x7A6, 0x3E },
2211 { 0x22, 0x7A7, 0x68 },
2212 { 0x22, 0x7A8, 0x17 },
2213 { 0x22, 0x7A9, 0x3E },
2214 { 0x22, 0x7AA, 0x68 },
2215 { 0x22, 0x7AB, 0x17 },
2216 { 0x22, 0x7AC, 0x02 },
2217 { 0x22, 0x7AD, 0x80 },
2218 { 0x22, 0x7A6, 0x7C },
2219 { 0x22, 0x7A7, 0xC6 },
2220 { 0x22, 0x7A8, 0x0C },
2221 { 0x22, 0x7A9, 0x7C },
2222 { 0x22, 0x7AA, 0xC6 },
2223 { 0x22, 0x7AB, 0x0C },
2224 { 0x22, 0x7AC, 0x03 },
2225 { 0x22, 0x7AD, 0x80 },
2226 { 0x22, 0x7A6, 0xC3 },
2227 { 0x22, 0x7A7, 0x25 },
2228 { 0x22, 0x7A8, 0xAF },
2229 { 0x22, 0x7A9, 0xC3 },
2230 { 0x22, 0x7AA, 0x25 },
2231 { 0x22, 0x7AB, 0xAF },
2232 { 0x22, 0x7AC, 0x04 },
2233 { 0x22, 0x7AD, 0x80 },
2234 { 0x22, 0x7A6, 0x3E },
2235 { 0x22, 0x7A7, 0x85 },
2236 { 0x22, 0x7A8, 0x73 },
2237 { 0x22, 0x7A9, 0x3E },
2238 { 0x22, 0x7AA, 0x85 },
2239 { 0x22, 0x7AB, 0x73 },
2240 { 0x22, 0x7AC, 0x05 },
2241 { 0x22, 0x7AD, 0x80 },
2242 { 0x22, 0x7A6, 0x85 },
2243 { 0x22, 0x7A7, 0x39 },
2244 { 0x22, 0x7A8, 0xC7 },
2245 { 0x22, 0x7A9, 0x85 },
2246 { 0x22, 0x7AA, 0x39 },
2247 { 0x22, 0x7AB, 0xC7 },
2248 { 0x22, 0x7AC, 0x06 },
2249 { 0x22, 0x7AD, 0x80 },
2250 { 0x22, 0x7A6, 0x3C },
2251 { 0x22, 0x7A7, 0x90 },
2252 { 0x22, 0x7A8, 0xB0 },
2253 { 0x22, 0x7A9, 0x3C },
2254 { 0x22, 0x7AA, 0x90 },
2255 { 0x22, 0x7AB, 0xB0 },
2256 { 0x22, 0x7AC, 0x07 },
2257 { 0x22, 0x7AD, 0x80 },
2258 { 0x22, 0x7A6, 0x7A },
2259 { 0x22, 0x7A7, 0xC6 },
2260 { 0x22, 0x7A8, 0x39 },
2261 { 0x22, 0x7A9, 0x7A },
2262 { 0x22, 0x7AA, 0xC6 },
2263 { 0x22, 0x7AB, 0x39 },
2264 { 0x22, 0x7AC, 0x08 },
2265 { 0x22, 0x7AD, 0x80 },
2266 { 0x22, 0x7A6, 0xC4 },
2267 { 0x22, 0x7A7, 0xE9 },
2268 { 0x22, 0x7A8, 0xDC },
2269 { 0x22, 0x7A9, 0xC4 },
2270 { 0x22, 0x7AA, 0xE9 },
2271 { 0x22, 0x7AB, 0xDC },
2272 { 0x22, 0x7AC, 0x09 },
2273 { 0x22, 0x7AD, 0x80 },
2274 { 0x22, 0x7A6, 0x3D },
2275 { 0x22, 0x7A7, 0xE1 },
2276 { 0x22, 0x7A8, 0x0D },
2277 { 0x22, 0x7A9, 0x3D },
2278 { 0x22, 0x7AA, 0xE1 },
2279 { 0x22, 0x7AB, 0x0D },
2280 { 0x22, 0x7AC, 0x0A },
2281 { 0x22, 0x7AD, 0x80 },
2282 { 0x22, 0x7A6, 0x89 },
2283 { 0x22, 0x7A7, 0xB6 },
2284 { 0x22, 0x7A8, 0xEB },
2285 { 0x22, 0x7A9, 0x89 },
2286 { 0x22, 0x7AA, 0xB6 },
2287 { 0x22, 0x7AB, 0xEB },
2288 { 0x22, 0x7AC, 0x0B },
2289 { 0x22, 0x7AD, 0x80 },
2290 { 0x22, 0x7A6, 0x39 },
2291 { 0x22, 0x7A7, 0x9D },
2292 { 0x22, 0x7A8, 0xFE },
2293 { 0x22, 0x7A9, 0x39 },
2294 { 0x22, 0x7AA, 0x9D },
2295 { 0x22, 0x7AB, 0xFE },
2296 { 0x22, 0x7AC, 0x0C },
2297 { 0x22, 0x7AD, 0x80 },
2298 { 0x22, 0x7A6, 0x76 },
2299 { 0x22, 0x7A7, 0x49 },
2300 { 0x22, 0x7A8, 0x15 },
2301 { 0x22, 0x7A9, 0x76 },
2302 { 0x22, 0x7AA, 0x49 },
2303 { 0x22, 0x7AB, 0x15 },
2304 { 0x22, 0x7AC, 0x0D },
2305 { 0x22, 0x7AD, 0x80 },
2306 { 0x22, 0x7A6, 0xC8 },
2307 { 0x22, 0x7A7, 0x80 },
2308 { 0x22, 0x7A8, 0xF5 },
2309 { 0x22, 0x7A9, 0xC8 },
2310 { 0x22, 0x7AA, 0x80 },
2311 { 0x22, 0x7AB, 0xF5 },
2312 { 0x22, 0x7AC, 0x0E },
2313 { 0x22, 0x7AD, 0x80 },
2314 { 0x22, 0x7A6, 0x40 },
2315 { 0x22, 0x7A7, 0x00 },
2316 { 0x22, 0x7A8, 0x00 },
2317 { 0x22, 0x7A9, 0x40 },
2318 { 0x22, 0x7AA, 0x00 },
2319 { 0x22, 0x7AB, 0x00 },
2320 { 0x22, 0x7AC, 0x0F },
2321 { 0x22, 0x7AD, 0x80 },
2322 { 0x22, 0x7A6, 0x90 },
2323 { 0x22, 0x7A7, 0x68 },
2324 { 0x22, 0x7A8, 0xF1 },
2325 { 0x22, 0x7A9, 0x90 },
2326 { 0x22, 0x7AA, 0x68 },
2327 { 0x22, 0x7AB, 0xF1 },
2328 { 0x22, 0x7AC, 0x10 },
2329 { 0x22, 0x7AD, 0x80 },
2330 { 0x22, 0x7A6, 0x34 },
2331 { 0x22, 0x7A7, 0x47 },
2332 { 0x22, 0x7A8, 0x6C },
2333 { 0x22, 0x7A9, 0x34 },
2334 { 0x22, 0x7AA, 0x47 },
2335 { 0x22, 0x7AB, 0x6C },
2336 { 0x22, 0x7AC, 0x11 },
2337 { 0x22, 0x7AD, 0x80 },
2338 { 0x22, 0x7A6, 0x6F },
2339 { 0x22, 0x7A7, 0x97 },
2340 { 0x22, 0x7A8, 0x0F },
2341 { 0x22, 0x7A9, 0x6F },
2342 { 0x22, 0x7AA, 0x97 },
2343 { 0x22, 0x7AB, 0x0F },
2344 { 0x22, 0x7AC, 0x12 },
2345 { 0x22, 0x7AD, 0x80 },
2346 { 0x22, 0x7A6, 0xCB },
2347 { 0x22, 0x7A7, 0xB8 },
2348 { 0x22, 0x7A8, 0x94 },
2349 { 0x22, 0x7A9, 0xCB },
2350 { 0x22, 0x7AA, 0xB8 },
2351 { 0x22, 0x7AB, 0x94 },
2352 { 0x22, 0x7AC, 0x13 },
2353 { 0x22, 0x7AD, 0x80 },
2354 { 0x22, 0x7A6, 0x40 },
2355 { 0x22, 0x7A7, 0x00 },
2356 { 0x22, 0x7A8, 0x00 },
2357 { 0x22, 0x7A9, 0x40 },
2358 { 0x22, 0x7AA, 0x00 },
2359 { 0x22, 0x7AB, 0x00 },
2360 { 0x22, 0x7AC, 0x14 },
2361 { 0x22, 0x7AD, 0x80 },
2362 { 0x22, 0x7A6, 0x95 },
2363 { 0x22, 0x7A7, 0x76 },
2364 { 0x22, 0x7A8, 0x5B },
2365 { 0x22, 0x7A9, 0x95 },
2366 { 0x22, 0x7AA, 0x76 },
2367 { 0x22, 0x7AB, 0x5B },
2368 { 0x22, 0x7AC, 0x15 },
2369 { 0x22, 0x7AD, 0x80 },
2370 { 0x22, 0x7A6, 0x31 },
2371 { 0x22, 0x7A7, 0xAC },
2372 { 0x22, 0x7A8, 0x31 },
2373 { 0x22, 0x7A9, 0x31 },
2374 { 0x22, 0x7AA, 0xAC },
2375 { 0x22, 0x7AB, 0x31 },
2376 { 0x22, 0x7AC, 0x16 },
2377 { 0x22, 0x7AD, 0x80 },
2378 { 0x22, 0x7A6, 0x6A },
2379 { 0x22, 0x7A7, 0x89 },
2380 { 0x22, 0x7A8, 0xA5 },
2381 { 0x22, 0x7A9, 0x6A },
2382 { 0x22, 0x7AA, 0x89 },
2383 { 0x22, 0x7AB, 0xA5 },
2384 { 0x22, 0x7AC, 0x17 },
2385 { 0x22, 0x7AD, 0x80 },
2386 { 0x22, 0x7A6, 0xCE },
2387 { 0x22, 0x7A7, 0x53 },
2388 { 0x22, 0x7A8, 0xCF },
2389 { 0x22, 0x7A9, 0xCE },
2390 { 0x22, 0x7AA, 0x53 },
2391 { 0x22, 0x7AB, 0xCF },
2392 { 0x22, 0x7AC, 0x18 },
2393 { 0x22, 0x7AD, 0x80 },
2394 { 0x22, 0x7A6, 0x40 },
2395 { 0x22, 0x7A7, 0x00 },
2396 { 0x22, 0x7A8, 0x00 },
2397 { 0x22, 0x7A9, 0x40 },
2398 { 0x22, 0x7AA, 0x00 },
2399 { 0x22, 0x7AB, 0x00 },
2400 { 0x22, 0x7AC, 0x19 },
2401 { 0x22, 0x7AD, 0x80 },
2402 /* 48KHz base */
2403 { 0x22, 0x7A6, 0x3E },
2404 { 0x22, 0x7A7, 0x88 },
2405 { 0x22, 0x7A8, 0xDC },
2406 { 0x22, 0x7A9, 0x3E },
2407 { 0x22, 0x7AA, 0x88 },
2408 { 0x22, 0x7AB, 0xDC },
2409 { 0x22, 0x7AC, 0x1A },
2410 { 0x22, 0x7AD, 0x80 },
2411 { 0x22, 0x7A6, 0x82 },
2412 { 0x22, 0x7A7, 0xEE },
2413 { 0x22, 0x7A8, 0x46 },
2414 { 0x22, 0x7A9, 0x82 },
2415 { 0x22, 0x7AA, 0xEE },
2416 { 0x22, 0x7AB, 0x46 },
2417 { 0x22, 0x7AC, 0x1B },
2418 { 0x22, 0x7AD, 0x80 },
2419 { 0x22, 0x7A6, 0x3E },
2420 { 0x22, 0x7A7, 0x88 },
2421 { 0x22, 0x7A8, 0xDC },
2422 { 0x22, 0x7A9, 0x3E },
2423 { 0x22, 0x7AA, 0x88 },
2424 { 0x22, 0x7AB, 0xDC },
2425 { 0x22, 0x7AC, 0x1C },
2426 { 0x22, 0x7AD, 0x80 },
2427 { 0x22, 0x7A6, 0x7D },
2428 { 0x22, 0x7A7, 0x09 },
2429 { 0x22, 0x7A8, 0x28 },
2430 { 0x22, 0x7A9, 0x7D },
2431 { 0x22, 0x7AA, 0x09 },
2432 { 0x22, 0x7AB, 0x28 },
2433 { 0x22, 0x7AC, 0x1D },
2434 { 0x22, 0x7AD, 0x80 },
2435 { 0x22, 0x7A6, 0xC2 },
2436 { 0x22, 0x7A7, 0xE5 },
2437 { 0x22, 0x7A8, 0xB4 },
2438 { 0x22, 0x7A9, 0xC2 },
2439 { 0x22, 0x7AA, 0xE5 },
2440 { 0x22, 0x7AB, 0xB4 },
2441 { 0x22, 0x7AC, 0x1E },
2442 { 0x22, 0x7AD, 0x80 },
2443 { 0x22, 0x7A6, 0x3E },
2444 { 0x22, 0x7A7, 0xA3 },
2445 { 0x22, 0x7A8, 0x1F },
2446 { 0x22, 0x7A9, 0x3E },
2447 { 0x22, 0x7AA, 0xA3 },
2448 { 0x22, 0x7AB, 0x1F },
2449 { 0x22, 0x7AC, 0x1F },
2450 { 0x22, 0x7AD, 0x80 },
2451 { 0x22, 0x7A6, 0x84 },
2452 { 0x22, 0x7A7, 0xCA },
2453 { 0x22, 0x7A8, 0xF1 },
2454 { 0x22, 0x7A9, 0x84 },
2455 { 0x22, 0x7AA, 0xCA },
2456 { 0x22, 0x7AB, 0xF1 },
2457 { 0x22, 0x7AC, 0x20 },
2458 { 0x22, 0x7AD, 0x80 },
2459 { 0x22, 0x7A6, 0x3C },
2460 { 0x22, 0x7A7, 0xD5 },
2461 { 0x22, 0x7A8, 0x9C },
2462 { 0x22, 0x7A9, 0x3C },
2463 { 0x22, 0x7AA, 0xD5 },
2464 { 0x22, 0x7AB, 0x9C },
2465 { 0x22, 0x7AC, 0x21 },
2466 { 0x22, 0x7AD, 0x80 },
2467 { 0x22, 0x7A6, 0x7B },
2468 { 0x22, 0x7A7, 0x35 },
2469 { 0x22, 0x7A8, 0x0F },
2470 { 0x22, 0x7A9, 0x7B },
2471 { 0x22, 0x7AA, 0x35 },
2472 { 0x22, 0x7AB, 0x0F },
2473 { 0x22, 0x7AC, 0x22 },
2474 { 0x22, 0x7AD, 0x80 },
2475 { 0x22, 0x7A6, 0xC4 },
2476 { 0x22, 0x7A7, 0x87 },
2477 { 0x22, 0x7A8, 0x45 },
2478 { 0x22, 0x7A9, 0xC4 },
2479 { 0x22, 0x7AA, 0x87 },
2480 { 0x22, 0x7AB, 0x45 },
2481 { 0x22, 0x7AC, 0x23 },
2482 { 0x22, 0x7AD, 0x80 },
2483 { 0x22, 0x7A6, 0x3E },
2484 { 0x22, 0x7A7, 0x0A },
2485 { 0x22, 0x7A8, 0x78 },
2486 { 0x22, 0x7A9, 0x3E },
2487 { 0x22, 0x7AA, 0x0A },
2488 { 0x22, 0x7AB, 0x78 },
2489 { 0x22, 0x7AC, 0x24 },
2490 { 0x22, 0x7AD, 0x80 },
2491 { 0x22, 0x7A6, 0x88 },
2492 { 0x22, 0x7A7, 0xE2 },
2493 { 0x22, 0x7A8, 0x05 },
2494 { 0x22, 0x7A9, 0x88 },
2495 { 0x22, 0x7AA, 0xE2 },
2496 { 0x22, 0x7AB, 0x05 },
2497 { 0x22, 0x7AC, 0x25 },
2498 { 0x22, 0x7AD, 0x80 },
2499 { 0x22, 0x7A6, 0x3A },
2500 { 0x22, 0x7A7, 0x1A },
2501 { 0x22, 0x7A8, 0xA3 },
2502 { 0x22, 0x7A9, 0x3A },
2503 { 0x22, 0x7AA, 0x1A },
2504 { 0x22, 0x7AB, 0xA3 },
2505 { 0x22, 0x7AC, 0x26 },
2506 { 0x22, 0x7AD, 0x80 },
2507 { 0x22, 0x7A6, 0x77 },
2508 { 0x22, 0x7A7, 0x1D },
2509 { 0x22, 0x7A8, 0xFB },
2510 { 0x22, 0x7A9, 0x77 },
2511 { 0x22, 0x7AA, 0x1D },
2512 { 0x22, 0x7AB, 0xFB },
2513 { 0x22, 0x7AC, 0x27 },
2514 { 0x22, 0x7AD, 0x80 },
2515 { 0x22, 0x7A6, 0xC7 },
2516 { 0x22, 0x7A7, 0xDA },
2517 { 0x22, 0x7A8, 0xE5 },
2518 { 0x22, 0x7A9, 0xC7 },
2519 { 0x22, 0x7AA, 0xDA },
2520 { 0x22, 0x7AB, 0xE5 },
2521 { 0x22, 0x7AC, 0x28 },
2522 { 0x22, 0x7AD, 0x80 },
2523 { 0x22, 0x7A6, 0x40 },
2524 { 0x22, 0x7A7, 0x00 },
2525 { 0x22, 0x7A8, 0x00 },
2526 { 0x22, 0x7A9, 0x40 },
2527 { 0x22, 0x7AA, 0x00 },
2528 { 0x22, 0x7AB, 0x00 },
2529 { 0x22, 0x7AC, 0x29 },
2530 { 0x22, 0x7AD, 0x80 },
2531 { 0x22, 0x7A6, 0x8E },
2532 { 0x22, 0x7A7, 0xD7 },
2533 { 0x22, 0x7A8, 0x22 },
2534 { 0x22, 0x7A9, 0x8E },
2535 { 0x22, 0x7AA, 0xD7 },
2536 { 0x22, 0x7AB, 0x22 },
2537 { 0x22, 0x7AC, 0x2A },
2538 { 0x22, 0x7AD, 0x80 },
2539 { 0x22, 0x7A6, 0x35 },
2540 { 0x22, 0x7A7, 0x26 },
2541 { 0x22, 0x7A8, 0xC6 },
2542 { 0x22, 0x7A9, 0x35 },
2543 { 0x22, 0x7AA, 0x26 },
2544 { 0x22, 0x7AB, 0xC6 },
2545 { 0x22, 0x7AC, 0x2B },
2546 { 0x22, 0x7AD, 0x80 },
2547 { 0x22, 0x7A6, 0x71 },
2548 { 0x22, 0x7A7, 0x28 },
2549 { 0x22, 0x7A8, 0xDE },
2550 { 0x22, 0x7A9, 0x71 },
2551 { 0x22, 0x7AA, 0x28 },
2552 { 0x22, 0x7AB, 0xDE },
2553 { 0x22, 0x7AC, 0x2C },
2554 { 0x22, 0x7AD, 0x80 },
2555 { 0x22, 0x7A6, 0xCA },
2556 { 0x22, 0x7A7, 0xD9 },
2557 { 0x22, 0x7A8, 0x3A },
2558 { 0x22, 0x7A9, 0xCA },
2559 { 0x22, 0x7AA, 0xD9 },
2560 { 0x22, 0x7AB, 0x3A },
2561 { 0x22, 0x7AC, 0x2D },
2562 { 0x22, 0x7AD, 0x80 },
2563 { 0x22, 0x7A6, 0x40 },
2564 { 0x22, 0x7A7, 0x00 },
2565 { 0x22, 0x7A8, 0x00 },
2566 { 0x22, 0x7A9, 0x40 },
2567 { 0x22, 0x7AA, 0x00 },
2568 { 0x22, 0x7AB, 0x00 },
2569 { 0x22, 0x7AC, 0x2E },
2570 { 0x22, 0x7AD, 0x80 },
2571 { 0x22, 0x7A6, 0x93 },
2572 { 0x22, 0x7A7, 0x5E },
2573 { 0x22, 0x7A8, 0xD8 },
2574 { 0x22, 0x7A9, 0x93 },
2575 { 0x22, 0x7AA, 0x5E },
2576 { 0x22, 0x7AB, 0xD8 },
2577 { 0x22, 0x7AC, 0x2F },
2578 { 0x22, 0x7AD, 0x80 },
2579 { 0x22, 0x7A6, 0x32 },
2580 { 0x22, 0x7A7, 0xB7 },
2581 { 0x22, 0x7A8, 0xB1 },
2582 { 0x22, 0x7A9, 0x32 },
2583 { 0x22, 0x7AA, 0xB7 },
2584 { 0x22, 0x7AB, 0xB1 },
2585 { 0x22, 0x7AC, 0x30 },
2586 { 0x22, 0x7AD, 0x80 },
2587 { 0x22, 0x7A6, 0x6C },
2588 { 0x22, 0x7A7, 0xA1 },
2589 { 0x22, 0x7A8, 0x28 },
2590 { 0x22, 0x7A9, 0x6C },
2591 { 0x22, 0x7AA, 0xA1 },
2592 { 0x22, 0x7AB, 0x28 },
2593 { 0x22, 0x7AC, 0x31 },
2594 { 0x22, 0x7AD, 0x80 },
2595 { 0x22, 0x7A6, 0xCD },
2596 { 0x22, 0x7A7, 0x48 },
2597 { 0x22, 0x7A8, 0x4F },
2598 { 0x22, 0x7A9, 0xCD },
2599 { 0x22, 0x7AA, 0x48 },
2600 { 0x22, 0x7AB, 0x4F },
2601 { 0x22, 0x7AC, 0x32 },
2602 { 0x22, 0x7AD, 0x80 },
2603 { 0x22, 0x7A6, 0x40 },
2604 { 0x22, 0x7A7, 0x00 },
2605 { 0x22, 0x7A8, 0x00 },
2606 { 0x22, 0x7A9, 0x40 },
2607 { 0x22, 0x7AA, 0x00 },
2608 { 0x22, 0x7AB, 0x00 },
2609 { 0x22, 0x7AC, 0x33 },
2610 { 0x22, 0x7AD, 0x80 },
2611 /* common */
2612 { 0x22, 0x782, 0xC1 },
2613 { 0x22, 0x771, 0x2C },
2614 { 0x22, 0x772, 0x2C },
2615 { 0x22, 0x788, 0x04 },
2616 { 0x01, 0x7B0, 0x08 },
2617 {}
2618};
2619
372f8c75
TI		 2620static const struct hda_fixup stac92hd83xxx_fixups[] = {
2621 [STAC_92HD83XXX_REF] = {
2622 .type = HDA_FIXUP_PINS,
2623 .v.pins = ref92hd83xxx_pin_configs,
2624 },
2625 [STAC_92HD83XXX_PWR_REF] = {
2626 .type = HDA_FIXUP_PINS,
2627 .v.pins = ref92hd83xxx_pin_configs,
2628 },
2629 [STAC_DELL_S14] = {
2630 .type = HDA_FIXUP_PINS,
2631 .v.pins = dell_s14_pin_configs,
2632 },
2633 [STAC_DELL_VOSTRO_3500] = {
2634 .type = HDA_FIXUP_PINS,
2635 .v.pins = dell_vostro_3500_pin_configs,
2636 },
2637 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2638 .type = HDA_FIXUP_PINS,
2639 .v.pins = hp_cNB11_intquad_pin_configs,
2640 .chained = true,
2641 .chain_id = STAC_92HD83XXX_HP,
2642 },
2643 [STAC_92HD83XXX_HP] = {
2644 .type = HDA_FIXUP_FUNC,
2645 .v.func = stac92hd83xxx_fixup_hp,
2646 },
2647 [STAC_HP_DV7_4000] = {
2648 .type = HDA_FIXUP_PINS,
2649 .v.pins = hp_dv7_4000_pin_configs,
2650 .chained = true,
2651 .chain_id = STAC_92HD83XXX_HP,
2652 },
2653 [STAC_HP_ZEPHYR] = {
2654 .type = HDA_FIXUP_FUNC,
2655 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2656 .chained = true,
2657 .chain_id = STAC_92HD83XXX_HP,
2658 },
2659 [STAC_92HD83XXX_HP_LED] = {
2660 .type = HDA_FIXUP_FUNC,
2661 .v.func = stac92hd83xxx_fixup_hp_led,
2662 .chained = true,
2663 .chain_id = STAC_92HD83XXX_HP,
2664 },
2665 [STAC_92HD83XXX_HP_INV_LED] = {
2666 .type = HDA_FIXUP_FUNC,
2667 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2668 .chained = true,
2669 .chain_id = STAC_92HD83XXX_HP,
2670 },
2671 [STAC_92HD83XXX_HP_MIC_LED] = {
2672 .type = HDA_FIXUP_FUNC,
2673 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2674 .chained = true,
2675 .chain_id = STAC_92HD83XXX_HP,
2676 },
37c367ec
TI		 2677 [STAC_HP_LED_GPIO10] = {
2678 .type = HDA_FIXUP_FUNC,
2679 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2680 .chained = true,
2681 .chain_id = STAC_92HD83XXX_HP,
2682 },
372f8c75
TI		 2683 [STAC_92HD83XXX_HEADSET_JACK] = {
2684 .type = HDA_FIXUP_FUNC,
2685 .v.func = stac92hd83xxx_fixup_headset_jack,
2686 },
49920427
TI		 2687 [STAC_HP_ENVY_BASS] = {
2688 .type = HDA_FIXUP_PINS,
2689 .v.pins = (const struct hda_pintbl[]) {
2690 { 0x0f, 0x90170111 },
2691 {}
2692 },
2693 },
d009f3de
VK		 2694 [STAC_HP_BNB13_EQ] = {
2695 .type = HDA_FIXUP_VERBS,
2696 .v.verbs = hp_bnb13_eq_verbs,
2697 .chained = true,
2698 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2699 },
8695a003
TI		 2700 [STAC_HP_ENVY_TS_BASS] = {
2701 .type = HDA_FIXUP_PINS,
2702 .v.pins = (const struct hda_pintbl[]) {
2703 { 0x10, 0x92170111 },
2704 {}
2705 },
2706 },
6ab42ff4
HW		 2707 [STAC_HP_ENVY_TS_DAC_BIND] = {
2708 .type = HDA_FIXUP_FUNC,
2709 .v.func = hp_envy_ts_fixup_dac_bind,
2710 .chained = true,
2711 .chain_id = STAC_HP_ENVY_TS_BASS,
2712 },
4227de2a
TI		 2713 [STAC_92HD83XXX_GPIO10_EAPD] = {
2714 .type = HDA_FIXUP_FUNC,
2715 .v.func = stac92hd83xxx_fixup_gpio10_eapd,
2716 },
d0513fc6
MR		 2717};
2718
372f8c75
TI		 2719static const struct hda_model_fixup stac92hd83xxx_models[] = {
2720 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2721 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2722 { .id = STAC_DELL_S14, .name = "dell-s14" },
2723 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2724 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2725 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2726 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2727 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2728 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2729 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2730 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
49920427 2731 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
d009f3de 2732 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
8695a003 2733 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
372f8c75 2734 {}
d0513fc6
MR		 2735};
2736
372f8c75 2737static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
d0513fc6
MR		 2738 /* SigmaTel reference board */
2739 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 2740 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 2741 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2742 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 2743 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2744 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH		 2745 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2746 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2747 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2748 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2749 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2750 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2751 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2752 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2753 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2754 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2755 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2756 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2757 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2758 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2759 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2760 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2761 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2762 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW		 2763 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2764 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 2765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2766 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2768 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2769 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2770 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2771 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 2772 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK		 2773 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2774 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2775 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2776 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
49920427
TI		 2777 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2778 "HP Envy Spectre", STAC_HP_ENVY_BASS),
37c367ec
TI		 2779 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2780 "HP Folio 13", STAC_HP_LED_GPIO10),
62cbde18 2781 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
d009f3de
VK		 2782 "HP Folio", STAC_HP_BNB13_EQ),
2783 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2784 "HP bNB13", STAC_HP_BNB13_EQ),
2785 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2786 "HP bNB13", STAC_HP_BNB13_EQ),
2787 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2788 "HP bNB13", STAC_HP_BNB13_EQ),
8695a003
TI		 2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2790 "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
6ab42ff4
HW		 2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2792 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
d009f3de
VK		 2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2794 "HP bNB13", STAC_HP_BNB13_EQ),
2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2796 "HP bNB13", STAC_HP_BNB13_EQ),
2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2798 "HP bNB13", STAC_HP_BNB13_EQ),
2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2800 "HP bNB13", STAC_HP_BNB13_EQ),
2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2802 "HP bNB13", STAC_HP_BNB13_EQ),
2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2804 "HP bNB13", STAC_HP_BNB13_EQ),
2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2806 "HP bNB13", STAC_HP_BNB13_EQ),
2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2808 "HP bNB13", STAC_HP_BNB13_EQ),
2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2810 "HP bNB13", STAC_HP_BNB13_EQ),
2811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2812 "HP bNB13", STAC_HP_BNB13_EQ),
2813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2814 "HP bNB13", STAC_HP_BNB13_EQ),
2815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2816 "HP bNB13", STAC_HP_BNB13_EQ),
2817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2818 "HP bNB13", STAC_HP_BNB13_EQ),
2819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2820 "HP bNB13", STAC_HP_BNB13_EQ),
2821 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2822 "HP bNB13", STAC_HP_BNB13_EQ),
2823 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2824 "HP bNB13", STAC_HP_BNB13_EQ),
2825 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2826 "HP bNB13", STAC_HP_BNB13_EQ),
2827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2828 "HP bNB13", STAC_HP_BNB13_EQ),
2829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2830 "HP bNB13", STAC_HP_BNB13_EQ),
2831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2832 "HP bNB13", STAC_HP_BNB13_EQ),
2833 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2834 "HP bNB13", STAC_HP_BNB13_EQ),
2835 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2836 "HP bNB13", STAC_HP_BNB13_EQ),
2837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2838 "HP bNB13", STAC_HP_BNB13_EQ),
2839 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2840 "HP bNB13", STAC_HP_BNB13_EQ),
2841 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2842 "HP bNB13", STAC_HP_BNB13_EQ),
2843 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2844 "HP bNB13", STAC_HP_BNB13_EQ),
2845 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2846 "HP bNB13", STAC_HP_BNB13_EQ),
2847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2848 "HP bNB13", STAC_HP_BNB13_EQ),
2849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2850 "HP bNB13", STAC_HP_BNB13_EQ),
2851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2852 "HP bNB13", STAC_HP_BNB13_EQ),
2853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2854 "HP bNB13", STAC_HP_BNB13_EQ),
2855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2856 "HP bNB13", STAC_HP_BNB13_EQ),
2857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2858 "HP bNB13", STAC_HP_BNB13_EQ),
2859 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2860 "HP bNB13", STAC_HP_BNB13_EQ),
2861 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2862 "HP bNB13", STAC_HP_BNB13_EQ),
2863 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2864 "HP bNB13", STAC_HP_BNB13_EQ),
2865 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2866 "HP bNB13", STAC_HP_BNB13_EQ),
2867 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2868 "HP bNB13", STAC_HP_BNB13_EQ),
2869 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2870 "HP bNB13", STAC_HP_BNB13_EQ),
2871 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2872 "HP bNB13", STAC_HP_BNB13_EQ),
2873 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2874 "HP bNB13", STAC_HP_BNB13_EQ),
2875 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2876 "HP bNB13", STAC_HP_BNB13_EQ),
2877 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2878 "HP bNB13", STAC_HP_BNB13_EQ),
2879 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2880 "HP bNB13", STAC_HP_BNB13_EQ),
f9afed1f
TI		 2881 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2882 "HP", STAC_92HD83XXX_HP_MIC_LED),
4059a42c
TI		 2883 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2884 "HP", STAC_92HD83XXX_HP_MIC_LED),
2885 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2886 "HP", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK		 2887 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2888 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2889 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2890 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2891 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2892 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2893 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2894 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2895 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2896 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2897 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2898 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2899 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2900 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2901 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2902 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2903 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2904 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2905 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2906 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2907 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2908 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2909 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2910 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2911 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2912 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2913 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2914 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 2915 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2916 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 2917 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2918 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV		 2919 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2920 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
8c698fe2
TI		 2921 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2922 "HP Mini", STAC_92HD83XXX_HP_LED),
372f8c75 2923 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
b9d9c9ef
TI		 2924 /* match both for 0xfa91 and 0xfa93 */
2925 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
4227de2a 2926 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
574f3c4f 2927 {} /* terminator */
d0513fc6
MR		 2928};
2929
36c9db7a
TI		 2930/* HP dv7 bass switch - GPIO5 */
2931#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2932static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2933 struct snd_ctl_elem_value *ucontrol)
2934{
2935 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2936 struct sigmatel_spec *spec = codec->spec;
2937 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2938 return 0;
2939}
2940
2941static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2942 struct snd_ctl_elem_value *ucontrol)
2943{
2944 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2945 struct sigmatel_spec *spec = codec->spec;
2946 unsigned int gpio_data;
2947
2948 gpio_data = (spec->gpio_data & ~0x20) |
2949 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2950 if (gpio_data == spec->gpio_data)
2951 return 0;
2952 spec->gpio_data = gpio_data;
2953 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2954 return 1;
2955}
2956
2957static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2959 .info = stac_hp_bass_gpio_info,
2960 .get = stac_hp_bass_gpio_get,
2961 .put = stac_hp_bass_gpio_put,
2962};
2963
2964static int stac_add_hp_bass_switch(struct hda_codec *codec)
2965{
2966 struct sigmatel_spec *spec = codec->spec;
2967
2968 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2969 &stac_hp_bass_sw_ctrl))
2970 return -ENOMEM;
2971
2972 spec->gpio_mask |= 0x20;
2973 spec->gpio_dir |= 0x20;
2974 spec->gpio_data |= 0x20;
2975 return 0;
2976}
2977
0f6fcb73
TI		 2978static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2979 { 0x0a, 0x02214030 },
2980 { 0x0b, 0x02a19040 },
2981 { 0x0c, 0x01a19020 },
2982 { 0x0d, 0x01014010 },
2983 { 0x0e, 0x0181302e },
2984 { 0x0f, 0x01014010 },
2985 { 0x14, 0x01019020 },
2986 { 0x18, 0x90a000f0 },
2987 { 0x19, 0x90a000f0 },
2988 { 0x1e, 0x01452050 },
2989 { 0x1f, 0x01452050 },
2990 {}
e035b841
MR		 2991};
2992
0f6fcb73
TI		 2993static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2994 { 0x0a, 0x0421101f },
2995 { 0x0b, 0x04a11221 },
2996 { 0x0c, 0x40f000f0 },
2997 { 0x0d, 0x90170110 },
2998 { 0x0e, 0x23a1902e },
2999 { 0x0f, 0x23014250 },
3000 { 0x14, 0x40f000f0 },
3001 { 0x18, 0x90a000f0 },
3002 { 0x19, 0x40f000f0 },
3003 { 0x1e, 0x4f0000f0 },
3004 { 0x1f, 0x4f0000f0 },
3005 {}
a7662640
MR		 3006};
3007
0f6fcb73
TI		 3008static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3009 { 0x0a, 0x0421101f },
3010 { 0x0b, 0x04a11221 },
3011 { 0x0c, 0x90a70330 },
3012 { 0x0d, 0x90170110 },
3013 { 0x0e, 0x23a1902e },
3014 { 0x0f, 0x23014250 },
3015 { 0x14, 0x40f000f0 },
3016 { 0x18, 0x40f000f0 },
3017 { 0x19, 0x40f000f0 },
3018 { 0x1e, 0x044413b0 },
3019 { 0x1f, 0x044413b0 },
3020 {}
a7662640
MR		 3021};
3022
0f6fcb73
TI		 3023static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3024 { 0x0a, 0x0421101f },
3025 { 0x0b, 0x04a11221 },
3026 { 0x0c, 0x90a70330 },
3027 { 0x0d, 0x90170110 },
3028 { 0x0e, 0x40f000f0 },
3029 { 0x0f, 0x40f000f0 },
3030 { 0x14, 0x40f000f0 },
3031 { 0x18, 0x90a000f0 },
3032 { 0x19, 0x40f000f0 },
3033 { 0x1e, 0x044413b0 },
3034 { 0x1f, 0x044413b0 },
3035 {}
3a7abfd2
MR		 3036};
3037
0f6fcb73
TI		 3038static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3039 const struct hda_fixup *fix, int action)
3040{
3041 struct sigmatel_spec *spec = codec->spec;
3042
3043 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3044 return;
3045
3046 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3047 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3048}
3049
0f6fcb73
TI		 3050static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3051 const struct hda_fixup *fix, int action)
3052{
3053 struct sigmatel_spec *spec = codec->spec;
1a4f69d5 3054 struct hda_jack_callback *jack;
0f6fcb73
TI		 3055
3056 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3057 return;
3058
3059 /* Enable VREF power saving on GPIO1 detect */
7639a06c 3060 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
0f6fcb73 3061 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
7639a06c 3062 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
bda17b82
TI		 3063 stac_vref_event);
3064 if (!IS_ERR(jack))
36c9db7a
TI		 3065 jack->private_data = 0x02;
3066
0f6fcb73
TI		 3067 spec->gpio_mask |= 0x02;
3068
3069 /* enable internal microphone */
3070 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
0f6fcb73
TI		 3071}
3072
3073static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3074 const struct hda_fixup *fix, int action)
3075{
3076 struct sigmatel_spec *spec = codec->spec;
3077
3078 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3079 return;
3080 spec->gpio_led = 0x01;
3081}
3082
3083static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3084 const struct hda_fixup *fix, int action)
3085{
0f6fcb73
TI		 3086 unsigned int cap;
3087
3088 switch (action) {
3089 case HDA_FIXUP_ACT_PRE_PROBE:
3090 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
f6655d52
TI		 3091 break;
3092
3093 case HDA_FIXUP_ACT_PROBE:
0f6fcb73
TI		 3094 /* enable bass on HP dv7 */
3095 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3096 cap &= AC_GPIO_IO_COUNT;
3097 if (cap >= 6)
3098 stac_add_hp_bass_switch(codec);
3099 break;
3100 }
3101}
3102
3103static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3104 const struct hda_fixup *fix, int action)
3105{
3106 struct sigmatel_spec *spec = codec->spec;
3107
3108 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3109 return;
3110 spec->gpio_led = 0x08;
0f6fcb73
TI		 3111}
3112
196543d5
TI		 3113static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3114{
3115 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3116
3117 /* count line-out, too, as BIOS sets often so */
3118 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3119 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3120 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3121}
3122
3123static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3124{
3125 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3126
3127 /* It was changed in the BIOS to just satisfy MS DTM.
3128 * Lets turn it back into slaved HP
3129 */
3130 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3131 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3132 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3133 0x1f;
3134 snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3135}
0f6fcb73
TI		 3136
3137static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3138 const struct hda_fixup *fix, int action)
3139{
3140 struct sigmatel_spec *spec = codec->spec;
3141
3142 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3143 return;
3144
196543d5
TI		 3145 /* when both output A and F are assigned, these are supposedly
3146 * dock and built-in headphones; fix both pin configs
3147 */
3148 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3149 fixup_hp_headphone(codec, 0x0a);
3150 fixup_hp_headphone(codec, 0x0f);
0f6fcb73
TI		 3151 }
3152
36c9db7a 3153 if (find_mute_led_cfg(codec, 1))
4e76a883 3154 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
0f6fcb73
TI		 3155 spec->gpio_led,
3156 spec->gpio_led_polarity);
3157
3158}
3159
3160static const struct hda_fixup stac92hd71bxx_fixups[] = {
3161 [STAC_92HD71BXX_REF] = {
3162 .type = HDA_FIXUP_FUNC,
3163 .v.func = stac92hd71bxx_fixup_ref,
3164 },
3165 [STAC_DELL_M4_1] = {
3166 .type = HDA_FIXUP_PINS,
3167 .v.pins = dell_m4_1_pin_configs,
0f6fcb73
TI		 3168 },
3169 [STAC_DELL_M4_2] = {
3170 .type = HDA_FIXUP_PINS,
3171 .v.pins = dell_m4_2_pin_configs,
0f6fcb73
TI		 3172 },
3173 [STAC_DELL_M4_3] = {
3174 .type = HDA_FIXUP_PINS,
3175 .v.pins = dell_m4_3_pin_configs,
0f6fcb73
TI		 3176 },
3177 [STAC_HP_M4] = {
3178 .type = HDA_FIXUP_FUNC,
3179 .v.func = stac92hd71bxx_fixup_hp_m4,
3180 .chained = true,
3181 .chain_id = STAC_92HD71BXX_HP,
3182 },
3183 [STAC_HP_DV4] = {
3184 .type = HDA_FIXUP_FUNC,
3185 .v.func = stac92hd71bxx_fixup_hp_dv4,
3186 .chained = true,
3187 .chain_id = STAC_HP_DV5,
3188 },
3189 [STAC_HP_DV5] = {
3190 .type = HDA_FIXUP_FUNC,
3191 .v.func = stac92hd71bxx_fixup_hp_dv5,
3192 .chained = true,
3193 .chain_id = STAC_92HD71BXX_HP,
3194 },
3195 [STAC_HP_HDX] = {
3196 .type = HDA_FIXUP_FUNC,
3197 .v.func = stac92hd71bxx_fixup_hp_hdx,
3198 .chained = true,
3199 .chain_id = STAC_92HD71BXX_HP,
3200 },
36c9db7a 3201 [STAC_92HD71BXX_HP] = {
0f6fcb73 3202 .type = HDA_FIXUP_FUNC,
36c9db7a 3203 .v.func = stac92hd71bxx_fixup_hp,
0f6fcb73 3204 },
e035b841
MR		 3205};
3206
0f6fcb73
TI		 3207static const struct hda_model_fixup stac92hd71bxx_models[] = {
3208 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3209 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3210 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3211 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3212 { .id = STAC_HP_M4, .name = "hp-m4" },
3213 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3214 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3215 { .id = STAC_HP_HDX, .name = "hp-hdx" },
36c9db7a 3216 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
0f6fcb73 3217 {}
e035b841
MR		 3218};
3219
0f6fcb73 3220static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
e035b841
MR		 3221 /* SigmaTel reference board */
3222 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3223 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 3224 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3225 "DFI LanParty", STAC_92HD71BXX_REF),
5bdaaada
VK		 3226 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3227 "HP", STAC_HP_DV5),
58d8395b
TI		 3228 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3229 "HP", STAC_HP_DV5),
2ae466f8 3230 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 3231 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 3232 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3233 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 3234 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3235 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 3236 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 3237 "HP mini 1000", STAC_HP_M4),
ae6241fb 3238 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 3239 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 3240 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3241 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 3242 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3243 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 3244 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3245 "HP DV6", STAC_HP_DV5),
1972d025
TI		 3246 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3247 "HP", STAC_HP_DV5),
0f6fcb73 3248 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
a7662640
MR		 3249 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3250 "unknown Dell", STAC_DELL_M4_1),
3251 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3252 "unknown Dell", STAC_DELL_M4_1),
3253 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3254 "unknown Dell", STAC_DELL_M4_1),
3255 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3256 "unknown Dell", STAC_DELL_M4_1),
3257 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3258 "unknown Dell", STAC_DELL_M4_1),
3259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3260 "unknown Dell", STAC_DELL_M4_1),
3261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3262 "unknown Dell", STAC_DELL_M4_1),
3263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3264 "unknown Dell", STAC_DELL_M4_2),
3265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3266 "unknown Dell", STAC_DELL_M4_2),
3267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3268 "unknown Dell", STAC_DELL_M4_2),
3269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3270 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 3271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3272 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 3273 {} /* terminator */
3274};
3275
0a427846
TI		 3276static const struct hda_pintbl ref922x_pin_configs[] = {
3277 { 0x0a, 0x01014010 },
3278 { 0x0b, 0x01016011 },
3279 { 0x0c, 0x01012012 },
3280 { 0x0d, 0x0221401f },
3281 { 0x0e, 0x01813122 },
3282 { 0x0f, 0x01011014 },
3283 { 0x10, 0x01441030 },
3284 { 0x11, 0x01c41030 },
3285 { 0x15, 0x40000100 },
3286 { 0x1b, 0x40000100 },
3287 {}
2f2f4251
M		 3288};
3289
dfe495d0
TI		 3290/*
3291 STAC 922X pin configs for
3292 102801A7
3293 102801AB
3294 102801A9
3295 102801D1
3296 102801D2
3297*/
0a427846
TI		 3298static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3299 { 0x0a, 0x02214030 },
3300 { 0x0b, 0x01a19021 },
3301 { 0x0c, 0x01111012 },
3302 { 0x0d, 0x01114010 },
3303 { 0x0e, 0x02a19020 },
3304 { 0x0f, 0x01117011 },
3305 { 0x10, 0x400001f0 },
3306 { 0x11, 0x400001f1 },
3307 { 0x15, 0x01813122 },
3308 { 0x1b, 0x400001f2 },
3309 {}
dfe495d0
TI		 3310};
3311
3312/*
3313 STAC 922X pin configs for
3314 102801AC
3315 102801D0
3316*/
0a427846
TI		 3317static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3318 { 0x0a, 0x02214030 },
3319 { 0x0b, 0x01a19021 },
3320 { 0x0c, 0x01111012 },
3321 { 0x0d, 0x01114010 },
3322 { 0x0e, 0x02a19020 },
3323 { 0x0f, 0x01117011 },
3324 { 0x10, 0x01451140 },
3325 { 0x11, 0x400001f0 },
3326 { 0x15, 0x01813122 },
3327 { 0x1b, 0x400001f1 },
3328 {}
dfe495d0
TI		 3329};
3330
3331/*
3332 STAC 922X pin configs for
3333 102801BF
3334*/
0a427846
TI		 3335static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3336 { 0x0a, 0x0321101f },
3337 { 0x0b, 0x01112024 },
3338 { 0x0c, 0x01111222 },
3339 { 0x0d, 0x91174220 },
3340 { 0x0e, 0x03a11050 },
3341 { 0x0f, 0x01116221 },
3342 { 0x10, 0x90a70330 },
3343 { 0x11, 0x01452340 },
3344 { 0x15, 0x40C003f1 },
3345 { 0x1b, 0x405003f0 },
3346 {}
dfe495d0
TI		 3347};
3348
3349/*
3350 STAC 9221 A1 pin configs for
3351 102801D7 (Dell XPS M1210)
3352*/
0a427846
TI		 3353static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3354 { 0x0a, 0x02211211 },
3355 { 0x0b, 0x408103ff },
3356 { 0x0c, 0x02a1123e },
3357 { 0x0d, 0x90100310 },
3358 { 0x0e, 0x408003f1 },
3359 { 0x0f, 0x0221121f },
3360 { 0x10, 0x03451340 },
3361 { 0x11, 0x40c003f2 },
3362 { 0x15, 0x508003f3 },
3363 { 0x1b, 0x405003f4 },
3364 {}
dfe495d0
TI		 3365};
3366
0a427846
TI		 3367static const struct hda_pintbl d945gtp3_pin_configs[] = {
3368 { 0x0a, 0x0221401f },
3369 { 0x0b, 0x01a19022 },
3370 { 0x0c, 0x01813021 },
3371 { 0x0d, 0x01014010 },
3372 { 0x0e, 0x40000100 },
3373 { 0x0f, 0x40000100 },
3374 { 0x10, 0x40000100 },
3375 { 0x11, 0x40000100 },
3376 { 0x15, 0x02a19120 },
3377 { 0x1b, 0x40000100 },
3378 {}
3379};
3380
3381static const struct hda_pintbl d945gtp5_pin_configs[] = {
3382 { 0x0a, 0x0221401f },
3383 { 0x0b, 0x01011012 },
3384 { 0x0c, 0x01813024 },
3385 { 0x0d, 0x01014010 },
3386 { 0x0e, 0x01a19021 },
3387 { 0x0f, 0x01016011 },
3388 { 0x10, 0x01452130 },
3389 { 0x11, 0x40000100 },
3390 { 0x15, 0x02a19320 },
3391 { 0x1b, 0x40000100 },
3392 {}
403d1944
MP		 3393};
3394
0a427846
TI		 3395static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3396 { 0x0a, 0x0121e21f },
3397 { 0x0b, 0x400000ff },
3398 { 0x0c, 0x9017e110 },
3399 { 0x0d, 0x400000fd },
3400 { 0x0e, 0x400000fe },
3401 { 0x0f, 0x0181e020 },
3402 { 0x10, 0x1145e030 },
3403 { 0x11, 0x11c5e240 },
3404 { 0x15, 0x400000fc },
3405 { 0x1b, 0x400000fb },
3406 {}
403d1944
MP		 3407};
3408
0a427846
TI		 3409static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3410 { 0x0a, 0x0121e21f },
3411 { 0x0b, 0x90a7012e },
3412 { 0x0c, 0x9017e110 },
3413 { 0x0d, 0x400000fd },
3414 { 0x0e, 0x400000fe },
3415 { 0x0f, 0x0181e020 },
3416 { 0x10, 0x1145e230 },
3417 { 0x11, 0x500000fa },
3418 { 0x15, 0x400000fc },
3419 { 0x1b, 0x400000fb },
3420 {}
5d5d3bc3
IZ		 3421};
3422
0a427846
TI		 3423static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3424 { 0x0a, 0x0121e21f },
3425 { 0x0b, 0x90a7012e },
3426 { 0x0c, 0x9017e110 },
3427 { 0x0d, 0x400000fd },
3428 { 0x0e, 0x400000fe },
3429 { 0x0f, 0x0181e020 },
3430 { 0x10, 0x1145e230 },
3431 { 0x11, 0x11c5e240 },
3432 { 0x15, 0x400000fc },
3433 { 0x1b, 0x400000fb },
3434 {}
6f0778d8
NB		 3435};
3436
0a427846
TI		 3437static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3438 { 0x0a, 0x0321e21f },
3439 { 0x0b, 0x03a1e02e },
3440 { 0x0c, 0x9017e110 },
3441 { 0x0d, 0x9017e11f },
3442 { 0x0e, 0x400000fe },
3443 { 0x0f, 0x0381e020 },
3444 { 0x10, 0x1345e230 },
3445 { 0x11, 0x13c5e240 },
3446 { 0x15, 0x400000fc },
3447 { 0x1b, 0x400000fb },
3448 {}
3fc24d85
TI		 3449};
3450
0a427846
TI		 3451static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3452 { 0x0a, 0x0321e21f },
3453 { 0x0b, 0x03a1e02e },
3454 { 0x0c, 0x9017e110 },
3455 { 0x0d, 0x9017e11f },
3456 { 0x0e, 0x400000fe },
3457 { 0x0f, 0x0381e020 },
3458 { 0x10, 0x1345e230 },
3459 { 0x11, 0x13c5e240 },
3460 { 0x15, 0x400000fc },
3461 { 0x1b, 0x400000fb },
3462 {}
f16928fb
SF		 3463};
3464
0a427846
TI		 3465static const struct hda_pintbl ecs202_pin_configs[] = {
3466 { 0x0a, 0x0221401f },
3467 { 0x0b, 0x02a19020 },
3468 { 0x0c, 0x01a19020 },
3469 { 0x0d, 0x01114010 },
3470 { 0x0e, 0x408000f0 },
3471 { 0x0f, 0x01813022 },
3472 { 0x10, 0x074510a0 },
3473 { 0x11, 0x40c400f1 },
3474 { 0x15, 0x9037012e },
3475 { 0x1b, 0x40e000f2 },
3476 {}
0dae0f83
TI		 3477};
3478
0a427846
TI		 3479/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3480static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
697aebab 3481 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
0a427846
TI		 3482 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3483 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3484 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3485 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3486 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3487 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3488 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3489 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3490 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3491 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3492 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3493 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3494 {}
8c650087 3495};
76c08828 3496
0a427846
TI		 3497static const struct hda_fixup stac922x_fixups[];
3498
3499/* remap the fixup from codec SSID and apply it */
3500static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3501 const struct hda_fixup *fix,
3502 int action)
3503{
3504 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3505 return;
f5662e1c
DH		 3506
3507 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
0a427846
TI		 3508 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3509 stac922x_fixups);
f5662e1c 3510 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
0a427846
TI		 3511 snd_hda_apply_fixup(codec, action);
3512}
3513
3514static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3515 const struct hda_fixup *fix,
3516 int action)
3517{
3518 struct sigmatel_spec *spec = codec->spec;
3519
3520 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3521 spec->gpio_mask = spec->gpio_dir = 0x03;
3522 spec->gpio_data = 0x03;
3523 }
3524}
3525
3526static const struct hda_fixup stac922x_fixups[] = {
3527 [STAC_D945_REF] = {
3528 .type = HDA_FIXUP_PINS,
3529 .v.pins = ref922x_pin_configs,
3530 },
3531 [STAC_D945GTP3] = {
3532 .type = HDA_FIXUP_PINS,
3533 .v.pins = d945gtp3_pin_configs,
3534 },
3535 [STAC_D945GTP5] = {
3536 .type = HDA_FIXUP_PINS,
3537 .v.pins = d945gtp5_pin_configs,
3538 },
3539 [STAC_INTEL_MAC_AUTO] = {
3540 .type = HDA_FIXUP_FUNC,
3541 .v.func = stac922x_fixup_intel_mac_auto,
3542 },
3543 [STAC_INTEL_MAC_V1] = {
3544 .type = HDA_FIXUP_PINS,
3545 .v.pins = intel_mac_v1_pin_configs,
3546 .chained = true,
3547 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3548 },
3549 [STAC_INTEL_MAC_V2] = {
3550 .type = HDA_FIXUP_PINS,
3551 .v.pins = intel_mac_v2_pin_configs,
3552 .chained = true,
3553 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3554 },
3555 [STAC_INTEL_MAC_V3] = {
3556 .type = HDA_FIXUP_PINS,
3557 .v.pins = intel_mac_v3_pin_configs,
3558 .chained = true,
3559 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3560 },
3561 [STAC_INTEL_MAC_V4] = {
3562 .type = HDA_FIXUP_PINS,
3563 .v.pins = intel_mac_v4_pin_configs,
3564 .chained = true,
3565 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3566 },
3567 [STAC_INTEL_MAC_V5] = {
3568 .type = HDA_FIXUP_PINS,
3569 .v.pins = intel_mac_v5_pin_configs,
3570 .chained = true,
3571 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3572 },
3573 [STAC_922X_INTEL_MAC_GPIO] = {
3574 .type = HDA_FIXUP_FUNC,
3575 .v.func = stac922x_fixup_intel_mac_gpio,
3576 },
3577 [STAC_ECS_202] = {
3578 .type = HDA_FIXUP_PINS,
3579 .v.pins = ecs202_pin_configs,
3580 },
3581 [STAC_922X_DELL_D81] = {
3582 .type = HDA_FIXUP_PINS,
3583 .v.pins = dell_922x_d81_pin_configs,
3584 },
3585 [STAC_922X_DELL_D82] = {
3586 .type = HDA_FIXUP_PINS,
3587 .v.pins = dell_922x_d82_pin_configs,
3588 },
3589 [STAC_922X_DELL_M81] = {
3590 .type = HDA_FIXUP_PINS,
3591 .v.pins = dell_922x_m81_pin_configs,
3592 },
3593 [STAC_922X_DELL_M82] = {
3594 .type = HDA_FIXUP_PINS,
3595 .v.pins = dell_922x_m82_pin_configs,
3596 },
3597};
3598
3599static const struct hda_model_fixup stac922x_models[] = {
3600 { .id = STAC_D945_REF, .name = "ref" },
3601 { .id = STAC_D945GTP5, .name = "5stack" },
3602 { .id = STAC_D945GTP3, .name = "3stack" },
3603 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3604 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3605 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3606 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3607 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3608 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3609 { .id = STAC_ECS_202, .name = "ecs202" },
3610 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3611 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3612 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3613 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
dfe495d0 3614 /* for backward compatibility */
0a427846
TI		 3615 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3616 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3617 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3618 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3619 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3620 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3621 {}
3622};
3623
3624static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
f5fcc13c
TI		 3625 /* SigmaTel reference board */
3626 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3627 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 3628 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3629 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 3630 /* Intel 945G based systems */
3631 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3632 "Intel D945G", STAC_D945GTP3),
3633 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3634 "Intel D945G", STAC_D945GTP3),
3635 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3636 "Intel D945G", STAC_D945GTP3),
3637 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3638 "Intel D945G", STAC_D945GTP3),
3639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3640 "Intel D945G", STAC_D945GTP3),
3641 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3642 "Intel D945G", STAC_D945GTP3),
3643 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3644 "Intel D945G", STAC_D945GTP3),
3645 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3646 "Intel D945G", STAC_D945GTP3),
3647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3648 "Intel D945G", STAC_D945GTP3),
3649 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3650 "Intel D945G", STAC_D945GTP3),
3651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3652 "Intel D945G", STAC_D945GTP3),
3653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3654 "Intel D945G", STAC_D945GTP3),
3655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3656 "Intel D945G", STAC_D945GTP3),
3657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3658 "Intel D945G", STAC_D945GTP3),
3659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3660 "Intel D945G", STAC_D945GTP3),
3661 /* Intel D945G 5-stack systems */
3662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3663 "Intel D945G", STAC_D945GTP5),
3664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3665 "Intel D945G", STAC_D945GTP5),
3666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3667 "Intel D945G", STAC_D945GTP5),
3668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3669 "Intel D945G", STAC_D945GTP5),
3670 /* Intel 945P based systems */
3671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3672 "Intel D945P", STAC_D945GTP3),
3673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3674 "Intel D945P", STAC_D945GTP3),
3675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3676 "Intel D945P", STAC_D945GTP3),
3677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3678 "Intel D945P", STAC_D945GTP3),
3679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3680 "Intel D945P", STAC_D945GTP3),
3681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3682 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 3683 /* other intel */
3684 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3685 "Intel D945", STAC_D945_REF),
f5fcc13c 3686 /* other systems */
0a427846 3687
536319af 3688 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
0a427846
TI		 3689 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3690
dfe495d0
TI		 3691 /* Dell systems */
3692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3693 "unknown Dell", STAC_922X_DELL_D81),
3694 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3695 "unknown Dell", STAC_922X_DELL_D81),
3696 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3697 "unknown Dell", STAC_922X_DELL_D81),
3698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3699 "unknown Dell", STAC_922X_DELL_D82),
3700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3701 "unknown Dell", STAC_922X_DELL_M81),
3702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3703 "unknown Dell", STAC_922X_DELL_D82),
3704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3705 "unknown Dell", STAC_922X_DELL_D81),
3706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3707 "unknown Dell", STAC_922X_DELL_D81),
3708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3709 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 3710 /* ECS/PC Chips boards */
dea0a509 3711 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 3712 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 3713 {} /* terminator */
3714};
3715
29ac8363
TI		 3716static const struct hda_pintbl ref927x_pin_configs[] = {
3717 { 0x0a, 0x02214020 },
3718 { 0x0b, 0x02a19080 },
3719 { 0x0c, 0x0181304e },
3720 { 0x0d, 0x01014010 },
3721 { 0x0e, 0x01a19040 },
3722 { 0x0f, 0x01011012 },
3723 { 0x10, 0x01016011 },
3724 { 0x11, 0x0101201f },
3725 { 0x12, 0x183301f0 },
3726 { 0x13, 0x18a001f0 },
3727 { 0x14, 0x18a001f0 },
3728 { 0x21, 0x01442070 },
3729 { 0x22, 0x01c42190 },
3730 { 0x23, 0x40000100 },
3731 {}
3cc08dc6
MP		 3732};
3733
29ac8363
TI		 3734static const struct hda_pintbl d965_3st_pin_configs[] = {
3735 { 0x0a, 0x0221401f },
3736 { 0x0b, 0x02a19120 },
3737 { 0x0c, 0x40000100 },
3738 { 0x0d, 0x01014011 },
3739 { 0x0e, 0x01a19021 },
3740 { 0x0f, 0x01813024 },
3741 { 0x10, 0x40000100 },
3742 { 0x11, 0x40000100 },
3743 { 0x12, 0x40000100 },
3744 { 0x13, 0x40000100 },
3745 { 0x14, 0x40000100 },
3746 { 0x21, 0x40000100 },
3747 { 0x22, 0x40000100 },
3748 { 0x23, 0x40000100 },
3749 {}
81d3dbde
TD		 3750};
3751
29ac8363
TI		 3752static const struct hda_pintbl d965_5st_pin_configs[] = {
3753 { 0x0a, 0x02214020 },
3754 { 0x0b, 0x02a19080 },
3755 { 0x0c, 0x0181304e },
3756 { 0x0d, 0x01014010 },
3757 { 0x0e, 0x01a19040 },
3758 { 0x0f, 0x01011012 },
3759 { 0x10, 0x01016011 },
3760 { 0x11, 0x40000100 },
3761 { 0x12, 0x40000100 },
3762 { 0x13, 0x40000100 },
3763 { 0x14, 0x40000100 },
3764 { 0x21, 0x01442070 },
3765 { 0x22, 0x40000100 },
3766 { 0x23, 0x40000100 },
3767 {}
93ed1503
TD		 3768};
3769
29ac8363
TI		 3770static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3771 { 0x0a, 0x40000100 },
3772 { 0x0b, 0x40000100 },
3773 { 0x0c, 0x0181304e },
3774 { 0x0d, 0x01014010 },
3775 { 0x0e, 0x01a19040 },
3776 { 0x0f, 0x01011012 },
3777 { 0x10, 0x01016011 },
3778 { 0x11, 0x40000100 },
3779 { 0x12, 0x40000100 },
3780 { 0x13, 0x40000100 },
3781 { 0x14, 0x40000100 },
3782 { 0x21, 0x01442070 },
3783 { 0x22, 0x40000100 },
3784 { 0x23, 0x40000100 },
3785 {}
679d92ed
TI		 3786};
3787
29ac8363
TI		 3788static const struct hda_pintbl dell_3st_pin_configs[] = {
3789 { 0x0a, 0x02211230 },
3790 { 0x0b, 0x02a11220 },
3791 { 0x0c, 0x01a19040 },
3792 { 0x0d, 0x01114210 },
3793 { 0x0e, 0x01111212 },
3794 { 0x0f, 0x01116211 },
3795 { 0x10, 0x01813050 },
3796 { 0x11, 0x01112214 },
3797 { 0x12, 0x403003fa },
3798 { 0x13, 0x90a60040 },
3799 { 0x14, 0x90a60040 },
3800 { 0x21, 0x404003fb },
3801 { 0x22, 0x40c003fc },
3802 { 0x23, 0x40000100 },
3803 {}
4ff076e5
TD		 3804};
3805
29ac8363
TI		 3806static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3807 const struct hda_fixup *fix, int action)
3808{
29ac8363 3809 /* no jack detecion for ref-no-jd model */
36c9db7a
TI		 3810 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3811 codec->no_jack_detect = 1;
29ac8363
TI		 3812}
3813
3814static void stac927x_fixup_ref(struct hda_codec *codec,
3815 const struct hda_fixup *fix, int action)
3816{
3817 struct sigmatel_spec *spec = codec->spec;
3818
3819 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3820 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3821 spec->eapd_mask = spec->gpio_mask = 0;
3822 spec->gpio_dir = spec->gpio_data = 0;
3823 }
3824}
3825
3826static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3827 const struct hda_fixup *fix, int action)
3828{
3829 struct sigmatel_spec *spec = codec->spec;
3830
3831 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3832 return;
3833
7639a06c 3834 if (codec->core.subsystem_id != 0x1028022f) {
29ac8363
TI		 3835 /* GPIO2 High = Enable EAPD */
3836 spec->eapd_mask = spec->gpio_mask = 0x04;
3837 spec->gpio_dir = spec->gpio_data = 0x04;
3838 }
29ac8363
TI		 3839
3840 snd_hda_add_verbs(codec, dell_3st_core_init);
3841 spec->volknob_init = 1;
29ac8363
TI		 3842}
3843
3844static void stac927x_fixup_volknob(struct hda_codec *codec,
3845 const struct hda_fixup *fix, int action)
3846{
3847 struct sigmatel_spec *spec = codec->spec;
3848
3849 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3850 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3851 spec->volknob_init = 1;
3852 }
3853}
3854
3855static const struct hda_fixup stac927x_fixups[] = {
3856 [STAC_D965_REF_NO_JD] = {
3857 .type = HDA_FIXUP_FUNC,
3858 .v.func = stac927x_fixup_ref_no_jd,
3859 .chained = true,
3860 .chain_id = STAC_D965_REF,
3861 },
3862 [STAC_D965_REF] = {
3863 .type = HDA_FIXUP_FUNC,
3864 .v.func = stac927x_fixup_ref,
3865 },
3866 [STAC_D965_3ST] = {
3867 .type = HDA_FIXUP_PINS,
3868 .v.pins = d965_3st_pin_configs,
3869 .chained = true,
3870 .chain_id = STAC_D965_VERBS,
3871 },
3872 [STAC_D965_5ST] = {
3873 .type = HDA_FIXUP_PINS,
3874 .v.pins = d965_5st_pin_configs,
3875 .chained = true,
3876 .chain_id = STAC_D965_VERBS,
3877 },
3878 [STAC_D965_VERBS] = {
3879 .type = HDA_FIXUP_VERBS,
3880 .v.verbs = d965_core_init,
3881 },
3882 [STAC_D965_5ST_NO_FP] = {
3883 .type = HDA_FIXUP_PINS,
3884 .v.pins = d965_5st_no_fp_pin_configs,
3885 },
3886 [STAC_DELL_3ST] = {
3887 .type = HDA_FIXUP_PINS,
3888 .v.pins = dell_3st_pin_configs,
3889 .chained = true,
3890 .chain_id = STAC_927X_DELL_DMIC,
3891 },
3892 [STAC_DELL_BIOS] = {
3893 .type = HDA_FIXUP_PINS,
3894 .v.pins = (const struct hda_pintbl[]) {
29ac8363 3895 /* correct the front output jack as a hp out */
f3e351ee 3896 { 0x0f, 0x0221101f },
29ac8363
TI		 3897 /* correct the front input jack as a mic */
3898 { 0x0e, 0x02a79130 },
3899 {}
3900 },
3901 .chained = true,
3902 .chain_id = STAC_927X_DELL_DMIC,
3903 },
eefb8be4
TI		 3904 [STAC_DELL_BIOS_AMIC] = {
3905 .type = HDA_FIXUP_PINS,
3906 .v.pins = (const struct hda_pintbl[]) {
3907 /* configure the analog microphone on some laptops */
3908 { 0x0c, 0x90a79130 },
3909 {}
3910 },
3911 .chained = true,
3912 .chain_id = STAC_DELL_BIOS,
3913 },
29ac8363
TI		 3914 [STAC_DELL_BIOS_SPDIF] = {
3915 .type = HDA_FIXUP_PINS,
3916 .v.pins = (const struct hda_pintbl[]) {
3917 /* correct the device field to SPDIF out */
3918 { 0x21, 0x01442070 },
3919 {}
3920 },
3921 .chained = true,
3922 .chain_id = STAC_DELL_BIOS,
3923 },
3924 [STAC_927X_DELL_DMIC] = {
3925 .type = HDA_FIXUP_FUNC,
3926 .v.func = stac927x_fixup_dell_dmic,
3927 },
3928 [STAC_927X_VOLKNOB] = {
3929 .type = HDA_FIXUP_FUNC,
3930 .v.func = stac927x_fixup_volknob,
3931 },
3cc08dc6
MP		 3932};
3933
29ac8363
TI		 3934static const struct hda_model_fixup stac927x_models[] = {
3935 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3936 { .id = STAC_D965_REF, .name = "ref" },
3937 { .id = STAC_D965_3ST, .name = "3stack" },
3938 { .id = STAC_D965_5ST, .name = "5stack" },
3939 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3940 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3941 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
eefb8be4 3942 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
29ac8363
TI		 3943 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3944 {}
f5fcc13c
TI		 3945};
3946
29ac8363 3947static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
f5fcc13c
TI		 3948 /* SigmaTel reference board */
3949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3950 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 3951 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3952 "DFI LanParty", STAC_D965_REF),
81d3dbde 3953 /* Intel 946 based systems */
f5fcc13c
TI		 3954 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3955 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 3956 /* 965 based 3 stack systems */
dea0a509
TI		 3957 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3958 "Intel D965", STAC_D965_3ST),
3959 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3960 "Intel D965", STAC_D965_3ST),
4ff076e5 3961 /* Dell 3 stack systems */
dfe495d0 3962 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 3963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3964 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 3965 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 3966 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 3967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 3968 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
29ac8363 3969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
84d3dc20 3970 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 3971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
29ac8363 3974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
93ed1503 3975 /* 965 based 5 stack systems */
dea0a509
TI		 3976 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3977 "Intel D965", STAC_D965_5ST),
3978 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3979 "Intel D965", STAC_D965_5ST),
54930531
TI		 3980 /* volume-knob fixes */
3981 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 3982 {} /* terminator */
3983};
3984
fe6322ca
TI		 3985static const struct hda_pintbl ref9205_pin_configs[] = {
3986 { 0x0a, 0x40000100 },
3987 { 0x0b, 0x40000100 },
3988 { 0x0c, 0x01016011 },
3989 { 0x0d, 0x01014010 },
3990 { 0x0e, 0x01813122 },
3991 { 0x0f, 0x01a19021 },
3992 { 0x14, 0x01019020 },
3993 { 0x16, 0x40000100 },
3994 { 0x17, 0x90a000f0 },
3995 { 0x18, 0x90a000f0 },
3996 { 0x21, 0x01441030 },
3997 { 0x22, 0x01c41030 },
3998 {}
f3302a59
MP		 3999};
4000
dfe495d0
TI		 4001/*
4002 STAC 9205 pin configs for
4003 102801F1
4004 102801F2
4005 102801FC
4006 102801FD
4007 10280204
4008 1028021F
3fa2ef74 4009 10280228 (Dell Vostro 1500)
95e70e87 4010 10280229 (Dell Vostro 1700)
dfe495d0 4011*/
fe6322ca
TI		 4012static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4013 { 0x0a, 0x0321101F },
4014 { 0x0b, 0x03A11020 },
4015 { 0x0c, 0x400003FA },
4016 { 0x0d, 0x90170310 },
4017 { 0x0e, 0x400003FB },
4018 { 0x0f, 0x400003FC },
4019 { 0x14, 0x400003FD },
4020 { 0x16, 0x40F000F9 },
4021 { 0x17, 0x90A60330 },
4022 { 0x18, 0x400003FF },
4023 { 0x21, 0x0144131F },
4024 { 0x22, 0x40C003FE },
4025 {}
dfe495d0
TI		 4026};
4027
4028/*
4029 STAC 9205 pin configs for
4030 102801F9
4031 102801FA
4032 102801FE
4033 102801FF (Dell Precision M4300)
4034 10280206
4035 10280200
4036 10280201
4037*/
fe6322ca
TI		 4038static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4039 { 0x0a, 0x0321101f },
4040 { 0x0b, 0x03a11020 },
4041 { 0x0c, 0x90a70330 },
4042 { 0x0d, 0x90170310 },
4043 { 0x0e, 0x400000fe },
4044 { 0x0f, 0x400000ff },
4045 { 0x14, 0x400000fd },
4046 { 0x16, 0x40f000f9 },
4047 { 0x17, 0x400000fa },
4048 { 0x18, 0x400000fc },
4049 { 0x21, 0x0144131f },
4050 { 0x22, 0x40c003f8 },
4051 /* Enable SPDIF in/out */
4052 { 0x1f, 0x01441030 },
4053 { 0x20, 0x1c410030 },
4054 {}
ae0a8ed8
TD		 4055};
4056
fe6322ca
TI		 4057static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4058 { 0x0a, 0x0421101f },
4059 { 0x0b, 0x04a11020 },
4060 { 0x0c, 0x400003fa },
4061 { 0x0d, 0x90170310 },
4062 { 0x0e, 0x400003fb },
4063 { 0x0f, 0x400003fc },
4064 { 0x14, 0x400003fd },
4065 { 0x16, 0x400003f9 },
4066 { 0x17, 0x90a60330 },
4067 { 0x18, 0x400003ff },
4068 { 0x21, 0x01441340 },
4069 { 0x22, 0x40c003fe },
4070 {}
ae0a8ed8
TD		 4071};
4072
fe6322ca
TI		 4073static void stac9205_fixup_ref(struct hda_codec *codec,
4074 const struct hda_fixup *fix, int action)
4075{
4076 struct sigmatel_spec *spec = codec->spec;
4077
4078 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4079 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4080 /* SPDIF-In enabled */
4081 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4082 }
4083}
4084
fe6322ca
TI		 4085static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4086 const struct hda_fixup *fix, int action)
4087{
4088 struct sigmatel_spec *spec = codec->spec;
1a4f69d5 4089 struct hda_jack_callback *jack;
fe6322ca
TI		 4090
4091 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4092 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4093
4094 /* Enable unsol response for GPIO4/Dock HP connection */
7639a06c 4095 snd_hda_codec_write_cache(codec, codec->core.afg, 0,
fe6322ca 4096 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
7639a06c 4097 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
bda17b82
TI		 4098 stac_vref_event);
4099 if (!IS_ERR(jack))
36c9db7a 4100 jack->private_data = 0x01;
fe6322ca
TI		 4101
4102 spec->gpio_dir = 0x0b;
4103 spec->eapd_mask = 0x01;
4104 spec->gpio_mask = 0x1b;
4105 spec->gpio_mute = 0x10;
4106 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4107 * GPIO3 Low = DRM
4108 */
4109 spec->gpio_data = 0x01;
4110 }
4111}
4112
4113static void stac9205_fixup_eapd(struct hda_codec *codec,
4114 const struct hda_fixup *fix, int action)
4115{
4116 struct sigmatel_spec *spec = codec->spec;
4117
4118 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4119 spec->eapd_switch = 0;
4120}
4121
4122static const struct hda_fixup stac9205_fixups[] = {
4123 [STAC_9205_REF] = {
4124 .type = HDA_FIXUP_FUNC,
4125 .v.func = stac9205_fixup_ref,
4126 },
4127 [STAC_9205_DELL_M42] = {
4128 .type = HDA_FIXUP_PINS,
4129 .v.pins = dell_9205_m42_pin_configs,
4130 },
4131 [STAC_9205_DELL_M43] = {
4132 .type = HDA_FIXUP_FUNC,
4133 .v.func = stac9205_fixup_dell_m43,
4134 },
4135 [STAC_9205_DELL_M44] = {
4136 .type = HDA_FIXUP_PINS,
4137 .v.pins = dell_9205_m44_pin_configs,
4138 },
4139 [STAC_9205_EAPD] = {
4140 .type = HDA_FIXUP_FUNC,
4141 .v.func = stac9205_fixup_eapd,
4142 },
4143 {}
f3302a59
MP		 4144};
4145
fe6322ca
TI		 4146static const struct hda_model_fixup stac9205_models[] = {
4147 { .id = STAC_9205_REF, .name = "ref" },
4148 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4149 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4150 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4151 { .id = STAC_9205_EAPD, .name = "eapd" },
4152 {}
f5fcc13c
TI		 4153};
4154
fe6322ca 4155static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
f5fcc13c
TI		 4156 /* SigmaTel reference board */
4157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4158 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 4159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4160 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 4161 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4162 "DFI LanParty", STAC_9205_REF),
d9a4268e 4163 /* Dell */
dfe495d0
TI		 4164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4165 "unknown Dell", STAC_9205_DELL_M42),
4166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4167 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 4168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 4169 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 4170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4171 "Dell Precision", STAC_9205_DELL_M43),
4172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4173 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 4174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4175 "unknown Dell", STAC_9205_DELL_M42),
4176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4177 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 4178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4179 "Dell Precision", STAC_9205_DELL_M43),
4180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 4181 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 4182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4183 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 4184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4185 "Dell Precision", STAC_9205_DELL_M43),
4186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4187 "Dell Precision", STAC_9205_DELL_M43),
36c9db7a
TI		 4188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4189 "Dell Precision", STAC_9205_DELL_M43),
4190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4191 "Dell Inspiron", STAC_9205_DELL_M44),
4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4193 "Dell Vostro 1500", STAC_9205_DELL_M42),
4194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4195 "Dell Vostro 1700", STAC_9205_DELL_M42),
4196 /* Gateway */
4197 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4198 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4199 {} /* terminator */
4200};
a64135a2 4201
8b3dfdaf
TI		 4202static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4203 const struct hda_fixup *fix, int action)
4204{
4205 struct sigmatel_spec *spec = codec->spec;
4206
4207 if (action != HDA_FIXUP_ACT_PRE_PROBE)
4208 return;
4209
4210 if (find_mute_led_cfg(codec, spec->default_polarity))
4211 codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4212 spec->gpio_led,
4213 spec->gpio_led_polarity);
4214}
4215
4216static const struct hda_fixup stac92hd95_fixups[] = {
4217 [STAC_92HD95_HP_LED] = {
4218 .type = HDA_FIXUP_FUNC,
4219 .v.func = stac92hd95_fixup_hp_led,
4220 },
4221 [STAC_92HD95_HP_BASS] = {
4222 .type = HDA_FIXUP_VERBS,
4223 .v.verbs = (const struct hda_verb[]) {
4224 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4225 {}
4226 },
4227 .chained = true,
4228 .chain_id = STAC_92HD95_HP_LED,
4229 },
4230};
4231
4232static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4233 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4234 {} /* terminator */
4235};
4236
4237static const struct hda_model_fixup stac92hd95_models[] = {
4238 { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4239 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4240 {}
4241};
4242
4243
36c9db7a 4244static int stac_parse_auto_config(struct hda_codec *codec)
ab5a6ebe
VK		 4245{
4246 struct sigmatel_spec *spec = codec->spec;
36c9db7a 4247 int err;
f390dad4 4248 int flags = 0;
ab5a6ebe 4249
f390dad4
DH		 4250 if (spec->headset_jack)
4251 flags |= HDA_PINCFG_HEADSET_MIC;
4252
4253 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
36c9db7a
TI		 4254 if (err < 0)
4255 return err;
ab5a6ebe 4256
36c9db7a
TI		 4257 /* add hooks */
4258 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4259 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
ab5a6ebe 4260
36c9db7a 4261 spec->gen.automute_hook = stac_update_outputs;
3d21d3f7 4262
36c9db7a
TI		 4263 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4264 if (err < 0)
4265 return err;
3d21d3f7 4266
6b275b14
TI		 4267 if (spec->vref_mute_led_nid) {
4268 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4269 if (err < 0)
4270 return err;
4271 }
4272
36c9db7a
TI		 4273 /* setup analog beep controls */
4274 if (spec->anabeep_nid > 0) {
4275 err = stac_auto_create_beep_ctls(codec,
4276 spec->anabeep_nid);
4277 if (err < 0)
4278 return err;
3d21d3f7
TI		 4279 }
4280
36c9db7a
TI		 4281 /* setup digital beep controls and input device */
4282#ifdef CONFIG_SND_HDA_INPUT_BEEP
7504b6cd
TI		 4283 if (spec->gen.beep_nid) {
4284 hda_nid_t nid = spec->gen.beep_nid;
36c9db7a
TI		 4285 unsigned int caps;
4286
4287 err = stac_auto_create_beep_ctls(codec, nid);
36c9db7a
TI		 4288 if (err < 0)
4289 return err;
4290 if (codec->beep) {
4291 /* IDT/STAC codecs have linear beep tone parameter */
4292 codec->beep->linear_tone = spec->linear_tone_beep;
4293 /* if no beep switch is available, make its own one */
4294 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4295 if (!(caps & AC_AMPCAP_MUTE)) {
4296 err = stac_beep_switch_ctl(codec);
4297 if (err < 0)
4298 return err;
fd60cc89
MR		 4299 }
4300 }
314634bc 4301 }
36c9db7a 4302#endif
314634bc 4303
36c9db7a
TI		 4304 if (spec->gpio_led)
4305 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4306
4307 if (spec->aloopback_ctl &&
4308 snd_hda_get_bool_hint(codec, "loopback") == 1) {
a551d914
TI		 4309 unsigned int wr_verb =
4310 spec->aloopback_ctl->private_value >> 16;
4311 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4312 return -ENOMEM;
36c9db7a
TI		 4313 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4314 return -ENOMEM;
4315 }
4316
42875479
TI		 4317 if (spec->have_spdif_mux) {
4318 err = stac_create_spdif_mux_ctls(codec);
4319 if (err < 0)
4320 return err;
4321 }
4322
7a9744cb 4323 stac_init_power_map(codec);
aa699c49 4324
7a9744cb
TI		 4325 return 0;
4326}
36c9db7a
TI		 4327
4328static int stac_init(struct hda_codec *codec)
d38cce70
KG		 4329{
4330 struct sigmatel_spec *spec = codec->spec;
36c9db7a 4331 int i;
07f80449 4332
36c9db7a
TI		 4333 /* override some hints */
4334 stac_store_hints(codec);
26ebe0a2 4335
36c9db7a 4336 /* set up GPIO */
36c9db7a
TI		 4337 /* turn on EAPD statically when spec->eapd_switch isn't set.
4338 * otherwise, unsol event will turn it on/off dynamically
4339 */
4340 if (!spec->eapd_switch)
1ea9a69d
TI		 4341 spec->gpio_data |= spec->eapd_mask;
4342 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
d38cce70 4343
36c9db7a 4344 snd_hda_gen_init(codec);
c357aab0 4345
36c9db7a
TI		 4346 /* sync the power-map */
4347 if (spec->num_pwrs)
7639a06c 4348 snd_hda_codec_write(codec, codec->core.afg, 0,
36c9db7a
TI		 4349 AC_VERB_IDT_SET_POWER_MAP,
4350 spec->power_map_bits);
0f6fcb73 4351
36c9db7a
TI		 4352 /* power down inactive ADCs */
4353 if (spec->powerdown_adcs) {
4354 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4355 if (spec->active_adcs & (1 << i))
4356 continue;
4357 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4358 AC_VERB_SET_POWER_STATE,
4359 AC_PWRST_D3);
89bb3e74
TI		 4360 }
4361 }
4362
c357aab0
VK		 4363 return 0;
4364}
4365
36c9db7a 4366static void stac_shutup(struct hda_codec *codec)
78987bdc 4367{
36c9db7a
TI		 4368 struct sigmatel_spec *spec = codec->spec;
4369
4370 snd_hda_shutup_pins(codec);
4371
4372 if (spec->eapd_mask)
4373 stac_gpio_set(codec, spec->gpio_mask,
4374 spec->gpio_dir, spec->gpio_data &
4375 ~spec->eapd_mask);
4376}
4377
7504b6cd 4378#define stac_free snd_hda_gen_free
78987bdc 4379
cd6a6503 4380#ifdef CONFIG_SND_PROC_FS
2d34e1b3
TI		 4381static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4382 struct hda_codec *codec, hda_nid_t nid)
4383{
7639a06c 4384 if (nid == codec->core.afg)
2d34e1b3 4385 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 4386 snd_hda_codec_read(codec, nid, 0,
4387 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 4388}
4389
4390static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4391 struct hda_codec *codec,
4392 unsigned int verb)
4393{
4394 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
7639a06c 4395 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
2d34e1b3
TI		 4396}
4397
4398/* stac92hd71bxx, stac92hd73xx */
4399static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4400 struct hda_codec *codec, hda_nid_t nid)
4401{
4402 stac92hd_proc_hook(buffer, codec, nid);
7639a06c 4403 if (nid == codec->core.afg)
2d34e1b3
TI		 4404 analog_loop_proc_hook(buffer, codec, 0xfa0);
4405}
4406
4407static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4408 struct hda_codec *codec, hda_nid_t nid)
4409{
7639a06c 4410 if (nid == codec->core.afg)
2d34e1b3
TI		 4411 analog_loop_proc_hook(buffer, codec, 0xfe0);
4412}
4413
4414static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4415 struct hda_codec *codec, hda_nid_t nid)
4416{
7639a06c 4417 if (nid == codec->core.afg)
2d34e1b3
TI		 4418 analog_loop_proc_hook(buffer, codec, 0xfeb);
4419}
4420#else
4421#define stac92hd_proc_hook NULL
4422#define stac92hd7x_proc_hook NULL
4423#define stac9205_proc_hook NULL
4424#define stac927x_proc_hook NULL
4425#endif
4426
2a43952a 4427#ifdef CONFIG_PM
36c9db7a
TI		 4428static int stac_suspend(struct hda_codec *codec)
4429{
4430 stac_shutup(codec);
4431 return 0;
4432}
36c9db7a
TI		 4433#else
4434#define stac_suspend NULL
36c9db7a 4435#endif /* CONFIG_PM */
7df1ce1a 4436
36c9db7a 4437static const struct hda_codec_ops stac_patch_ops = {
aa699c49 4438 .build_controls = snd_hda_gen_build_controls,
36c9db7a
TI		 4439 .build_pcms = snd_hda_gen_build_pcms,
4440 .init = stac_init,
4441 .free = stac_free,
29adc4b9 4442 .unsol_event = snd_hda_jack_unsol_event,
2a43952a 4443#ifdef CONFIG_PM
36c9db7a 4444 .suspend = stac_suspend,
ff6fdc37 4445#endif
36c9db7a 4446 .reboot_notify = stac_shutup,
2f2f4251
M		 4447};
4448
36c9db7a 4449static int alloc_stac_spec(struct hda_codec *codec)
361dab3e
TI		 4450{
4451 struct sigmatel_spec *spec;
4452
4453 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4454 if (!spec)
4455 return -ENOMEM;
36c9db7a 4456 snd_hda_gen_spec_init(&spec->gen);
361dab3e
TI		 4457 codec->spec = spec;
4458 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
d89c6c0c 4459 spec->gen.dac_min_mute = true;
225068ab 4460 codec->patch_ops = stac_patch_ops;
361dab3e
TI		 4461 return 0;
4462}
4463
2f2f4251
M		 4464static int patch_stac9200(struct hda_codec *codec)
4465{
4466 struct sigmatel_spec *spec;
c7d4b2fa 4467 int err;
2f2f4251 4468
36c9db7a 4469 err = alloc_stac_spec(codec);
361dab3e
TI		 4470 if (err < 0)
4471 return err;
2f2f4251 4472
361dab3e 4473 spec = codec->spec;
1b0e372d 4474 spec->linear_tone_beep = 1;
36c9db7a 4475 spec->gen.own_eapd_ctl = 1;
d39a3ae8 4476
ba615b86 4477 codec->power_filter = snd_hda_codec_eapd_power_filter;
2f2f4251 4478
d39a3ae8 4479 snd_hda_add_verbs(codec, stac9200_eapd_init);
c7d4b2fa 4480
36c9db7a
TI		 4481 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4482 stac9200_fixups);
d39a3ae8 4483 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
117f257d 4484
36c9db7a 4485 err = stac_parse_auto_config(codec);
c7d4b2fa 4486 if (err < 0) {
36c9db7a 4487 stac_free(codec);
c7d4b2fa
M		 4488 return err;
4489 }
2f2f4251 4490
d39a3ae8
TI		 4491 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4492
2f2f4251
M		 4493 return 0;
4494}
4495
8e21c34c
TD		 4496static int patch_stac925x(struct hda_codec *codec)
4497{
4498 struct sigmatel_spec *spec;
4499 int err;
4500
36c9db7a 4501 err = alloc_stac_spec(codec);
361dab3e
TI		 4502 if (err < 0)
4503 return err;
8e21c34c 4504
361dab3e 4505 spec = codec->spec;
1b0e372d 4506 spec->linear_tone_beep = 1;
36c9db7a 4507 spec->gen.own_eapd_ctl = 1;
9cb36c2a 4508
d2077d40 4509 snd_hda_add_verbs(codec, stac925x_core_init);
8e21c34c 4510
36c9db7a
TI		 4511 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4512 stac925x_fixups);
d2077d40
TI		 4513 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4514
36c9db7a 4515 err = stac_parse_auto_config(codec);
8e21c34c 4516 if (err < 0) {
36c9db7a 4517 stac_free(codec);
8e21c34c
TD		 4518 return err;
4519 }
4520
d2077d40
TI		 4521 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4522
8e21c34c
TD		 4523 return 0;
4524}
4525
e1f0d669
MR		 4526static int patch_stac92hd73xx(struct hda_codec *codec)
4527{
4528 struct sigmatel_spec *spec;
361dab3e 4529 int err;
c21ca4a8 4530 int num_dacs;
e1f0d669 4531
36c9db7a 4532 err = alloc_stac_spec(codec);
361dab3e
TI		 4533 if (err < 0)
4534 return err;
e1f0d669 4535
361dab3e 4536 spec = codec->spec;
c7e10080
TI		 4537 /* enable power_save_node only for new 92HD89xx chips, as it causes
4538 * click noises on old 92HD73xx chips.
4539 */
4540 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4541 codec->power_save_node = 1;
1b0e372d 4542 spec->linear_tone_beep = 0;
2748746f 4543 spec->gen.mixer_nid = 0x1d;
42875479 4544 spec->have_spdif_mux = 1;
e1f0d669 4545
36c9db7a 4546 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
c21ca4a8 4547 if (num_dacs < 3 || num_dacs > 5) {
4e76a883
TI		 4548 codec_warn(codec,
4549 "Could not determine number of channels defaulting to DAC count\n");
36c9db7a 4550 num_dacs = 5;
e1f0d669 4551 }
55e30141 4552
c21ca4a8 4553 switch (num_dacs) {
e1f0d669 4554 case 0x3: /* 6 Channel */
36c9db7a 4555 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
e1f0d669
MR		 4556 break;
4557 case 0x4: /* 8 Channel */
36c9db7a 4558 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
e1f0d669
MR		 4559 break;
4560 case 0x5: /* 10 Channel */
36c9db7a 4561 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
d78d7a90 4562 break;
c21ca4a8 4563 }
e1f0d669 4564
e1f0d669
MR		 4565 spec->aloopback_mask = 0x01;
4566 spec->aloopback_shift = 8;
4567
7504b6cd 4568 spec->gen.beep_nid = 0x1c; /* digital beep */
6479c631 4569
55e30141
TI		 4570 /* GPIO0 High = Enable EAPD */
4571 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4572 spec->gpio_data = 0x01;
6b3ab21e 4573
55e30141 4574 spec->eapd_switch = 1;
a7662640 4575
a64135a2
MR		 4576 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4577 spec->pwr_nids = stac92hd73xx_pwr_nids;
4578
36c9db7a 4579 spec->gen.own_eapd_ctl = 1;
f4f678d2 4580 spec->gen.power_down_unused = 1;
36c9db7a 4581
36c9db7a
TI		 4582 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4583 stac92hd73xx_fixups);
55e30141
TI		 4584 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4585
4586 if (!spec->volknob_init)
4587 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4588
36c9db7a 4589 err = stac_parse_auto_config(codec);
e1f0d669 4590 if (err < 0) {
36c9db7a 4591 stac_free(codec);
e1f0d669
MR		 4592 return err;
4593 }
4594
303985f8
DH		 4595 /* Don't GPIO-mute speakers if there are no internal speakers, because
4596 * the GPIO might be necessary for Headphone
4597 */
4598 if (spec->eapd_switch && !has_builtin_speaker(codec))
4599 spec->eapd_switch = 0;
4600
2d34e1b3
TI		 4601 codec->proc_widget_hook = stac92hd7x_proc_hook;
4602
55e30141
TI		 4603 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4604
e1f0d669
MR		 4605 return 0;
4606}
4607
372f8c75
TI		 4608static void stac_setup_gpio(struct hda_codec *codec)
4609{
4610 struct sigmatel_spec *spec = codec->spec;
4611
1ea9a69d 4612 spec->gpio_mask |= spec->eapd_mask;
372f8c75
TI		 4613 if (spec->gpio_led) {
4614 if (!spec->vref_mute_led_nid) {
4615 spec->gpio_mask |= spec->gpio_led;
4616 spec->gpio_dir |= spec->gpio_led;
4617 spec->gpio_data |= spec->gpio_led;
4618 } else {
dfc6e469 4619 codec->power_filter = stac_vref_led_power_filter;
372f8c75
TI		 4620 }
4621 }
4622
4623 if (spec->mic_mute_led_gpio) {
4624 spec->gpio_mask |= spec->mic_mute_led_gpio;
4625 spec->gpio_dir |= spec->mic_mute_led_gpio;
7fe30711 4626 spec->mic_enabled = 0;
372f8c75 4627 spec->gpio_data |= spec->mic_mute_led_gpio;
36c9db7a 4628
a90229e0 4629 spec->gen.cap_sync_hook = stac_capture_led_hook;
372f8c75
TI		 4630 }
4631}
4632
d0513fc6
MR		 4633static int patch_stac92hd83xxx(struct hda_codec *codec)
4634{
4635 struct sigmatel_spec *spec;
4636 int err;
4637
36c9db7a 4638 err = alloc_stac_spec(codec);
361dab3e
TI		 4639 if (err < 0)
4640 return err;
d0513fc6 4641
7639a06c
TI		 4642 /* longer delay needed for D3 */
4643 codec->core.power_caps &= ~AC_PWRST_EPSS;
699d8995 4644
361dab3e 4645 spec = codec->spec;
967b1307 4646 codec->power_save_node = 1;
1db7ccdb 4647 spec->linear_tone_beep = 0;
36c9db7a 4648 spec->gen.own_eapd_ctl = 1;
f4f678d2 4649 spec->gen.power_down_unused = 1;
2748746f 4650 spec->gen.mixer_nid = 0x1b;
36c9db7a 4651
7504b6cd 4652 spec->gen.beep_nid = 0x21; /* digital beep */
d0513fc6 4653 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 4654 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
36c9db7a 4655 spec->default_polarity = -1; /* no default cfg */
d0513fc6 4656
372f8c75 4657 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
e108c7b7 4658
36c9db7a
TI		 4659 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4660 stac92hd83xxx_fixups);
372f8c75 4661 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
b4e81876 4662
372f8c75 4663 stac_setup_gpio(codec);
62cbde18 4664
36c9db7a 4665 err = stac_parse_auto_config(codec);
d0513fc6 4666 if (err < 0) {
36c9db7a 4667 stac_free(codec);
d0513fc6
MR		 4668 return err;
4669 }
4670
2d34e1b3
TI		 4671 codec->proc_widget_hook = stac92hd_proc_hook;
4672
372f8c75
TI		 4673 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4674
d0513fc6
MR		 4675 return 0;
4676}
4677
4e637c6e
VK		 4678static const hda_nid_t stac92hd95_pwr_nids[] = {
4679 0x0a, 0x0b, 0x0c, 0x0d
4680};
4681
4682static int patch_stac92hd95(struct hda_codec *codec)
4683{
4684 struct sigmatel_spec *spec;
4685 int err;
4686
4687 err = alloc_stac_spec(codec);
4688 if (err < 0)
4689 return err;
4690
7639a06c
TI		 4691 /* longer delay needed for D3 */
4692 codec->core.power_caps &= ~AC_PWRST_EPSS;
4e637c6e
VK		 4693
4694 spec = codec->spec;
967b1307 4695 codec->power_save_node = 1;
4e637c6e
VK		 4696 spec->linear_tone_beep = 0;
4697 spec->gen.own_eapd_ctl = 1;
4698 spec->gen.power_down_unused = 1;
4699
7504b6cd 4700 spec->gen.beep_nid = 0x19; /* digital beep */
4e637c6e
VK		 4701 spec->pwr_nids = stac92hd95_pwr_nids;
4702 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
8b3dfdaf 4703 spec->default_polarity = 0;
4e637c6e 4704
8b3dfdaf
TI		 4705 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4706 stac92hd95_fixups);
4707 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4708
4709 stac_setup_gpio(codec);
4710
4e637c6e
VK		 4711 err = stac_parse_auto_config(codec);
4712 if (err < 0) {
4713 stac_free(codec);
4714 return err;
4715 }
4716
4717 codec->proc_widget_hook = stac92hd_proc_hook;
4718
8b3dfdaf
TI		 4719 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4720
4e637c6e
VK		 4721 return 0;
4722}
4723
e035b841
MR		 4724static int patch_stac92hd71bxx(struct hda_codec *codec)
4725{
4726 struct sigmatel_spec *spec;
a551d914 4727 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
361dab3e 4728 int err;
e035b841 4729
36c9db7a 4730 err = alloc_stac_spec(codec);
361dab3e
TI		 4731 if (err < 0)
4732 return err;
e035b841 4733
361dab3e 4734 spec = codec->spec;
c545f799
TI		 4735 /* disabled power_save_node since it causes noises on a Dell machine */
4736 /* codec->power_save_node = 1; */
1b0e372d 4737 spec->linear_tone_beep = 0;
36c9db7a 4738 spec->gen.own_eapd_ctl = 1;
f4f678d2 4739 spec->gen.power_down_unused = 1;
2748746f 4740 spec->gen.mixer_nid = 0x17;
42875479 4741 spec->have_spdif_mux = 1;
e035b841 4742
0f6fcb73
TI		 4743 /* GPIO0 = EAPD */
4744 spec->gpio_mask = 0x01;
4745 spec->gpio_dir = 0x01;
4746 spec->gpio_data = 0x01;
41c3b648 4747
7639a06c 4748 switch (codec->core.vendor_id) {
541eee87
MR		 4749 case 0x111d76b6: /* 4 Port without Analog Mixer */
4750 case 0x111d76b7:
a551d914 4751 unmute_nids++;
541eee87 4752 break;
aafc4412 4753 case 0x111d7608: /* 5 Port with Analog Mixer */
7639a06c
TI		 4754 if ((codec->core.revision_id & 0xf) == 0 ||
4755 (codec->core.revision_id & 0xf) == 1)
8daaaa97 4756 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4757
aafc4412 4758 /* disable VSW */
a551d914 4759 unmute_nids++;
330ee995
TI		 4760 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4761 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
aafc4412
MR		 4762 break;
4763 case 0x111d7603: /* 6 Port with Analog Mixer */
7639a06c 4764 if ((codec->core.revision_id & 0xf) == 1)
8daaaa97 4765 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4766
5207e10e 4767 break;
541eee87
MR		 4768 }
4769
5e68fb3c 4770 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
0f6fcb73 4771 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
5e68fb3c 4772
a551d914
TI		 4773 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4774 const hda_nid_t *p;
4775 for (p = unmute_nids; *p; p++)
4776 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4777 0xff, 0x00);
4778 }
ca8d33fc 4779
36c9db7a 4780 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4b33c767 4781 spec->aloopback_mask = 0x50;
541eee87
MR		 4782 spec->aloopback_shift = 0;
4783
8daaaa97 4784 spec->powerdown_adcs = 1;
7504b6cd 4785 spec->gen.beep_nid = 0x26; /* digital beep */
36c9db7a 4786 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
aafc4412 4787 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841 4788
36c9db7a
TI		 4789 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4790 stac92hd71bxx_fixups);
0f6fcb73 4791 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5bdaaada 4792
372f8c75 4793 stac_setup_gpio(codec);
6a14f585 4794
36c9db7a 4795 err = stac_parse_auto_config(codec);
e035b841 4796 if (err < 0) {
36c9db7a 4797 stac_free(codec);
e035b841
MR		 4798 return err;
4799 }
4800
2d34e1b3
TI		 4801 codec->proc_widget_hook = stac92hd7x_proc_hook;
4802
0f6fcb73
TI		 4803 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4804
e035b841 4805 return 0;
86d190e7 4806}
e035b841 4807
2f2f4251
M		 4808static int patch_stac922x(struct hda_codec *codec)
4809{
4810 struct sigmatel_spec *spec;
c7d4b2fa 4811 int err;
2f2f4251 4812
36c9db7a 4813 err = alloc_stac_spec(codec);
361dab3e
TI		 4814 if (err < 0)
4815 return err;
2f2f4251 4816
361dab3e 4817 spec = codec->spec;
1b0e372d 4818 spec->linear_tone_beep = 1;
36c9db7a 4819 spec->gen.own_eapd_ctl = 1;
5d5d3bc3 4820
0a427846
TI		 4821 snd_hda_add_verbs(codec, stac922x_core_init);
4822
807a4636
TI		 4823 /* Fix Mux capture level; max to 2 */
4824 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4825 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4826 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4827 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4828 (0 << AC_AMPCAP_MUTE_SHIFT));
4829
36c9db7a
TI		 4830 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4831 stac922x_fixups);
4832 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4833
4834 err = stac_parse_auto_config(codec);
4835 if (err < 0) {
4836 stac_free(codec);
4837 return err;
4838 }
4839
0a427846
TI		 4840 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4841
3cc08dc6
MP		 4842 return 0;
4843}
4844
42875479
TI		 4845static const char * const stac927x_spdif_labels[] = {
4846 "Digital Playback", "ADAT", "Analog Mux 1",
4847 "Analog Mux 2", "Analog Mux 3", NULL
4848};
4849
3cc08dc6
MP		 4850static int patch_stac927x(struct hda_codec *codec)
4851{
4852 struct sigmatel_spec *spec;
4853 int err;
4854
36c9db7a 4855 err = alloc_stac_spec(codec);
361dab3e
TI		 4856 if (err < 0)
4857 return err;
3cc08dc6 4858
361dab3e 4859 spec = codec->spec;
1b0e372d 4860 spec->linear_tone_beep = 1;
36c9db7a 4861 spec->gen.own_eapd_ctl = 1;
42875479
TI		 4862 spec->have_spdif_mux = 1;
4863 spec->spdif_labels = stac927x_spdif_labels;
3cc08dc6 4864
7504b6cd 4865 spec->gen.beep_nid = 0x23; /* digital beep */
8e9068b1 4866
29ac8363
TI		 4867 /* GPIO0 High = Enable EAPD */
4868 spec->eapd_mask = spec->gpio_mask = 0x01;
4869 spec->gpio_dir = spec->gpio_data = 0x01;
af6ee302 4870
36c9db7a 4871 spec->aloopback_ctl = &stac927x_loopback;
e1f0d669
MR		 4872 spec->aloopback_mask = 0x40;
4873 spec->aloopback_shift = 0;
c0cea0d0 4874 spec->eapd_switch = 1;
8e9068b1 4875
36c9db7a
TI		 4876 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4877 stac927x_fixups);
f6655d52
TI		 4878 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4879
29ac8363
TI		 4880 if (!spec->volknob_init)
4881 snd_hda_add_verbs(codec, stac927x_core_init);
4882
36c9db7a 4883 err = stac_parse_auto_config(codec);
c7d4b2fa 4884 if (err < 0) {
36c9db7a 4885 stac_free(codec);
c7d4b2fa
M		 4886 return err;
4887 }
2f2f4251 4888
2d34e1b3
TI		 4889 codec->proc_widget_hook = stac927x_proc_hook;
4890
52987656
TI		 4891 /*
4892 * !!FIXME!!
4893 * The STAC927x seem to require fairly long delays for certain
4894 * command sequences. With too short delays (even if the answer
4895 * is set to RIRB properly), it results in the silence output
4896 * on some hardwares like Dell.
4897 *
4898 * The below flag enables the longer delay (see get_response
4899 * in hda_intel.c).
4900 */
4901 codec->bus->needs_damn_long_delay = 1;
4902
29ac8363 4903 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
e28d8322 4904
2f2f4251
M		 4905 return 0;
4906}
4907
f3302a59
MP		 4908static int patch_stac9205(struct hda_codec *codec)
4909{
4910 struct sigmatel_spec *spec;
8259980e 4911 int err;
f3302a59 4912
36c9db7a 4913 err = alloc_stac_spec(codec);
361dab3e
TI		 4914 if (err < 0)
4915 return err;
f3302a59 4916
361dab3e 4917 spec = codec->spec;
1b0e372d 4918 spec->linear_tone_beep = 1;
36c9db7a 4919 spec->gen.own_eapd_ctl = 1;
42875479 4920 spec->have_spdif_mux = 1;
f3302a59 4921
7504b6cd 4922 spec->gen.beep_nid = 0x23; /* digital beep */
f3302a59 4923
fe6322ca 4924 snd_hda_add_verbs(codec, stac9205_core_init);
36c9db7a 4925 spec->aloopback_ctl = &stac9205_loopback;
6479c631 4926
e1f0d669
MR		 4927 spec->aloopback_mask = 0x40;
4928 spec->aloopback_shift = 0;
87d48363 4929
fe6322ca
TI		 4930 /* GPIO0 High = EAPD */
4931 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4932 spec->gpio_data = 0x01;
87d48363 4933
fe6322ca
TI		 4934 /* Turn on/off EAPD per HP plugging */
4935 spec->eapd_switch = 1;
4fe5195c 4936
36c9db7a
TI		 4937 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4938 stac9205_fixups);
fe6322ca 4939 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
33382403 4940
36c9db7a 4941 err = stac_parse_auto_config(codec);
f3302a59 4942 if (err < 0) {
36c9db7a 4943 stac_free(codec);
f3302a59
MP		 4944 return err;
4945 }
4946
2d34e1b3
TI		 4947 codec->proc_widget_hook = stac9205_proc_hook;
4948
fe6322ca
TI		 4949 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4950
f3302a59
MP		 4951 return 0;
4952}
4953
db064e50 4954/*
6d859065 4955 * STAC9872 hack
db064e50
TI		 4956 */
4957
2b63536f 4958static const struct hda_verb stac9872_core_init[] = {
1624cb9a 4959 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4960 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4961 {}
4962};
4963
fc268c10
TI		 4964static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4965 { 0x0a, 0x03211020 },
4966 { 0x0b, 0x411111f0 },
4967 { 0x0c, 0x411111f0 },
4968 { 0x0d, 0x03a15030 },
4969 { 0x0e, 0x411111f0 },
4970 { 0x0f, 0x90170110 },
4971 { 0x11, 0x411111f0 },
4972 { 0x13, 0x411111f0 },
4973 { 0x14, 0x90a7013e },
4974 {}
307282c8
TI		 4975};
4976
fc268c10
TI		 4977static const struct hda_model_fixup stac9872_models[] = {
4978 { .id = STAC_9872_VAIO, .name = "vaio" },
4979 {}
307282c8
TI		 4980};
4981
fc268c10
TI		 4982static const struct hda_fixup stac9872_fixups[] = {
4983 [STAC_9872_VAIO] = {
4984 .type = HDA_FIXUP_PINS,
4985 .v.pins = stac9872_vaio_pin_configs,
4986 },
307282c8
TI		 4987};
4988
fc268c10 4989static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
b04add95
TI		 4990 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4991 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 4992 {} /* terminator */
4993};
4994
6d859065 4995static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4996{
4997 struct sigmatel_spec *spec;
1e137f92 4998 int err;
db064e50 4999
36c9db7a 5000 err = alloc_stac_spec(codec);
361dab3e
TI		 5001 if (err < 0)
5002 return err;
5003
5004 spec = codec->spec;
1b0e372d 5005 spec->linear_tone_beep = 1;
36c9db7a 5006 spec->gen.own_eapd_ctl = 1;
caa10b6e 5007
fc268c10
TI		 5008 snd_hda_add_verbs(codec, stac9872_core_init);
5009
36c9db7a
TI		 5010 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5011 stac9872_fixups);
fc268c10 5012 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1e137f92 5013
36c9db7a 5014 err = stac_parse_auto_config(codec);
1e137f92 5015 if (err < 0) {
36c9db7a 5016 stac_free(codec);
1e137f92
TI		 5017 return -EINVAL;
5018 }
fc268c10
TI		 5019
5020 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5021
db064e50
TI		 5022 return 0;
5023}
5024
5025
2f2f4251
M		 5026/*
5027 * patch entries
5028 */
b9a94a9c
TI		 5029static const struct hda_device_id snd_hda_id_sigmatel[] = {
5030 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5031 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5032 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5033 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5034 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5035 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5036 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5037 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5038 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
5039 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5040 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5041 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5042 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5043 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5044 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5045 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5046 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5047 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5048 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5049 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5050 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5051 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5052 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5053 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
5054 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5055 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5056 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5057 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5058 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5059 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5060 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5061 /* The following does not take into account .id=0x83847661 when subsys =
5062 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5063 * currently not fully supported.
5064 */
5065 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5066 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5067 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5068 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5069 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5070 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5071 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5072 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5073 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5074 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5075 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5076 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5077 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5078 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5079 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5080 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5081 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5082 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5083 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5084 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5085 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5086 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5087 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5088 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5089 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5090 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5091 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5092 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5093 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5094 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5095 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5096 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5097 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5098 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5099 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5100 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5101 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5102 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5103 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5104 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5105 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5106 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5107 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5108 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5109 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5110 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5111 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5112 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5113 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5114 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5115 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5116 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5117 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5118 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5119 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5120 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5121 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5122 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5123 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5124 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5125 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5126 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5127 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5128 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5129 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5130 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5131 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5132 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
2f2f4251
M		 5133 {} /* terminator */
5134};
b9a94a9c 5135MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
1289e9e8
TI		 5136
5137MODULE_LICENSE("GPL");
5138MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5139
d8a766a1 5140static struct hda_codec_driver sigmatel_driver = {
b9a94a9c 5141 .id = snd_hda_id_sigmatel,
1289e9e8
TI		 5142};
5143
d8a766a1 5144module_hda_codec_driver(sigmatel_driver);
Linux kernel - Deliverables
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