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ALSA: hda - fix digital mic selection in mixer on 92HD8X codecs
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
2f2f4251
M		 36#include "hda_codec.h"
37#include "hda_local.h"
1cd2224c 38#include "hda_beep.h"
2f2f4251 39
c6e4c666
TI		 40enum {
41 STAC_VREF_EVENT = 1,
42 STAC_INSERT_EVENT,
43 STAC_PWR_EVENT,
44 STAC_HP_EVENT,
fefd67f3 45 STAC_LO_EVENT,
3d21d3f7 46 STAC_MIC_EVENT,
c6e4c666 47};
4e55096e 48
f5fcc13c 49enum {
1607b8ea 50 STAC_AUTO,
f5fcc13c 51 STAC_REF,
bf277785 52 STAC_9200_OQO,
dfe495d0
TI		 53 STAC_9200_DELL_D21,
54 STAC_9200_DELL_D22,
55 STAC_9200_DELL_D23,
56 STAC_9200_DELL_M21,
57 STAC_9200_DELL_M22,
58 STAC_9200_DELL_M23,
59 STAC_9200_DELL_M24,
60 STAC_9200_DELL_M25,
61 STAC_9200_DELL_M26,
62 STAC_9200_DELL_M27,
58eec423
MCC		 63 STAC_9200_M4,
64 STAC_9200_M4_2,
117f257d 65 STAC_9200_PANASONIC,
f5fcc13c
TI		 66 STAC_9200_MODELS
67};
68
69enum {
1607b8ea 70 STAC_9205_AUTO,
f5fcc13c 71 STAC_9205_REF,
dfe495d0 72 STAC_9205_DELL_M42,
ae0a8ed8
TD		 73 STAC_9205_DELL_M43,
74 STAC_9205_DELL_M44,
d9a4268e 75 STAC_9205_EAPD,
f5fcc13c
TI		 76 STAC_9205_MODELS
77};
78
e1f0d669 79enum {
1607b8ea 80 STAC_92HD73XX_AUTO,
9e43f0de 81 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 82 STAC_92HD73XX_REF,
ae709440 83 STAC_92HD73XX_INTEL,
661cd8fb
TI		 84 STAC_DELL_M6_AMIC,
85 STAC_DELL_M6_DMIC,
86 STAC_DELL_M6_BOTH,
6b3ab21e 87 STAC_DELL_EQ,
842ae638 88 STAC_ALIENWARE_M17X,
e1f0d669
MR		 89 STAC_92HD73XX_MODELS
90};
91
d0513fc6 92enum {
1607b8ea 93 STAC_92HD83XXX_AUTO,
d0513fc6 94 STAC_92HD83XXX_REF,
32ed3f46 95 STAC_92HD83XXX_PWR_REF,
8bb0ac55 96 STAC_DELL_S14,
b4e81876 97 STAC_92HD83XXX_HP,
48315590 98 STAC_HP_DV7_4000,
d0513fc6
MR		 99 STAC_92HD83XXX_MODELS
100};
101
e035b841 102enum {
1607b8ea 103 STAC_92HD71BXX_AUTO,
e035b841 104 STAC_92HD71BXX_REF,
a7662640
MR		 105 STAC_DELL_M4_1,
106 STAC_DELL_M4_2,
3a7abfd2 107 STAC_DELL_M4_3,
6a14f585 108 STAC_HP_M4,
2a6ce6e5 109 STAC_HP_DV4,
1b0652eb 110 STAC_HP_DV5,
ae6241fb 111 STAC_HP_HDX,
514bf54c 112 STAC_HP_DV4_1222NR,
e035b841
MR		 113 STAC_92HD71BXX_MODELS
114};
115
8e21c34c 116enum {
1607b8ea 117 STAC_925x_AUTO,
8e21c34c 118 STAC_925x_REF,
9cb36c2a
MCC		 119 STAC_M1,
120 STAC_M1_2,
121 STAC_M2,
8e21c34c 122 STAC_M2_2,
9cb36c2a
MCC		 123 STAC_M3,
124 STAC_M5,
125 STAC_M6,
8e21c34c
TD		 126 STAC_925x_MODELS
127};
128
f5fcc13c 129enum {
1607b8ea 130 STAC_922X_AUTO,
f5fcc13c
TI		 131 STAC_D945_REF,
132 STAC_D945GTP3,
133 STAC_D945GTP5,
5d5d3bc3
IZ		 134 STAC_INTEL_MAC_V1,
135 STAC_INTEL_MAC_V2,
136 STAC_INTEL_MAC_V3,
137 STAC_INTEL_MAC_V4,
138 STAC_INTEL_MAC_V5,
536319af
NB		 139 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
140 * is given, one of the above models will be
141 * chosen according to the subsystem id. */
dfe495d0 142 /* for backward compatibility */
f5fcc13c 143 STAC_MACMINI,
3fc24d85 144 STAC_MACBOOK,
6f0778d8
NB		 145 STAC_MACBOOK_PRO_V1,
146 STAC_MACBOOK_PRO_V2,
f16928fb 147 STAC_IMAC_INTEL,
0dae0f83 148 STAC_IMAC_INTEL_20,
8c650087 149 STAC_ECS_202,
dfe495d0
TI		 150 STAC_922X_DELL_D81,
151 STAC_922X_DELL_D82,
152 STAC_922X_DELL_M81,
153 STAC_922X_DELL_M82,
f5fcc13c
TI		 154 STAC_922X_MODELS
155};
156
157enum {
1607b8ea 158 STAC_927X_AUTO,
e28d8322 159 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 160 STAC_D965_REF,
161 STAC_D965_3ST,
162 STAC_D965_5ST,
679d92ed 163 STAC_D965_5ST_NO_FP,
4ff076e5 164 STAC_DELL_3ST,
8e9068b1 165 STAC_DELL_BIOS,
54930531 166 STAC_927X_VOLKNOB,
f5fcc13c
TI		 167 STAC_927X_MODELS
168};
403d1944 169
307282c8
TI		 170enum {
171 STAC_9872_AUTO,
172 STAC_9872_VAIO,
173 STAC_9872_MODELS
174};
175
74aeaabc
MR		 176struct sigmatel_event {
177 hda_nid_t nid;
c6e4c666
TI		 178 unsigned char type;
179 unsigned char tag;
74aeaabc
MR		 180 int data;
181};
182
3d21d3f7
TI		 183struct sigmatel_mic_route {
184 hda_nid_t pin;
02d33322
TI		 185 signed char mux_idx;
186 signed char dmux_idx;
3d21d3f7
TI		 187};
188
2f2f4251 189struct sigmatel_spec {
c8b6bf9b 190 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 191 unsigned int num_mixers;
192
403d1944 193 int board_config;
c0cea0d0 194 unsigned int eapd_switch: 1;
c7d4b2fa 195 unsigned int surr_switch: 1;
3cc08dc6 196 unsigned int alt_switch: 1;
82bc955f 197 unsigned int hp_detect: 1;
00ef50c2 198 unsigned int spdif_mute: 1;
7c7767eb 199 unsigned int check_volume_offset:1;
3d21d3f7 200 unsigned int auto_mic:1;
1b0e372d 201 unsigned int linear_tone_beep:1;
c7d4b2fa 202
4fe5195c 203 /* gpio lines */
0fc9dec4 204 unsigned int eapd_mask;
4fe5195c
MR		 205 unsigned int gpio_mask;
206 unsigned int gpio_dir;
207 unsigned int gpio_data;
208 unsigned int gpio_mute;
86d190e7 209 unsigned int gpio_led;
c357aab0 210 unsigned int gpio_led_polarity;
4fe5195c 211
8daaaa97
MR		 212 /* stream */
213 unsigned int stream_delay;
214
4fe5195c 215 /* analog loopback */
d78d7a90 216 struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 217 unsigned char aloopback_mask;
218 unsigned char aloopback_shift;
8259980e 219
a64135a2
MR		 220 /* power management */
221 unsigned int num_pwrs;
d0513fc6 222 unsigned int *pwr_mapping;
a64135a2 223 hda_nid_t *pwr_nids;
b76c850f 224 hda_nid_t *dac_list;
a64135a2 225
74aeaabc
MR		 226 /* events */
227 struct snd_array events;
228
2f2f4251 229 /* playback */
b22b4821
MR		 230 struct hda_input_mux *mono_mux;
231 unsigned int cur_mmux;
2f2f4251 232 struct hda_multi_out multiout;
3cc08dc6 233 hda_nid_t dac_nids[5];
c21ca4a8
TI		 234 hda_nid_t hp_dacs[5];
235 hda_nid_t speaker_dacs[5];
2f2f4251 236
7c7767eb
TI		 237 int volume_offset;
238
2f2f4251
M		 239 /* capture */
240 hda_nid_t *adc_nids;
2f2f4251 241 unsigned int num_adcs;
dabbed6f
M		 242 hda_nid_t *mux_nids;
243 unsigned int num_muxes;
8b65727b
MP		 244 hda_nid_t *dmic_nids;
245 unsigned int num_dmics;
e1f0d669 246 hda_nid_t *dmux_nids;
1697055e 247 unsigned int num_dmuxes;
d9737751
MR		 248 hda_nid_t *smux_nids;
249 unsigned int num_smuxes;
5207e10e 250 unsigned int num_analog_muxes;
6479c631
TI		 251
252 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
253 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
254 unsigned int num_caps; /* number of capture volume/switch elements */
255
3d21d3f7
TI		 256 struct sigmatel_mic_route ext_mic;
257 struct sigmatel_mic_route int_mic;
9907790a 258 struct sigmatel_mic_route dock_mic;
3d21d3f7 259
ea734963 260 const char * const *spdif_labels;
d9737751 261
dabbed6f 262 hda_nid_t dig_in_nid;
b22b4821 263 hda_nid_t mono_nid;
1cd2224c
MR		 264 hda_nid_t anabeep_nid;
265 hda_nid_t digbeep_nid;
2f2f4251 266
2f2f4251
M		 267 /* pin widgets */
268 hda_nid_t *pin_nids;
269 unsigned int num_pins;
2f2f4251
M		 270
271 /* codec specific stuff */
272 struct hda_verb *init;
c8b6bf9b 273 struct snd_kcontrol_new *mixer;
2f2f4251
M		 274
275 /* capture source */
8b65727b 276 struct hda_input_mux *dinput_mux;
e1f0d669 277 unsigned int cur_dmux[2];
c7d4b2fa 278 struct hda_input_mux *input_mux;
3cc08dc6 279 unsigned int cur_mux[3];
d9737751
MR		 280 struct hda_input_mux *sinput_mux;
281 unsigned int cur_smux[2];
2a9c7816
MR		 282 unsigned int cur_amux;
283 hda_nid_t *amp_nids;
8daaaa97 284 unsigned int powerdown_adcs;
2f2f4251 285
403d1944
MP		 286 /* i/o switches */
287 unsigned int io_switch[2];
0fb87bb4 288 unsigned int clfe_swap;
c21ca4a8
TI		 289 hda_nid_t line_switch; /* shared line-in for input and output */
290 hda_nid_t mic_switch; /* shared mic-in for input and output */
291 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 292 unsigned int aloopback;
2f2f4251 293
c7d4b2fa
M		 294 struct hda_pcm pcm_rec[2]; /* PCM information */
295
296 /* dynamic controls and input_mux */
297 struct auto_pin_cfg autocfg;
603c4019 298 struct snd_array kctls;
8b65727b 299 struct hda_input_mux private_dimux;
c7d4b2fa 300 struct hda_input_mux private_imux;
d9737751 301 struct hda_input_mux private_smux;
b22b4821 302 struct hda_input_mux private_mono_mux;
2f2f4251
M		 303};
304
305static hda_nid_t stac9200_adc_nids[1] = {
306 0x03,
307};
308
309static hda_nid_t stac9200_mux_nids[1] = {
310 0x0c,
311};
312
313static hda_nid_t stac9200_dac_nids[1] = {
314 0x02,
315};
316
a64135a2
MR		 317static hda_nid_t stac92hd73xx_pwr_nids[8] = {
318 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
319 0x0f, 0x10, 0x11
320};
321
0ffa9807
MR		 322static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
323 0x26, 0,
324};
325
e1f0d669
MR		 326static hda_nid_t stac92hd73xx_adc_nids[2] = {
327 0x1a, 0x1b
328};
329
330#define STAC92HD73XX_NUM_DMICS 2
331static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
332 0x13, 0x14, 0
333};
334
335#define STAC92HD73_DAC_COUNT 5
e1f0d669 336
e2aec171
TI		 337static hda_nid_t stac92hd73xx_mux_nids[2] = {
338 0x20, 0x21,
e1f0d669
MR		 339};
340
341static hda_nid_t stac92hd73xx_dmux_nids[2] = {
342 0x20, 0x21,
343};
344
d9737751
MR		 345static hda_nid_t stac92hd73xx_smux_nids[2] = {
346 0x22, 0x23,
347};
348
6479c631
TI		 349#define STAC92HD73XX_NUM_CAPS 2
350static unsigned long stac92hd73xx_capvols[] = {
351 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
352 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
353};
354#define stac92hd73xx_capsws stac92hd73xx_capvols
355
d0513fc6 356#define STAC92HD83_DAC_COUNT 3
d0513fc6 357
667067d8 358static hda_nid_t stac92hd83xxx_mux_nids[2] = {
d0513fc6
MR		 359 0x17, 0x18,
360};
361
362static hda_nid_t stac92hd83xxx_adc_nids[2] = {
363 0x15, 0x16,
364};
365
366static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
367 0xa, 0xb, 0xd, 0xe,
368};
369
0ffa9807
MR		 370static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
371 0x1e, 0,
372};
373
d0513fc6 374static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 375 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 376};
377
ab5a6ebe
VK		 378#define STAC92HD83XXX_NUM_DMICS 2
379static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
380 0x11, 0x20, 0
381};
382
bdfe6f45
DH		 383#define STAC92HD88XXX_NUM_DMICS STAC92HD83XXX_NUM_DMICS
384#define stac92hd88xxx_dmic_nids stac92hd83xxx_dmic_nids
385
89feca1a
DH		 386#define STAC92HD87B_NUM_DMICS 1
387static hda_nid_t stac92hd87b_dmic_nids[STAC92HD87B_NUM_DMICS + 1] = {
388 0x11, 0
389};
390
6479c631
TI		 391#define STAC92HD83XXX_NUM_CAPS 2
392static unsigned long stac92hd83xxx_capvols[] = {
393 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
394 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
395};
396#define stac92hd83xxx_capsws stac92hd83xxx_capvols
397
a64135a2
MR		 398static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
399 0x0a, 0x0d, 0x0f
400};
401
e035b841
MR		 402static hda_nid_t stac92hd71bxx_adc_nids[2] = {
403 0x12, 0x13,
404};
405
406static hda_nid_t stac92hd71bxx_mux_nids[2] = {
407 0x1a, 0x1b
408};
409
4b33c767
MR		 410static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
411 0x1c, 0x1d,
e1f0d669
MR		 412};
413
d9737751
MR		 414static hda_nid_t stac92hd71bxx_smux_nids[2] = {
415 0x24, 0x25,
416};
417
e035b841
MR		 418#define STAC92HD71BXX_NUM_DMICS 2
419static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
420 0x18, 0x19, 0
421};
422
0ffa9807
MR		 423static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
424 0x22, 0
425};
426
6479c631
TI		 427#define STAC92HD71BXX_NUM_CAPS 2
428static unsigned long stac92hd71bxx_capvols[] = {
429 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
430 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
431};
432#define stac92hd71bxx_capsws stac92hd71bxx_capvols
433
8e21c34c
TD		 434static hda_nid_t stac925x_adc_nids[1] = {
435 0x03,
436};
437
438static hda_nid_t stac925x_mux_nids[1] = {
439 0x0f,
440};
441
442static hda_nid_t stac925x_dac_nids[1] = {
443 0x02,
444};
445
f6e9852a
TI		 446#define STAC925X_NUM_DMICS 1
447static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
448 0x15, 0
2c11f955
TD		 449};
450
1697055e
TI		 451static hda_nid_t stac925x_dmux_nids[1] = {
452 0x14,
453};
454
6479c631
TI		 455static unsigned long stac925x_capvols[] = {
456 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
457};
458static unsigned long stac925x_capsws[] = {
459 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
460};
461
2f2f4251
M		 462static hda_nid_t stac922x_adc_nids[2] = {
463 0x06, 0x07,
464};
465
466static hda_nid_t stac922x_mux_nids[2] = {
467 0x12, 0x13,
468};
469
6479c631
TI		 470#define STAC922X_NUM_CAPS 2
471static unsigned long stac922x_capvols[] = {
472 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
473 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
474};
475#define stac922x_capsws stac922x_capvols
476
45c1d85b
MR		 477static hda_nid_t stac927x_slave_dig_outs[2] = {
478 0x1f, 0,
479};
480
3cc08dc6
MP		 481static hda_nid_t stac927x_adc_nids[3] = {
482 0x07, 0x08, 0x09
483};
484
485static hda_nid_t stac927x_mux_nids[3] = {
486 0x15, 0x16, 0x17
487};
488
d9737751
MR		 489static hda_nid_t stac927x_smux_nids[1] = {
490 0x21,
491};
492
b76c850f
MR		 493static hda_nid_t stac927x_dac_nids[6] = {
494 0x02, 0x03, 0x04, 0x05, 0x06, 0
495};
496
e1f0d669
MR		 497static hda_nid_t stac927x_dmux_nids[1] = {
498 0x1b,
499};
500
7f16859a
MR		 501#define STAC927X_NUM_DMICS 2
502static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
503 0x13, 0x14, 0
504};
505
6479c631
TI		 506#define STAC927X_NUM_CAPS 3
507static unsigned long stac927x_capvols[] = {
508 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
509 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
510 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
511};
512static unsigned long stac927x_capsws[] = {
513 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
514 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
515 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
516};
517
ea734963 518static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 519 "Digital Playback", "ADAT", "Analog Mux 1",
520 "Analog Mux 2", "Analog Mux 3"
521};
522
f3302a59
MP		 523static hda_nid_t stac9205_adc_nids[2] = {
524 0x12, 0x13
525};
526
527static hda_nid_t stac9205_mux_nids[2] = {
528 0x19, 0x1a
529};
530
e1f0d669 531static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 532 0x1d,
e1f0d669
MR		 533};
534
d9737751
MR		 535static hda_nid_t stac9205_smux_nids[1] = {
536 0x21,
537};
538
f6e9852a
TI		 539#define STAC9205_NUM_DMICS 2
540static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
541 0x17, 0x18, 0
8b65727b
MP		 542};
543
6479c631
TI		 544#define STAC9205_NUM_CAPS 2
545static unsigned long stac9205_capvols[] = {
546 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
547 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
548};
549static unsigned long stac9205_capsws[] = {
550 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
551 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
552};
553
c7d4b2fa 554static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 555 0x08, 0x09, 0x0d, 0x0e,
556 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 557};
558
8e21c34c
TD		 559static hda_nid_t stac925x_pin_nids[8] = {
560 0x07, 0x08, 0x0a, 0x0b,
561 0x0c, 0x0d, 0x10, 0x11,
562};
563
2f2f4251
M		 564static hda_nid_t stac922x_pin_nids[10] = {
565 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
566 0x0f, 0x10, 0x11, 0x15, 0x1b,
567};
568
a7662640 569static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 570 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
571 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 572 0x14, 0x22, 0x23
e1f0d669
MR		 573};
574
8bb0ac55 575static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 576 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 577 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 578};
616f89e7 579
4dfb8a45
VK		 580static hda_nid_t stac92hd87xxx_pin_nids[6] = {
581 0x0a, 0x0b, 0x0c, 0x0d,
582 0x0f, 0x11,
583};
584
585static hda_nid_t stac92hd88xxx_pin_nids[8] = {
36706005
CC		 586 0x0a, 0x0b, 0x0c, 0x0d,
587 0x0f, 0x11, 0x1f, 0x20,
588};
589
616f89e7
HRK		 590#define STAC92HD71BXX_NUM_PINS 13
591static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
592 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
593 0x00, 0x14, 0x18, 0x19, 0x1e,
594 0x1f, 0x20, 0x27
595};
596static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 597 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
598 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 599 0x1f, 0x20, 0x27
e035b841
MR		 600};
601
3cc08dc6
MP		 602static hda_nid_t stac927x_pin_nids[14] = {
603 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
604 0x0f, 0x10, 0x11, 0x12, 0x13,
605 0x14, 0x21, 0x22, 0x23,
606};
607
f3302a59
MP		 608static hda_nid_t stac9205_pin_nids[12] = {
609 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
610 0x0f, 0x14, 0x16, 0x17, 0x18,
611 0x21, 0x22,
f3302a59
MP		 612};
613
8b65727b
MP		 614static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_info *uinfo)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
620}
621
622static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
e1f0d669 627 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 628
e1f0d669 629 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 630 return 0;
631}
632
633static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_value *ucontrol)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
e1f0d669 638 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 639
640 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 641 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 642}
643
d9737751
MR		 644static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_info *uinfo)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
649 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
650}
651
652static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_value *ucontrol)
654{
655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
656 struct sigmatel_spec *spec = codec->spec;
657 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
658
659 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
660 return 0;
661}
662
663static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
664 struct snd_ctl_elem_value *ucontrol)
665{
666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
667 struct sigmatel_spec *spec = codec->spec;
00ef50c2 668 struct hda_input_mux *smux = &spec->private_smux;
d9737751 669 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 670 int err, val;
671 hda_nid_t nid;
d9737751 672
00ef50c2 673 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 674 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 675 if (err < 0)
676 return err;
677
678 if (spec->spdif_mute) {
679 if (smux_idx == 0)
680 nid = spec->multiout.dig_out_nid;
681 else
682 nid = codec->slave_dig_outs[smux_idx - 1];
683 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 684 val = HDA_AMP_MUTE;
00ef50c2 685 else
c9b46f91 686 val = 0;
00ef50c2 687 /* un/mute SPDIF out */
c9b46f91
TI		 688 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
689 HDA_AMP_MUTE, val);
00ef50c2
MR		 690 }
691 return 0;
d9737751
MR		 692}
693
2fc99890
NL		 694static unsigned int stac92xx_vref_set(struct hda_codec *codec,
695 hda_nid_t nid, unsigned int new_vref)
696{
b8621516 697 int error;
2fc99890
NL		 698 unsigned int pincfg;
699 pincfg = snd_hda_codec_read(codec, nid, 0,
700 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
701
702 pincfg &= 0xff;
703 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
704 pincfg |= new_vref;
705
706 if (new_vref == AC_PINCTL_VREF_HIZ)
707 pincfg |= AC_PINCTL_OUT_EN;
708 else
709 pincfg |= AC_PINCTL_IN_EN;
710
711 error = snd_hda_codec_write_cache(codec, nid, 0,
712 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
713 if (error < 0)
714 return error;
715 else
716 return 1;
717}
718
719static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
720{
721 unsigned int vref;
722 vref = snd_hda_codec_read(codec, nid, 0,
723 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
724 vref &= AC_PINCTL_VREFEN;
725 return vref;
726}
727
c8b6bf9b 728static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 729{
730 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
731 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 732 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 733}
734
c8b6bf9b 735static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 736{
737 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
738 struct sigmatel_spec *spec = codec->spec;
739 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
740
741 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
742 return 0;
743}
744
c8b6bf9b 745static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 746{
747 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
748 struct sigmatel_spec *spec = codec->spec;
749 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 750 const struct hda_input_mux *imux = spec->input_mux;
094a4245 751 unsigned int idx, prev_idx, didx;
5207e10e
TI		 752
753 idx = ucontrol->value.enumerated.item[0];
754 if (idx >= imux->num_items)
755 idx = imux->num_items - 1;
756 prev_idx = spec->cur_mux[adc_idx];
757 if (prev_idx == idx)
758 return 0;
759 if (idx < spec->num_analog_muxes) {
760 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
761 AC_VERB_SET_CONNECT_SEL,
762 imux->items[idx].index);
094a4245
VK		 763 if (prev_idx >= spec->num_analog_muxes &&
764 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 765 imux = spec->dinput_mux;
766 /* 0 = analog */
767 snd_hda_codec_write_cache(codec,
768 spec->dmux_nids[adc_idx], 0,
769 AC_VERB_SET_CONNECT_SEL,
770 imux->items[0].index);
771 }
772 } else {
773 imux = spec->dinput_mux;
094a4245
VK		 774 /* first dimux item is hardcoded to select analog imux,
775 * so lets skip it
776 */
777 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 778 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
779 AC_VERB_SET_CONNECT_SEL,
094a4245 780 imux->items[didx].index);
5207e10e
TI		 781 }
782 spec->cur_mux[adc_idx] = idx;
783 return 1;
2f2f4251
M		 784}
785
b22b4821
MR		 786static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
787 struct snd_ctl_elem_info *uinfo)
788{
789 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
790 struct sigmatel_spec *spec = codec->spec;
791 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
792}
793
794static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
795 struct snd_ctl_elem_value *ucontrol)
796{
797 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
798 struct sigmatel_spec *spec = codec->spec;
799
800 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
801 return 0;
802}
803
804static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
805 struct snd_ctl_elem_value *ucontrol)
806{
807 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
808 struct sigmatel_spec *spec = codec->spec;
809
810 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
811 spec->mono_nid, &spec->cur_mmux);
812}
813
5f10c4a9
ML		 814#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
815
816static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
817 struct snd_ctl_elem_value *ucontrol)
818{
819 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 820 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 821 struct sigmatel_spec *spec = codec->spec;
822
e1f0d669
MR		 823 ucontrol->value.integer.value[0] = !!(spec->aloopback &
824 (spec->aloopback_mask << idx));
5f10c4a9
ML		 825 return 0;
826}
827
828static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
829 struct snd_ctl_elem_value *ucontrol)
830{
831 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
832 struct sigmatel_spec *spec = codec->spec;
e1f0d669 833 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 834 unsigned int dac_mode;
e1f0d669 835 unsigned int val, idx_val;
5f10c4a9 836
e1f0d669
MR		 837 idx_val = spec->aloopback_mask << idx;
838 if (ucontrol->value.integer.value[0])
839 val = spec->aloopback | idx_val;
840 else
841 val = spec->aloopback & ~idx_val;
68ea7b2f 842 if (spec->aloopback == val)
5f10c4a9
ML		 843 return 0;
844
68ea7b2f 845 spec->aloopback = val;
5f10c4a9 846
e1f0d669
MR		 847 /* Only return the bits defined by the shift value of the
848 * first two bytes of the mask
849 */
5f10c4a9 850 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 851 kcontrol->private_value & 0xFFFF, 0x0);
852 dac_mode >>= spec->aloopback_shift;
5f10c4a9 853
e1f0d669 854 if (spec->aloopback & idx_val) {
5f10c4a9 855 snd_hda_power_up(codec);
e1f0d669 856 dac_mode |= idx_val;
5f10c4a9
ML		 857 } else {
858 snd_hda_power_down(codec);
e1f0d669 859 dac_mode &= ~idx_val;
5f10c4a9
ML		 860 }
861
862 snd_hda_codec_write_cache(codec, codec->afg, 0,
863 kcontrol->private_value >> 16, dac_mode);
864
865 return 1;
866}
867
c7d4b2fa 868static struct hda_verb stac9200_core_init[] = {
2f2f4251 869 /* set dac0mux for dac converter */
c7d4b2fa 870 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 871 {}
872};
873
1194b5b7
TI		 874static struct hda_verb stac9200_eapd_init[] = {
875 /* set dac0mux for dac converter */
876 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
877 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
878 {}
879};
880
d654a660
MR		 881static struct hda_verb dell_eq_core_init[] = {
882 /* set master volume to max value without distortion
883 * and direct control */
884 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 885 {}
886};
887
e2aec171 888static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 889 /* set master volume and direct control */
890 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 891 {}
892};
893
d0513fc6 894static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 895 /* power state controls amps */
896 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 897 {}
d0513fc6
MR		 898};
899
e035b841 900static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 901 /* set master volume and direct control */
902 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 903 {}
541eee87
MR		 904};
905
ca8d33fc
MR		 906static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
907 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
908 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 909 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
910 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 911 {}
912};
913
8e21c34c
TD		 914static struct hda_verb stac925x_core_init[] = {
915 /* set dac0mux for dac converter */
916 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 917 /* mute the master volume */
918 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 919 {}
920};
921
c7d4b2fa 922static struct hda_verb stac922x_core_init[] = {
2f2f4251 923 /* set master volume and direct control */
c7d4b2fa 924 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 925 {}
926};
927
93ed1503 928static struct hda_verb d965_core_init[] = {
19039bd0 929 /* set master volume and direct control */
93ed1503 930 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 931 /* unmute node 0x1b */
932 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
933 /* select node 0x03 as DAC */
934 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
935 {}
936};
937
ccca7cdc
TI		 938static struct hda_verb dell_3st_core_init[] = {
939 /* don't set delta bit */
940 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
941 /* unmute node 0x1b */
942 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
943 /* select node 0x03 as DAC */
944 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
945 {}
946};
947
3cc08dc6
MP		 948static struct hda_verb stac927x_core_init[] = {
949 /* set master volume and direct control */
950 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 951 /* enable analog pc beep path */
952 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 953 {}
954};
955
54930531
TI		 956static struct hda_verb stac927x_volknob_core_init[] = {
957 /* don't set delta bit */
958 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
959 /* enable analog pc beep path */
960 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
961 {}
962};
963
f3302a59
MP		 964static struct hda_verb stac9205_core_init[] = {
965 /* set master volume and direct control */
966 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 967 /* enable analog pc beep path */
968 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 969 {}
970};
971
b22b4821
MR		 972#define STAC_MONO_MUX \
973 { \
974 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
975 .name = "Mono Mux", \
976 .count = 1, \
977 .info = stac92xx_mono_mux_enum_info, \
978 .get = stac92xx_mono_mux_enum_get, \
979 .put = stac92xx_mono_mux_enum_put, \
980 }
981
e1f0d669 982#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 983 { \
984 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
985 .name = "Analog Loopback", \
e1f0d669 986 .count = cnt, \
5f10c4a9
ML		 987 .info = stac92xx_aloopback_info, \
988 .get = stac92xx_aloopback_get, \
989 .put = stac92xx_aloopback_put, \
990 .private_value = verb_read | (verb_write << 16), \
991 }
992
2fc99890
NL		 993#define DC_BIAS(xname, idx, nid) \
994 { \
995 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
996 .name = xname, \
997 .index = idx, \
998 .info = stac92xx_dc_bias_info, \
999 .get = stac92xx_dc_bias_get, \
1000 .put = stac92xx_dc_bias_put, \
1001 .private_value = nid, \
1002 }
1003
c8b6bf9b 1004static struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 1005 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 1006 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1007 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1008 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1009 { } /* end */
1010};
1011
d78d7a90
TI		 1012static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
1013 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1014 {}
1015};
1016
1017static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1019 {}
1020};
e1f0d669 1021
d78d7a90
TI		 1022static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
1023 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1024 {}
1025};
1026
d0513fc6 1027
d78d7a90
TI		 1028static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
1029 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1030};
541eee87 1031
8e21c34c 1032static struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1033 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1034 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1035 { } /* end */
1036};
1037
d78d7a90
TI		 1038static struct snd_kcontrol_new stac9205_loopback[] = {
1039 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1040 {}
1041};
1042
d78d7a90
TI		 1043static struct snd_kcontrol_new stac927x_loopback[] = {
1044 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1045 {}
1046};
1047
1697055e
TI		 1048static struct snd_kcontrol_new stac_dmux_mixer = {
1049 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1050 .name = "Digital Input Source",
1051 /* count set later */
1052 .info = stac92xx_dmux_enum_info,
1053 .get = stac92xx_dmux_enum_get,
1054 .put = stac92xx_dmux_enum_put,
1055};
1056
d9737751
MR		 1057static struct snd_kcontrol_new stac_smux_mixer = {
1058 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1059 .name = "IEC958 Playback Source",
d9737751
MR		 1060 /* count set later */
1061 .info = stac92xx_smux_enum_info,
1062 .get = stac92xx_smux_enum_get,
1063 .put = stac92xx_smux_enum_put,
1064};
1065
ea734963 1066static const char * const slave_vols[] = {
2134ea4f
TI		 1067 "Front Playback Volume",
1068 "Surround Playback Volume",
1069 "Center Playback Volume",
1070 "LFE Playback Volume",
1071 "Side Playback Volume",
1072 "Headphone Playback Volume",
2134ea4f 1073 "Speaker Playback Volume",
2134ea4f
TI		 1074 NULL
1075};
1076
ea734963 1077static const char * const slave_sws[] = {
2134ea4f
TI		 1078 "Front Playback Switch",
1079 "Surround Playback Switch",
1080 "Center Playback Switch",
1081 "LFE Playback Switch",
1082 "Side Playback Switch",
1083 "Headphone Playback Switch",
2134ea4f 1084 "Speaker Playback Switch",
edb54a55 1085 "IEC958 Playback Switch",
2134ea4f
TI		 1086 NULL
1087};
1088
603c4019 1089static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1090static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1091
2f2f4251
M		 1092static int stac92xx_build_controls(struct hda_codec *codec)
1093{
1094 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1095 struct auto_pin_cfg *cfg = &spec->autocfg;
1096 hda_nid_t nid;
2f2f4251 1097 int err;
c7d4b2fa 1098 int i;
2f2f4251 1099
6479c631
TI		 1100 if (spec->mixer) {
1101 err = snd_hda_add_new_ctls(codec, spec->mixer);
1102 if (err < 0)
1103 return err;
1104 }
c7d4b2fa
M		 1105
1106 for (i = 0; i < spec->num_mixers; i++) {
1107 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1108 if (err < 0)
1109 return err;
1110 }
5207e10e
TI		 1111 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1112 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1113 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1114 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1115 snd_ctl_new1(&stac_dmux_mixer, codec));
1116 if (err < 0)
1117 return err;
1118 }
d9737751 1119 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1120 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1121 struct hda_input_mux *smux = &spec->private_smux;
1122 /* check for mute support on SPDIF out */
1123 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1124 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1125 spec->spdif_mute = 1;
1126 }
d9737751 1127 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1128 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1129 snd_ctl_new1(&stac_smux_mixer, codec));
1130 if (err < 0)
1131 return err;
1132 }
c7d4b2fa 1133
dabbed6f
M		 1134 if (spec->multiout.dig_out_nid) {
1135 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1136 if (err < 0)
1137 return err;
9a08160b
TI		 1138 err = snd_hda_create_spdif_share_sw(codec,
1139 &spec->multiout);
1140 if (err < 0)
1141 return err;
1142 spec->multiout.share_spdif = 1;
dabbed6f 1143 }
da74ae3e 1144 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1145 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1146 if (err < 0)
1147 return err;
1148 }
2134ea4f
TI		 1149
1150 /* if we have no master control, let's create it */
1151 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1152 unsigned int vmaster_tlv[4];
2134ea4f 1153 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1154 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1155 /* correct volume offset */
1156 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1157 /* minimum value is actually mute */
a74ccea5 1158 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1159 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1160 vmaster_tlv, slave_vols);
2134ea4f
TI		 1161 if (err < 0)
1162 return err;
1163 }
1164 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1165 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1166 NULL, slave_sws);
1167 if (err < 0)
1168 return err;
1169 }
1170
d78d7a90
TI		 1171 if (spec->aloopback_ctl &&
1172 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1173 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1174 if (err < 0)
1175 return err;
1176 }
1177
603c4019 1178 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1179
1180 /* create jack input elements */
1181 if (spec->hp_detect) {
1182 for (i = 0; i < cfg->hp_outs; i++) {
1183 int type = SND_JACK_HEADPHONE;
1184 nid = cfg->hp_pins[i];
1185 /* jack detection */
1186 if (cfg->hp_outs == i)
1187 type |= SND_JACK_LINEOUT;
1188 err = stac92xx_add_jack(codec, nid, type);
1189 if (err < 0)
1190 return err;
1191 }
1192 }
1193 for (i = 0; i < cfg->line_outs; i++) {
1194 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1195 SND_JACK_LINEOUT);
1196 if (err < 0)
1197 return err;
1198 }
eea7dc93
TI		 1199 for (i = 0; i < cfg->num_inputs; i++) {
1200 nid = cfg->inputs[i].pin;
1201 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1202 if (err < 0)
1203 return err;
e4973e1e
TI		 1204 }
1205
dabbed6f 1206 return 0;
2f2f4251
M		 1207}
1208
403d1944 1209static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1210 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1211 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1212};
1213
58eec423
MCC		 1214static unsigned int gateway9200_m4_pin_configs[8] = {
1215 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1216 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1217};
1218static unsigned int gateway9200_m4_2_pin_configs[8] = {
1219 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1220 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1221};
1222
1223/*
dfe495d0
TI		 1224 STAC 9200 pin configs for
1225 102801A8
1226 102801DE
1227 102801E8
1228*/
1229static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1230 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1231 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1232};
1233
1234/*
1235 STAC 9200 pin configs for
1236 102801C0
1237 102801C1
1238*/
1239static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1240 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1241 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1242};
1243
1244/*
1245 STAC 9200 pin configs for
1246 102801C4 (Dell Dimension E310)
1247 102801C5
1248 102801C7
1249 102801D9
1250 102801DA
1251 102801E3
1252*/
1253static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1254 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1255 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1256};
1257
1258
1259/*
1260 STAC 9200-32 pin configs for
1261 102801B5 (Dell Inspiron 630m)
1262 102801D8 (Dell Inspiron 640m)
1263*/
1264static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1265 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1266 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1267};
1268
1269/*
1270 STAC 9200-32 pin configs for
1271 102801C2 (Dell Latitude D620)
1272 102801C8
1273 102801CC (Dell Latitude D820)
1274 102801D4
1275 102801D6
1276*/
1277static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1278 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1279 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1280};
1281
1282/*
1283 STAC 9200-32 pin configs for
1284 102801CE (Dell XPS M1710)
1285 102801CF (Dell Precision M90)
1286*/
1287static unsigned int dell9200_m23_pin_configs[8] = {
1288 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1289 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1290};
1291
1292/*
1293 STAC 9200-32 pin configs for
1294 102801C9
1295 102801CA
1296 102801CB (Dell Latitude 120L)
1297 102801D3
1298*/
1299static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1300 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1301 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1302};
1303
1304/*
1305 STAC 9200-32 pin configs for
1306 102801BD (Dell Inspiron E1505n)
1307 102801EE
1308 102801EF
1309*/
1310static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1311 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1312 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1313};
1314
1315/*
1316 STAC 9200-32 pin configs for
1317 102801F5 (Dell Inspiron 1501)
1318 102801F6
1319*/
1320static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1321 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1322 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1323};
1324
1325/*
1326 STAC 9200-32
1327 102801CD (Dell Inspiron E1705/9400)
1328*/
1329static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1330 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1331 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1332};
1333
bf277785
TD		 1334static unsigned int oqo9200_pin_configs[8] = {
1335 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1336 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1337};
1338
dfe495d0 1339
f5fcc13c
TI		 1340static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1341 [STAC_REF] = ref9200_pin_configs,
bf277785 1342 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1343 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1344 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1345 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1346 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1347 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1348 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1349 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1350 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1351 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1352 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1353 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1354 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1355 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1356};
1357
ea734963 1358static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1359 [STAC_AUTO] = "auto",
f5fcc13c 1360 [STAC_REF] = "ref",
bf277785 1361 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1362 [STAC_9200_DELL_D21] = "dell-d21",
1363 [STAC_9200_DELL_D22] = "dell-d22",
1364 [STAC_9200_DELL_D23] = "dell-d23",
1365 [STAC_9200_DELL_M21] = "dell-m21",
1366 [STAC_9200_DELL_M22] = "dell-m22",
1367 [STAC_9200_DELL_M23] = "dell-m23",
1368 [STAC_9200_DELL_M24] = "dell-m24",
1369 [STAC_9200_DELL_M25] = "dell-m25",
1370 [STAC_9200_DELL_M26] = "dell-m26",
1371 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1372 [STAC_9200_M4] = "gateway-m4",
1373 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1374 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1375};
1376
1377static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1378 /* SigmaTel reference board */
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1380 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1382 "DFI LanParty", STAC_REF),
e7377071 1383 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1385 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1387 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1389 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1391 "unknown Dell", STAC_9200_DELL_D22),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1393 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1395 "Dell Latitude D620", STAC_9200_DELL_M22),
1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1397 "unknown Dell", STAC_9200_DELL_D23),
1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1399 "unknown Dell", STAC_9200_DELL_D23),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1401 "unknown Dell", STAC_9200_DELL_M22),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1403 "unknown Dell", STAC_9200_DELL_M24),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1405 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1406 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1407 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1408 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1409 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1410 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1411 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1412 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1413 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1414 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1415 "Dell Precision M90", STAC_9200_DELL_M23),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1417 "unknown Dell", STAC_9200_DELL_M22),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1419 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1420 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1421 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1422 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1423 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1425 "unknown Dell", STAC_9200_DELL_D23),
1426 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1427 "unknown Dell", STAC_9200_DELL_D23),
1428 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1429 "unknown Dell", STAC_9200_DELL_D21),
1430 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1431 "unknown Dell", STAC_9200_DELL_D23),
1432 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1433 "unknown Dell", STAC_9200_DELL_D21),
1434 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1435 "unknown Dell", STAC_9200_DELL_M25),
1436 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1437 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1438 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1439 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1441 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1442 /* Panasonic */
117f257d 1443 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1444 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1445 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1446 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1447 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1448 /* OQO Mobile */
1449 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1450 {} /* terminator */
1451};
1452
8e21c34c
TD		 1453static unsigned int ref925x_pin_configs[8] = {
1454 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1455 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1456};
1457
9cb36c2a
MCC		 1458static unsigned int stac925xM1_pin_configs[8] = {
1459 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1460 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1461};
1462
9cb36c2a
MCC		 1463static unsigned int stac925xM1_2_pin_configs[8] = {
1464 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1465 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1466};
58eec423 1467
9cb36c2a
MCC		 1468static unsigned int stac925xM2_pin_configs[8] = {
1469 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1470 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1471};
1472
8e21c34c 1473static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1474 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1475 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1476};
1477
9cb36c2a
MCC		 1478static unsigned int stac925xM3_pin_configs[8] = {
1479 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1480 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1481};
58eec423 1482
9cb36c2a
MCC		 1483static unsigned int stac925xM5_pin_configs[8] = {
1484 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1485 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1486};
1487
9cb36c2a
MCC		 1488static unsigned int stac925xM6_pin_configs[8] = {
1489 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1490 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1491};
1492
1493static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1494 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1495 [STAC_M1] = stac925xM1_pin_configs,
1496 [STAC_M1_2] = stac925xM1_2_pin_configs,
1497 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1498 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1499 [STAC_M3] = stac925xM3_pin_configs,
1500 [STAC_M5] = stac925xM5_pin_configs,
1501 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1502};
1503
ea734963 1504static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1505 [STAC_925x_AUTO] = "auto",
8e21c34c 1506 [STAC_REF] = "ref",
9cb36c2a
MCC		 1507 [STAC_M1] = "m1",
1508 [STAC_M1_2] = "m1-2",
1509 [STAC_M2] = "m2",
8e21c34c 1510 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1511 [STAC_M3] = "m3",
1512 [STAC_M5] = "m5",
1513 [STAC_M6] = "m6",
8e21c34c
TD		 1514};
1515
9cb36c2a 1516static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1517 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1518 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1519 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1520 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1521 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1522 /* Not sure about the brand name for those */
1523 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1524 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1525 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1526 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1527 {} /* terminator */
8e21c34c
TD		 1528};
1529
1530static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1531 /* SigmaTel reference board */
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1534 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1535
1536 /* Default table for unknown ID */
1537 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1538
8e21c34c
TD		 1539 {} /* terminator */
1540};
1541
a7662640 1542static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1543 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1544 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1545 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1546 0x01452050,
1547};
1548
1549static unsigned int dell_m6_pin_configs[13] = {
1550 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1551 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1552 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1553 0x4f0000f0,
e1f0d669
MR		 1554};
1555
842ae638
TI		 1556static unsigned int alienware_m17x_pin_configs[13] = {
1557 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1558 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1559 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1560 0x904601b0,
1561};
1562
4d26f446 1563static unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1564 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1565 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1566};
1567
e1f0d669 1568static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1569 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1570 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1571 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1572 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1573 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1574 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1575 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1576};
1577
ea734963 1578static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1579 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1580 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1581 [STAC_92HD73XX_REF] = "ref",
ae709440 1582 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1583 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1584 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1585 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1586 [STAC_DELL_EQ] = "dell-eq",
842ae638 1587 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1588};
1589
1590static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1591 /* SigmaTel reference board */
1592 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1593 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1595 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1596 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1597 "Intel DG45ID", STAC_92HD73XX_INTEL),
1598 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1599 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1601 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1602 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1603 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1605 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1607 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1608 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1609 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1610 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1611 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1612 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1613 "unknown Dell", STAC_DELL_M6_DMIC),
1614 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1615 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1617 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1619 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1621 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1623 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC		 1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1625 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6
DC		 1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1627 "Dell Studio 1558", STAC_DELL_M6_BOTH),
e1f0d669
MR		 1628 {} /* terminator */
1629};
1630
842ae638
TI		 1631static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1633 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1635 "Alienware M17x", STAC_ALIENWARE_M17X),
842ae638
TI		 1636 {} /* terminator */
1637};
1638
8bb0ac55 1639static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1640 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1641 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1642 0x01451160, 0x98560170,
1643};
1644
8bb0ac55 1645static unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1646 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1647 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1648 0x40f000f0, 0x40f000f0,
1649};
1650
48315590
SE		 1651static unsigned int hp_dv7_4000_pin_configs[10] = {
1652 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1653 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1654 0x40f000f0, 0x40f000f0,
1655};
1656
d0513fc6
MR		 1657static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1658 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1659 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1660 [STAC_DELL_S14] = dell_s14_pin_configs,
48315590 1661 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1662};
1663
ea734963 1664static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1665 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1666 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1667 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1668 [STAC_DELL_S14] = "dell-s14",
b4e81876 1669 [STAC_92HD83XXX_HP] = "hp",
48315590 1670 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1671};
1672
1673static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1674 /* SigmaTel reference board */
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1676 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1677 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1678 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1680 "unknown Dell", STAC_DELL_S14),
b4e81876
TI		 1681 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
1682 "HP", STAC_92HD83XXX_HP),
574f3c4f 1683 {} /* terminator */
d0513fc6
MR		 1684};
1685
616f89e7 1686static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1687 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1688 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1689 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1690 0x00000000
e035b841
MR		 1691};
1692
616f89e7 1693static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1694 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1695 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1696 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1697 0x00000000
a7662640
MR		 1698};
1699
616f89e7 1700static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1701 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1702 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1703 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1704 0x00000000
a7662640
MR		 1705};
1706
616f89e7 1707static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1708 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1709 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1710 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1711 0x00000000
3a7abfd2
MR		 1712};
1713
e035b841
MR		 1714static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1715 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1716 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1717 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1718 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1719 [STAC_HP_M4] = NULL,
2a6ce6e5 1720 [STAC_HP_DV4] = NULL,
1b0652eb 1721 [STAC_HP_DV5] = NULL,
ae6241fb 1722 [STAC_HP_HDX] = NULL,
514bf54c 1723 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1724};
1725
ea734963 1726static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1727 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1728 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1729 [STAC_DELL_M4_1] = "dell-m4-1",
1730 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1731 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1732 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1733 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1734 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1735 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1736 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1737};
1738
1739static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1740 /* SigmaTel reference board */
1741 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1742 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1743 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1744 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1745 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1746 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1747 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1748 "HP", STAC_HP_DV5),
58d8395b
TI		 1749 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1750 "HP", STAC_HP_DV5),
2ae466f8 1751 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1752 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1753 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1754 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1756 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1758 "HP mini 1000", STAC_HP_M4),
ae6241fb 1759 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1760 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1761 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1762 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1763 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1764 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1766 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1767 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1768 "HP", STAC_HP_DV5),
a7662640
MR		 1769 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1770 "unknown Dell", STAC_DELL_M4_1),
1771 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1772 "unknown Dell", STAC_DELL_M4_1),
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1774 "unknown Dell", STAC_DELL_M4_1),
1775 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1776 "unknown Dell", STAC_DELL_M4_1),
1777 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1778 "unknown Dell", STAC_DELL_M4_1),
1779 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1780 "unknown Dell", STAC_DELL_M4_1),
1781 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1782 "unknown Dell", STAC_DELL_M4_1),
1783 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1784 "unknown Dell", STAC_DELL_M4_2),
1785 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1786 "unknown Dell", STAC_DELL_M4_2),
1787 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1788 "unknown Dell", STAC_DELL_M4_2),
1789 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1790 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1791 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1792 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1793 {} /* terminator */
1794};
1795
403d1944
MP		 1796static unsigned int ref922x_pin_configs[10] = {
1797 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1798 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1799 0x40000100, 0x40000100,
1800};
1801
dfe495d0
TI		 1802/*
1803 STAC 922X pin configs for
1804 102801A7
1805 102801AB
1806 102801A9
1807 102801D1
1808 102801D2
1809*/
1810static unsigned int dell_922x_d81_pin_configs[10] = {
1811 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1812 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1813 0x01813122, 0x400001f2,
1814};
1815
1816/*
1817 STAC 922X pin configs for
1818 102801AC
1819 102801D0
1820*/
1821static unsigned int dell_922x_d82_pin_configs[10] = {
1822 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1823 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1824 0x01813122, 0x400001f1,
1825};
1826
1827/*
1828 STAC 922X pin configs for
1829 102801BF
1830*/
1831static unsigned int dell_922x_m81_pin_configs[10] = {
1832 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1833 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1834 0x40C003f1, 0x405003f0,
1835};
1836
1837/*
1838 STAC 9221 A1 pin configs for
1839 102801D7 (Dell XPS M1210)
1840*/
1841static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1842 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1843 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1844 0x508003f3, 0x405003f4,
1845};
1846
403d1944 1847static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1848 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1849 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1850 0x02a19120, 0x40000100,
1851};
1852
1853static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1854 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1855 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1856 0x02a19320, 0x40000100,
1857};
1858
5d5d3bc3
IZ		 1859static unsigned int intel_mac_v1_pin_configs[10] = {
1860 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1861 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1862 0x400000fc, 0x400000fb,
1863};
1864
1865static unsigned int intel_mac_v2_pin_configs[10] = {
1866 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1867 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1868 0x400000fc, 0x400000fb,
6f0778d8
NB		 1869};
1870
5d5d3bc3
IZ		 1871static unsigned int intel_mac_v3_pin_configs[10] = {
1872 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1873 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1874 0x400000fc, 0x400000fb,
1875};
1876
5d5d3bc3
IZ		 1877static unsigned int intel_mac_v4_pin_configs[10] = {
1878 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1879 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1880 0x400000fc, 0x400000fb,
1881};
1882
5d5d3bc3
IZ		 1883static unsigned int intel_mac_v5_pin_configs[10] = {
1884 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1885 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1886 0x400000fc, 0x400000fb,
0dae0f83
TI		 1887};
1888
8c650087
MCC		 1889static unsigned int ecs202_pin_configs[10] = {
1890 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1891 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1892 0x9037012e, 0x40e000f2,
1893};
76c08828 1894
19039bd0 1895static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1896 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1897 [STAC_D945GTP3] = d945gtp3_pin_configs,
1898 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1899 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1900 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1901 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1902 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1903 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1904 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1905 /* for backward compatibility */
5d5d3bc3
IZ		 1906 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1907 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1908 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1909 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1910 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1911 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1912 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1913 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1914 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1915 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1916 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1917};
1918
ea734963 1919static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1920 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1921 [STAC_D945_REF] = "ref",
1922 [STAC_D945GTP5] = "5stack",
1923 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1924 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1925 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1926 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1927 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1928 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1929 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1930 /* for backward compatibility */
f5fcc13c 1931 [STAC_MACMINI] = "macmini",
3fc24d85 1932 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1933 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1934 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1935 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1936 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1937 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1938 [STAC_922X_DELL_D81] = "dell-d81",
1939 [STAC_922X_DELL_D82] = "dell-d82",
1940 [STAC_922X_DELL_M81] = "dell-m81",
1941 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1942};
1943
1944static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1945 /* SigmaTel reference board */
1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1947 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 1948 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1949 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 1950 /* Intel 945G based systems */
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1952 "Intel D945G", STAC_D945GTP3),
1953 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1954 "Intel D945G", STAC_D945GTP3),
1955 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1956 "Intel D945G", STAC_D945GTP3),
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1958 "Intel D945G", STAC_D945GTP3),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1960 "Intel D945G", STAC_D945GTP3),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1962 "Intel D945G", STAC_D945GTP3),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1964 "Intel D945G", STAC_D945GTP3),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1966 "Intel D945G", STAC_D945GTP3),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1968 "Intel D945G", STAC_D945GTP3),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1970 "Intel D945G", STAC_D945GTP3),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1972 "Intel D945G", STAC_D945GTP3),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1974 "Intel D945G", STAC_D945GTP3),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1976 "Intel D945G", STAC_D945GTP3),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1978 "Intel D945G", STAC_D945GTP3),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1980 "Intel D945G", STAC_D945GTP3),
1981 /* Intel D945G 5-stack systems */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1983 "Intel D945G", STAC_D945GTP5),
1984 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1985 "Intel D945G", STAC_D945GTP5),
1986 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1987 "Intel D945G", STAC_D945GTP5),
1988 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1989 "Intel D945G", STAC_D945GTP5),
1990 /* Intel 945P based systems */
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1992 "Intel D945P", STAC_D945GTP3),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1994 "Intel D945P", STAC_D945GTP3),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1996 "Intel D945P", STAC_D945GTP3),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1998 "Intel D945P", STAC_D945GTP3),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2000 "Intel D945P", STAC_D945GTP3),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2002 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2003 /* other intel */
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2005 "Intel D945", STAC_D945_REF),
f5fcc13c 2006 /* other systems */
536319af 2007 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2008 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2009 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2010 /* Dell systems */
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2012 "unknown Dell", STAC_922X_DELL_D81),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2014 "unknown Dell", STAC_922X_DELL_D81),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2016 "unknown Dell", STAC_922X_DELL_D81),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2018 "unknown Dell", STAC_922X_DELL_D82),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2020 "unknown Dell", STAC_922X_DELL_M81),
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2022 "unknown Dell", STAC_922X_DELL_D82),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2024 "unknown Dell", STAC_922X_DELL_D81),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2026 "unknown Dell", STAC_922X_DELL_D81),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2028 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2029 /* ECS/PC Chips boards */
dea0a509 2030 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2031 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2032 {} /* terminator */
2033};
2034
3cc08dc6 2035static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2036 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2037 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2038 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2039 0x01c42190, 0x40000100,
3cc08dc6
MP		 2040};
2041
93ed1503 2042static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2043 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2044 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2045 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2046 0x40000100, 0x40000100
2047};
2048
93ed1503
TD		 2049static unsigned int d965_5st_pin_configs[14] = {
2050 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2051 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2052 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2053 0x40000100, 0x40000100
2054};
2055
679d92ed
TI		 2056static unsigned int d965_5st_no_fp_pin_configs[14] = {
2057 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2058 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2059 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2060 0x40000100, 0x40000100
2061};
2062
4ff076e5
TD		 2063static unsigned int dell_3st_pin_configs[14] = {
2064 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2065 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2066 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2067 0x40c003fc, 0x40000100
2068};
2069
93ed1503 2070static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2071 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2072 [STAC_D965_REF] = ref927x_pin_configs,
2073 [STAC_D965_3ST] = d965_3st_pin_configs,
2074 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2075 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2076 [STAC_DELL_3ST] = dell_3st_pin_configs,
2077 [STAC_DELL_BIOS] = NULL,
54930531 2078 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2079};
2080
ea734963 2081static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2082 [STAC_927X_AUTO] = "auto",
e28d8322 2083 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2084 [STAC_D965_REF] = "ref",
2085 [STAC_D965_3ST] = "3stack",
2086 [STAC_D965_5ST] = "5stack",
679d92ed 2087 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2088 [STAC_DELL_3ST] = "dell-3stack",
2089 [STAC_DELL_BIOS] = "dell-bios",
54930531 2090 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2091};
2092
2093static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2094 /* SigmaTel reference board */
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2096 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2097 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2098 "DFI LanParty", STAC_D965_REF),
81d3dbde 2099 /* Intel 946 based systems */
f5fcc13c
TI		 2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2102 /* 965 based 3 stack systems */
dea0a509
TI		 2103 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2104 "Intel D965", STAC_D965_3ST),
2105 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2106 "Intel D965", STAC_D965_3ST),
4ff076e5 2107 /* Dell 3 stack systems */
dfe495d0 2108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2111 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2121 /* 965 based 5 stack systems */
dea0a509
TI		 2122 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2123 "Intel D965", STAC_D965_5ST),
2124 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2125 "Intel D965", STAC_D965_5ST),
54930531
TI		 2126 /* volume-knob fixes */
2127 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2128 {} /* terminator */
2129};
2130
f3302a59
MP		 2131static unsigned int ref9205_pin_configs[12] = {
2132 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2133 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2134 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2135};
2136
dfe495d0
TI		 2137/*
2138 STAC 9205 pin configs for
2139 102801F1
2140 102801F2
2141 102801FC
2142 102801FD
2143 10280204
2144 1028021F
3fa2ef74 2145 10280228 (Dell Vostro 1500)
95e70e87 2146 10280229 (Dell Vostro 1700)
dfe495d0
TI		 2147*/
2148static unsigned int dell_9205_m42_pin_configs[12] = {
2149 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2150 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2151 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2152};
2153
2154/*
2155 STAC 9205 pin configs for
2156 102801F9
2157 102801FA
2158 102801FE
2159 102801FF (Dell Precision M4300)
2160 10280206
2161 10280200
2162 10280201
2163*/
2164static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2165 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2166 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2167 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2168};
2169
dfe495d0 2170static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2171 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2172 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2173 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2174};
2175
f5fcc13c 2176static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2177 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2178 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2179 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2180 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2181 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2182};
2183
ea734963 2184static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2185 [STAC_9205_AUTO] = "auto",
f5fcc13c 2186 [STAC_9205_REF] = "ref",
dfe495d0 2187 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2188 [STAC_9205_DELL_M43] = "dell-m43",
2189 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2190 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2191};
2192
2193static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2194 /* SigmaTel reference board */
2195 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2196 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2198 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2200 "DFI LanParty", STAC_9205_REF),
d9a4268e 2201 /* Dell */
dfe495d0
TI		 2202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2203 "unknown Dell", STAC_9205_DELL_M42),
2204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2205 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2207 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2209 "Dell Precision", STAC_9205_DELL_M43),
2210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2211 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2213 "unknown Dell", STAC_9205_DELL_M42),
2214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2215 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2217 "Dell Precision", STAC_9205_DELL_M43),
2218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2219 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2221 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2223 "Dell Precision", STAC_9205_DELL_M43),
2224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2225 "Dell Precision", STAC_9205_DELL_M43),
2226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2227 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2228 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2229 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2230 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2231 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2232 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2233 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2234 /* Gateway */
42b95f0c 2235 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2236 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2237 {} /* terminator */
2238};
2239
330ee995
TI		 2240static void stac92xx_set_config_regs(struct hda_codec *codec,
2241 unsigned int *pincfgs)
11b44bbd
RF		 2242{
2243 int i;
2244 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2245
330ee995
TI		 2246 if (!pincfgs)
2247 return;
11b44bbd 2248
87d48363 2249 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2250 if (spec->pin_nids[i] && pincfgs[i])
2251 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2252 pincfgs[i]);
af9f341a
TI		 2253}
2254
dabbed6f 2255/*
c7d4b2fa 2256 * Analog playback callbacks
dabbed6f 2257 */
c7d4b2fa
M		 2258static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2259 struct hda_codec *codec,
c8b6bf9b 2260 struct snd_pcm_substream *substream)
2f2f4251 2261{
dabbed6f 2262 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2263 if (spec->stream_delay)
2264 msleep(spec->stream_delay);
9a08160b
TI		 2265 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2266 hinfo);
2f2f4251
M		 2267}
2268
2f2f4251
M		 2269static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2270 struct hda_codec *codec,
2271 unsigned int stream_tag,
2272 unsigned int format,
c8b6bf9b 2273 struct snd_pcm_substream *substream)
2f2f4251
M		 2274{
2275 struct sigmatel_spec *spec = codec->spec;
403d1944 2276 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2277}
2278
2279static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2280 struct hda_codec *codec,
c8b6bf9b 2281 struct snd_pcm_substream *substream)
2f2f4251
M		 2282{
2283 struct sigmatel_spec *spec = codec->spec;
2284 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2285}
2286
dabbed6f
M		 2287/*
2288 * Digital playback callbacks
2289 */
2290static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2291 struct hda_codec *codec,
c8b6bf9b 2292 struct snd_pcm_substream *substream)
dabbed6f
M		 2293{
2294 struct sigmatel_spec *spec = codec->spec;
2295 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2296}
2297
2298static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2299 struct hda_codec *codec,
c8b6bf9b 2300 struct snd_pcm_substream *substream)
dabbed6f
M		 2301{
2302 struct sigmatel_spec *spec = codec->spec;
2303 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2304}
2305
6b97eb45
TI		 2306static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2307 struct hda_codec *codec,
2308 unsigned int stream_tag,
2309 unsigned int format,
2310 struct snd_pcm_substream *substream)
2311{
2312 struct sigmatel_spec *spec = codec->spec;
2313 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2314 stream_tag, format, substream);
2315}
2316
9411e21c
TI		 2317static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2318 struct hda_codec *codec,
2319 struct snd_pcm_substream *substream)
2320{
2321 struct sigmatel_spec *spec = codec->spec;
2322 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2323}
2324
dabbed6f 2325
2f2f4251
M		 2326/*
2327 * Analog capture callbacks
2328 */
2329static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2330 struct hda_codec *codec,
2331 unsigned int stream_tag,
2332 unsigned int format,
c8b6bf9b 2333 struct snd_pcm_substream *substream)
2f2f4251
M		 2334{
2335 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2336 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2337
8daaaa97
MR		 2338 if (spec->powerdown_adcs) {
2339 msleep(40);
8c2f767b 2340 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2341 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2342 }
2343 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2344 return 0;
2345}
2346
2347static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2348 struct hda_codec *codec,
c8b6bf9b 2349 struct snd_pcm_substream *substream)
2f2f4251
M		 2350{
2351 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2352 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2353
8daaaa97
MR		 2354 snd_hda_codec_cleanup_stream(codec, nid);
2355 if (spec->powerdown_adcs)
8c2f767b 2356 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2357 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2358 return 0;
2359}
2360
dabbed6f
M		 2361static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2362 .substreams = 1,
2363 .channels_min = 2,
2364 .channels_max = 2,
2365 /* NID is set in stac92xx_build_pcms */
2366 .ops = {
2367 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2368 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2369 .prepare = stac92xx_dig_playback_pcm_prepare,
2370 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2371 },
2372};
2373
2374static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2375 .substreams = 1,
2376 .channels_min = 2,
2377 .channels_max = 2,
2378 /* NID is set in stac92xx_build_pcms */
2379};
2380
2f2f4251
M		 2381static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2382 .substreams = 1,
2383 .channels_min = 2,
c7d4b2fa 2384 .channels_max = 8,
2f2f4251
M		 2385 .nid = 0x02, /* NID to query formats and rates */
2386 .ops = {
2387 .open = stac92xx_playback_pcm_open,
2388 .prepare = stac92xx_playback_pcm_prepare,
2389 .cleanup = stac92xx_playback_pcm_cleanup
2390 },
2391};
2392
3cc08dc6
MP		 2393static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2394 .substreams = 1,
2395 .channels_min = 2,
2396 .channels_max = 2,
2397 .nid = 0x06, /* NID to query formats and rates */
2398 .ops = {
2399 .open = stac92xx_playback_pcm_open,
2400 .prepare = stac92xx_playback_pcm_prepare,
2401 .cleanup = stac92xx_playback_pcm_cleanup
2402 },
2403};
2404
2f2f4251 2405static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2406 .channels_min = 2,
2407 .channels_max = 2,
9e05b7a3 2408 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2409 .ops = {
2410 .prepare = stac92xx_capture_pcm_prepare,
2411 .cleanup = stac92xx_capture_pcm_cleanup
2412 },
2413};
2414
2415static int stac92xx_build_pcms(struct hda_codec *codec)
2416{
2417 struct sigmatel_spec *spec = codec->spec;
2418 struct hda_pcm *info = spec->pcm_rec;
2419
2420 codec->num_pcms = 1;
2421 codec->pcm_info = info;
2422
c7d4b2fa 2423 info->name = "STAC92xx Analog";
2f2f4251 2424 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2425 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2426 spec->multiout.dac_nids[0];
2f2f4251 2427 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2428 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2429 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2430
2431 if (spec->alt_switch) {
2432 codec->num_pcms++;
2433 info++;
2434 info->name = "STAC92xx Analog Alt";
2435 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2436 }
2f2f4251 2437
dabbed6f
M		 2438 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2439 codec->num_pcms++;
2440 info++;
2441 info->name = "STAC92xx Digital";
0852d7a6 2442 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2443 if (spec->multiout.dig_out_nid) {
2444 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2445 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2446 }
2447 if (spec->dig_in_nid) {
2448 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2449 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2450 }
2451 }
2452
2f2f4251
M		 2453 return 0;
2454}
2455
7c922de7
NL		 2456static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2457 hda_nid_t nid)
c960a03b 2458{
1327a32b 2459 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2460 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2461 if (pincap & AC_PINCAP_VREF_100)
2462 return AC_PINCTL_VREF_100;
2463 if (pincap & AC_PINCAP_VREF_80)
2464 return AC_PINCTL_VREF_80;
2465 if (pincap & AC_PINCAP_VREF_50)
2466 return AC_PINCTL_VREF_50;
2467 if (pincap & AC_PINCAP_VREF_GRD)
2468 return AC_PINCTL_VREF_GRD;
2469 return 0;
2470}
2471
403d1944
MP		 2472static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2473
2474{
82beb8fd
TI		 2475 snd_hda_codec_write_cache(codec, nid, 0,
2476 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2477}
2478
7c2ba97b
MR		 2479#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2480
2481static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2482 struct snd_ctl_elem_value *ucontrol)
2483{
2484 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2485 struct sigmatel_spec *spec = codec->spec;
2486
d7a89436 2487 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2488 return 0;
2489}
2490
62558ce1 2491static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2492
7c2ba97b
MR		 2493static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2494 struct snd_ctl_elem_value *ucontrol)
2495{
2496 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2497 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2498 int nid = kcontrol->private_value;
2499
2500 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2501
2502 /* check to be sure that the ports are upto date with
2503 * switch changes
2504 */
62558ce1 2505 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2506
2507 return 1;
2508}
2509
7c922de7
NL		 2510static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2511 struct snd_ctl_elem_info *uinfo)
2512{
2513 int i;
2514 static char *texts[] = {
2515 "Mic In", "Line In", "Line Out"
2516 };
2517
2518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2519 struct sigmatel_spec *spec = codec->spec;
2520 hda_nid_t nid = kcontrol->private_value;
2521
2522 if (nid == spec->mic_switch || nid == spec->line_switch)
2523 i = 3;
2524 else
2525 i = 2;
2526
2527 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2528 uinfo->value.enumerated.items = i;
2529 uinfo->count = 1;
2530 if (uinfo->value.enumerated.item >= i)
2531 uinfo->value.enumerated.item = i-1;
2532 strcpy(uinfo->value.enumerated.name,
2533 texts[uinfo->value.enumerated.item]);
2534
2535 return 0;
2536}
2537
2538static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2539 struct snd_ctl_elem_value *ucontrol)
2540{
2541 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2542 hda_nid_t nid = kcontrol->private_value;
2543 unsigned int vref = stac92xx_vref_get(codec, nid);
2544
2545 if (vref == stac92xx_get_default_vref(codec, nid))
2546 ucontrol->value.enumerated.item[0] = 0;
2547 else if (vref == AC_PINCTL_VREF_GRD)
2548 ucontrol->value.enumerated.item[0] = 1;
2549 else if (vref == AC_PINCTL_VREF_HIZ)
2550 ucontrol->value.enumerated.item[0] = 2;
2551
2552 return 0;
2553}
2554
2555static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2556 struct snd_ctl_elem_value *ucontrol)
2557{
2558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2559 unsigned int new_vref = 0;
b8621516 2560 int error;
7c922de7
NL		 2561 hda_nid_t nid = kcontrol->private_value;
2562
2563 if (ucontrol->value.enumerated.item[0] == 0)
2564 new_vref = stac92xx_get_default_vref(codec, nid);
2565 else if (ucontrol->value.enumerated.item[0] == 1)
2566 new_vref = AC_PINCTL_VREF_GRD;
2567 else if (ucontrol->value.enumerated.item[0] == 2)
2568 new_vref = AC_PINCTL_VREF_HIZ;
2569 else
2570 return 0;
2571
2572 if (new_vref != stac92xx_vref_get(codec, nid)) {
2573 error = stac92xx_vref_set(codec, nid, new_vref);
2574 return error;
2575 }
2576
2577 return 0;
2578}
2579
2580static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2581 struct snd_ctl_elem_info *uinfo)
2582{
2583 static char *texts[2];
2584 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2585 struct sigmatel_spec *spec = codec->spec;
2586
2587 if (kcontrol->private_value == spec->line_switch)
2588 texts[0] = "Line In";
2589 else
2590 texts[0] = "Mic In";
2591 texts[1] = "Line Out";
2592 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2593 uinfo->value.enumerated.items = 2;
2594 uinfo->count = 1;
2595
2596 if (uinfo->value.enumerated.item >= 2)
2597 uinfo->value.enumerated.item = 1;
2598 strcpy(uinfo->value.enumerated.name,
2599 texts[uinfo->value.enumerated.item]);
2600
2601 return 0;
2602}
403d1944
MP		 2603
2604static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2605{
2606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2607 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2608 hda_nid_t nid = kcontrol->private_value;
2609 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2610
7c922de7 2611 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2612 return 0;
2613}
2614
2615static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2616{
2617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2618 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2619 hda_nid_t nid = kcontrol->private_value;
2620 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2621 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2622
2623 spec->io_switch[io_idx] = val;
2624
2625 if (val)
2626 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2627 else {
2628 unsigned int pinctl = AC_PINCTL_IN_EN;
2629 if (io_idx) /* set VREF for mic */
7c922de7 2630 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2631 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2632 }
40c1d308
JZ		 2633
2634 /* check the auto-mute again: we need to mute/unmute the speaker
2635 * appropriately according to the pin direction
2636 */
2637 if (spec->hp_detect)
62558ce1 2638 stac_issue_unsol_event(codec, nid);
40c1d308 2639
403d1944
MP		 2640 return 1;
2641}
2642
0fb87bb4
ML		 2643#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2644
2645static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2646 struct snd_ctl_elem_value *ucontrol)
2647{
2648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2649 struct sigmatel_spec *spec = codec->spec;
2650
2651 ucontrol->value.integer.value[0] = spec->clfe_swap;
2652 return 0;
2653}
2654
2655static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2656 struct snd_ctl_elem_value *ucontrol)
2657{
2658 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2659 struct sigmatel_spec *spec = codec->spec;
2660 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2661 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2662
68ea7b2f 2663 if (spec->clfe_swap == val)
0fb87bb4
ML		 2664 return 0;
2665
68ea7b2f 2666 spec->clfe_swap = val;
0fb87bb4
ML		 2667
2668 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2669 spec->clfe_swap ? 0x4 : 0x0);
2670
2671 return 1;
2672}
2673
7c2ba97b
MR		 2674#define STAC_CODEC_HP_SWITCH(xname) \
2675 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2676 .name = xname, \
2677 .index = 0, \
2678 .info = stac92xx_hp_switch_info, \
2679 .get = stac92xx_hp_switch_get, \
2680 .put = stac92xx_hp_switch_put, \
2681 }
2682
403d1944
MP		 2683#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2684 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2685 .name = xname, \
2686 .index = 0, \
2687 .info = stac92xx_io_switch_info, \
2688 .get = stac92xx_io_switch_get, \
2689 .put = stac92xx_io_switch_put, \
2690 .private_value = xpval, \
2691 }
2692
0fb87bb4
ML		 2693#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2694 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2695 .name = xname, \
2696 .index = 0, \
2697 .info = stac92xx_clfe_switch_info, \
2698 .get = stac92xx_clfe_switch_get, \
2699 .put = stac92xx_clfe_switch_put, \
2700 .private_value = xpval, \
2701 }
403d1944 2702
c7d4b2fa
M		 2703enum {
2704 STAC_CTL_WIDGET_VOL,
2705 STAC_CTL_WIDGET_MUTE,
123c07ae 2706 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2707 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2708 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2709 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2710 STAC_CTL_WIDGET_CLFE_SWITCH,
2711 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2712};
2713
c8b6bf9b 2714static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2715 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2716 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2717 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2718 STAC_MONO_MUX,
7c2ba97b 2719 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2720 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2721 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2722 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2723};
2724
2725/* add dynamic controls */
e3c75964
TI		 2726static struct snd_kcontrol_new *
2727stac_control_new(struct sigmatel_spec *spec,
2728 struct snd_kcontrol_new *ktemp,
4d02d1b6 2729 const char *name,
5e26dfd0 2730 unsigned int subdev)
c7d4b2fa 2731{
c8b6bf9b 2732 struct snd_kcontrol_new *knew;
c7d4b2fa 2733
603c4019
TI		 2734 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2735 knew = snd_array_new(&spec->kctls);
2736 if (!knew)
e3c75964 2737 return NULL;
4d4e9bb3 2738 *knew = *ktemp;
82fe0c58 2739 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2740 if (!knew->name) {
2741 /* roolback */
2742 memset(knew, 0, sizeof(*knew));
2743 spec->kctls.alloced--;
2744 return NULL;
2745 }
5e26dfd0 2746 knew->subdevice = subdev;
e3c75964
TI		 2747 return knew;
2748}
2749
2750static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2751 struct snd_kcontrol_new *ktemp,
2752 int idx, const char *name,
2753 unsigned long val)
2754{
4d02d1b6 2755 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2756 HDA_SUBDEV_AMP_FLAG);
e3c75964 2757 if (!knew)
c7d4b2fa 2758 return -ENOMEM;
e3c75964 2759 knew->index = idx;
c7d4b2fa 2760 knew->private_value = val;
c7d4b2fa
M		 2761 return 0;
2762}
2763
4d4e9bb3
TI		 2764static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2765 int type, int idx, const char *name,
2766 unsigned long val)
2767{
2768 return stac92xx_add_control_temp(spec,
2769 &stac92xx_control_templates[type],
2770 idx, name, val);
2771}
2772
4682eee0
MR		 2773
2774/* add dynamic controls */
4d4e9bb3
TI		 2775static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2776 const char *name, unsigned long val)
4682eee0
MR		 2777{
2778 return stac92xx_add_control_idx(spec, type, 0, name, val);
2779}
2780
e3c75964
TI		 2781static struct snd_kcontrol_new stac_input_src_temp = {
2782 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2783 .name = "Input Source",
2784 .info = stac92xx_mux_enum_info,
2785 .get = stac92xx_mux_enum_get,
2786 .put = stac92xx_mux_enum_put,
2787};
2788
7c922de7
NL		 2789static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2790 hda_nid_t nid, int idx)
2791{
2792 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2793 int control = 0;
2794 struct sigmatel_spec *spec = codec->spec;
2795 char name[22];
2796
99ae28be 2797 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL		 2798 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2799 && nid == spec->line_switch)
2800 control = STAC_CTL_WIDGET_IO_SWITCH;
2801 else if (snd_hda_query_pin_caps(codec, nid)
2802 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2803 control = STAC_CTL_WIDGET_DC_BIAS;
2804 else if (nid == spec->mic_switch)
2805 control = STAC_CTL_WIDGET_IO_SWITCH;
2806 }
2807
2808 if (control) {
10a20af7 2809 strcpy(name, hda_get_input_pin_label(codec, nid, 1));
7c922de7
NL		 2810 return stac92xx_add_control(codec->spec, control,
2811 strcat(name, " Jack Mode"), nid);
2812 }
2813
2814 return 0;
2815}
2816
e3c75964
TI		 2817static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2818{
2819 struct snd_kcontrol_new *knew;
2820 struct hda_input_mux *imux = &spec->private_imux;
2821
3d21d3f7
TI		 2822 if (spec->auto_mic)
2823 return 0; /* no need for input source */
e3c75964
TI		 2824 if (!spec->num_adcs || imux->num_items <= 1)
2825 return 0; /* no need for input source control */
2826 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2827 stac_input_src_temp.name, 0);
e3c75964
TI		 2828 if (!knew)
2829 return -ENOMEM;
2830 knew->count = spec->num_adcs;
2831 return 0;
2832}
2833
c21ca4a8
TI		 2834/* check whether the line-input can be used as line-out */
2835static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2836{
2837 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2838 struct auto_pin_cfg *cfg = &spec->autocfg;
2839 hda_nid_t nid;
2840 unsigned int pincap;
eea7dc93 2841 int i;
8e9068b1 2842
c21ca4a8
TI		 2843 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2844 return 0;
eea7dc93 2845 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2846 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2847 nid = cfg->inputs[i].pin;
2848 pincap = snd_hda_query_pin_caps(codec, nid);
2849 if (pincap & AC_PINCAP_OUT)
2850 return nid;
2851 }
2852 }
c21ca4a8
TI		 2853 return 0;
2854}
403d1944 2855
eea7dc93
TI		 2856static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2857
c21ca4a8 2858/* check whether the mic-input can be used as line-out */
eea7dc93 2859static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2860{
2861 struct sigmatel_spec *spec = codec->spec;
2862 struct auto_pin_cfg *cfg = &spec->autocfg;
2863 unsigned int def_conf, pincap;
86e2959a 2864 int i;
c21ca4a8 2865
eea7dc93 2866 *dac = 0;
c21ca4a8
TI		 2867 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2868 return 0;
eea7dc93
TI		 2869 for (i = 0; i < cfg->num_inputs; i++) {
2870 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2871 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2872 continue;
330ee995 2873 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2874 /* some laptops have an internal analog microphone
2875 * which can't be used as a output */
99ae28be 2876 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2877 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2878 if (pincap & AC_PINCAP_OUT) {
2879 *dac = get_unassigned_dac(codec, nid);
2880 if (*dac)
2881 return nid;
2882 }
403d1944 2883 }
403d1944 2884 }
403d1944
MP		 2885 return 0;
2886}
2887
7b043899
SL		 2888static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2889{
2890 int i;
2891
2892 for (i = 0; i < spec->multiout.num_dacs; i++) {
2893 if (spec->multiout.dac_nids[i] == nid)
2894 return 1;
2895 }
2896
2897 return 0;
2898}
2899
c21ca4a8
TI		 2900static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2901{
2902 int i;
2903 if (is_in_dac_nids(spec, nid))
2904 return 1;
2905 for (i = 0; i < spec->autocfg.hp_outs; i++)
2906 if (spec->hp_dacs[i] == nid)
2907 return 1;
2908 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2909 if (spec->speaker_dacs[i] == nid)
2910 return 1;
2911 return 0;
2912}
2913
2914static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2915{
2916 struct sigmatel_spec *spec = codec->spec;
2917 int j, conn_len;
2918 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2919 unsigned int wcaps, wtype;
2920
2921 conn_len = snd_hda_get_connections(codec, nid, conn,
2922 HDA_MAX_CONNECTIONS);
36706005
CC		 2923 /* 92HD88: trace back up the link of nids to find the DAC */
2924 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2925 != AC_WID_AUD_OUT)) {
2926 nid = conn[0];
2927 conn_len = snd_hda_get_connections(codec, nid, conn,
2928 HDA_MAX_CONNECTIONS);
2929 }
c21ca4a8 2930 for (j = 0; j < conn_len; j++) {
14bafe32 2931 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2932 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2933 /* we check only analog outputs */
2934 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2935 continue;
2936 /* if this route has a free DAC, assign it */
2937 if (!check_all_dac_nids(spec, conn[j])) {
2938 if (conn_len > 1) {
2939 /* select this DAC in the pin's input mux */
2940 snd_hda_codec_write_cache(codec, nid, 0,
2941 AC_VERB_SET_CONNECT_SEL, j);
2942 }
2943 return conn[j];
2944 }
2945 }
ee58a7ca
TI		 2946 /* if all DACs are already assigned, connect to the primary DAC */
2947 if (conn_len > 1) {
2948 for (j = 0; j < conn_len; j++) {
2949 if (conn[j] == spec->multiout.dac_nids[0]) {
2950 snd_hda_codec_write_cache(codec, nid, 0,
2951 AC_VERB_SET_CONNECT_SEL, j);
2952 break;
2953 }
2954 }
2955 }
c21ca4a8
TI		 2956 return 0;
2957}
2958
2959static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2960static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2961
3cc08dc6 2962/*
7b043899
SL		 2963 * Fill in the dac_nids table from the parsed pin configuration
2964 * This function only works when every pin in line_out_pins[]
2965 * contains atleast one DAC in its connection list. Some 92xx
2966 * codecs are not connected directly to a DAC, such as the 9200
2967 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2968 */
c21ca4a8 2969static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2970{
2971 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2972 struct auto_pin_cfg *cfg = &spec->autocfg;
2973 int i;
2974 hda_nid_t nid, dac;
7b043899 2975
c7d4b2fa
M		 2976 for (i = 0; i < cfg->line_outs; i++) {
2977 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2978 dac = get_unassigned_dac(codec, nid);
2979 if (!dac) {
df802952
TI		 2980 if (spec->multiout.num_dacs > 0) {
2981 /* we have already working output pins,
2982 * so let's drop the broken ones again
2983 */
2984 cfg->line_outs = spec->multiout.num_dacs;
2985 break;
2986 }
7b043899
SL		 2987 /* error out, no available DAC found */
2988 snd_printk(KERN_ERR
2989 "%s: No available DAC for pin 0x%x\n",
2990 __func__, nid);
2991 return -ENODEV;
2992 }
c21ca4a8
TI		 2993 add_spec_dacs(spec, dac);
2994 }
7b043899 2995
139e071b
TI		 2996 for (i = 0; i < cfg->hp_outs; i++) {
2997 nid = cfg->hp_pins[i];
2998 dac = get_unassigned_dac(codec, nid);
2999 if (dac) {
3000 if (!spec->multiout.hp_nid)
3001 spec->multiout.hp_nid = dac;
3002 else
3003 add_spec_extra_dacs(spec, dac);
3004 }
3005 spec->hp_dacs[i] = dac;
3006 }
3007
3008 for (i = 0; i < cfg->speaker_outs; i++) {
3009 nid = cfg->speaker_pins[i];
3010 dac = get_unassigned_dac(codec, nid);
3011 if (dac)
3012 add_spec_extra_dacs(spec, dac);
3013 spec->speaker_dacs[i] = dac;
3014 }
3015
c21ca4a8
TI		 3016 /* add line-in as output */
3017 nid = check_line_out_switch(codec);
3018 if (nid) {
3019 dac = get_unassigned_dac(codec, nid);
3020 if (dac) {
3021 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3022 nid, cfg->line_outs);
3023 cfg->line_out_pins[cfg->line_outs] = nid;
3024 cfg->line_outs++;
3025 spec->line_switch = nid;
3026 add_spec_dacs(spec, dac);
3027 }
3028 }
3029 /* add mic as output */
eea7dc93
TI		 3030 nid = check_mic_out_switch(codec, &dac);
3031 if (nid && dac) {
3032 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3033 nid, cfg->line_outs);
3034 cfg->line_out_pins[cfg->line_outs] = nid;
3035 cfg->line_outs++;
3036 spec->mic_switch = nid;
3037 add_spec_dacs(spec, dac);
c21ca4a8 3038 }
c7d4b2fa 3039
c21ca4a8 3040 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3041 spec->multiout.num_dacs,
3042 spec->multiout.dac_nids[0],
3043 spec->multiout.dac_nids[1],
3044 spec->multiout.dac_nids[2],
3045 spec->multiout.dac_nids[3],
3046 spec->multiout.dac_nids[4]);
c21ca4a8 3047
c7d4b2fa
M		 3048 return 0;
3049}
3050
eb06ed8f 3051/* create volume control/switch for the given prefx type */
668b9652
TI		 3052static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3053 int idx, hda_nid_t nid, int chs)
eb06ed8f 3054{
7c7767eb 3055 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3056 char name[32];
3057 int err;
3058
7c7767eb
TI		 3059 if (!spec->check_volume_offset) {
3060 unsigned int caps, step, nums, db_scale;
3061 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3062 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3063 AC_AMPCAP_STEP_SIZE_SHIFT;
3064 step = (step + 1) * 25; /* in .01dB unit */
3065 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3066 AC_AMPCAP_NUM_STEPS_SHIFT;
3067 db_scale = nums * step;
3068 /* if dB scale is over -64dB, and finer enough,
3069 * let's reduce it to half
3070 */
3071 if (db_scale > 6400 && nums >= 0x1f)
3072 spec->volume_offset = nums / 2;
3073 spec->check_volume_offset = 1;
3074 }
3075
eb06ed8f 3076 sprintf(name, "%s Playback Volume", pfx);
668b9652 3077 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3078 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3079 spec->volume_offset));
eb06ed8f
TI		 3080 if (err < 0)
3081 return err;
3082 sprintf(name, "%s Playback Switch", pfx);
668b9652 3083 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3084 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3085 if (err < 0)
3086 return err;
3087 return 0;
3088}
3089
668b9652
TI		 3090#define create_controls(codec, pfx, nid, chs) \
3091 create_controls_idx(codec, pfx, 0, nid, chs)
3092
ae0afd81
MR		 3093static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3094{
c21ca4a8 3095 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3096 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3097 return 1;
3098 } else {
3099 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3100 spec->multiout.num_dacs++;
3101 }
3102 return 0;
3103}
3104
c21ca4a8 3105static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3106{
c21ca4a8
TI		 3107 int i;
3108 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3109 if (!spec->multiout.extra_out_nid[i]) {
3110 spec->multiout.extra_out_nid[i] = nid;
3111 return 0;
3112 }
3113 }
3114 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3115 return 1;
ae0afd81
MR		 3116}
3117
dc04d1b4
TI		 3118/* Create output controls
3119 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3120 */
3121static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3122 const hda_nid_t *pins,
3123 const hda_nid_t *dac_nids,
3124 int type)
c7d4b2fa 3125{
76624534 3126 struct sigmatel_spec *spec = codec->spec;
ea734963 3127 static const char * const chname[4] = {
19039bd0
TI		 3128 "Front", "Surround", NULL /*CLFE*/, "Side"
3129 };
dc04d1b4 3130 hda_nid_t nid;
91589232
TI		 3131 int i, err;
3132 unsigned int wid_caps;
0fb87bb4 3133
dc04d1b4 3134 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI		 3135 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3136 wid_caps = get_wcaps(codec, pins[i]);
3137 if (wid_caps & AC_WCAP_UNSOL_CAP)
3138 spec->hp_detect = 1;
3139 }
dc04d1b4
TI		 3140 nid = dac_nids[i];
3141 if (!nid)
3142 continue;
3143 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3144 /* Center/LFE */
7c7767eb 3145 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3146 if (err < 0)
c7d4b2fa 3147 return err;
7c7767eb 3148 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3149 if (err < 0)
c7d4b2fa 3150 return err;
0fb87bb4
ML		 3151
3152 wid_caps = get_wcaps(codec, nid);
3153
3154 if (wid_caps & AC_WCAP_LR_SWAP) {
3155 err = stac92xx_add_control(spec,
3156 STAC_CTL_WIDGET_CLFE_SWITCH,
3157 "Swap Center/LFE Playback Switch", nid);
3158
3159 if (err < 0)
3160 return err;
3161 }
3162
c7d4b2fa 3163 } else {
dc04d1b4 3164 const char *name;
668b9652 3165 int idx;
dc04d1b4
TI		 3166 switch (type) {
3167 case AUTO_PIN_HP_OUT:
668b9652
TI		 3168 name = "Headphone";
3169 idx = i;
dc04d1b4
TI		 3170 break;
3171 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3172 name = "Speaker";
3173 idx = i;
dc04d1b4
TI		 3174 break;
3175 default:
3176 name = chname[i];
668b9652 3177 idx = 0;
dc04d1b4 3178 break;
76624534 3179 }
668b9652 3180 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3181 if (err < 0)
c7d4b2fa
M		 3182 return err;
3183 }
3184 }
dc04d1b4
TI		 3185 return 0;
3186}
3187
6479c631
TI		 3188static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3189 unsigned long sw, int idx)
3190{
3191 int err;
3192 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3193 "Capture Volume", vol);
6479c631
TI		 3194 if (err < 0)
3195 return err;
3196 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3197 "Capture Switch", sw);
6479c631
TI		 3198 if (err < 0)
3199 return err;
3200 return 0;
3201}
3202
dc04d1b4
TI		 3203/* add playback controls from the parsed DAC table */
3204static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3205 const struct auto_pin_cfg *cfg)
3206{
3207 struct sigmatel_spec *spec = codec->spec;
7c922de7 3208 hda_nid_t nid;
dc04d1b4 3209 int err;
7c922de7 3210 int idx;
dc04d1b4
TI		 3211
3212 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3213 spec->multiout.dac_nids,
3214 cfg->line_out_type);
3215 if (err < 0)
3216 return err;
c7d4b2fa 3217
a9cb5c90 3218 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3219 err = stac92xx_add_control(spec,
3220 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3221 "Headphone as Line Out Switch",
3222 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3223 if (err < 0)
3224 return err;
3225 }
3226
eea7dc93 3227 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3228 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3229 break;
3230 nid = cfg->inputs[idx].pin;
3231 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3232 if (err < 0)
3233 return err;
b5895dc8 3234 }
403d1944 3235
c7d4b2fa
M		 3236 return 0;
3237}
3238
eb06ed8f
TI		 3239/* add playback controls for Speaker and HP outputs */
3240static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3241 struct auto_pin_cfg *cfg)
3242{
3243 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3244 int err;
3245
3246 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3247 spec->hp_dacs, AUTO_PIN_HP_OUT);
3248 if (err < 0)
3249 return err;
3250
3251 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3252 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3253 if (err < 0)
3254 return err;
eb06ed8f 3255
c7d4b2fa
M		 3256 return 0;
3257}
3258
b22b4821 3259/* labels for mono mux outputs */
ea734963 3260static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3261 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3262};
3263
3264/* create mono mux for mono out on capable codecs */
3265static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3266{
3267 struct sigmatel_spec *spec = codec->spec;
3268 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3269 int i, num_cons;
3270 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3271
3272 num_cons = snd_hda_get_connections(codec,
3273 spec->mono_nid,
3274 con_lst,
3275 HDA_MAX_NUM_INPUTS);
16a433d8 3276 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3277 return -EINVAL;
3278
10a20af7
TI		 3279 for (i = 0; i < num_cons; i++)
3280 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3281 NULL);
09a99959
MR		 3282
3283 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3284 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3285}
3286
1cd2224c
MR		 3287/* create PC beep volume controls */
3288static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3289 hda_nid_t nid)
3290{
3291 struct sigmatel_spec *spec = codec->spec;
3292 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3293 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3294
3295 if (spec->anabeep_nid == nid)
3296 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3297
3298 /* check for mute support for the the amp */
3299 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3300 err = stac92xx_add_control(spec, type,
d355c82a 3301 "Beep Playback Switch",
1cd2224c
MR		 3302 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3303 if (err < 0)
3304 return err;
3305 }
3306
3307 /* check to see if there is volume support for the amp */
3308 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3309 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3310 "Beep Playback Volume",
1cd2224c
MR		 3311 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3312 if (err < 0)
3313 return err;
3314 }
3315 return 0;
3316}
3317
4d4e9bb3
TI		 3318#ifdef CONFIG_SND_HDA_INPUT_BEEP
3319#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3320
3321static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3322 struct snd_ctl_elem_value *ucontrol)
3323{
3324 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3325 ucontrol->value.integer.value[0] = codec->beep->enabled;
3326 return 0;
3327}
3328
3329static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3330 struct snd_ctl_elem_value *ucontrol)
3331{
3332 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3333 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3334}
3335
3336static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3337 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3338 .info = stac92xx_dig_beep_switch_info,
3339 .get = stac92xx_dig_beep_switch_get,
3340 .put = stac92xx_dig_beep_switch_put,
3341};
3342
3343static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3344{
3345 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3346 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3347}
3348#endif
3349
4682eee0
MR		 3350static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3351{
3352 struct sigmatel_spec *spec = codec->spec;
667067d8 3353 int i, j, err = 0;
4682eee0
MR		 3354
3355 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3356 hda_nid_t nid;
3357 unsigned int wcaps;
3358 unsigned long val;
3359
4682eee0
MR		 3360 nid = spec->mux_nids[i];
3361 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3362 if (!(wcaps & AC_WCAP_OUT_AMP))
3363 continue;
4682eee0 3364
667067d8
TI		 3365 /* check whether already the same control was created as
3366 * normal Capture Volume.
3367 */
3368 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3369 for (j = 0; j < spec->num_caps; j++) {
3370 if (spec->capvols[j] == val)
3371 break;
4682eee0 3372 }
667067d8
TI		 3373 if (j < spec->num_caps)
3374 continue;
3375
3376 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3377 "Mux Capture Volume", val);
3378 if (err < 0)
3379 return err;
4682eee0
MR		 3380 }
3381 return 0;
3382};
3383
ea734963 3384static const char * const stac92xx_spdif_labels[3] = {
65973632 3385 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3386};
3387
3388static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3389{
3390 struct sigmatel_spec *spec = codec->spec;
3391 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3392 const char * const *labels = spec->spdif_labels;
d9737751 3393 int i, num_cons;
65973632 3394 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3395
3396 num_cons = snd_hda_get_connections(codec,
3397 spec->smux_nids[0],
3398 con_lst,
3399 HDA_MAX_NUM_INPUTS);
16a433d8 3400 if (num_cons <= 0)
d9737751
MR		 3401 return -EINVAL;
3402
65973632
MR		 3403 if (!labels)
3404 labels = stac92xx_spdif_labels;
3405
10a20af7
TI		 3406 for (i = 0; i < num_cons; i++)
3407 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3408
3409 return 0;
3410}
3411
8b65727b 3412/* labels for dmic mux inputs */
ea734963 3413static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3414 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3415 "Digital Mic 3", "Digital Mic 4"
3416};
3417
3d21d3f7
TI		 3418static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3419 hda_nid_t nid)
3420{
3421 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3422 int i, nums;
3423
3424 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3425 for (i = 0; i < nums; i++)
3426 if (conn[i] == nid)
3427 return i;
3428 return -1;
3429}
3430
667067d8 3431/* create a volume assigned to the given pin (only if supported) */
96f845de 3432/* return 1 if the volume control is created */
667067d8 3433static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3434 const char *label, int idx, int direction)
667067d8
TI		 3435{
3436 unsigned int caps, nums;
3437 char name[32];
96f845de 3438 int err;
667067d8 3439
96f845de
TI		 3440 if (direction == HDA_OUTPUT)
3441 caps = AC_WCAP_OUT_AMP;
3442 else
3443 caps = AC_WCAP_IN_AMP;
3444 if (!(get_wcaps(codec, nid) & caps))
667067d8 3445 return 0;
96f845de 3446 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3447 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3448 if (!nums)
3449 return 0;
3450 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3451 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3452 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3453 if (err < 0)
3454 return err;
3455 return 1;
667067d8
TI		 3456}
3457
8b65727b
MP		 3458/* create playback/capture controls for input pins on dmic capable codecs */
3459static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3460 const struct auto_pin_cfg *cfg)
3461{
3462 struct sigmatel_spec *spec = codec->spec;
5207e10e 3463 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3464 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3465 int err, i;
5207e10e 3466 unsigned int def_conf;
8b65727b 3467
10a20af7 3468 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3469
8b65727b 3470 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3471 hda_nid_t nid;
10a20af7 3472 int index, type_idx;
5207e10e 3473 const char *label;
8b65727b 3474
667067d8
TI		 3475 nid = spec->dmic_nids[i];
3476 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3477 continue;
3478 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3479 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3480 continue;
3481
3d21d3f7
TI		 3482 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3483 if (index < 0)
3484 continue;
3485
10a20af7
TI		 3486 label = hda_get_input_pin_label(codec, nid, 1);
3487 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3488 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3489 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3490
10a20af7
TI		 3491 err = create_elem_capture_vol(codec, nid, label, type_idx,
3492 HDA_INPUT);
667067d8
TI		 3493 if (err < 0)
3494 return err;
96f845de
TI		 3495 if (!err) {
3496 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3497 type_idx, HDA_OUTPUT);
96f845de
TI		 3498 if (err < 0)
3499 return err;
3500 }
8b65727b
MP		 3501 }
3502
3503 return 0;
3504}
3505
3d21d3f7 3506static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3507 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3508{
3509 unsigned int cfg;
3510
3511 if (!nid)
3512 return 0;
3513 cfg = snd_hda_codec_get_pincfg(codec, nid);
99ae28be
TI		 3514 switch (snd_hda_get_input_pin_attr(cfg)) {
3515 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3516 if (*fixed)
3517 return 1; /* already occupied */
3518 *fixed = nid;
3519 break;
99ae28be
TI		 3520 case INPUT_PIN_ATTR_UNUSED:
3521 break;
3522 case INPUT_PIN_ATTR_DOCK:
3523 if (*dock)
3524 return 1; /* already occupied */
3525 *dock = nid;
3526 break;
3527 default:
3d21d3f7
TI		 3528 if (*ext)
3529 return 1; /* already occupied */
3530 *ext = nid;
3531 break;
3532 }
3533 return 0;
3534}
3535
3536static int set_mic_route(struct hda_codec *codec,
3537 struct sigmatel_mic_route *mic,
3538 hda_nid_t pin)
3539{
3540 struct sigmatel_spec *spec = codec->spec;
3541 struct auto_pin_cfg *cfg = &spec->autocfg;
3542 int i;
3543
3544 mic->pin = pin;
9907790a
CC		 3545 if (pin == 0)
3546 return 0;
eea7dc93
TI		 3547 for (i = 0; i < cfg->num_inputs; i++) {
3548 if (pin == cfg->inputs[i].pin)
3d21d3f7 3549 break;
eea7dc93 3550 }
86e2959a 3551 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3552 /* analog pin */
3d21d3f7
TI		 3553 i = get_connection_index(codec, spec->mux_nids[0], pin);
3554 if (i < 0)
3555 return -1;
3556 mic->mux_idx = i;
02d33322
TI		 3557 mic->dmux_idx = -1;
3558 if (spec->dmux_nids)
3559 mic->dmux_idx = get_connection_index(codec,
3560 spec->dmux_nids[0],
3561 spec->mux_nids[0]);
da2a2aaa 3562 } else if (spec->dmux_nids) {
3d21d3f7 3563 /* digital pin */
3d21d3f7
TI		 3564 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3565 if (i < 0)
3566 return -1;
3567 mic->dmux_idx = i;
02d33322
TI		 3568 mic->mux_idx = -1;
3569 if (spec->mux_nids)
3570 mic->mux_idx = get_connection_index(codec,
3571 spec->mux_nids[0],
3572 spec->dmux_nids[0]);
3d21d3f7
TI		 3573 }
3574 return 0;
3575}
3576
3577/* return non-zero if the device is for automatic mic switch */
3578static int stac_check_auto_mic(struct hda_codec *codec)
3579{
3580 struct sigmatel_spec *spec = codec->spec;
3581 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3582 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3583 int i;
3584
eea7dc93 3585 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 3586 if (cfg->inputs[i].type >= AUTO_PIN_LINE_IN)
3d21d3f7
TI		 3587 return 0; /* must be exclusively mics */
3588 }
9907790a 3589 fixed = ext = dock = 0;
eea7dc93 3590 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3591 if (check_mic_pin(codec, cfg->inputs[i].pin,
3592 &fixed, &ext, &dock))
3d21d3f7
TI		 3593 return 0;
3594 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3595 if (check_mic_pin(codec, spec->dmic_nids[i],
3596 &fixed, &ext, &dock))
3d21d3f7 3597 return 0;
80c67852 3598 if (!fixed || (!ext && !dock))
9907790a 3599 return 0; /* no input to switch */
3d21d3f7
TI		 3600 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3601 return 0; /* no unsol support */
3602 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3603 set_mic_route(codec, &spec->int_mic, fixed) ||
3604 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3605 return 0; /* something is wrong */
3606 return 1;
3607}
3608
c7d4b2fa
M		 3609/* create playback/capture controls for input pins */
3610static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3611{
3612 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3613 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3614 int i, j;
263d0328 3615 const char *label;
c7d4b2fa 3616
eea7dc93
TI		 3617 for (i = 0; i < cfg->num_inputs; i++) {
3618 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3619 int index, err, type_idx;
314634bc 3620
314634bc
TI		 3621 index = -1;
3622 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3623 index = get_connection_index(codec, spec->mux_nids[j],
3624 nid);
3625 if (index >= 0)
3626 break;
c7d4b2fa 3627 }
667067d8
TI		 3628 if (index < 0)
3629 continue;
3630
10a20af7
TI		 3631 label = hda_get_autocfg_input_label(codec, cfg, i);
3632 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3633
667067d8 3634 err = create_elem_capture_vol(codec, nid,
263d0328 3635 label, type_idx,
96f845de 3636 HDA_INPUT);
667067d8
TI		 3637 if (err < 0)
3638 return err;
c7d4b2fa 3639 }
5207e10e 3640 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3641
7b043899 3642 if (imux->num_items) {
62fe78e9
SR		 3643 /*
3644 * Set the current input for the muxes.
3645 * The STAC9221 has two input muxes with identical source
3646 * NID lists. Hopefully this won't get confused.
3647 */
3648 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3649 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3650 AC_VERB_SET_CONNECT_SEL,
3651 imux->items[0].index);
62fe78e9
SR		 3652 }
3653 }
3654
c7d4b2fa
M		 3655 return 0;
3656}
3657
c7d4b2fa
M		 3658static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3659{
3660 struct sigmatel_spec *spec = codec->spec;
3661 int i;
3662
3663 for (i = 0; i < spec->autocfg.line_outs; i++) {
3664 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3665 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3666 }
3667}
3668
3669static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3670{
3671 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3672 int i;
c7d4b2fa 3673
eb06ed8f
TI		 3674 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3675 hda_nid_t pin;
3676 pin = spec->autocfg.hp_pins[i];
3677 if (pin) /* connect to front */
3678 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3679 }
3680 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3681 hda_nid_t pin;
3682 pin = spec->autocfg.speaker_pins[i];
3683 if (pin) /* connect to front */
3684 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3685 }
c7d4b2fa
M		 3686}
3687
8af3aeb4
TI		 3688static int is_dual_headphones(struct hda_codec *codec)
3689{
3690 struct sigmatel_spec *spec = codec->spec;
3691 int i, valid_hps;
3692
3693 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3694 spec->autocfg.hp_outs <= 1)
3695 return 0;
3696 valid_hps = 0;
3697 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3698 hda_nid_t nid = spec->autocfg.hp_pins[i];
3699 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3700 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3701 continue;
3702 valid_hps++;
3703 }
3704 return (valid_hps > 1);
3705}
3706
3707
3cc08dc6 3708static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3709{
3710 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3711 int hp_swap = 0;
6479c631 3712 int i, err;
c7d4b2fa 3713
8b65727b
MP		 3714 if ((err = snd_hda_parse_pin_def_config(codec,
3715 &spec->autocfg,
3716 spec->dmic_nids)) < 0)
c7d4b2fa 3717 return err;
82bc955f 3718 if (! spec->autocfg.line_outs)
869264c4 3719 return 0; /* can't find valid pin config */
19039bd0 3720
bcecd9bd
JZ		 3721 /* If we have no real line-out pin and multiple hp-outs, HPs should
3722 * be set up as multi-channel outputs.
3723 */
8af3aeb4 3724 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3725 /* Copy hp_outs to line_outs, backup line_outs in
3726 * speaker_outs so that the following routines can handle
3727 * HP pins as primary outputs.
3728 */
c21ca4a8 3729 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3730 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3731 sizeof(spec->autocfg.line_out_pins));
3732 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3733 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3734 sizeof(spec->autocfg.hp_pins));
3735 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3736 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3737 spec->autocfg.hp_outs = 0;
dc04d1b4 3738 hp_swap = 1;
bcecd9bd 3739 }
09a99959 3740 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3741 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3742 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3743 u32 caps = query_amp_caps(codec,
3744 spec->autocfg.mono_out_pin, dir);
3745 hda_nid_t conn_list[1];
3746
3747 /* get the mixer node and then the mono mux if it exists */
3748 if (snd_hda_get_connections(codec,
3749 spec->autocfg.mono_out_pin, conn_list, 1) &&
3750 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3751 conn_list, 1) > 0) {
09a99959
MR		 3752
3753 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3754 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3755 /* LR swap check, some stac925x have a mux that
3756 * changes the DACs output path instead of the
3757 * mono-mux path.
3758 */
3759 if (wid_type == AC_WID_AUD_SEL &&
3760 !(wcaps & AC_WCAP_LR_SWAP))
3761 spec->mono_nid = conn_list[0];
3762 }
d0513fc6
MR		 3763 if (dir) {
3764 hda_nid_t nid = spec->autocfg.mono_out_pin;
3765
3766 /* most mono outs have a least a mute/unmute switch */
3767 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3768 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3769 "Mono Playback Switch",
3770 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3771 if (err < 0)
3772 return err;
d0513fc6
MR		 3773 /* check for volume support for the amp */
3774 if ((caps & AC_AMPCAP_NUM_STEPS)
3775 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3776 err = stac92xx_add_control(spec,
3777 STAC_CTL_WIDGET_VOL,
3778 "Mono Playback Volume",
3779 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3780 if (err < 0)
3781 return err;
3782 }
09a99959
MR		 3783 }
3784
3785 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3786 AC_PINCTL_OUT_EN);
3787 }
bcecd9bd 3788
c21ca4a8
TI		 3789 if (!spec->multiout.num_dacs) {
3790 err = stac92xx_auto_fill_dac_nids(codec);
3791 if (err < 0)
19039bd0 3792 return err;
c9280d68
TI		 3793 err = stac92xx_auto_create_multi_out_ctls(codec,
3794 &spec->autocfg);
3795 if (err < 0)
3796 return err;
c21ca4a8 3797 }
c7d4b2fa 3798
1cd2224c
MR		 3799 /* setup analog beep controls */
3800 if (spec->anabeep_nid > 0) {
3801 err = stac92xx_auto_create_beep_ctls(codec,
3802 spec->anabeep_nid);
3803 if (err < 0)
3804 return err;
3805 }
3806
3807 /* setup digital beep controls and input device */
3808#ifdef CONFIG_SND_HDA_INPUT_BEEP
3809 if (spec->digbeep_nid > 0) {
3810 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3811 unsigned int caps;
1cd2224c
MR		 3812
3813 err = stac92xx_auto_create_beep_ctls(codec, nid);
3814 if (err < 0)
3815 return err;
3816 err = snd_hda_attach_beep_device(codec, nid);
3817 if (err < 0)
3818 return err;
d8d881dd
TI		 3819 if (codec->beep) {
3820 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3821 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3822 /* if no beep switch is available, make its own one */
3823 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3824 if (!(caps & AC_AMPCAP_MUTE)) {
3825 err = stac92xx_beep_switch_ctl(codec);
3826 if (err < 0)
3827 return err;
3828 }
4d4e9bb3 3829 }
1cd2224c
MR		 3830 }
3831#endif
3832
0fb87bb4 3833 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3834 if (err < 0)
3835 return err;
3836
dc04d1b4
TI		 3837 /* All output parsing done, now restore the swapped hp pins */
3838 if (hp_swap) {
3839 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3840 sizeof(spec->autocfg.hp_pins));
3841 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3842 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3843 spec->autocfg.line_outs = 0;
3844 }
0fb87bb4 3845
3d21d3f7
TI		 3846 if (stac_check_auto_mic(codec)) {
3847 spec->auto_mic = 1;
3848 /* only one capture for auto-mic */
3849 spec->num_adcs = 1;
3850 spec->num_caps = 1;
3851 spec->num_muxes = 1;
3852 }
3853
6479c631
TI		 3854 for (i = 0; i < spec->num_caps; i++) {
3855 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3856 spec->capsws[i], i);
3857 if (err < 0)
3858 return err;
3859 }
3860
dc04d1b4 3861 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3862 if (err < 0)
c7d4b2fa
M		 3863 return err;
3864
b22b4821
MR		 3865 if (spec->mono_nid > 0) {
3866 err = stac92xx_auto_create_mono_output_ctls(codec);
3867 if (err < 0)
3868 return err;
3869 }
2a9c7816 3870 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3871 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3872 &spec->autocfg)) < 0)
3873 return err;
4682eee0
MR		 3874 if (spec->num_muxes > 0) {
3875 err = stac92xx_auto_create_mux_input_ctls(codec);
3876 if (err < 0)
3877 return err;
3878 }
d9737751
MR		 3879 if (spec->num_smuxes > 0) {
3880 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3881 if (err < 0)
3882 return err;
3883 }
8b65727b 3884
e3c75964
TI		 3885 err = stac92xx_add_input_source(spec);
3886 if (err < 0)
3887 return err;
3888
c7d4b2fa 3889 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3890 if (spec->multiout.max_channels > 2)
c7d4b2fa 3891 spec->surr_switch = 1;
c7d4b2fa 3892
0852d7a6 3893 if (spec->autocfg.dig_outs)
3cc08dc6 3894 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3895 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3896 spec->dig_in_nid = dig_in;
c7d4b2fa 3897
603c4019
TI		 3898 if (spec->kctls.list)
3899 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3900
3901 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3902 if (!spec->dinput_mux)
3903 spec->dinput_mux = &spec->private_dimux;
d9737751 3904 spec->sinput_mux = &spec->private_smux;
b22b4821 3905 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3906 return 1;
3907}
3908
82bc955f
TI		 3909/* add playback controls for HP output */
3910static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3911 struct auto_pin_cfg *cfg)
3912{
3913 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3914 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3915 unsigned int wid_caps;
3916
3917 if (! pin)
3918 return 0;
3919
3920 wid_caps = get_wcaps(codec, pin);
505cb341 3921 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3922 spec->hp_detect = 1;
82bc955f
TI		 3923
3924 return 0;
3925}
3926
160ea0dc
RF		 3927/* add playback controls for LFE output */
3928static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3929 struct auto_pin_cfg *cfg)
3930{
3931 struct sigmatel_spec *spec = codec->spec;
3932 int err;
3933 hda_nid_t lfe_pin = 0x0;
3934 int i;
3935
3936 /*
3937 * search speaker outs and line outs for a mono speaker pin
3938 * with an amp. If one is found, add LFE controls
3939 * for it.
3940 */
3941 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3942 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3943 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3944 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3945 if (wcaps == AC_WCAP_OUT_AMP)
3946 /* found a mono speaker with an amp, must be lfe */
3947 lfe_pin = pin;
3948 }
3949
3950 /* if speaker_outs is 0, then speakers may be in line_outs */
3951 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3952 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3953 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3954 unsigned int defcfg;
330ee995 3955 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3956 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3957 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3958 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3959 if (wcaps == AC_WCAP_OUT_AMP)
3960 /* found a mono speaker with an amp,
3961 must be lfe */
3962 lfe_pin = pin;
3963 }
3964 }
3965 }
3966
3967 if (lfe_pin) {
7c7767eb 3968 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3969 if (err < 0)
3970 return err;
3971 }
3972
3973 return 0;
3974}
3975
c7d4b2fa
M		 3976static int stac9200_parse_auto_config(struct hda_codec *codec)
3977{
3978 struct sigmatel_spec *spec = codec->spec;
3979 int err;
3980
df694daa 3981 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3982 return err;
3983
3984 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3985 return err;
3986
82bc955f
TI		 3987 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3988 return err;
3989
160ea0dc
RF		 3990 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3991 return err;
3992
355a0ec4
TI		 3993 if (spec->num_muxes > 0) {
3994 err = stac92xx_auto_create_mux_input_ctls(codec);
3995 if (err < 0)
3996 return err;
3997 }
3998
e3c75964
TI		 3999 err = stac92xx_add_input_source(spec);
4000 if (err < 0)
4001 return err;
4002
0852d7a6 4003 if (spec->autocfg.dig_outs)
c7d4b2fa 4004 spec->multiout.dig_out_nid = 0x05;
82bc955f 4005 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4006 spec->dig_in_nid = 0x04;
c7d4b2fa 4007
603c4019
TI		 4008 if (spec->kctls.list)
4009 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4010
4011 spec->input_mux = &spec->private_imux;
8b65727b 4012 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4013
4014 return 1;
4015}
4016
62fe78e9
SR		 4017/*
4018 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4019 * funky external mute control using GPIO pins.
4020 */
4021
76e1ddfb 4022static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4023 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4024{
4025 unsigned int gpiostate, gpiomask, gpiodir;
4026
4027 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4028 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4029 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4030
4031 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4032 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4033 gpiomask |= mask;
62fe78e9
SR		 4034
4035 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4036 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4037 gpiodir |= dir_mask;
62fe78e9 4038
76e1ddfb 4039 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4040 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4041
4042 snd_hda_codec_write(codec, codec->afg, 0,
4043 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4044 snd_hda_codec_read(codec, codec->afg, 0,
4045 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4046
4047 msleep(1);
4048
76e1ddfb
TI		 4049 snd_hda_codec_read(codec, codec->afg, 0,
4050 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4051}
4052
74aeaabc
MR		 4053static int stac92xx_add_jack(struct hda_codec *codec,
4054 hda_nid_t nid, int type)
4055{
8c8145b8 4056#ifdef CONFIG_SND_HDA_INPUT_JACK
330ee995 4057 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR		 4058 int connectivity = get_defcfg_connect(def_conf);
4059 char name[32];
95c09099 4060 int err;
74aeaabc
MR		 4061
4062 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4063 return 0;
4064
86de7416 4065 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR		 4066 snd_hda_get_jack_type(def_conf),
4067 snd_hda_get_jack_connectivity(def_conf),
4068 snd_hda_get_jack_location(def_conf));
4069
cd372fb3
TI		 4070 err = snd_hda_input_jack_add(codec, nid, type, name);
4071 if (err < 0)
95c09099 4072 return err;
cd372fb3 4073#endif /* CONFIG_SND_HDA_INPUT_JACK */
95c09099 4074 return 0;
74aeaabc
MR		 4075}
4076
c6e4c666
TI		 4077static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4078 unsigned char type, int data)
74aeaabc
MR		 4079{
4080 struct sigmatel_event *event;
4081
4082 snd_array_init(&spec->events, sizeof(*event), 32);
4083 event = snd_array_new(&spec->events);
4084 if (!event)
4085 return -ENOMEM;
4086 event->nid = nid;
c6e4c666
TI		 4087 event->type = type;
4088 event->tag = spec->events.used;
74aeaabc
MR		 4089 event->data = data;
4090
c6e4c666 4091 return event->tag;
74aeaabc
MR		 4092}
4093
c6e4c666 4094static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4095 hda_nid_t nid)
74aeaabc
MR		 4096{
4097 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4098 struct sigmatel_event *event = spec->events.list;
4099 int i;
4100
4101 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4102 if (event->nid == nid)
c6e4c666 4103 return event;
74aeaabc 4104 }
c6e4c666 4105 return NULL;
74aeaabc
MR		 4106}
4107
c6e4c666
TI		 4108static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4109 unsigned char tag)
314634bc 4110{
c6e4c666
TI		 4111 struct sigmatel_spec *spec = codec->spec;
4112 struct sigmatel_event *event = spec->events.list;
4113 int i;
4114
4115 for (i = 0; i < spec->events.used; i++, event++) {
4116 if (event->tag == tag)
4117 return event;
74aeaabc 4118 }
c6e4c666
TI		 4119 return NULL;
4120}
4121
62558ce1
TI		 4122/* check if given nid is a valid pin and no other events are assigned
4123 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4124 * Otherwise, returns zero.
4125 */
4126static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4127 unsigned int type)
c6e4c666
TI		 4128{
4129 struct sigmatel_event *event;
4130 int tag;
4131
4132 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI		 4133 return 0;
4134 event = stac_get_event(codec, nid);
4135 if (event) {
4136 if (event->type != type)
4137 return 0;
c6e4c666 4138 tag = event->tag;
62558ce1 4139 } else {
c6e4c666 4140 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4141 if (tag < 0)
4142 return 0;
4143 }
c6e4c666
TI		 4144 snd_hda_codec_write_cache(codec, nid, 0,
4145 AC_VERB_SET_UNSOLICITED_ENABLE,
4146 AC_USRSP_EN | tag);
62558ce1 4147 return 1;
314634bc
TI		 4148}
4149
a64135a2
MR		 4150static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4151{
4152 int i;
4153 for (i = 0; i < cfg->hp_outs; i++)
4154 if (cfg->hp_pins[i] == nid)
4155 return 1; /* nid is a HP-Out */
4156
4157 return 0; /* nid is not a HP-Out */
4158};
4159
b76c850f
MR		 4160static void stac92xx_power_down(struct hda_codec *codec)
4161{
4162 struct sigmatel_spec *spec = codec->spec;
4163
4164 /* power down inactive DACs */
4165 hda_nid_t *dac;
4166 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4167 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4168 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4169 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4170}
4171
f73d3585
TI		 4172static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4173 int enable);
4174
014c41fc
TI		 4175static inline int get_int_hint(struct hda_codec *codec, const char *key,
4176 int *valp)
4177{
4178 const char *p;
4179 p = snd_hda_get_hint(codec, key);
4180 if (p) {
4181 unsigned long val;
4182 if (!strict_strtoul(p, 0, &val)) {
4183 *valp = val;
4184 return 1;
4185 }
4186 }
4187 return 0;
4188}
4189
6565e4fa
TI		 4190/* override some hints from the hwdep entry */
4191static void stac_store_hints(struct hda_codec *codec)
4192{
4193 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4194 int val;
4195
4196 val = snd_hda_get_bool_hint(codec, "hp_detect");
4197 if (val >= 0)
4198 spec->hp_detect = val;
014c41fc 4199 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4200 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4201 spec->gpio_mask;
4202 }
014c41fc
TI		 4203 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4204 spec->gpio_mask &= spec->gpio_mask;
4205 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4206 spec->gpio_dir &= spec->gpio_mask;
4207 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4208 spec->eapd_mask &= spec->gpio_mask;
4209 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4210 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4211 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4212 if (val >= 0)
4213 spec->eapd_switch = val;
014c41fc
TI		 4214 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4215 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
043958e6
TI		 4216 spec->gpio_mask |= spec->gpio_led;
4217 spec->gpio_dir |= spec->gpio_led;
4218 if (spec->gpio_led_polarity)
4219 spec->gpio_data |= spec->gpio_led;
4220 }
6565e4fa
TI		 4221}
4222
c7d4b2fa
M		 4223static int stac92xx_init(struct hda_codec *codec)
4224{
4225 struct sigmatel_spec *spec = codec->spec;
82bc955f 4226 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4227 unsigned int gpio;
e4973e1e 4228 int i;
c7d4b2fa 4229
c7d4b2fa
M		 4230 snd_hda_sequence_write(codec, spec->init);
4231
8daaaa97
MR		 4232 /* power down adcs initially */
4233 if (spec->powerdown_adcs)
4234 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4235 snd_hda_codec_write(codec,
8daaaa97
MR		 4236 spec->adc_nids[i], 0,
4237 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4238
6565e4fa
TI		 4239 /* override some hints */
4240 stac_store_hints(codec);
4241
f73d3585
TI		 4242 /* set up GPIO */
4243 gpio = spec->gpio_data;
4244 /* turn on EAPD statically when spec->eapd_switch isn't set.
4245 * otherwise, unsol event will turn it on/off dynamically
4246 */
4247 if (!spec->eapd_switch)
4248 gpio |= spec->eapd_mask;
4249 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4250
82bc955f
TI		 4251 /* set up pins */
4252 if (spec->hp_detect) {
505cb341 4253 /* Enable unsolicited responses on the HP widget */
74aeaabc 4254 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4255 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4256 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4257 }
1c4bdf9b
TI		 4258 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4259 cfg->speaker_outs > 0) {
fefd67f3 4260 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4261 for (i = 0; i < cfg->line_outs; i++) {
4262 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4263 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4264 }
4265 }
4266
0a07acaf
TI		 4267 /* force to enable the first line-out; the others are set up
4268 * in unsol_event
4269 */
4270 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4271 AC_PINCTL_OUT_EN);
82bc955f 4272 /* fake event to set up pins */
5f380eb1
TI		 4273 if (cfg->hp_pins[0])
4274 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4275 else if (cfg->line_out_pins[0])
4276 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4277 } else {
4278 stac92xx_auto_init_multi_out(codec);
4279 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4280 for (i = 0; i < cfg->hp_outs; i++)
4281 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4282 }
3d21d3f7 4283 if (spec->auto_mic) {
15b4f296 4284 /* initialize connection to analog input */
da2a2aaa
TI		 4285 if (spec->dmux_nids)
4286 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4287 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4288 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4289 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4290 if (enable_pin_detect(codec, spec->dock_mic.pin,
4291 STAC_MIC_EVENT))
4292 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4293 }
eea7dc93
TI		 4294 for (i = 0; i < cfg->num_inputs; i++) {
4295 hda_nid_t nid = cfg->inputs[i].pin;
4296 int type = cfg->inputs[i].type;
4297 unsigned int pinctl, conf;
86e2959a 4298 if (type == AUTO_PIN_MIC) {
eea7dc93
TI		 4299 /* for mic pins, force to initialize */
4300 pinctl = stac92xx_get_default_vref(codec, nid);
4301 pinctl |= AC_PINCTL_IN_EN;
4302 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4303 } else {
4304 pinctl = snd_hda_codec_read(codec, nid, 0,
4305 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4306 /* if PINCTL already set then skip */
4307 /* Also, if both INPUT and OUTPUT are set,
4308 * it must be a BIOS bug; need to override, too
4309 */
4310 if (!(pinctl & AC_PINCTL_IN_EN) ||
4311 (pinctl & AC_PINCTL_OUT_EN)) {
4312 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4313 pinctl |= AC_PINCTL_IN_EN;
4314 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4315 }
c960a03b 4316 }
eea7dc93
TI		 4317 conf = snd_hda_codec_get_pincfg(codec, nid);
4318 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4319 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4320 stac_issue_unsol_event(codec, nid);
4321 }
82bc955f 4322 }
a64135a2
MR		 4323 for (i = 0; i < spec->num_dmics; i++)
4324 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4325 AC_PINCTL_IN_EN);
0852d7a6
TI		 4326 if (cfg->dig_out_pins[0])
4327 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4328 AC_PINCTL_OUT_EN);
4329 if (cfg->dig_in_pin)
4330 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4331 AC_PINCTL_IN_EN);
a64135a2 4332 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4333 hda_nid_t nid = spec->pwr_nids[i];
4334 int pinctl, def_conf;
f73d3585 4335
eb632128
TI		 4336 /* power on when no jack detection is available */
4337 if (!spec->hp_detect) {
4338 stac_toggle_power_map(codec, nid, 1);
4339 continue;
4340 }
4341
4342 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4343 continue; /* already has an unsol event */
4344
4345 pinctl = snd_hda_codec_read(codec, nid, 0,
4346 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4347 /* outputs are only ports capable of power management
4348 * any attempts on powering down a input port cause the
4349 * referenced VREF to act quirky.
4350 */
eb632128
TI		 4351 if (pinctl & AC_PINCTL_IN_EN) {
4352 stac_toggle_power_map(codec, nid, 1);
a64135a2 4353 continue;
eb632128 4354 }
330ee995 4355 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4356 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4357 /* skip any ports that don't have jacks since presence
4358 * detection is useless */
f73d3585
TI		 4359 if (def_conf != AC_JACK_PORT_COMPLEX) {
4360 if (def_conf != AC_JACK_PORT_NONE)
4361 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4362 continue;
f73d3585 4363 }
62558ce1
TI		 4364 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4365 stac_issue_unsol_event(codec, nid);
a64135a2 4366 }
c21bd025 4367
c21bd025 4368 /* sync mute LED */
9e5341b9
TI		 4369 if (spec->gpio_led)
4370 hda_call_check_power_status(codec, 0x01);
b76c850f
MR		 4371 if (spec->dac_list)
4372 stac92xx_power_down(codec);
c7d4b2fa
M		 4373 return 0;
4374}
4375
603c4019
TI		 4376static void stac92xx_free_kctls(struct hda_codec *codec)
4377{
4378 struct sigmatel_spec *spec = codec->spec;
4379
4380 if (spec->kctls.list) {
4381 struct snd_kcontrol_new *kctl = spec->kctls.list;
4382 int i;
4383 for (i = 0; i < spec->kctls.used; i++)
4384 kfree(kctl[i].name);
4385 }
4386 snd_array_free(&spec->kctls);
4387}
4388
167eae5a
TI		 4389static void stac92xx_shutup(struct hda_codec *codec)
4390{
4391 struct sigmatel_spec *spec = codec->spec;
167eae5a 4392
92ee6162 4393 snd_hda_shutup_pins(codec);
167eae5a
TI		 4394
4395 if (spec->eapd_mask)
4396 stac_gpio_set(codec, spec->gpio_mask,
4397 spec->gpio_dir, spec->gpio_data &
4398 ~spec->eapd_mask);
4399}
4400
2f2f4251
M		 4401static void stac92xx_free(struct hda_codec *codec)
4402{
c7d4b2fa 4403 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4404
4405 if (! spec)
4406 return;
4407
167eae5a 4408 stac92xx_shutup(codec);
cd372fb3 4409 snd_hda_input_jack_free(codec);
74aeaabc 4410 snd_array_free(&spec->events);
11b44bbd 4411
c7d4b2fa 4412 kfree(spec);
1cd2224c 4413 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4414}
4415
4e55096e
M		 4416static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4417 unsigned int flag)
4418{
8ce84198
TI		 4419 unsigned int old_ctl, pin_ctl;
4420
4421 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4422 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4423
f9acba43
TI		 4424 if (pin_ctl & AC_PINCTL_IN_EN) {
4425 /*
4426 * we need to check the current set-up direction of
4427 * shared input pins since they can be switched via
4428 * "xxx as Output" mixer switch
4429 */
4430 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4431 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4432 return;
4433 }
4434
8ce84198 4435 old_ctl = pin_ctl;
7b043899
SL		 4436 /* if setting pin direction bits, clear the current
4437 direction bits first */
4438 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4439 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4440
8ce84198
TI		 4441 pin_ctl |= flag;
4442 if (old_ctl != pin_ctl)
4443 snd_hda_codec_write_cache(codec, nid, 0,
4444 AC_VERB_SET_PIN_WIDGET_CONTROL,
4445 pin_ctl);
4e55096e
M		 4446}
4447
4448static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4449 unsigned int flag)
4450{
4451 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4452 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4453 if (pin_ctl & flag)
4454 snd_hda_codec_write_cache(codec, nid, 0,
4455 AC_VERB_SET_PIN_WIDGET_CONTROL,
4456 pin_ctl & ~flag);
4e55096e
M		 4457}
4458
d56757ab 4459static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4460{
4461 if (!nid)
4462 return 0;
a252c81a 4463 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4464}
4465
fefd67f3
TI		 4466static void stac92xx_line_out_detect(struct hda_codec *codec,
4467 int presence)
4468{
4469 struct sigmatel_spec *spec = codec->spec;
4470 struct auto_pin_cfg *cfg = &spec->autocfg;
4471 int i;
4472
4473 for (i = 0; i < cfg->line_outs; i++) {
4474 if (presence)
4475 break;
4476 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4477 if (presence) {
4478 unsigned int pinctl;
4479 pinctl = snd_hda_codec_read(codec,
4480 cfg->line_out_pins[i], 0,
4481 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4482 if (pinctl & AC_PINCTL_IN_EN)
4483 presence = 0; /* mic- or line-input */
4484 }
4485 }
4486
4487 if (presence) {
4488 /* disable speakers */
4489 for (i = 0; i < cfg->speaker_outs; i++)
4490 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4491 AC_PINCTL_OUT_EN);
4492 if (spec->eapd_mask && spec->eapd_switch)
4493 stac_gpio_set(codec, spec->gpio_mask,
4494 spec->gpio_dir, spec->gpio_data &
4495 ~spec->eapd_mask);
4496 } else {
4497 /* enable speakers */
4498 for (i = 0; i < cfg->speaker_outs; i++)
4499 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4500 AC_PINCTL_OUT_EN);
4501 if (spec->eapd_mask && spec->eapd_switch)
4502 stac_gpio_set(codec, spec->gpio_mask,
4503 spec->gpio_dir, spec->gpio_data |
4504 spec->eapd_mask);
4505 }
4506}
4507
d7a89436
TI		 4508/* return non-zero if the hp-pin of the given array index isn't
4509 * a jack-detection target
4510 */
4511static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4512{
4513 struct auto_pin_cfg *cfg = &spec->autocfg;
4514
4515 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4516 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4517 return 1;
c21ca4a8 4518 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4519 return 1;
4520 /* ignore if the pin is set as line-out */
4521 if (cfg->hp_pins[i] == spec->hp_switch)
4522 return 1;
4523 return 0;
4524}
4525
c6e4c666 4526static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4527{
4528 struct sigmatel_spec *spec = codec->spec;
4529 struct auto_pin_cfg *cfg = &spec->autocfg;
4530 int i, presence;
4531
eb06ed8f 4532 presence = 0;
4fe5195c
MR		 4533 if (spec->gpio_mute)
4534 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4535 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4536
eb06ed8f 4537 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4538 if (presence)
4539 break;
d7a89436
TI		 4540 if (no_hp_sensing(spec, i))
4541 continue;
e6e3ea25
TI		 4542 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4543 if (presence) {
4544 unsigned int pinctl;
4545 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4546 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4547 if (pinctl & AC_PINCTL_IN_EN)
4548 presence = 0; /* mic- or line-input */
4549 }
eb06ed8f 4550 }
4e55096e
M		 4551
4552 if (presence) {
d7a89436 4553 /* disable lineouts */
7c2ba97b 4554 if (spec->hp_switch)
d7a89436
TI		 4555 stac92xx_reset_pinctl(codec, spec->hp_switch,
4556 AC_PINCTL_OUT_EN);
4e55096e
M		 4557 for (i = 0; i < cfg->line_outs; i++)
4558 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4559 AC_PINCTL_OUT_EN);
4e55096e 4560 } else {
d7a89436 4561 /* enable lineouts */
7c2ba97b 4562 if (spec->hp_switch)
d7a89436
TI		 4563 stac92xx_set_pinctl(codec, spec->hp_switch,
4564 AC_PINCTL_OUT_EN);
4e55096e
M		 4565 for (i = 0; i < cfg->line_outs; i++)
4566 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4567 AC_PINCTL_OUT_EN);
4e55096e 4568 }
fefd67f3 4569 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4570 /* toggle hp outs */
4571 for (i = 0; i < cfg->hp_outs; i++) {
4572 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4573 if (no_hp_sensing(spec, i))
4574 continue;
4575 if (presence)
4576 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4577#if 0 /* FIXME */
4578/* Resetting the pinctl like below may lead to (a sort of) regressions
4579 * on some devices since they use the HP pin actually for line/speaker
4580 * outs although the default pin config shows a different pin (that is
4581 * wrong and useless).
4582 *
4583 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4584 * But, disabling the code below just works around it, and I'm too tired of
4585 * bug reports with such devices...
4586 */
d7a89436
TI		 4587 else
4588 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4589#endif /* FIXME */
d7a89436 4590 }
4e55096e
M		 4591}
4592
f73d3585
TI		 4593static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4594 int enable)
a64135a2
MR		 4595{
4596 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4597 unsigned int idx, val;
4598
4599 for (idx = 0; idx < spec->num_pwrs; idx++) {
4600 if (spec->pwr_nids[idx] == nid)
4601 break;
4602 }
4603 if (idx >= spec->num_pwrs)
4604 return;
d0513fc6
MR		 4605
4606 /* several codecs have two power down bits */
4607 if (spec->pwr_mapping)
4608 idx = spec->pwr_mapping[idx];
4609 else
4610 idx = 1 << idx;
a64135a2 4611
f73d3585
TI		 4612 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4613 if (enable)
a64135a2
MR		 4614 val &= ~idx;
4615 else
4616 val |= idx;
4617
4618 /* power down unused output ports */
4619 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4620}
4621
f73d3585
TI		 4622static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4623{
e6e3ea25 4624 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4625}
a64135a2 4626
ab5a6ebe
VK		 4627/* get the pin connection (fixed, none, etc) */
4628static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4629{
4630 struct sigmatel_spec *spec = codec->spec;
4631 unsigned int cfg;
4632
4633 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4634 return get_defcfg_connect(cfg);
4635}
4636
4637static int stac92xx_connected_ports(struct hda_codec *codec,
4638 hda_nid_t *nids, int num_nids)
4639{
4640 struct sigmatel_spec *spec = codec->spec;
4641 int idx, num;
4642 unsigned int def_conf;
4643
4644 for (num = 0; num < num_nids; num++) {
4645 for (idx = 0; idx < spec->num_pins; idx++)
4646 if (spec->pin_nids[idx] == nids[num])
4647 break;
4648 if (idx >= spec->num_pins)
4649 break;
4650 def_conf = stac_get_defcfg_connect(codec, idx);
4651 if (def_conf == AC_JACK_PORT_NONE)
4652 break;
4653 }
4654 return num;
4655}
4656
3d21d3f7
TI		 4657static void stac92xx_mic_detect(struct hda_codec *codec)
4658{
4659 struct sigmatel_spec *spec = codec->spec;
4660 struct sigmatel_mic_route *mic;
4661
4662 if (get_pin_presence(codec, spec->ext_mic.pin))
4663 mic = &spec->ext_mic;
9907790a
CC		 4664 else if (get_pin_presence(codec, spec->dock_mic.pin))
4665 mic = &spec->dock_mic;
3d21d3f7
TI		 4666 else
4667 mic = &spec->int_mic;
02d33322 4668 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4669 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4670 AC_VERB_SET_CONNECT_SEL,
4671 mic->dmux_idx);
02d33322 4672 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4673 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4674 AC_VERB_SET_CONNECT_SEL,
4675 mic->mux_idx);
4676}
4677
62558ce1 4678static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4679{
62558ce1 4680 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4681 if (!event)
4682 return;
4683 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4684}
4685
314634bc
TI		 4686static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4687{
a64135a2 4688 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4689 struct sigmatel_event *event;
4690 int tag, data;
a64135a2 4691
c6e4c666
TI		 4692 tag = (res >> 26) & 0x7f;
4693 event = stac_get_event_from_tag(codec, tag);
4694 if (!event)
4695 return;
4696
4697 switch (event->type) {
314634bc 4698 case STAC_HP_EVENT:
fefd67f3 4699 case STAC_LO_EVENT:
16ffe32c 4700 stac92xx_hp_detect(codec);
fefd67f3 4701 break;
3d21d3f7
TI		 4702 case STAC_MIC_EVENT:
4703 stac92xx_mic_detect(codec);
4704 break;
4705 }
4706
4707 switch (event->type) {
4708 case STAC_HP_EVENT:
fefd67f3 4709 case STAC_LO_EVENT:
3d21d3f7 4710 case STAC_MIC_EVENT:
74aeaabc 4711 case STAC_INSERT_EVENT:
a64135a2 4712 case STAC_PWR_EVENT:
c6e4c666
TI		 4713 if (spec->num_pwrs > 0)
4714 stac92xx_pin_sense(codec, event->nid);
cd372fb3 4715 snd_hda_input_jack_report(codec, event->nid);
fd60cc89
MR		 4716
4717 switch (codec->subsystem_id) {
4718 case 0x103c308f:
4719 if (event->nid == 0xb) {
4720 int pin = AC_PINCTL_IN_EN;
4721
4722 if (get_pin_presence(codec, 0xa)
4723 && get_pin_presence(codec, 0xb))
4724 pin |= AC_PINCTL_VREF_80;
4725 if (!get_pin_presence(codec, 0xb))
4726 pin |= AC_PINCTL_VREF_80;
4727
4728 /* toggle VREF state based on mic + hp pin
4729 * status
4730 */
4731 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4732 }
4733 }
72474be6 4734 break;
c6e4c666
TI		 4735 case STAC_VREF_EVENT:
4736 data = snd_hda_codec_read(codec, codec->afg, 0,
4737 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4738 /* toggle VREF state based on GPIOx status */
4739 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4740 !!(data & (1 << event->data)));
72474be6 4741 break;
314634bc
TI		 4742 }
4743}
4744
d38cce70
KG		 4745static int hp_blike_system(u32 subsystem_id);
4746
4747static void set_hp_led_gpio(struct hda_codec *codec)
4748{
4749 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4750 unsigned int gpio;
4751
26ebe0a2
TI		 4752 if (spec->gpio_led)
4753 return;
4754
07f80449
TI		 4755 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4756 gpio &= AC_GPIO_IO_COUNT;
4757 if (gpio > 3)
4758 spec->gpio_led = 0x08; /* GPIO 3 */
4759 else
4760 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4761}
4762
c357aab0
VK		 4763/*
4764 * This method searches for the mute LED GPIO configuration
4765 * provided as OEM string in SMBIOS. The format of that string
4766 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4767 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4768 * that corresponds to the NOT muted state of the master volume
4769 * and G is the index of the GPIO to use as the mute LED control (0..9)
4770 * If _G portion is missing it is assigned based on the codec ID
4771 *
4772 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4773 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4774 *
4775 *
4776 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4777 * SMBIOS - at least the ones I have seen do not have them - which include
4778 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4779 * HP Pavilion dv9500t CTO.
4780 * Need more information on whether it is true across the entire series.
4781 * -- kunal
c357aab0 4782 */
dce17d4f 4783static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4784{
4785 struct sigmatel_spec *spec = codec->spec;
4786 const struct dmi_device *dev = NULL;
4787
4788 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4789 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4790 NULL, dev))) {
4791 if (sscanf(dev->name, "HP_Mute_LED_%d_%d",
d38cce70
KG		 4792 &spec->gpio_led_polarity,
4793 &spec->gpio_led) == 2) {
c357aab0
VK		 4794 spec->gpio_led = 1 << spec->gpio_led;
4795 return 1;
4796 }
4797 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4798 &spec->gpio_led_polarity) == 1) {
4799 set_hp_led_gpio(codec);
4800 return 1;
c357aab0
VK		 4801 }
4802 }
d38cce70
KG		 4803
4804 /*
4805 * Fallback case - if we don't find the DMI strings,
4806 * we statically set the GPIO - if not a B-series system.
4807 */
4808 if (!hp_blike_system(codec->subsystem_id)) {
4809 set_hp_led_gpio(codec);
dce17d4f 4810 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4811 return 1;
4812 }
c357aab0
VK		 4813 }
4814 return 0;
4815}
4816
4817static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4818{
4819 switch (subsystem_id) {
c357aab0
VK		 4820 case 0x103c1520:
4821 case 0x103c1521:
4822 case 0x103c1523:
4823 case 0x103c1524:
4824 case 0x103c1525:
78987bdc
RD		 4825 case 0x103c1722:
4826 case 0x103c1723:
4827 case 0x103c1724:
4828 case 0x103c1725:
4829 case 0x103c1726:
4830 case 0x103c1727:
4831 case 0x103c1728:
4832 case 0x103c1729:
c357aab0
VK		 4833 case 0x103c172a:
4834 case 0x103c172b:
4835 case 0x103c307e:
4836 case 0x103c307f:
4837 case 0x103c3080:
4838 case 0x103c3081:
4839 case 0x103c7007:
4840 case 0x103c7008:
78987bdc
RD		 4841 return 1;
4842 }
4843 return 0;
4844}
4845
2d34e1b3
TI		 4846#ifdef CONFIG_PROC_FS
4847static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4848 struct hda_codec *codec, hda_nid_t nid)
4849{
4850 if (nid == codec->afg)
4851 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4852 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4853}
4854
4855static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4856 struct hda_codec *codec,
4857 unsigned int verb)
4858{
4859 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4860 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4861}
4862
4863/* stac92hd71bxx, stac92hd73xx */
4864static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4865 struct hda_codec *codec, hda_nid_t nid)
4866{
4867 stac92hd_proc_hook(buffer, codec, nid);
4868 if (nid == codec->afg)
4869 analog_loop_proc_hook(buffer, codec, 0xfa0);
4870}
4871
4872static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4873 struct hda_codec *codec, hda_nid_t nid)
4874{
4875 if (nid == codec->afg)
4876 analog_loop_proc_hook(buffer, codec, 0xfe0);
4877}
4878
4879static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4880 struct hda_codec *codec, hda_nid_t nid)
4881{
4882 if (nid == codec->afg)
4883 analog_loop_proc_hook(buffer, codec, 0xfeb);
4884}
4885#else
4886#define stac92hd_proc_hook NULL
4887#define stac92hd7x_proc_hook NULL
4888#define stac9205_proc_hook NULL
4889#define stac927x_proc_hook NULL
4890#endif
4891
cb53c626 4892#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4893static int stac92xx_resume(struct hda_codec *codec)
4894{
dc81bed1
TI		 4895 struct sigmatel_spec *spec = codec->spec;
4896
2c885878 4897 stac92xx_init(codec);
82beb8fd
TI		 4898 snd_hda_codec_resume_amp(codec);
4899 snd_hda_codec_resume_cache(codec);
2c885878 4900 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 4901 if (spec->hp_detect) {
4902 if (spec->autocfg.hp_pins[0])
4903 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4904 else if (spec->autocfg.line_out_pins[0])
4905 stac_issue_unsol_event(codec,
4906 spec->autocfg.line_out_pins[0]);
4907 }
c21bd025 4908 /* sync mute LED */
9e5341b9
TI		 4909 if (spec->gpio_led)
4910 hda_call_check_power_status(codec, 0x01);
ff6fdc37
M		 4911 return 0;
4912}
c6798d2b 4913
ae6241fb 4914/*
514bf54c 4915 * using power check for controlling mute led of HP notebooks
ae6241fb
CP		 4916 * check for mute state only on Speakers (nid = 0x10)
4917 *
4918 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4919 * the LED is NOT working properly !
514bf54c
JG		 4920 *
4921 * Changed name to reflect that it now works for any designated
4922 * model, not just HP HDX.
ae6241fb
CP		 4923 */
4924
4925#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4926static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4927 hda_nid_t nid)
ae6241fb
CP		 4928{
4929 struct sigmatel_spec *spec = codec->spec;
c21bd025 4930 int i, muted = 1;
6fce61ae 4931
c21bd025
TI		 4932 for (i = 0; i < spec->multiout.num_dacs; i++) {
4933 nid = spec->multiout.dac_nids[i];
4934 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
4935 HDA_AMP_MUTE)) {
4936 muted = 0; /* something heard */
4937 break;
5bdaaada 4938 }
ae6241fb 4939 }
c21bd025
TI		 4940 if (muted)
4941 spec->gpio_data &= ~spec->gpio_led; /* orange */
4942 else
4943 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 4944
c21bd025
TI		 4945 if (!spec->gpio_led_polarity) {
4946 /* LED state is inverted on these systems */
4947 spec->gpio_data ^= spec->gpio_led;
4948 }
b4e81876 4949
b4e81876 4950 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
b4e81876
TI		 4951 return 0;
4952}
ae6241fb
CP		 4953#endif
4954
c6798d2b
MR		 4955static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4956{
167eae5a 4957 stac92xx_shutup(codec);
c6798d2b
MR		 4958 return 0;
4959}
ff6fdc37
M		 4960#endif
4961
2f2f4251
M		 4962static struct hda_codec_ops stac92xx_patch_ops = {
4963 .build_controls = stac92xx_build_controls,
4964 .build_pcms = stac92xx_build_pcms,
4965 .init = stac92xx_init,
4966 .free = stac92xx_free,
4e55096e 4967 .unsol_event = stac92xx_unsol_event,
cb53c626 4968#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4969 .suspend = stac92xx_suspend,
ff6fdc37
M		 4970 .resume = stac92xx_resume,
4971#endif
fb8d1a34 4972 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 4973};
4974
4975static int patch_stac9200(struct hda_codec *codec)
4976{
4977 struct sigmatel_spec *spec;
c7d4b2fa 4978 int err;
2f2f4251 4979
e560d8d8 4980 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4981 if (spec == NULL)
4982 return -ENOMEM;
4983
a252c81a 4984 codec->no_trigger_sense = 1;
2f2f4251 4985 codec->spec = spec;
1b0e372d 4986 spec->linear_tone_beep = 1;
a4eed138 4987 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4988 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4989 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4990 stac9200_models,
4991 stac9200_cfg_tbl);
330ee995 4992 if (spec->board_config < 0)
9a11f1aa
TI		 4993 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4994 codec->chip_name);
330ee995
TI		 4995 else
4996 stac92xx_set_config_regs(codec,
af9f341a 4997 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 4998
4999 spec->multiout.max_channels = 2;
5000 spec->multiout.num_dacs = 1;
5001 spec->multiout.dac_nids = stac9200_dac_nids;
5002 spec->adc_nids = stac9200_adc_nids;
5003 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5004 spec->num_muxes = 1;
8b65727b 5005 spec->num_dmics = 0;
9e05b7a3 5006 spec->num_adcs = 1;
a64135a2 5007 spec->num_pwrs = 0;
c7d4b2fa 5008
58eec423
MCC		 5009 if (spec->board_config == STAC_9200_M4 ||
5010 spec->board_config == STAC_9200_M4_2 ||
bf277785 5011 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5012 spec->init = stac9200_eapd_init;
5013 else
5014 spec->init = stac9200_core_init;
2f2f4251 5015 spec->mixer = stac9200_mixer;
c7d4b2fa 5016
117f257d
TI		 5017 if (spec->board_config == STAC_9200_PANASONIC) {
5018 spec->gpio_mask = spec->gpio_dir = 0x09;
5019 spec->gpio_data = 0x00;
5020 }
5021
c7d4b2fa
M		 5022 err = stac9200_parse_auto_config(codec);
5023 if (err < 0) {
5024 stac92xx_free(codec);
5025 return err;
5026 }
2f2f4251 5027
2acc9dcb
TI		 5028 /* CF-74 has no headphone detection, and the driver should *NOT*
5029 * do detection and HP/speaker toggle because the hardware does it.
5030 */
5031 if (spec->board_config == STAC_9200_PANASONIC)
5032 spec->hp_detect = 0;
5033
2f2f4251
M		 5034 codec->patch_ops = stac92xx_patch_ops;
5035
5036 return 0;
5037}
5038
8e21c34c
TD		 5039static int patch_stac925x(struct hda_codec *codec)
5040{
5041 struct sigmatel_spec *spec;
5042 int err;
5043
5044 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5045 if (spec == NULL)
5046 return -ENOMEM;
5047
a252c81a 5048 codec->no_trigger_sense = 1;
8e21c34c 5049 codec->spec = spec;
1b0e372d 5050 spec->linear_tone_beep = 1;
a4eed138 5051 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5052 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5053
5054 /* Check first for codec ID */
5055 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5056 STAC_925x_MODELS,
5057 stac925x_models,
5058 stac925x_codec_id_cfg_tbl);
5059
5060 /* Now checks for PCI ID, if codec ID is not found */
5061 if (spec->board_config < 0)
5062 spec->board_config = snd_hda_check_board_config(codec,
5063 STAC_925x_MODELS,
8e21c34c
TD		 5064 stac925x_models,
5065 stac925x_cfg_tbl);
9e507abd 5066 again:
330ee995 5067 if (spec->board_config < 0)
9a11f1aa
TI		 5068 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5069 codec->chip_name);
330ee995
TI		 5070 else
5071 stac92xx_set_config_regs(codec,
af9f341a 5072 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5073
5074 spec->multiout.max_channels = 2;
5075 spec->multiout.num_dacs = 1;
5076 spec->multiout.dac_nids = stac925x_dac_nids;
5077 spec->adc_nids = stac925x_adc_nids;
5078 spec->mux_nids = stac925x_mux_nids;
5079 spec->num_muxes = 1;
9e05b7a3 5080 spec->num_adcs = 1;
a64135a2 5081 spec->num_pwrs = 0;
2c11f955
TD		 5082 switch (codec->vendor_id) {
5083 case 0x83847632: /* STAC9202 */
5084 case 0x83847633: /* STAC9202D */
5085 case 0x83847636: /* STAC9251 */
5086 case 0x83847637: /* STAC9251D */
f6e9852a 5087 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5088 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5089 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5090 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5091 break;
5092 default:
5093 spec->num_dmics = 0;
5094 break;
5095 }
8e21c34c
TD		 5096
5097 spec->init = stac925x_core_init;
5098 spec->mixer = stac925x_mixer;
6479c631
TI		 5099 spec->num_caps = 1;
5100 spec->capvols = stac925x_capvols;
5101 spec->capsws = stac925x_capsws;
8e21c34c
TD		 5102
5103 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 5104 if (!err) {
5105 if (spec->board_config < 0) {
5106 printk(KERN_WARNING "hda_codec: No auto-config is "
5107 "available, default to model=ref\n");
5108 spec->board_config = STAC_925x_REF;
5109 goto again;
5110 }
5111 err = -EINVAL;
5112 }
8e21c34c
TD		 5113 if (err < 0) {
5114 stac92xx_free(codec);
5115 return err;
5116 }
5117
5118 codec->patch_ops = stac92xx_patch_ops;
5119
5120 return 0;
5121}
5122
e1f0d669
MR		 5123static int patch_stac92hd73xx(struct hda_codec *codec)
5124{
5125 struct sigmatel_spec *spec;
5126 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5127 int err = 0;
c21ca4a8 5128 int num_dacs;
e1f0d669
MR		 5129
5130 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5131 if (spec == NULL)
5132 return -ENOMEM;
5133
a252c81a 5134 codec->no_trigger_sense = 1;
e1f0d669 5135 codec->spec = spec;
1b0e372d 5136 spec->linear_tone_beep = 0;
e99d32b3 5137 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5138 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5139 spec->pin_nids = stac92hd73xx_pin_nids;
5140 spec->board_config = snd_hda_check_board_config(codec,
5141 STAC_92HD73XX_MODELS,
5142 stac92hd73xx_models,
5143 stac92hd73xx_cfg_tbl);
842ae638
TI		 5144 /* check codec subsystem id if not found */
5145 if (spec->board_config < 0)
5146 spec->board_config =
5147 snd_hda_check_board_codec_sid_config(codec,
5148 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5149 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5150again:
330ee995 5151 if (spec->board_config < 0)
9a11f1aa
TI		 5152 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5153 codec->chip_name);
330ee995
TI		 5154 else
5155 stac92xx_set_config_regs(codec,
af9f341a 5156 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5157
c21ca4a8 5158 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5159 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5160
c21ca4a8 5161 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5162 printk(KERN_WARNING "hda_codec: Could not determine "
5163 "number of channels defaulting to DAC count\n");
c21ca4a8 5164 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5165 }
e2aec171 5166 spec->init = stac92hd73xx_core_init;
c21ca4a8 5167 switch (num_dacs) {
e1f0d669 5168 case 0x3: /* 6 Channel */
d78d7a90 5169 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5170 break;
5171 case 0x4: /* 8 Channel */
d78d7a90 5172 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5173 break;
5174 case 0x5: /* 10 Channel */
d78d7a90
TI		 5175 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5176 break;
c21ca4a8
TI		 5177 }
5178 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5179
e1f0d669
MR		 5180 spec->aloopback_mask = 0x01;
5181 spec->aloopback_shift = 8;
5182
1cd2224c 5183 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5184 spec->mux_nids = stac92hd73xx_mux_nids;
5185 spec->adc_nids = stac92hd73xx_adc_nids;
5186 spec->dmic_nids = stac92hd73xx_dmic_nids;
5187 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5188 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5189
5190 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5191 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5192 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5193
6479c631
TI		 5194 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5195 spec->capvols = stac92hd73xx_capvols;
5196 spec->capsws = stac92hd73xx_capsws;
5197
a7662640 5198 switch (spec->board_config) {
6b3ab21e 5199 case STAC_DELL_EQ:
d654a660 5200 spec->init = dell_eq_core_init;
6b3ab21e 5201 /* fallthru */
661cd8fb
TI		 5202 case STAC_DELL_M6_AMIC:
5203 case STAC_DELL_M6_DMIC:
5204 case STAC_DELL_M6_BOTH:
2a9c7816 5205 spec->num_smuxes = 0;
c0cea0d0 5206 spec->eapd_switch = 0;
6b3ab21e 5207
661cd8fb
TI		 5208 switch (spec->board_config) {
5209 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5210 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5211 spec->num_dmics = 0;
5212 break;
661cd8fb 5213 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5214 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5215 spec->num_dmics = 1;
5216 break;
661cd8fb 5217 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5218 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5219 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5220 spec->num_dmics = 1;
5221 break;
5222 }
5223 break;
842ae638
TI		 5224 case STAC_ALIENWARE_M17X:
5225 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5226 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5227 spec->eapd_switch = 0;
5228 break;
a7662640
MR		 5229 default:
5230 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5231 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5232 spec->eapd_switch = 1;
5207e10e 5233 break;
a7662640 5234 }
af6ee302 5235 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5236 /* GPIO0 High = Enable EAPD */
5237 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5238 spec->gpio_data = 0x01;
5239 }
a7662640 5240
a64135a2
MR		 5241 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5242 spec->pwr_nids = stac92hd73xx_pwr_nids;
5243
d9737751 5244 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 5245
5246 if (!err) {
5247 if (spec->board_config < 0) {
5248 printk(KERN_WARNING "hda_codec: No auto-config is "
5249 "available, default to model=ref\n");
5250 spec->board_config = STAC_92HD73XX_REF;
5251 goto again;
5252 }
5253 err = -EINVAL;
5254 }
5255
5256 if (err < 0) {
5257 stac92xx_free(codec);
5258 return err;
5259 }
5260
9e43f0de
TI		 5261 if (spec->board_config == STAC_92HD73XX_NO_JD)
5262 spec->hp_detect = 0;
5263
e1f0d669
MR		 5264 codec->patch_ops = stac92xx_patch_ops;
5265
2d34e1b3
TI		 5266 codec->proc_widget_hook = stac92hd7x_proc_hook;
5267
e1f0d669
MR		 5268 return 0;
5269}
5270
cbbf50b2 5271static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5272{
5273 if (codec->vendor_id != 0x111d7605 &&
5274 codec->vendor_id != 0x111d76d1)
5275 return 0;
5276
5277 switch (codec->subsystem_id) {
5278 case 0x103c1618:
5279 case 0x103c1619:
5280 case 0x103c161a:
5281 case 0x103c161b:
5282 case 0x103c161c:
5283 case 0x103c161d:
5284 case 0x103c161e:
5285 case 0x103c161f:
335e3b86
VK		 5286
5287 case 0x103c162a:
5288 case 0x103c162b:
5289
5290 case 0x103c1630:
5291 case 0x103c1631:
5292
5293 case 0x103c1633:
cbbf50b2 5294 case 0x103c1634:
335e3b86
VK		 5295 case 0x103c1635:
5296
335e3b86
VK		 5297 case 0x103c3587:
5298 case 0x103c3588:
5299 case 0x103c3589:
5300 case 0x103c358a:
5301
5302 case 0x103c3667:
5303 case 0x103c3668:
cbbf50b2
VK		 5304 case 0x103c3669:
5305
5306 return 1;
335e3b86
VK		 5307 }
5308 return 0;
5309}
5310
d0513fc6
MR		 5311static int patch_stac92hd83xxx(struct hda_codec *codec)
5312{
5313 struct sigmatel_spec *spec;
65557f35 5314 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5315 int err;
65557f35 5316 int num_dacs;
d0513fc6
MR		 5317
5318 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5319 if (spec == NULL)
5320 return -ENOMEM;
5321
cbbf50b2
VK		 5322 if (hp_bnb2011_with_dock(codec)) {
5323 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5324 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5325 }
5326
1cc9e8f4
C		 5327 /* reset pin power-down; Windows may leave these bits after reboot */
5328 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0);
5329 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
a252c81a 5330 codec->no_trigger_sense = 1;
d0513fc6 5331 codec->spec = spec;
1db7ccdb 5332 spec->linear_tone_beep = 0;
0ffa9807 5333 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5334 spec->digbeep_nid = 0x21;
ab5a6ebe
VK		 5335 spec->dmic_nids = stac92hd83xxx_dmic_nids;
5336 spec->dmux_nids = stac92hd83xxx_mux_nids;
667067d8
TI		 5337 spec->mux_nids = stac92hd83xxx_mux_nids;
5338 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5339 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5340 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR		 5341 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5342 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5343 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5344 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR		 5345
5346 spec->init = stac92hd83xxx_core_init;
d0513fc6 5347 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5348 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI		 5349 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5350 spec->capvols = stac92hd83xxx_capvols;
5351 spec->capsws = stac92hd83xxx_capsws;
5352
d0513fc6
MR		 5353 spec->board_config = snd_hda_check_board_config(codec,
5354 STAC_92HD83XXX_MODELS,
5355 stac92hd83xxx_models,
5356 stac92hd83xxx_cfg_tbl);
5357again:
330ee995 5358 if (spec->board_config < 0)
9a11f1aa
TI		 5359 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5360 codec->chip_name);
330ee995
TI		 5361 else
5362 stac92xx_set_config_regs(codec,
af9f341a 5363 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5364
32ed3f46 5365 switch (codec->vendor_id) {
89feca1a
DH		 5366 case 0x111d76d1:
5367 case 0x111d76d9:
4dfb8a45 5368 case 0x111d76e5:
89feca1a
DH		 5369 spec->dmic_nids = stac92hd87b_dmic_nids;
5370 spec->num_dmics = stac92xx_connected_ports(codec,
5371 stac92hd87b_dmic_nids,
5372 STAC92HD87B_NUM_DMICS);
4dfb8a45
VK		 5373 spec->num_pins = ARRAY_SIZE(stac92hd87xxx_pin_nids);
5374 spec->pin_nids = stac92hd87xxx_pin_nids;
bdfe6f45
DH		 5375 spec->mono_nid = 0;
5376 spec->num_pwrs = 0;
5377 break;
36706005
CC		 5378 case 0x111d7666:
5379 case 0x111d7667:
5380 case 0x111d7668:
5381 case 0x111d7669:
4dfb8a45 5382 case 0x111d76e3:
bdfe6f45
DH		 5383 spec->num_dmics = stac92xx_connected_ports(codec,
5384 stac92hd88xxx_dmic_nids,
5385 STAC92HD88XXX_NUM_DMICS);
36706005
CC		 5386 spec->num_pins = ARRAY_SIZE(stac92hd88xxx_pin_nids);
5387 spec->pin_nids = stac92hd88xxx_pin_nids;
5388 spec->mono_nid = 0;
36706005
CC		 5389 spec->num_pwrs = 0;
5390 break;
32ed3f46 5391 case 0x111d7604:
a9694faa 5392 case 0x111d76d4:
32ed3f46 5393 case 0x111d7605:
ff2e7337 5394 case 0x111d76d5:
ab5a6ebe 5395 case 0x111d76e7:
32ed3f46
MR		 5396 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5397 break;
5398 spec->num_pwrs = 0;
ab5a6ebe
VK		 5399 spec->num_dmics = stac92xx_connected_ports(codec,
5400 stac92hd83xxx_dmic_nids,
5401 STAC92HD83XXX_NUM_DMICS);
32ed3f46
MR		 5402 break;
5403 }
5404
b4e81876
TI		 5405 codec->patch_ops = stac92xx_patch_ops;
5406
dce17d4f 5407 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK		 5408 snd_printd("mute LED gpio %d polarity %d\n",
5409 spec->gpio_led,
5410 spec->gpio_led_polarity);
5411
b4e81876
TI		 5412#ifdef CONFIG_SND_HDA_POWER_SAVE
5413 if (spec->gpio_led) {
5414 spec->gpio_mask |= spec->gpio_led;
5415 spec->gpio_dir |= spec->gpio_led;
5416 spec->gpio_data |= spec->gpio_led;
5417 /* register check_power_status callback. */
5418 codec->patch_ops.check_power_status =
c21bd025 5419 stac92xx_hp_check_power_status;
b4e81876
TI		 5420 }
5421#endif
5422
d0513fc6
MR		 5423 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5424 if (!err) {
5425 if (spec->board_config < 0) {
5426 printk(KERN_WARNING "hda_codec: No auto-config is "
5427 "available, default to model=ref\n");
5428 spec->board_config = STAC_92HD83XXX_REF;
5429 goto again;
5430 }
5431 err = -EINVAL;
5432 }
5433
5434 if (err < 0) {
5435 stac92xx_free(codec);
5436 return err;
5437 }
5438
04b5efe5
CC		 5439 /* docking output support */
5440 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5441 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC		 5442 /* skip non-DAC connections */
5443 while (num_dacs >= 0 &&
5444 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5445 != AC_WID_AUD_OUT))
5446 num_dacs--;
5447 /* set port E and F to select the last DAC */
5448 if (num_dacs >= 0) {
5449 snd_hda_codec_write_cache(codec, 0xE, 0,
5450 AC_VERB_SET_CONNECT_SEL, num_dacs);
5451 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5452 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5453 }
8bb0ac55 5454
2d34e1b3
TI		 5455 codec->proc_widget_hook = stac92hd_proc_hook;
5456
d0513fc6
MR		 5457 return 0;
5458}
5459
6df703ae
HRK		 5460static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5461 hda_nid_t dig0pin)
5462{
5463 struct sigmatel_spec *spec = codec->spec;
5464 int idx;
5465
5466 for (idx = 0; idx < spec->num_pins; idx++)
5467 if (spec->pin_nids[idx] == dig0pin)
5468 break;
5469 if ((idx + 2) >= spec->num_pins)
5470 return 0;
5471
5472 /* dig1pin case */
330ee995 5473 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5474 return 2;
5475
5476 /* dig0pin + dig2pin case */
330ee995 5477 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5478 return 2;
330ee995 5479 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5480 return 1;
5481 else
5482 return 0;
5483}
5484
75d1aeb9
TI		 5485/* HP dv7 bass switch - GPIO5 */
5486#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5487static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5488 struct snd_ctl_elem_value *ucontrol)
5489{
5490 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5491 struct sigmatel_spec *spec = codec->spec;
5492 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5493 return 0;
5494}
5495
5496static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5497 struct snd_ctl_elem_value *ucontrol)
5498{
5499 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5500 struct sigmatel_spec *spec = codec->spec;
5501 unsigned int gpio_data;
5502
5503 gpio_data = (spec->gpio_data & ~0x20) |
5504 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5505 if (gpio_data == spec->gpio_data)
5506 return 0;
5507 spec->gpio_data = gpio_data;
5508 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5509 return 1;
5510}
5511
5512static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
5513 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5514 .info = stac_hp_bass_gpio_info,
5515 .get = stac_hp_bass_gpio_get,
5516 .put = stac_hp_bass_gpio_put,
5517};
5518
5519static int stac_add_hp_bass_switch(struct hda_codec *codec)
5520{
5521 struct sigmatel_spec *spec = codec->spec;
5522
5523 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5524 "Bass Speaker Playback Switch", 0))
5525 return -ENOMEM;
5526
5527 spec->gpio_mask |= 0x20;
5528 spec->gpio_dir |= 0x20;
5529 spec->gpio_data |= 0x20;
5530 return 0;
5531}
5532
e035b841
MR		 5533static int patch_stac92hd71bxx(struct hda_codec *codec)
5534{
5535 struct sigmatel_spec *spec;
ca8d33fc 5536 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5537 unsigned int pin_cfg;
e035b841
MR		 5538 int err = 0;
5539
5540 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5541 if (spec == NULL)
5542 return -ENOMEM;
5543
a252c81a 5544 codec->no_trigger_sense = 1;
e035b841 5545 codec->spec = spec;
1b0e372d 5546 spec->linear_tone_beep = 0;
8daaaa97 5547 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5548 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5549 switch (codec->vendor_id) {
5550 case 0x111d76b6:
5551 case 0x111d76b7:
5552 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5553 break;
5554 case 0x111d7603:
5555 case 0x111d7608:
5556 /* On 92HD75Bx 0x27 isn't a pin nid */
5557 spec->num_pins--;
5558 /* fallthrough */
5559 default:
5560 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5561 }
aafc4412 5562 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5563 spec->board_config = snd_hda_check_board_config(codec,
5564 STAC_92HD71BXX_MODELS,
5565 stac92hd71bxx_models,
5566 stac92hd71bxx_cfg_tbl);
5567again:
330ee995 5568 if (spec->board_config < 0)
9a11f1aa
TI		 5569 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5570 codec->chip_name);
330ee995
TI		 5571 else
5572 stac92xx_set_config_regs(codec,
af9f341a 5573 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5574
fc64b26c 5575 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5576 /* GPIO0 = EAPD */
5577 spec->gpio_mask = 0x01;
5578 spec->gpio_dir = 0x01;
5579 spec->gpio_data = 0x01;
5580 }
5581
6df703ae
HRK		 5582 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5583 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5584
6479c631
TI		 5585 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5586 spec->capvols = stac92hd71bxx_capvols;
5587 spec->capsws = stac92hd71bxx_capsws;
5588
541eee87
MR		 5589 switch (codec->vendor_id) {
5590 case 0x111d76b6: /* 4 Port without Analog Mixer */
5591 case 0x111d76b7:
23c7b521
HRK		 5592 unmute_init++;
5593 /* fallthru */
541eee87
MR		 5594 case 0x111d76b4: /* 6 Port without Analog Mixer */
5595 case 0x111d76b5:
541eee87 5596 spec->init = stac92hd71bxx_core_init;
0ffa9807 5597 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5598 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5599 stac92hd71bxx_dmic_nids,
5600 STAC92HD71BXX_NUM_DMICS);
541eee87 5601 break;
aafc4412 5602 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5603 switch (spec->board_config) {
5604 case STAC_HP_M4:
72474be6 5605 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5606 err = stac_add_event(spec, codec->afg,
5607 STAC_VREF_EVENT, 0x02);
5608 if (err < 0)
5609 return err;
c5d08bb5 5610 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5611 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5612 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5613 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5614 AC_USRSP_EN | err);
72474be6
MR		 5615 spec->gpio_mask |= 0x02;
5616 break;
5617 }
8daaaa97 5618 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5619 (codec->revision_id & 0xf) == 1)
8daaaa97 5620 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5621
aafc4412
MR		 5622 /* no output amps */
5623 spec->num_pwrs = 0;
aafc4412 5624 /* disable VSW */
26a27980 5625 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5626 unmute_init++;
330ee995
TI		 5627 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5628 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae 5629 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
ab5a6ebe 5630 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5631 stac92hd71bxx_dmic_nids,
5632 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5633 break;
5634 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5635 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5636 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5637
aafc4412
MR		 5638 /* no output amps */
5639 spec->num_pwrs = 0;
5640 /* fallthru */
541eee87 5641 default:
26a27980 5642 spec->init = stac92hd71bxx_core_init;
0ffa9807 5643 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5644 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5645 stac92hd71bxx_dmic_nids,
5646 STAC92HD71BXX_NUM_DMICS);
5207e10e 5647 break;
541eee87
MR		 5648 }
5649
ca8d33fc
MR		 5650 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5651 snd_hda_sequence_write_cache(codec, unmute_init);
5652
b20f3b83
TI		 5653 /* Some HP machines seem to have unstable codec communications
5654 * especially with ATI fglrx driver. For recovering from the
5655 * CORB/RIRB stall, allow the BUS reset and keep always sync
5656 */
5657 if (spec->board_config == STAC_HP_DV5) {
5658 codec->bus->sync_write = 1;
5659 codec->bus->allow_bus_reset = 1;
5660 }
5661
d78d7a90 5662 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5663 spec->aloopback_mask = 0x50;
541eee87
MR		 5664 spec->aloopback_shift = 0;
5665
8daaaa97 5666 spec->powerdown_adcs = 1;
1cd2224c 5667 spec->digbeep_nid = 0x26;
e035b841
MR		 5668 spec->mux_nids = stac92hd71bxx_mux_nids;
5669 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5670 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5671 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5672
5673 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5674 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5675 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5676 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5677
d38cce70
KG		 5678 snd_printdd("Found board config: %d\n", spec->board_config);
5679
6a14f585
MR		 5680 switch (spec->board_config) {
5681 case STAC_HP_M4:
6a14f585 5682 /* enable internal microphone */
330ee995 5683 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5684 stac92xx_auto_set_pinctl(codec, 0x0e,
5685 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5686 /* fallthru */
5687 case STAC_DELL_M4_2:
5688 spec->num_dmics = 0;
5689 spec->num_smuxes = 0;
5690 spec->num_dmuxes = 0;
5691 break;
5692 case STAC_DELL_M4_1:
5693 case STAC_DELL_M4_3:
5694 spec->num_dmics = 1;
5695 spec->num_smuxes = 0;
ea18aa46 5696 spec->num_dmuxes = 1;
6a14f585 5697 break;
514bf54c
JG		 5698 case STAC_HP_DV4_1222NR:
5699 spec->num_dmics = 1;
5700 /* I don't know if it needs 1 or 2 smuxes - will wait for
5701 * bug reports to fix if needed
5702 */
5703 spec->num_smuxes = 1;
5704 spec->num_dmuxes = 1;
514bf54c 5705 /* fallthrough */
2a6ce6e5
TI		 5706 case STAC_HP_DV4:
5707 spec->gpio_led = 0x01;
5708 /* fallthrough */
e2ea57a8 5709 case STAC_HP_DV5:
330ee995 5710 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5711 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5712 /* HP dv6 gives the headphone pin as a line-out. Thus we
5713 * need to set hp_detect flag here to force to enable HP
5714 * detection.
5715 */
5716 spec->hp_detect = 1;
e2ea57a8 5717 break;
ae6241fb
CP		 5718 case STAC_HP_HDX:
5719 spec->num_dmics = 1;
5720 spec->num_dmuxes = 1;
5721 spec->num_smuxes = 1;
26ebe0a2 5722 spec->gpio_led = 0x08;
86d190e7
TI		 5723 break;
5724 }
443e26d0 5725
c357aab0 5726 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5727 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5728 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5729 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5730 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5731 /* It was changed in the BIOS to just satisfy MS DTM.
5732 * Lets turn it back into slaved HP
5733 */
5734 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5735 | (AC_JACK_HP_OUT <<
5736 AC_DEFCFG_DEVICE_SHIFT);
5737 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5738 | AC_DEFCFG_SEQUENCE)))
5739 | 0x1f;
5740 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5741 }
5742 }
5743
dce17d4f 5744 if (find_mute_led_gpio(codec, 1))
c357aab0
VK		 5745 snd_printd("mute LED gpio %d polarity %d\n",
5746 spec->gpio_led,
5747 spec->gpio_led_polarity);
5bdaaada 5748
86d190e7
TI		 5749#ifdef CONFIG_SND_HDA_POWER_SAVE
5750 if (spec->gpio_led) {
5751 spec->gpio_mask |= spec->gpio_led;
5752 spec->gpio_dir |= spec->gpio_led;
5753 spec->gpio_data |= spec->gpio_led;
443e26d0 5754 /* register check_power_status callback. */
6fce61ae 5755 codec->patch_ops.check_power_status =
86d190e7
TI		 5756 stac92xx_hp_check_power_status;
5757 }
443e26d0 5758#endif
6a14f585 5759
c21ca4a8 5760 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5761
29d4ab4d 5762 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR		 5763 if (!err) {
5764 if (spec->board_config < 0) {
5765 printk(KERN_WARNING "hda_codec: No auto-config is "
5766 "available, default to model=ref\n");
5767 spec->board_config = STAC_92HD71BXX_REF;
5768 goto again;
5769 }
5770 err = -EINVAL;
5771 }
5772
5773 if (err < 0) {
5774 stac92xx_free(codec);
5775 return err;
5776 }
5777
75d1aeb9 5778 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5779 if (spec->board_config == STAC_HP_DV4 ||
5780 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5781 unsigned int cap;
5782 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5783 cap &= AC_GPIO_IO_COUNT;
5784 if (cap >= 6)
5785 stac_add_hp_bass_switch(codec);
5786 }
5787
2d34e1b3
TI		 5788 codec->proc_widget_hook = stac92hd7x_proc_hook;
5789
e035b841 5790 return 0;
86d190e7 5791}
e035b841 5792
2f2f4251
M		 5793static int patch_stac922x(struct hda_codec *codec)
5794{
5795 struct sigmatel_spec *spec;
c7d4b2fa 5796 int err;
2f2f4251 5797
e560d8d8 5798 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5799 if (spec == NULL)
5800 return -ENOMEM;
5801
a252c81a 5802 codec->no_trigger_sense = 1;
2f2f4251 5803 codec->spec = spec;
1b0e372d 5804 spec->linear_tone_beep = 1;
a4eed138 5805 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5806 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5807 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5808 stac922x_models,
5809 stac922x_cfg_tbl);
536319af 5810 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5811 spec->gpio_mask = spec->gpio_dir = 0x03;
5812 spec->gpio_data = 0x03;
3fc24d85
TI		 5813 /* Intel Macs have all same PCI SSID, so we need to check
5814 * codec SSID to distinguish the exact models
5815 */
6f0778d8 5816 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5817 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5818
5819 case 0x106b0800:
5820 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5821 break;
5d5d3bc3
IZ		 5822 case 0x106b0600:
5823 case 0x106b0700:
5824 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5825 break;
5d5d3bc3
IZ		 5826 case 0x106b0e00:
5827 case 0x106b0f00:
5828 case 0x106b1600:
5829 case 0x106b1700:
5830 case 0x106b0200:
5831 case 0x106b1e00:
5832 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5833 break;
5d5d3bc3
IZ		 5834 case 0x106b1a00:
5835 case 0x00000100:
5836 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5837 break;
5d5d3bc3
IZ		 5838 case 0x106b0a00:
5839 case 0x106b2200:
5840 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5841 break;
536319af
NB		 5842 default:
5843 spec->board_config = STAC_INTEL_MAC_V3;
5844 break;
3fc24d85
TI		 5845 }
5846 }
5847
9e507abd 5848 again:
330ee995 5849 if (spec->board_config < 0)
9a11f1aa
TI		 5850 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5851 codec->chip_name);
330ee995
TI		 5852 else
5853 stac92xx_set_config_regs(codec,
af9f341a 5854 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5855
c7d4b2fa
M		 5856 spec->adc_nids = stac922x_adc_nids;
5857 spec->mux_nids = stac922x_mux_nids;
2549413e 5858 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5859 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5860 spec->num_dmics = 0;
a64135a2 5861 spec->num_pwrs = 0;
c7d4b2fa
M		 5862
5863 spec->init = stac922x_core_init;
6479c631
TI		 5864
5865 spec->num_caps = STAC922X_NUM_CAPS;
5866 spec->capvols = stac922x_capvols;
5867 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 5868
5869 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5870
3cc08dc6 5871 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5872 if (!err) {
5873 if (spec->board_config < 0) {
5874 printk(KERN_WARNING "hda_codec: No auto-config is "
5875 "available, default to model=ref\n");
5876 spec->board_config = STAC_D945_REF;
5877 goto again;
5878 }
5879 err = -EINVAL;
5880 }
3cc08dc6
MP		 5881 if (err < 0) {
5882 stac92xx_free(codec);
5883 return err;
5884 }
5885
5886 codec->patch_ops = stac92xx_patch_ops;
5887
807a4636
TI		 5888 /* Fix Mux capture level; max to 2 */
5889 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5890 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5891 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5892 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5893 (0 << AC_AMPCAP_MUTE_SHIFT));
5894
3cc08dc6
MP		 5895 return 0;
5896}
5897
5898static int patch_stac927x(struct hda_codec *codec)
5899{
5900 struct sigmatel_spec *spec;
5901 int err;
5902
5903 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5904 if (spec == NULL)
5905 return -ENOMEM;
5906
a252c81a 5907 codec->no_trigger_sense = 1;
3cc08dc6 5908 codec->spec = spec;
1b0e372d 5909 spec->linear_tone_beep = 1;
45c1d85b 5910 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5911 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5912 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5913 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5914 stac927x_models,
5915 stac927x_cfg_tbl);
9e507abd 5916 again:
330ee995 5917 if (spec->board_config < 0)
9a11f1aa
TI		 5918 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5919 codec->chip_name);
330ee995
TI		 5920 else
5921 stac92xx_set_config_regs(codec,
af9f341a 5922 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5923
1cd2224c 5924 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5925 spec->adc_nids = stac927x_adc_nids;
5926 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5927 spec->mux_nids = stac927x_mux_nids;
5928 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5929 spec->smux_nids = stac927x_smux_nids;
5930 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5931 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5932 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5933 spec->multiout.dac_nids = spec->dac_nids;
5934
af6ee302
TI		 5935 if (spec->board_config != STAC_D965_REF) {
5936 /* GPIO0 High = Enable EAPD */
5937 spec->eapd_mask = spec->gpio_mask = 0x01;
5938 spec->gpio_dir = spec->gpio_data = 0x01;
5939 }
5940
81d3dbde 5941 switch (spec->board_config) {
93ed1503 5942 case STAC_D965_3ST:
93ed1503 5943 case STAC_D965_5ST:
8e9068b1 5944 /* GPIO0 High = Enable EAPD */
8e9068b1 5945 spec->num_dmics = 0;
93ed1503 5946 spec->init = d965_core_init;
81d3dbde 5947 break;
8e9068b1 5948 case STAC_DELL_BIOS:
780c8be4
MR		 5949 switch (codec->subsystem_id) {
5950 case 0x10280209:
5951 case 0x1028022e:
5952 /* correct the device field to SPDIF out */
330ee995 5953 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 5954 break;
86d190e7 5955 }
03d7ca17 5956 /* configure the analog microphone on some laptops */
330ee995 5957 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5958 /* correct the front output jack as a hp out */
330ee995 5959 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5960 /* correct the front input jack as a mic */
330ee995 5961 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5962 /* fallthru */
8e9068b1 5963 case STAC_DELL_3ST:
af6ee302
TI		 5964 if (codec->subsystem_id != 0x1028022f) {
5965 /* GPIO2 High = Enable EAPD */
5966 spec->eapd_mask = spec->gpio_mask = 0x04;
5967 spec->gpio_dir = spec->gpio_data = 0x04;
5968 }
7f16859a
MR		 5969 spec->dmic_nids = stac927x_dmic_nids;
5970 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5971
ccca7cdc 5972 spec->init = dell_3st_core_init;
8e9068b1 5973 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5974 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 5975 break;
54930531
TI		 5976 case STAC_927X_VOLKNOB:
5977 spec->num_dmics = 0;
5978 spec->init = stac927x_volknob_core_init;
5979 break;
7f16859a 5980 default:
8e9068b1 5981 spec->num_dmics = 0;
8e9068b1 5982 spec->init = stac927x_core_init;
af6ee302 5983 break;
7f16859a
MR		 5984 }
5985
6479c631
TI		 5986 spec->num_caps = STAC927X_NUM_CAPS;
5987 spec->capvols = stac927x_capvols;
5988 spec->capsws = stac927x_capsws;
5989
a64135a2 5990 spec->num_pwrs = 0;
d78d7a90 5991 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 5992 spec->aloopback_mask = 0x40;
5993 spec->aloopback_shift = 0;
c0cea0d0 5994 spec->eapd_switch = 1;
8e9068b1 5995
3cc08dc6 5996 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5997 if (!err) {
5998 if (spec->board_config < 0) {
5999 printk(KERN_WARNING "hda_codec: No auto-config is "
6000 "available, default to model=ref\n");
6001 spec->board_config = STAC_D965_REF;
6002 goto again;
6003 }
6004 err = -EINVAL;
6005 }
c7d4b2fa
M		 6006 if (err < 0) {
6007 stac92xx_free(codec);
6008 return err;
6009 }
2f2f4251
M		 6010
6011 codec->patch_ops = stac92xx_patch_ops;
6012
2d34e1b3
TI		 6013 codec->proc_widget_hook = stac927x_proc_hook;
6014
52987656
TI		 6015 /*
6016 * !!FIXME!!
6017 * The STAC927x seem to require fairly long delays for certain
6018 * command sequences. With too short delays (even if the answer
6019 * is set to RIRB properly), it results in the silence output
6020 * on some hardwares like Dell.
6021 *
6022 * The below flag enables the longer delay (see get_response
6023 * in hda_intel.c).
6024 */
6025 codec->bus->needs_damn_long_delay = 1;
6026
e28d8322
TI		 6027 /* no jack detecion for ref-no-jd model */
6028 if (spec->board_config == STAC_D965_REF_NO_JD)
6029 spec->hp_detect = 0;
6030
2f2f4251
M		 6031 return 0;
6032}
6033
f3302a59
MP		 6034static int patch_stac9205(struct hda_codec *codec)
6035{
6036 struct sigmatel_spec *spec;
8259980e 6037 int err;
f3302a59
MP		 6038
6039 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6040 if (spec == NULL)
6041 return -ENOMEM;
6042
a252c81a 6043 codec->no_trigger_sense = 1;
f3302a59 6044 codec->spec = spec;
1b0e372d 6045 spec->linear_tone_beep = 1;
a4eed138 6046 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6047 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6048 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6049 stac9205_models,
6050 stac9205_cfg_tbl);
9e507abd 6051 again:
330ee995 6052 if (spec->board_config < 0)
9a11f1aa
TI		 6053 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6054 codec->chip_name);
330ee995
TI		 6055 else
6056 stac92xx_set_config_regs(codec,
af9f341a 6057 stac9205_brd_tbl[spec->board_config]);
f3302a59 6058
1cd2224c 6059 spec->digbeep_nid = 0x23;
f3302a59 6060 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6061 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6062 spec->mux_nids = stac9205_mux_nids;
2549413e 6063 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6064 spec->smux_nids = stac9205_smux_nids;
6065 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6066 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6067 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6068 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6069 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6070 spec->num_pwrs = 0;
f3302a59
MP		 6071
6072 spec->init = stac9205_core_init;
d78d7a90 6073 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6074
6479c631
TI		 6075 spec->num_caps = STAC9205_NUM_CAPS;
6076 spec->capvols = stac9205_capvols;
6077 spec->capsws = stac9205_capsws;
6078
e1f0d669
MR		 6079 spec->aloopback_mask = 0x40;
6080 spec->aloopback_shift = 0;
d9a4268e
TI		 6081 /* Turn on/off EAPD per HP plugging */
6082 if (spec->board_config != STAC_9205_EAPD)
6083 spec->eapd_switch = 1;
f3302a59 6084 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6085
ae0a8ed8 6086 switch (spec->board_config){
ae0a8ed8 6087 case STAC_9205_DELL_M43:
87d48363 6088 /* Enable SPDIF in/out */
330ee995
TI		 6089 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6090 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6091
4fe5195c 6092 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 6093 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6094 if (err < 0)
6095 return err;
c5d08bb5 6096 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 6097 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6098 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 6099 AC_VERB_SET_UNSOLICITED_ENABLE,
6100 AC_USRSP_EN | err);
4fe5195c
MR		 6101
6102 spec->gpio_dir = 0x0b;
0fc9dec4 6103 spec->eapd_mask = 0x01;
4fe5195c
MR		 6104 spec->gpio_mask = 0x1b;
6105 spec->gpio_mute = 0x10;
e2e7d624 6106 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6107 * GPIO3 Low = DRM
87d48363 6108 */
4fe5195c 6109 spec->gpio_data = 0x01;
ae0a8ed8 6110 break;
b2c4f4d7
MR		 6111 case STAC_9205_REF:
6112 /* SPDIF-In enabled */
6113 break;
ae0a8ed8
TD		 6114 default:
6115 /* GPIO0 High = EAPD */
0fc9dec4 6116 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6117 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6118 break;
6119 }
33382403 6120
f3302a59 6121 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 6122 if (!err) {
6123 if (spec->board_config < 0) {
6124 printk(KERN_WARNING "hda_codec: No auto-config is "
6125 "available, default to model=ref\n");
6126 spec->board_config = STAC_9205_REF;
6127 goto again;
6128 }
6129 err = -EINVAL;
6130 }
f3302a59
MP		 6131 if (err < 0) {
6132 stac92xx_free(codec);
6133 return err;
6134 }
6135
6136 codec->patch_ops = stac92xx_patch_ops;
6137
2d34e1b3
TI		 6138 codec->proc_widget_hook = stac9205_proc_hook;
6139
f3302a59
MP		 6140 return 0;
6141}
6142
db064e50 6143/*
6d859065 6144 * STAC9872 hack
db064e50
TI		 6145 */
6146
1e137f92 6147static struct hda_verb stac9872_core_init[] = {
1624cb9a 6148 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6149 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6150 {}
6151};
6152
caa10b6e
TI		 6153static hda_nid_t stac9872_pin_nids[] = {
6154 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6155 0x11, 0x13, 0x14,
6156};
6157
6158static hda_nid_t stac9872_adc_nids[] = {
6159 0x8 /*,0x6*/
6160};
6161
6162static hda_nid_t stac9872_mux_nids[] = {
6163 0x15
6164};
6165
6479c631
TI		 6166static unsigned long stac9872_capvols[] = {
6167 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6168};
6169#define stac9872_capsws stac9872_capvols
6170
307282c8
TI		 6171static unsigned int stac9872_vaio_pin_configs[9] = {
6172 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6173 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6174 0x90a7013e
6175};
6176
ea734963 6177static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6178 [STAC_9872_AUTO] = "auto",
6179 [STAC_9872_VAIO] = "vaio",
6180};
6181
6182static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
6183 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6184};
6185
6186static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6187 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6188 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6189 {} /* terminator */
6190};
6191
6d859065 6192static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6193{
6194 struct sigmatel_spec *spec;
1e137f92 6195 int err;
db064e50 6196
db064e50
TI		 6197 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6198 if (spec == NULL)
6199 return -ENOMEM;
a252c81a 6200 codec->no_trigger_sense = 1;
db064e50 6201 codec->spec = spec;
1b0e372d 6202 spec->linear_tone_beep = 1;
b04add95
TI		 6203 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6204 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6205
6206 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6207 stac9872_models,
6208 stac9872_cfg_tbl);
307282c8 6209 if (spec->board_config < 0)
9a11f1aa
TI		 6210 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6211 codec->chip_name);
307282c8
TI		 6212 else
6213 stac92xx_set_config_regs(codec,
6214 stac9872_brd_tbl[spec->board_config]);
db064e50 6215
1e137f92
TI		 6216 spec->multiout.dac_nids = spec->dac_nids;
6217 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6218 spec->adc_nids = stac9872_adc_nids;
6219 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6220 spec->mux_nids = stac9872_mux_nids;
1e137f92 6221 spec->init = stac9872_core_init;
6479c631
TI		 6222 spec->num_caps = 1;
6223 spec->capvols = stac9872_capvols;
6224 spec->capsws = stac9872_capsws;
1e137f92
TI		 6225
6226 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6227 if (err < 0) {
6228 stac92xx_free(codec);
6229 return -EINVAL;
6230 }
6231 spec->input_mux = &spec->private_imux;
6232 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6233 return 0;
6234}
6235
6236
2f2f4251
M		 6237/*
6238 * patch entries
6239 */
1289e9e8 6240static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6241 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6242 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6243 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6244 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6245 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6246 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6247 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6248 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6249 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6250 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6251 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6252 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6253 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6254 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6255 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6256 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6257 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6258 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6259 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6260 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6261 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6262 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6263 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6264 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6265 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6266 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6267 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6268 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6269 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6270 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6271 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6272 /* The following does not take into account .id=0x83847661 when subsys =
6273 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6274 * currently not fully supported.
6275 */
6276 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6277 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6278 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6279 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6280 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6281 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6282 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6283 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6284 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6285 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6286 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6287 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6288 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6289 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6290 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6291 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6292 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6293 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6294 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6295 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6296 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6297 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6298 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6299 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6300 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6301 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6302 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6303 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6304 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6305 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6306 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6307 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6308 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6309 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6310 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6311 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6312 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6313 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6314 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6315 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6316 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6317 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6318 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6319 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6320 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6321 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6322 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6323 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6324 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6325 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
ab5a6ebe 6326 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6327 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6328 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6329 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6330 {} /* terminator */
6331};
1289e9e8
TI		 6332
6333MODULE_ALIAS("snd-hda-codec-id:8384*");
6334MODULE_ALIAS("snd-hda-codec-id:111d*");
6335
6336MODULE_LICENSE("GPL");
6337MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6338
6339static struct hda_codec_preset_list sigmatel_list = {
6340 .preset = snd_hda_preset_sigmatel,
6341 .owner = THIS_MODULE,
6342};
6343
6344static int __init patch_sigmatel_init(void)
6345{
6346 return snd_hda_add_codec_preset(&sigmatel_list);
6347}
6348
6349static void __exit patch_sigmatel_exit(void)
6350{
6351 snd_hda_delete_codec_preset(&sigmatel_list);
6352}
6353
6354module_init(patch_sigmatel_init)
6355module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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