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ALSA: hda - Clean up old VAIO hack codes for STAC9872
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
f5fcc13c
TI		 69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
e1f0d669
MR		 79 STAC_92HD73XX_MODELS
80};
81
d0513fc6
MR		 82enum {
83 STAC_92HD83XXX_REF,
84 STAC_92HD83XXX_MODELS
85};
86
e035b841
MR		 87enum {
88 STAC_92HD71BXX_REF,
a7662640
MR		 89 STAC_DELL_M4_1,
90 STAC_DELL_M4_2,
3a7abfd2 91 STAC_DELL_M4_3,
6a14f585 92 STAC_HP_M4,
1b0652eb 93 STAC_HP_DV5,
e035b841
MR		 94 STAC_92HD71BXX_MODELS
95};
96
8e21c34c
TD		 97enum {
98 STAC_925x_REF,
9cb36c2a
MCC		 99 STAC_M1,
100 STAC_M1_2,
101 STAC_M2,
8e21c34c 102 STAC_M2_2,
9cb36c2a
MCC		 103 STAC_M3,
104 STAC_M5,
105 STAC_M6,
8e21c34c
TD		 106 STAC_925x_MODELS
107};
108
f5fcc13c
TI		 109enum {
110 STAC_D945_REF,
111 STAC_D945GTP3,
112 STAC_D945GTP5,
5d5d3bc3
IZ		 113 STAC_INTEL_MAC_V1,
114 STAC_INTEL_MAC_V2,
115 STAC_INTEL_MAC_V3,
116 STAC_INTEL_MAC_V4,
117 STAC_INTEL_MAC_V5,
536319af
NB		 118 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
119 * is given, one of the above models will be
120 * chosen according to the subsystem id. */
dfe495d0 121 /* for backward compatibility */
f5fcc13c 122 STAC_MACMINI,
3fc24d85 123 STAC_MACBOOK,
6f0778d8
NB		 124 STAC_MACBOOK_PRO_V1,
125 STAC_MACBOOK_PRO_V2,
f16928fb 126 STAC_IMAC_INTEL,
0dae0f83 127 STAC_IMAC_INTEL_20,
8c650087 128 STAC_ECS_202,
dfe495d0
TI		 129 STAC_922X_DELL_D81,
130 STAC_922X_DELL_D82,
131 STAC_922X_DELL_M81,
132 STAC_922X_DELL_M82,
f5fcc13c
TI		 133 STAC_922X_MODELS
134};
135
136enum {
e28d8322 137 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 138 STAC_D965_REF,
139 STAC_D965_3ST,
140 STAC_D965_5ST,
4ff076e5 141 STAC_DELL_3ST,
8e9068b1 142 STAC_DELL_BIOS,
f5fcc13c
TI		 143 STAC_927X_MODELS
144};
403d1944 145
74aeaabc
MR		 146struct sigmatel_event {
147 hda_nid_t nid;
c6e4c666
TI		 148 unsigned char type;
149 unsigned char tag;
74aeaabc
MR		 150 int data;
151};
152
153struct sigmatel_jack {
154 hda_nid_t nid;
155 int type;
156 struct snd_jack *jack;
157};
158
2f2f4251 159struct sigmatel_spec {
c8b6bf9b 160 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 161 unsigned int num_mixers;
162
403d1944 163 int board_config;
c0cea0d0 164 unsigned int eapd_switch: 1;
c7d4b2fa 165 unsigned int surr_switch: 1;
3cc08dc6 166 unsigned int alt_switch: 1;
82bc955f 167 unsigned int hp_detect: 1;
00ef50c2 168 unsigned int spdif_mute: 1;
c7d4b2fa 169
4fe5195c 170 /* gpio lines */
0fc9dec4 171 unsigned int eapd_mask;
4fe5195c
MR		 172 unsigned int gpio_mask;
173 unsigned int gpio_dir;
174 unsigned int gpio_data;
175 unsigned int gpio_mute;
176
8daaaa97
MR		 177 /* stream */
178 unsigned int stream_delay;
179
4fe5195c 180 /* analog loopback */
e1f0d669
MR		 181 unsigned char aloopback_mask;
182 unsigned char aloopback_shift;
8259980e 183
a64135a2
MR		 184 /* power management */
185 unsigned int num_pwrs;
d0513fc6 186 unsigned int *pwr_mapping;
a64135a2 187 hda_nid_t *pwr_nids;
b76c850f 188 hda_nid_t *dac_list;
a64135a2 189
74aeaabc
MR		 190 /* jack detection */
191 struct snd_array jacks;
192
193 /* events */
194 struct snd_array events;
195
2f2f4251 196 /* playback */
b22b4821 197 struct hda_input_mux *mono_mux;
89385035 198 struct hda_input_mux *amp_mux;
b22b4821 199 unsigned int cur_mmux;
2f2f4251 200 struct hda_multi_out multiout;
3cc08dc6 201 hda_nid_t dac_nids[5];
c21ca4a8
TI		 202 hda_nid_t hp_dacs[5];
203 hda_nid_t speaker_dacs[5];
2f2f4251
M		 204
205 /* capture */
206 hda_nid_t *adc_nids;
2f2f4251 207 unsigned int num_adcs;
dabbed6f
M		 208 hda_nid_t *mux_nids;
209 unsigned int num_muxes;
8b65727b
MP		 210 hda_nid_t *dmic_nids;
211 unsigned int num_dmics;
e1f0d669 212 hda_nid_t *dmux_nids;
1697055e 213 unsigned int num_dmuxes;
d9737751
MR		 214 hda_nid_t *smux_nids;
215 unsigned int num_smuxes;
65973632 216 const char **spdif_labels;
d9737751 217
dabbed6f 218 hda_nid_t dig_in_nid;
b22b4821 219 hda_nid_t mono_nid;
1cd2224c
MR		 220 hda_nid_t anabeep_nid;
221 hda_nid_t digbeep_nid;
2f2f4251 222
2f2f4251
M		 223 /* pin widgets */
224 hda_nid_t *pin_nids;
225 unsigned int num_pins;
2f2f4251 226 unsigned int *pin_configs;
2f2f4251
M		 227
228 /* codec specific stuff */
229 struct hda_verb *init;
c8b6bf9b 230 struct snd_kcontrol_new *mixer;
2f2f4251
M		 231
232 /* capture source */
8b65727b 233 struct hda_input_mux *dinput_mux;
e1f0d669 234 unsigned int cur_dmux[2];
c7d4b2fa 235 struct hda_input_mux *input_mux;
3cc08dc6 236 unsigned int cur_mux[3];
d9737751
MR		 237 struct hda_input_mux *sinput_mux;
238 unsigned int cur_smux[2];
2a9c7816
MR		 239 unsigned int cur_amux;
240 hda_nid_t *amp_nids;
241 unsigned int num_amps;
8daaaa97 242 unsigned int powerdown_adcs;
2f2f4251 243
403d1944
MP		 244 /* i/o switches */
245 unsigned int io_switch[2];
0fb87bb4 246 unsigned int clfe_swap;
c21ca4a8
TI		 247 hda_nid_t line_switch; /* shared line-in for input and output */
248 hda_nid_t mic_switch; /* shared mic-in for input and output */
249 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 250 unsigned int aloopback;
2f2f4251 251
c7d4b2fa
M		 252 struct hda_pcm pcm_rec[2]; /* PCM information */
253
254 /* dynamic controls and input_mux */
255 struct auto_pin_cfg autocfg;
603c4019 256 struct snd_array kctls;
8b65727b 257 struct hda_input_mux private_dimux;
c7d4b2fa 258 struct hda_input_mux private_imux;
d9737751 259 struct hda_input_mux private_smux;
89385035 260 struct hda_input_mux private_amp_mux;
b22b4821 261 struct hda_input_mux private_mono_mux;
2f2f4251
M		 262};
263
264static hda_nid_t stac9200_adc_nids[1] = {
265 0x03,
266};
267
268static hda_nid_t stac9200_mux_nids[1] = {
269 0x0c,
270};
271
272static hda_nid_t stac9200_dac_nids[1] = {
273 0x02,
274};
275
a64135a2
MR		 276static hda_nid_t stac92hd73xx_pwr_nids[8] = {
277 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
278 0x0f, 0x10, 0x11
279};
280
0ffa9807
MR		 281static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
282 0x26, 0,
283};
284
e1f0d669
MR		 285static hda_nid_t stac92hd73xx_adc_nids[2] = {
286 0x1a, 0x1b
287};
288
2a9c7816
MR		 289#define DELL_M6_AMP 2
290static hda_nid_t stac92hd73xx_amp_nids[3] = {
291 0x0b, 0x0c, 0x0e
89385035
MR		 292};
293
e1f0d669
MR		 294#define STAC92HD73XX_NUM_DMICS 2
295static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
296 0x13, 0x14, 0
297};
298
299#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 300
301static hda_nid_t stac92hd73xx_mux_nids[4] = {
302 0x28, 0x29, 0x2a, 0x2b,
303};
304
305static hda_nid_t stac92hd73xx_dmux_nids[2] = {
306 0x20, 0x21,
307};
308
d9737751
MR		 309static hda_nid_t stac92hd73xx_smux_nids[2] = {
310 0x22, 0x23,
311};
312
d0513fc6
MR		 313#define STAC92HD83XXX_NUM_DMICS 2
314static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
315 0x11, 0x12, 0
316};
317
d0513fc6 318#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 319
320static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
321 0x17, 0x18,
322};
323
324static hda_nid_t stac92hd83xxx_adc_nids[2] = {
325 0x15, 0x16,
326};
327
328static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
329 0xa, 0xb, 0xd, 0xe,
330};
331
0ffa9807
MR		 332static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
333 0x1e, 0,
334};
335
d0513fc6 336static unsigned int stac92hd83xxx_pwr_mapping[4] = {
989738c4 337 0x03, 0x0c, 0x20, 0x80,
d0513fc6
MR		 338};
339
9248f269 340static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR		 341 0xc,
342};
343
a64135a2
MR		 344static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
345 0x0a, 0x0d, 0x0f
346};
347
e035b841
MR		 348static hda_nid_t stac92hd71bxx_adc_nids[2] = {
349 0x12, 0x13,
350};
351
352static hda_nid_t stac92hd71bxx_mux_nids[2] = {
353 0x1a, 0x1b
354};
355
4b33c767
MR		 356static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
357 0x1c, 0x1d,
e1f0d669
MR		 358};
359
d9737751
MR		 360static hda_nid_t stac92hd71bxx_smux_nids[2] = {
361 0x24, 0x25,
362};
363
e035b841
MR		 364#define STAC92HD71BXX_NUM_DMICS 2
365static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
366 0x18, 0x19, 0
367};
368
0ffa9807
MR		 369static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
370 0x22, 0
371};
372
8e21c34c
TD		 373static hda_nid_t stac925x_adc_nids[1] = {
374 0x03,
375};
376
377static hda_nid_t stac925x_mux_nids[1] = {
378 0x0f,
379};
380
381static hda_nid_t stac925x_dac_nids[1] = {
382 0x02,
383};
384
f6e9852a
TI		 385#define STAC925X_NUM_DMICS 1
386static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
387 0x15, 0
2c11f955
TD		 388};
389
1697055e
TI		 390static hda_nid_t stac925x_dmux_nids[1] = {
391 0x14,
392};
393
2f2f4251
M		 394static hda_nid_t stac922x_adc_nids[2] = {
395 0x06, 0x07,
396};
397
398static hda_nid_t stac922x_mux_nids[2] = {
399 0x12, 0x13,
400};
401
3cc08dc6
MP		 402static hda_nid_t stac927x_adc_nids[3] = {
403 0x07, 0x08, 0x09
404};
405
406static hda_nid_t stac927x_mux_nids[3] = {
407 0x15, 0x16, 0x17
408};
409
d9737751
MR		 410static hda_nid_t stac927x_smux_nids[1] = {
411 0x21,
412};
413
b76c850f
MR		 414static hda_nid_t stac927x_dac_nids[6] = {
415 0x02, 0x03, 0x04, 0x05, 0x06, 0
416};
417
e1f0d669
MR		 418static hda_nid_t stac927x_dmux_nids[1] = {
419 0x1b,
420};
421
7f16859a
MR		 422#define STAC927X_NUM_DMICS 2
423static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
424 0x13, 0x14, 0
425};
426
65973632
MR		 427static const char *stac927x_spdif_labels[5] = {
428 "Digital Playback", "ADAT", "Analog Mux 1",
429 "Analog Mux 2", "Analog Mux 3"
430};
431
f3302a59
MP		 432static hda_nid_t stac9205_adc_nids[2] = {
433 0x12, 0x13
434};
435
436static hda_nid_t stac9205_mux_nids[2] = {
437 0x19, 0x1a
438};
439
e1f0d669 440static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 441 0x1d,
e1f0d669
MR		 442};
443
d9737751
MR		 444static hda_nid_t stac9205_smux_nids[1] = {
445 0x21,
446};
447
f6e9852a
TI		 448#define STAC9205_NUM_DMICS 2
449static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
450 0x17, 0x18, 0
8b65727b
MP		 451};
452
c7d4b2fa 453static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 454 0x08, 0x09, 0x0d, 0x0e,
455 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 456};
457
8e21c34c
TD		 458static hda_nid_t stac925x_pin_nids[8] = {
459 0x07, 0x08, 0x0a, 0x0b,
460 0x0c, 0x0d, 0x10, 0x11,
461};
462
2f2f4251
M		 463static hda_nid_t stac922x_pin_nids[10] = {
464 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
465 0x0f, 0x10, 0x11, 0x15, 0x1b,
466};
467
a7662640 468static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 469 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
470 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 471 0x14, 0x22, 0x23
e1f0d669
MR		 472};
473
d0513fc6
MR		 474static hda_nid_t stac92hd83xxx_pin_nids[14] = {
475 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
476 0x0f, 0x10, 0x11, 0x12, 0x13,
477 0x1d, 0x1e, 0x1f, 0x20
478};
0ffa9807 479static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 480 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
481 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 482 0x1f,
e035b841
MR		 483};
484
3cc08dc6
MP		 485static hda_nid_t stac927x_pin_nids[14] = {
486 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
487 0x0f, 0x10, 0x11, 0x12, 0x13,
488 0x14, 0x21, 0x22, 0x23,
489};
490
f3302a59
MP		 491static hda_nid_t stac9205_pin_nids[12] = {
492 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
493 0x0f, 0x14, 0x16, 0x17, 0x18,
494 0x21, 0x22,
f3302a59
MP		 495};
496
89385035
MR		 497#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
498
499static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
500 struct snd_ctl_elem_value *ucontrol)
501{
502 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
503 struct sigmatel_spec *spec = codec->spec;
504 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
505
506 kcontrol->private_value ^= get_amp_nid(kcontrol);
507 kcontrol->private_value |= nid;
508
509 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
510}
511
512static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
513 struct snd_ctl_elem_value *ucontrol)
514{
515 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
516 struct sigmatel_spec *spec = codec->spec;
517 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
518
519 kcontrol->private_value ^= get_amp_nid(kcontrol);
520 kcontrol->private_value |= nid;
521
522 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
523}
524
8b65727b
MP		 525static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_info *uinfo)
527{
528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
529 struct sigmatel_spec *spec = codec->spec;
530 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
531}
532
533static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_value *ucontrol)
535{
536 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
537 struct sigmatel_spec *spec = codec->spec;
e1f0d669 538 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 539
e1f0d669 540 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 541 return 0;
542}
543
544static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
545 struct snd_ctl_elem_value *ucontrol)
546{
547 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
548 struct sigmatel_spec *spec = codec->spec;
e1f0d669 549 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 550
551 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 552 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 553}
554
d9737751
MR		 555static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
556 struct snd_ctl_elem_info *uinfo)
557{
558 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
559 struct sigmatel_spec *spec = codec->spec;
560 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
561}
562
563static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
564 struct snd_ctl_elem_value *ucontrol)
565{
566 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
567 struct sigmatel_spec *spec = codec->spec;
568 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
569
570 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
571 return 0;
572}
573
574static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
575 struct snd_ctl_elem_value *ucontrol)
576{
577 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
578 struct sigmatel_spec *spec = codec->spec;
00ef50c2 579 struct hda_input_mux *smux = &spec->private_smux;
d9737751 580 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 581 int err, val;
582 hda_nid_t nid;
d9737751 583
00ef50c2 584 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 585 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 586 if (err < 0)
587 return err;
588
589 if (spec->spdif_mute) {
590 if (smux_idx == 0)
591 nid = spec->multiout.dig_out_nid;
592 else
593 nid = codec->slave_dig_outs[smux_idx - 1];
594 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 595 val = HDA_AMP_MUTE;
00ef50c2 596 else
c9b46f91 597 val = 0;
00ef50c2 598 /* un/mute SPDIF out */
c9b46f91
TI		 599 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
600 HDA_AMP_MUTE, val);
00ef50c2
MR		 601 }
602 return 0;
d9737751
MR		 603}
604
c8b6bf9b 605static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 606{
607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
608 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 609 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 610}
611
c8b6bf9b 612static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 613{
614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
615 struct sigmatel_spec *spec = codec->spec;
616 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
617
618 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
619 return 0;
620}
621
c8b6bf9b 622static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 623{
624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
625 struct sigmatel_spec *spec = codec->spec;
626 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
627
c7d4b2fa 628 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 629 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
630}
631
b22b4821
MR		 632static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_info *uinfo)
634{
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
638}
639
640static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
641 struct snd_ctl_elem_value *ucontrol)
642{
643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
644 struct sigmatel_spec *spec = codec->spec;
645
646 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
647 return 0;
648}
649
650static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
655
656 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
657 spec->mono_nid, &spec->cur_mmux);
658}
659
89385035
MR		 660static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_info *uinfo)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
665 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
666}
667
668static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
669 struct snd_ctl_elem_value *ucontrol)
670{
671 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
672 struct sigmatel_spec *spec = codec->spec;
673
674 ucontrol->value.enumerated.item[0] = spec->cur_amux;
675 return 0;
676}
677
678static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
679 struct snd_ctl_elem_value *ucontrol)
680{
681 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
682 struct sigmatel_spec *spec = codec->spec;
683 struct snd_kcontrol *ctl =
684 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
685 if (!ctl)
686 return -EINVAL;
687
688 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
689 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
690
691 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
692 0, &spec->cur_amux);
693}
694
5f10c4a9
ML		 695#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
696
697static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
698 struct snd_ctl_elem_value *ucontrol)
699{
700 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 701 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 702 struct sigmatel_spec *spec = codec->spec;
703
e1f0d669
MR		 704 ucontrol->value.integer.value[0] = !!(spec->aloopback &
705 (spec->aloopback_mask << idx));
5f10c4a9
ML		 706 return 0;
707}
708
709static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
710 struct snd_ctl_elem_value *ucontrol)
711{
712 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
713 struct sigmatel_spec *spec = codec->spec;
e1f0d669 714 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 715 unsigned int dac_mode;
e1f0d669 716 unsigned int val, idx_val;
5f10c4a9 717
e1f0d669
MR		 718 idx_val = spec->aloopback_mask << idx;
719 if (ucontrol->value.integer.value[0])
720 val = spec->aloopback | idx_val;
721 else
722 val = spec->aloopback & ~idx_val;
68ea7b2f 723 if (spec->aloopback == val)
5f10c4a9
ML		 724 return 0;
725
68ea7b2f 726 spec->aloopback = val;
5f10c4a9 727
e1f0d669
MR		 728 /* Only return the bits defined by the shift value of the
729 * first two bytes of the mask
730 */
5f10c4a9 731 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 732 kcontrol->private_value & 0xFFFF, 0x0);
733 dac_mode >>= spec->aloopback_shift;
5f10c4a9 734
e1f0d669 735 if (spec->aloopback & idx_val) {
5f10c4a9 736 snd_hda_power_up(codec);
e1f0d669 737 dac_mode |= idx_val;
5f10c4a9
ML		 738 } else {
739 snd_hda_power_down(codec);
e1f0d669 740 dac_mode &= ~idx_val;
5f10c4a9
ML		 741 }
742
743 snd_hda_codec_write_cache(codec, codec->afg, 0,
744 kcontrol->private_value >> 16, dac_mode);
745
746 return 1;
747}
748
c7d4b2fa 749static struct hda_verb stac9200_core_init[] = {
2f2f4251 750 /* set dac0mux for dac converter */
c7d4b2fa 751 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 752 {}
753};
754
1194b5b7
TI		 755static struct hda_verb stac9200_eapd_init[] = {
756 /* set dac0mux for dac converter */
757 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
758 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
759 {}
760};
761
e1f0d669
MR		 762static struct hda_verb stac92hd73xx_6ch_core_init[] = {
763 /* set master volume and direct control */
764 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 765 /* setup adcs to point to mixer */
766 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
767 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 768 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
769 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 /* setup import muxs */
772 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
773 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
776 {}
777};
778
d654a660
MR		 779static struct hda_verb dell_eq_core_init[] = {
780 /* set master volume to max value without distortion
781 * and direct control */
782 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 783 /* setup adcs to point to mixer */
784 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
785 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 /* setup import muxs */
787 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
788 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
791 {}
792};
793
52fe0f9d 794static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 795 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 796 /* setup adcs to point to mixer */
797 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
798 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
799 /* setup import muxs */
800 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
801 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
803 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
804 {}
805};
806
e1f0d669
MR		 807static struct hda_verb stac92hd73xx_8ch_core_init[] = {
808 /* set master volume and direct control */
809 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 810 /* setup adcs to point to mixer */
811 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
812 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 813 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
814 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 /* setup import muxs */
817 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
818 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
821 {}
822};
823
824static struct hda_verb stac92hd73xx_10ch_core_init[] = {
825 /* set master volume and direct control */
826 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 827 /* dac3 is connected to import3 mux */
828 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 829 /* setup adcs to point to mixer */
830 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
831 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 832 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
833 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 /* setup import muxs */
836 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
837 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
840 {}
841};
842
d0513fc6 843static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 844 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
845 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
846 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
847
848 /* power state controls amps */
849 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 850 {}
d0513fc6
MR		 851};
852
e035b841 853static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 854 /* set master volume and direct control */
855 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 856 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
857 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
858 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
859 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 860 {}
541eee87
MR		 861};
862
4b33c767 863#define HD_DISABLE_PORTF 2
541eee87 864static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 865 /* start of config #1 */
866
867 /* connect port 0f to audio mixer */
868 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 869 /* unmute right and left channels for node 0x0f */
870 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
871 /* start of config #2 */
872
e035b841
MR		 873 /* set master volume and direct control */
874 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 875 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 876 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
877 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 878 {}
879};
880
8e21c34c
TD		 881static struct hda_verb stac925x_core_init[] = {
882 /* set dac0mux for dac converter */
883 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 884 /* mute the master volume */
885 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 886 {}
887};
888
c7d4b2fa 889static struct hda_verb stac922x_core_init[] = {
2f2f4251 890 /* set master volume and direct control */
c7d4b2fa 891 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 892 {}
893};
894
93ed1503 895static struct hda_verb d965_core_init[] = {
19039bd0 896 /* set master volume and direct control */
93ed1503 897 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 898 /* unmute node 0x1b */
899 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
900 /* select node 0x03 as DAC */
901 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
902 {}
903};
904
3cc08dc6
MP		 905static struct hda_verb stac927x_core_init[] = {
906 /* set master volume and direct control */
907 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 908 /* enable analog pc beep path */
909 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 910 {}
911};
912
f3302a59
MP		 913static struct hda_verb stac9205_core_init[] = {
914 /* set master volume and direct control */
915 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 916 /* enable analog pc beep path */
917 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 918 {}
919};
920
b22b4821
MR		 921#define STAC_MONO_MUX \
922 { \
923 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
924 .name = "Mono Mux", \
925 .count = 1, \
926 .info = stac92xx_mono_mux_enum_info, \
927 .get = stac92xx_mono_mux_enum_get, \
928 .put = stac92xx_mono_mux_enum_put, \
929 }
930
89385035
MR		 931#define STAC_AMP_MUX \
932 { \
933 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
934 .name = "Amp Selector Capture Switch", \
935 .count = 1, \
936 .info = stac92xx_amp_mux_enum_info, \
937 .get = stac92xx_amp_mux_enum_get, \
938 .put = stac92xx_amp_mux_enum_put, \
939 }
940
941#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
942 { \
943 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
944 .name = xname, \
945 .index = 0, \
946 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
947 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
948 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
949 .info = stac92xx_amp_volume_info, \
950 .get = stac92xx_amp_volume_get, \
951 .put = stac92xx_amp_volume_put, \
952 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
953 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
954 }
955
9e05b7a3 956#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 957 { \
958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
959 .name = "Input Source", \
9e05b7a3 960 .count = cnt, \
ca7c5a8b
ML		 961 .info = stac92xx_mux_enum_info, \
962 .get = stac92xx_mux_enum_get, \
963 .put = stac92xx_mux_enum_put, \
964 }
965
e1f0d669 966#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 967 { \
968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
969 .name = "Analog Loopback", \
e1f0d669 970 .count = cnt, \
5f10c4a9
ML		 971 .info = stac92xx_aloopback_info, \
972 .get = stac92xx_aloopback_get, \
973 .put = stac92xx_aloopback_put, \
974 .private_value = verb_read | (verb_write << 16), \
975 }
976
c8b6bf9b 977static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 978 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
979 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 980 STAC_INPUT_SOURCE(1),
2f2f4251
M		 981 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
982 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 983 { } /* end */
984};
985
2a9c7816 986#define DELL_M6_MIXER 6
e1f0d669 987static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 988 /* start of config #1 */
e1f0d669
MR		 989 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
990 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
991
e1f0d669
MR		 992 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
993 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
994
2a9c7816
MR		 995 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
996 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
997
998 /* start of config #2 */
999 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1000 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1001
e1f0d669
MR		 1002 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1003 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1004
2a9c7816
MR		 1005 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1006
1007 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1008 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1009
1010 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1011 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1012
e1f0d669
MR		 1013 { } /* end */
1014};
1015
1016static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1017 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1018
e1f0d669
MR		 1019 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1020 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021
1022 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1023 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024
1025 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1026 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1027
1028 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1029 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1030
1031 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1032 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1033
1034 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1035 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1036
1037 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1038 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1039 { } /* end */
1040};
1041
1042static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1043 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1044
e1f0d669
MR		 1045 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1046 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1047
1048 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1049 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1050
1051 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1052 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1053
1054 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1055 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1056
1057 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1058 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1059
1060 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1061 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1062
1063 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1064 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1065 { } /* end */
1066};
1067
d0513fc6
MR		 1068
1069static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1070 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1071 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1072
1073 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1074 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1075
74b7ff48
MR		 1076 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1077 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1078
74b7ff48
MR		 1079 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1080 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1081
74b7ff48
MR		 1082 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1083 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1084
74b7ff48
MR		 1085 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1086 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1087
1088 /*
74b7ff48
MR		 1089 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1090 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1091 */
1092 { } /* end */
1093};
1094
541eee87 1095static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1096 STAC_INPUT_SOURCE(2),
4b33c767 1097 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1098
9b35947f
MR		 1099 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1100 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1101
1102 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1103 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1104 /* analog pc-beep replaced with digital beep support */
1105 /*
f7c5dda2
MR		 1106 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1107 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1108 */
f7c5dda2 1109
687cb98e
MR		 1110 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1111 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1112
687cb98e
MR		 1113 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1114 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1115
1116 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1117 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1118
1119 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1120 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1121 { } /* end */
1122};
1123
541eee87 1124static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1125 STAC_INPUT_SOURCE(2),
1126 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1127
541eee87
MR		 1128 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1129 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1130
1131 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1132 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1133 { } /* end */
1134};
1135
8e21c34c 1136static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1137 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1138 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1139 STAC_INPUT_SOURCE(1),
8e21c34c 1140 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1141 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1142 { } /* end */
1143};
1144
9e05b7a3 1145static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1146 STAC_INPUT_SOURCE(2),
e1f0d669 1147 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1148
1149 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1150 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1151
1152 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1153 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1154 { } /* end */
1155};
1156
19039bd0 1157/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1158static struct snd_kcontrol_new stac922x_mixer[] = {
1159 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1160 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1161 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1162
1163 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1164 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1165 { } /* end */
1166};
1167
9e05b7a3 1168
d1d985f0 1169static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1170 STAC_INPUT_SOURCE(3),
e1f0d669 1171 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1172
9e05b7a3
ML		 1173 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1174 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1175
1176 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1177 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1178
1179 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1180 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1181 { } /* end */
1182};
1183
1697055e
TI		 1184static struct snd_kcontrol_new stac_dmux_mixer = {
1185 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1186 .name = "Digital Input Source",
1187 /* count set later */
1188 .info = stac92xx_dmux_enum_info,
1189 .get = stac92xx_dmux_enum_get,
1190 .put = stac92xx_dmux_enum_put,
1191};
1192
d9737751
MR		 1193static struct snd_kcontrol_new stac_smux_mixer = {
1194 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1195 .name = "IEC958 Playback Source",
d9737751
MR		 1196 /* count set later */
1197 .info = stac92xx_smux_enum_info,
1198 .get = stac92xx_smux_enum_get,
1199 .put = stac92xx_smux_enum_put,
1200};
1201
2134ea4f
TI		 1202static const char *slave_vols[] = {
1203 "Front Playback Volume",
1204 "Surround Playback Volume",
1205 "Center Playback Volume",
1206 "LFE Playback Volume",
1207 "Side Playback Volume",
1208 "Headphone Playback Volume",
1209 "Headphone Playback Volume",
1210 "Speaker Playback Volume",
1211 "External Speaker Playback Volume",
1212 "Speaker2 Playback Volume",
1213 NULL
1214};
1215
1216static const char *slave_sws[] = {
1217 "Front Playback Switch",
1218 "Surround Playback Switch",
1219 "Center Playback Switch",
1220 "LFE Playback Switch",
1221 "Side Playback Switch",
1222 "Headphone Playback Switch",
1223 "Headphone Playback Switch",
1224 "Speaker Playback Switch",
1225 "External Speaker Playback Switch",
1226 "Speaker2 Playback Switch",
edb54a55 1227 "IEC958 Playback Switch",
2134ea4f
TI		 1228 NULL
1229};
1230
603c4019 1231static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1232static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1233
2f2f4251
M		 1234static int stac92xx_build_controls(struct hda_codec *codec)
1235{
1236 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1237 struct auto_pin_cfg *cfg = &spec->autocfg;
1238 hda_nid_t nid;
2f2f4251 1239 int err;
c7d4b2fa 1240 int i;
2f2f4251
M		 1241
1242 err = snd_hda_add_new_ctls(codec, spec->mixer);
1243 if (err < 0)
1244 return err;
c7d4b2fa
M		 1245
1246 for (i = 0; i < spec->num_mixers; i++) {
1247 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1248 if (err < 0)
1249 return err;
1250 }
1697055e
TI		 1251 if (spec->num_dmuxes > 0) {
1252 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1253 err = snd_hda_ctl_add(codec,
1697055e
TI		 1254 snd_ctl_new1(&stac_dmux_mixer, codec));
1255 if (err < 0)
1256 return err;
1257 }
d9737751 1258 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1259 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1260 struct hda_input_mux *smux = &spec->private_smux;
1261 /* check for mute support on SPDIF out */
1262 if (wcaps & AC_WCAP_OUT_AMP) {
1263 smux->items[smux->num_items].label = "Off";
1264 smux->items[smux->num_items].index = 0;
1265 smux->num_items++;
1266 spec->spdif_mute = 1;
1267 }
d9737751 1268 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1269 err = snd_hda_ctl_add(codec,
d9737751
MR		 1270 snd_ctl_new1(&stac_smux_mixer, codec));
1271 if (err < 0)
1272 return err;
1273 }
c7d4b2fa 1274
dabbed6f
M		 1275 if (spec->multiout.dig_out_nid) {
1276 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1277 if (err < 0)
1278 return err;
9a08160b
TI		 1279 err = snd_hda_create_spdif_share_sw(codec,
1280 &spec->multiout);
1281 if (err < 0)
1282 return err;
1283 spec->multiout.share_spdif = 1;
dabbed6f 1284 }
da74ae3e 1285 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1286 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1287 if (err < 0)
1288 return err;
1289 }
2134ea4f
TI		 1290
1291 /* if we have no master control, let's create it */
1292 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1293 unsigned int vmaster_tlv[4];
2134ea4f 1294 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1295 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1296 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1297 vmaster_tlv, slave_vols);
2134ea4f
TI		 1298 if (err < 0)
1299 return err;
1300 }
1301 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1302 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1303 NULL, slave_sws);
1304 if (err < 0)
1305 return err;
1306 }
1307
603c4019 1308 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1309
1310 /* create jack input elements */
1311 if (spec->hp_detect) {
1312 for (i = 0; i < cfg->hp_outs; i++) {
1313 int type = SND_JACK_HEADPHONE;
1314 nid = cfg->hp_pins[i];
1315 /* jack detection */
1316 if (cfg->hp_outs == i)
1317 type |= SND_JACK_LINEOUT;
1318 err = stac92xx_add_jack(codec, nid, type);
1319 if (err < 0)
1320 return err;
1321 }
1322 }
1323 for (i = 0; i < cfg->line_outs; i++) {
1324 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1325 SND_JACK_LINEOUT);
1326 if (err < 0)
1327 return err;
1328 }
1329 for (i = 0; i < AUTO_PIN_LAST; i++) {
1330 nid = cfg->input_pins[i];
1331 if (nid) {
1332 err = stac92xx_add_jack(codec, nid,
1333 SND_JACK_MICROPHONE);
1334 if (err < 0)
1335 return err;
1336 }
1337 }
1338
dabbed6f 1339 return 0;
2f2f4251
M		 1340}
1341
403d1944 1342static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1343 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1344 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1345};
1346
58eec423
MCC		 1347static unsigned int gateway9200_m4_pin_configs[8] = {
1348 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1349 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1350};
1351static unsigned int gateway9200_m4_2_pin_configs[8] = {
1352 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1353 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1354};
1355
1356/*
dfe495d0
TI		 1357 STAC 9200 pin configs for
1358 102801A8
1359 102801DE
1360 102801E8
1361*/
1362static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1363 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1364 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1365};
1366
1367/*
1368 STAC 9200 pin configs for
1369 102801C0
1370 102801C1
1371*/
1372static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1373 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1374 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1375};
1376
1377/*
1378 STAC 9200 pin configs for
1379 102801C4 (Dell Dimension E310)
1380 102801C5
1381 102801C7
1382 102801D9
1383 102801DA
1384 102801E3
1385*/
1386static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1387 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1388 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1389};
1390
1391
1392/*
1393 STAC 9200-32 pin configs for
1394 102801B5 (Dell Inspiron 630m)
1395 102801D8 (Dell Inspiron 640m)
1396*/
1397static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1398 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1399 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1400};
1401
1402/*
1403 STAC 9200-32 pin configs for
1404 102801C2 (Dell Latitude D620)
1405 102801C8
1406 102801CC (Dell Latitude D820)
1407 102801D4
1408 102801D6
1409*/
1410static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1411 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1412 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1413};
1414
1415/*
1416 STAC 9200-32 pin configs for
1417 102801CE (Dell XPS M1710)
1418 102801CF (Dell Precision M90)
1419*/
1420static unsigned int dell9200_m23_pin_configs[8] = {
1421 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1422 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1423};
1424
1425/*
1426 STAC 9200-32 pin configs for
1427 102801C9
1428 102801CA
1429 102801CB (Dell Latitude 120L)
1430 102801D3
1431*/
1432static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1433 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1434 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1435};
1436
1437/*
1438 STAC 9200-32 pin configs for
1439 102801BD (Dell Inspiron E1505n)
1440 102801EE
1441 102801EF
1442*/
1443static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1444 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1445 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1446};
1447
1448/*
1449 STAC 9200-32 pin configs for
1450 102801F5 (Dell Inspiron 1501)
1451 102801F6
1452*/
1453static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1454 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1455 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1456};
1457
1458/*
1459 STAC 9200-32
1460 102801CD (Dell Inspiron E1705/9400)
1461*/
1462static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1463 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1464 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1465};
1466
bf277785
TD		 1467static unsigned int oqo9200_pin_configs[8] = {
1468 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1469 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1470};
1471
dfe495d0 1472
f5fcc13c
TI		 1473static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1474 [STAC_REF] = ref9200_pin_configs,
bf277785 1475 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1476 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1477 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1478 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1479 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1480 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1481 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1482 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1483 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1484 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1485 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1486 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1487 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1488 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1489};
1490
f5fcc13c
TI		 1491static const char *stac9200_models[STAC_9200_MODELS] = {
1492 [STAC_REF] = "ref",
bf277785 1493 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1494 [STAC_9200_DELL_D21] = "dell-d21",
1495 [STAC_9200_DELL_D22] = "dell-d22",
1496 [STAC_9200_DELL_D23] = "dell-d23",
1497 [STAC_9200_DELL_M21] = "dell-m21",
1498 [STAC_9200_DELL_M22] = "dell-m22",
1499 [STAC_9200_DELL_M23] = "dell-m23",
1500 [STAC_9200_DELL_M24] = "dell-m24",
1501 [STAC_9200_DELL_M25] = "dell-m25",
1502 [STAC_9200_DELL_M26] = "dell-m26",
1503 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1504 [STAC_9200_M4] = "gateway-m4",
1505 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1506 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1507};
1508
1509static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1510 /* SigmaTel reference board */
1511 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1512 "DFI LanParty", STAC_REF),
e7377071 1513 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1515 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1517 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1519 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1521 "unknown Dell", STAC_9200_DELL_D22),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1523 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1525 "Dell Latitude D620", STAC_9200_DELL_M22),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1527 "unknown Dell", STAC_9200_DELL_D23),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1529 "unknown Dell", STAC_9200_DELL_D23),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1531 "unknown Dell", STAC_9200_DELL_M22),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1533 "unknown Dell", STAC_9200_DELL_M24),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1535 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1537 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1539 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1541 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1543 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1545 "Dell Precision M90", STAC_9200_DELL_M23),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1547 "unknown Dell", STAC_9200_DELL_M22),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1549 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1551 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1553 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1555 "unknown Dell", STAC_9200_DELL_D23),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1557 "unknown Dell", STAC_9200_DELL_D23),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1559 "unknown Dell", STAC_9200_DELL_D21),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1561 "unknown Dell", STAC_9200_DELL_D23),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1563 "unknown Dell", STAC_9200_DELL_D21),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1565 "unknown Dell", STAC_9200_DELL_M25),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1567 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1569 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1571 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1572 /* Panasonic */
117f257d 1573 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1574 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1575 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1576 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1577 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1578 /* OQO Mobile */
1579 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1580 {} /* terminator */
1581};
1582
8e21c34c
TD		 1583static unsigned int ref925x_pin_configs[8] = {
1584 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1585 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1586};
1587
9cb36c2a
MCC		 1588static unsigned int stac925xM1_pin_configs[8] = {
1589 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1590 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1591};
1592
9cb36c2a
MCC		 1593static unsigned int stac925xM1_2_pin_configs[8] = {
1594 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1595 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1596};
58eec423 1597
9cb36c2a
MCC		 1598static unsigned int stac925xM2_pin_configs[8] = {
1599 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1600 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1601};
1602
8e21c34c 1603static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1604 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1605 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1606};
1607
9cb36c2a
MCC		 1608static unsigned int stac925xM3_pin_configs[8] = {
1609 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1610 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1611};
58eec423 1612
9cb36c2a
MCC		 1613static unsigned int stac925xM5_pin_configs[8] = {
1614 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1615 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1616};
1617
9cb36c2a
MCC		 1618static unsigned int stac925xM6_pin_configs[8] = {
1619 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1620 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1621};
1622
1623static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1624 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1625 [STAC_M1] = stac925xM1_pin_configs,
1626 [STAC_M1_2] = stac925xM1_2_pin_configs,
1627 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1628 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1629 [STAC_M3] = stac925xM3_pin_configs,
1630 [STAC_M5] = stac925xM5_pin_configs,
1631 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1632};
1633
1634static const char *stac925x_models[STAC_925x_MODELS] = {
1635 [STAC_REF] = "ref",
9cb36c2a
MCC		 1636 [STAC_M1] = "m1",
1637 [STAC_M1_2] = "m1-2",
1638 [STAC_M2] = "m2",
8e21c34c 1639 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1640 [STAC_M3] = "m3",
1641 [STAC_M5] = "m5",
1642 [STAC_M6] = "m6",
8e21c34c
TD		 1643};
1644
9cb36c2a 1645static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1646 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1647 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1648 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1649 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1650 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1651 /* Not sure about the brand name for those */
1652 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1653 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1654 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1655 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1656 {} /* terminator */
8e21c34c
TD		 1657};
1658
1659static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1660 /* SigmaTel reference board */
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1662 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1663
1664 /* Default table for unknown ID */
1665 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1666
8e21c34c
TD		 1667 {} /* terminator */
1668};
1669
a7662640 1670static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1671 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1672 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1673 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1674 0x01452050,
1675};
1676
1677static unsigned int dell_m6_pin_configs[13] = {
1678 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1679 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1680 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1681 0x4f0000f0,
e1f0d669
MR		 1682};
1683
1684static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1685 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1686 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1687 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1688 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1689 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1690};
1691
1692static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1693 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1694 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1695 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1696 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1697 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1698 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1699};
1700
1701static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1702 /* SigmaTel reference board */
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1704 "DFI LanParty", STAC_92HD73XX_REF),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1706 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1708 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1710 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1712 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1714 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1716 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1718 "unknown Dell", STAC_DELL_M6_DMIC),
1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1720 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1722 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1724 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1725 {} /* terminator */
1726};
1727
d0513fc6
MR		 1728static unsigned int ref92hd83xxx_pin_configs[14] = {
1729 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1730 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1731 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1732 0x01451160, 0x98560170,
1733};
1734
1735static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1736 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1737};
1738
1739static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1740 [STAC_92HD83XXX_REF] = "ref",
1741};
1742
1743static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1744 /* SigmaTel reference board */
1745 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1746 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1747 {} /* terminator */
d0513fc6
MR		 1748};
1749
0ffa9807 1750static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1751 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1752 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1753 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1754};
1755
0ffa9807 1756static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1757 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1758 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1759 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1760};
1761
0ffa9807 1762static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1763 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1764 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1765 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1766};
1767
3a7abfd2
MR		 1768static unsigned int dell_m4_3_pin_configs[11] = {
1769 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1770 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1771 0x40f000f0, 0x044413b0, 0x044413b0,
1772};
1773
e035b841
MR		 1774static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1775 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1776 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1777 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1778 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1779 [STAC_HP_M4] = NULL,
1b0652eb 1780 [STAC_HP_DV5] = NULL,
e035b841
MR		 1781};
1782
1783static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1784 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1785 [STAC_DELL_M4_1] = "dell-m4-1",
1786 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1787 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1788 [STAC_HP_M4] = "hp-m4",
1b0652eb 1789 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR		 1790};
1791
1792static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1793 /* SigmaTel reference board */
1794 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1795 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1797 "HP dv5", STAC_HP_M4),
1798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1799 "HP dv7", STAC_HP_M4),
69dfaefe
TI		 1800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1801 "HP dv7", STAC_HP_M4),
dafb70ce 1802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1803 "HP dv5", STAC_HP_DV5),
9a9e2359
MR		 1804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1805 "unknown HP", STAC_HP_M4),
a7662640
MR		 1806 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1807 "unknown Dell", STAC_DELL_M4_1),
1808 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1809 "unknown Dell", STAC_DELL_M4_1),
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1811 "unknown Dell", STAC_DELL_M4_1),
1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1813 "unknown Dell", STAC_DELL_M4_1),
1814 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1815 "unknown Dell", STAC_DELL_M4_1),
1816 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1817 "unknown Dell", STAC_DELL_M4_1),
1818 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1819 "unknown Dell", STAC_DELL_M4_1),
1820 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1821 "unknown Dell", STAC_DELL_M4_2),
1822 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1823 "unknown Dell", STAC_DELL_M4_2),
1824 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1825 "unknown Dell", STAC_DELL_M4_2),
1826 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1827 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1828 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1829 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1830 {} /* terminator */
1831};
1832
403d1944
MP		 1833static unsigned int ref922x_pin_configs[10] = {
1834 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1835 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1836 0x40000100, 0x40000100,
1837};
1838
dfe495d0
TI		 1839/*
1840 STAC 922X pin configs for
1841 102801A7
1842 102801AB
1843 102801A9
1844 102801D1
1845 102801D2
1846*/
1847static unsigned int dell_922x_d81_pin_configs[10] = {
1848 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1849 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1850 0x01813122, 0x400001f2,
1851};
1852
1853/*
1854 STAC 922X pin configs for
1855 102801AC
1856 102801D0
1857*/
1858static unsigned int dell_922x_d82_pin_configs[10] = {
1859 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1860 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1861 0x01813122, 0x400001f1,
1862};
1863
1864/*
1865 STAC 922X pin configs for
1866 102801BF
1867*/
1868static unsigned int dell_922x_m81_pin_configs[10] = {
1869 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1870 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1871 0x40C003f1, 0x405003f0,
1872};
1873
1874/*
1875 STAC 9221 A1 pin configs for
1876 102801D7 (Dell XPS M1210)
1877*/
1878static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1879 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1880 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1881 0x508003f3, 0x405003f4,
1882};
1883
403d1944 1884static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1885 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1886 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1887 0x02a19120, 0x40000100,
1888};
1889
1890static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1891 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1892 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1893 0x02a19320, 0x40000100,
1894};
1895
5d5d3bc3
IZ		 1896static unsigned int intel_mac_v1_pin_configs[10] = {
1897 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1898 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1899 0x400000fc, 0x400000fb,
1900};
1901
1902static unsigned int intel_mac_v2_pin_configs[10] = {
1903 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1904 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1905 0x400000fc, 0x400000fb,
6f0778d8
NB		 1906};
1907
5d5d3bc3
IZ		 1908static unsigned int intel_mac_v3_pin_configs[10] = {
1909 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1910 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1911 0x400000fc, 0x400000fb,
1912};
1913
5d5d3bc3
IZ		 1914static unsigned int intel_mac_v4_pin_configs[10] = {
1915 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1916 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1917 0x400000fc, 0x400000fb,
1918};
1919
5d5d3bc3
IZ		 1920static unsigned int intel_mac_v5_pin_configs[10] = {
1921 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1922 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1923 0x400000fc, 0x400000fb,
0dae0f83
TI		 1924};
1925
8c650087
MCC		 1926static unsigned int ecs202_pin_configs[10] = {
1927 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1928 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1929 0x9037012e, 0x40e000f2,
1930};
76c08828 1931
19039bd0 1932static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1933 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1934 [STAC_D945GTP3] = d945gtp3_pin_configs,
1935 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1936 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1937 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1938 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1939 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1940 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1941 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1942 /* for backward compatibility */
5d5d3bc3
IZ		 1943 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1944 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1945 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1946 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1947 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1948 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1949 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1950 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1951 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1952 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1953 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1954};
1955
f5fcc13c
TI		 1956static const char *stac922x_models[STAC_922X_MODELS] = {
1957 [STAC_D945_REF] = "ref",
1958 [STAC_D945GTP5] = "5stack",
1959 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1960 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1961 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1962 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1963 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1964 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1965 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1966 /* for backward compatibility */
f5fcc13c 1967 [STAC_MACMINI] = "macmini",
3fc24d85 1968 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1969 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1970 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1971 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1972 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1973 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1974 [STAC_922X_DELL_D81] = "dell-d81",
1975 [STAC_922X_DELL_D82] = "dell-d82",
1976 [STAC_922X_DELL_M81] = "dell-m81",
1977 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1978};
1979
1980static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1981 /* SigmaTel reference board */
1982 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1983 "DFI LanParty", STAC_D945_REF),
1984 /* Intel 945G based systems */
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1986 "Intel D945G", STAC_D945GTP3),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1988 "Intel D945G", STAC_D945GTP3),
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1990 "Intel D945G", STAC_D945GTP3),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1992 "Intel D945G", STAC_D945GTP3),
1993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1994 "Intel D945G", STAC_D945GTP3),
1995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1996 "Intel D945G", STAC_D945GTP3),
1997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1998 "Intel D945G", STAC_D945GTP3),
1999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2000 "Intel D945G", STAC_D945GTP3),
2001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2002 "Intel D945G", STAC_D945GTP3),
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2004 "Intel D945G", STAC_D945GTP3),
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2006 "Intel D945G", STAC_D945GTP3),
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2008 "Intel D945G", STAC_D945GTP3),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2010 "Intel D945G", STAC_D945GTP3),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2012 "Intel D945G", STAC_D945GTP3),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2014 "Intel D945G", STAC_D945GTP3),
2015 /* Intel D945G 5-stack systems */
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2017 "Intel D945G", STAC_D945GTP5),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2019 "Intel D945G", STAC_D945GTP5),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2021 "Intel D945G", STAC_D945GTP5),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2023 "Intel D945G", STAC_D945GTP5),
2024 /* Intel 945P based systems */
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2026 "Intel D945P", STAC_D945GTP3),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2028 "Intel D945P", STAC_D945GTP3),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2030 "Intel D945P", STAC_D945GTP3),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2032 "Intel D945P", STAC_D945GTP3),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2034 "Intel D945P", STAC_D945GTP3),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2036 "Intel D945P", STAC_D945GTP5),
2037 /* other systems */
536319af 2038 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2039 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2040 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2041 /* Dell systems */
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2043 "unknown Dell", STAC_922X_DELL_D81),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2045 "unknown Dell", STAC_922X_DELL_D81),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2047 "unknown Dell", STAC_922X_DELL_D81),
2048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2049 "unknown Dell", STAC_922X_DELL_D82),
2050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2051 "unknown Dell", STAC_922X_DELL_M81),
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2053 "unknown Dell", STAC_922X_DELL_D82),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2055 "unknown Dell", STAC_922X_DELL_D81),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2057 "unknown Dell", STAC_922X_DELL_D81),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2059 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2060 /* ECS/PC Chips boards */
2061 SND_PCI_QUIRK(0x1019, 0x2144,
2062 "ECS/PC chips", STAC_ECS_202),
2063 SND_PCI_QUIRK(0x1019, 0x2608,
2064 "ECS/PC chips", STAC_ECS_202),
2065 SND_PCI_QUIRK(0x1019, 0x2633,
2066 "ECS/PC chips P17G/1333", STAC_ECS_202),
2067 SND_PCI_QUIRK(0x1019, 0x2811,
2068 "ECS/PC chips", STAC_ECS_202),
2069 SND_PCI_QUIRK(0x1019, 0x2812,
2070 "ECS/PC chips", STAC_ECS_202),
2071 SND_PCI_QUIRK(0x1019, 0x2813,
2072 "ECS/PC chips", STAC_ECS_202),
2073 SND_PCI_QUIRK(0x1019, 0x2814,
2074 "ECS/PC chips", STAC_ECS_202),
2075 SND_PCI_QUIRK(0x1019, 0x2815,
2076 "ECS/PC chips", STAC_ECS_202),
2077 SND_PCI_QUIRK(0x1019, 0x2816,
2078 "ECS/PC chips", STAC_ECS_202),
2079 SND_PCI_QUIRK(0x1019, 0x2817,
2080 "ECS/PC chips", STAC_ECS_202),
2081 SND_PCI_QUIRK(0x1019, 0x2818,
2082 "ECS/PC chips", STAC_ECS_202),
2083 SND_PCI_QUIRK(0x1019, 0x2819,
2084 "ECS/PC chips", STAC_ECS_202),
2085 SND_PCI_QUIRK(0x1019, 0x2820,
2086 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2087 {} /* terminator */
2088};
2089
3cc08dc6 2090static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2091 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2092 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2093 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2094 0x01c42190, 0x40000100,
3cc08dc6
MP		 2095};
2096
93ed1503 2097static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2098 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2099 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2100 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2101 0x40000100, 0x40000100
2102};
2103
93ed1503
TD		 2104static unsigned int d965_5st_pin_configs[14] = {
2105 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2106 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2107 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2108 0x40000100, 0x40000100
2109};
2110
4ff076e5
TD		 2111static unsigned int dell_3st_pin_configs[14] = {
2112 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2113 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2114 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2115 0x40c003fc, 0x40000100
2116};
2117
93ed1503 2118static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2119 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2120 [STAC_D965_REF] = ref927x_pin_configs,
2121 [STAC_D965_3ST] = d965_3st_pin_configs,
2122 [STAC_D965_5ST] = d965_5st_pin_configs,
2123 [STAC_DELL_3ST] = dell_3st_pin_configs,
2124 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2125};
2126
f5fcc13c 2127static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2128 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2129 [STAC_D965_REF] = "ref",
2130 [STAC_D965_3ST] = "3stack",
2131 [STAC_D965_5ST] = "5stack",
2132 [STAC_DELL_3ST] = "dell-3stack",
2133 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2134};
2135
2136static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2137 /* SigmaTel reference board */
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2139 "DFI LanParty", STAC_D965_REF),
81d3dbde 2140 /* Intel 946 based systems */
f5fcc13c
TI		 2141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2143 /* 965 based 3 stack systems */
f5fcc13c
TI		 2144 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2160 /* Dell 3 stack systems */
8e9068b1 2161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2162 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2165 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2174 /* 965 based 5 stack systems */
f5fcc13c
TI		 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2184 {} /* terminator */
2185};
2186
f3302a59
MP		 2187static unsigned int ref9205_pin_configs[12] = {
2188 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2189 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2190 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2191};
2192
dfe495d0
TI		 2193/*
2194 STAC 9205 pin configs for
2195 102801F1
2196 102801F2
2197 102801FC
2198 102801FD
2199 10280204
2200 1028021F
3fa2ef74 2201 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2202*/
2203static unsigned int dell_9205_m42_pin_configs[12] = {
2204 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2205 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2206 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2207};
2208
2209/*
2210 STAC 9205 pin configs for
2211 102801F9
2212 102801FA
2213 102801FE
2214 102801FF (Dell Precision M4300)
2215 10280206
2216 10280200
2217 10280201
2218*/
2219static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2220 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2221 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2222 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2223};
2224
dfe495d0 2225static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2226 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2227 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2228 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2229};
2230
f5fcc13c 2231static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2232 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2233 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2234 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2235 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2236};
2237
f5fcc13c
TI		 2238static const char *stac9205_models[STAC_9205_MODELS] = {
2239 [STAC_9205_REF] = "ref",
dfe495d0 2240 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2241 [STAC_9205_DELL_M43] = "dell-m43",
2242 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2243};
2244
2245static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2246 /* SigmaTel reference board */
2247 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2248 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2249 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2250 "unknown Dell", STAC_9205_DELL_M42),
2251 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2252 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2253 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2254 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2255 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2256 "Dell Precision", STAC_9205_DELL_M43),
2257 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2258 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2259 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2260 "unknown Dell", STAC_9205_DELL_M42),
2261 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2262 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2264 "Dell Precision", STAC_9205_DELL_M43),
2265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2266 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2268 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2270 "Dell Precision", STAC_9205_DELL_M43),
2271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2272 "Dell Precision", STAC_9205_DELL_M43),
2273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2274 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2276 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2278 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2279 {} /* terminator */
2280};
2281
11b44bbd
RF		 2282static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2283{
2284 int i;
2285 struct sigmatel_spec *spec = codec->spec;
2286
af9f341a
TI		 2287 kfree(spec->pin_configs);
2288 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2289 GFP_KERNEL);
2290 if (!spec->pin_configs)
2291 return -ENOMEM;
11b44bbd
RF		 2292
2293 for (i = 0; i < spec->num_pins; i++) {
2294 hda_nid_t nid = spec->pin_nids[i];
2295 unsigned int pin_cfg;
2296
2297 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2298 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2299 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2300 nid, pin_cfg);
af9f341a 2301 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2302 }
2303
2304 return 0;
2305}
2306
87d48363
MR		 2307static void stac92xx_set_config_reg(struct hda_codec *codec,
2308 hda_nid_t pin_nid, unsigned int pin_config)
2309{
2310 int i;
2311 snd_hda_codec_write(codec, pin_nid, 0,
2312 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2313 pin_config & 0x000000ff);
2314 snd_hda_codec_write(codec, pin_nid, 0,
2315 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2316 (pin_config & 0x0000ff00) >> 8);
2317 snd_hda_codec_write(codec, pin_nid, 0,
2318 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2319 (pin_config & 0x00ff0000) >> 16);
2320 snd_hda_codec_write(codec, pin_nid, 0,
2321 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2322 pin_config >> 24);
2323 i = snd_hda_codec_read(codec, pin_nid, 0,
2324 AC_VERB_GET_CONFIG_DEFAULT,
2325 0x00);
2326 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2327 pin_nid, i);
2328}
2329
2f2f4251
M		 2330static void stac92xx_set_config_regs(struct hda_codec *codec)
2331{
2332 int i;
2333 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2334
87d48363
MR		 2335 if (!spec->pin_configs)
2336 return;
11b44bbd 2337
87d48363
MR		 2338 for (i = 0; i < spec->num_pins; i++)
2339 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2340 spec->pin_configs[i]);
2f2f4251 2341}
2f2f4251 2342
af9f341a
TI		 2343static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2344{
2345 struct sigmatel_spec *spec = codec->spec;
2346
2347 if (!pins)
2348 return stac92xx_save_bios_config_regs(codec);
2349
2350 kfree(spec->pin_configs);
2351 spec->pin_configs = kmemdup(pins,
2352 spec->num_pins * sizeof(*pins),
2353 GFP_KERNEL);
2354 if (!spec->pin_configs)
2355 return -ENOMEM;
2356
2357 stac92xx_set_config_regs(codec);
2358 return 0;
2359}
2360
2361static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2362 unsigned int cfg)
2363{
2364 struct sigmatel_spec *spec = codec->spec;
2365 int i;
2366
2367 for (i = 0; i < spec->num_pins; i++) {
2368 if (spec->pin_nids[i] == nid) {
2369 spec->pin_configs[i] = cfg;
2370 stac92xx_set_config_reg(codec, nid, cfg);
2371 break;
2372 }
2373 }
2374}
2375
dabbed6f 2376/*
c7d4b2fa 2377 * Analog playback callbacks
dabbed6f 2378 */
c7d4b2fa
M		 2379static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2380 struct hda_codec *codec,
c8b6bf9b 2381 struct snd_pcm_substream *substream)
2f2f4251 2382{
dabbed6f 2383 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2384 if (spec->stream_delay)
2385 msleep(spec->stream_delay);
9a08160b
TI		 2386 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2387 hinfo);
2f2f4251
M		 2388}
2389
2f2f4251
M		 2390static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2391 struct hda_codec *codec,
2392 unsigned int stream_tag,
2393 unsigned int format,
c8b6bf9b 2394 struct snd_pcm_substream *substream)
2f2f4251
M		 2395{
2396 struct sigmatel_spec *spec = codec->spec;
403d1944 2397 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2398}
2399
2400static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2401 struct hda_codec *codec,
c8b6bf9b 2402 struct snd_pcm_substream *substream)
2f2f4251
M		 2403{
2404 struct sigmatel_spec *spec = codec->spec;
2405 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2406}
2407
dabbed6f
M		 2408/*
2409 * Digital playback callbacks
2410 */
2411static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2412 struct hda_codec *codec,
c8b6bf9b 2413 struct snd_pcm_substream *substream)
dabbed6f
M		 2414{
2415 struct sigmatel_spec *spec = codec->spec;
2416 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2417}
2418
2419static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2420 struct hda_codec *codec,
c8b6bf9b 2421 struct snd_pcm_substream *substream)
dabbed6f
M		 2422{
2423 struct sigmatel_spec *spec = codec->spec;
2424 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2425}
2426
6b97eb45
TI		 2427static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2428 struct hda_codec *codec,
2429 unsigned int stream_tag,
2430 unsigned int format,
2431 struct snd_pcm_substream *substream)
2432{
2433 struct sigmatel_spec *spec = codec->spec;
2434 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2435 stream_tag, format, substream);
2436}
2437
dabbed6f 2438
2f2f4251
M		 2439/*
2440 * Analog capture callbacks
2441 */
2442static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2443 struct hda_codec *codec,
2444 unsigned int stream_tag,
2445 unsigned int format,
c8b6bf9b 2446 struct snd_pcm_substream *substream)
2f2f4251
M		 2447{
2448 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2449 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2450
8daaaa97
MR		 2451 if (spec->powerdown_adcs) {
2452 msleep(40);
8c2f767b 2453 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2454 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2455 }
2456 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2457 return 0;
2458}
2459
2460static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2461 struct hda_codec *codec,
c8b6bf9b 2462 struct snd_pcm_substream *substream)
2f2f4251
M		 2463{
2464 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2465 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2466
8daaaa97
MR		 2467 snd_hda_codec_cleanup_stream(codec, nid);
2468 if (spec->powerdown_adcs)
8c2f767b 2469 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2470 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2471 return 0;
2472}
2473
dabbed6f
M		 2474static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2475 .substreams = 1,
2476 .channels_min = 2,
2477 .channels_max = 2,
2478 /* NID is set in stac92xx_build_pcms */
2479 .ops = {
2480 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2481 .close = stac92xx_dig_playback_pcm_close,
2482 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2483 },
2484};
2485
2486static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2487 .substreams = 1,
2488 .channels_min = 2,
2489 .channels_max = 2,
2490 /* NID is set in stac92xx_build_pcms */
2491};
2492
2f2f4251
M		 2493static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2494 .substreams = 1,
2495 .channels_min = 2,
c7d4b2fa 2496 .channels_max = 8,
2f2f4251
M		 2497 .nid = 0x02, /* NID to query formats and rates */
2498 .ops = {
2499 .open = stac92xx_playback_pcm_open,
2500 .prepare = stac92xx_playback_pcm_prepare,
2501 .cleanup = stac92xx_playback_pcm_cleanup
2502 },
2503};
2504
3cc08dc6
MP		 2505static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2506 .substreams = 1,
2507 .channels_min = 2,
2508 .channels_max = 2,
2509 .nid = 0x06, /* NID to query formats and rates */
2510 .ops = {
2511 .open = stac92xx_playback_pcm_open,
2512 .prepare = stac92xx_playback_pcm_prepare,
2513 .cleanup = stac92xx_playback_pcm_cleanup
2514 },
2515};
2516
2f2f4251 2517static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2518 .channels_min = 2,
2519 .channels_max = 2,
9e05b7a3 2520 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2521 .ops = {
2522 .prepare = stac92xx_capture_pcm_prepare,
2523 .cleanup = stac92xx_capture_pcm_cleanup
2524 },
2525};
2526
2527static int stac92xx_build_pcms(struct hda_codec *codec)
2528{
2529 struct sigmatel_spec *spec = codec->spec;
2530 struct hda_pcm *info = spec->pcm_rec;
2531
2532 codec->num_pcms = 1;
2533 codec->pcm_info = info;
2534
c7d4b2fa 2535 info->name = "STAC92xx Analog";
2f2f4251 2536 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2537 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2538 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2539 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2540
2541 if (spec->alt_switch) {
2542 codec->num_pcms++;
2543 info++;
2544 info->name = "STAC92xx Analog Alt";
2545 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2546 }
2f2f4251 2547
dabbed6f
M		 2548 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2549 codec->num_pcms++;
2550 info++;
2551 info->name = "STAC92xx Digital";
8c441982 2552 info->pcm_type = spec->autocfg.dig_out_type;
dabbed6f
M		 2553 if (spec->multiout.dig_out_nid) {
2554 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2555 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2556 }
2557 if (spec->dig_in_nid) {
2558 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2559 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2560 }
2561 }
2562
2f2f4251
M		 2563 return 0;
2564}
2565
c960a03b
TI		 2566static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2567{
2568 unsigned int pincap = snd_hda_param_read(codec, nid,
2569 AC_PAR_PIN_CAP);
2570 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2571 if (pincap & AC_PINCAP_VREF_100)
2572 return AC_PINCTL_VREF_100;
2573 if (pincap & AC_PINCAP_VREF_80)
2574 return AC_PINCTL_VREF_80;
2575 if (pincap & AC_PINCAP_VREF_50)
2576 return AC_PINCTL_VREF_50;
2577 if (pincap & AC_PINCAP_VREF_GRD)
2578 return AC_PINCTL_VREF_GRD;
2579 return 0;
2580}
2581
403d1944
MP		 2582static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2583
2584{
82beb8fd
TI		 2585 snd_hda_codec_write_cache(codec, nid, 0,
2586 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2587}
2588
7c2ba97b
MR		 2589#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2590
2591static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2592 struct snd_ctl_elem_value *ucontrol)
2593{
2594 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2595 struct sigmatel_spec *spec = codec->spec;
2596
d7a89436 2597 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2598 return 0;
2599}
2600
c6e4c666
TI		 2601static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2602 unsigned char type);
2603
7c2ba97b
MR		 2604static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2605 struct snd_ctl_elem_value *ucontrol)
2606{
2607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2608 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2609 int nid = kcontrol->private_value;
2610
2611 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2612
2613 /* check to be sure that the ports are upto date with
2614 * switch changes
2615 */
c6e4c666 2616 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2617
2618 return 1;
2619}
2620
a5ce8890 2621#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2622
2623static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2624{
2625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2626 struct sigmatel_spec *spec = codec->spec;
2627 int io_idx = kcontrol-> private_value & 0xff;
2628
2629 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2630 return 0;
2631}
2632
2633static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2634{
2635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2636 struct sigmatel_spec *spec = codec->spec;
2637 hda_nid_t nid = kcontrol->private_value >> 8;
2638 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2639 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2640
2641 spec->io_switch[io_idx] = val;
2642
2643 if (val)
2644 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2645 else {
2646 unsigned int pinctl = AC_PINCTL_IN_EN;
2647 if (io_idx) /* set VREF for mic */
2648 pinctl |= stac92xx_get_vref(codec, nid);
2649 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2650 }
40c1d308
JZ		 2651
2652 /* check the auto-mute again: we need to mute/unmute the speaker
2653 * appropriately according to the pin direction
2654 */
2655 if (spec->hp_detect)
c6e4c666 2656 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2657
403d1944
MP		 2658 return 1;
2659}
2660
0fb87bb4
ML		 2661#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2662
2663static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2664 struct snd_ctl_elem_value *ucontrol)
2665{
2666 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2667 struct sigmatel_spec *spec = codec->spec;
2668
2669 ucontrol->value.integer.value[0] = spec->clfe_swap;
2670 return 0;
2671}
2672
2673static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2674 struct snd_ctl_elem_value *ucontrol)
2675{
2676 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2677 struct sigmatel_spec *spec = codec->spec;
2678 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2679 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2680
68ea7b2f 2681 if (spec->clfe_swap == val)
0fb87bb4
ML		 2682 return 0;
2683
68ea7b2f 2684 spec->clfe_swap = val;
0fb87bb4
ML		 2685
2686 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2687 spec->clfe_swap ? 0x4 : 0x0);
2688
2689 return 1;
2690}
2691
7c2ba97b
MR		 2692#define STAC_CODEC_HP_SWITCH(xname) \
2693 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2694 .name = xname, \
2695 .index = 0, \
2696 .info = stac92xx_hp_switch_info, \
2697 .get = stac92xx_hp_switch_get, \
2698 .put = stac92xx_hp_switch_put, \
2699 }
2700
403d1944
MP		 2701#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2702 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2703 .name = xname, \
2704 .index = 0, \
2705 .info = stac92xx_io_switch_info, \
2706 .get = stac92xx_io_switch_get, \
2707 .put = stac92xx_io_switch_put, \
2708 .private_value = xpval, \
2709 }
2710
0fb87bb4
ML		 2711#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2712 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2713 .name = xname, \
2714 .index = 0, \
2715 .info = stac92xx_clfe_switch_info, \
2716 .get = stac92xx_clfe_switch_get, \
2717 .put = stac92xx_clfe_switch_put, \
2718 .private_value = xpval, \
2719 }
403d1944 2720
c7d4b2fa
M		 2721enum {
2722 STAC_CTL_WIDGET_VOL,
2723 STAC_CTL_WIDGET_MUTE,
09a99959 2724 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2725 STAC_CTL_WIDGET_AMP_MUX,
2726 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2727 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2728 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2729 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2730};
2731
c8b6bf9b 2732static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2733 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2734 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2735 STAC_MONO_MUX,
89385035
MR		 2736 STAC_AMP_MUX,
2737 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2738 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2739 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2740 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2741};
2742
2743/* add dynamic controls */
4d4e9bb3
TI		 2744static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2745 struct snd_kcontrol_new *ktemp,
2746 int idx, const char *name,
2747 unsigned long val)
c7d4b2fa 2748{
c8b6bf9b 2749 struct snd_kcontrol_new *knew;
c7d4b2fa 2750
603c4019
TI		 2751 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2752 knew = snd_array_new(&spec->kctls);
2753 if (!knew)
2754 return -ENOMEM;
4d4e9bb3 2755 *knew = *ktemp;
4682eee0 2756 knew->index = idx;
82fe0c58 2757 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2758 if (!knew->name)
c7d4b2fa
M		 2759 return -ENOMEM;
2760 knew->private_value = val;
c7d4b2fa
M		 2761 return 0;
2762}
2763
4d4e9bb3
TI		 2764static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2765 int type, int idx, const char *name,
2766 unsigned long val)
2767{
2768 return stac92xx_add_control_temp(spec,
2769 &stac92xx_control_templates[type],
2770 idx, name, val);
2771}
2772
4682eee0
MR		 2773
2774/* add dynamic controls */
4d4e9bb3
TI		 2775static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2776 const char *name, unsigned long val)
4682eee0
MR		 2777{
2778 return stac92xx_add_control_idx(spec, type, 0, name, val);
2779}
2780
c21ca4a8
TI		 2781/* check whether the line-input can be used as line-out */
2782static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2783{
2784 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2785 struct auto_pin_cfg *cfg = &spec->autocfg;
2786 hda_nid_t nid;
2787 unsigned int pincap;
8e9068b1 2788
c21ca4a8
TI		 2789 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2790 return 0;
2791 nid = cfg->input_pins[AUTO_PIN_LINE];
2792 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2793 if (pincap & AC_PINCAP_OUT)
2794 return nid;
2795 return 0;
2796}
403d1944 2797
c21ca4a8
TI		 2798/* check whether the mic-input can be used as line-out */
2799static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2800{
2801 struct sigmatel_spec *spec = codec->spec;
2802 struct auto_pin_cfg *cfg = &spec->autocfg;
2803 unsigned int def_conf, pincap;
2804 unsigned int mic_pin;
2805
2806 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2807 return 0;
2808 mic_pin = AUTO_PIN_MIC;
2809 for (;;) {
2810 hda_nid_t nid = cfg->input_pins[mic_pin];
2811 def_conf = snd_hda_codec_read(codec, nid, 0,
2812 AC_VERB_GET_CONFIG_DEFAULT, 0);
2813 /* some laptops have an internal analog microphone
2814 * which can't be used as a output */
2815 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2816 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2817 if (pincap & AC_PINCAP_OUT)
2818 return nid;
403d1944 2819 }
c21ca4a8
TI		 2820 if (mic_pin == AUTO_PIN_MIC)
2821 mic_pin = AUTO_PIN_FRONT_MIC;
2822 else
2823 break;
403d1944 2824 }
403d1944
MP		 2825 return 0;
2826}
2827
7b043899
SL		 2828static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2829{
2830 int i;
2831
2832 for (i = 0; i < spec->multiout.num_dacs; i++) {
2833 if (spec->multiout.dac_nids[i] == nid)
2834 return 1;
2835 }
2836
2837 return 0;
2838}
2839
c21ca4a8
TI		 2840static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2841{
2842 int i;
2843 if (is_in_dac_nids(spec, nid))
2844 return 1;
2845 for (i = 0; i < spec->autocfg.hp_outs; i++)
2846 if (spec->hp_dacs[i] == nid)
2847 return 1;
2848 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2849 if (spec->speaker_dacs[i] == nid)
2850 return 1;
2851 return 0;
2852}
2853
2854static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2855{
2856 struct sigmatel_spec *spec = codec->spec;
2857 int j, conn_len;
2858 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2859 unsigned int wcaps, wtype;
2860
2861 conn_len = snd_hda_get_connections(codec, nid, conn,
2862 HDA_MAX_CONNECTIONS);
2863 for (j = 0; j < conn_len; j++) {
2864 wcaps = snd_hda_param_read(codec, conn[j],
2865 AC_PAR_AUDIO_WIDGET_CAP);
2866 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2867 /* we check only analog outputs */
2868 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2869 continue;
2870 /* if this route has a free DAC, assign it */
2871 if (!check_all_dac_nids(spec, conn[j])) {
2872 if (conn_len > 1) {
2873 /* select this DAC in the pin's input mux */
2874 snd_hda_codec_write_cache(codec, nid, 0,
2875 AC_VERB_SET_CONNECT_SEL, j);
2876 }
2877 return conn[j];
2878 }
2879 }
2880 return 0;
2881}
2882
2883static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2884static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2885
3cc08dc6 2886/*
7b043899
SL		 2887 * Fill in the dac_nids table from the parsed pin configuration
2888 * This function only works when every pin in line_out_pins[]
2889 * contains atleast one DAC in its connection list. Some 92xx
2890 * codecs are not connected directly to a DAC, such as the 9200
2891 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2892 */
c21ca4a8 2893static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2894{
2895 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2896 struct auto_pin_cfg *cfg = &spec->autocfg;
2897 int i;
2898 hda_nid_t nid, dac;
7b043899 2899
c7d4b2fa
M		 2900 for (i = 0; i < cfg->line_outs; i++) {
2901 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2902 dac = get_unassigned_dac(codec, nid);
2903 if (!dac) {
df802952
TI		 2904 if (spec->multiout.num_dacs > 0) {
2905 /* we have already working output pins,
2906 * so let's drop the broken ones again
2907 */
2908 cfg->line_outs = spec->multiout.num_dacs;
2909 break;
2910 }
7b043899
SL		 2911 /* error out, no available DAC found */
2912 snd_printk(KERN_ERR
2913 "%s: No available DAC for pin 0x%x\n",
2914 __func__, nid);
2915 return -ENODEV;
2916 }
c21ca4a8
TI		 2917 add_spec_dacs(spec, dac);
2918 }
7b043899 2919
c21ca4a8
TI		 2920 /* add line-in as output */
2921 nid = check_line_out_switch(codec);
2922 if (nid) {
2923 dac = get_unassigned_dac(codec, nid);
2924 if (dac) {
2925 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2926 nid, cfg->line_outs);
2927 cfg->line_out_pins[cfg->line_outs] = nid;
2928 cfg->line_outs++;
2929 spec->line_switch = nid;
2930 add_spec_dacs(spec, dac);
2931 }
2932 }
2933 /* add mic as output */
2934 nid = check_mic_out_switch(codec);
2935 if (nid) {
2936 dac = get_unassigned_dac(codec, nid);
2937 if (dac) {
2938 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2939 nid, cfg->line_outs);
2940 cfg->line_out_pins[cfg->line_outs] = nid;
2941 cfg->line_outs++;
2942 spec->mic_switch = nid;
2943 add_spec_dacs(spec, dac);
2944 }
2945 }
c7d4b2fa 2946
c21ca4a8
TI		 2947 for (i = 0; i < cfg->hp_outs; i++) {
2948 nid = cfg->hp_pins[i];
2949 dac = get_unassigned_dac(codec, nid);
2950 if (dac) {
2951 if (!spec->multiout.hp_nid)
2952 spec->multiout.hp_nid = dac;
2953 else
2954 add_spec_extra_dacs(spec, dac);
7b043899 2955 }
c21ca4a8
TI		 2956 spec->hp_dacs[i] = dac;
2957 }
2958
2959 for (i = 0; i < cfg->speaker_outs; i++) {
2960 nid = cfg->speaker_pins[i];
2961 dac = get_unassigned_dac(codec, nid);
2962 if (dac)
2963 add_spec_extra_dacs(spec, dac);
2964 spec->speaker_dacs[i] = dac;
7b043899 2965 }
c7d4b2fa 2966
c21ca4a8 2967 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2968 spec->multiout.num_dacs,
2969 spec->multiout.dac_nids[0],
2970 spec->multiout.dac_nids[1],
2971 spec->multiout.dac_nids[2],
2972 spec->multiout.dac_nids[3],
2973 spec->multiout.dac_nids[4]);
c21ca4a8 2974
c7d4b2fa
M		 2975 return 0;
2976}
2977
eb06ed8f
TI		 2978/* create volume control/switch for the given prefx type */
2979static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2980{
2981 char name[32];
2982 int err;
2983
2984 sprintf(name, "%s Playback Volume", pfx);
2985 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2986 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2987 if (err < 0)
2988 return err;
2989 sprintf(name, "%s Playback Switch", pfx);
2990 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2991 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2992 if (err < 0)
2993 return err;
2994 return 0;
2995}
2996
ae0afd81
MR		 2997static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2998{
c21ca4a8 2999 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3000 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3001 return 1;
3002 } else {
3003 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3004 spec->multiout.num_dacs++;
3005 }
3006 return 0;
3007}
3008
c21ca4a8 3009static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3010{
c21ca4a8
TI		 3011 int i;
3012 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3013 if (!spec->multiout.extra_out_nid[i]) {
3014 spec->multiout.extra_out_nid[i] = nid;
3015 return 0;
3016 }
3017 }
3018 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3019 return 1;
ae0afd81
MR		 3020}
3021
76624534
TI		 3022static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3023{
3024 int i;
3025
3026 if (spec->autocfg.line_outs != 1)
3027 return 0;
3028 if (spec->multiout.hp_nid == nid)
3029 return 0;
3030 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3031 if (spec->multiout.extra_out_nid[i] == nid)
3032 return 0;
3033 return 1;
3034}
3035
c7d4b2fa 3036/* add playback controls from the parsed DAC table */
0fb87bb4 3037static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3038 const struct auto_pin_cfg *cfg)
c7d4b2fa 3039{
76624534 3040 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3041 static const char *chname[4] = {
3042 "Front", "Surround", NULL /*CLFE*/, "Side"
3043 };
d21995e3 3044 hda_nid_t nid = 0;
91589232
TI		 3045 int i, err;
3046 unsigned int wid_caps;
0fb87bb4 3047
c21ca4a8 3048 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3049 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3050 if (i == 2) {
3051 /* Center/LFE */
eb06ed8f
TI		 3052 err = create_controls(spec, "Center", nid, 1);
3053 if (err < 0)
c7d4b2fa 3054 return err;
eb06ed8f
TI		 3055 err = create_controls(spec, "LFE", nid, 2);
3056 if (err < 0)
c7d4b2fa 3057 return err;
0fb87bb4
ML		 3058
3059 wid_caps = get_wcaps(codec, nid);
3060
3061 if (wid_caps & AC_WCAP_LR_SWAP) {
3062 err = stac92xx_add_control(spec,
3063 STAC_CTL_WIDGET_CLFE_SWITCH,
3064 "Swap Center/LFE Playback Switch", nid);
3065
3066 if (err < 0)
3067 return err;
3068 }
3069
c7d4b2fa 3070 } else {
76624534
TI		 3071 const char *name = chname[i];
3072 /* if it's a single DAC, assign a better name */
3073 if (!i && is_unique_dac(spec, nid)) {
3074 switch (cfg->line_out_type) {
3075 case AUTO_PIN_HP_OUT:
3076 name = "Headphone";
3077 break;
3078 case AUTO_PIN_SPEAKER_OUT:
3079 name = "Speaker";
3080 break;
3081 }
3082 }
3083 err = create_controls(spec, name, nid, 3);
eb06ed8f 3084 if (err < 0)
c7d4b2fa
M		 3085 return err;
3086 }
3087 }
3088
a9cb5c90 3089 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3090 err = stac92xx_add_control(spec,
3091 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3092 "Headphone as Line Out Switch",
3093 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3094 if (err < 0)
3095 return err;
3096 }
3097
b5895dc8 3098 if (spec->line_switch) {
c21ca4a8
TI		 3099 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3100 "Line In as Output Switch",
3101 spec->line_switch << 8);
3102 if (err < 0)
3103 return err;
b5895dc8 3104 }
403d1944 3105
b5895dc8 3106 if (spec->mic_switch) {
c21ca4a8
TI		 3107 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3108 "Mic as Output Switch",
3109 (spec->mic_switch << 8) | 1);
3110 if (err < 0)
3111 return err;
b5895dc8 3112 }
403d1944 3113
c7d4b2fa
M		 3114 return 0;
3115}
3116
eb06ed8f
TI		 3117/* add playback controls for Speaker and HP outputs */
3118static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3119 struct auto_pin_cfg *cfg)
3120{
3121 struct sigmatel_spec *spec = codec->spec;
3122 hda_nid_t nid;
c21ca4a8 3123 int i, err, nums;
eb06ed8f 3124
c21ca4a8 3125 nums = 0;
eb06ed8f 3126 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3127 static const char *pfxs[] = {
3128 "Headphone", "Headphone2", "Headphone3",
3129 };
eb06ed8f
TI		 3130 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3131 if (wid_caps & AC_WCAP_UNSOL_CAP)
3132 spec->hp_detect = 1;
c21ca4a8 3133 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3134 continue;
c21ca4a8
TI		 3135 nid = spec->hp_dacs[i];
3136 if (!nid)
eb06ed8f 3137 continue;
c21ca4a8
TI		 3138 err = create_controls(spec, pfxs[nums++], nid, 3);
3139 if (err < 0)
3140 return err;
1b290a51 3141 }
c21ca4a8
TI		 3142 nums = 0;
3143 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3144 static const char *pfxs[] = {
3145 "Speaker", "External Speaker", "Speaker2",
3146 };
c21ca4a8
TI		 3147 if (nums >= ARRAY_SIZE(pfxs))
3148 continue;
3149 nid = spec->speaker_dacs[i];
3150 if (!nid)
3151 continue;
3152 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3153 if (err < 0)
3154 return err;
3155 }
c7d4b2fa
M		 3156 return 0;
3157}
3158
b22b4821 3159/* labels for mono mux outputs */
d0513fc6
MR		 3160static const char *stac92xx_mono_labels[4] = {
3161 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3162};
3163
3164/* create mono mux for mono out on capable codecs */
3165static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3166{
3167 struct sigmatel_spec *spec = codec->spec;
3168 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3169 int i, num_cons;
3170 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3171
3172 num_cons = snd_hda_get_connections(codec,
3173 spec->mono_nid,
3174 con_lst,
3175 HDA_MAX_NUM_INPUTS);
3176 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3177 return -EINVAL;
3178
3179 for (i = 0; i < num_cons; i++) {
3180 mono_mux->items[mono_mux->num_items].label =
3181 stac92xx_mono_labels[i];
3182 mono_mux->items[mono_mux->num_items].index = i;
3183 mono_mux->num_items++;
3184 }
09a99959
MR		 3185
3186 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3187 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3188}
3189
89385035
MR		 3190/* labels for amp mux outputs */
3191static const char *stac92xx_amp_labels[3] = {
4b33c767 3192 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3193};
3194
3195/* create amp out controls mux on capable codecs */
3196static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3197{
3198 struct sigmatel_spec *spec = codec->spec;
3199 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3200 int i, err;
3201
2a9c7816 3202 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3203 amp_mux->items[amp_mux->num_items].label =
3204 stac92xx_amp_labels[i];
3205 amp_mux->items[amp_mux->num_items].index = i;
3206 amp_mux->num_items++;
3207 }
3208
2a9c7816
MR		 3209 if (spec->num_amps > 1) {
3210 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3211 "Amp Selector Capture Switch", 0);
3212 if (err < 0)
3213 return err;
3214 }
89385035
MR		 3215 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3216 "Amp Capture Volume",
3217 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3218}
3219
3220
1cd2224c
MR		 3221/* create PC beep volume controls */
3222static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3223 hda_nid_t nid)
3224{
3225 struct sigmatel_spec *spec = codec->spec;
3226 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3227 int err;
3228
3229 /* check for mute support for the the amp */
3230 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3231 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3232 "PC Beep Playback Switch",
3233 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3234 if (err < 0)
3235 return err;
3236 }
3237
3238 /* check to see if there is volume support for the amp */
3239 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3240 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3241 "PC Beep Playback Volume",
3242 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3243 if (err < 0)
3244 return err;
3245 }
3246 return 0;
3247}
3248
4d4e9bb3
TI		 3249#ifdef CONFIG_SND_HDA_INPUT_BEEP
3250#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3251
3252static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3253 struct snd_ctl_elem_value *ucontrol)
3254{
3255 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3256 ucontrol->value.integer.value[0] = codec->beep->enabled;
3257 return 0;
3258}
3259
3260static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3261 struct snd_ctl_elem_value *ucontrol)
3262{
3263 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3264 int enabled = !!ucontrol->value.integer.value[0];
3265 if (codec->beep->enabled != enabled) {
3266 codec->beep->enabled = enabled;
3267 return 1;
3268 }
3269 return 0;
3270}
3271
3272static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3273 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3274 .info = stac92xx_dig_beep_switch_info,
3275 .get = stac92xx_dig_beep_switch_get,
3276 .put = stac92xx_dig_beep_switch_put,
3277};
3278
3279static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3280{
3281 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3282 0, "PC Beep Playback Switch", 0);
3283}
3284#endif
3285
4682eee0
MR		 3286static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3287{
3288 struct sigmatel_spec *spec = codec->spec;
3289 int wcaps, nid, i, err = 0;
3290
3291 for (i = 0; i < spec->num_muxes; i++) {
3292 nid = spec->mux_nids[i];
3293 wcaps = get_wcaps(codec, nid);
3294
3295 if (wcaps & AC_WCAP_OUT_AMP) {
3296 err = stac92xx_add_control_idx(spec,
3297 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3298 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3299 if (err < 0)
3300 return err;
3301 }
3302 }
3303 return 0;
3304};
3305
d9737751 3306static const char *stac92xx_spdif_labels[3] = {
65973632 3307 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3308};
3309
3310static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3311{
3312 struct sigmatel_spec *spec = codec->spec;
3313 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3314 const char **labels = spec->spdif_labels;
d9737751 3315 int i, num_cons;
65973632 3316 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3317
3318 num_cons = snd_hda_get_connections(codec,
3319 spec->smux_nids[0],
3320 con_lst,
3321 HDA_MAX_NUM_INPUTS);
65973632 3322 if (!num_cons)
d9737751
MR		 3323 return -EINVAL;
3324
65973632
MR		 3325 if (!labels)
3326 labels = stac92xx_spdif_labels;
3327
d9737751 3328 for (i = 0; i < num_cons; i++) {
65973632 3329 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3330 spdif_mux->items[spdif_mux->num_items].index = i;
3331 spdif_mux->num_items++;
3332 }
3333
3334 return 0;
3335}
3336
8b65727b 3337/* labels for dmic mux inputs */
ddc2cec4 3338static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3339 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3340 "Digital Mic 3", "Digital Mic 4"
3341};
3342
3343/* create playback/capture controls for input pins on dmic capable codecs */
3344static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3345 const struct auto_pin_cfg *cfg)
3346{
3347 struct sigmatel_spec *spec = codec->spec;
3348 struct hda_input_mux *dimux = &spec->private_dimux;
3349 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3350 int err, i, j;
3351 char name[32];
8b65727b
MP		 3352
3353 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3354 dimux->items[dimux->num_items].index = 0;
3355 dimux->num_items++;
3356
3357 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3358 hda_nid_t nid;
8b65727b
MP		 3359 int index;
3360 int num_cons;
0678accd 3361 unsigned int wcaps;
8b65727b
MP		 3362 unsigned int def_conf;
3363
3364 def_conf = snd_hda_codec_read(codec,
3365 spec->dmic_nids[i],
3366 0,
3367 AC_VERB_GET_CONFIG_DEFAULT,
3368 0);
3369 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3370 continue;
3371
0678accd 3372 nid = spec->dmic_nids[i];
8b65727b 3373 num_cons = snd_hda_get_connections(codec,
e1f0d669 3374 spec->dmux_nids[0],
8b65727b
MP		 3375 con_lst,
3376 HDA_MAX_NUM_INPUTS);
3377 for (j = 0; j < num_cons; j++)
0678accd 3378 if (con_lst[j] == nid) {
8b65727b
MP		 3379 index = j;
3380 goto found;
3381 }
3382 continue;
3383found:
d0513fc6
MR		 3384 wcaps = get_wcaps(codec, nid) &
3385 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3386
d0513fc6 3387 if (wcaps) {
0678accd
MR		 3388 sprintf(name, "%s Capture Volume",
3389 stac92xx_dmic_labels[dimux->num_items]);
3390
3391 err = stac92xx_add_control(spec,
3392 STAC_CTL_WIDGET_VOL,
3393 name,
d0513fc6
MR		 3394 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3395 (wcaps & AC_WCAP_OUT_AMP) ?
3396 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3397 if (err < 0)
3398 return err;
3399 }
3400
8b65727b
MP		 3401 dimux->items[dimux->num_items].label =
3402 stac92xx_dmic_labels[dimux->num_items];
3403 dimux->items[dimux->num_items].index = index;
3404 dimux->num_items++;
3405 }
3406
3407 return 0;
3408}
3409
c7d4b2fa
M		 3410/* create playback/capture controls for input pins */
3411static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3412{
3413 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3414 struct hda_input_mux *imux = &spec->private_imux;
3415 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3416 int i, j, k;
3417
3418 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3419 int index;
3420
3421 if (!cfg->input_pins[i])
3422 continue;
3423 index = -1;
3424 for (j = 0; j < spec->num_muxes; j++) {
3425 int num_cons;
3426 num_cons = snd_hda_get_connections(codec,
3427 spec->mux_nids[j],
3428 con_lst,
3429 HDA_MAX_NUM_INPUTS);
3430 for (k = 0; k < num_cons; k++)
3431 if (con_lst[k] == cfg->input_pins[i]) {
3432 index = k;
3433 goto found;
3434 }
c7d4b2fa 3435 }
314634bc
TI		 3436 continue;
3437 found:
3438 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3439 imux->items[imux->num_items].index = index;
3440 imux->num_items++;
c7d4b2fa
M		 3441 }
3442
7b043899 3443 if (imux->num_items) {
62fe78e9
SR		 3444 /*
3445 * Set the current input for the muxes.
3446 * The STAC9221 has two input muxes with identical source
3447 * NID lists. Hopefully this won't get confused.
3448 */
3449 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3450 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3451 AC_VERB_SET_CONNECT_SEL,
3452 imux->items[0].index);
62fe78e9
SR		 3453 }
3454 }
3455
c7d4b2fa
M		 3456 return 0;
3457}
3458
c7d4b2fa
M		 3459static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3460{
3461 struct sigmatel_spec *spec = codec->spec;
3462 int i;
3463
3464 for (i = 0; i < spec->autocfg.line_outs; i++) {
3465 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3466 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3467 }
3468}
3469
3470static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3471{
3472 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3473 int i;
c7d4b2fa 3474
eb06ed8f
TI		 3475 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3476 hda_nid_t pin;
3477 pin = spec->autocfg.hp_pins[i];
3478 if (pin) /* connect to front */
3479 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3480 }
3481 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3482 hda_nid_t pin;
3483 pin = spec->autocfg.speaker_pins[i];
3484 if (pin) /* connect to front */
3485 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3486 }
c7d4b2fa
M		 3487}
3488
3cc08dc6 3489static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3490{
3491 struct sigmatel_spec *spec = codec->spec;
3492 int err;
3493
8b65727b
MP		 3494 if ((err = snd_hda_parse_pin_def_config(codec,
3495 &spec->autocfg,
3496 spec->dmic_nids)) < 0)
c7d4b2fa 3497 return err;
82bc955f 3498 if (! spec->autocfg.line_outs)
869264c4 3499 return 0; /* can't find valid pin config */
19039bd0 3500
bcecd9bd
JZ		 3501 /* If we have no real line-out pin and multiple hp-outs, HPs should
3502 * be set up as multi-channel outputs.
3503 */
3504 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3505 spec->autocfg.hp_outs > 1) {
3506 /* Copy hp_outs to line_outs, backup line_outs in
3507 * speaker_outs so that the following routines can handle
3508 * HP pins as primary outputs.
3509 */
c21ca4a8 3510 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3511 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3512 sizeof(spec->autocfg.line_out_pins));
3513 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3514 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3515 sizeof(spec->autocfg.hp_pins));
3516 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3517 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3518 spec->autocfg.hp_outs = 0;
bcecd9bd 3519 }
09a99959 3520 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3521 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3522 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3523 u32 caps = query_amp_caps(codec,
3524 spec->autocfg.mono_out_pin, dir);
3525 hda_nid_t conn_list[1];
3526
3527 /* get the mixer node and then the mono mux if it exists */
3528 if (snd_hda_get_connections(codec,
3529 spec->autocfg.mono_out_pin, conn_list, 1) &&
3530 snd_hda_get_connections(codec, conn_list[0],
3531 conn_list, 1)) {
3532
3533 int wcaps = get_wcaps(codec, conn_list[0]);
3534 int wid_type = (wcaps & AC_WCAP_TYPE)
3535 >> AC_WCAP_TYPE_SHIFT;
3536 /* LR swap check, some stac925x have a mux that
3537 * changes the DACs output path instead of the
3538 * mono-mux path.
3539 */
3540 if (wid_type == AC_WID_AUD_SEL &&
3541 !(wcaps & AC_WCAP_LR_SWAP))
3542 spec->mono_nid = conn_list[0];
3543 }
d0513fc6
MR		 3544 if (dir) {
3545 hda_nid_t nid = spec->autocfg.mono_out_pin;
3546
3547 /* most mono outs have a least a mute/unmute switch */
3548 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3549 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3550 "Mono Playback Switch",
3551 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3552 if (err < 0)
3553 return err;
d0513fc6
MR		 3554 /* check for volume support for the amp */
3555 if ((caps & AC_AMPCAP_NUM_STEPS)
3556 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3557 err = stac92xx_add_control(spec,
3558 STAC_CTL_WIDGET_VOL,
3559 "Mono Playback Volume",
3560 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3561 if (err < 0)
3562 return err;
3563 }
09a99959
MR		 3564 }
3565
3566 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3567 AC_PINCTL_OUT_EN);
3568 }
bcecd9bd 3569
c21ca4a8
TI		 3570 if (!spec->multiout.num_dacs) {
3571 err = stac92xx_auto_fill_dac_nids(codec);
3572 if (err < 0)
19039bd0 3573 return err;
c9280d68
TI		 3574 err = stac92xx_auto_create_multi_out_ctls(codec,
3575 &spec->autocfg);
3576 if (err < 0)
3577 return err;
c21ca4a8 3578 }
c7d4b2fa 3579
1cd2224c
MR		 3580 /* setup analog beep controls */
3581 if (spec->anabeep_nid > 0) {
3582 err = stac92xx_auto_create_beep_ctls(codec,
3583 spec->anabeep_nid);
3584 if (err < 0)
3585 return err;
3586 }
3587
3588 /* setup digital beep controls and input device */
3589#ifdef CONFIG_SND_HDA_INPUT_BEEP
3590 if (spec->digbeep_nid > 0) {
3591 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3592 unsigned int caps;
1cd2224c
MR		 3593
3594 err = stac92xx_auto_create_beep_ctls(codec, nid);
3595 if (err < 0)
3596 return err;
3597 err = snd_hda_attach_beep_device(codec, nid);
3598 if (err < 0)
3599 return err;
4d4e9bb3
TI		 3600 /* if no beep switch is available, make its own one */
3601 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3602 if (codec->beep &&
3603 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3604 err = stac92xx_beep_switch_ctl(codec);
3605 if (err < 0)
3606 return err;
3607 }
1cd2224c
MR		 3608 }
3609#endif
3610
0fb87bb4
ML		 3611 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3612
3613 if (err < 0)
3614 return err;
3615
3616 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3617
3618 if (err < 0)
c7d4b2fa
M		 3619 return err;
3620
b22b4821
MR		 3621 if (spec->mono_nid > 0) {
3622 err = stac92xx_auto_create_mono_output_ctls(codec);
3623 if (err < 0)
3624 return err;
3625 }
2a9c7816 3626 if (spec->num_amps > 0) {
89385035
MR		 3627 err = stac92xx_auto_create_amp_output_ctls(codec);
3628 if (err < 0)
3629 return err;
3630 }
2a9c7816 3631 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3632 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3633 &spec->autocfg)) < 0)
3634 return err;
4682eee0
MR		 3635 if (spec->num_muxes > 0) {
3636 err = stac92xx_auto_create_mux_input_ctls(codec);
3637 if (err < 0)
3638 return err;
3639 }
d9737751
MR		 3640 if (spec->num_smuxes > 0) {
3641 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3642 if (err < 0)
3643 return err;
3644 }
8b65727b 3645
c7d4b2fa 3646 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3647 if (spec->multiout.max_channels > 2)
c7d4b2fa 3648 spec->surr_switch = 1;
c7d4b2fa 3649
82bc955f 3650 if (spec->autocfg.dig_out_pin)
3cc08dc6 3651 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3652 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3653 spec->dig_in_nid = dig_in;
c7d4b2fa 3654
603c4019
TI		 3655 if (spec->kctls.list)
3656 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3657
3658 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3659 if (!spec->dinput_mux)
3660 spec->dinput_mux = &spec->private_dimux;
d9737751 3661 spec->sinput_mux = &spec->private_smux;
b22b4821 3662 spec->mono_mux = &spec->private_mono_mux;
89385035 3663 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3664 return 1;
3665}
3666
82bc955f
TI		 3667/* add playback controls for HP output */
3668static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3669 struct auto_pin_cfg *cfg)
3670{
3671 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3672 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3673 unsigned int wid_caps;
3674
3675 if (! pin)
3676 return 0;
3677
3678 wid_caps = get_wcaps(codec, pin);
505cb341 3679 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3680 spec->hp_detect = 1;
82bc955f
TI		 3681
3682 return 0;
3683}
3684
160ea0dc
RF		 3685/* add playback controls for LFE output */
3686static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3687 struct auto_pin_cfg *cfg)
3688{
3689 struct sigmatel_spec *spec = codec->spec;
3690 int err;
3691 hda_nid_t lfe_pin = 0x0;
3692 int i;
3693
3694 /*
3695 * search speaker outs and line outs for a mono speaker pin
3696 * with an amp. If one is found, add LFE controls
3697 * for it.
3698 */
3699 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3700 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3701 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3702 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3703 if (wcaps == AC_WCAP_OUT_AMP)
3704 /* found a mono speaker with an amp, must be lfe */
3705 lfe_pin = pin;
3706 }
3707
3708 /* if speaker_outs is 0, then speakers may be in line_outs */
3709 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3710 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3711 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3712 unsigned int defcfg;
8b551785 3713 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3714 AC_VERB_GET_CONFIG_DEFAULT,
3715 0x00);
8b551785 3716 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3717 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3718 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3719 if (wcaps == AC_WCAP_OUT_AMP)
3720 /* found a mono speaker with an amp,
3721 must be lfe */
3722 lfe_pin = pin;
3723 }
3724 }
3725 }
3726
3727 if (lfe_pin) {
eb06ed8f 3728 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3729 if (err < 0)
3730 return err;
3731 }
3732
3733 return 0;
3734}
3735
c7d4b2fa
M		 3736static int stac9200_parse_auto_config(struct hda_codec *codec)
3737{
3738 struct sigmatel_spec *spec = codec->spec;
3739 int err;
3740
df694daa 3741 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3742 return err;
3743
3744 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3745 return err;
3746
82bc955f
TI		 3747 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3748 return err;
3749
160ea0dc
RF		 3750 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3751 return err;
3752
355a0ec4
TI		 3753 if (spec->num_muxes > 0) {
3754 err = stac92xx_auto_create_mux_input_ctls(codec);
3755 if (err < 0)
3756 return err;
3757 }
3758
82bc955f 3759 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3760 spec->multiout.dig_out_nid = 0x05;
82bc955f 3761 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3762 spec->dig_in_nid = 0x04;
c7d4b2fa 3763
603c4019
TI		 3764 if (spec->kctls.list)
3765 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3766
3767 spec->input_mux = &spec->private_imux;
8b65727b 3768 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3769
3770 return 1;
3771}
3772
62fe78e9
SR		 3773/*
3774 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3775 * funky external mute control using GPIO pins.
3776 */
3777
76e1ddfb 3778static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3779 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3780{
3781 unsigned int gpiostate, gpiomask, gpiodir;
3782
3783 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3784 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3785 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3786
3787 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3788 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3789 gpiomask |= mask;
62fe78e9
SR		 3790
3791 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3792 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3793 gpiodir |= dir_mask;
62fe78e9 3794
76e1ddfb 3795 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3796 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3797
3798 snd_hda_codec_write(codec, codec->afg, 0,
3799 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3800 snd_hda_codec_read(codec, codec->afg, 0,
3801 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3802
3803 msleep(1);
3804
76e1ddfb
TI		 3805 snd_hda_codec_read(codec, codec->afg, 0,
3806 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3807}
3808
74aeaabc
MR		 3809static int stac92xx_add_jack(struct hda_codec *codec,
3810 hda_nid_t nid, int type)
3811{
e4973e1e 3812#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3813 struct sigmatel_spec *spec = codec->spec;
3814 struct sigmatel_jack *jack;
3815 int def_conf = snd_hda_codec_read(codec, nid,
3816 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3817 int connectivity = get_defcfg_connect(def_conf);
3818 char name[32];
3819
3820 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3821 return 0;
3822
3823 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3824 jack = snd_array_new(&spec->jacks);
3825 if (!jack)
3826 return -ENOMEM;
3827 jack->nid = nid;
3828 jack->type = type;
3829
3830 sprintf(name, "%s at %s %s Jack",
3831 snd_hda_get_jack_type(def_conf),
3832 snd_hda_get_jack_connectivity(def_conf),
3833 snd_hda_get_jack_location(def_conf));
3834
3835 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3836#else
3837 return 0;
3838#endif
74aeaabc
MR		 3839}
3840
c6e4c666
TI		 3841static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3842 unsigned char type, int data)
74aeaabc
MR		 3843{
3844 struct sigmatel_event *event;
3845
3846 snd_array_init(&spec->events, sizeof(*event), 32);
3847 event = snd_array_new(&spec->events);
3848 if (!event)
3849 return -ENOMEM;
3850 event->nid = nid;
c6e4c666
TI		 3851 event->type = type;
3852 event->tag = spec->events.used;
74aeaabc
MR		 3853 event->data = data;
3854
c6e4c666 3855 return event->tag;
74aeaabc
MR		 3856}
3857
c6e4c666
TI		 3858static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3859 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3860{
3861 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3862 struct sigmatel_event *event = spec->events.list;
3863 int i;
3864
3865 for (i = 0; i < spec->events.used; i++, event++) {
3866 if (event->nid == nid && event->type == type)
3867 return event;
74aeaabc 3868 }
c6e4c666 3869 return NULL;
74aeaabc
MR		 3870}
3871
c6e4c666
TI		 3872static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3873 unsigned char tag)
314634bc 3874{
c6e4c666
TI		 3875 struct sigmatel_spec *spec = codec->spec;
3876 struct sigmatel_event *event = spec->events.list;
3877 int i;
3878
3879 for (i = 0; i < spec->events.used; i++, event++) {
3880 if (event->tag == tag)
3881 return event;
74aeaabc 3882 }
c6e4c666
TI		 3883 return NULL;
3884}
3885
3886static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3887 unsigned int type)
3888{
3889 struct sigmatel_event *event;
3890 int tag;
3891
3892 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3893 return;
3894 event = stac_get_event(codec, nid, type);
3895 if (event)
3896 tag = event->tag;
3897 else
3898 tag = stac_add_event(codec->spec, nid, type, 0);
3899 if (tag < 0)
3900 return;
3901 snd_hda_codec_write_cache(codec, nid, 0,
3902 AC_VERB_SET_UNSOLICITED_ENABLE,
3903 AC_USRSP_EN | tag);
314634bc
TI		 3904}
3905
a64135a2
MR		 3906static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3907{
3908 int i;
3909 for (i = 0; i < cfg->hp_outs; i++)
3910 if (cfg->hp_pins[i] == nid)
3911 return 1; /* nid is a HP-Out */
3912
3913 return 0; /* nid is not a HP-Out */
3914};
3915
b76c850f
MR		 3916static void stac92xx_power_down(struct hda_codec *codec)
3917{
3918 struct sigmatel_spec *spec = codec->spec;
3919
3920 /* power down inactive DACs */
3921 hda_nid_t *dac;
3922 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3923 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3924 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3925 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3926}
3927
f73d3585
TI		 3928static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3929 int enable);
3930
c7d4b2fa
M		 3931static int stac92xx_init(struct hda_codec *codec)
3932{
3933 struct sigmatel_spec *spec = codec->spec;
82bc955f 3934 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3935 unsigned int gpio;
e4973e1e 3936 int i;
c7d4b2fa 3937
c7d4b2fa
M		 3938 snd_hda_sequence_write(codec, spec->init);
3939
8daaaa97
MR		 3940 /* power down adcs initially */
3941 if (spec->powerdown_adcs)
3942 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3943 snd_hda_codec_write(codec,
8daaaa97
MR		 3944 spec->adc_nids[i], 0,
3945 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3946
3947 /* set up GPIO */
3948 gpio = spec->gpio_data;
3949 /* turn on EAPD statically when spec->eapd_switch isn't set.
3950 * otherwise, unsol event will turn it on/off dynamically
3951 */
3952 if (!spec->eapd_switch)
3953 gpio |= spec->eapd_mask;
3954 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3955
82bc955f
TI		 3956 /* set up pins */
3957 if (spec->hp_detect) {
505cb341 3958 /* Enable unsolicited responses on the HP widget */
74aeaabc 3959 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3960 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3961 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3962 }
0a07acaf
TI		 3963 /* force to enable the first line-out; the others are set up
3964 * in unsol_event
3965 */
3966 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3967 AC_PINCTL_OUT_EN);
82bc955f 3968 /* fake event to set up pins */
c6e4c666
TI		 3969 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3970 STAC_HP_EVENT);
82bc955f
TI		 3971 } else {
3972 stac92xx_auto_init_multi_out(codec);
3973 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 3974 for (i = 0; i < cfg->hp_outs; i++)
3975 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 3976 }
3977 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3978 hda_nid_t nid = cfg->input_pins[i];
3979 if (nid) {
12dde4c6 3980 unsigned int pinctl, conf;
4f1e6bc3
TI		 3981 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3982 /* for mic pins, force to initialize */
3983 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 3984 pinctl |= AC_PINCTL_IN_EN;
3985 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 3986 } else {
3987 pinctl = snd_hda_codec_read(codec, nid, 0,
3988 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3989 /* if PINCTL already set then skip */
12dde4c6
TI		 3990 if (!(pinctl & AC_PINCTL_IN_EN)) {
3991 pinctl |= AC_PINCTL_IN_EN;
3992 stac92xx_auto_set_pinctl(codec, nid,
3993 pinctl);
3994 }
3995 }
3996 conf = snd_hda_codec_read(codec, nid, 0,
3997 AC_VERB_GET_CONFIG_DEFAULT, 0);
3998 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
3999 enable_pin_detect(codec, nid,
4000 STAC_INSERT_EVENT);
4001 stac_issue_unsol_event(codec, nid,
4002 STAC_INSERT_EVENT);
4f1e6bc3 4003 }
c960a03b 4004 }
82bc955f 4005 }
a64135a2
MR		 4006 for (i = 0; i < spec->num_dmics; i++)
4007 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4008 AC_PINCTL_IN_EN);
f73d3585
TI		 4009 if (cfg->dig_out_pin)
4010 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4011 AC_PINCTL_OUT_EN);
4012 if (cfg->dig_in_pin)
4013 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4014 AC_PINCTL_IN_EN);
a64135a2 4015 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4016 hda_nid_t nid = spec->pwr_nids[i];
4017 int pinctl, def_conf;
f73d3585 4018
eb632128
TI		 4019 /* power on when no jack detection is available */
4020 if (!spec->hp_detect) {
4021 stac_toggle_power_map(codec, nid, 1);
4022 continue;
4023 }
4024
4025 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4026 continue; /* already has an unsol event */
4027
4028 pinctl = snd_hda_codec_read(codec, nid, 0,
4029 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4030 /* outputs are only ports capable of power management
4031 * any attempts on powering down a input port cause the
4032 * referenced VREF to act quirky.
4033 */
eb632128
TI		 4034 if (pinctl & AC_PINCTL_IN_EN) {
4035 stac_toggle_power_map(codec, nid, 1);
a64135a2 4036 continue;
eb632128 4037 }
f73d3585
TI		 4038 def_conf = snd_hda_codec_read(codec, nid, 0,
4039 AC_VERB_GET_CONFIG_DEFAULT, 0);
4040 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4041 /* skip any ports that don't have jacks since presence
4042 * detection is useless */
f73d3585
TI		 4043 if (def_conf != AC_JACK_PORT_COMPLEX) {
4044 if (def_conf != AC_JACK_PORT_NONE)
4045 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4046 continue;
f73d3585 4047 }
12dde4c6
TI		 4048 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4049 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4050 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4051 }
a64135a2 4052 }
b76c850f
MR		 4053 if (spec->dac_list)
4054 stac92xx_power_down(codec);
c7d4b2fa
M		 4055 return 0;
4056}
4057
74aeaabc
MR		 4058static void stac92xx_free_jacks(struct hda_codec *codec)
4059{
e4973e1e 4060#ifdef CONFIG_SND_JACK
b94d3539 4061 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4062 struct sigmatel_spec *spec = codec->spec;
b94d3539 4063 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4064 struct sigmatel_jack *jacks = spec->jacks.list;
4065 int i;
4066 for (i = 0; i < spec->jacks.used; i++)
4067 snd_device_free(codec->bus->card, &jacks[i].jack);
4068 }
4069 snd_array_free(&spec->jacks);
e4973e1e 4070#endif
74aeaabc
MR		 4071}
4072
603c4019
TI		 4073static void stac92xx_free_kctls(struct hda_codec *codec)
4074{
4075 struct sigmatel_spec *spec = codec->spec;
4076
4077 if (spec->kctls.list) {
4078 struct snd_kcontrol_new *kctl = spec->kctls.list;
4079 int i;
4080 for (i = 0; i < spec->kctls.used; i++)
4081 kfree(kctl[i].name);
4082 }
4083 snd_array_free(&spec->kctls);
4084}
4085
2f2f4251
M		 4086static void stac92xx_free(struct hda_codec *codec)
4087{
c7d4b2fa 4088 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4089
4090 if (! spec)
4091 return;
4092
af9f341a 4093 kfree(spec->pin_configs);
74aeaabc
MR		 4094 stac92xx_free_jacks(codec);
4095 snd_array_free(&spec->events);
11b44bbd 4096
c7d4b2fa 4097 kfree(spec);
1cd2224c 4098 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4099}
4100
4e55096e
M		 4101static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4102 unsigned int flag)
4103{
4104 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4105 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4106
f9acba43
TI		 4107 if (pin_ctl & AC_PINCTL_IN_EN) {
4108 /*
4109 * we need to check the current set-up direction of
4110 * shared input pins since they can be switched via
4111 * "xxx as Output" mixer switch
4112 */
4113 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4114 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4115 return;
4116 }
4117
7b043899
SL		 4118 /* if setting pin direction bits, clear the current
4119 direction bits first */
4120 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4121 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4122
82beb8fd 4123 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4124 AC_VERB_SET_PIN_WIDGET_CONTROL,
4125 pin_ctl | flag);
4126}
4127
4128static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4129 unsigned int flag)
4130{
4131 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4132 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4133 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4134 AC_VERB_SET_PIN_WIDGET_CONTROL,
4135 pin_ctl & ~flag);
4136}
4137
e6e3ea25 4138static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4139{
4140 if (!nid)
4141 return 0;
4142 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4143 & (1 << 31))
4144 return 1;
314634bc
TI		 4145 return 0;
4146}
4147
d7a89436
TI		 4148/* return non-zero if the hp-pin of the given array index isn't
4149 * a jack-detection target
4150 */
4151static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4152{
4153 struct auto_pin_cfg *cfg = &spec->autocfg;
4154
4155 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4156 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4157 return 1;
c21ca4a8 4158 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4159 return 1;
4160 /* ignore if the pin is set as line-out */
4161 if (cfg->hp_pins[i] == spec->hp_switch)
4162 return 1;
4163 return 0;
4164}
4165
c6e4c666 4166static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4167{
4168 struct sigmatel_spec *spec = codec->spec;
4169 struct auto_pin_cfg *cfg = &spec->autocfg;
4170 int i, presence;
4171
eb06ed8f 4172 presence = 0;
4fe5195c
MR		 4173 if (spec->gpio_mute)
4174 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4175 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4176
eb06ed8f 4177 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4178 if (presence)
4179 break;
d7a89436
TI		 4180 if (no_hp_sensing(spec, i))
4181 continue;
e6e3ea25
TI		 4182 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4183 if (presence) {
4184 unsigned int pinctl;
4185 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4186 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4187 if (pinctl & AC_PINCTL_IN_EN)
4188 presence = 0; /* mic- or line-input */
4189 }
eb06ed8f 4190 }
4e55096e
M		 4191
4192 if (presence) {
d7a89436 4193 /* disable lineouts */
7c2ba97b 4194 if (spec->hp_switch)
d7a89436
TI		 4195 stac92xx_reset_pinctl(codec, spec->hp_switch,
4196 AC_PINCTL_OUT_EN);
4e55096e
M		 4197 for (i = 0; i < cfg->line_outs; i++)
4198 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4199 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4200 for (i = 0; i < cfg->speaker_outs; i++)
4201 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4202 AC_PINCTL_OUT_EN);
c0cea0d0 4203 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4204 stac_gpio_set(codec, spec->gpio_mask,
4205 spec->gpio_dir, spec->gpio_data &
4206 ~spec->eapd_mask);
4e55096e 4207 } else {
d7a89436 4208 /* enable lineouts */
7c2ba97b 4209 if (spec->hp_switch)
d7a89436
TI		 4210 stac92xx_set_pinctl(codec, spec->hp_switch,
4211 AC_PINCTL_OUT_EN);
4e55096e
M		 4212 for (i = 0; i < cfg->line_outs; i++)
4213 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4214 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4215 for (i = 0; i < cfg->speaker_outs; i++)
4216 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4217 AC_PINCTL_OUT_EN);
c0cea0d0 4218 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4219 stac_gpio_set(codec, spec->gpio_mask,
4220 spec->gpio_dir, spec->gpio_data |
4221 spec->eapd_mask);
4e55096e 4222 }
d7a89436
TI		 4223 /* toggle hp outs */
4224 for (i = 0; i < cfg->hp_outs; i++) {
4225 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4226 if (no_hp_sensing(spec, i))
4227 continue;
4228 if (presence)
4229 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4230#if 0 /* FIXME */
4231/* Resetting the pinctl like below may lead to (a sort of) regressions
4232 * on some devices since they use the HP pin actually for line/speaker
4233 * outs although the default pin config shows a different pin (that is
4234 * wrong and useless).
4235 *
4236 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4237 * But, disabling the code below just works around it, and I'm too tired of
4238 * bug reports with such devices...
4239 */
d7a89436
TI		 4240 else
4241 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4242#endif /* FIXME */
d7a89436 4243 }
4e55096e
M		 4244}
4245
f73d3585
TI		 4246static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4247 int enable)
a64135a2
MR		 4248{
4249 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4250 unsigned int idx, val;
4251
4252 for (idx = 0; idx < spec->num_pwrs; idx++) {
4253 if (spec->pwr_nids[idx] == nid)
4254 break;
4255 }
4256 if (idx >= spec->num_pwrs)
4257 return;
d0513fc6
MR		 4258
4259 /* several codecs have two power down bits */
4260 if (spec->pwr_mapping)
4261 idx = spec->pwr_mapping[idx];
4262 else
4263 idx = 1 << idx;
a64135a2 4264
f73d3585
TI		 4265 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4266 if (enable)
a64135a2
MR		 4267 val &= ~idx;
4268 else
4269 val |= idx;
4270
4271 /* power down unused output ports */
4272 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4273}
4274
f73d3585
TI		 4275static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4276{
e6e3ea25 4277 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4278}
a64135a2 4279
74aeaabc
MR		 4280static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4281{
4282 struct sigmatel_spec *spec = codec->spec;
4283 struct sigmatel_jack *jacks = spec->jacks.list;
4284
4285 if (jacks) {
4286 int i;
4287 for (i = 0; i < spec->jacks.used; i++) {
4288 if (jacks->nid == nid) {
4289 unsigned int pin_ctl =
4290 snd_hda_codec_read(codec, nid,
4291 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4292 0x00);
4293 int type = jacks->type;
4294 if (type == (SND_JACK_LINEOUT
4295 | SND_JACK_HEADPHONE))
4296 type = (pin_ctl & AC_PINCTL_HP_EN)
4297 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4298 snd_jack_report(jacks->jack,
e6e3ea25 4299 get_pin_presence(codec, nid)
74aeaabc
MR		 4300 ? type : 0);
4301 }
4302 jacks++;
4303 }
4304 }
4305}
a64135a2 4306
c6e4c666
TI		 4307static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4308 unsigned char type)
4309{
4310 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4311 if (!event)
4312 return;
4313 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4314}
4315
314634bc
TI		 4316static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4317{
a64135a2 4318 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4319 struct sigmatel_event *event;
4320 int tag, data;
a64135a2 4321
c6e4c666
TI		 4322 tag = (res >> 26) & 0x7f;
4323 event = stac_get_event_from_tag(codec, tag);
4324 if (!event)
4325 return;
4326
4327 switch (event->type) {
314634bc 4328 case STAC_HP_EVENT:
c6e4c666 4329 stac92xx_hp_detect(codec);
a64135a2 4330 /* fallthru */
74aeaabc 4331 case STAC_INSERT_EVENT:
a64135a2 4332 case STAC_PWR_EVENT:
c6e4c666
TI		 4333 if (spec->num_pwrs > 0)
4334 stac92xx_pin_sense(codec, event->nid);
4335 stac92xx_report_jack(codec, event->nid);
72474be6 4336 break;
c6e4c666
TI		 4337 case STAC_VREF_EVENT:
4338 data = snd_hda_codec_read(codec, codec->afg, 0,
4339 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4340 /* toggle VREF state based on GPIOx status */
4341 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4342 !!(data & (1 << event->data)));
72474be6 4343 break;
314634bc
TI		 4344 }
4345}
4346
2d34e1b3
TI		 4347#ifdef CONFIG_PROC_FS
4348static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4349 struct hda_codec *codec, hda_nid_t nid)
4350{
4351 if (nid == codec->afg)
4352 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4353 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4354}
4355
4356static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4357 struct hda_codec *codec,
4358 unsigned int verb)
4359{
4360 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4361 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4362}
4363
4364/* stac92hd71bxx, stac92hd73xx */
4365static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4366 struct hda_codec *codec, hda_nid_t nid)
4367{
4368 stac92hd_proc_hook(buffer, codec, nid);
4369 if (nid == codec->afg)
4370 analog_loop_proc_hook(buffer, codec, 0xfa0);
4371}
4372
4373static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4374 struct hda_codec *codec, hda_nid_t nid)
4375{
4376 if (nid == codec->afg)
4377 analog_loop_proc_hook(buffer, codec, 0xfe0);
4378}
4379
4380static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4381 struct hda_codec *codec, hda_nid_t nid)
4382{
4383 if (nid == codec->afg)
4384 analog_loop_proc_hook(buffer, codec, 0xfeb);
4385}
4386#else
4387#define stac92hd_proc_hook NULL
4388#define stac92hd7x_proc_hook NULL
4389#define stac9205_proc_hook NULL
4390#define stac927x_proc_hook NULL
4391#endif
4392
cb53c626 4393#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4394static int stac92xx_resume(struct hda_codec *codec)
4395{
dc81bed1
TI		 4396 struct sigmatel_spec *spec = codec->spec;
4397
11b44bbd 4398 stac92xx_set_config_regs(codec);
2c885878 4399 stac92xx_init(codec);
82beb8fd
TI		 4400 snd_hda_codec_resume_amp(codec);
4401 snd_hda_codec_resume_cache(codec);
2c885878 4402 /* fake event to set up pins again to override cached values */
dc81bed1 4403 if (spec->hp_detect)
c6e4c666
TI		 4404 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4405 STAC_HP_EVENT);
ff6fdc37
M		 4406 return 0;
4407}
c6798d2b
MR		 4408
4409static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4410{
4411 struct sigmatel_spec *spec = codec->spec;
4412 if (spec->eapd_mask)
4413 stac_gpio_set(codec, spec->gpio_mask,
4414 spec->gpio_dir, spec->gpio_data &
4415 ~spec->eapd_mask);
4416 return 0;
4417}
ff6fdc37
M		 4418#endif
4419
2f2f4251
M		 4420static struct hda_codec_ops stac92xx_patch_ops = {
4421 .build_controls = stac92xx_build_controls,
4422 .build_pcms = stac92xx_build_pcms,
4423 .init = stac92xx_init,
4424 .free = stac92xx_free,
4e55096e 4425 .unsol_event = stac92xx_unsol_event,
cb53c626 4426#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4427 .suspend = stac92xx_suspend,
ff6fdc37
M		 4428 .resume = stac92xx_resume,
4429#endif
2f2f4251
M		 4430};
4431
4432static int patch_stac9200(struct hda_codec *codec)
4433{
4434 struct sigmatel_spec *spec;
c7d4b2fa 4435 int err;
2f2f4251 4436
e560d8d8 4437 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4438 if (spec == NULL)
4439 return -ENOMEM;
4440
4441 codec->spec = spec;
a4eed138 4442 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4443 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4444 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4445 stac9200_models,
4446 stac9200_cfg_tbl);
11b44bbd
RF		 4447 if (spec->board_config < 0) {
4448 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4449 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4450 } else
4451 err = stac_save_pin_cfgs(codec,
4452 stac9200_brd_tbl[spec->board_config]);
4453 if (err < 0) {
4454 stac92xx_free(codec);
4455 return err;
403d1944 4456 }
2f2f4251
M		 4457
4458 spec->multiout.max_channels = 2;
4459 spec->multiout.num_dacs = 1;
4460 spec->multiout.dac_nids = stac9200_dac_nids;
4461 spec->adc_nids = stac9200_adc_nids;
4462 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4463 spec->num_muxes = 1;
8b65727b 4464 spec->num_dmics = 0;
9e05b7a3 4465 spec->num_adcs = 1;
a64135a2 4466 spec->num_pwrs = 0;
c7d4b2fa 4467
58eec423
MCC		 4468 if (spec->board_config == STAC_9200_M4 ||
4469 spec->board_config == STAC_9200_M4_2 ||
bf277785 4470 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4471 spec->init = stac9200_eapd_init;
4472 else
4473 spec->init = stac9200_core_init;
2f2f4251 4474 spec->mixer = stac9200_mixer;
c7d4b2fa 4475
117f257d
TI		 4476 if (spec->board_config == STAC_9200_PANASONIC) {
4477 spec->gpio_mask = spec->gpio_dir = 0x09;
4478 spec->gpio_data = 0x00;
4479 }
4480
c7d4b2fa
M		 4481 err = stac9200_parse_auto_config(codec);
4482 if (err < 0) {
4483 stac92xx_free(codec);
4484 return err;
4485 }
2f2f4251 4486
2acc9dcb
TI		 4487 /* CF-74 has no headphone detection, and the driver should *NOT*
4488 * do detection and HP/speaker toggle because the hardware does it.
4489 */
4490 if (spec->board_config == STAC_9200_PANASONIC)
4491 spec->hp_detect = 0;
4492
2f2f4251
M		 4493 codec->patch_ops = stac92xx_patch_ops;
4494
4495 return 0;
4496}
4497
8e21c34c
TD		 4498static int patch_stac925x(struct hda_codec *codec)
4499{
4500 struct sigmatel_spec *spec;
4501 int err;
4502
4503 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4504 if (spec == NULL)
4505 return -ENOMEM;
4506
4507 codec->spec = spec;
a4eed138 4508 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4509 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4510
4511 /* Check first for codec ID */
4512 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4513 STAC_925x_MODELS,
4514 stac925x_models,
4515 stac925x_codec_id_cfg_tbl);
4516
4517 /* Now checks for PCI ID, if codec ID is not found */
4518 if (spec->board_config < 0)
4519 spec->board_config = snd_hda_check_board_config(codec,
4520 STAC_925x_MODELS,
8e21c34c
TD		 4521 stac925x_models,
4522 stac925x_cfg_tbl);
9e507abd 4523 again:
8e21c34c 4524 if (spec->board_config < 0) {
9cb36c2a 4525 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4526 "using BIOS defaults\n");
8e21c34c 4527 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4528 } else
4529 err = stac_save_pin_cfgs(codec,
4530 stac925x_brd_tbl[spec->board_config]);
4531 if (err < 0) {
4532 stac92xx_free(codec);
4533 return err;
8e21c34c
TD		 4534 }
4535
4536 spec->multiout.max_channels = 2;
4537 spec->multiout.num_dacs = 1;
4538 spec->multiout.dac_nids = stac925x_dac_nids;
4539 spec->adc_nids = stac925x_adc_nids;
4540 spec->mux_nids = stac925x_mux_nids;
4541 spec->num_muxes = 1;
9e05b7a3 4542 spec->num_adcs = 1;
a64135a2 4543 spec->num_pwrs = 0;
2c11f955
TD		 4544 switch (codec->vendor_id) {
4545 case 0x83847632: /* STAC9202 */
4546 case 0x83847633: /* STAC9202D */
4547 case 0x83847636: /* STAC9251 */
4548 case 0x83847637: /* STAC9251D */
f6e9852a 4549 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4550 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4551 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4552 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4553 break;
4554 default:
4555 spec->num_dmics = 0;
4556 break;
4557 }
8e21c34c
TD		 4558
4559 spec->init = stac925x_core_init;
4560 spec->mixer = stac925x_mixer;
4561
4562 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4563 if (!err) {
4564 if (spec->board_config < 0) {
4565 printk(KERN_WARNING "hda_codec: No auto-config is "
4566 "available, default to model=ref\n");
4567 spec->board_config = STAC_925x_REF;
4568 goto again;
4569 }
4570 err = -EINVAL;
4571 }
8e21c34c
TD		 4572 if (err < 0) {
4573 stac92xx_free(codec);
4574 return err;
4575 }
4576
4577 codec->patch_ops = stac92xx_patch_ops;
4578
4579 return 0;
4580}
4581
e1f0d669
MR		 4582static struct hda_input_mux stac92hd73xx_dmux = {
4583 .num_items = 4,
4584 .items = {
4585 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4586 { "Digital Mic 1", 0x09 },
4587 { "Digital Mic 2", 0x0a },
2a9c7816 4588 { "CD", 0x08 },
e1f0d669
MR		 4589 }
4590};
4591
4592static int patch_stac92hd73xx(struct hda_codec *codec)
4593{
4594 struct sigmatel_spec *spec;
4595 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4596 int err = 0;
c21ca4a8 4597 int num_dacs;
e1f0d669
MR		 4598
4599 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4600 if (spec == NULL)
4601 return -ENOMEM;
4602
4603 codec->spec = spec;
e99d32b3 4604 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4605 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4606 spec->pin_nids = stac92hd73xx_pin_nids;
4607 spec->board_config = snd_hda_check_board_config(codec,
4608 STAC_92HD73XX_MODELS,
4609 stac92hd73xx_models,
4610 stac92hd73xx_cfg_tbl);
4611again:
4612 if (spec->board_config < 0) {
4613 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4614 " STAC92HD73XX, using BIOS defaults\n");
4615 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4616 } else
4617 err = stac_save_pin_cfgs(codec,
4618 stac92hd73xx_brd_tbl[spec->board_config]);
4619 if (err < 0) {
4620 stac92xx_free(codec);
4621 return err;
e1f0d669
MR		 4622 }
4623
c21ca4a8 4624 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4625 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4626
c21ca4a8 4627 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4628 printk(KERN_WARNING "hda_codec: Could not determine "
4629 "number of channels defaulting to DAC count\n");
c21ca4a8 4630 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4631 }
c21ca4a8 4632 switch (num_dacs) {
e1f0d669
MR		 4633 case 0x3: /* 6 Channel */
4634 spec->mixer = stac92hd73xx_6ch_mixer;
4635 spec->init = stac92hd73xx_6ch_core_init;
4636 break;
4637 case 0x4: /* 8 Channel */
e1f0d669
MR		 4638 spec->mixer = stac92hd73xx_8ch_mixer;
4639 spec->init = stac92hd73xx_8ch_core_init;
4640 break;
4641 case 0x5: /* 10 Channel */
e1f0d669
MR		 4642 spec->mixer = stac92hd73xx_10ch_mixer;
4643 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4644 }
4645 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4646
e1f0d669
MR		 4647 spec->aloopback_mask = 0x01;
4648 spec->aloopback_shift = 8;
4649
1cd2224c 4650 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4651 spec->mux_nids = stac92hd73xx_mux_nids;
4652 spec->adc_nids = stac92hd73xx_adc_nids;
4653 spec->dmic_nids = stac92hd73xx_dmic_nids;
4654 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4655 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4656 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4657 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4658
4659 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4660 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4661 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4662 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4663 sizeof(stac92hd73xx_dmux));
4664
a7662640 4665 switch (spec->board_config) {
6b3ab21e 4666 case STAC_DELL_EQ:
d654a660 4667 spec->init = dell_eq_core_init;
6b3ab21e 4668 /* fallthru */
661cd8fb
TI		 4669 case STAC_DELL_M6_AMIC:
4670 case STAC_DELL_M6_DMIC:
4671 case STAC_DELL_M6_BOTH:
2a9c7816 4672 spec->num_smuxes = 0;
2a9c7816
MR		 4673 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4674 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4675 spec->eapd_switch = 0;
2a9c7816 4676 spec->num_amps = 1;
6b3ab21e 4677
c21ca4a8 4678 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4679 spec->init = dell_m6_core_init;
661cd8fb
TI		 4680 switch (spec->board_config) {
4681 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4682 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4683 spec->num_dmics = 0;
2a9c7816 4684 spec->private_dimux.num_items = 1;
a7662640 4685 break;
661cd8fb 4686 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4687 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4688 spec->num_dmics = 1;
2a9c7816 4689 spec->private_dimux.num_items = 2;
a7662640 4690 break;
661cd8fb 4691 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4692 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4693 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4694 spec->num_dmics = 1;
2a9c7816 4695 spec->private_dimux.num_items = 2;
a7662640
MR		 4696 break;
4697 }
4698 break;
4699 default:
4700 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4701 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4702 spec->eapd_switch = 1;
a7662640 4703 }
b2c4f4d7
MR		 4704 if (spec->board_config > STAC_92HD73XX_REF) {
4705 /* GPIO0 High = Enable EAPD */
4706 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4707 spec->gpio_data = 0x01;
4708 }
2a9c7816 4709 spec->dinput_mux = &spec->private_dimux;
a7662640 4710
a64135a2
MR		 4711 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4712 spec->pwr_nids = stac92hd73xx_pwr_nids;
4713
d9737751 4714 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4715
4716 if (!err) {
4717 if (spec->board_config < 0) {
4718 printk(KERN_WARNING "hda_codec: No auto-config is "
4719 "available, default to model=ref\n");
4720 spec->board_config = STAC_92HD73XX_REF;
4721 goto again;
4722 }
4723 err = -EINVAL;
4724 }
4725
4726 if (err < 0) {
4727 stac92xx_free(codec);
4728 return err;
4729 }
4730
9e43f0de
TI		 4731 if (spec->board_config == STAC_92HD73XX_NO_JD)
4732 spec->hp_detect = 0;
4733
e1f0d669
MR		 4734 codec->patch_ops = stac92xx_patch_ops;
4735
2d34e1b3
TI		 4736 codec->proc_widget_hook = stac92hd7x_proc_hook;
4737
e1f0d669
MR		 4738 return 0;
4739}
4740
d0513fc6
MR		 4741static struct hda_input_mux stac92hd83xxx_dmux = {
4742 .num_items = 3,
4743 .items = {
4744 { "Analog Inputs", 0x03 },
4745 { "Digital Mic 1", 0x04 },
4746 { "Digital Mic 2", 0x05 },
4747 }
4748};
4749
4750static int patch_stac92hd83xxx(struct hda_codec *codec)
4751{
4752 struct sigmatel_spec *spec;
65557f35 4753 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4754 int err;
65557f35 4755 int num_dacs;
d0513fc6
MR		 4756
4757 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4758 if (spec == NULL)
4759 return -ENOMEM;
4760
4761 codec->spec = spec;
0ffa9807 4762 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4763 spec->mono_nid = 0x19;
4764 spec->digbeep_nid = 0x21;
4765 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4766 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4767 spec->adc_nids = stac92hd83xxx_adc_nids;
4768 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4769 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR		 4770 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4771 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4772 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4773
65557f35
MR		 4774
4775 /* set port 0xe to select the last DAC
4776 */
4777 num_dacs = snd_hda_get_connections(codec, 0x0e,
4778 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4779
4780 snd_hda_codec_write_cache(codec, 0xe, 0,
4781 AC_VERB_SET_CONNECT_SEL, num_dacs);
4782
d0513fc6
MR		 4783 spec->init = stac92hd83xxx_core_init;
4784 switch (codec->vendor_id) {
4785 case 0x111d7605:
d0513fc6
MR		 4786 break;
4787 default:
4788 spec->num_pwrs--;
d0513fc6
MR		 4789 }
4790
4791 spec->mixer = stac92hd83xxx_mixer;
4792 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4793 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4794 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4795 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR		 4796 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4797 spec->dinput_mux = &stac92hd83xxx_dmux;
4798 spec->pin_nids = stac92hd83xxx_pin_nids;
4799 spec->board_config = snd_hda_check_board_config(codec,
4800 STAC_92HD83XXX_MODELS,
4801 stac92hd83xxx_models,
4802 stac92hd83xxx_cfg_tbl);
4803again:
4804 if (spec->board_config < 0) {
4805 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4806 " STAC92HD83XXX, using BIOS defaults\n");
4807 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4808 } else
4809 err = stac_save_pin_cfgs(codec,
4810 stac92hd83xxx_brd_tbl[spec->board_config]);
4811 if (err < 0) {
4812 stac92xx_free(codec);
4813 return err;
d0513fc6
MR		 4814 }
4815
4816 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4817 if (!err) {
4818 if (spec->board_config < 0) {
4819 printk(KERN_WARNING "hda_codec: No auto-config is "
4820 "available, default to model=ref\n");
4821 spec->board_config = STAC_92HD83XXX_REF;
4822 goto again;
4823 }
4824 err = -EINVAL;
4825 }
4826
4827 if (err < 0) {
4828 stac92xx_free(codec);
4829 return err;
4830 }
4831
4832 codec->patch_ops = stac92xx_patch_ops;
4833
2d34e1b3
TI		 4834 codec->proc_widget_hook = stac92hd_proc_hook;
4835
d0513fc6
MR		 4836 return 0;
4837}
4838
4b33c767
MR		 4839static struct hda_input_mux stac92hd71bxx_dmux = {
4840 .num_items = 4,
4841 .items = {
4842 { "Analog Inputs", 0x00 },
4843 { "Mixer", 0x01 },
4844 { "Digital Mic 1", 0x02 },
4845 { "Digital Mic 2", 0x03 },
4846 }
4847};
4848
e035b841
MR		 4849static int patch_stac92hd71bxx(struct hda_codec *codec)
4850{
4851 struct sigmatel_spec *spec;
4852 int err = 0;
4853
4854 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4855 if (spec == NULL)
4856 return -ENOMEM;
4857
4858 codec->spec = spec;
8daaaa97 4859 codec->patch_ops = stac92xx_patch_ops;
e035b841 4860 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4861 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4862 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4863 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4864 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4865 spec->board_config = snd_hda_check_board_config(codec,
4866 STAC_92HD71BXX_MODELS,
4867 stac92hd71bxx_models,
4868 stac92hd71bxx_cfg_tbl);
4869again:
4870 if (spec->board_config < 0) {
4871 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4872 " STAC92HD71BXX, using BIOS defaults\n");
4873 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4874 } else
4875 err = stac_save_pin_cfgs(codec,
4876 stac92hd71bxx_brd_tbl[spec->board_config]);
4877 if (err < 0) {
4878 stac92xx_free(codec);
4879 return err;
e035b841
MR		 4880 }
4881
41c3b648
TI		 4882 if (spec->board_config > STAC_92HD71BXX_REF) {
4883 /* GPIO0 = EAPD */
4884 spec->gpio_mask = 0x01;
4885 spec->gpio_dir = 0x01;
4886 spec->gpio_data = 0x01;
4887 }
4888
541eee87
MR		 4889 switch (codec->vendor_id) {
4890 case 0x111d76b6: /* 4 Port without Analog Mixer */
4891 case 0x111d76b7:
4892 case 0x111d76b4: /* 6 Port without Analog Mixer */
4893 case 0x111d76b5:
4894 spec->mixer = stac92hd71bxx_mixer;
4895 spec->init = stac92hd71bxx_core_init;
0ffa9807 4896 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4897 break;
aafc4412 4898 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4899 switch (spec->board_config) {
4900 case STAC_HP_M4:
72474be6 4901 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4902 err = stac_add_event(spec, codec->afg,
4903 STAC_VREF_EVENT, 0x02);
4904 if (err < 0)
4905 return err;
c5d08bb5 4906 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4907 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4908 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4909 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4910 AC_USRSP_EN | err);
72474be6
MR		 4911 spec->gpio_mask |= 0x02;
4912 break;
4913 }
8daaaa97 4914 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4915 (codec->revision_id & 0xf) == 1)
8daaaa97 4916 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4917
aafc4412
MR		 4918 /* no output amps */
4919 spec->num_pwrs = 0;
4920 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4921 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4922
4923 /* disable VSW */
4924 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4925 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4926 break;
4927 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4928 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4929 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4930
aafc4412
MR		 4931 /* no output amps */
4932 spec->num_pwrs = 0;
4933 /* fallthru */
541eee87 4934 default:
4b33c767 4935 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4936 spec->mixer = stac92hd71bxx_analog_mixer;
4937 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4938 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4939 }
4940
4b33c767 4941 spec->aloopback_mask = 0x50;
541eee87
MR		 4942 spec->aloopback_shift = 0;
4943
8daaaa97 4944 spec->powerdown_adcs = 1;
1cd2224c 4945 spec->digbeep_nid = 0x26;
e035b841
MR		 4946 spec->mux_nids = stac92hd71bxx_mux_nids;
4947 spec->adc_nids = stac92hd71bxx_adc_nids;
4948 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4949 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4950 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4951 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4952
4953 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4954 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4955
6a14f585
MR		 4956 switch (spec->board_config) {
4957 case STAC_HP_M4:
6a14f585 4958 /* enable internal microphone */
af9f341a 4959 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4960 stac92xx_auto_set_pinctl(codec, 0x0e,
4961 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4962 /* fallthru */
4963 case STAC_DELL_M4_2:
4964 spec->num_dmics = 0;
4965 spec->num_smuxes = 0;
4966 spec->num_dmuxes = 0;
4967 break;
4968 case STAC_DELL_M4_1:
4969 case STAC_DELL_M4_3:
4970 spec->num_dmics = 1;
4971 spec->num_smuxes = 0;
4972 spec->num_dmuxes = 0;
6a14f585
MR		 4973 break;
4974 default:
4975 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4976 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4977 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4978 };
4979
c21ca4a8 4980 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 4981 if (spec->dinput_mux)
4982 spec->private_dimux.num_items +=
4983 spec->num_dmics -
4984 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4985
4986 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4987 if (!err) {
4988 if (spec->board_config < 0) {
4989 printk(KERN_WARNING "hda_codec: No auto-config is "
4990 "available, default to model=ref\n");
4991 spec->board_config = STAC_92HD71BXX_REF;
4992 goto again;
4993 }
4994 err = -EINVAL;
4995 }
4996
4997 if (err < 0) {
4998 stac92xx_free(codec);
4999 return err;
5000 }
5001
2d34e1b3
TI		 5002 codec->proc_widget_hook = stac92hd7x_proc_hook;
5003
e035b841
MR		 5004 return 0;
5005};
5006
2f2f4251
M		 5007static int patch_stac922x(struct hda_codec *codec)
5008{
5009 struct sigmatel_spec *spec;
c7d4b2fa 5010 int err;
2f2f4251 5011
e560d8d8 5012 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5013 if (spec == NULL)
5014 return -ENOMEM;
5015
5016 codec->spec = spec;
a4eed138 5017 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5018 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5019 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5020 stac922x_models,
5021 stac922x_cfg_tbl);
536319af 5022 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5023 spec->gpio_mask = spec->gpio_dir = 0x03;
5024 spec->gpio_data = 0x03;
3fc24d85
TI		 5025 /* Intel Macs have all same PCI SSID, so we need to check
5026 * codec SSID to distinguish the exact models
5027 */
6f0778d8 5028 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5029 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5030
5031 case 0x106b0800:
5032 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5033 break;
5d5d3bc3
IZ		 5034 case 0x106b0600:
5035 case 0x106b0700:
5036 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5037 break;
5d5d3bc3
IZ		 5038 case 0x106b0e00:
5039 case 0x106b0f00:
5040 case 0x106b1600:
5041 case 0x106b1700:
5042 case 0x106b0200:
5043 case 0x106b1e00:
5044 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5045 break;
5d5d3bc3
IZ		 5046 case 0x106b1a00:
5047 case 0x00000100:
5048 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5049 break;
5d5d3bc3
IZ		 5050 case 0x106b0a00:
5051 case 0x106b2200:
5052 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5053 break;
536319af
NB		 5054 default:
5055 spec->board_config = STAC_INTEL_MAC_V3;
5056 break;
3fc24d85
TI		 5057 }
5058 }
5059
9e507abd 5060 again:
11b44bbd
RF		 5061 if (spec->board_config < 0) {
5062 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5063 "using BIOS defaults\n");
5064 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5065 } else
5066 err = stac_save_pin_cfgs(codec,
5067 stac922x_brd_tbl[spec->board_config]);
5068 if (err < 0) {
5069 stac92xx_free(codec);
5070 return err;
403d1944 5071 }
2f2f4251 5072
c7d4b2fa
M		 5073 spec->adc_nids = stac922x_adc_nids;
5074 spec->mux_nids = stac922x_mux_nids;
2549413e 5075 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5076 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5077 spec->num_dmics = 0;
a64135a2 5078 spec->num_pwrs = 0;
c7d4b2fa
M		 5079
5080 spec->init = stac922x_core_init;
2f2f4251 5081 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5082
5083 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5084
3cc08dc6 5085 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5086 if (!err) {
5087 if (spec->board_config < 0) {
5088 printk(KERN_WARNING "hda_codec: No auto-config is "
5089 "available, default to model=ref\n");
5090 spec->board_config = STAC_D945_REF;
5091 goto again;
5092 }
5093 err = -EINVAL;
5094 }
3cc08dc6
MP		 5095 if (err < 0) {
5096 stac92xx_free(codec);
5097 return err;
5098 }
5099
5100 codec->patch_ops = stac92xx_patch_ops;
5101
807a4636
TI		 5102 /* Fix Mux capture level; max to 2 */
5103 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5104 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5105 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5106 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5107 (0 << AC_AMPCAP_MUTE_SHIFT));
5108
3cc08dc6
MP		 5109 return 0;
5110}
5111
5112static int patch_stac927x(struct hda_codec *codec)
5113{
5114 struct sigmatel_spec *spec;
5115 int err;
5116
5117 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5118 if (spec == NULL)
5119 return -ENOMEM;
5120
5121 codec->spec = spec;
a4eed138 5122 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5123 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5124 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5125 stac927x_models,
5126 stac927x_cfg_tbl);
9e507abd 5127 again:
8e9068b1
MR		 5128 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5129 if (spec->board_config < 0)
5130 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5131 "STAC927x, using BIOS defaults\n");
11b44bbd 5132 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5133 } else
5134 err = stac_save_pin_cfgs(codec,
5135 stac927x_brd_tbl[spec->board_config]);
5136 if (err < 0) {
5137 stac92xx_free(codec);
5138 return err;
3cc08dc6
MP		 5139 }
5140
1cd2224c 5141 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5142 spec->adc_nids = stac927x_adc_nids;
5143 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5144 spec->mux_nids = stac927x_mux_nids;
5145 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5146 spec->smux_nids = stac927x_smux_nids;
5147 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5148 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5149 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5150 spec->multiout.dac_nids = spec->dac_nids;
5151
81d3dbde 5152 switch (spec->board_config) {
93ed1503 5153 case STAC_D965_3ST:
93ed1503 5154 case STAC_D965_5ST:
8e9068b1 5155 /* GPIO0 High = Enable EAPD */
0fc9dec4 5156 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5157 spec->gpio_data = 0x01;
8e9068b1
MR		 5158 spec->num_dmics = 0;
5159
93ed1503 5160 spec->init = d965_core_init;
9e05b7a3 5161 spec->mixer = stac927x_mixer;
81d3dbde 5162 break;
8e9068b1 5163 case STAC_DELL_BIOS:
780c8be4
MR		 5164 switch (codec->subsystem_id) {
5165 case 0x10280209:
5166 case 0x1028022e:
5167 /* correct the device field to SPDIF out */
af9f341a 5168 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5169 break;
5170 };
03d7ca17 5171 /* configure the analog microphone on some laptops */
af9f341a 5172 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5173 /* correct the front output jack as a hp out */
af9f341a 5174 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5175 /* correct the front input jack as a mic */
af9f341a 5176 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5177 /* fallthru */
8e9068b1
MR		 5178 case STAC_DELL_3ST:
5179 /* GPIO2 High = Enable EAPD */
0fc9dec4 5180 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5181 spec->gpio_data = 0x04;
7f16859a
MR		 5182 spec->dmic_nids = stac927x_dmic_nids;
5183 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5184
8e9068b1
MR		 5185 spec->init = d965_core_init;
5186 spec->mixer = stac927x_mixer;
5187 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5188 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5189 break;
5190 default:
b2c4f4d7
MR		 5191 if (spec->board_config > STAC_D965_REF) {
5192 /* GPIO0 High = Enable EAPD */
5193 spec->eapd_mask = spec->gpio_mask = 0x01;
5194 spec->gpio_dir = spec->gpio_data = 0x01;
5195 }
8e9068b1
MR		 5196 spec->num_dmics = 0;
5197
5198 spec->init = stac927x_core_init;
5199 spec->mixer = stac927x_mixer;
7f16859a
MR		 5200 }
5201
a64135a2 5202 spec->num_pwrs = 0;
e1f0d669
MR		 5203 spec->aloopback_mask = 0x40;
5204 spec->aloopback_shift = 0;
c0cea0d0 5205 spec->eapd_switch = 1;
8e9068b1 5206
3cc08dc6 5207 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5208 if (!err) {
5209 if (spec->board_config < 0) {
5210 printk(KERN_WARNING "hda_codec: No auto-config is "
5211 "available, default to model=ref\n");
5212 spec->board_config = STAC_D965_REF;
5213 goto again;
5214 }
5215 err = -EINVAL;
5216 }
c7d4b2fa
M		 5217 if (err < 0) {
5218 stac92xx_free(codec);
5219 return err;
5220 }
2f2f4251
M		 5221
5222 codec->patch_ops = stac92xx_patch_ops;
5223
2d34e1b3
TI		 5224 codec->proc_widget_hook = stac927x_proc_hook;
5225
52987656
TI		 5226 /*
5227 * !!FIXME!!
5228 * The STAC927x seem to require fairly long delays for certain
5229 * command sequences. With too short delays (even if the answer
5230 * is set to RIRB properly), it results in the silence output
5231 * on some hardwares like Dell.
5232 *
5233 * The below flag enables the longer delay (see get_response
5234 * in hda_intel.c).
5235 */
5236 codec->bus->needs_damn_long_delay = 1;
5237
e28d8322
TI		 5238 /* no jack detecion for ref-no-jd model */
5239 if (spec->board_config == STAC_D965_REF_NO_JD)
5240 spec->hp_detect = 0;
5241
2f2f4251
M		 5242 return 0;
5243}
5244
f3302a59
MP		 5245static int patch_stac9205(struct hda_codec *codec)
5246{
5247 struct sigmatel_spec *spec;
8259980e 5248 int err;
f3302a59
MP		 5249
5250 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5251 if (spec == NULL)
5252 return -ENOMEM;
5253
5254 codec->spec = spec;
a4eed138 5255 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5256 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5257 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5258 stac9205_models,
5259 stac9205_cfg_tbl);
9e507abd 5260 again:
11b44bbd
RF		 5261 if (spec->board_config < 0) {
5262 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5263 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5264 } else
5265 err = stac_save_pin_cfgs(codec,
5266 stac9205_brd_tbl[spec->board_config]);
5267 if (err < 0) {
5268 stac92xx_free(codec);
5269 return err;
f3302a59
MP		 5270 }
5271
1cd2224c 5272 spec->digbeep_nid = 0x23;
f3302a59 5273 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5274 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5275 spec->mux_nids = stac9205_mux_nids;
2549413e 5276 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5277 spec->smux_nids = stac9205_smux_nids;
5278 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5279 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5280 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5281 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5282 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5283 spec->num_pwrs = 0;
f3302a59
MP		 5284
5285 spec->init = stac9205_core_init;
5286 spec->mixer = stac9205_mixer;
5287
e1f0d669
MR		 5288 spec->aloopback_mask = 0x40;
5289 spec->aloopback_shift = 0;
c0cea0d0 5290 spec->eapd_switch = 1;
f3302a59 5291 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5292
ae0a8ed8 5293 switch (spec->board_config){
ae0a8ed8 5294 case STAC_9205_DELL_M43:
87d48363 5295 /* Enable SPDIF in/out */
af9f341a
TI		 5296 stac_change_pin_config(codec, 0x1f, 0x01441030);
5297 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5298
4fe5195c 5299 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5300 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5301 if (err < 0)
5302 return err;
c5d08bb5 5303 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5304 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5305 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5306 AC_VERB_SET_UNSOLICITED_ENABLE,
5307 AC_USRSP_EN | err);
4fe5195c
MR		 5308
5309 spec->gpio_dir = 0x0b;
0fc9dec4 5310 spec->eapd_mask = 0x01;
4fe5195c
MR		 5311 spec->gpio_mask = 0x1b;
5312 spec->gpio_mute = 0x10;
e2e7d624 5313 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5314 * GPIO3 Low = DRM
87d48363 5315 */
4fe5195c 5316 spec->gpio_data = 0x01;
ae0a8ed8 5317 break;
b2c4f4d7
MR		 5318 case STAC_9205_REF:
5319 /* SPDIF-In enabled */
5320 break;
ae0a8ed8
TD		 5321 default:
5322 /* GPIO0 High = EAPD */
0fc9dec4 5323 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5324 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5325 break;
5326 }
33382403 5327
f3302a59 5328 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5329 if (!err) {
5330 if (spec->board_config < 0) {
5331 printk(KERN_WARNING "hda_codec: No auto-config is "
5332 "available, default to model=ref\n");
5333 spec->board_config = STAC_9205_REF;
5334 goto again;
5335 }
5336 err = -EINVAL;
5337 }
f3302a59
MP		 5338 if (err < 0) {
5339 stac92xx_free(codec);
5340 return err;
5341 }
5342
5343 codec->patch_ops = stac92xx_patch_ops;
5344
2d34e1b3
TI		 5345 codec->proc_widget_hook = stac9205_proc_hook;
5346
f3302a59
MP		 5347 return 0;
5348}
5349
db064e50 5350/*
6d859065 5351 * STAC9872 hack
db064e50
TI		 5352 */
5353
1e137f92 5354static struct hda_verb stac9872_core_init[] = {
1624cb9a 5355 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5356 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5357 {}
5358};
5359
caa10b6e
TI		 5360static struct snd_kcontrol_new stac9872_mixer[] = {
5361 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5362 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5363 STAC_INPUT_SOURCE(1),
5364 { } /* end */
5365};
5366
5367static hda_nid_t stac9872_pin_nids[] = {
5368 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5369 0x11, 0x13, 0x14,
5370};
5371
5372static hda_nid_t stac9872_adc_nids[] = {
5373 0x8 /*,0x6*/
5374};
5375
5376static hda_nid_t stac9872_mux_nids[] = {
5377 0x15
5378};
5379
6d859065 5380static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5381{
5382 struct sigmatel_spec *spec;
1e137f92 5383 int err;
db064e50 5384
db064e50
TI		 5385 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5386 if (spec == NULL)
5387 return -ENOMEM;
db064e50 5388 codec->spec = spec;
caa10b6e 5389
1e137f92 5390#if 0 /* no model right now */
caa10b6e
TI		 5391 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5392 stac9872_models,
5393 stac9872_cfg_tbl);
1e137f92 5394#endif
db064e50 5395
1e137f92
TI		 5396 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5397 spec->pin_nids = stac9872_pin_nids;
5398 spec->multiout.dac_nids = spec->dac_nids;
5399 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5400 spec->adc_nids = stac9872_adc_nids;
5401 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5402 spec->mux_nids = stac9872_mux_nids;
5403 spec->mixer = stac9872_mixer;
5404 spec->init = stac9872_core_init;
5405
5406 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5407 if (err < 0) {
5408 stac92xx_free(codec);
5409 return -EINVAL;
5410 }
5411 spec->input_mux = &spec->private_imux;
5412 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 5413 return 0;
5414}
5415
5416
2f2f4251
M		 5417/*
5418 * patch entries
5419 */
1289e9e8 5420static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5421 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5422 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5423 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5424 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5425 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5426 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5427 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5428 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5429 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5430 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5431 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5432 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5433 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5434 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5435 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5436 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5437 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5438 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5439 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5440 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5441 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5442 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5443 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5444 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5445 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5446 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5447 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5448 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5449 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5450 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5451 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5452 /* The following does not take into account .id=0x83847661 when subsys =
5453 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5454 * currently not fully supported.
5455 */
5456 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5457 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5458 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5459 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5460 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5461 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5462 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5463 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5464 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5465 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5466 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5467 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5468 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5469 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5470 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5471 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5472 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5473 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5474 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5475 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5476 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5477 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5478 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5479 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5480 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5481 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5482 {} /* terminator */
5483};
1289e9e8
TI		 5484
5485MODULE_ALIAS("snd-hda-codec-id:8384*");
5486MODULE_ALIAS("snd-hda-codec-id:111d*");
5487
5488MODULE_LICENSE("GPL");
5489MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5490
5491static struct hda_codec_preset_list sigmatel_list = {
5492 .preset = snd_hda_preset_sigmatel,
5493 .owner = THIS_MODULE,
5494};
5495
5496static int __init patch_sigmatel_init(void)
5497{
5498 return snd_hda_add_codec_preset(&sigmatel_list);
5499}
5500
5501static void __exit patch_sigmatel_exit(void)
5502{
5503 snd_hda_delete_codec_preset(&sigmatel_list);
5504}
5505
5506module_init(patch_sigmatel_init)
5507module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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