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ALSA: HDMI - Setup channel mapping for non_pcm audio
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
c7d4b2fa 34#include <sound/asoundef.h>
45a6ac16 35#include <sound/jack.h>
a74ccea5 36#include <sound/tlv.h>
2f2f4251
M		 37#include "hda_codec.h"
38#include "hda_local.h"
128bc4ba 39#include "hda_auto_parser.h"
1cd2224c 40#include "hda_beep.h"
1835a0f9 41#include "hda_jack.h"
2f2f4251 42
c6e4c666
TI		 43enum {
44 STAC_VREF_EVENT = 1,
45 STAC_INSERT_EVENT,
46 STAC_PWR_EVENT,
47 STAC_HP_EVENT,
fefd67f3 48 STAC_LO_EVENT,
3d21d3f7 49 STAC_MIC_EVENT,
c6e4c666 50};
4e55096e 51
f5fcc13c 52enum {
1607b8ea 53 STAC_AUTO,
f5fcc13c 54 STAC_REF,
bf277785 55 STAC_9200_OQO,
dfe495d0
TI		 56 STAC_9200_DELL_D21,
57 STAC_9200_DELL_D22,
58 STAC_9200_DELL_D23,
59 STAC_9200_DELL_M21,
60 STAC_9200_DELL_M22,
61 STAC_9200_DELL_M23,
62 STAC_9200_DELL_M24,
63 STAC_9200_DELL_M25,
64 STAC_9200_DELL_M26,
65 STAC_9200_DELL_M27,
58eec423
MCC		 66 STAC_9200_M4,
67 STAC_9200_M4_2,
117f257d 68 STAC_9200_PANASONIC,
f5fcc13c
TI		 69 STAC_9200_MODELS
70};
71
72enum {
1607b8ea 73 STAC_9205_AUTO,
f5fcc13c 74 STAC_9205_REF,
dfe495d0 75 STAC_9205_DELL_M42,
ae0a8ed8
TD		 76 STAC_9205_DELL_M43,
77 STAC_9205_DELL_M44,
d9a4268e 78 STAC_9205_EAPD,
f5fcc13c
TI		 79 STAC_9205_MODELS
80};
81
e1f0d669 82enum {
1607b8ea 83 STAC_92HD73XX_AUTO,
9e43f0de 84 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 85 STAC_92HD73XX_REF,
ae709440 86 STAC_92HD73XX_INTEL,
661cd8fb
TI		 87 STAC_DELL_M6_AMIC,
88 STAC_DELL_M6_DMIC,
89 STAC_DELL_M6_BOTH,
6b3ab21e 90 STAC_DELL_EQ,
842ae638 91 STAC_ALIENWARE_M17X,
e1f0d669
MR		 92 STAC_92HD73XX_MODELS
93};
94
d0513fc6 95enum {
1607b8ea 96 STAC_92HD83XXX_AUTO,
d0513fc6 97 STAC_92HD83XXX_REF,
32ed3f46 98 STAC_92HD83XXX_PWR_REF,
8bb0ac55 99 STAC_DELL_S14,
f7f9bdfa 100 STAC_DELL_VOSTRO_3500,
0c27c180 101 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 102 STAC_HP_DV7_4000,
5556e147 103 STAC_HP_ZEPHYR,
a3e19973 104 STAC_92HD83XXX_HP_LED,
ff8a1e27 105 STAC_92HD83XXX_HP_INV_LED,
d0513fc6
MR		 106 STAC_92HD83XXX_MODELS
107};
108
e035b841 109enum {
1607b8ea 110 STAC_92HD71BXX_AUTO,
e035b841 111 STAC_92HD71BXX_REF,
a7662640
MR		 112 STAC_DELL_M4_1,
113 STAC_DELL_M4_2,
3a7abfd2 114 STAC_DELL_M4_3,
6a14f585 115 STAC_HP_M4,
2a6ce6e5 116 STAC_HP_DV4,
1b0652eb 117 STAC_HP_DV5,
ae6241fb 118 STAC_HP_HDX,
514bf54c 119 STAC_HP_DV4_1222NR,
e035b841
MR		 120 STAC_92HD71BXX_MODELS
121};
122
8e21c34c 123enum {
1607b8ea 124 STAC_925x_AUTO,
8e21c34c 125 STAC_925x_REF,
9cb36c2a
MCC		 126 STAC_M1,
127 STAC_M1_2,
128 STAC_M2,
8e21c34c 129 STAC_M2_2,
9cb36c2a
MCC		 130 STAC_M3,
131 STAC_M5,
132 STAC_M6,
8e21c34c
TD		 133 STAC_925x_MODELS
134};
135
f5fcc13c 136enum {
1607b8ea 137 STAC_922X_AUTO,
f5fcc13c
TI		 138 STAC_D945_REF,
139 STAC_D945GTP3,
140 STAC_D945GTP5,
5d5d3bc3
IZ		 141 STAC_INTEL_MAC_V1,
142 STAC_INTEL_MAC_V2,
143 STAC_INTEL_MAC_V3,
144 STAC_INTEL_MAC_V4,
145 STAC_INTEL_MAC_V5,
536319af
NB		 146 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
147 * is given, one of the above models will be
148 * chosen according to the subsystem id. */
dfe495d0 149 /* for backward compatibility */
f5fcc13c 150 STAC_MACMINI,
3fc24d85 151 STAC_MACBOOK,
6f0778d8
NB		 152 STAC_MACBOOK_PRO_V1,
153 STAC_MACBOOK_PRO_V2,
f16928fb 154 STAC_IMAC_INTEL,
0dae0f83 155 STAC_IMAC_INTEL_20,
8c650087 156 STAC_ECS_202,
dfe495d0
TI		 157 STAC_922X_DELL_D81,
158 STAC_922X_DELL_D82,
159 STAC_922X_DELL_M81,
160 STAC_922X_DELL_M82,
f5fcc13c
TI		 161 STAC_922X_MODELS
162};
163
164enum {
1607b8ea 165 STAC_927X_AUTO,
e28d8322 166 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 167 STAC_D965_REF,
168 STAC_D965_3ST,
169 STAC_D965_5ST,
679d92ed 170 STAC_D965_5ST_NO_FP,
4ff076e5 171 STAC_DELL_3ST,
8e9068b1 172 STAC_DELL_BIOS,
54930531 173 STAC_927X_VOLKNOB,
f5fcc13c
TI		 174 STAC_927X_MODELS
175};
403d1944 176
307282c8
TI		 177enum {
178 STAC_9872_AUTO,
179 STAC_9872_VAIO,
180 STAC_9872_MODELS
181};
182
3d21d3f7
TI		 183struct sigmatel_mic_route {
184 hda_nid_t pin;
02d33322
TI		 185 signed char mux_idx;
186 signed char dmux_idx;
3d21d3f7
TI		 187};
188
699d8995
VK		 189#define MAX_PINS_NUM 16
190#define MAX_ADCS_NUM 4
191#define MAX_DMICS_NUM 4
192
2f2f4251 193struct sigmatel_spec {
c8b6bf9b 194 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 195 unsigned int num_mixers;
196
403d1944 197 int board_config;
c0cea0d0 198 unsigned int eapd_switch: 1;
c7d4b2fa 199 unsigned int surr_switch: 1;
3cc08dc6 200 unsigned int alt_switch: 1;
82bc955f 201 unsigned int hp_detect: 1;
00ef50c2 202 unsigned int spdif_mute: 1;
7c7767eb 203 unsigned int check_volume_offset:1;
3d21d3f7 204 unsigned int auto_mic:1;
1b0e372d 205 unsigned int linear_tone_beep:1;
c7d4b2fa 206
4fe5195c 207 /* gpio lines */
0fc9dec4 208 unsigned int eapd_mask;
4fe5195c
MR		 209 unsigned int gpio_mask;
210 unsigned int gpio_dir;
211 unsigned int gpio_data;
212 unsigned int gpio_mute;
86d190e7 213 unsigned int gpio_led;
c357aab0 214 unsigned int gpio_led_polarity;
f1a73746 215 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 216 unsigned int vref_led;
4fe5195c 217
8daaaa97
MR		 218 /* stream */
219 unsigned int stream_delay;
220
4fe5195c 221 /* analog loopback */
2b63536f 222 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 223 unsigned char aloopback_mask;
224 unsigned char aloopback_shift;
8259980e 225
a64135a2 226 /* power management */
c882246d 227 unsigned int power_map_bits;
a64135a2 228 unsigned int num_pwrs;
2b63536f
TI		 229 const hda_nid_t *pwr_nids;
230 const hda_nid_t *dac_list;
a64135a2 231
2f2f4251 232 /* playback */
b22b4821
MR		 233 struct hda_input_mux *mono_mux;
234 unsigned int cur_mmux;
2f2f4251 235 struct hda_multi_out multiout;
3cc08dc6 236 hda_nid_t dac_nids[5];
c21ca4a8
TI		 237 hda_nid_t hp_dacs[5];
238 hda_nid_t speaker_dacs[5];
2f2f4251 239
7c7767eb
TI		 240 int volume_offset;
241
2f2f4251 242 /* capture */
2b63536f 243 const hda_nid_t *adc_nids;
2f2f4251 244 unsigned int num_adcs;
2b63536f 245 const hda_nid_t *mux_nids;
dabbed6f 246 unsigned int num_muxes;
2b63536f 247 const hda_nid_t *dmic_nids;
8b65727b 248 unsigned int num_dmics;
2b63536f 249 const hda_nid_t *dmux_nids;
1697055e 250 unsigned int num_dmuxes;
2b63536f 251 const hda_nid_t *smux_nids;
d9737751 252 unsigned int num_smuxes;
5207e10e 253 unsigned int num_analog_muxes;
6479c631 254
2b63536f
TI		 255 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
256 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI		 257 unsigned int num_caps; /* number of capture volume/switch elements */
258
3d21d3f7
TI		 259 struct sigmatel_mic_route ext_mic;
260 struct sigmatel_mic_route int_mic;
9907790a 261 struct sigmatel_mic_route dock_mic;
3d21d3f7 262
ea734963 263 const char * const *spdif_labels;
d9737751 264
dabbed6f 265 hda_nid_t dig_in_nid;
b22b4821 266 hda_nid_t mono_nid;
1cd2224c
MR		 267 hda_nid_t anabeep_nid;
268 hda_nid_t digbeep_nid;
2f2f4251 269
2f2f4251 270 /* pin widgets */
2b63536f 271 const hda_nid_t *pin_nids;
2f2f4251 272 unsigned int num_pins;
2f2f4251
M		 273
274 /* codec specific stuff */
2b63536f
TI		 275 const struct hda_verb *init;
276 const struct snd_kcontrol_new *mixer;
2f2f4251
M		 277
278 /* capture source */
8b65727b 279 struct hda_input_mux *dinput_mux;
e1f0d669 280 unsigned int cur_dmux[2];
c7d4b2fa 281 struct hda_input_mux *input_mux;
3cc08dc6 282 unsigned int cur_mux[3];
d9737751
MR		 283 struct hda_input_mux *sinput_mux;
284 unsigned int cur_smux[2];
2a9c7816
MR		 285 unsigned int cur_amux;
286 hda_nid_t *amp_nids;
8daaaa97 287 unsigned int powerdown_adcs;
2f2f4251 288
403d1944
MP		 289 /* i/o switches */
290 unsigned int io_switch[2];
0fb87bb4 291 unsigned int clfe_swap;
c21ca4a8
TI		 292 hda_nid_t line_switch; /* shared line-in for input and output */
293 hda_nid_t mic_switch; /* shared mic-in for input and output */
294 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 295 unsigned int aloopback;
2f2f4251 296
c7d4b2fa
M		 297 struct hda_pcm pcm_rec[2]; /* PCM information */
298
299 /* dynamic controls and input_mux */
300 struct auto_pin_cfg autocfg;
603c4019 301 struct snd_array kctls;
8b65727b 302 struct hda_input_mux private_dimux;
c7d4b2fa 303 struct hda_input_mux private_imux;
d9737751 304 struct hda_input_mux private_smux;
b22b4821 305 struct hda_input_mux private_mono_mux;
699d8995
VK		 306
307 /* auto spec */
308 unsigned auto_pin_cnt;
309 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
310 unsigned auto_adc_cnt;
311 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
312 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
313 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
314 unsigned long auto_capvols[MAX_ADCS_NUM];
315 unsigned auto_dmic_cnt;
316 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2faa3bf1 317
d2f344b5 318 struct hda_vmaster_mute_hook vmaster_mute;
2f2f4251
M		 319};
320
c882246d
TI		 321#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
322#define AC_VERB_IDT_GET_POWER_MAP 0xfec
323
2b63536f 324static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M		 325 0x03,
326};
327
2b63536f 328static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M		 329 0x0c,
330};
331
2b63536f 332static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M		 333 0x02,
334};
335
2b63536f 336static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 337 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
338 0x0f, 0x10, 0x11
339};
340
2b63536f 341static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR		 342 0x26, 0,
343};
344
2b63536f 345static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR		 346 0x1a, 0x1b
347};
348
349#define STAC92HD73XX_NUM_DMICS 2
2b63536f 350static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR		 351 0x13, 0x14, 0
352};
353
354#define STAC92HD73_DAC_COUNT 5
e1f0d669 355
2b63536f 356static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 357 0x20, 0x21,
e1f0d669
MR		 358};
359
2b63536f 360static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR		 361 0x20, 0x21,
362};
363
2b63536f 364static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR		 365 0x22, 0x23,
366};
367
6479c631 368#define STAC92HD73XX_NUM_CAPS 2
2b63536f 369static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI		 370 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
371 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
372};
373#define stac92hd73xx_capsws stac92hd73xx_capvols
374
d0513fc6 375#define STAC92HD83_DAC_COUNT 3
d0513fc6 376
afef2cfa
CC		 377static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
378 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
379 0x0f, 0x10
d0513fc6
MR		 380};
381
2b63536f 382static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR		 383 0x1e, 0,
384};
385
2b63536f 386static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 387 0x11, 0x20,
ab5a6ebe
VK		 388};
389
2b63536f 390static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 391 0x0a, 0x0d, 0x0f
392};
393
2b63536f 394static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR		 395 0x12, 0x13,
396};
397
2b63536f 398static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR		 399 0x1a, 0x1b
400};
401
2b63536f 402static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 403 0x1c, 0x1d,
e1f0d669
MR		 404};
405
2b63536f 406static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR		 407 0x24, 0x25,
408};
409
e035b841 410#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 411static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR		 412 0x18, 0x19, 0
413};
414
2b63536f
TI		 415static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
416 0x18, 0
417};
418
419static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR		 420 0x22, 0
421};
422
6479c631 423#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 424static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI		 425 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
426 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
427};
428#define stac92hd71bxx_capsws stac92hd71bxx_capvols
429
2b63536f 430static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD		 431 0x03,
432};
433
2b63536f 434static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD		 435 0x0f,
436};
437
2b63536f 438static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD		 439 0x02,
440};
441
f6e9852a 442#define STAC925X_NUM_DMICS 1
2b63536f 443static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 444 0x15, 0
2c11f955
TD		 445};
446
2b63536f 447static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI		 448 0x14,
449};
450
2b63536f 451static const unsigned long stac925x_capvols[] = {
6479c631
TI		 452 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
453};
2b63536f 454static const unsigned long stac925x_capsws[] = {
6479c631
TI		 455 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
456};
457
2b63536f 458static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M		 459 0x06, 0x07,
460};
461
2b63536f 462static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M		 463 0x12, 0x13,
464};
465
6479c631 466#define STAC922X_NUM_CAPS 2
2b63536f 467static const unsigned long stac922x_capvols[] = {
6479c631
TI		 468 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
469 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
470};
471#define stac922x_capsws stac922x_capvols
472
2b63536f 473static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR		 474 0x1f, 0,
475};
476
2b63536f 477static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP		 478 0x07, 0x08, 0x09
479};
480
2b63536f 481static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP		 482 0x15, 0x16, 0x17
483};
484
2b63536f 485static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR		 486 0x21,
487};
488
2b63536f 489static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR		 490 0x02, 0x03, 0x04, 0x05, 0x06, 0
491};
492
2b63536f 493static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR		 494 0x1b,
495};
496
7f16859a 497#define STAC927X_NUM_DMICS 2
2b63536f 498static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR		 499 0x13, 0x14, 0
500};
501
6479c631 502#define STAC927X_NUM_CAPS 3
2b63536f 503static const unsigned long stac927x_capvols[] = {
6479c631
TI		 504 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
505 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
506 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
507};
2b63536f 508static const unsigned long stac927x_capsws[] = {
6479c631
TI		 509 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
510 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
511 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
512};
513
ea734963 514static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 515 "Digital Playback", "ADAT", "Analog Mux 1",
516 "Analog Mux 2", "Analog Mux 3"
517};
518
2b63536f 519static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP		 520 0x12, 0x13
521};
522
2b63536f 523static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP		 524 0x19, 0x1a
525};
526
2b63536f 527static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 528 0x1d,
e1f0d669
MR		 529};
530
2b63536f 531static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR		 532 0x21,
533};
534
f6e9852a 535#define STAC9205_NUM_DMICS 2
2b63536f 536static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 537 0x17, 0x18, 0
8b65727b
MP		 538};
539
6479c631 540#define STAC9205_NUM_CAPS 2
2b63536f 541static const unsigned long stac9205_capvols[] = {
6479c631
TI		 542 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
543 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
544};
2b63536f 545static const unsigned long stac9205_capsws[] = {
6479c631
TI		 546 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
547 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
548};
549
2b63536f 550static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 551 0x08, 0x09, 0x0d, 0x0e,
552 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 553};
554
2b63536f 555static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD		 556 0x07, 0x08, 0x0a, 0x0b,
557 0x0c, 0x0d, 0x10, 0x11,
558};
559
2b63536f 560static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M		 561 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
562 0x0f, 0x10, 0x11, 0x15, 0x1b,
563};
564
2b63536f 565static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 566 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
567 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 568 0x14, 0x22, 0x23
e1f0d669
MR		 569};
570
616f89e7 571#define STAC92HD71BXX_NUM_PINS 13
2b63536f 572static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK		 573 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
574 0x00, 0x14, 0x18, 0x19, 0x1e,
575 0x1f, 0x20, 0x27
576};
2b63536f 577static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 578 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
579 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 580 0x1f, 0x20, 0x27
e035b841
MR		 581};
582
2b63536f 583static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP		 584 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
585 0x0f, 0x10, 0x11, 0x12, 0x13,
586 0x14, 0x21, 0x22, 0x23,
587};
588
2b63536f 589static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP		 590 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
591 0x0f, 0x14, 0x16, 0x17, 0x18,
592 0x21, 0x22,
f3302a59
MP		 593};
594
8b65727b
MP		 595static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
596 struct snd_ctl_elem_info *uinfo)
597{
598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
599 struct sigmatel_spec *spec = codec->spec;
600 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
601}
602
603static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
604 struct snd_ctl_elem_value *ucontrol)
605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
e1f0d669 608 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 609
e1f0d669 610 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 611 return 0;
612}
613
614static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
e1f0d669 619 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 620
621 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 622 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 623}
624
d9737751
MR		 625static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_info *uinfo)
627{
628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
629 struct sigmatel_spec *spec = codec->spec;
630 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
631}
632
633static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_value *ucontrol)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
639
640 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
641 return 0;
642}
643
644static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
645 struct snd_ctl_elem_value *ucontrol)
646{
647 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
648 struct sigmatel_spec *spec = codec->spec;
00ef50c2 649 struct hda_input_mux *smux = &spec->private_smux;
d9737751 650 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 651 int err, val;
652 hda_nid_t nid;
d9737751 653
00ef50c2 654 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 655 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 656 if (err < 0)
657 return err;
658
659 if (spec->spdif_mute) {
660 if (smux_idx == 0)
661 nid = spec->multiout.dig_out_nid;
662 else
663 nid = codec->slave_dig_outs[smux_idx - 1];
664 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 665 val = HDA_AMP_MUTE;
00ef50c2 666 else
c9b46f91 667 val = 0;
00ef50c2 668 /* un/mute SPDIF out */
c9b46f91
TI		 669 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
670 HDA_AMP_MUTE, val);
00ef50c2
MR		 671 }
672 return 0;
d9737751
MR		 673}
674
45eebda7
VK		 675static int stac_vrefout_set(struct hda_codec *codec,
676 hda_nid_t nid, unsigned int new_vref)
677{
678 int error, pinctl;
679
680 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
681 pinctl = snd_hda_codec_read(codec, nid, 0,
682 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
683
684 if (pinctl < 0)
685 return pinctl;
686
687 pinctl &= 0xff;
688 pinctl &= ~AC_PINCTL_VREFEN;
689 pinctl |= (new_vref & AC_PINCTL_VREFEN);
690
cdd03ced 691 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 692 if (error < 0)
693 return error;
694
695 return 1;
696}
697
2fc99890
NL		 698static unsigned int stac92xx_vref_set(struct hda_codec *codec,
699 hda_nid_t nid, unsigned int new_vref)
700{
b8621516 701 int error;
2fc99890
NL		 702 unsigned int pincfg;
703 pincfg = snd_hda_codec_read(codec, nid, 0,
704 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
705
706 pincfg &= 0xff;
707 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
708 pincfg |= new_vref;
709
710 if (new_vref == AC_PINCTL_VREF_HIZ)
711 pincfg |= AC_PINCTL_OUT_EN;
712 else
713 pincfg |= AC_PINCTL_IN_EN;
714
cdd03ced 715 error = snd_hda_set_pin_ctl_cache(codec, nid, pincfg);
2fc99890
NL		 716 if (error < 0)
717 return error;
718 else
719 return 1;
720}
721
722static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
723{
724 unsigned int vref;
725 vref = snd_hda_codec_read(codec, nid, 0,
726 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
727 vref &= AC_PINCTL_VREFEN;
728 return vref;
729}
730
c8b6bf9b 731static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 732{
733 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
734 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 735 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 736}
737
c8b6bf9b 738static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 739{
740 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
741 struct sigmatel_spec *spec = codec->spec;
742 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
743
744 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
745 return 0;
746}
747
c8b6bf9b 748static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 749{
750 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
751 struct sigmatel_spec *spec = codec->spec;
752 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 753 const struct hda_input_mux *imux = spec->input_mux;
094a4245 754 unsigned int idx, prev_idx, didx;
5207e10e
TI		 755
756 idx = ucontrol->value.enumerated.item[0];
757 if (idx >= imux->num_items)
758 idx = imux->num_items - 1;
759 prev_idx = spec->cur_mux[adc_idx];
760 if (prev_idx == idx)
761 return 0;
762 if (idx < spec->num_analog_muxes) {
763 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
764 AC_VERB_SET_CONNECT_SEL,
765 imux->items[idx].index);
094a4245
VK		 766 if (prev_idx >= spec->num_analog_muxes &&
767 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 768 imux = spec->dinput_mux;
769 /* 0 = analog */
770 snd_hda_codec_write_cache(codec,
771 spec->dmux_nids[adc_idx], 0,
772 AC_VERB_SET_CONNECT_SEL,
773 imux->items[0].index);
774 }
775 } else {
776 imux = spec->dinput_mux;
094a4245
VK		 777 /* first dimux item is hardcoded to select analog imux,
778 * so lets skip it
779 */
780 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 781 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
782 AC_VERB_SET_CONNECT_SEL,
094a4245 783 imux->items[didx].index);
5207e10e
TI		 784 }
785 spec->cur_mux[adc_idx] = idx;
786 return 1;
2f2f4251
M		 787}
788
b22b4821
MR		 789static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_info *uinfo)
791{
792 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
793 struct sigmatel_spec *spec = codec->spec;
794 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
795}
796
797static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
798 struct snd_ctl_elem_value *ucontrol)
799{
800 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
801 struct sigmatel_spec *spec = codec->spec;
802
803 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
804 return 0;
805}
806
807static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
808 struct snd_ctl_elem_value *ucontrol)
809{
810 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
811 struct sigmatel_spec *spec = codec->spec;
812
813 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
814 spec->mono_nid, &spec->cur_mmux);
815}
816
5f10c4a9
ML		 817#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
818
819static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
820 struct snd_ctl_elem_value *ucontrol)
821{
822 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 823 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 824 struct sigmatel_spec *spec = codec->spec;
825
e1f0d669
MR		 826 ucontrol->value.integer.value[0] = !!(spec->aloopback &
827 (spec->aloopback_mask << idx));
5f10c4a9
ML		 828 return 0;
829}
830
831static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
832 struct snd_ctl_elem_value *ucontrol)
833{
834 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
835 struct sigmatel_spec *spec = codec->spec;
e1f0d669 836 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 837 unsigned int dac_mode;
e1f0d669 838 unsigned int val, idx_val;
5f10c4a9 839
e1f0d669
MR		 840 idx_val = spec->aloopback_mask << idx;
841 if (ucontrol->value.integer.value[0])
842 val = spec->aloopback | idx_val;
843 else
844 val = spec->aloopback & ~idx_val;
68ea7b2f 845 if (spec->aloopback == val)
5f10c4a9
ML		 846 return 0;
847
68ea7b2f 848 spec->aloopback = val;
5f10c4a9 849
e1f0d669
MR		 850 /* Only return the bits defined by the shift value of the
851 * first two bytes of the mask
852 */
5f10c4a9 853 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 854 kcontrol->private_value & 0xFFFF, 0x0);
855 dac_mode >>= spec->aloopback_shift;
5f10c4a9 856
e1f0d669 857 if (spec->aloopback & idx_val) {
5f10c4a9 858 snd_hda_power_up(codec);
e1f0d669 859 dac_mode |= idx_val;
5f10c4a9
ML		 860 } else {
861 snd_hda_power_down(codec);
e1f0d669 862 dac_mode &= ~idx_val;
5f10c4a9
ML		 863 }
864
865 snd_hda_codec_write_cache(codec, codec->afg, 0,
866 kcontrol->private_value >> 16, dac_mode);
867
868 return 1;
869}
870
2b63536f 871static const struct hda_verb stac9200_core_init[] = {
2f2f4251 872 /* set dac0mux for dac converter */
c7d4b2fa 873 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 874 {}
875};
876
2b63536f 877static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI		 878 /* set dac0mux for dac converter */
879 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
880 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
881 {}
882};
883
2b63536f 884static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR		 885 /* set master volume to max value without distortion
886 * and direct control */
887 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 888 {}
889};
890
2b63536f 891static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 892 /* set master volume and direct control */
893 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 894 {}
895};
896
2b63536f 897static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 898 /* power state controls amps */
899 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 900 {}
d0513fc6
MR		 901};
902
5556e147
VK		 903static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
904 { 0x22, 0x785, 0x43 },
905 { 0x22, 0x782, 0xe0 },
906 { 0x22, 0x795, 0x00 },
907 {}
908};
909
2b63536f 910static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 911 /* set master volume and direct control */
912 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 913 {}
541eee87
MR		 914};
915
2b63536f 916static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR		 917 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
918 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 919 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
920 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 921 {}
922};
923
2b63536f 924static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD		 925 /* set dac0mux for dac converter */
926 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 927 /* mute the master volume */
928 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 929 {}
930};
931
2b63536f 932static const struct hda_verb stac922x_core_init[] = {
2f2f4251 933 /* set master volume and direct control */
c7d4b2fa 934 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 935 {}
936};
937
2b63536f 938static const struct hda_verb d965_core_init[] = {
19039bd0 939 /* set master volume and direct control */
93ed1503 940 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 941 /* unmute node 0x1b */
942 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
943 /* select node 0x03 as DAC */
944 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
945 {}
946};
947
2b63536f 948static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI		 949 /* don't set delta bit */
950 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
951 /* unmute node 0x1b */
952 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
953 /* select node 0x03 as DAC */
954 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
955 {}
956};
957
2b63536f 958static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP		 959 /* set master volume and direct control */
960 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 961 /* enable analog pc beep path */
962 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 963 {}
964};
965
2b63536f 966static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI		 967 /* don't set delta bit */
968 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
969 /* enable analog pc beep path */
970 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
971 {}
972};
973
2b63536f 974static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP		 975 /* set master volume and direct control */
976 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 977 /* enable analog pc beep path */
978 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 979 {}
980};
981
b22b4821
MR		 982#define STAC_MONO_MUX \
983 { \
984 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
985 .name = "Mono Mux", \
986 .count = 1, \
987 .info = stac92xx_mono_mux_enum_info, \
988 .get = stac92xx_mono_mux_enum_get, \
989 .put = stac92xx_mono_mux_enum_put, \
990 }
991
e1f0d669 992#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 993 { \
994 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
995 .name = "Analog Loopback", \
e1f0d669 996 .count = cnt, \
5f10c4a9
ML		 997 .info = stac92xx_aloopback_info, \
998 .get = stac92xx_aloopback_get, \
999 .put = stac92xx_aloopback_put, \
1000 .private_value = verb_read | (verb_write << 16), \
1001 }
1002
2fc99890
NL		 1003#define DC_BIAS(xname, idx, nid) \
1004 { \
1005 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1006 .name = xname, \
1007 .index = idx, \
1008 .info = stac92xx_dc_bias_info, \
1009 .get = stac92xx_dc_bias_get, \
1010 .put = stac92xx_dc_bias_put, \
1011 .private_value = nid, \
1012 }
1013
2b63536f 1014static const struct snd_kcontrol_new stac9200_mixer[] = {
2faa3bf1
TI		 1015 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xb, 0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE("PCM Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1017 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1018 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1019 { } /* end */
1020};
1021
2b63536f 1022static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI		 1023 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1024 {}
1025};
1026
2b63536f 1027static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1028 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1029 {}
1030};
e1f0d669 1031
2b63536f 1032static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI		 1033 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1034 {}
1035};
1036
d0513fc6 1037
2b63536f 1038static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI		 1039 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1040};
541eee87 1041
2b63536f 1042static const struct snd_kcontrol_new stac925x_mixer[] = {
2faa3bf1
TI		 1043 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xe, 0, HDA_OUTPUT),
1044 HDA_CODEC_MUTE("PCM Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1045 { } /* end */
1046};
1047
2b63536f 1048static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI		 1049 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1050 {}
1051};
1052
2b63536f 1053static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI		 1054 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1055 {}
1056};
1057
1697055e
TI		 1058static struct snd_kcontrol_new stac_dmux_mixer = {
1059 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1060 .name = "Digital Input Source",
1061 /* count set later */
1062 .info = stac92xx_dmux_enum_info,
1063 .get = stac92xx_dmux_enum_get,
1064 .put = stac92xx_dmux_enum_put,
1065};
1066
d9737751
MR		 1067static struct snd_kcontrol_new stac_smux_mixer = {
1068 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1069 .name = "IEC958 Playback Source",
d9737751
MR		 1070 /* count set later */
1071 .info = stac92xx_smux_enum_info,
1072 .get = stac92xx_smux_enum_get,
1073 .put = stac92xx_smux_enum_put,
1074};
1075
9322ca54
TI		 1076static const char * const slave_pfxs[] = {
1077 "Front", "Surround", "Center", "LFE", "Side",
1078 "Headphone", "Speaker", "IEC958",
2134ea4f
TI		 1079 NULL
1080};
1081
2faa3bf1
TI		 1082static void stac92xx_update_led_status(struct hda_codec *codec, int enabled);
1083
1084static void stac92xx_vmaster_hook(void *private_data, int val)
1085{
1086 stac92xx_update_led_status(private_data, val);
1087}
1088
603c4019
TI		 1089static void stac92xx_free_kctls(struct hda_codec *codec);
1090
2f2f4251
M		 1091static int stac92xx_build_controls(struct hda_codec *codec)
1092{
1093 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 1094 unsigned int vmaster_tlv[4];
2f2f4251 1095 int err;
c7d4b2fa 1096 int i;
2f2f4251 1097
6479c631
TI		 1098 if (spec->mixer) {
1099 err = snd_hda_add_new_ctls(codec, spec->mixer);
1100 if (err < 0)
1101 return err;
1102 }
c7d4b2fa
M		 1103
1104 for (i = 0; i < spec->num_mixers; i++) {
1105 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1106 if (err < 0)
1107 return err;
1108 }
5207e10e
TI		 1109 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1110 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1111 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1112 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1113 snd_ctl_new1(&stac_dmux_mixer, codec));
1114 if (err < 0)
1115 return err;
1116 }
d9737751 1117 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1118 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1119 struct hda_input_mux *smux = &spec->private_smux;
1120 /* check for mute support on SPDIF out */
1121 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1122 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1123 spec->spdif_mute = 1;
1124 }
d9737751 1125 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1126 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1127 snd_ctl_new1(&stac_smux_mixer, codec));
1128 if (err < 0)
1129 return err;
1130 }
c7d4b2fa 1131
dabbed6f 1132 if (spec->multiout.dig_out_nid) {
74b654c9
SW		 1133 err = snd_hda_create_spdif_out_ctls(codec,
1134 spec->multiout.dig_out_nid,
1135 spec->multiout.dig_out_nid);
dabbed6f
M		 1136 if (err < 0)
1137 return err;
9a08160b
TI		 1138 err = snd_hda_create_spdif_share_sw(codec,
1139 &spec->multiout);
1140 if (err < 0)
1141 return err;
1142 spec->multiout.share_spdif = 1;
dabbed6f 1143 }
da74ae3e 1144 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1145 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1146 if (err < 0)
1147 return err;
1148 }
2134ea4f
TI		 1149
1150 /* if we have no master control, let's create it */
2faa3bf1
TI		 1151 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1152 HDA_OUTPUT, vmaster_tlv);
1153 /* correct volume offset */
1154 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
1155 /* minimum value is actually mute */
1156 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
1157 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1158 vmaster_tlv, slave_pfxs,
1159 "Playback Volume");
1160 if (err < 0)
1161 return err;
1162
1163 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
1164 NULL, slave_pfxs,
1165 "Playback Switch", true,
d2f344b5 1166 &spec->vmaster_mute.sw_kctl);
2faa3bf1
TI		 1167 if (err < 0)
1168 return err;
1169
1170 if (spec->gpio_led) {
d2f344b5 1171 spec->vmaster_mute.hook = stac92xx_vmaster_hook;
f29735cb 1172 err = snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute, true);
d2f344b5
TI		 1173 if (err < 0)
1174 return err;
2134ea4f
TI		 1175 }
1176
d78d7a90
TI		 1177 if (spec->aloopback_ctl &&
1178 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1179 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1180 if (err < 0)
1181 return err;
1182 }
1183
603c4019 1184 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e 1185
01a61e12
TI		 1186 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
1187 if (err < 0)
1188 return err;
e4973e1e 1189
dabbed6f 1190 return 0;
2f2f4251
M		 1191}
1192
2b63536f 1193static const unsigned int ref9200_pin_configs[8] = {
dabbed6f 1194 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1195 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1196};
1197
2b63536f 1198static const unsigned int gateway9200_m4_pin_configs[8] = {
58eec423
MCC		 1199 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1200 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1201};
2b63536f 1202static const unsigned int gateway9200_m4_2_pin_configs[8] = {
58eec423
MCC		 1203 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1204 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1205};
1206
1207/*
dfe495d0
TI		 1208 STAC 9200 pin configs for
1209 102801A8
1210 102801DE
1211 102801E8
1212*/
2b63536f 1213static const unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1214 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1215 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1216};
1217
1218/*
1219 STAC 9200 pin configs for
1220 102801C0
1221 102801C1
1222*/
2b63536f 1223static const unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1224 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1225 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1226};
1227
1228/*
1229 STAC 9200 pin configs for
1230 102801C4 (Dell Dimension E310)
1231 102801C5
1232 102801C7
1233 102801D9
1234 102801DA
1235 102801E3
1236*/
2b63536f 1237static const unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1238 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1239 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1240};
1241
1242
1243/*
1244 STAC 9200-32 pin configs for
1245 102801B5 (Dell Inspiron 630m)
1246 102801D8 (Dell Inspiron 640m)
1247*/
2b63536f 1248static const unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1249 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1250 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1251};
1252
1253/*
1254 STAC 9200-32 pin configs for
1255 102801C2 (Dell Latitude D620)
1256 102801C8
1257 102801CC (Dell Latitude D820)
1258 102801D4
1259 102801D6
1260*/
2b63536f 1261static const unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1262 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1263 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1264};
1265
1266/*
1267 STAC 9200-32 pin configs for
1268 102801CE (Dell XPS M1710)
1269 102801CF (Dell Precision M90)
1270*/
2b63536f 1271static const unsigned int dell9200_m23_pin_configs[8] = {
dfe495d0
TI		 1272 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1273 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1274};
1275
1276/*
1277 STAC 9200-32 pin configs for
1278 102801C9
1279 102801CA
1280 102801CB (Dell Latitude 120L)
1281 102801D3
1282*/
2b63536f 1283static const unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1284 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1285 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1286};
1287
1288/*
1289 STAC 9200-32 pin configs for
1290 102801BD (Dell Inspiron E1505n)
1291 102801EE
1292 102801EF
1293*/
2b63536f 1294static const unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1295 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1296 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1297};
1298
1299/*
1300 STAC 9200-32 pin configs for
1301 102801F5 (Dell Inspiron 1501)
1302 102801F6
1303*/
2b63536f 1304static const unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1305 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1306 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1307};
1308
1309/*
1310 STAC 9200-32
1311 102801CD (Dell Inspiron E1705/9400)
1312*/
2b63536f 1313static const unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1314 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1315 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1316};
1317
2b63536f 1318static const unsigned int oqo9200_pin_configs[8] = {
bf277785
TD		 1319 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1320 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1321};
1322
dfe495d0 1323
2b63536f 1324static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
f5fcc13c 1325 [STAC_REF] = ref9200_pin_configs,
bf277785 1326 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1327 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1328 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1329 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1330 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1331 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1332 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1333 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1334 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1335 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1336 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1337 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1338 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1339 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1340};
1341
ea734963 1342static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1343 [STAC_AUTO] = "auto",
f5fcc13c 1344 [STAC_REF] = "ref",
bf277785 1345 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1346 [STAC_9200_DELL_D21] = "dell-d21",
1347 [STAC_9200_DELL_D22] = "dell-d22",
1348 [STAC_9200_DELL_D23] = "dell-d23",
1349 [STAC_9200_DELL_M21] = "dell-m21",
1350 [STAC_9200_DELL_M22] = "dell-m22",
1351 [STAC_9200_DELL_M23] = "dell-m23",
1352 [STAC_9200_DELL_M24] = "dell-m24",
1353 [STAC_9200_DELL_M25] = "dell-m25",
1354 [STAC_9200_DELL_M26] = "dell-m26",
1355 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1356 [STAC_9200_M4] = "gateway-m4",
1357 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1358 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1359};
1360
2b63536f 1361static const struct snd_pci_quirk stac9200_cfg_tbl[] = {
f5fcc13c
TI		 1362 /* SigmaTel reference board */
1363 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1364 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1366 "DFI LanParty", STAC_REF),
e7377071 1367 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1369 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1370 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1371 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1373 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1375 "unknown Dell", STAC_9200_DELL_D22),
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1377 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1379 "Dell Latitude D620", STAC_9200_DELL_M22),
1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1381 "unknown Dell", STAC_9200_DELL_D23),
1382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1383 "unknown Dell", STAC_9200_DELL_D23),
1384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1385 "unknown Dell", STAC_9200_DELL_M22),
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1387 "unknown Dell", STAC_9200_DELL_M24),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1389 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1391 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1393 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1395 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1397 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1399 "Dell Precision M90", STAC_9200_DELL_M23),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1401 "unknown Dell", STAC_9200_DELL_M22),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1403 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1405 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1406 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1407 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1409 "unknown Dell", STAC_9200_DELL_D23),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1411 "unknown Dell", STAC_9200_DELL_D23),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1413 "unknown Dell", STAC_9200_DELL_D21),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1415 "unknown Dell", STAC_9200_DELL_D23),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1417 "unknown Dell", STAC_9200_DELL_D21),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1419 "unknown Dell", STAC_9200_DELL_M25),
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1421 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1422 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1423 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1425 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1426 /* Panasonic */
117f257d 1427 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1428 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1429 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1430 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1431 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1432 /* OQO Mobile */
1433 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1434 {} /* terminator */
1435};
1436
2b63536f 1437static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1438 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1439 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1440};
1441
2b63536f 1442static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC		 1443 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1444 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1445};
1446
2b63536f 1447static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC		 1448 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1449 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1450};
58eec423 1451
2b63536f 1452static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC		 1453 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1454 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1455};
1456
2b63536f 1457static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1458 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1459 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1460};
1461
2b63536f 1462static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC		 1463 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1464 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1465};
58eec423 1466
2b63536f 1467static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC		 1468 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1469 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1470};
1471
2b63536f 1472static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC		 1473 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1474 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1475};
1476
2b63536f 1477static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1478 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1479 [STAC_M1] = stac925xM1_pin_configs,
1480 [STAC_M1_2] = stac925xM1_2_pin_configs,
1481 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1482 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1483 [STAC_M3] = stac925xM3_pin_configs,
1484 [STAC_M5] = stac925xM5_pin_configs,
1485 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1486};
1487
ea734963 1488static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1489 [STAC_925x_AUTO] = "auto",
8e21c34c 1490 [STAC_REF] = "ref",
9cb36c2a
MCC		 1491 [STAC_M1] = "m1",
1492 [STAC_M1_2] = "m1-2",
1493 [STAC_M2] = "m2",
8e21c34c 1494 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1495 [STAC_M3] = "m3",
1496 [STAC_M5] = "m5",
1497 [STAC_M6] = "m6",
8e21c34c
TD		 1498};
1499
2b63536f 1500static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1501 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1502 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1503 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1504 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1505 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1506 /* Not sure about the brand name for those */
1507 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1508 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1509 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1510 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1511 {} /* terminator */
8e21c34c
TD		 1512};
1513
2b63536f 1514static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD		 1515 /* SigmaTel reference board */
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1518 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1519
1520 /* Default table for unknown ID */
1521 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1522
8e21c34c
TD		 1523 {} /* terminator */
1524};
1525
2b63536f 1526static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1527 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1528 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1529 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1530 0x01452050,
1531};
1532
2b63536f 1533static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1534 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1535 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1536 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1537 0x4f0000f0,
e1f0d669
MR		 1538};
1539
2b63536f 1540static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI		 1541 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1542 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1543 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1544 0x904601b0,
1545};
1546
2b63536f 1547static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1548 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1549 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1550};
1551
2b63536f 1552static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1553 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1554 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1555 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1556 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1557 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1558 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1559 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1560};
1561
ea734963 1562static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1563 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1564 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1565 [STAC_92HD73XX_REF] = "ref",
ae709440 1566 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1567 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1568 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1569 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1570 [STAC_DELL_EQ] = "dell-eq",
842ae638 1571 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1572};
1573
2b63536f 1574static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR		 1575 /* SigmaTel reference board */
1576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1577 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1579 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1581 "Intel DG45ID", STAC_92HD73XX_INTEL),
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1583 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1585 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1586 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1587 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1588 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1589 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1591 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1593 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1595 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1597 "unknown Dell", STAC_DELL_M6_DMIC),
1598 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1599 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1601 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1602 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1603 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1605 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1607 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1608 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1609 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1610 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1611 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1612 {} /* terminator */
1613};
1614
2b63536f 1615static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI		 1616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1617 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1619 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1621 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI		 1622 {} /* terminator */
1623};
1624
2b63536f 1625static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1626 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1627 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1628 0x01451160, 0x98560170,
1629};
1630
2b63536f 1631static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1632 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1633 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1634 0x40f000f0, 0x40f000f0,
1635};
1636
f7f9bdfa
JW		 1637static const unsigned int dell_vostro_3500_pin_configs[10] = {
1638 0x02a11020, 0x0221101f, 0x400000f0, 0x90170110,
1639 0x400000f1, 0x400000f2, 0x400000f3, 0x90a60160,
1640 0x400000f4, 0x400000f5,
1641};
1642
2b63536f 1643static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE		 1644 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1645 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1646 0x40f000f0, 0x40f000f0,
1647};
1648
5556e147
VK		 1649static const unsigned int hp_zephyr_pin_configs[10] = {
1650 0x01813050, 0x0421201f, 0x04a1205e, 0x96130310,
1651 0x96130310, 0x0101401f, 0x1111611f, 0xd5a30130,
1652 0, 0,
1653};
1654
0c27c180
VK		 1655static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1656 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1657 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1658 0x40f000f0, 0x40f000f0,
1659};
1660
2b63536f 1661static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1662 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1663 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1664 [STAC_DELL_S14] = dell_s14_pin_configs,
f7f9bdfa 1665 [STAC_DELL_VOSTRO_3500] = dell_vostro_3500_pin_configs,
0c27c180 1666 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1667 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
5556e147 1668 [STAC_HP_ZEPHYR] = hp_zephyr_pin_configs,
d0513fc6
MR		 1669};
1670
ea734963 1671static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1672 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1673 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1674 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1675 [STAC_DELL_S14] = "dell-s14",
f7f9bdfa 1676 [STAC_DELL_VOSTRO_3500] = "dell-vostro-3500",
0c27c180 1677 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1678 [STAC_HP_DV7_4000] = "hp-dv7-4000",
5556e147 1679 [STAC_HP_ZEPHYR] = "hp-zephyr",
a3e19973 1680 [STAC_92HD83XXX_HP_LED] = "hp-led",
ff8a1e27 1681 [STAC_92HD83XXX_HP_INV_LED] = "hp-inv-led",
d0513fc6
MR		 1682};
1683
2b63536f 1684static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR		 1685 /* SigmaTel reference board */
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1687 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1688 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1689 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1691 "unknown Dell", STAC_DELL_S14),
f7f9bdfa
JW		 1692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
1693 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 1694 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1695 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1697 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1699 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
1701 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1703 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1705 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1707 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1709 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1710 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1711 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1712 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1713 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1715 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1716 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1717 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1719 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1721 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1722 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1723 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1725 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1727 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1729 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1731 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1733 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 1734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1735 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 1736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
1737 "HP Mini", STAC_92HD83XXX_HP_LED),
5556e147
VK		 1738 {} /* terminator */
1739};
1740
1741static const struct snd_pci_quirk stac92hd83xxx_codec_id_cfg_tbl[] = {
1742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1743 "HP", STAC_HP_ZEPHYR),
574f3c4f 1744 {} /* terminator */
d0513fc6
MR		 1745};
1746
2b63536f 1747static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1748 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1749 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1750 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1751 0x00000000
e035b841
MR		 1752};
1753
2b63536f 1754static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1755 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1756 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1757 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1758 0x00000000
a7662640
MR		 1759};
1760
2b63536f 1761static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1762 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1763 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1764 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1765 0x00000000
a7662640
MR		 1766};
1767
2b63536f 1768static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1769 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1770 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1771 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1772 0x00000000
3a7abfd2
MR		 1773};
1774
2b63536f 1775static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1776 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1777 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1778 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1779 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1780 [STAC_HP_M4] = NULL,
2a6ce6e5 1781 [STAC_HP_DV4] = NULL,
1b0652eb 1782 [STAC_HP_DV5] = NULL,
ae6241fb 1783 [STAC_HP_HDX] = NULL,
514bf54c 1784 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1785};
1786
ea734963 1787static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1788 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1789 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1790 [STAC_DELL_M4_1] = "dell-m4-1",
1791 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1792 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1793 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1794 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1795 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1796 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1797 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1798};
1799
2b63536f 1800static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR		 1801 /* SigmaTel reference board */
1802 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1803 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1804 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1805 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1807 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1808 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1809 "HP", STAC_HP_DV5),
58d8395b
TI		 1810 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1811 "HP", STAC_HP_DV5),
2ae466f8 1812 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1813 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1814 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1815 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1817 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1819 "HP mini 1000", STAC_HP_M4),
ae6241fb 1820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1821 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1822 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1823 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1825 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1827 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1828 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1829 "HP", STAC_HP_DV5),
a7662640
MR		 1830 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1831 "unknown Dell", STAC_DELL_M4_1),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1833 "unknown Dell", STAC_DELL_M4_1),
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1835 "unknown Dell", STAC_DELL_M4_1),
1836 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1837 "unknown Dell", STAC_DELL_M4_1),
1838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1839 "unknown Dell", STAC_DELL_M4_1),
1840 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1841 "unknown Dell", STAC_DELL_M4_1),
1842 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1843 "unknown Dell", STAC_DELL_M4_1),
1844 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1845 "unknown Dell", STAC_DELL_M4_2),
1846 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1847 "unknown Dell", STAC_DELL_M4_2),
1848 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1849 "unknown Dell", STAC_DELL_M4_2),
1850 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1851 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1852 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1853 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1854 {} /* terminator */
1855};
1856
2b63536f 1857static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP		 1858 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1859 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1860 0x40000100, 0x40000100,
1861};
1862
dfe495d0
TI		 1863/*
1864 STAC 922X pin configs for
1865 102801A7
1866 102801AB
1867 102801A9
1868 102801D1
1869 102801D2
1870*/
2b63536f 1871static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI		 1872 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1873 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1874 0x01813122, 0x400001f2,
1875};
1876
1877/*
1878 STAC 922X pin configs for
1879 102801AC
1880 102801D0
1881*/
2b63536f 1882static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI		 1883 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1884 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1885 0x01813122, 0x400001f1,
1886};
1887
1888/*
1889 STAC 922X pin configs for
1890 102801BF
1891*/
2b63536f 1892static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI		 1893 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1894 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1895 0x40C003f1, 0x405003f0,
1896};
1897
1898/*
1899 STAC 9221 A1 pin configs for
1900 102801D7 (Dell XPS M1210)
1901*/
2b63536f 1902static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1903 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1904 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1905 0x508003f3, 0x405003f4,
1906};
1907
2b63536f 1908static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 1909 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1910 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1911 0x02a19120, 0x40000100,
1912};
1913
2b63536f 1914static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1915 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1916 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1917 0x02a19320, 0x40000100,
1918};
1919
2b63536f 1920static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ		 1921 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1922 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1923 0x400000fc, 0x400000fb,
1924};
1925
2b63536f 1926static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ		 1927 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1928 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1929 0x400000fc, 0x400000fb,
6f0778d8
NB		 1930};
1931
2b63536f 1932static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ		 1933 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1934 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1935 0x400000fc, 0x400000fb,
1936};
1937
2b63536f 1938static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ		 1939 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1940 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1941 0x400000fc, 0x400000fb,
1942};
1943
2b63536f 1944static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ		 1945 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1946 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1947 0x400000fc, 0x400000fb,
0dae0f83
TI		 1948};
1949
2b63536f 1950static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC		 1951 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1952 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1953 0x9037012e, 0x40e000f2,
1954};
76c08828 1955
2b63536f 1956static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1957 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1958 [STAC_D945GTP3] = d945gtp3_pin_configs,
1959 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1960 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1961 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1962 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1963 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1964 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1965 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1966 /* for backward compatibility */
5d5d3bc3
IZ		 1967 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1968 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1969 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1970 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1971 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1972 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1973 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1974 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1975 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1976 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1977 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1978};
1979
ea734963 1980static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1981 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1982 [STAC_D945_REF] = "ref",
1983 [STAC_D945GTP5] = "5stack",
1984 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1985 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1986 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1987 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1988 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1989 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1990 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1991 /* for backward compatibility */
f5fcc13c 1992 [STAC_MACMINI] = "macmini",
3fc24d85 1993 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1994 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1995 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1996 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1997 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1998 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1999 [STAC_922X_DELL_D81] = "dell-d81",
2000 [STAC_922X_DELL_D82] = "dell-d82",
2001 [STAC_922X_DELL_M81] = "dell-m81",
2002 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 2003};
2004
2b63536f 2005static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI		 2006 /* SigmaTel reference board */
2007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2008 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2009 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2010 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2011 /* Intel 945G based systems */
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2021 "Intel D945G", STAC_D945GTP3),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2023 "Intel D945G", STAC_D945GTP3),
2024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2025 "Intel D945G", STAC_D945GTP3),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2027 "Intel D945G", STAC_D945GTP3),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2029 "Intel D945G", STAC_D945GTP3),
2030 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2031 "Intel D945G", STAC_D945GTP3),
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2033 "Intel D945G", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2035 "Intel D945G", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2037 "Intel D945G", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2039 "Intel D945G", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2041 "Intel D945G", STAC_D945GTP3),
2042 /* Intel D945G 5-stack systems */
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2044 "Intel D945G", STAC_D945GTP5),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2046 "Intel D945G", STAC_D945GTP5),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2048 "Intel D945G", STAC_D945GTP5),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2050 "Intel D945G", STAC_D945GTP5),
2051 /* Intel 945P based systems */
2052 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2053 "Intel D945P", STAC_D945GTP3),
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2055 "Intel D945P", STAC_D945GTP3),
2056 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2057 "Intel D945P", STAC_D945GTP3),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2059 "Intel D945P", STAC_D945GTP3),
2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2061 "Intel D945P", STAC_D945GTP3),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2063 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2064 /* other intel */
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2066 "Intel D945", STAC_D945_REF),
f5fcc13c 2067 /* other systems */
536319af 2068 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2069 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2070 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2071 /* Dell systems */
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2073 "unknown Dell", STAC_922X_DELL_D81),
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2075 "unknown Dell", STAC_922X_DELL_D81),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2077 "unknown Dell", STAC_922X_DELL_D81),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2079 "unknown Dell", STAC_922X_DELL_D82),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2081 "unknown Dell", STAC_922X_DELL_M81),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2083 "unknown Dell", STAC_922X_DELL_D82),
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2085 "unknown Dell", STAC_922X_DELL_D81),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2087 "unknown Dell", STAC_922X_DELL_D81),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2089 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2090 /* ECS/PC Chips boards */
dea0a509 2091 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2092 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2093 {} /* terminator */
2094};
2095
2b63536f 2096static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2097 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2098 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2099 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2100 0x01c42190, 0x40000100,
3cc08dc6
MP		 2101};
2102
2b63536f 2103static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2104 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2105 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2106 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2107 0x40000100, 0x40000100
2108};
2109
2b63536f 2110static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD		 2111 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2112 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2113 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2114 0x40000100, 0x40000100
2115};
2116
2b63536f 2117static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI		 2118 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2119 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2120 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2121 0x40000100, 0x40000100
2122};
2123
2b63536f 2124static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD		 2125 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2126 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2127 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2128 0x40c003fc, 0x40000100
2129};
2130
2b63536f 2131static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2132 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2133 [STAC_D965_REF] = ref927x_pin_configs,
2134 [STAC_D965_3ST] = d965_3st_pin_configs,
2135 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2136 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2137 [STAC_DELL_3ST] = dell_3st_pin_configs,
2138 [STAC_DELL_BIOS] = NULL,
54930531 2139 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2140};
2141
ea734963 2142static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2143 [STAC_927X_AUTO] = "auto",
e28d8322 2144 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2145 [STAC_D965_REF] = "ref",
2146 [STAC_D965_3ST] = "3stack",
2147 [STAC_D965_5ST] = "5stack",
679d92ed 2148 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2149 [STAC_DELL_3ST] = "dell-3stack",
2150 [STAC_DELL_BIOS] = "dell-bios",
54930531 2151 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2152};
2153
2b63536f 2154static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI		 2155 /* SigmaTel reference board */
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2157 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2159 "DFI LanParty", STAC_D965_REF),
81d3dbde 2160 /* Intel 946 based systems */
f5fcc13c
TI		 2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2163 /* 965 based 3 stack systems */
dea0a509
TI		 2164 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2165 "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2167 "Intel D965", STAC_D965_3ST),
4ff076e5 2168 /* Dell 3 stack systems */
dfe495d0 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2172 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2182 /* 965 based 5 stack systems */
dea0a509
TI		 2183 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2184 "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2186 "Intel D965", STAC_D965_5ST),
54930531
TI		 2187 /* volume-knob fixes */
2188 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2189 {} /* terminator */
2190};
2191
2b63536f 2192static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2193 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2194 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2195 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2196};
2197
dfe495d0
TI		 2198/*
2199 STAC 9205 pin configs for
2200 102801F1
2201 102801F2
2202 102801FC
2203 102801FD
2204 10280204
2205 1028021F
3fa2ef74 2206 10280228 (Dell Vostro 1500)
95e70e87 2207 10280229 (Dell Vostro 1700)
dfe495d0 2208*/
2b63536f 2209static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI		 2210 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2211 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2212 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2213};
2214
2215/*
2216 STAC 9205 pin configs for
2217 102801F9
2218 102801FA
2219 102801FE
2220 102801FF (Dell Precision M4300)
2221 10280206
2222 10280200
2223 10280201
2224*/
2b63536f 2225static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2226 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2227 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2228 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2229};
2230
2b63536f 2231static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2232 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2233 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2234 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2235};
2236
2b63536f 2237static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2238 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2239 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2240 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2241 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2242 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2243};
2244
ea734963 2245static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2246 [STAC_9205_AUTO] = "auto",
f5fcc13c 2247 [STAC_9205_REF] = "ref",
dfe495d0 2248 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2249 [STAC_9205_DELL_M43] = "dell-m43",
2250 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2251 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2252};
2253
2b63536f 2254static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI		 2255 /* SigmaTel reference board */
2256 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2257 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2258 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2259 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2261 "DFI LanParty", STAC_9205_REF),
d9a4268e 2262 /* Dell */
dfe495d0
TI		 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2264 "unknown Dell", STAC_9205_DELL_M42),
2265 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2266 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2268 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2269 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2270 "Dell Precision", STAC_9205_DELL_M43),
2271 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2272 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2273 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2274 "unknown Dell", STAC_9205_DELL_M42),
2275 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2276 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2278 "Dell Precision", STAC_9205_DELL_M43),
2279 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2280 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2281 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2282 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2283 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2284 "Dell Precision", STAC_9205_DELL_M43),
2285 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2286 "Dell Precision", STAC_9205_DELL_M43),
2287 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2288 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2289 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2290 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2291 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2292 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2294 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2295 /* Gateway */
42b95f0c 2296 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2297 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2298 {} /* terminator */
2299};
2300
330ee995 2301static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2302 const unsigned int *pincfgs)
11b44bbd
RF		 2303{
2304 int i;
2305 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2306
330ee995
TI		 2307 if (!pincfgs)
2308 return;
11b44bbd 2309
87d48363 2310 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2311 if (spec->pin_nids[i] && pincfgs[i])
2312 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2313 pincfgs[i]);
af9f341a
TI		 2314}
2315
dabbed6f 2316/*
c7d4b2fa 2317 * Analog playback callbacks
dabbed6f 2318 */
c7d4b2fa
M		 2319static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2320 struct hda_codec *codec,
c8b6bf9b 2321 struct snd_pcm_substream *substream)
2f2f4251 2322{
dabbed6f 2323 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2324 if (spec->stream_delay)
2325 msleep(spec->stream_delay);
9a08160b
TI		 2326 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2327 hinfo);
2f2f4251
M		 2328}
2329
2f2f4251
M		 2330static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2331 struct hda_codec *codec,
2332 unsigned int stream_tag,
2333 unsigned int format,
c8b6bf9b 2334 struct snd_pcm_substream *substream)
2f2f4251
M		 2335{
2336 struct sigmatel_spec *spec = codec->spec;
403d1944 2337 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2338}
2339
2340static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2341 struct hda_codec *codec,
c8b6bf9b 2342 struct snd_pcm_substream *substream)
2f2f4251
M		 2343{
2344 struct sigmatel_spec *spec = codec->spec;
2345 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2346}
2347
dabbed6f
M		 2348/*
2349 * Digital playback callbacks
2350 */
2351static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2352 struct hda_codec *codec,
c8b6bf9b 2353 struct snd_pcm_substream *substream)
dabbed6f
M		 2354{
2355 struct sigmatel_spec *spec = codec->spec;
2356 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2357}
2358
2359static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2360 struct hda_codec *codec,
c8b6bf9b 2361 struct snd_pcm_substream *substream)
dabbed6f
M		 2362{
2363 struct sigmatel_spec *spec = codec->spec;
2364 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2365}
2366
6b97eb45
TI		 2367static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2368 struct hda_codec *codec,
2369 unsigned int stream_tag,
2370 unsigned int format,
2371 struct snd_pcm_substream *substream)
2372{
2373 struct sigmatel_spec *spec = codec->spec;
2374 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2375 stream_tag, format, substream);
2376}
2377
9411e21c
TI		 2378static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2379 struct hda_codec *codec,
2380 struct snd_pcm_substream *substream)
2381{
2382 struct sigmatel_spec *spec = codec->spec;
2383 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2384}
2385
dabbed6f 2386
2f2f4251
M		 2387/*
2388 * Analog capture callbacks
2389 */
2390static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2391 struct hda_codec *codec,
2392 unsigned int stream_tag,
2393 unsigned int format,
c8b6bf9b 2394 struct snd_pcm_substream *substream)
2f2f4251
M		 2395{
2396 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2397 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2398
8daaaa97
MR		 2399 if (spec->powerdown_adcs) {
2400 msleep(40);
8c2f767b 2401 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2402 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2403 }
2404 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2405 return 0;
2406}
2407
2408static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2409 struct hda_codec *codec,
c8b6bf9b 2410 struct snd_pcm_substream *substream)
2f2f4251
M		 2411{
2412 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2413 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2414
8daaaa97
MR		 2415 snd_hda_codec_cleanup_stream(codec, nid);
2416 if (spec->powerdown_adcs)
8c2f767b 2417 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2418 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2419 return 0;
2420}
2421
2b63536f 2422static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M		 2423 .substreams = 1,
2424 .channels_min = 2,
2425 .channels_max = 2,
2426 /* NID is set in stac92xx_build_pcms */
2427 .ops = {
2428 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2429 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2430 .prepare = stac92xx_dig_playback_pcm_prepare,
2431 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2432 },
2433};
2434
2b63536f 2435static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M		 2436 .substreams = 1,
2437 .channels_min = 2,
2438 .channels_max = 2,
2439 /* NID is set in stac92xx_build_pcms */
2440};
2441
2b63536f 2442static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M		 2443 .substreams = 1,
2444 .channels_min = 2,
c7d4b2fa 2445 .channels_max = 8,
2f2f4251
M		 2446 .nid = 0x02, /* NID to query formats and rates */
2447 .ops = {
2448 .open = stac92xx_playback_pcm_open,
2449 .prepare = stac92xx_playback_pcm_prepare,
2450 .cleanup = stac92xx_playback_pcm_cleanup
2451 },
2452};
2453
2b63536f 2454static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP		 2455 .substreams = 1,
2456 .channels_min = 2,
2457 .channels_max = 2,
2458 .nid = 0x06, /* NID to query formats and rates */
2459 .ops = {
2460 .open = stac92xx_playback_pcm_open,
2461 .prepare = stac92xx_playback_pcm_prepare,
2462 .cleanup = stac92xx_playback_pcm_cleanup
2463 },
2464};
2465
2b63536f 2466static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2467 .channels_min = 2,
2468 .channels_max = 2,
9e05b7a3 2469 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2470 .ops = {
2471 .prepare = stac92xx_capture_pcm_prepare,
2472 .cleanup = stac92xx_capture_pcm_cleanup
2473 },
2474};
2475
2476static int stac92xx_build_pcms(struct hda_codec *codec)
2477{
2478 struct sigmatel_spec *spec = codec->spec;
2479 struct hda_pcm *info = spec->pcm_rec;
2480
2481 codec->num_pcms = 1;
2482 codec->pcm_info = info;
2483
c7d4b2fa 2484 info->name = "STAC92xx Analog";
2f2f4251 2485 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2486 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2487 spec->multiout.dac_nids[0];
2f2f4251 2488 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2489 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2490 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2491
2492 if (spec->alt_switch) {
2493 codec->num_pcms++;
2494 info++;
2495 info->name = "STAC92xx Analog Alt";
2496 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2497 }
2f2f4251 2498
dabbed6f
M		 2499 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2500 codec->num_pcms++;
2501 info++;
2502 info->name = "STAC92xx Digital";
0852d7a6 2503 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2504 if (spec->multiout.dig_out_nid) {
2505 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2506 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2507 }
2508 if (spec->dig_in_nid) {
2509 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2510 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2511 }
2512 }
2513
2f2f4251
M		 2514 return 0;
2515}
2516
403d1944
MP		 2517static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2518
2519{
cdd03ced 2520 snd_hda_set_pin_ctl_cache(codec, nid, pin_type);
403d1944
MP		 2521}
2522
7c2ba97b
MR		 2523#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2524
2525static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2526 struct snd_ctl_elem_value *ucontrol)
2527{
2528 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2529 struct sigmatel_spec *spec = codec->spec;
2530
d7a89436 2531 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2532 return 0;
2533}
2534
62558ce1 2535static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2536
7c2ba97b
MR		 2537static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2541 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2542 int nid = kcontrol->private_value;
2543
2544 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2545
25985edc 2546 /* check to be sure that the ports are up to date with
7c2ba97b
MR		 2547 * switch changes
2548 */
62558ce1 2549 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2550
2551 return 1;
2552}
2553
7c922de7
NL		 2554static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_info *uinfo)
2556{
2557 int i;
2b63536f 2558 static const char * const texts[] = {
7c922de7
NL		 2559 "Mic In", "Line In", "Line Out"
2560 };
2561
2562 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2563 struct sigmatel_spec *spec = codec->spec;
2564 hda_nid_t nid = kcontrol->private_value;
2565
2566 if (nid == spec->mic_switch || nid == spec->line_switch)
2567 i = 3;
2568 else
2569 i = 2;
2570
2571 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2572 uinfo->value.enumerated.items = i;
2573 uinfo->count = 1;
2574 if (uinfo->value.enumerated.item >= i)
2575 uinfo->value.enumerated.item = i-1;
2576 strcpy(uinfo->value.enumerated.name,
2577 texts[uinfo->value.enumerated.item]);
2578
2579 return 0;
2580}
2581
2582static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2583 struct snd_ctl_elem_value *ucontrol)
2584{
2585 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2586 hda_nid_t nid = kcontrol->private_value;
2587 unsigned int vref = stac92xx_vref_get(codec, nid);
2588
4740860b 2589 if (vref == snd_hda_get_default_vref(codec, nid))
7c922de7
NL		 2590 ucontrol->value.enumerated.item[0] = 0;
2591 else if (vref == AC_PINCTL_VREF_GRD)
2592 ucontrol->value.enumerated.item[0] = 1;
2593 else if (vref == AC_PINCTL_VREF_HIZ)
2594 ucontrol->value.enumerated.item[0] = 2;
2595
2596 return 0;
2597}
2598
2599static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2600 struct snd_ctl_elem_value *ucontrol)
2601{
2602 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2603 unsigned int new_vref = 0;
b8621516 2604 int error;
7c922de7
NL		 2605 hda_nid_t nid = kcontrol->private_value;
2606
2607 if (ucontrol->value.enumerated.item[0] == 0)
4740860b 2608 new_vref = snd_hda_get_default_vref(codec, nid);
7c922de7
NL		 2609 else if (ucontrol->value.enumerated.item[0] == 1)
2610 new_vref = AC_PINCTL_VREF_GRD;
2611 else if (ucontrol->value.enumerated.item[0] == 2)
2612 new_vref = AC_PINCTL_VREF_HIZ;
2613 else
2614 return 0;
2615
2616 if (new_vref != stac92xx_vref_get(codec, nid)) {
2617 error = stac92xx_vref_set(codec, nid, new_vref);
2618 return error;
2619 }
2620
2621 return 0;
2622}
2623
2624static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2625 struct snd_ctl_elem_info *uinfo)
2626{
2b63536f 2627 char *texts[2];
7c922de7
NL		 2628 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2629 struct sigmatel_spec *spec = codec->spec;
2630
2631 if (kcontrol->private_value == spec->line_switch)
2632 texts[0] = "Line In";
2633 else
2634 texts[0] = "Mic In";
2635 texts[1] = "Line Out";
2636 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2637 uinfo->value.enumerated.items = 2;
2638 uinfo->count = 1;
2639
2640 if (uinfo->value.enumerated.item >= 2)
2641 uinfo->value.enumerated.item = 1;
2642 strcpy(uinfo->value.enumerated.name,
2643 texts[uinfo->value.enumerated.item]);
2644
2645 return 0;
2646}
403d1944
MP		 2647
2648static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2649{
2650 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2651 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2652 hda_nid_t nid = kcontrol->private_value;
2653 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2654
7c922de7 2655 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2656 return 0;
2657}
2658
2659static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2660{
2661 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2662 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2663 hda_nid_t nid = kcontrol->private_value;
2664 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2665 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2666
2667 spec->io_switch[io_idx] = val;
2668
2669 if (val)
2670 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2671 else {
2672 unsigned int pinctl = AC_PINCTL_IN_EN;
2673 if (io_idx) /* set VREF for mic */
4740860b 2674 pinctl |= snd_hda_get_default_vref(codec, nid);
c960a03b
TI		 2675 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2676 }
40c1d308
JZ		 2677
2678 /* check the auto-mute again: we need to mute/unmute the speaker
2679 * appropriately according to the pin direction
2680 */
2681 if (spec->hp_detect)
62558ce1 2682 stac_issue_unsol_event(codec, nid);
40c1d308 2683
403d1944
MP		 2684 return 1;
2685}
2686
0fb87bb4
ML		 2687#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2688
2689static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2690 struct snd_ctl_elem_value *ucontrol)
2691{
2692 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2693 struct sigmatel_spec *spec = codec->spec;
2694
2695 ucontrol->value.integer.value[0] = spec->clfe_swap;
2696 return 0;
2697}
2698
2699static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2700 struct snd_ctl_elem_value *ucontrol)
2701{
2702 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2703 struct sigmatel_spec *spec = codec->spec;
2704 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2705 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2706
68ea7b2f 2707 if (spec->clfe_swap == val)
0fb87bb4
ML		 2708 return 0;
2709
68ea7b2f 2710 spec->clfe_swap = val;
0fb87bb4
ML		 2711
2712 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2713 spec->clfe_swap ? 0x4 : 0x0);
2714
2715 return 1;
2716}
2717
7c2ba97b
MR		 2718#define STAC_CODEC_HP_SWITCH(xname) \
2719 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2720 .name = xname, \
2721 .index = 0, \
2722 .info = stac92xx_hp_switch_info, \
2723 .get = stac92xx_hp_switch_get, \
2724 .put = stac92xx_hp_switch_put, \
2725 }
2726
403d1944
MP		 2727#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2728 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2729 .name = xname, \
2730 .index = 0, \
2731 .info = stac92xx_io_switch_info, \
2732 .get = stac92xx_io_switch_get, \
2733 .put = stac92xx_io_switch_put, \
2734 .private_value = xpval, \
2735 }
2736
0fb87bb4
ML		 2737#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2738 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2739 .name = xname, \
2740 .index = 0, \
2741 .info = stac92xx_clfe_switch_info, \
2742 .get = stac92xx_clfe_switch_get, \
2743 .put = stac92xx_clfe_switch_put, \
2744 .private_value = xpval, \
2745 }
403d1944 2746
c7d4b2fa
M		 2747enum {
2748 STAC_CTL_WIDGET_VOL,
2749 STAC_CTL_WIDGET_MUTE,
123c07ae 2750 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2751 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2752 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2753 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2754 STAC_CTL_WIDGET_CLFE_SWITCH,
2755 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2756};
2757
2b63536f 2758static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2759 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2760 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2761 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2762 STAC_MONO_MUX,
7c2ba97b 2763 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2764 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2765 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2766 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2767};
2768
2769/* add dynamic controls */
e3c75964
TI		 2770static struct snd_kcontrol_new *
2771stac_control_new(struct sigmatel_spec *spec,
2b63536f 2772 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2773 const char *name,
5e26dfd0 2774 unsigned int subdev)
c7d4b2fa 2775{
c8b6bf9b 2776 struct snd_kcontrol_new *knew;
c7d4b2fa 2777
603c4019
TI		 2778 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2779 knew = snd_array_new(&spec->kctls);
2780 if (!knew)
e3c75964 2781 return NULL;
4d4e9bb3 2782 *knew = *ktemp;
82fe0c58 2783 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2784 if (!knew->name) {
2785 /* roolback */
2786 memset(knew, 0, sizeof(*knew));
2787 spec->kctls.alloced--;
2788 return NULL;
2789 }
5e26dfd0 2790 knew->subdevice = subdev;
e3c75964
TI		 2791 return knew;
2792}
2793
2794static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2b63536f 2795 const struct snd_kcontrol_new *ktemp,
e3c75964
TI		 2796 int idx, const char *name,
2797 unsigned long val)
2798{
4d02d1b6 2799 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2800 HDA_SUBDEV_AMP_FLAG);
e3c75964 2801 if (!knew)
c7d4b2fa 2802 return -ENOMEM;
e3c75964 2803 knew->index = idx;
c7d4b2fa 2804 knew->private_value = val;
c7d4b2fa
M		 2805 return 0;
2806}
2807
4d4e9bb3
TI		 2808static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2809 int type, int idx, const char *name,
2810 unsigned long val)
2811{
2812 return stac92xx_add_control_temp(spec,
2813 &stac92xx_control_templates[type],
2814 idx, name, val);
2815}
2816
4682eee0
MR		 2817
2818/* add dynamic controls */
4d4e9bb3
TI		 2819static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2820 const char *name, unsigned long val)
4682eee0
MR		 2821{
2822 return stac92xx_add_control_idx(spec, type, 0, name, val);
2823}
2824
2b63536f 2825static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI		 2826 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2827 .name = "Input Source",
2828 .info = stac92xx_mux_enum_info,
2829 .get = stac92xx_mux_enum_get,
2830 .put = stac92xx_mux_enum_put,
2831};
2832
7c922de7
NL		 2833static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2834 hda_nid_t nid, int idx)
2835{
2836 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2837 int control = 0;
2838 struct sigmatel_spec *spec = codec->spec;
2839 char name[22];
2840
99ae28be 2841 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
4740860b 2842 if (snd_hda_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
7c922de7
NL		 2843 && nid == spec->line_switch)
2844 control = STAC_CTL_WIDGET_IO_SWITCH;
2845 else if (snd_hda_query_pin_caps(codec, nid)
2846 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2847 control = STAC_CTL_WIDGET_DC_BIAS;
2848 else if (nid == spec->mic_switch)
2849 control = STAC_CTL_WIDGET_IO_SWITCH;
2850 }
2851
2852 if (control) {
201e06ff
TI		 2853 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
2854 name, sizeof(name), NULL);
7c922de7
NL		 2855 return stac92xx_add_control(codec->spec, control,
2856 strcat(name, " Jack Mode"), nid);
2857 }
2858
2859 return 0;
2860}
2861
e3c75964
TI		 2862static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2863{
2864 struct snd_kcontrol_new *knew;
2865 struct hda_input_mux *imux = &spec->private_imux;
2866
3d21d3f7
TI		 2867 if (spec->auto_mic)
2868 return 0; /* no need for input source */
e3c75964
TI		 2869 if (!spec->num_adcs || imux->num_items <= 1)
2870 return 0; /* no need for input source control */
2871 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2872 stac_input_src_temp.name, 0);
e3c75964
TI		 2873 if (!knew)
2874 return -ENOMEM;
2875 knew->count = spec->num_adcs;
2876 return 0;
2877}
2878
c21ca4a8
TI		 2879/* check whether the line-input can be used as line-out */
2880static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2881{
2882 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2883 struct auto_pin_cfg *cfg = &spec->autocfg;
2884 hda_nid_t nid;
2885 unsigned int pincap;
eea7dc93 2886 int i;
8e9068b1 2887
c21ca4a8
TI		 2888 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2889 return 0;
eea7dc93 2890 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2891 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2892 nid = cfg->inputs[i].pin;
2893 pincap = snd_hda_query_pin_caps(codec, nid);
2894 if (pincap & AC_PINCAP_OUT)
2895 return nid;
2896 }
2897 }
c21ca4a8
TI		 2898 return 0;
2899}
403d1944 2900
eea7dc93
TI		 2901static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2902
c21ca4a8 2903/* check whether the mic-input can be used as line-out */
eea7dc93 2904static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2905{
2906 struct sigmatel_spec *spec = codec->spec;
2907 struct auto_pin_cfg *cfg = &spec->autocfg;
2908 unsigned int def_conf, pincap;
86e2959a 2909 int i;
c21ca4a8 2910
eea7dc93 2911 *dac = 0;
c21ca4a8
TI		 2912 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2913 return 0;
eea7dc93
TI		 2914 for (i = 0; i < cfg->num_inputs; i++) {
2915 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2916 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2917 continue;
330ee995 2918 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2919 /* some laptops have an internal analog microphone
2920 * which can't be used as a output */
99ae28be 2921 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2922 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2923 if (pincap & AC_PINCAP_OUT) {
2924 *dac = get_unassigned_dac(codec, nid);
2925 if (*dac)
2926 return nid;
2927 }
403d1944 2928 }
403d1944 2929 }
403d1944
MP		 2930 return 0;
2931}
2932
7b043899
SL		 2933static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2934{
2935 int i;
2936
2937 for (i = 0; i < spec->multiout.num_dacs; i++) {
2938 if (spec->multiout.dac_nids[i] == nid)
2939 return 1;
2940 }
2941
2942 return 0;
2943}
2944
c21ca4a8
TI		 2945static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2946{
2947 int i;
2948 if (is_in_dac_nids(spec, nid))
2949 return 1;
2950 for (i = 0; i < spec->autocfg.hp_outs; i++)
2951 if (spec->hp_dacs[i] == nid)
2952 return 1;
2953 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2954 if (spec->speaker_dacs[i] == nid)
2955 return 1;
2956 return 0;
2957}
2958
2959static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2960{
2961 struct sigmatel_spec *spec = codec->spec;
48718eab 2962 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 2963 int j, conn_len;
48718eab 2964 hda_nid_t conn[HDA_MAX_CONNECTIONS], fallback_dac;
c21ca4a8
TI		 2965 unsigned int wcaps, wtype;
2966
2967 conn_len = snd_hda_get_connections(codec, nid, conn,
2968 HDA_MAX_CONNECTIONS);
36706005
CC		 2969 /* 92HD88: trace back up the link of nids to find the DAC */
2970 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2971 != AC_WID_AUD_OUT)) {
2972 nid = conn[0];
2973 conn_len = snd_hda_get_connections(codec, nid, conn,
2974 HDA_MAX_CONNECTIONS);
2975 }
c21ca4a8 2976 for (j = 0; j < conn_len; j++) {
14bafe32 2977 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2978 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2979 /* we check only analog outputs */
2980 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2981 continue;
2982 /* if this route has a free DAC, assign it */
2983 if (!check_all_dac_nids(spec, conn[j])) {
2984 if (conn_len > 1) {
2985 /* select this DAC in the pin's input mux */
2986 snd_hda_codec_write_cache(codec, nid, 0,
2987 AC_VERB_SET_CONNECT_SEL, j);
2988 }
2989 return conn[j];
2990 }
2991 }
48718eab
DH		 2992
2993 /* if all DACs are already assigned, connect to the primary DAC,
2994 unless we're assigning a secondary headphone */
2995 fallback_dac = spec->multiout.dac_nids[0];
2996 if (spec->multiout.hp_nid) {
2997 for (j = 0; j < cfg->hp_outs; j++)
2998 if (cfg->hp_pins[j] == nid) {
2999 fallback_dac = spec->multiout.hp_nid;
3000 break;
3001 }
3002 }
3003
ee58a7ca
TI		 3004 if (conn_len > 1) {
3005 for (j = 0; j < conn_len; j++) {
48718eab 3006 if (conn[j] == fallback_dac) {
ee58a7ca
TI		 3007 snd_hda_codec_write_cache(codec, nid, 0,
3008 AC_VERB_SET_CONNECT_SEL, j);
3009 break;
3010 }
3011 }
3012 }
c21ca4a8
TI		 3013 return 0;
3014}
3015
3016static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3017static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3018
3cc08dc6 3019/*
7b043899
SL		 3020 * Fill in the dac_nids table from the parsed pin configuration
3021 * This function only works when every pin in line_out_pins[]
3022 * contains atleast one DAC in its connection list. Some 92xx
3023 * codecs are not connected directly to a DAC, such as the 9200
3024 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3025 */
c21ca4a8 3026static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 3027{
3028 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3029 struct auto_pin_cfg *cfg = &spec->autocfg;
3030 int i;
3031 hda_nid_t nid, dac;
7b043899 3032
c7d4b2fa
M		 3033 for (i = 0; i < cfg->line_outs; i++) {
3034 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 3035 dac = get_unassigned_dac(codec, nid);
3036 if (!dac) {
df802952
TI		 3037 if (spec->multiout.num_dacs > 0) {
3038 /* we have already working output pins,
3039 * so let's drop the broken ones again
3040 */
3041 cfg->line_outs = spec->multiout.num_dacs;
3042 break;
3043 }
7b043899
SL		 3044 /* error out, no available DAC found */
3045 snd_printk(KERN_ERR
3046 "%s: No available DAC for pin 0x%x\n",
3047 __func__, nid);
3048 return -ENODEV;
3049 }
c21ca4a8
TI		 3050 add_spec_dacs(spec, dac);
3051 }
7b043899 3052
139e071b
TI		 3053 for (i = 0; i < cfg->hp_outs; i++) {
3054 nid = cfg->hp_pins[i];
3055 dac = get_unassigned_dac(codec, nid);
3056 if (dac) {
3057 if (!spec->multiout.hp_nid)
3058 spec->multiout.hp_nid = dac;
3059 else
3060 add_spec_extra_dacs(spec, dac);
3061 }
3062 spec->hp_dacs[i] = dac;
3063 }
3064
3065 for (i = 0; i < cfg->speaker_outs; i++) {
3066 nid = cfg->speaker_pins[i];
3067 dac = get_unassigned_dac(codec, nid);
3068 if (dac)
3069 add_spec_extra_dacs(spec, dac);
3070 spec->speaker_dacs[i] = dac;
3071 }
3072
c21ca4a8
TI		 3073 /* add line-in as output */
3074 nid = check_line_out_switch(codec);
3075 if (nid) {
3076 dac = get_unassigned_dac(codec, nid);
3077 if (dac) {
3078 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3079 nid, cfg->line_outs);
3080 cfg->line_out_pins[cfg->line_outs] = nid;
3081 cfg->line_outs++;
3082 spec->line_switch = nid;
3083 add_spec_dacs(spec, dac);
3084 }
3085 }
3086 /* add mic as output */
eea7dc93
TI		 3087 nid = check_mic_out_switch(codec, &dac);
3088 if (nid && dac) {
3089 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3090 nid, cfg->line_outs);
3091 cfg->line_out_pins[cfg->line_outs] = nid;
3092 cfg->line_outs++;
3093 spec->mic_switch = nid;
3094 add_spec_dacs(spec, dac);
c21ca4a8 3095 }
c7d4b2fa 3096
c21ca4a8 3097 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3098 spec->multiout.num_dacs,
3099 spec->multiout.dac_nids[0],
3100 spec->multiout.dac_nids[1],
3101 spec->multiout.dac_nids[2],
3102 spec->multiout.dac_nids[3],
3103 spec->multiout.dac_nids[4]);
c21ca4a8 3104
c7d4b2fa
M		 3105 return 0;
3106}
3107
eb06ed8f 3108/* create volume control/switch for the given prefx type */
668b9652
TI		 3109static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3110 int idx, hda_nid_t nid, int chs)
eb06ed8f 3111{
7c7767eb 3112 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3113 char name[32];
3114 int err;
3115
7c7767eb
TI		 3116 if (!spec->check_volume_offset) {
3117 unsigned int caps, step, nums, db_scale;
3118 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3119 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3120 AC_AMPCAP_STEP_SIZE_SHIFT;
3121 step = (step + 1) * 25; /* in .01dB unit */
3122 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3123 AC_AMPCAP_NUM_STEPS_SHIFT;
3124 db_scale = nums * step;
3125 /* if dB scale is over -64dB, and finer enough,
3126 * let's reduce it to half
3127 */
3128 if (db_scale > 6400 && nums >= 0x1f)
3129 spec->volume_offset = nums / 2;
3130 spec->check_volume_offset = 1;
3131 }
3132
eb06ed8f 3133 sprintf(name, "%s Playback Volume", pfx);
668b9652 3134 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3135 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3136 spec->volume_offset));
eb06ed8f
TI		 3137 if (err < 0)
3138 return err;
3139 sprintf(name, "%s Playback Switch", pfx);
668b9652 3140 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3141 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3142 if (err < 0)
3143 return err;
3144 return 0;
3145}
3146
668b9652
TI		 3147#define create_controls(codec, pfx, nid, chs) \
3148 create_controls_idx(codec, pfx, 0, nid, chs)
3149
ae0afd81
MR		 3150static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3151{
c21ca4a8 3152 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3153 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3154 return 1;
3155 } else {
dda14410
TI		 3156 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3157 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR		 3158 spec->multiout.num_dacs++;
3159 }
3160 return 0;
3161}
3162
c21ca4a8 3163static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3164{
c21ca4a8
TI		 3165 int i;
3166 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3167 if (!spec->multiout.extra_out_nid[i]) {
3168 spec->multiout.extra_out_nid[i] = nid;
3169 return 0;
3170 }
3171 }
3172 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3173 return 1;
ae0afd81
MR		 3174}
3175
dc04d1b4
TI		 3176/* Create output controls
3177 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3178 */
3179static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3180 const hda_nid_t *pins,
3181 const hda_nid_t *dac_nids,
3182 int type)
c7d4b2fa 3183{
76624534 3184 struct sigmatel_spec *spec = codec->spec;
ea734963 3185 static const char * const chname[4] = {
19039bd0
TI		 3186 "Front", "Surround", NULL /*CLFE*/, "Side"
3187 };
dc04d1b4 3188 hda_nid_t nid;
91589232
TI		 3189 int i, err;
3190 unsigned int wid_caps;
0fb87bb4 3191
dc04d1b4 3192 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3193 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3194 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI		 3195 spec->hp_detect = 1;
3196 }
dc04d1b4
TI		 3197 nid = dac_nids[i];
3198 if (!nid)
3199 continue;
3200 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3201 /* Center/LFE */
7c7767eb 3202 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3203 if (err < 0)
c7d4b2fa 3204 return err;
7c7767eb 3205 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3206 if (err < 0)
c7d4b2fa 3207 return err;
0fb87bb4
ML		 3208
3209 wid_caps = get_wcaps(codec, nid);
3210
3211 if (wid_caps & AC_WCAP_LR_SWAP) {
3212 err = stac92xx_add_control(spec,
3213 STAC_CTL_WIDGET_CLFE_SWITCH,
3214 "Swap Center/LFE Playback Switch", nid);
3215
3216 if (err < 0)
3217 return err;
3218 }
3219
c7d4b2fa 3220 } else {
dc04d1b4 3221 const char *name;
668b9652 3222 int idx;
dc04d1b4
TI		 3223 switch (type) {
3224 case AUTO_PIN_HP_OUT:
668b9652
TI		 3225 name = "Headphone";
3226 idx = i;
dc04d1b4
TI		 3227 break;
3228 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3229 name = "Speaker";
3230 idx = i;
dc04d1b4
TI		 3231 break;
3232 default:
3233 name = chname[i];
668b9652 3234 idx = 0;
dc04d1b4 3235 break;
76624534 3236 }
668b9652 3237 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3238 if (err < 0)
c7d4b2fa
M		 3239 return err;
3240 }
3241 }
dc04d1b4
TI		 3242 return 0;
3243}
3244
6479c631
TI		 3245static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3246 unsigned long sw, int idx)
3247{
3248 int err;
3249 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3250 "Capture Volume", vol);
6479c631
TI		 3251 if (err < 0)
3252 return err;
3253 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3254 "Capture Switch", sw);
6479c631
TI		 3255 if (err < 0)
3256 return err;
3257 return 0;
3258}
3259
dc04d1b4
TI		 3260/* add playback controls from the parsed DAC table */
3261static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3262 const struct auto_pin_cfg *cfg)
3263{
3264 struct sigmatel_spec *spec = codec->spec;
7c922de7 3265 hda_nid_t nid;
dc04d1b4 3266 int err;
7c922de7 3267 int idx;
dc04d1b4
TI		 3268
3269 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3270 spec->multiout.dac_nids,
3271 cfg->line_out_type);
3272 if (err < 0)
3273 return err;
c7d4b2fa 3274
a9cb5c90 3275 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3276 err = stac92xx_add_control(spec,
3277 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3278 "Headphone as Line Out Switch",
3279 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3280 if (err < 0)
3281 return err;
3282 }
3283
eea7dc93 3284 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3285 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3286 break;
3287 nid = cfg->inputs[idx].pin;
3288 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3289 if (err < 0)
3290 return err;
b5895dc8 3291 }
403d1944 3292
c7d4b2fa
M		 3293 return 0;
3294}
3295
eb06ed8f
TI		 3296/* add playback controls for Speaker and HP outputs */
3297static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3298 struct auto_pin_cfg *cfg)
3299{
3300 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3301 int err;
3302
3303 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3304 spec->hp_dacs, AUTO_PIN_HP_OUT);
3305 if (err < 0)
3306 return err;
3307
3308 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3309 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3310 if (err < 0)
3311 return err;
eb06ed8f 3312
c7d4b2fa
M		 3313 return 0;
3314}
3315
b22b4821 3316/* labels for mono mux outputs */
ea734963 3317static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3318 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3319};
3320
3321/* create mono mux for mono out on capable codecs */
3322static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3323{
3324 struct sigmatel_spec *spec = codec->spec;
3325 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3326 int i, num_cons;
3327 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3328
3329 num_cons = snd_hda_get_connections(codec,
3330 spec->mono_nid,
3331 con_lst,
3332 HDA_MAX_NUM_INPUTS);
16a433d8 3333 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3334 return -EINVAL;
3335
10a20af7
TI		 3336 for (i = 0; i < num_cons; i++)
3337 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3338 NULL);
09a99959
MR		 3339
3340 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3341 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3342}
3343
1cd2224c
MR		 3344/* create PC beep volume controls */
3345static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3346 hda_nid_t nid)
3347{
3348 struct sigmatel_spec *spec = codec->spec;
3349 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3350 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3351
3352 if (spec->anabeep_nid == nid)
3353 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3354
3355 /* check for mute support for the the amp */
3356 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3357 err = stac92xx_add_control(spec, type,
d355c82a 3358 "Beep Playback Switch",
1cd2224c
MR		 3359 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3360 if (err < 0)
3361 return err;
3362 }
3363
3364 /* check to see if there is volume support for the amp */
3365 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3366 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3367 "Beep Playback Volume",
1cd2224c
MR		 3368 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3369 if (err < 0)
3370 return err;
3371 }
3372 return 0;
3373}
3374
4d4e9bb3
TI		 3375#ifdef CONFIG_SND_HDA_INPUT_BEEP
3376#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3377
3378static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3379 struct snd_ctl_elem_value *ucontrol)
3380{
3381 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3382 ucontrol->value.integer.value[0] = codec->beep->enabled;
3383 return 0;
3384}
3385
3386static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3387 struct snd_ctl_elem_value *ucontrol)
3388{
3389 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3390 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3391}
3392
2b63536f 3393static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI		 3394 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3395 .info = stac92xx_dig_beep_switch_info,
3396 .get = stac92xx_dig_beep_switch_get,
3397 .put = stac92xx_dig_beep_switch_put,
3398};
3399
3400static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3401{
3402 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3403 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3404}
3405#endif
3406
4682eee0
MR		 3407static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3408{
3409 struct sigmatel_spec *spec = codec->spec;
667067d8 3410 int i, j, err = 0;
4682eee0
MR		 3411
3412 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3413 hda_nid_t nid;
3414 unsigned int wcaps;
3415 unsigned long val;
3416
4682eee0
MR		 3417 nid = spec->mux_nids[i];
3418 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3419 if (!(wcaps & AC_WCAP_OUT_AMP))
3420 continue;
4682eee0 3421
667067d8
TI		 3422 /* check whether already the same control was created as
3423 * normal Capture Volume.
3424 */
3425 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3426 for (j = 0; j < spec->num_caps; j++) {
3427 if (spec->capvols[j] == val)
3428 break;
4682eee0 3429 }
667067d8
TI		 3430 if (j < spec->num_caps)
3431 continue;
3432
3433 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3434 "Mux Capture Volume", val);
3435 if (err < 0)
3436 return err;
4682eee0
MR		 3437 }
3438 return 0;
3439};
3440
ea734963 3441static const char * const stac92xx_spdif_labels[3] = {
65973632 3442 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3443};
3444
3445static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3446{
3447 struct sigmatel_spec *spec = codec->spec;
3448 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3449 const char * const *labels = spec->spdif_labels;
d9737751 3450 int i, num_cons;
65973632 3451 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3452
3453 num_cons = snd_hda_get_connections(codec,
3454 spec->smux_nids[0],
3455 con_lst,
3456 HDA_MAX_NUM_INPUTS);
16a433d8 3457 if (num_cons <= 0)
d9737751
MR		 3458 return -EINVAL;
3459
65973632
MR		 3460 if (!labels)
3461 labels = stac92xx_spdif_labels;
3462
10a20af7
TI		 3463 for (i = 0; i < num_cons; i++)
3464 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3465
3466 return 0;
3467}
3468
8b65727b 3469/* labels for dmic mux inputs */
ea734963 3470static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3471 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3472 "Digital Mic 3", "Digital Mic 4"
3473};
3474
699d8995
VK		 3475static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3476 int idx)
3477{
3478 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3479 int nums;
3480 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3481 if (idx >= 0 && idx < nums)
3482 return conn[idx];
3483 return 0;
3484}
3485
8d087c76
TI		 3486/* look for NID recursively */
3487#define get_connection_index(codec, mux, nid) \
3488 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3489
667067d8 3490/* create a volume assigned to the given pin (only if supported) */
96f845de 3491/* return 1 if the volume control is created */
667067d8 3492static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3493 const char *label, int idx, int direction)
667067d8
TI		 3494{
3495 unsigned int caps, nums;
3496 char name[32];
96f845de 3497 int err;
667067d8 3498
96f845de
TI		 3499 if (direction == HDA_OUTPUT)
3500 caps = AC_WCAP_OUT_AMP;
3501 else
3502 caps = AC_WCAP_IN_AMP;
3503 if (!(get_wcaps(codec, nid) & caps))
667067d8 3504 return 0;
96f845de 3505 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3506 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3507 if (!nums)
3508 return 0;
3509 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3510 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3511 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3512 if (err < 0)
3513 return err;
3514 return 1;
667067d8
TI		 3515}
3516
8b65727b
MP		 3517/* create playback/capture controls for input pins on dmic capable codecs */
3518static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3519 const struct auto_pin_cfg *cfg)
3520{
3521 struct sigmatel_spec *spec = codec->spec;
5207e10e 3522 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3523 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3524 int err, i;
5207e10e 3525 unsigned int def_conf;
8b65727b 3526
10a20af7 3527 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3528
8b65727b 3529 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3530 hda_nid_t nid;
10a20af7 3531 int index, type_idx;
201e06ff 3532 char label[32];
8b65727b 3533
667067d8
TI		 3534 nid = spec->dmic_nids[i];
3535 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3536 continue;
3537 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3538 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3539 continue;
3540
3d21d3f7
TI		 3541 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3542 if (index < 0)
3543 continue;
3544
201e06ff
TI		 3545 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
3546 label, sizeof(label), NULL);
10a20af7 3547 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3548 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3549 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3550
10a20af7
TI		 3551 err = create_elem_capture_vol(codec, nid, label, type_idx,
3552 HDA_INPUT);
667067d8
TI		 3553 if (err < 0)
3554 return err;
96f845de
TI		 3555 if (!err) {
3556 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3557 type_idx, HDA_OUTPUT);
96f845de
TI		 3558 if (err < 0)
3559 return err;
699d8995
VK		 3560 if (!err) {
3561 nid = get_connected_node(codec,
3562 spec->dmux_nids[0], index);
3563 if (nid)
3564 err = create_elem_capture_vol(codec,
3565 nid, label,
3566 type_idx, HDA_INPUT);
3567 if (err < 0)
3568 return err;
3569 }
96f845de 3570 }
8b65727b
MP		 3571 }
3572
3573 return 0;
3574}
3575
3d21d3f7 3576static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3577 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3578{
3579 unsigned int cfg;
1f83ac5a 3580 unsigned int type;
3d21d3f7
TI		 3581
3582 if (!nid)
3583 return 0;
3584 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3585 type = get_defcfg_device(cfg);
99ae28be
TI		 3586 switch (snd_hda_get_input_pin_attr(cfg)) {
3587 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3588 if (*fixed)
3589 return 1; /* already occupied */
1f83ac5a
TI		 3590 if (type != AC_JACK_MIC_IN)
3591 return 1; /* invalid type */
3d21d3f7
TI		 3592 *fixed = nid;
3593 break;
99ae28be
TI		 3594 case INPUT_PIN_ATTR_UNUSED:
3595 break;
3596 case INPUT_PIN_ATTR_DOCK:
3597 if (*dock)
3598 return 1; /* already occupied */
1f83ac5a
TI		 3599 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3600 return 1; /* invalid type */
99ae28be
TI		 3601 *dock = nid;
3602 break;
3603 default:
3d21d3f7
TI		 3604 if (*ext)
3605 return 1; /* already occupied */
1f83ac5a
TI		 3606 if (type != AC_JACK_MIC_IN)
3607 return 1; /* invalid type */
3d21d3f7
TI		 3608 *ext = nid;
3609 break;
3610 }
3611 return 0;
3612}
3613
3614static int set_mic_route(struct hda_codec *codec,
3615 struct sigmatel_mic_route *mic,
3616 hda_nid_t pin)
3617{
3618 struct sigmatel_spec *spec = codec->spec;
3619 struct auto_pin_cfg *cfg = &spec->autocfg;
3620 int i;
3621
3622 mic->pin = pin;
9907790a
CC		 3623 if (pin == 0)
3624 return 0;
eea7dc93
TI		 3625 for (i = 0; i < cfg->num_inputs; i++) {
3626 if (pin == cfg->inputs[i].pin)
3d21d3f7 3627 break;
eea7dc93 3628 }
86e2959a 3629 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3630 /* analog pin */
3d21d3f7
TI		 3631 i = get_connection_index(codec, spec->mux_nids[0], pin);
3632 if (i < 0)
3633 return -1;
3634 mic->mux_idx = i;
02d33322
TI		 3635 mic->dmux_idx = -1;
3636 if (spec->dmux_nids)
3637 mic->dmux_idx = get_connection_index(codec,
3638 spec->dmux_nids[0],
3639 spec->mux_nids[0]);
da2a2aaa 3640 } else if (spec->dmux_nids) {
3d21d3f7 3641 /* digital pin */
3d21d3f7
TI		 3642 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3643 if (i < 0)
3644 return -1;
3645 mic->dmux_idx = i;
02d33322
TI		 3646 mic->mux_idx = -1;
3647 if (spec->mux_nids)
3648 mic->mux_idx = get_connection_index(codec,
3649 spec->mux_nids[0],
3650 spec->dmux_nids[0]);
3d21d3f7
TI		 3651 }
3652 return 0;
3653}
3654
3655/* return non-zero if the device is for automatic mic switch */
3656static int stac_check_auto_mic(struct hda_codec *codec)
3657{
3658 struct sigmatel_spec *spec = codec->spec;
3659 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3660 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3661 int i;
3662
9907790a 3663 fixed = ext = dock = 0;
eea7dc93 3664 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3665 if (check_mic_pin(codec, cfg->inputs[i].pin,
3666 &fixed, &ext, &dock))
3d21d3f7
TI		 3667 return 0;
3668 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3669 if (check_mic_pin(codec, spec->dmic_nids[i],
3670 &fixed, &ext, &dock))
3d21d3f7 3671 return 0;
80c67852 3672 if (!fixed || (!ext && !dock))
9907790a 3673 return 0; /* no input to switch */
e35d9d6a 3674 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI		 3675 return 0; /* no unsol support */
3676 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3677 set_mic_route(codec, &spec->int_mic, fixed) ||
3678 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3679 return 0; /* something is wrong */
3680 return 1;
3681}
3682
c7d4b2fa
M		 3683/* create playback/capture controls for input pins */
3684static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3685{
3686 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3687 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3688 int i, j;
263d0328 3689 const char *label;
c7d4b2fa 3690
eea7dc93
TI		 3691 for (i = 0; i < cfg->num_inputs; i++) {
3692 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3693 int index, err, type_idx;
314634bc 3694
314634bc
TI		 3695 index = -1;
3696 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3697 index = get_connection_index(codec, spec->mux_nids[j],
3698 nid);
3699 if (index >= 0)
3700 break;
c7d4b2fa 3701 }
667067d8
TI		 3702 if (index < 0)
3703 continue;
3704
10a20af7
TI		 3705 label = hda_get_autocfg_input_label(codec, cfg, i);
3706 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3707
667067d8 3708 err = create_elem_capture_vol(codec, nid,
263d0328 3709 label, type_idx,
96f845de 3710 HDA_INPUT);
667067d8
TI		 3711 if (err < 0)
3712 return err;
c7d4b2fa 3713 }
5207e10e 3714 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3715
7b043899 3716 if (imux->num_items) {
62fe78e9
SR		 3717 /*
3718 * Set the current input for the muxes.
3719 * The STAC9221 has two input muxes with identical source
3720 * NID lists. Hopefully this won't get confused.
3721 */
3722 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3723 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3724 AC_VERB_SET_CONNECT_SEL,
3725 imux->items[0].index);
62fe78e9
SR		 3726 }
3727 }
3728
c7d4b2fa
M		 3729 return 0;
3730}
3731
c7d4b2fa
M		 3732static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3733{
3734 struct sigmatel_spec *spec = codec->spec;
3735 int i;
3736
3737 for (i = 0; i < spec->autocfg.line_outs; i++) {
3738 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3739 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3740 }
3741}
3742
3743static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3744{
3745 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3746 int i;
c7d4b2fa 3747
eb06ed8f
TI		 3748 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3749 hda_nid_t pin;
3750 pin = spec->autocfg.hp_pins[i];
3751 if (pin) /* connect to front */
3752 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3753 }
3754 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3755 hda_nid_t pin;
3756 pin = spec->autocfg.speaker_pins[i];
3757 if (pin) /* connect to front */
3758 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3759 }
c7d4b2fa
M		 3760}
3761
8af3aeb4
TI		 3762static int is_dual_headphones(struct hda_codec *codec)
3763{
3764 struct sigmatel_spec *spec = codec->spec;
3765 int i, valid_hps;
3766
3767 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3768 spec->autocfg.hp_outs <= 1)
3769 return 0;
3770 valid_hps = 0;
3771 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3772 hda_nid_t nid = spec->autocfg.hp_pins[i];
3773 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3774 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3775 continue;
3776 valid_hps++;
3777 }
3778 return (valid_hps > 1);
3779}
3780
3781
9009b0e4 3782static int stac92xx_parse_auto_config(struct hda_codec *codec)
c7d4b2fa
M		 3783{
3784 struct sigmatel_spec *spec = codec->spec;
9009b0e4 3785 hda_nid_t dig_out = 0, dig_in = 0;
dc04d1b4 3786 int hp_swap = 0;
6479c631 3787 int i, err;
c7d4b2fa 3788
8b65727b
MP		 3789 if ((err = snd_hda_parse_pin_def_config(codec,
3790 &spec->autocfg,
3791 spec->dmic_nids)) < 0)
c7d4b2fa 3792 return err;
82bc955f 3793 if (! spec->autocfg.line_outs)
869264c4 3794 return 0; /* can't find valid pin config */
19039bd0 3795
bcecd9bd
JZ		 3796 /* If we have no real line-out pin and multiple hp-outs, HPs should
3797 * be set up as multi-channel outputs.
3798 */
8af3aeb4 3799 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3800 /* Copy hp_outs to line_outs, backup line_outs in
3801 * speaker_outs so that the following routines can handle
3802 * HP pins as primary outputs.
3803 */
c21ca4a8 3804 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3805 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3806 sizeof(spec->autocfg.line_out_pins));
3807 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3808 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3809 sizeof(spec->autocfg.hp_pins));
3810 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3811 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3812 spec->autocfg.hp_outs = 0;
dc04d1b4 3813 hp_swap = 1;
bcecd9bd 3814 }
09a99959 3815 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3816 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3817 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3818 u32 caps = query_amp_caps(codec,
3819 spec->autocfg.mono_out_pin, dir);
3820 hda_nid_t conn_list[1];
3821
3822 /* get the mixer node and then the mono mux if it exists */
3823 if (snd_hda_get_connections(codec,
3824 spec->autocfg.mono_out_pin, conn_list, 1) &&
3825 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3826 conn_list, 1) > 0) {
09a99959
MR		 3827
3828 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3829 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3830 /* LR swap check, some stac925x have a mux that
3831 * changes the DACs output path instead of the
3832 * mono-mux path.
3833 */
3834 if (wid_type == AC_WID_AUD_SEL &&
3835 !(wcaps & AC_WCAP_LR_SWAP))
3836 spec->mono_nid = conn_list[0];
3837 }
d0513fc6
MR		 3838 if (dir) {
3839 hda_nid_t nid = spec->autocfg.mono_out_pin;
3840
3841 /* most mono outs have a least a mute/unmute switch */
3842 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3843 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3844 "Mono Playback Switch",
3845 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3846 if (err < 0)
3847 return err;
d0513fc6
MR		 3848 /* check for volume support for the amp */
3849 if ((caps & AC_AMPCAP_NUM_STEPS)
3850 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3851 err = stac92xx_add_control(spec,
3852 STAC_CTL_WIDGET_VOL,
3853 "Mono Playback Volume",
3854 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3855 if (err < 0)
3856 return err;
3857 }
09a99959
MR		 3858 }
3859
3860 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3861 AC_PINCTL_OUT_EN);
3862 }
bcecd9bd 3863
c21ca4a8
TI		 3864 if (!spec->multiout.num_dacs) {
3865 err = stac92xx_auto_fill_dac_nids(codec);
3866 if (err < 0)
19039bd0 3867 return err;
c9280d68
TI		 3868 err = stac92xx_auto_create_multi_out_ctls(codec,
3869 &spec->autocfg);
3870 if (err < 0)
3871 return err;
c21ca4a8 3872 }
c7d4b2fa 3873
1cd2224c
MR		 3874 /* setup analog beep controls */
3875 if (spec->anabeep_nid > 0) {
3876 err = stac92xx_auto_create_beep_ctls(codec,
3877 spec->anabeep_nid);
3878 if (err < 0)
3879 return err;
3880 }
3881
3882 /* setup digital beep controls and input device */
3883#ifdef CONFIG_SND_HDA_INPUT_BEEP
3884 if (spec->digbeep_nid > 0) {
3885 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3886 unsigned int caps;
1cd2224c
MR		 3887
3888 err = stac92xx_auto_create_beep_ctls(codec, nid);
3889 if (err < 0)
3890 return err;
3891 err = snd_hda_attach_beep_device(codec, nid);
3892 if (err < 0)
3893 return err;
d8d881dd
TI		 3894 if (codec->beep) {
3895 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3896 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3897 /* if no beep switch is available, make its own one */
3898 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3899 if (!(caps & AC_AMPCAP_MUTE)) {
3900 err = stac92xx_beep_switch_ctl(codec);
3901 if (err < 0)
3902 return err;
3903 }
4d4e9bb3 3904 }
1cd2224c
MR		 3905 }
3906#endif
3907
0fb87bb4 3908 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3909 if (err < 0)
3910 return err;
3911
dc04d1b4
TI		 3912 /* All output parsing done, now restore the swapped hp pins */
3913 if (hp_swap) {
3914 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3915 sizeof(spec->autocfg.hp_pins));
3916 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3917 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3918 spec->autocfg.line_outs = 0;
3919 }
0fb87bb4 3920
3d21d3f7
TI		 3921 if (stac_check_auto_mic(codec)) {
3922 spec->auto_mic = 1;
3923 /* only one capture for auto-mic */
3924 spec->num_adcs = 1;
3925 spec->num_caps = 1;
3926 spec->num_muxes = 1;
3927 }
3928
6479c631
TI		 3929 for (i = 0; i < spec->num_caps; i++) {
3930 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3931 spec->capsws[i], i);
3932 if (err < 0)
3933 return err;
3934 }
3935
dc04d1b4 3936 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3937 if (err < 0)
c7d4b2fa
M		 3938 return err;
3939
b22b4821
MR		 3940 if (spec->mono_nid > 0) {
3941 err = stac92xx_auto_create_mono_output_ctls(codec);
3942 if (err < 0)
3943 return err;
3944 }
2a9c7816 3945 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3946 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3947 &spec->autocfg)) < 0)
3948 return err;
4682eee0
MR		 3949 if (spec->num_muxes > 0) {
3950 err = stac92xx_auto_create_mux_input_ctls(codec);
3951 if (err < 0)
3952 return err;
3953 }
d9737751
MR		 3954 if (spec->num_smuxes > 0) {
3955 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3956 if (err < 0)
3957 return err;
3958 }
8b65727b 3959
e3c75964
TI		 3960 err = stac92xx_add_input_source(spec);
3961 if (err < 0)
3962 return err;
3963
c7d4b2fa 3964 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3965 if (spec->multiout.max_channels > 2)
c7d4b2fa 3966 spec->surr_switch = 1;
c7d4b2fa 3967
9009b0e4
CC		 3968 /* find digital out and in converters */
3969 for (i = codec->start_nid; i < codec->start_nid + codec->num_nodes; i++) {
3970 unsigned int wid_caps = get_wcaps(codec, i);
3971 if (wid_caps & AC_WCAP_DIGITAL) {
3972 switch (get_wcaps_type(wid_caps)) {
3973 case AC_WID_AUD_OUT:
3974 if (!dig_out)
3975 dig_out = i;
3976 break;
3977 case AC_WID_AUD_IN:
3978 if (!dig_in)
3979 dig_in = i;
3980 break;
3981 }
3982 }
3983 }
0852d7a6 3984 if (spec->autocfg.dig_outs)
3cc08dc6 3985 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3986 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3987 spec->dig_in_nid = dig_in;
c7d4b2fa 3988
603c4019
TI		 3989 if (spec->kctls.list)
3990 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3991
3992 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3993 if (!spec->dinput_mux)
3994 spec->dinput_mux = &spec->private_dimux;
d9737751 3995 spec->sinput_mux = &spec->private_smux;
b22b4821 3996 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3997 return 1;
3998}
3999
82bc955f
TI		 4000/* add playback controls for HP output */
4001static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
4002 struct auto_pin_cfg *cfg)
4003{
4004 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 4005 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 4006
4007 if (! pin)
4008 return 0;
4009
e35d9d6a 4010 if (is_jack_detectable(codec, pin))
82bc955f 4011 spec->hp_detect = 1;
82bc955f
TI		 4012
4013 return 0;
4014}
4015
160ea0dc
RF		 4016/* add playback controls for LFE output */
4017static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4018 struct auto_pin_cfg *cfg)
4019{
4020 struct sigmatel_spec *spec = codec->spec;
4021 int err;
4022 hda_nid_t lfe_pin = 0x0;
4023 int i;
4024
4025 /*
4026 * search speaker outs and line outs for a mono speaker pin
4027 * with an amp. If one is found, add LFE controls
4028 * for it.
4029 */
4030 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4031 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4032 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4033 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4034 if (wcaps == AC_WCAP_OUT_AMP)
4035 /* found a mono speaker with an amp, must be lfe */
4036 lfe_pin = pin;
4037 }
4038
4039 /* if speaker_outs is 0, then speakers may be in line_outs */
4040 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4041 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4042 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4043 unsigned int defcfg;
330ee995 4044 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4045 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4046 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4047 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4048 if (wcaps == AC_WCAP_OUT_AMP)
4049 /* found a mono speaker with an amp,
4050 must be lfe */
4051 lfe_pin = pin;
4052 }
4053 }
4054 }
4055
4056 if (lfe_pin) {
7c7767eb 4057 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4058 if (err < 0)
4059 return err;
4060 }
4061
4062 return 0;
4063}
4064
c7d4b2fa
M		 4065static int stac9200_parse_auto_config(struct hda_codec *codec)
4066{
4067 struct sigmatel_spec *spec = codec->spec;
4068 int err;
4069
df694daa 4070 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4071 return err;
4072
4073 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4074 return err;
4075
82bc955f
TI		 4076 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4077 return err;
4078
160ea0dc
RF		 4079 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4080 return err;
4081
355a0ec4
TI		 4082 if (spec->num_muxes > 0) {
4083 err = stac92xx_auto_create_mux_input_ctls(codec);
4084 if (err < 0)
4085 return err;
4086 }
4087
e3c75964
TI		 4088 err = stac92xx_add_input_source(spec);
4089 if (err < 0)
4090 return err;
4091
0852d7a6 4092 if (spec->autocfg.dig_outs)
c7d4b2fa 4093 spec->multiout.dig_out_nid = 0x05;
82bc955f 4094 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4095 spec->dig_in_nid = 0x04;
c7d4b2fa 4096
603c4019
TI		 4097 if (spec->kctls.list)
4098 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4099
4100 spec->input_mux = &spec->private_imux;
8b65727b 4101 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4102
4103 return 1;
4104}
4105
62fe78e9
SR		 4106/*
4107 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4108 * funky external mute control using GPIO pins.
4109 */
4110
76e1ddfb 4111static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4112 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4113{
4114 unsigned int gpiostate, gpiomask, gpiodir;
4115
45eebda7
VK		 4116 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4117
62fe78e9
SR		 4118 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4119 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4120 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4121
4122 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4123 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4124 gpiomask |= mask;
62fe78e9
SR		 4125
4126 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4127 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4128 gpiodir |= dir_mask;
62fe78e9 4129
76e1ddfb 4130 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4131 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4132
4133 snd_hda_codec_write(codec, codec->afg, 0,
4134 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4135 snd_hda_codec_read(codec, codec->afg, 0,
4136 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4137
4138 msleep(1);
4139
76e1ddfb
TI		 4140 snd_hda_codec_read(codec, codec->afg, 0,
4141 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4142}
4143
3a93897e 4144static int stac_add_event(struct hda_codec *codec, hda_nid_t nid,
c6e4c666 4145 unsigned char type, int data)
74aeaabc 4146{
3a93897e 4147 struct hda_jack_tbl *event;
74aeaabc 4148
3a93897e 4149 event = snd_hda_jack_tbl_new(codec, nid);
74aeaabc
MR		 4150 if (!event)
4151 return -ENOMEM;
3a93897e
TI		 4152 event->action = type;
4153 event->private_data = data;
c6e4c666 4154
3a93897e 4155 return 0;
c6e4c666
TI		 4156}
4157
62558ce1
TI		 4158/* check if given nid is a valid pin and no other events are assigned
4159 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4160 * Otherwise, returns zero.
4161 */
4162static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4163 unsigned int type)
c6e4c666 4164{
3a93897e 4165 struct hda_jack_tbl *event;
c6e4c666 4166
e35d9d6a 4167 if (!is_jack_detectable(codec, nid))
62558ce1 4168 return 0;
3a93897e
TI		 4169 event = snd_hda_jack_tbl_new(codec, nid);
4170 if (!event)
4171 return -ENOMEM;
4172 if (event->action && event->action != type)
4173 return 0;
4174 event->action = type;
4175 snd_hda_jack_detect_enable(codec, nid, 0);
62558ce1 4176 return 1;
314634bc
TI		 4177}
4178
b4ead019 4179static int is_nid_out_jack_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
a64135a2
MR		 4180{
4181 int i;
4182 for (i = 0; i < cfg->hp_outs; i++)
4183 if (cfg->hp_pins[i] == nid)
4184 return 1; /* nid is a HP-Out */
b4ead019
TI		 4185 for (i = 0; i < cfg->line_outs; i++)
4186 if (cfg->line_out_pins[i] == nid)
4187 return 1; /* nid is a line-Out */
a64135a2
MR		 4188 return 0; /* nid is not a HP-Out */
4189};
4190
b76c850f
MR		 4191static void stac92xx_power_down(struct hda_codec *codec)
4192{
4193 struct sigmatel_spec *spec = codec->spec;
4194
4195 /* power down inactive DACs */
2b63536f 4196 const hda_nid_t *dac;
b76c850f 4197 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4198 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4199 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4200 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4201}
4202
f73d3585
TI		 4203static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4204 int enable);
4205
014c41fc
TI		 4206static inline int get_int_hint(struct hda_codec *codec, const char *key,
4207 int *valp)
4208{
4209 const char *p;
4210 p = snd_hda_get_hint(codec, key);
4211 if (p) {
4212 unsigned long val;
4213 if (!strict_strtoul(p, 0, &val)) {
4214 *valp = val;
4215 return 1;
4216 }
4217 }
4218 return 0;
4219}
4220
6565e4fa
TI		 4221/* override some hints from the hwdep entry */
4222static void stac_store_hints(struct hda_codec *codec)
4223{
4224 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4225 int val;
4226
4227 val = snd_hda_get_bool_hint(codec, "hp_detect");
4228 if (val >= 0)
4229 spec->hp_detect = val;
014c41fc 4230 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4231 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4232 spec->gpio_mask;
4233 }
014c41fc
TI		 4234 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4235 spec->gpio_mask &= spec->gpio_mask;
4236 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4237 spec->gpio_dir &= spec->gpio_mask;
4238 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4239 spec->eapd_mask &= spec->gpio_mask;
4240 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4241 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4242 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4243 if (val >= 0)
4244 spec->eapd_switch = val;
4245}
4246
f2cbba76
TI		 4247static void stac_issue_unsol_events(struct hda_codec *codec, int num_pins,
4248 const hda_nid_t *pins)
4249{
4250 while (num_pins--)
4251 stac_issue_unsol_event(codec, *pins++);
4252}
4253
4254/* fake event to set up pins */
4255static void stac_fake_hp_events(struct hda_codec *codec)
4256{
4257 struct sigmatel_spec *spec = codec->spec;
4258
4259 if (spec->autocfg.hp_outs)
4260 stac_issue_unsol_events(codec, spec->autocfg.hp_outs,
4261 spec->autocfg.hp_pins);
4262 if (spec->autocfg.line_outs &&
4263 spec->autocfg.line_out_pins[0] != spec->autocfg.hp_pins[0])
4264 stac_issue_unsol_events(codec, spec->autocfg.line_outs,
4265 spec->autocfg.line_out_pins);
4266}
4267
c7d4b2fa
M		 4268static int stac92xx_init(struct hda_codec *codec)
4269{
4270 struct sigmatel_spec *spec = codec->spec;
82bc955f 4271 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4272 unsigned int gpio;
e4973e1e 4273 int i;
c7d4b2fa 4274
5e68fb3c
DH		 4275 if (spec->init)
4276 snd_hda_sequence_write(codec, spec->init);
c7d4b2fa 4277
8daaaa97
MR		 4278 /* power down adcs initially */
4279 if (spec->powerdown_adcs)
4280 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4281 snd_hda_codec_write(codec,
8daaaa97
MR		 4282 spec->adc_nids[i], 0,
4283 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4284
6565e4fa
TI		 4285 /* override some hints */
4286 stac_store_hints(codec);
4287
f73d3585
TI		 4288 /* set up GPIO */
4289 gpio = spec->gpio_data;
4290 /* turn on EAPD statically when spec->eapd_switch isn't set.
4291 * otherwise, unsol event will turn it on/off dynamically
4292 */
4293 if (!spec->eapd_switch)
4294 gpio |= spec->eapd_mask;
4295 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4296
82bc955f
TI		 4297 /* set up pins */
4298 if (spec->hp_detect) {
505cb341 4299 /* Enable unsolicited responses on the HP widget */
74aeaabc 4300 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4301 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4302 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4303 }
1c4bdf9b
TI		 4304 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4305 cfg->speaker_outs > 0) {
fefd67f3 4306 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4307 for (i = 0; i < cfg->line_outs; i++) {
4308 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4309 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4310 }
4311 }
4312
0a07acaf
TI		 4313 /* force to enable the first line-out; the others are set up
4314 * in unsol_event
4315 */
4316 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4317 AC_PINCTL_OUT_EN);
82bc955f 4318 /* fake event to set up pins */
f2cbba76 4319 stac_fake_hp_events(codec);
82bc955f
TI		 4320 } else {
4321 stac92xx_auto_init_multi_out(codec);
4322 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4323 for (i = 0; i < cfg->hp_outs; i++)
4324 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4325 }
3d21d3f7 4326 if (spec->auto_mic) {
15b4f296 4327 /* initialize connection to analog input */
da2a2aaa
TI		 4328 if (spec->dmux_nids)
4329 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4330 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4331 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4332 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4333 if (enable_pin_detect(codec, spec->dock_mic.pin,
4334 STAC_MIC_EVENT))
4335 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4336 }
eea7dc93
TI		 4337 for (i = 0; i < cfg->num_inputs; i++) {
4338 hda_nid_t nid = cfg->inputs[i].pin;
4339 int type = cfg->inputs[i].type;
4340 unsigned int pinctl, conf;
86e2959a 4341 if (type == AUTO_PIN_MIC) {
eea7dc93 4342 /* for mic pins, force to initialize */
4740860b 4343 pinctl = snd_hda_get_default_vref(codec, nid);
eea7dc93
TI		 4344 pinctl |= AC_PINCTL_IN_EN;
4345 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4346 } else {
4347 pinctl = snd_hda_codec_read(codec, nid, 0,
4348 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4349 /* if PINCTL already set then skip */
4350 /* Also, if both INPUT and OUTPUT are set,
4351 * it must be a BIOS bug; need to override, too
4352 */
4353 if (!(pinctl & AC_PINCTL_IN_EN) ||
4354 (pinctl & AC_PINCTL_OUT_EN)) {
4355 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4356 pinctl |= AC_PINCTL_IN_EN;
4357 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4358 }
c960a03b 4359 }
eea7dc93
TI		 4360 conf = snd_hda_codec_get_pincfg(codec, nid);
4361 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4362 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4363 stac_issue_unsol_event(codec, nid);
4364 }
82bc955f 4365 }
a64135a2
MR		 4366 for (i = 0; i < spec->num_dmics; i++)
4367 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4368 AC_PINCTL_IN_EN);
0852d7a6
TI		 4369 if (cfg->dig_out_pins[0])
4370 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4371 AC_PINCTL_OUT_EN);
4372 if (cfg->dig_in_pin)
4373 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4374 AC_PINCTL_IN_EN);
a64135a2 4375 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585 4376 hda_nid_t nid = spec->pwr_nids[i];
6e1c39c6 4377 unsigned int pinctl, def_conf;
f73d3585 4378
bfc89dec
TI		 4379 def_conf = snd_hda_codec_get_pincfg(codec, nid);
4380 def_conf = get_defcfg_connect(def_conf);
4381 if (def_conf == AC_JACK_PORT_NONE) {
4382 /* power off unused ports */
4383 stac_toggle_power_map(codec, nid, 0);
4384 continue;
4385 }
6e1c39c6
TI		 4386 if (def_conf == AC_JACK_PORT_FIXED) {
4387 /* no need for jack detection for fixed pins */
4388 stac_toggle_power_map(codec, nid, 1);
4389 continue;
4390 }
eb632128 4391 /* power on when no jack detection is available */
542c9a0a
TI		 4392 /* or when the VREF is used for controlling LED */
4393 if (!spec->hp_detect ||
bfc89dec
TI		 4394 spec->vref_mute_led_nid == nid ||
4395 !is_jack_detectable(codec, nid)) {
eb632128
TI		 4396 stac_toggle_power_map(codec, nid, 1);
4397 continue;
4398 }
4399
b4ead019 4400 if (is_nid_out_jack_pin(cfg, nid))
f73d3585
TI		 4401 continue; /* already has an unsol event */
4402
4403 pinctl = snd_hda_codec_read(codec, nid, 0,
4404 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4405 /* outputs are only ports capable of power management
4406 * any attempts on powering down a input port cause the
4407 * referenced VREF to act quirky.
4408 */
eb632128
TI		 4409 if (pinctl & AC_PINCTL_IN_EN) {
4410 stac_toggle_power_map(codec, nid, 1);
a64135a2 4411 continue;
eb632128 4412 }
afef2cfa 4413 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) {
62558ce1 4414 stac_issue_unsol_event(codec, nid);
afef2cfa
CC		 4415 continue;
4416 }
4417 /* none of the above, turn the port OFF */
4418 stac_toggle_power_map(codec, nid, 0);
a64135a2 4419 }
c21bd025 4420
c21bd025 4421 /* sync mute LED */
1f43f6c1
TI		 4422 if (spec->gpio_led) {
4423 if (spec->vmaster_mute.hook)
4424 snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
4425 else /* the very first init call doesn't have vmaster yet */
4426 stac92xx_update_led_status(codec, false);
4427 }
c882246d
TI		 4428
4429 /* sync the power-map */
4430 if (spec->num_pwrs)
4431 snd_hda_codec_write(codec, codec->afg, 0,
4432 AC_VERB_IDT_SET_POWER_MAP,
4433 spec->power_map_bits);
b76c850f
MR		 4434 if (spec->dac_list)
4435 stac92xx_power_down(codec);
c7d4b2fa
M		 4436 return 0;
4437}
4438
603c4019
TI		 4439static void stac92xx_free_kctls(struct hda_codec *codec)
4440{
4441 struct sigmatel_spec *spec = codec->spec;
4442
4443 if (spec->kctls.list) {
4444 struct snd_kcontrol_new *kctl = spec->kctls.list;
4445 int i;
4446 for (i = 0; i < spec->kctls.used; i++)
4447 kfree(kctl[i].name);
4448 }
4449 snd_array_free(&spec->kctls);
4450}
4451
45eebda7
VK		 4452static void stac92xx_shutup_pins(struct hda_codec *codec)
4453{
4454 unsigned int i, def_conf;
4455
4456 if (codec->bus->shutdown)
4457 return;
4458 for (i = 0; i < codec->init_pins.used; i++) {
4459 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4460 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4461 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
cdd03ced 4462 snd_hda_set_pin_ctl(codec, pin->nid, 0);
45eebda7
VK		 4463 }
4464}
4465
167eae5a
TI		 4466static void stac92xx_shutup(struct hda_codec *codec)
4467{
4468 struct sigmatel_spec *spec = codec->spec;
167eae5a 4469
45eebda7 4470 stac92xx_shutup_pins(codec);
167eae5a
TI		 4471
4472 if (spec->eapd_mask)
4473 stac_gpio_set(codec, spec->gpio_mask,
4474 spec->gpio_dir, spec->gpio_data &
4475 ~spec->eapd_mask);
4476}
4477
2f2f4251
M		 4478static void stac92xx_free(struct hda_codec *codec)
4479{
c7d4b2fa 4480 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4481
4482 if (! spec)
4483 return;
4484
167eae5a 4485 stac92xx_shutup(codec);
11b44bbd 4486
c7d4b2fa 4487 kfree(spec);
1cd2224c 4488 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4489}
4490
4e55096e
M		 4491static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4492 unsigned int flag)
4493{
8ce84198
TI		 4494 unsigned int old_ctl, pin_ctl;
4495
4496 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4497 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4498
f9acba43
TI		 4499 if (pin_ctl & AC_PINCTL_IN_EN) {
4500 /*
4501 * we need to check the current set-up direction of
4502 * shared input pins since they can be switched via
4503 * "xxx as Output" mixer switch
4504 */
4505 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4506 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4507 return;
4508 }
4509
8ce84198 4510 old_ctl = pin_ctl;
7b043899
SL		 4511 /* if setting pin direction bits, clear the current
4512 direction bits first */
4513 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4514 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4515
8ce84198
TI		 4516 pin_ctl |= flag;
4517 if (old_ctl != pin_ctl)
cdd03ced 4518 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl);
4e55096e
M		 4519}
4520
4521static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4522 unsigned int flag)
4523{
4524 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4525 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198 4526 if (pin_ctl & flag)
cdd03ced 4527 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl & ~flag);
4e55096e
M		 4528}
4529
d56757ab 4530static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4531{
4532 if (!nid)
4533 return 0;
a252c81a 4534 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4535}
4536
fefd67f3
TI		 4537static void stac92xx_line_out_detect(struct hda_codec *codec,
4538 int presence)
4539{
4540 struct sigmatel_spec *spec = codec->spec;
4541 struct auto_pin_cfg *cfg = &spec->autocfg;
4542 int i;
4543
042b92c1
DH		 4544 if (cfg->speaker_outs == 0)
4545 return;
4546
fefd67f3
TI		 4547 for (i = 0; i < cfg->line_outs; i++) {
4548 if (presence)
4549 break;
4550 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4551 if (presence) {
4552 unsigned int pinctl;
4553 pinctl = snd_hda_codec_read(codec,
4554 cfg->line_out_pins[i], 0,
4555 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4556 if (pinctl & AC_PINCTL_IN_EN)
4557 presence = 0; /* mic- or line-input */
4558 }
4559 }
4560
4561 if (presence) {
4562 /* disable speakers */
4563 for (i = 0; i < cfg->speaker_outs; i++)
4564 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4565 AC_PINCTL_OUT_EN);
4566 if (spec->eapd_mask && spec->eapd_switch)
4567 stac_gpio_set(codec, spec->gpio_mask,
4568 spec->gpio_dir, spec->gpio_data &
4569 ~spec->eapd_mask);
4570 } else {
4571 /* enable speakers */
4572 for (i = 0; i < cfg->speaker_outs; i++)
4573 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4574 AC_PINCTL_OUT_EN);
4575 if (spec->eapd_mask && spec->eapd_switch)
4576 stac_gpio_set(codec, spec->gpio_mask,
4577 spec->gpio_dir, spec->gpio_data |
4578 spec->eapd_mask);
4579 }
4580}
4581
d7a89436
TI		 4582/* return non-zero if the hp-pin of the given array index isn't
4583 * a jack-detection target
4584 */
4585static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4586{
4587 struct auto_pin_cfg *cfg = &spec->autocfg;
4588
4589 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4590 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4591 return 1;
c21ca4a8 4592 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4593 return 1;
4594 /* ignore if the pin is set as line-out */
4595 if (cfg->hp_pins[i] == spec->hp_switch)
4596 return 1;
4597 return 0;
4598}
4599
c6e4c666 4600static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4601{
4602 struct sigmatel_spec *spec = codec->spec;
4603 struct auto_pin_cfg *cfg = &spec->autocfg;
4604 int i, presence;
4605
eb06ed8f 4606 presence = 0;
4fe5195c
MR		 4607 if (spec->gpio_mute)
4608 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4609 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4610
eb06ed8f 4611 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4612 if (presence)
4613 break;
d7a89436
TI		 4614 if (no_hp_sensing(spec, i))
4615 continue;
e6e3ea25
TI		 4616 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4617 if (presence) {
4618 unsigned int pinctl;
4619 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4620 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4621 if (pinctl & AC_PINCTL_IN_EN)
4622 presence = 0; /* mic- or line-input */
4623 }
eb06ed8f 4624 }
4e55096e
M		 4625
4626 if (presence) {
d7a89436 4627 /* disable lineouts */
7c2ba97b 4628 if (spec->hp_switch)
d7a89436
TI		 4629 stac92xx_reset_pinctl(codec, spec->hp_switch,
4630 AC_PINCTL_OUT_EN);
4e55096e
M		 4631 for (i = 0; i < cfg->line_outs; i++)
4632 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4633 AC_PINCTL_OUT_EN);
4e55096e 4634 } else {
d7a89436 4635 /* enable lineouts */
7c2ba97b 4636 if (spec->hp_switch)
d7a89436
TI		 4637 stac92xx_set_pinctl(codec, spec->hp_switch,
4638 AC_PINCTL_OUT_EN);
4e55096e
M		 4639 for (i = 0; i < cfg->line_outs; i++)
4640 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4641 AC_PINCTL_OUT_EN);
4e55096e 4642 }
fefd67f3 4643 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4644 /* toggle hp outs */
4645 for (i = 0; i < cfg->hp_outs; i++) {
4646 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4647 if (no_hp_sensing(spec, i))
4648 continue;
7bff172a 4649 if (1 /*presence*/)
d7a89436 4650 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4651#if 0 /* FIXME */
4652/* Resetting the pinctl like below may lead to (a sort of) regressions
4653 * on some devices since they use the HP pin actually for line/speaker
4654 * outs although the default pin config shows a different pin (that is
4655 * wrong and useless).
4656 *
4657 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4658 * But, disabling the code below just works around it, and I'm too tired of
4659 * bug reports with such devices...
4660 */
d7a89436
TI		 4661 else
4662 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4663#endif /* FIXME */
d7a89436 4664 }
4e55096e
M		 4665}
4666
f73d3585
TI		 4667static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4668 int enable)
a64135a2
MR		 4669{
4670 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4671 unsigned int idx, val;
4672
4673 for (idx = 0; idx < spec->num_pwrs; idx++) {
4674 if (spec->pwr_nids[idx] == nid)
4675 break;
4676 }
4677 if (idx >= spec->num_pwrs)
4678 return;
d0513fc6 4679
afef2cfa 4680 idx = 1 << idx;
a64135a2 4681
c882246d 4682 val = spec->power_map_bits;
f73d3585 4683 if (enable)
a64135a2
MR		 4684 val &= ~idx;
4685 else
4686 val |= idx;
4687
4688 /* power down unused output ports */
c882246d
TI		 4689 if (val != spec->power_map_bits) {
4690 spec->power_map_bits = val;
4691 snd_hda_codec_write(codec, codec->afg, 0,
4692 AC_VERB_IDT_SET_POWER_MAP, val);
4693 }
74aeaabc
MR		 4694}
4695
f73d3585
TI		 4696static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4697{
e6e3ea25 4698 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4699}
a64135a2 4700
ab5a6ebe
VK		 4701/* get the pin connection (fixed, none, etc) */
4702static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4703{
4704 struct sigmatel_spec *spec = codec->spec;
4705 unsigned int cfg;
4706
4707 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4708 return get_defcfg_connect(cfg);
4709}
4710
4711static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4712 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK		 4713{
4714 struct sigmatel_spec *spec = codec->spec;
4715 int idx, num;
4716 unsigned int def_conf;
4717
4718 for (num = 0; num < num_nids; num++) {
4719 for (idx = 0; idx < spec->num_pins; idx++)
4720 if (spec->pin_nids[idx] == nids[num])
4721 break;
4722 if (idx >= spec->num_pins)
4723 break;
4724 def_conf = stac_get_defcfg_connect(codec, idx);
4725 if (def_conf == AC_JACK_PORT_NONE)
4726 break;
4727 }
4728 return num;
4729}
4730
3d21d3f7
TI		 4731static void stac92xx_mic_detect(struct hda_codec *codec)
4732{
4733 struct sigmatel_spec *spec = codec->spec;
4734 struct sigmatel_mic_route *mic;
4735
4736 if (get_pin_presence(codec, spec->ext_mic.pin))
4737 mic = &spec->ext_mic;
9907790a
CC		 4738 else if (get_pin_presence(codec, spec->dock_mic.pin))
4739 mic = &spec->dock_mic;
3d21d3f7
TI		 4740 else
4741 mic = &spec->int_mic;
02d33322 4742 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4743 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4744 AC_VERB_SET_CONNECT_SEL,
4745 mic->dmux_idx);
02d33322 4746 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4747 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4748 AC_VERB_SET_CONNECT_SEL,
4749 mic->mux_idx);
4750}
4751
1835a0f9 4752static void handle_unsol_event(struct hda_codec *codec,
3a93897e 4753 struct hda_jack_tbl *event)
314634bc 4754{
a64135a2 4755 struct sigmatel_spec *spec = codec->spec;
1835a0f9 4756 int data;
c6e4c666 4757
3a93897e 4758 switch (event->action) {
314634bc 4759 case STAC_HP_EVENT:
fefd67f3 4760 case STAC_LO_EVENT:
16ffe32c 4761 stac92xx_hp_detect(codec);
fefd67f3 4762 break;
3d21d3f7
TI		 4763 case STAC_MIC_EVENT:
4764 stac92xx_mic_detect(codec);
4765 break;
4766 }
4767
3a93897e 4768 switch (event->action) {
3d21d3f7 4769 case STAC_HP_EVENT:
fefd67f3 4770 case STAC_LO_EVENT:
3d21d3f7 4771 case STAC_MIC_EVENT:
74aeaabc 4772 case STAC_INSERT_EVENT:
a64135a2 4773 case STAC_PWR_EVENT:
c6e4c666
TI		 4774 if (spec->num_pwrs > 0)
4775 stac92xx_pin_sense(codec, event->nid);
fd60cc89
MR		 4776
4777 switch (codec->subsystem_id) {
4778 case 0x103c308f:
4779 if (event->nid == 0xb) {
4780 int pin = AC_PINCTL_IN_EN;
4781
4782 if (get_pin_presence(codec, 0xa)
4783 && get_pin_presence(codec, 0xb))
4784 pin |= AC_PINCTL_VREF_80;
4785 if (!get_pin_presence(codec, 0xb))
4786 pin |= AC_PINCTL_VREF_80;
4787
4788 /* toggle VREF state based on mic + hp pin
4789 * status
4790 */
4791 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4792 }
4793 }
72474be6 4794 break;
c6e4c666
TI		 4795 case STAC_VREF_EVENT:
4796 data = snd_hda_codec_read(codec, codec->afg, 0,
4797 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4798 /* toggle VREF state based on GPIOx status */
4799 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3a93897e 4800 !!(data & (1 << event->private_data)));
72474be6 4801 break;
314634bc
TI		 4802 }
4803}
4804
1835a0f9
TI		 4805static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
4806{
3a93897e 4807 struct hda_jack_tbl *event = snd_hda_jack_tbl_get(codec, nid);
1835a0f9
TI		 4808 if (!event)
4809 return;
4810 handle_unsol_event(codec, event);
4811}
4812
4813static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4814{
3a93897e 4815 struct hda_jack_tbl *event;
1835a0f9
TI		 4816 int tag;
4817
4818 tag = (res >> 26) & 0x7f;
3a93897e 4819 event = snd_hda_jack_tbl_get_from_tag(codec, tag);
1835a0f9
TI		 4820 if (!event)
4821 return;
3a93897e 4822 event->jack_dirty = 1;
1835a0f9 4823 handle_unsol_event(codec, event);
01a61e12 4824 snd_hda_jack_report_sync(codec);
1835a0f9
TI		 4825}
4826
d38cce70
KG		 4827static int hp_blike_system(u32 subsystem_id);
4828
4829static void set_hp_led_gpio(struct hda_codec *codec)
4830{
4831 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4832 unsigned int gpio;
4833
26ebe0a2
TI		 4834 if (spec->gpio_led)
4835 return;
4836
07f80449
TI		 4837 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4838 gpio &= AC_GPIO_IO_COUNT;
4839 if (gpio > 3)
4840 spec->gpio_led = 0x08; /* GPIO 3 */
4841 else
4842 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4843}
4844
c357aab0
VK		 4845/*
4846 * This method searches for the mute LED GPIO configuration
4847 * provided as OEM string in SMBIOS. The format of that string
4848 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4849 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4850 * that corresponds to the NOT muted state of the master volume
4851 * and G is the index of the GPIO to use as the mute LED control (0..9)
4852 * If _G portion is missing it is assigned based on the codec ID
4853 *
4854 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4855 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4856 *
4857 *
4858 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4859 * SMBIOS - at least the ones I have seen do not have them - which include
4860 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4861 * HP Pavilion dv9500t CTO.
4862 * Need more information on whether it is true across the entire series.
4863 * -- kunal
c357aab0 4864 */
6a557c94 4865static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4866{
4867 struct sigmatel_spec *spec = codec->spec;
4868 const struct dmi_device *dev = NULL;
4869
7560931f
TI		 4870 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
4871 get_int_hint(codec, "gpio_led_polarity",
4872 &spec->gpio_led_polarity);
4873 return 1;
4874 }
c357aab0
VK		 4875 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4876 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4877 NULL, dev))) {
45eebda7 4878 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG		 4879 &spec->gpio_led_polarity,
4880 &spec->gpio_led) == 2) {
f1a73746
TI		 4881 unsigned int max_gpio;
4882 max_gpio = snd_hda_param_read(codec, codec->afg,
4883 AC_PAR_GPIO_CAP);
4884 max_gpio &= AC_GPIO_IO_COUNT;
4885 if (spec->gpio_led < max_gpio)
45eebda7 4886 spec->gpio_led = 1 << spec->gpio_led;
f1a73746
TI		 4887 else
4888 spec->vref_mute_led_nid = spec->gpio_led;
c357aab0
VK		 4889 return 1;
4890 }
4891 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4892 &spec->gpio_led_polarity) == 1) {
4893 set_hp_led_gpio(codec);
4894 return 1;
c357aab0 4895 }
e2ef36c6
GMDV		 4896 /* BIOS bug: unfilled OEM string */
4897 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
4898 set_hp_led_gpio(codec);
a6a600d1
GMDV		 4899 switch (codec->subsystem_id) {
4900 case 0x103c148a:
4901 spec->gpio_led_polarity = 0;
4902 break;
4903 default:
4904 spec->gpio_led_polarity = 1;
4905 break;
4906 }
e2ef36c6
GMDV		 4907 return 1;
4908 }
c357aab0 4909 }
d38cce70
KG		 4910
4911 /*
4912 * Fallback case - if we don't find the DMI strings,
6a557c94
VK		 4913 * we statically set the GPIO - if not a B-series system
4914 * and default polarity is provided
d38cce70 4915 */
6a557c94
VK		 4916 if (!hp_blike_system(codec->subsystem_id) &&
4917 (default_polarity == 0 || default_polarity == 1)) {
d38cce70 4918 set_hp_led_gpio(codec);
dce17d4f 4919 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4920 return 1;
4921 }
c357aab0
VK		 4922 }
4923 return 0;
4924}
4925
4926static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4927{
4928 switch (subsystem_id) {
c357aab0
VK		 4929 case 0x103c1520:
4930 case 0x103c1521:
4931 case 0x103c1523:
4932 case 0x103c1524:
4933 case 0x103c1525:
78987bdc
RD		 4934 case 0x103c1722:
4935 case 0x103c1723:
4936 case 0x103c1724:
4937 case 0x103c1725:
4938 case 0x103c1726:
4939 case 0x103c1727:
4940 case 0x103c1728:
4941 case 0x103c1729:
c357aab0
VK		 4942 case 0x103c172a:
4943 case 0x103c172b:
4944 case 0x103c307e:
4945 case 0x103c307f:
4946 case 0x103c3080:
4947 case 0x103c3081:
4948 case 0x103c7007:
4949 case 0x103c7008:
78987bdc
RD		 4950 return 1;
4951 }
4952 return 0;
4953}
4954
2d34e1b3
TI		 4955#ifdef CONFIG_PROC_FS
4956static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4957 struct hda_codec *codec, hda_nid_t nid)
4958{
4959 if (nid == codec->afg)
4960 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 4961 snd_hda_codec_read(codec, nid, 0,
4962 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 4963}
4964
4965static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4966 struct hda_codec *codec,
4967 unsigned int verb)
4968{
4969 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4970 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4971}
4972
4973/* stac92hd71bxx, stac92hd73xx */
4974static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4975 struct hda_codec *codec, hda_nid_t nid)
4976{
4977 stac92hd_proc_hook(buffer, codec, nid);
4978 if (nid == codec->afg)
4979 analog_loop_proc_hook(buffer, codec, 0xfa0);
4980}
4981
4982static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4983 struct hda_codec *codec, hda_nid_t nid)
4984{
4985 if (nid == codec->afg)
4986 analog_loop_proc_hook(buffer, codec, 0xfe0);
4987}
4988
4989static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4990 struct hda_codec *codec, hda_nid_t nid)
4991{
4992 if (nid == codec->afg)
4993 analog_loop_proc_hook(buffer, codec, 0xfeb);
4994}
4995#else
4996#define stac92hd_proc_hook NULL
4997#define stac92hd7x_proc_hook NULL
4998#define stac9205_proc_hook NULL
4999#define stac927x_proc_hook NULL
5000#endif
5001
2a43952a 5002#ifdef CONFIG_PM
ff6fdc37
M		 5003static int stac92xx_resume(struct hda_codec *codec)
5004{
2c885878 5005 stac92xx_init(codec);
82beb8fd
TI		 5006 snd_hda_codec_resume_amp(codec);
5007 snd_hda_codec_resume_cache(codec);
2c885878 5008 /* fake event to set up pins again to override cached values */
f2cbba76 5009 stac_fake_hp_events(codec);
ff6fdc37
M		 5010 return 0;
5011}
c6798d2b 5012
68cb2b55 5013static int stac92xx_suspend(struct hda_codec *codec)
45eebda7
VK		 5014{
5015 stac92xx_shutup(codec);
5016 return 0;
5017}
5018
45eebda7
VK		 5019static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5020 unsigned int power_state)
5021{
5022 unsigned int afg_power_state = power_state;
5023 struct sigmatel_spec *spec = codec->spec;
5024
5025 if (power_state == AC_PWRST_D3) {
f1a73746 5026 if (spec->vref_mute_led_nid) {
45eebda7
VK		 5027 /* with vref-out pin used for mute led control
5028 * codec AFG is prevented from D3 state
5029 */
5030 afg_power_state = AC_PWRST_D1;
5031 }
5032 /* this delay seems necessary to avoid click noise at power-down */
5033 msleep(100);
5034 }
5035 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5036 afg_power_state);
5037 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5038}
350eba43
TI		 5039#else
5040#define stac92xx_suspend NULL
5041#define stac92xx_resume NULL
350eba43 5042#define stac92xx_set_power_state NULL
2faa3bf1 5043#endif /* CONFIG_PM */
45eebda7 5044
2faa3bf1
TI		 5045/* update mute-LED accoring to the master switch */
5046static void stac92xx_update_led_status(struct hda_codec *codec, int enabled)
ae6241fb
CP		 5047{
5048 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 5049 int muted = !enabled;
6fce61ae 5050
45eebda7 5051 if (!spec->gpio_led)
2faa3bf1
TI		 5052 return;
5053
5054 /* LED state is inverted on these systems */
5055 if (spec->gpio_led_polarity)
5056 muted = !muted;
45eebda7 5057
f1a73746 5058 if (!spec->vref_mute_led_nid) {
45eebda7 5059 if (muted)
3e843196 5060 spec->gpio_data |= spec->gpio_led;
45eebda7 5061 else
3e843196 5062 spec->gpio_data &= ~spec->gpio_led;
45eebda7
VK		 5063 stac_gpio_set(codec, spec->gpio_mask,
5064 spec->gpio_dir, spec->gpio_data);
5065 } else {
2faa3bf1 5066 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
f1a73746
TI		 5067 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5068 spec->vref_led);
c21bd025 5069 }
b4e81876 5070}
7df1ce1a 5071
2b63536f 5072static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M		 5073 .build_controls = stac92xx_build_controls,
5074 .build_pcms = stac92xx_build_pcms,
5075 .init = stac92xx_init,
5076 .free = stac92xx_free,
4e55096e 5077 .unsol_event = stac92xx_unsol_event,
2a43952a 5078#ifdef CONFIG_PM
c6798d2b 5079 .suspend = stac92xx_suspend,
ff6fdc37
M		 5080 .resume = stac92xx_resume,
5081#endif
fb8d1a34 5082 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5083};
5084
5085static int patch_stac9200(struct hda_codec *codec)
5086{
5087 struct sigmatel_spec *spec;
c7d4b2fa 5088 int err;
2f2f4251 5089
e560d8d8 5090 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5091 if (spec == NULL)
5092 return -ENOMEM;
5093
a252c81a 5094 codec->no_trigger_sense = 1;
2f2f4251 5095 codec->spec = spec;
1b0e372d 5096 spec->linear_tone_beep = 1;
a4eed138 5097 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5098 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5099 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5100 stac9200_models,
5101 stac9200_cfg_tbl);
330ee995 5102 if (spec->board_config < 0)
9a11f1aa
TI		 5103 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5104 codec->chip_name);
330ee995
TI		 5105 else
5106 stac92xx_set_config_regs(codec,
af9f341a 5107 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5108
5109 spec->multiout.max_channels = 2;
5110 spec->multiout.num_dacs = 1;
5111 spec->multiout.dac_nids = stac9200_dac_nids;
5112 spec->adc_nids = stac9200_adc_nids;
5113 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5114 spec->num_muxes = 1;
8b65727b 5115 spec->num_dmics = 0;
9e05b7a3 5116 spec->num_adcs = 1;
a64135a2 5117 spec->num_pwrs = 0;
c7d4b2fa 5118
58eec423
MCC		 5119 if (spec->board_config == STAC_9200_M4 ||
5120 spec->board_config == STAC_9200_M4_2 ||
bf277785 5121 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5122 spec->init = stac9200_eapd_init;
5123 else
5124 spec->init = stac9200_core_init;
2f2f4251 5125 spec->mixer = stac9200_mixer;
c7d4b2fa 5126
117f257d
TI		 5127 if (spec->board_config == STAC_9200_PANASONIC) {
5128 spec->gpio_mask = spec->gpio_dir = 0x09;
5129 spec->gpio_data = 0x00;
5130 }
5131
c7d4b2fa
M		 5132 err = stac9200_parse_auto_config(codec);
5133 if (err < 0) {
5134 stac92xx_free(codec);
5135 return err;
5136 }
2f2f4251 5137
2acc9dcb
TI		 5138 /* CF-74 has no headphone detection, and the driver should *NOT*
5139 * do detection and HP/speaker toggle because the hardware does it.
5140 */
5141 if (spec->board_config == STAC_9200_PANASONIC)
5142 spec->hp_detect = 0;
5143
2f2f4251
M		 5144 codec->patch_ops = stac92xx_patch_ops;
5145
5146 return 0;
5147}
5148
8e21c34c
TD		 5149static int patch_stac925x(struct hda_codec *codec)
5150{
5151 struct sigmatel_spec *spec;
5152 int err;
5153
5154 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5155 if (spec == NULL)
5156 return -ENOMEM;
5157
a252c81a 5158 codec->no_trigger_sense = 1;
8e21c34c 5159 codec->spec = spec;
1b0e372d 5160 spec->linear_tone_beep = 1;
a4eed138 5161 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5162 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5163
5164 /* Check first for codec ID */
5165 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5166 STAC_925x_MODELS,
5167 stac925x_models,
5168 stac925x_codec_id_cfg_tbl);
5169
5170 /* Now checks for PCI ID, if codec ID is not found */
5171 if (spec->board_config < 0)
5172 spec->board_config = snd_hda_check_board_config(codec,
5173 STAC_925x_MODELS,
8e21c34c
TD		 5174 stac925x_models,
5175 stac925x_cfg_tbl);
9e507abd 5176 again:
330ee995 5177 if (spec->board_config < 0)
9a11f1aa
TI		 5178 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5179 codec->chip_name);
330ee995
TI		 5180 else
5181 stac92xx_set_config_regs(codec,
af9f341a 5182 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5183
5184 spec->multiout.max_channels = 2;
5185 spec->multiout.num_dacs = 1;
5186 spec->multiout.dac_nids = stac925x_dac_nids;
5187 spec->adc_nids = stac925x_adc_nids;
5188 spec->mux_nids = stac925x_mux_nids;
5189 spec->num_muxes = 1;
9e05b7a3 5190 spec->num_adcs = 1;
a64135a2 5191 spec->num_pwrs = 0;
2c11f955
TD		 5192 switch (codec->vendor_id) {
5193 case 0x83847632: /* STAC9202 */
5194 case 0x83847633: /* STAC9202D */
5195 case 0x83847636: /* STAC9251 */
5196 case 0x83847637: /* STAC9251D */
f6e9852a 5197 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5198 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5199 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5200 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5201 break;
5202 default:
5203 spec->num_dmics = 0;
5204 break;
5205 }
8e21c34c
TD		 5206
5207 spec->init = stac925x_core_init;
5208 spec->mixer = stac925x_mixer;
6479c631
TI		 5209 spec->num_caps = 1;
5210 spec->capvols = stac925x_capvols;
5211 spec->capsws = stac925x_capsws;
8e21c34c 5212
9009b0e4 5213 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 5214 if (!err) {
5215 if (spec->board_config < 0) {
5216 printk(KERN_WARNING "hda_codec: No auto-config is "
5217 "available, default to model=ref\n");
5218 spec->board_config = STAC_925x_REF;
5219 goto again;
5220 }
5221 err = -EINVAL;
5222 }
8e21c34c
TD		 5223 if (err < 0) {
5224 stac92xx_free(codec);
5225 return err;
5226 }
5227
5228 codec->patch_ops = stac92xx_patch_ops;
5229
5230 return 0;
5231}
5232
e1f0d669
MR		 5233static int patch_stac92hd73xx(struct hda_codec *codec)
5234{
5235 struct sigmatel_spec *spec;
5236 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5237 int err = 0;
c21ca4a8 5238 int num_dacs;
e1f0d669
MR		 5239
5240 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5241 if (spec == NULL)
5242 return -ENOMEM;
5243
a252c81a 5244 codec->no_trigger_sense = 1;
e1f0d669 5245 codec->spec = spec;
1b0e372d 5246 spec->linear_tone_beep = 0;
e99d32b3 5247 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5248 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5249 spec->pin_nids = stac92hd73xx_pin_nids;
5250 spec->board_config = snd_hda_check_board_config(codec,
5251 STAC_92HD73XX_MODELS,
5252 stac92hd73xx_models,
5253 stac92hd73xx_cfg_tbl);
842ae638
TI		 5254 /* check codec subsystem id if not found */
5255 if (spec->board_config < 0)
5256 spec->board_config =
5257 snd_hda_check_board_codec_sid_config(codec,
5258 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5259 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5260again:
330ee995 5261 if (spec->board_config < 0)
9a11f1aa
TI		 5262 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5263 codec->chip_name);
330ee995
TI		 5264 else
5265 stac92xx_set_config_regs(codec,
af9f341a 5266 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5267
c21ca4a8 5268 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5269 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5270
c21ca4a8 5271 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5272 printk(KERN_WARNING "hda_codec: Could not determine "
5273 "number of channels defaulting to DAC count\n");
c21ca4a8 5274 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5275 }
e2aec171 5276 spec->init = stac92hd73xx_core_init;
c21ca4a8 5277 switch (num_dacs) {
e1f0d669 5278 case 0x3: /* 6 Channel */
d78d7a90 5279 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5280 break;
5281 case 0x4: /* 8 Channel */
d78d7a90 5282 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5283 break;
5284 case 0x5: /* 10 Channel */
d78d7a90
TI		 5285 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5286 break;
c21ca4a8
TI		 5287 }
5288 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5289
e1f0d669
MR		 5290 spec->aloopback_mask = 0x01;
5291 spec->aloopback_shift = 8;
5292
1cd2224c 5293 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5294 spec->mux_nids = stac92hd73xx_mux_nids;
5295 spec->adc_nids = stac92hd73xx_adc_nids;
5296 spec->dmic_nids = stac92hd73xx_dmic_nids;
5297 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5298 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5299
5300 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5301 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5302 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5303
6479c631
TI		 5304 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5305 spec->capvols = stac92hd73xx_capvols;
5306 spec->capsws = stac92hd73xx_capsws;
5307
a7662640 5308 switch (spec->board_config) {
6b3ab21e 5309 case STAC_DELL_EQ:
d654a660 5310 spec->init = dell_eq_core_init;
6b3ab21e 5311 /* fallthru */
661cd8fb
TI		 5312 case STAC_DELL_M6_AMIC:
5313 case STAC_DELL_M6_DMIC:
5314 case STAC_DELL_M6_BOTH:
2a9c7816 5315 spec->num_smuxes = 0;
c0cea0d0 5316 spec->eapd_switch = 0;
6b3ab21e 5317
661cd8fb
TI		 5318 switch (spec->board_config) {
5319 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5320 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5321 spec->num_dmics = 0;
5322 break;
661cd8fb 5323 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5324 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5325 spec->num_dmics = 1;
5326 break;
661cd8fb 5327 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5328 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5329 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5330 spec->num_dmics = 1;
5331 break;
5332 }
5333 break;
842ae638
TI		 5334 case STAC_ALIENWARE_M17X:
5335 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5336 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5337 spec->eapd_switch = 0;
5338 break;
a7662640
MR		 5339 default:
5340 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5341 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5342 spec->eapd_switch = 1;
5207e10e 5343 break;
a7662640 5344 }
af6ee302 5345 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5346 /* GPIO0 High = Enable EAPD */
5347 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5348 spec->gpio_data = 0x01;
5349 }
a7662640 5350
a64135a2
MR		 5351 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5352 spec->pwr_nids = stac92hd73xx_pwr_nids;
5353
9009b0e4 5354 err = stac92xx_parse_auto_config(codec);
e1f0d669
MR		 5355
5356 if (!err) {
5357 if (spec->board_config < 0) {
5358 printk(KERN_WARNING "hda_codec: No auto-config is "
5359 "available, default to model=ref\n");
5360 spec->board_config = STAC_92HD73XX_REF;
5361 goto again;
5362 }
5363 err = -EINVAL;
5364 }
5365
5366 if (err < 0) {
5367 stac92xx_free(codec);
5368 return err;
5369 }
5370
9e43f0de
TI		 5371 if (spec->board_config == STAC_92HD73XX_NO_JD)
5372 spec->hp_detect = 0;
5373
e1f0d669
MR		 5374 codec->patch_ops = stac92xx_patch_ops;
5375
2d34e1b3
TI		 5376 codec->proc_widget_hook = stac92hd7x_proc_hook;
5377
e1f0d669
MR		 5378 return 0;
5379}
5380
cbbf50b2 5381static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5382{
5383 if (codec->vendor_id != 0x111d7605 &&
5384 codec->vendor_id != 0x111d76d1)
5385 return 0;
5386
5387 switch (codec->subsystem_id) {
5388 case 0x103c1618:
5389 case 0x103c1619:
5390 case 0x103c161a:
5391 case 0x103c161b:
5392 case 0x103c161c:
5393 case 0x103c161d:
5394 case 0x103c161e:
5395 case 0x103c161f:
335e3b86
VK		 5396
5397 case 0x103c162a:
5398 case 0x103c162b:
5399
5400 case 0x103c1630:
5401 case 0x103c1631:
5402
5403 case 0x103c1633:
cbbf50b2 5404 case 0x103c1634:
335e3b86
VK		 5405 case 0x103c1635:
5406
335e3b86
VK		 5407 case 0x103c3587:
5408 case 0x103c3588:
5409 case 0x103c3589:
5410 case 0x103c358a:
5411
5412 case 0x103c3667:
5413 case 0x103c3668:
cbbf50b2
VK		 5414 case 0x103c3669:
5415
5416 return 1;
335e3b86
VK		 5417 }
5418 return 0;
5419}
5420
699d8995
VK		 5421static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5422{
5423 struct sigmatel_spec *spec = codec->spec;
5424 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5425 int i;
5426
5427 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5428 spec->auto_pin_cnt++;
5429
5430 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5431 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5432 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5433 if (nid == stac92hd83xxx_dmic_nids[i]) {
5434 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5435 spec->auto_dmic_cnt++;
5436 }
5437 }
5438 }
5439}
5440
5441static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5442{
5443 struct sigmatel_spec *spec = codec->spec;
5444
5445 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5446 spec->auto_adc_cnt++;
5447}
5448
5449static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5450{
5451 int i, j;
5452 struct sigmatel_spec *spec = codec->spec;
5453
5454 for (i = 0; i < spec->auto_adc_cnt; i++) {
5455 if (get_connection_index(codec,
5456 spec->auto_adc_nids[i], nid) >= 0) {
5457 /* mux and volume for adc_nids[i] */
5458 if (!spec->auto_mux_nids[i]) {
5459 spec->auto_mux_nids[i] = nid;
5460 /* 92hd codecs capture volume is in mux */
5461 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5462 3, 0, HDA_OUTPUT);
5463 }
5464 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5465 if (get_connection_index(codec, nid,
5466 spec->auto_dmic_nids[j]) >= 0) {
5467 /* dmux for adc_nids[i] */
5468 if (!spec->auto_dmux_nids[i])
5469 spec->auto_dmux_nids[i] = nid;
5470 break;
5471 }
5472 }
5473 break;
5474 }
5475 }
5476}
5477
5478static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5479{
5480 hda_nid_t nid, end_nid;
5481 unsigned int wid_caps, wid_type;
5482 struct sigmatel_spec *spec = codec->spec;
5483
5484 end_nid = codec->start_nid + codec->num_nodes;
5485
5486 for (nid = codec->start_nid; nid < end_nid; nid++) {
5487 wid_caps = get_wcaps(codec, nid);
5488 wid_type = get_wcaps_type(wid_caps);
5489
5490 if (wid_type == AC_WID_PIN)
5491 stac92hd8x_add_pin(codec, nid);
5492
5493 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5494 stac92hd8x_add_adc(codec, nid);
5495 }
5496
5497 for (nid = codec->start_nid; nid < end_nid; nid++) {
5498 wid_caps = get_wcaps(codec, nid);
5499 wid_type = get_wcaps_type(wid_caps);
5500
5501 if (wid_type == AC_WID_AUD_SEL)
5502 stac92hd8x_add_mux(codec, nid);
5503 }
5504
5505 spec->pin_nids = spec->auto_pin_nids;
5506 spec->num_pins = spec->auto_pin_cnt;
5507 spec->adc_nids = spec->auto_adc_nids;
5508 spec->num_adcs = spec->auto_adc_cnt;
5509 spec->capvols = spec->auto_capvols;
5510 spec->capsws = spec->auto_capvols;
5511 spec->num_caps = spec->auto_adc_cnt;
5512 spec->mux_nids = spec->auto_mux_nids;
5513 spec->num_muxes = spec->auto_adc_cnt;
5514 spec->dmux_nids = spec->auto_dmux_nids;
5515 spec->num_dmuxes = spec->auto_adc_cnt;
5516 spec->dmic_nids = spec->auto_dmic_nids;
5517 spec->num_dmics = spec->auto_dmic_cnt;
5518}
5519
d0513fc6
MR		 5520static int patch_stac92hd83xxx(struct hda_codec *codec)
5521{
5522 struct sigmatel_spec *spec;
a3e19973 5523 int default_polarity = -1; /* no default cfg */
d0513fc6
MR		 5524 int err;
5525
5526 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5527 if (spec == NULL)
5528 return -ENOMEM;
5529
cbbf50b2
VK		 5530 if (hp_bnb2011_with_dock(codec)) {
5531 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5532 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5533 }
5534
c36b5b05 5535 codec->epss = 0; /* longer delay needed for D3 */
a252c81a 5536 codec->no_trigger_sense = 1;
d0513fc6 5537 codec->spec = spec;
699d8995
VK		 5538
5539 stac92hd8x_fill_auto_spec(codec);
5540
1db7ccdb 5541 spec->linear_tone_beep = 0;
0ffa9807 5542 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5543 spec->digbeep_nid = 0x21;
d0513fc6 5544 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 5545 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5546 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5547 spec->init = stac92hd83xxx_core_init;
6479c631 5548
d0513fc6
MR		 5549 spec->board_config = snd_hda_check_board_config(codec,
5550 STAC_92HD83XXX_MODELS,
5551 stac92hd83xxx_models,
5552 stac92hd83xxx_cfg_tbl);
5556e147
VK		 5553 /* check codec subsystem id if not found */
5554 if (spec->board_config < 0)
5555 spec->board_config =
5556 snd_hda_check_board_codec_sid_config(codec,
5557 STAC_92HD83XXX_MODELS, stac92hd83xxx_models,
5558 stac92hd83xxx_codec_id_cfg_tbl);
d0513fc6 5559again:
330ee995 5560 if (spec->board_config < 0)
9a11f1aa
TI		 5561 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5562 codec->chip_name);
330ee995
TI		 5563 else
5564 stac92xx_set_config_regs(codec,
af9f341a 5565 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5566
b4e81876
TI		 5567 codec->patch_ops = stac92xx_patch_ops;
5568
5556e147
VK		 5569 switch (spec->board_config) {
5570 case STAC_HP_ZEPHYR:
5571 spec->init = stac92hd83xxx_hp_zephyr_init;
5572 break;
a3e19973 5573 case STAC_92HD83XXX_HP_LED:
ff8a1e27
TI		 5574 default_polarity = 0;
5575 break;
5576 case STAC_92HD83XXX_HP_INV_LED:
a3e19973
TI		 5577 default_polarity = 1;
5578 break;
5556e147
VK		 5579 }
5580
a3e19973 5581 if (find_mute_led_cfg(codec, default_polarity))
e108c7b7
VK		 5582 snd_printd("mute LED gpio %d polarity %d\n",
5583 spec->gpio_led,
5584 spec->gpio_led_polarity);
5585
b4e81876 5586 if (spec->gpio_led) {
f1a73746 5587 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5588 spec->gpio_mask |= spec->gpio_led;
5589 spec->gpio_dir |= spec->gpio_led;
5590 spec->gpio_data |= spec->gpio_led;
5591 } else {
5592 codec->patch_ops.set_power_state =
5593 stac92xx_set_power_state;
45eebda7 5594 }
b4e81876 5595 }
b4e81876 5596
9009b0e4 5597 err = stac92xx_parse_auto_config(codec);
d0513fc6
MR		 5598 if (!err) {
5599 if (spec->board_config < 0) {
5600 printk(KERN_WARNING "hda_codec: No auto-config is "
5601 "available, default to model=ref\n");
5602 spec->board_config = STAC_92HD83XXX_REF;
5603 goto again;
5604 }
5605 err = -EINVAL;
5606 }
5607
5608 if (err < 0) {
5609 stac92xx_free(codec);
5610 return err;
5611 }
5612
2d34e1b3
TI		 5613 codec->proc_widget_hook = stac92hd_proc_hook;
5614
d0513fc6
MR		 5615 return 0;
5616}
5617
6df703ae
HRK		 5618static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5619 hda_nid_t dig0pin)
5620{
5621 struct sigmatel_spec *spec = codec->spec;
5622 int idx;
5623
5624 for (idx = 0; idx < spec->num_pins; idx++)
5625 if (spec->pin_nids[idx] == dig0pin)
5626 break;
5627 if ((idx + 2) >= spec->num_pins)
5628 return 0;
5629
5630 /* dig1pin case */
330ee995 5631 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5632 return 2;
5633
5634 /* dig0pin + dig2pin case */
330ee995 5635 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5636 return 2;
330ee995 5637 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5638 return 1;
5639 else
5640 return 0;
5641}
5642
75d1aeb9
TI		 5643/* HP dv7 bass switch - GPIO5 */
5644#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5645static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5646 struct snd_ctl_elem_value *ucontrol)
5647{
5648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5649 struct sigmatel_spec *spec = codec->spec;
5650 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5651 return 0;
5652}
5653
5654static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5655 struct snd_ctl_elem_value *ucontrol)
5656{
5657 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5658 struct sigmatel_spec *spec = codec->spec;
5659 unsigned int gpio_data;
5660
5661 gpio_data = (spec->gpio_data & ~0x20) |
5662 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5663 if (gpio_data == spec->gpio_data)
5664 return 0;
5665 spec->gpio_data = gpio_data;
5666 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5667 return 1;
5668}
5669
2b63536f 5670static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI		 5671 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5672 .info = stac_hp_bass_gpio_info,
5673 .get = stac_hp_bass_gpio_get,
5674 .put = stac_hp_bass_gpio_put,
5675};
5676
5677static int stac_add_hp_bass_switch(struct hda_codec *codec)
5678{
5679 struct sigmatel_spec *spec = codec->spec;
5680
5681 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5682 "Bass Speaker Playback Switch", 0))
5683 return -ENOMEM;
5684
5685 spec->gpio_mask |= 0x20;
5686 spec->gpio_dir |= 0x20;
5687 spec->gpio_data |= 0x20;
5688 return 0;
5689}
5690
e035b841
MR		 5691static int patch_stac92hd71bxx(struct hda_codec *codec)
5692{
5693 struct sigmatel_spec *spec;
2b63536f 5694 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5695 unsigned int pin_cfg;
e035b841
MR		 5696 int err = 0;
5697
5698 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5699 if (spec == NULL)
5700 return -ENOMEM;
5701
a252c81a 5702 codec->no_trigger_sense = 1;
e035b841 5703 codec->spec = spec;
1b0e372d 5704 spec->linear_tone_beep = 0;
8daaaa97 5705 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5706 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5707 switch (codec->vendor_id) {
5708 case 0x111d76b6:
5709 case 0x111d76b7:
5710 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5711 break;
5712 case 0x111d7603:
5713 case 0x111d7608:
5714 /* On 92HD75Bx 0x27 isn't a pin nid */
5715 spec->num_pins--;
5716 /* fallthrough */
5717 default:
5718 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5719 }
aafc4412 5720 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5721 spec->board_config = snd_hda_check_board_config(codec,
5722 STAC_92HD71BXX_MODELS,
5723 stac92hd71bxx_models,
5724 stac92hd71bxx_cfg_tbl);
5725again:
330ee995 5726 if (spec->board_config < 0)
9a11f1aa
TI		 5727 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5728 codec->chip_name);
330ee995
TI		 5729 else
5730 stac92xx_set_config_regs(codec,
af9f341a 5731 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5732
fc64b26c 5733 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5734 /* GPIO0 = EAPD */
5735 spec->gpio_mask = 0x01;
5736 spec->gpio_dir = 0x01;
5737 spec->gpio_data = 0x01;
5738 }
5739
6df703ae
HRK		 5740 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5741 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5742
6479c631
TI		 5743 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5744 spec->capvols = stac92hd71bxx_capvols;
5745 spec->capsws = stac92hd71bxx_capsws;
5746
541eee87
MR		 5747 switch (codec->vendor_id) {
5748 case 0x111d76b6: /* 4 Port without Analog Mixer */
5749 case 0x111d76b7:
23c7b521
HRK		 5750 unmute_init++;
5751 /* fallthru */
541eee87
MR		 5752 case 0x111d76b4: /* 6 Port without Analog Mixer */
5753 case 0x111d76b5:
0ffa9807 5754 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5755 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5756 stac92hd71bxx_dmic_nids,
5757 STAC92HD71BXX_NUM_DMICS);
541eee87 5758 break;
aafc4412 5759 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5760 switch (spec->board_config) {
5761 case STAC_HP_M4:
72474be6 5762 /* Enable VREF power saving on GPIO1 detect */
3a93897e 5763 err = stac_add_event(codec, codec->afg,
c6e4c666
TI		 5764 STAC_VREF_EVENT, 0x02);
5765 if (err < 0)
5766 return err;
c5d08bb5 5767 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6 5768 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3a93897e 5769 snd_hda_jack_detect_enable(codec, codec->afg, 0);
72474be6
MR		 5770 spec->gpio_mask |= 0x02;
5771 break;
5772 }
8daaaa97 5773 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5774 (codec->revision_id & 0xf) == 1)
8daaaa97 5775 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5776
aafc4412 5777 /* disable VSW */
ca8d33fc 5778 unmute_init++;
330ee995
TI		 5779 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5780 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 5781 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 5782 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 5783 stac92hd71bxx_dmic_5port_nids,
6df703ae 5784 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5785 break;
5786 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5787 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5788 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5789
aafc4412 5790 /* fallthru */
541eee87 5791 default:
0ffa9807 5792 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5793 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5794 stac92hd71bxx_dmic_nids,
5795 STAC92HD71BXX_NUM_DMICS);
5207e10e 5796 break;
541eee87
MR		 5797 }
5798
5e68fb3c
DH		 5799 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
5800 spec->init = stac92hd71bxx_core_init;
5801
ca8d33fc
MR		 5802 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5803 snd_hda_sequence_write_cache(codec, unmute_init);
5804
d78d7a90 5805 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5806 spec->aloopback_mask = 0x50;
541eee87
MR		 5807 spec->aloopback_shift = 0;
5808
8daaaa97 5809 spec->powerdown_adcs = 1;
1cd2224c 5810 spec->digbeep_nid = 0x26;
e035b841
MR		 5811 spec->mux_nids = stac92hd71bxx_mux_nids;
5812 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5813 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5814 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5815
5816 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5817 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5818 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5819 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5820
d38cce70
KG		 5821 snd_printdd("Found board config: %d\n", spec->board_config);
5822
6a14f585
MR		 5823 switch (spec->board_config) {
5824 case STAC_HP_M4:
6a14f585 5825 /* enable internal microphone */
330ee995 5826 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5827 stac92xx_auto_set_pinctl(codec, 0x0e,
5828 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5829 /* fallthru */
5830 case STAC_DELL_M4_2:
5831 spec->num_dmics = 0;
5832 spec->num_smuxes = 0;
5833 spec->num_dmuxes = 0;
5834 break;
5835 case STAC_DELL_M4_1:
5836 case STAC_DELL_M4_3:
5837 spec->num_dmics = 1;
5838 spec->num_smuxes = 0;
ea18aa46 5839 spec->num_dmuxes = 1;
6a14f585 5840 break;
514bf54c
JG		 5841 case STAC_HP_DV4_1222NR:
5842 spec->num_dmics = 1;
5843 /* I don't know if it needs 1 or 2 smuxes - will wait for
5844 * bug reports to fix if needed
5845 */
5846 spec->num_smuxes = 1;
5847 spec->num_dmuxes = 1;
514bf54c 5848 /* fallthrough */
2a6ce6e5
TI		 5849 case STAC_HP_DV4:
5850 spec->gpio_led = 0x01;
5851 /* fallthrough */
e2ea57a8 5852 case STAC_HP_DV5:
330ee995 5853 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5854 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5855 /* HP dv6 gives the headphone pin as a line-out. Thus we
5856 * need to set hp_detect flag here to force to enable HP
5857 * detection.
5858 */
5859 spec->hp_detect = 1;
e2ea57a8 5860 break;
ae6241fb
CP		 5861 case STAC_HP_HDX:
5862 spec->num_dmics = 1;
5863 spec->num_dmuxes = 1;
5864 spec->num_smuxes = 1;
26ebe0a2 5865 spec->gpio_led = 0x08;
86d190e7
TI		 5866 break;
5867 }
443e26d0 5868
c357aab0 5869 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5870 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5871 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5872 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5873 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5874 /* It was changed in the BIOS to just satisfy MS DTM.
5875 * Lets turn it back into slaved HP
5876 */
5877 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5878 | (AC_JACK_HP_OUT <<
5879 AC_DEFCFG_DEVICE_SHIFT);
5880 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5881 | AC_DEFCFG_SEQUENCE)))
5882 | 0x1f;
5883 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5884 }
5885 }
5886
6a557c94 5887 if (find_mute_led_cfg(codec, 1))
c357aab0
VK		 5888 snd_printd("mute LED gpio %d polarity %d\n",
5889 spec->gpio_led,
5890 spec->gpio_led_polarity);
5bdaaada 5891
86d190e7 5892 if (spec->gpio_led) {
f1a73746 5893 if (!spec->vref_mute_led_nid) {
45eebda7
VK		 5894 spec->gpio_mask |= spec->gpio_led;
5895 spec->gpio_dir |= spec->gpio_led;
5896 spec->gpio_data |= spec->gpio_led;
5897 } else {
5898 codec->patch_ops.set_power_state =
5899 stac92xx_set_power_state;
45eebda7 5900 }
86d190e7 5901 }
6a14f585 5902
c21ca4a8 5903 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5904
9009b0e4 5905 err = stac92xx_parse_auto_config(codec);
e035b841
MR		 5906 if (!err) {
5907 if (spec->board_config < 0) {
5908 printk(KERN_WARNING "hda_codec: No auto-config is "
5909 "available, default to model=ref\n");
5910 spec->board_config = STAC_92HD71BXX_REF;
5911 goto again;
5912 }
5913 err = -EINVAL;
5914 }
5915
5916 if (err < 0) {
5917 stac92xx_free(codec);
5918 return err;
5919 }
5920
75d1aeb9 5921 /* enable bass on HP dv7 */
2a6ce6e5
TI		 5922 if (spec->board_config == STAC_HP_DV4 ||
5923 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 5924 unsigned int cap;
5925 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
5926 cap &= AC_GPIO_IO_COUNT;
5927 if (cap >= 6)
5928 stac_add_hp_bass_switch(codec);
5929 }
5930
2d34e1b3
TI		 5931 codec->proc_widget_hook = stac92hd7x_proc_hook;
5932
e035b841 5933 return 0;
86d190e7 5934}
e035b841 5935
2f2f4251
M		 5936static int patch_stac922x(struct hda_codec *codec)
5937{
5938 struct sigmatel_spec *spec;
c7d4b2fa 5939 int err;
2f2f4251 5940
e560d8d8 5941 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5942 if (spec == NULL)
5943 return -ENOMEM;
5944
a252c81a 5945 codec->no_trigger_sense = 1;
2f2f4251 5946 codec->spec = spec;
1b0e372d 5947 spec->linear_tone_beep = 1;
a4eed138 5948 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5949 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5950 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5951 stac922x_models,
5952 stac922x_cfg_tbl);
536319af 5953 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5954 spec->gpio_mask = spec->gpio_dir = 0x03;
5955 spec->gpio_data = 0x03;
3fc24d85
TI		 5956 /* Intel Macs have all same PCI SSID, so we need to check
5957 * codec SSID to distinguish the exact models
5958 */
6f0778d8 5959 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5960 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5961
5962 case 0x106b0800:
5963 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5964 break;
5d5d3bc3
IZ		 5965 case 0x106b0600:
5966 case 0x106b0700:
5967 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5968 break;
5d5d3bc3
IZ		 5969 case 0x106b0e00:
5970 case 0x106b0f00:
5971 case 0x106b1600:
5972 case 0x106b1700:
5973 case 0x106b0200:
5974 case 0x106b1e00:
5975 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5976 break;
5d5d3bc3
IZ		 5977 case 0x106b1a00:
5978 case 0x00000100:
5979 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5980 break;
5d5d3bc3
IZ		 5981 case 0x106b0a00:
5982 case 0x106b2200:
5983 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5984 break;
536319af
NB		 5985 default:
5986 spec->board_config = STAC_INTEL_MAC_V3;
5987 break;
3fc24d85
TI		 5988 }
5989 }
5990
9e507abd 5991 again:
330ee995 5992 if (spec->board_config < 0)
9a11f1aa
TI		 5993 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5994 codec->chip_name);
330ee995
TI		 5995 else
5996 stac92xx_set_config_regs(codec,
af9f341a 5997 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5998
c7d4b2fa
M		 5999 spec->adc_nids = stac922x_adc_nids;
6000 spec->mux_nids = stac922x_mux_nids;
2549413e 6001 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6002 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6003 spec->num_dmics = 0;
a64135a2 6004 spec->num_pwrs = 0;
c7d4b2fa
M		 6005
6006 spec->init = stac922x_core_init;
6479c631
TI		 6007
6008 spec->num_caps = STAC922X_NUM_CAPS;
6009 spec->capvols = stac922x_capvols;
6010 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 6011
6012 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6013
9009b0e4 6014 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6015 if (!err) {
6016 if (spec->board_config < 0) {
6017 printk(KERN_WARNING "hda_codec: No auto-config is "
6018 "available, default to model=ref\n");
6019 spec->board_config = STAC_D945_REF;
6020 goto again;
6021 }
6022 err = -EINVAL;
6023 }
3cc08dc6
MP		 6024 if (err < 0) {
6025 stac92xx_free(codec);
6026 return err;
6027 }
6028
6029 codec->patch_ops = stac92xx_patch_ops;
6030
807a4636
TI		 6031 /* Fix Mux capture level; max to 2 */
6032 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6033 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6034 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6035 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6036 (0 << AC_AMPCAP_MUTE_SHIFT));
6037
3cc08dc6
MP		 6038 return 0;
6039}
6040
6041static int patch_stac927x(struct hda_codec *codec)
6042{
6043 struct sigmatel_spec *spec;
6044 int err;
6045
6046 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6047 if (spec == NULL)
6048 return -ENOMEM;
6049
a252c81a 6050 codec->no_trigger_sense = 1;
3cc08dc6 6051 codec->spec = spec;
1b0e372d 6052 spec->linear_tone_beep = 1;
45c1d85b 6053 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 6054 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 6055 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 6056 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6057 stac927x_models,
6058 stac927x_cfg_tbl);
9e507abd 6059 again:
330ee995 6060 if (spec->board_config < 0)
9a11f1aa
TI		 6061 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6062 codec->chip_name);
330ee995
TI		 6063 else
6064 stac92xx_set_config_regs(codec,
af9f341a 6065 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6066
1cd2224c 6067 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6068 spec->adc_nids = stac927x_adc_nids;
6069 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6070 spec->mux_nids = stac927x_mux_nids;
6071 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6072 spec->smux_nids = stac927x_smux_nids;
6073 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6074 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6075 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6076 spec->multiout.dac_nids = spec->dac_nids;
6077
af6ee302
TI		 6078 if (spec->board_config != STAC_D965_REF) {
6079 /* GPIO0 High = Enable EAPD */
6080 spec->eapd_mask = spec->gpio_mask = 0x01;
6081 spec->gpio_dir = spec->gpio_data = 0x01;
6082 }
6083
81d3dbde 6084 switch (spec->board_config) {
93ed1503 6085 case STAC_D965_3ST:
93ed1503 6086 case STAC_D965_5ST:
8e9068b1 6087 /* GPIO0 High = Enable EAPD */
8e9068b1 6088 spec->num_dmics = 0;
93ed1503 6089 spec->init = d965_core_init;
81d3dbde 6090 break;
8e9068b1 6091 case STAC_DELL_BIOS:
780c8be4
MR		 6092 switch (codec->subsystem_id) {
6093 case 0x10280209:
6094 case 0x1028022e:
6095 /* correct the device field to SPDIF out */
330ee995 6096 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6097 break;
86d190e7 6098 }
03d7ca17 6099 /* configure the analog microphone on some laptops */
330ee995 6100 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6101 /* correct the front output jack as a hp out */
330ee995 6102 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6103 /* correct the front input jack as a mic */
330ee995 6104 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6105 /* fallthru */
8e9068b1 6106 case STAC_DELL_3ST:
af6ee302
TI		 6107 if (codec->subsystem_id != 0x1028022f) {
6108 /* GPIO2 High = Enable EAPD */
6109 spec->eapd_mask = spec->gpio_mask = 0x04;
6110 spec->gpio_dir = spec->gpio_data = 0x04;
6111 }
7f16859a
MR		 6112 spec->dmic_nids = stac927x_dmic_nids;
6113 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6114
ccca7cdc 6115 spec->init = dell_3st_core_init;
8e9068b1 6116 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6117 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6118 break;
54930531
TI		 6119 case STAC_927X_VOLKNOB:
6120 spec->num_dmics = 0;
6121 spec->init = stac927x_volknob_core_init;
6122 break;
7f16859a 6123 default:
8e9068b1 6124 spec->num_dmics = 0;
8e9068b1 6125 spec->init = stac927x_core_init;
af6ee302 6126 break;
7f16859a
MR		 6127 }
6128
6479c631
TI		 6129 spec->num_caps = STAC927X_NUM_CAPS;
6130 spec->capvols = stac927x_capvols;
6131 spec->capsws = stac927x_capsws;
6132
a64135a2 6133 spec->num_pwrs = 0;
d78d7a90 6134 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6135 spec->aloopback_mask = 0x40;
6136 spec->aloopback_shift = 0;
c0cea0d0 6137 spec->eapd_switch = 1;
8e9068b1 6138
9009b0e4 6139 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6140 if (!err) {
6141 if (spec->board_config < 0) {
6142 printk(KERN_WARNING "hda_codec: No auto-config is "
6143 "available, default to model=ref\n");
6144 spec->board_config = STAC_D965_REF;
6145 goto again;
6146 }
6147 err = -EINVAL;
6148 }
c7d4b2fa
M		 6149 if (err < 0) {
6150 stac92xx_free(codec);
6151 return err;
6152 }
2f2f4251
M		 6153
6154 codec->patch_ops = stac92xx_patch_ops;
6155
2d34e1b3
TI		 6156 codec->proc_widget_hook = stac927x_proc_hook;
6157
52987656
TI		 6158 /*
6159 * !!FIXME!!
6160 * The STAC927x seem to require fairly long delays for certain
6161 * command sequences. With too short delays (even if the answer
6162 * is set to RIRB properly), it results in the silence output
6163 * on some hardwares like Dell.
6164 *
6165 * The below flag enables the longer delay (see get_response
6166 * in hda_intel.c).
6167 */
6168 codec->bus->needs_damn_long_delay = 1;
6169
e28d8322
TI		 6170 /* no jack detecion for ref-no-jd model */
6171 if (spec->board_config == STAC_D965_REF_NO_JD)
6172 spec->hp_detect = 0;
6173
2f2f4251
M		 6174 return 0;
6175}
6176
f3302a59
MP		 6177static int patch_stac9205(struct hda_codec *codec)
6178{
6179 struct sigmatel_spec *spec;
8259980e 6180 int err;
f3302a59
MP		 6181
6182 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6183 if (spec == NULL)
6184 return -ENOMEM;
6185
a252c81a 6186 codec->no_trigger_sense = 1;
f3302a59 6187 codec->spec = spec;
1b0e372d 6188 spec->linear_tone_beep = 1;
a4eed138 6189 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6190 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6191 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6192 stac9205_models,
6193 stac9205_cfg_tbl);
9e507abd 6194 again:
330ee995 6195 if (spec->board_config < 0)
9a11f1aa
TI		 6196 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6197 codec->chip_name);
330ee995
TI		 6198 else
6199 stac92xx_set_config_regs(codec,
af9f341a 6200 stac9205_brd_tbl[spec->board_config]);
f3302a59 6201
1cd2224c 6202 spec->digbeep_nid = 0x23;
f3302a59 6203 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6204 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6205 spec->mux_nids = stac9205_mux_nids;
2549413e 6206 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6207 spec->smux_nids = stac9205_smux_nids;
6208 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6209 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6210 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6211 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6212 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6213 spec->num_pwrs = 0;
f3302a59
MP		 6214
6215 spec->init = stac9205_core_init;
d78d7a90 6216 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6217
6479c631
TI		 6218 spec->num_caps = STAC9205_NUM_CAPS;
6219 spec->capvols = stac9205_capvols;
6220 spec->capsws = stac9205_capsws;
6221
e1f0d669
MR		 6222 spec->aloopback_mask = 0x40;
6223 spec->aloopback_shift = 0;
d9a4268e
TI		 6224 /* Turn on/off EAPD per HP plugging */
6225 if (spec->board_config != STAC_9205_EAPD)
6226 spec->eapd_switch = 1;
f3302a59 6227 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6228
ae0a8ed8 6229 switch (spec->board_config){
ae0a8ed8 6230 case STAC_9205_DELL_M43:
87d48363 6231 /* Enable SPDIF in/out */
330ee995
TI		 6232 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6233 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6234
4fe5195c 6235 /* Enable unsol response for GPIO4/Dock HP connection */
3a93897e 6236 err = stac_add_event(codec, codec->afg, STAC_VREF_EVENT, 0x01);
c6e4c666
TI		 6237 if (err < 0)
6238 return err;
c5d08bb5 6239 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c 6240 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3a93897e 6241 snd_hda_jack_detect_enable(codec, codec->afg, 0);
4fe5195c
MR		 6242
6243 spec->gpio_dir = 0x0b;
0fc9dec4 6244 spec->eapd_mask = 0x01;
4fe5195c
MR		 6245 spec->gpio_mask = 0x1b;
6246 spec->gpio_mute = 0x10;
e2e7d624 6247 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6248 * GPIO3 Low = DRM
87d48363 6249 */
4fe5195c 6250 spec->gpio_data = 0x01;
ae0a8ed8 6251 break;
b2c4f4d7
MR		 6252 case STAC_9205_REF:
6253 /* SPDIF-In enabled */
6254 break;
ae0a8ed8
TD		 6255 default:
6256 /* GPIO0 High = EAPD */
0fc9dec4 6257 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6258 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6259 break;
6260 }
33382403 6261
9009b0e4 6262 err = stac92xx_parse_auto_config(codec);
9e507abd
TI		 6263 if (!err) {
6264 if (spec->board_config < 0) {
6265 printk(KERN_WARNING "hda_codec: No auto-config is "
6266 "available, default to model=ref\n");
6267 spec->board_config = STAC_9205_REF;
6268 goto again;
6269 }
6270 err = -EINVAL;
6271 }
f3302a59
MP		 6272 if (err < 0) {
6273 stac92xx_free(codec);
6274 return err;
6275 }
6276
6277 codec->patch_ops = stac92xx_patch_ops;
6278
2d34e1b3
TI		 6279 codec->proc_widget_hook = stac9205_proc_hook;
6280
f3302a59
MP		 6281 return 0;
6282}
6283
db064e50 6284/*
6d859065 6285 * STAC9872 hack
db064e50
TI		 6286 */
6287
2b63536f 6288static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6289 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6290 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6291 {}
6292};
6293
2b63536f 6294static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI		 6295 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6296 0x11, 0x13, 0x14,
6297};
6298
2b63536f 6299static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI		 6300 0x8 /*,0x6*/
6301};
6302
2b63536f 6303static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI		 6304 0x15
6305};
6306
2b63536f 6307static const unsigned long stac9872_capvols[] = {
6479c631
TI		 6308 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6309};
6310#define stac9872_capsws stac9872_capvols
6311
2b63536f 6312static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI		 6313 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6314 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6315 0x90a7013e
6316};
6317
ea734963 6318static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6319 [STAC_9872_AUTO] = "auto",
6320 [STAC_9872_VAIO] = "vaio",
6321};
6322
2b63536f 6323static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI		 6324 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6325};
6326
2b63536f 6327static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6328 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6329 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6330 {} /* terminator */
6331};
6332
6d859065 6333static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6334{
6335 struct sigmatel_spec *spec;
1e137f92 6336 int err;
db064e50 6337
db064e50
TI		 6338 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6339 if (spec == NULL)
6340 return -ENOMEM;
a252c81a 6341 codec->no_trigger_sense = 1;
db064e50 6342 codec->spec = spec;
1b0e372d 6343 spec->linear_tone_beep = 1;
b04add95
TI		 6344 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6345 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6346
6347 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6348 stac9872_models,
6349 stac9872_cfg_tbl);
307282c8 6350 if (spec->board_config < 0)
9a11f1aa
TI		 6351 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6352 codec->chip_name);
307282c8
TI		 6353 else
6354 stac92xx_set_config_regs(codec,
6355 stac9872_brd_tbl[spec->board_config]);
db064e50 6356
1e137f92
TI		 6357 spec->multiout.dac_nids = spec->dac_nids;
6358 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6359 spec->adc_nids = stac9872_adc_nids;
6360 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6361 spec->mux_nids = stac9872_mux_nids;
1e137f92 6362 spec->init = stac9872_core_init;
6479c631
TI		 6363 spec->num_caps = 1;
6364 spec->capvols = stac9872_capvols;
6365 spec->capsws = stac9872_capsws;
1e137f92 6366
9009b0e4 6367 err = stac92xx_parse_auto_config(codec);
1e137f92
TI		 6368 if (err < 0) {
6369 stac92xx_free(codec);
6370 return -EINVAL;
6371 }
6372 spec->input_mux = &spec->private_imux;
6373 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6374 return 0;
6375}
6376
6377
2f2f4251
M		 6378/*
6379 * patch entries
6380 */
2b63536f 6381static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6382 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6383 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6384 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6385 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6386 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6387 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6388 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6389 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6390 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6391 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6392 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6393 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6394 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6395 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6396 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6397 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6398 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6399 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6400 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6401 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6402 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6403 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6404 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6405 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6406 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6407 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6408 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6409 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6410 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6411 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6412 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6413 /* The following does not take into account .id=0x83847661 when subsys =
6414 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6415 * currently not fully supported.
6416 */
6417 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6418 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6419 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6420 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6421 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6422 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6423 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6424 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6425 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6426 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6427 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6428 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6429 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6430 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6431 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6432 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6433 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6434 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6435 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6436 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6437 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6438 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6439 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6440 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6441 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6442 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6443 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6444 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6445 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6446 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6447 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6448 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6449 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6450 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6451 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6452 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6453 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6454 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6455 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6456 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6457 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6458 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6459 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6460 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6461 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6462 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6463 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6464 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6465 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6466 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 6467 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6468 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6469 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6470 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6471 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 6472 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
6473 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
6474 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
6475 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
6476 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
6477 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
6478 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
6479 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
6480 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
6481 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
6482 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
6483 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6484 {} /* terminator */
6485};
1289e9e8
TI		 6486
6487MODULE_ALIAS("snd-hda-codec-id:8384*");
6488MODULE_ALIAS("snd-hda-codec-id:111d*");
6489
6490MODULE_LICENSE("GPL");
6491MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6492
6493static struct hda_codec_preset_list sigmatel_list = {
6494 .preset = snd_hda_preset_sigmatel,
6495 .owner = THIS_MODULE,
6496};
6497
6498static int __init patch_sigmatel_init(void)
6499{
6500 return snd_hda_add_codec_preset(&sigmatel_list);
6501}
6502
6503static void __exit patch_sigmatel_exit(void)
6504{
6505 snd_hda_delete_codec_preset(&sigmatel_list);
6506}
6507
6508module_init(patch_sigmatel_init)
6509module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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