projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ALSA: HDA - HP dc7600 with pci sub IDs 0x103c/0x3011 belongs to hp-3013 model
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
2f2f4251 36
4e55096e 37#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
4e55096e 40
f5fcc13c
TI		 41enum {
42 STAC_REF,
bf277785 43 STAC_9200_OQO,
dfe495d0
TI		 44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
1194b5b7 54 STAC_9200_GATEWAY,
117f257d 55 STAC_9200_PANASONIC,
f5fcc13c
TI		 56 STAC_9200_MODELS
57};
58
59enum {
60 STAC_9205_REF,
dfe495d0 61 STAC_9205_DELL_M42,
ae0a8ed8
TD		 62 STAC_9205_DELL_M43,
63 STAC_9205_DELL_M44,
f5fcc13c
TI		 64 STAC_9205_MODELS
65};
66
e1f0d669
MR		 67enum {
68 STAC_92HD73XX_REF,
a7662640 69 STAC_DELL_M6,
e1f0d669
MR		 70 STAC_92HD73XX_MODELS
71};
72
e035b841
MR		 73enum {
74 STAC_92HD71BXX_REF,
a7662640
MR		 75 STAC_DELL_M4_1,
76 STAC_DELL_M4_2,
e035b841
MR		 77 STAC_92HD71BXX_MODELS
78};
79
8e21c34c
TD		 80enum {
81 STAC_925x_REF,
82 STAC_M2_2,
83 STAC_MA6,
2c11f955 84 STAC_PA6,
8e21c34c
TD		 85 STAC_925x_MODELS
86};
87
f5fcc13c
TI		 88enum {
89 STAC_D945_REF,
90 STAC_D945GTP3,
91 STAC_D945GTP5,
5d5d3bc3
IZ		 92 STAC_INTEL_MAC_V1,
93 STAC_INTEL_MAC_V2,
94 STAC_INTEL_MAC_V3,
95 STAC_INTEL_MAC_V4,
96 STAC_INTEL_MAC_V5,
dfe495d0 97 /* for backward compatibility */
f5fcc13c 98 STAC_MACMINI,
3fc24d85 99 STAC_MACBOOK,
6f0778d8
NB		 100 STAC_MACBOOK_PRO_V1,
101 STAC_MACBOOK_PRO_V2,
f16928fb 102 STAC_IMAC_INTEL,
0dae0f83 103 STAC_IMAC_INTEL_20,
dfe495d0
TI		 104 STAC_922X_DELL_D81,
105 STAC_922X_DELL_D82,
106 STAC_922X_DELL_M81,
107 STAC_922X_DELL_M82,
f5fcc13c
TI		 108 STAC_922X_MODELS
109};
110
111enum {
112 STAC_D965_REF,
113 STAC_D965_3ST,
114 STAC_D965_5ST,
4ff076e5 115 STAC_DELL_3ST,
8e9068b1 116 STAC_DELL_BIOS,
f5fcc13c
TI		 117 STAC_927X_MODELS
118};
403d1944 119
2f2f4251 120struct sigmatel_spec {
c8b6bf9b 121 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 122 unsigned int num_mixers;
123
403d1944 124 int board_config;
c7d4b2fa 125 unsigned int surr_switch: 1;
403d1944
MP		 126 unsigned int line_switch: 1;
127 unsigned int mic_switch: 1;
3cc08dc6 128 unsigned int alt_switch: 1;
82bc955f 129 unsigned int hp_detect: 1;
c7d4b2fa 130
4fe5195c 131 /* gpio lines */
0fc9dec4 132 unsigned int eapd_mask;
4fe5195c
MR		 133 unsigned int gpio_mask;
134 unsigned int gpio_dir;
135 unsigned int gpio_data;
136 unsigned int gpio_mute;
137
138 /* analog loopback */
e1f0d669
MR		 139 unsigned char aloopback_mask;
140 unsigned char aloopback_shift;
8259980e 141
a64135a2
MR		 142 /* power management */
143 unsigned int num_pwrs;
144 hda_nid_t *pwr_nids;
b76c850f 145 hda_nid_t *dac_list;
a64135a2 146
2f2f4251 147 /* playback */
b22b4821
MR		 148 struct hda_input_mux *mono_mux;
149 unsigned int cur_mmux;
2f2f4251 150 struct hda_multi_out multiout;
3cc08dc6 151 hda_nid_t dac_nids[5];
2f2f4251
M		 152
153 /* capture */
154 hda_nid_t *adc_nids;
2f2f4251 155 unsigned int num_adcs;
dabbed6f
M		 156 hda_nid_t *mux_nids;
157 unsigned int num_muxes;
8b65727b
MP		 158 hda_nid_t *dmic_nids;
159 unsigned int num_dmics;
e1f0d669 160 hda_nid_t *dmux_nids;
1697055e 161 unsigned int num_dmuxes;
dabbed6f 162 hda_nid_t dig_in_nid;
b22b4821 163 hda_nid_t mono_nid;
2f2f4251 164
2f2f4251
M		 165 /* pin widgets */
166 hda_nid_t *pin_nids;
167 unsigned int num_pins;
2f2f4251 168 unsigned int *pin_configs;
11b44bbd 169 unsigned int *bios_pin_configs;
2f2f4251
M		 170
171 /* codec specific stuff */
172 struct hda_verb *init;
c8b6bf9b 173 struct snd_kcontrol_new *mixer;
2f2f4251
M		 174
175 /* capture source */
8b65727b 176 struct hda_input_mux *dinput_mux;
e1f0d669 177 unsigned int cur_dmux[2];
c7d4b2fa 178 struct hda_input_mux *input_mux;
3cc08dc6 179 unsigned int cur_mux[3];
2f2f4251 180
403d1944
MP		 181 /* i/o switches */
182 unsigned int io_switch[2];
0fb87bb4 183 unsigned int clfe_swap;
7c2ba97b 184 unsigned int hp_switch;
5f10c4a9 185 unsigned int aloopback;
2f2f4251 186
c7d4b2fa
M		 187 struct hda_pcm pcm_rec[2]; /* PCM information */
188
189 /* dynamic controls and input_mux */
190 struct auto_pin_cfg autocfg;
191 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 192 struct snd_kcontrol_new *kctl_alloc;
8b65727b 193 struct hda_input_mux private_dimux;
c7d4b2fa 194 struct hda_input_mux private_imux;
b22b4821 195 struct hda_input_mux private_mono_mux;
2f2f4251
M		 196};
197
198static hda_nid_t stac9200_adc_nids[1] = {
199 0x03,
200};
201
202static hda_nid_t stac9200_mux_nids[1] = {
203 0x0c,
204};
205
206static hda_nid_t stac9200_dac_nids[1] = {
207 0x02,
208};
209
a64135a2
MR		 210static hda_nid_t stac92hd73xx_pwr_nids[8] = {
211 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
212 0x0f, 0x10, 0x11
213};
214
e1f0d669
MR		 215static hda_nid_t stac92hd73xx_adc_nids[2] = {
216 0x1a, 0x1b
217};
218
219#define STAC92HD73XX_NUM_DMICS 2
220static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
221 0x13, 0x14, 0
222};
223
224#define STAC92HD73_DAC_COUNT 5
225static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
226 0x15, 0x16, 0x17, 0x18, 0x19,
227};
228
229static hda_nid_t stac92hd73xx_mux_nids[4] = {
230 0x28, 0x29, 0x2a, 0x2b,
231};
232
233static hda_nid_t stac92hd73xx_dmux_nids[2] = {
234 0x20, 0x21,
235};
236
a64135a2
MR		 237static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
238 0x0a, 0x0d, 0x0f
239};
240
e035b841
MR		 241static hda_nid_t stac92hd71bxx_adc_nids[2] = {
242 0x12, 0x13,
243};
244
245static hda_nid_t stac92hd71bxx_mux_nids[2] = {
246 0x1a, 0x1b
247};
248
e1f0d669
MR		 249static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
250 0x1c,
251};
252
aea7bb0a 253static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 254 0x10, /*0x11, */
255};
256
257#define STAC92HD71BXX_NUM_DMICS 2
258static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
259 0x18, 0x19, 0
260};
261
8e21c34c
TD		 262static hda_nid_t stac925x_adc_nids[1] = {
263 0x03,
264};
265
266static hda_nid_t stac925x_mux_nids[1] = {
267 0x0f,
268};
269
270static hda_nid_t stac925x_dac_nids[1] = {
271 0x02,
272};
273
f6e9852a
TI		 274#define STAC925X_NUM_DMICS 1
275static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
276 0x15, 0
2c11f955
TD		 277};
278
1697055e
TI		 279static hda_nid_t stac925x_dmux_nids[1] = {
280 0x14,
281};
282
2f2f4251
M		 283static hda_nid_t stac922x_adc_nids[2] = {
284 0x06, 0x07,
285};
286
287static hda_nid_t stac922x_mux_nids[2] = {
288 0x12, 0x13,
289};
290
3cc08dc6
MP		 291static hda_nid_t stac927x_adc_nids[3] = {
292 0x07, 0x08, 0x09
293};
294
295static hda_nid_t stac927x_mux_nids[3] = {
296 0x15, 0x16, 0x17
297};
298
b76c850f
MR		 299static hda_nid_t stac927x_dac_nids[6] = {
300 0x02, 0x03, 0x04, 0x05, 0x06, 0
301};
302
e1f0d669
MR		 303static hda_nid_t stac927x_dmux_nids[1] = {
304 0x1b,
305};
306
7f16859a
MR		 307#define STAC927X_NUM_DMICS 2
308static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
309 0x13, 0x14, 0
310};
311
f3302a59
MP		 312static hda_nid_t stac9205_adc_nids[2] = {
313 0x12, 0x13
314};
315
316static hda_nid_t stac9205_mux_nids[2] = {
317 0x19, 0x1a
318};
319
e1f0d669 320static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 321 0x1d,
e1f0d669
MR		 322};
323
f6e9852a
TI		 324#define STAC9205_NUM_DMICS 2
325static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
326 0x17, 0x18, 0
8b65727b
MP		 327};
328
c7d4b2fa 329static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 330 0x08, 0x09, 0x0d, 0x0e,
331 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 332};
333
8e21c34c
TD		 334static hda_nid_t stac925x_pin_nids[8] = {
335 0x07, 0x08, 0x0a, 0x0b,
336 0x0c, 0x0d, 0x10, 0x11,
337};
338
2f2f4251
M		 339static hda_nid_t stac922x_pin_nids[10] = {
340 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
341 0x0f, 0x10, 0x11, 0x15, 0x1b,
342};
343
a7662640 344static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 345 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
346 0x0f, 0x10, 0x11, 0x12, 0x13,
a7662640 347 0x14, 0x1e, 0x22
e1f0d669
MR		 348};
349
e035b841
MR		 350static hda_nid_t stac92hd71bxx_pin_nids[10] = {
351 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
352 0x0f, 0x14, 0x18, 0x19, 0x1e,
353};
354
3cc08dc6
MP		 355static hda_nid_t stac927x_pin_nids[14] = {
356 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
357 0x0f, 0x10, 0x11, 0x12, 0x13,
358 0x14, 0x21, 0x22, 0x23,
359};
360
f3302a59
MP		 361static hda_nid_t stac9205_pin_nids[12] = {
362 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
363 0x0f, 0x14, 0x16, 0x17, 0x18,
364 0x21, 0x22,
f3302a59
MP		 365};
366
8b65727b
MP		 367static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
368 struct snd_ctl_elem_info *uinfo)
369{
370 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
371 struct sigmatel_spec *spec = codec->spec;
372 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
373}
374
375static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
376 struct snd_ctl_elem_value *ucontrol)
377{
378 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
379 struct sigmatel_spec *spec = codec->spec;
e1f0d669 380 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 381
e1f0d669 382 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 383 return 0;
384}
385
386static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
387 struct snd_ctl_elem_value *ucontrol)
388{
389 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
390 struct sigmatel_spec *spec = codec->spec;
e1f0d669 391 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 392
393 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 394 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 395}
396
c8b6bf9b 397static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 398{
399 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
400 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 401 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 402}
403
c8b6bf9b 404static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 405{
406 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
407 struct sigmatel_spec *spec = codec->spec;
408 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
409
410 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
411 return 0;
412}
413
c8b6bf9b 414static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 415{
416 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
417 struct sigmatel_spec *spec = codec->spec;
418 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
419
c7d4b2fa 420 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 421 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
422}
423
b22b4821
MR		 424static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_info *uinfo)
426{
427 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
428 struct sigmatel_spec *spec = codec->spec;
429 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
430}
431
432static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
433 struct snd_ctl_elem_value *ucontrol)
434{
435 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
436 struct sigmatel_spec *spec = codec->spec;
437
438 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
439 return 0;
440}
441
442static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
443 struct snd_ctl_elem_value *ucontrol)
444{
445 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
446 struct sigmatel_spec *spec = codec->spec;
447
448 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
449 spec->mono_nid, &spec->cur_mmux);
450}
451
5f10c4a9
ML		 452#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
453
454static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
455 struct snd_ctl_elem_value *ucontrol)
456{
457 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 458 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 459 struct sigmatel_spec *spec = codec->spec;
460
e1f0d669
MR		 461 ucontrol->value.integer.value[0] = !!(spec->aloopback &
462 (spec->aloopback_mask << idx));
5f10c4a9
ML		 463 return 0;
464}
465
466static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
467 struct snd_ctl_elem_value *ucontrol)
468{
469 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
470 struct sigmatel_spec *spec = codec->spec;
e1f0d669 471 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 472 unsigned int dac_mode;
e1f0d669 473 unsigned int val, idx_val;
5f10c4a9 474
e1f0d669
MR		 475 idx_val = spec->aloopback_mask << idx;
476 if (ucontrol->value.integer.value[0])
477 val = spec->aloopback | idx_val;
478 else
479 val = spec->aloopback & ~idx_val;
68ea7b2f 480 if (spec->aloopback == val)
5f10c4a9
ML		 481 return 0;
482
68ea7b2f 483 spec->aloopback = val;
5f10c4a9 484
e1f0d669
MR		 485 /* Only return the bits defined by the shift value of the
486 * first two bytes of the mask
487 */
5f10c4a9 488 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 489 kcontrol->private_value & 0xFFFF, 0x0);
490 dac_mode >>= spec->aloopback_shift;
5f10c4a9 491
e1f0d669 492 if (spec->aloopback & idx_val) {
5f10c4a9 493 snd_hda_power_up(codec);
e1f0d669 494 dac_mode |= idx_val;
5f10c4a9
ML		 495 } else {
496 snd_hda_power_down(codec);
e1f0d669 497 dac_mode &= ~idx_val;
5f10c4a9
ML		 498 }
499
500 snd_hda_codec_write_cache(codec, codec->afg, 0,
501 kcontrol->private_value >> 16, dac_mode);
502
503 return 1;
504}
505
c7d4b2fa 506static struct hda_verb stac9200_core_init[] = {
2f2f4251 507 /* set dac0mux for dac converter */
c7d4b2fa 508 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 509 {}
510};
511
1194b5b7
TI		 512static struct hda_verb stac9200_eapd_init[] = {
513 /* set dac0mux for dac converter */
514 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
515 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
516 {}
517};
518
e1f0d669
MR		 519static struct hda_verb stac92hd73xx_6ch_core_init[] = {
520 /* set master volume and direct control */
521 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
522 /* setup audio connections */
523 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
524 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
525 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
526 /* setup adcs to point to mixer */
527 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
528 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 529 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
530 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
531 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
532 /* setup import muxs */
533 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
534 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
535 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
536 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
537 {}
538};
539
d654a660
MR		 540static struct hda_verb dell_eq_core_init[] = {
541 /* set master volume to max value without distortion
542 * and direct control */
543 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
544 /* setup audio connections */
545 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
546 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
547 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
548 /* setup adcs to point to mixer */
549 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
550 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
551 /* setup import muxs */
552 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
553 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
554 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
555 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
556 {}
557};
558
52fe0f9d
MR		 559static struct hda_verb dell_m6_core_init[] = {
560 /* set master volume and direct control */
561 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
562 /* setup audio connections */
7747ecce
MR		 563 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
564 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 565 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
566 /* setup adcs to point to mixer */
567 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
568 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
569 /* setup import muxs */
570 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
571 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
572 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
573 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
574 {}
575};
576
e1f0d669
MR		 577static struct hda_verb stac92hd73xx_8ch_core_init[] = {
578 /* set master volume and direct control */
579 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
580 /* setup audio connections */
581 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
582 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
583 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
584 /* connect hp ports to dac3 */
585 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
586 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
587 /* setup adcs to point to mixer */
588 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
589 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 590 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
591 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
592 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
593 /* setup import muxs */
594 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
595 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
596 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
597 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
598 {}
599};
600
601static struct hda_verb stac92hd73xx_10ch_core_init[] = {
602 /* set master volume and direct control */
603 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
604 /* setup audio connections */
605 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
606 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
607 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
608 /* dac3 is connected to import3 mux */
609 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
610 /* connect hp ports to dac4 */
611 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
612 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
613 /* setup adcs to point to mixer */
614 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
615 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 616 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
617 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
618 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
619 /* setup import muxs */
620 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
621 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
622 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
623 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
624 {}
625};
626
e035b841 627static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 628 /* set master volume and direct control */
629 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
630 /* connect headphone jack to dac1 */
631 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
632 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
633 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
634 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
635 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
636 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 637};
638
aafc4412 639#define HD_DISABLE_PORTF 3
541eee87 640static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 641 /* start of config #1 */
642
643 /* connect port 0f to audio mixer */
644 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
645 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
646 /* unmute right and left channels for node 0x0f */
647 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
648 /* start of config #2 */
649
e035b841
MR		 650 /* set master volume and direct control */
651 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
652 /* connect headphone jack to dac1 */
653 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 654 /* connect port 0d to audio mixer */
9b35947f 655 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
9b35947f
MR		 656 /* unmute dac0 input in audio mixer */
657 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
aafc4412 658 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 659 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
660 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 661 {}
662};
663
8e21c34c
TD		 664static struct hda_verb stac925x_core_init[] = {
665 /* set dac0mux for dac converter */
666 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
667 {}
668};
669
c7d4b2fa 670static struct hda_verb stac922x_core_init[] = {
2f2f4251 671 /* set master volume and direct control */
c7d4b2fa 672 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 673 {}
674};
675
93ed1503 676static struct hda_verb d965_core_init[] = {
19039bd0 677 /* set master volume and direct control */
93ed1503 678 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 679 /* unmute node 0x1b */
680 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
681 /* select node 0x03 as DAC */
682 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
683 {}
684};
685
3cc08dc6
MP		 686static struct hda_verb stac927x_core_init[] = {
687 /* set master volume and direct control */
688 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
689 {}
690};
691
f3302a59
MP		 692static struct hda_verb stac9205_core_init[] = {
693 /* set master volume and direct control */
694 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
695 {}
696};
697
b22b4821
MR		 698#define STAC_MONO_MUX \
699 { \
700 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
701 .name = "Mono Mux", \
702 .count = 1, \
703 .info = stac92xx_mono_mux_enum_info, \
704 .get = stac92xx_mono_mux_enum_get, \
705 .put = stac92xx_mono_mux_enum_put, \
706 }
707
9e05b7a3 708#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 709 { \
710 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
711 .name = "Input Source", \
9e05b7a3 712 .count = cnt, \
ca7c5a8b
ML		 713 .info = stac92xx_mux_enum_info, \
714 .get = stac92xx_mux_enum_get, \
715 .put = stac92xx_mux_enum_put, \
716 }
717
e1f0d669 718#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 719 { \
720 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
721 .name = "Analog Loopback", \
e1f0d669 722 .count = cnt, \
5f10c4a9
ML		 723 .info = stac92xx_aloopback_info, \
724 .get = stac92xx_aloopback_get, \
725 .put = stac92xx_aloopback_put, \
726 .private_value = verb_read | (verb_write << 16), \
727 }
728
c8b6bf9b 729static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 730 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
731 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 732 STAC_INPUT_SOURCE(1),
2f2f4251
M		 733 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
734 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 735 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 736 { } /* end */
737};
738
e1f0d669 739static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 740 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
741
e1f0d669
MR		 742 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
743 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
744
745 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
746 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
747
748 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
749 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
750
751 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
752 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
753
754 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
755 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
756
757 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
758 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
759
760 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
761 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
762 { } /* end */
763};
764
765static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 766 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
767
e1f0d669
MR		 768 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
769 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
770
771 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
772 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
773
774 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
775 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
776
777 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
778 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
779
780 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
781 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
782
783 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
784 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
785
786 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
787 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
788 { } /* end */
789};
790
791static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 792 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
793
e1f0d669
MR		 794 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
795 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
796
797 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
798 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
799
800 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
801 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
802
803 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
804 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
805
806 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
807 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
808
809 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
810 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
811
812 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
813 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
814 { } /* end */
815};
816
541eee87 817static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 818 STAC_INPUT_SOURCE(2),
e035b841 819
9b35947f
MR		 820 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
821 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
822 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
823
824 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
825 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
826 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 827
9b35947f
MR		 828 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
829 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 830 { } /* end */
831};
832
541eee87 833static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 834 STAC_INPUT_SOURCE(2),
835 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
836
541eee87
MR		 837 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
838 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
839 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
840
841 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
842 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
843 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
844 { } /* end */
845};
846
8e21c34c 847static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 848 STAC_INPUT_SOURCE(1),
8e21c34c 849 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 850 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 851 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
852 { } /* end */
853};
854
9e05b7a3 855static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 856 STAC_INPUT_SOURCE(2),
e1f0d669 857 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 858
859 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
860 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
861 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
862
863 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
864 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
865 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
866
2f2f4251
M		 867 { } /* end */
868};
869
19039bd0 870/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 871static struct snd_kcontrol_new stac922x_mixer[] = {
872 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 873 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
874 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
875 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
876
877 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
878 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
879 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 880 { } /* end */
881};
882
9e05b7a3 883
d1d985f0 884static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 885 STAC_INPUT_SOURCE(3),
e1f0d669 886 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 887
9e05b7a3
ML		 888 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
889 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
890 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
891
892 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
893 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
894 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
895
896 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
897 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
898 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 899 { } /* end */
900};
901
1697055e
TI		 902static struct snd_kcontrol_new stac_dmux_mixer = {
903 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
904 .name = "Digital Input Source",
905 /* count set later */
906 .info = stac92xx_dmux_enum_info,
907 .get = stac92xx_dmux_enum_get,
908 .put = stac92xx_dmux_enum_put,
909};
910
2134ea4f
TI		 911static const char *slave_vols[] = {
912 "Front Playback Volume",
913 "Surround Playback Volume",
914 "Center Playback Volume",
915 "LFE Playback Volume",
916 "Side Playback Volume",
917 "Headphone Playback Volume",
918 "Headphone Playback Volume",
919 "Speaker Playback Volume",
920 "External Speaker Playback Volume",
921 "Speaker2 Playback Volume",
922 NULL
923};
924
925static const char *slave_sws[] = {
926 "Front Playback Switch",
927 "Surround Playback Switch",
928 "Center Playback Switch",
929 "LFE Playback Switch",
930 "Side Playback Switch",
931 "Headphone Playback Switch",
932 "Headphone Playback Switch",
933 "Speaker Playback Switch",
934 "External Speaker Playback Switch",
935 "Speaker2 Playback Switch",
edb54a55 936 "IEC958 Playback Switch",
2134ea4f
TI		 937 NULL
938};
939
2f2f4251
M		 940static int stac92xx_build_controls(struct hda_codec *codec)
941{
942 struct sigmatel_spec *spec = codec->spec;
943 int err;
c7d4b2fa 944 int i;
2f2f4251
M		 945
946 err = snd_hda_add_new_ctls(codec, spec->mixer);
947 if (err < 0)
948 return err;
c7d4b2fa
M		 949
950 for (i = 0; i < spec->num_mixers; i++) {
951 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
952 if (err < 0)
953 return err;
954 }
1697055e
TI		 955 if (spec->num_dmuxes > 0) {
956 stac_dmux_mixer.count = spec->num_dmuxes;
957 err = snd_ctl_add(codec->bus->card,
958 snd_ctl_new1(&stac_dmux_mixer, codec));
959 if (err < 0)
960 return err;
961 }
c7d4b2fa 962
dabbed6f
M		 963 if (spec->multiout.dig_out_nid) {
964 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
965 if (err < 0)
966 return err;
9a08160b
TI		 967 err = snd_hda_create_spdif_share_sw(codec,
968 &spec->multiout);
969 if (err < 0)
970 return err;
971 spec->multiout.share_spdif = 1;
dabbed6f
M		 972 }
973 if (spec->dig_in_nid) {
974 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
975 if (err < 0)
976 return err;
977 }
2134ea4f
TI		 978
979 /* if we have no master control, let's create it */
980 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 981 unsigned int vmaster_tlv[4];
2134ea4f 982 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 983 HDA_OUTPUT, vmaster_tlv);
2134ea4f 984 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 985 vmaster_tlv, slave_vols);
2134ea4f
TI		 986 if (err < 0)
987 return err;
988 }
989 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
990 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
991 NULL, slave_sws);
992 if (err < 0)
993 return err;
994 }
995
dabbed6f 996 return 0;
2f2f4251
M		 997}
998
403d1944 999static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1000 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1001 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1002};
1003
dfe495d0
TI		 1004/*
1005 STAC 9200 pin configs for
1006 102801A8
1007 102801DE
1008 102801E8
1009*/
1010static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1011 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1012 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1013};
1014
1015/*
1016 STAC 9200 pin configs for
1017 102801C0
1018 102801C1
1019*/
1020static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1021 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1022 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1023};
1024
1025/*
1026 STAC 9200 pin configs for
1027 102801C4 (Dell Dimension E310)
1028 102801C5
1029 102801C7
1030 102801D9
1031 102801DA
1032 102801E3
1033*/
1034static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1035 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1036 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1037};
1038
1039
1040/*
1041 STAC 9200-32 pin configs for
1042 102801B5 (Dell Inspiron 630m)
1043 102801D8 (Dell Inspiron 640m)
1044*/
1045static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1046 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1047 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1048};
1049
1050/*
1051 STAC 9200-32 pin configs for
1052 102801C2 (Dell Latitude D620)
1053 102801C8
1054 102801CC (Dell Latitude D820)
1055 102801D4
1056 102801D6
1057*/
1058static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1059 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1060 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1061};
1062
1063/*
1064 STAC 9200-32 pin configs for
1065 102801CE (Dell XPS M1710)
1066 102801CF (Dell Precision M90)
1067*/
1068static unsigned int dell9200_m23_pin_configs[8] = {
1069 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1070 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1071};
1072
1073/*
1074 STAC 9200-32 pin configs for
1075 102801C9
1076 102801CA
1077 102801CB (Dell Latitude 120L)
1078 102801D3
1079*/
1080static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1081 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1082 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1083};
1084
1085/*
1086 STAC 9200-32 pin configs for
1087 102801BD (Dell Inspiron E1505n)
1088 102801EE
1089 102801EF
1090*/
1091static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1092 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1093 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1094};
1095
1096/*
1097 STAC 9200-32 pin configs for
1098 102801F5 (Dell Inspiron 1501)
1099 102801F6
1100*/
1101static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1102 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1103 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1104};
1105
1106/*
1107 STAC 9200-32
1108 102801CD (Dell Inspiron E1705/9400)
1109*/
1110static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1111 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1112 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1113};
1114
bf277785
TD		 1115static unsigned int oqo9200_pin_configs[8] = {
1116 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1117 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1118};
1119
dfe495d0 1120
f5fcc13c
TI		 1121static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1122 [STAC_REF] = ref9200_pin_configs,
bf277785 1123 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1124 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1125 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1126 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1127 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1128 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1129 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1130 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1131 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1132 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1133 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1134 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1135};
1136
f5fcc13c
TI		 1137static const char *stac9200_models[STAC_9200_MODELS] = {
1138 [STAC_REF] = "ref",
bf277785 1139 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1140 [STAC_9200_DELL_D21] = "dell-d21",
1141 [STAC_9200_DELL_D22] = "dell-d22",
1142 [STAC_9200_DELL_D23] = "dell-d23",
1143 [STAC_9200_DELL_M21] = "dell-m21",
1144 [STAC_9200_DELL_M22] = "dell-m22",
1145 [STAC_9200_DELL_M23] = "dell-m23",
1146 [STAC_9200_DELL_M24] = "dell-m24",
1147 [STAC_9200_DELL_M25] = "dell-m25",
1148 [STAC_9200_DELL_M26] = "dell-m26",
1149 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1150 [STAC_9200_GATEWAY] = "gateway",
117f257d 1151 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1152};
1153
1154static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1155 /* SigmaTel reference board */
1156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1157 "DFI LanParty", STAC_REF),
e7377071 1158 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1159 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1160 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1161 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1162 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1163 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1164 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1166 "unknown Dell", STAC_9200_DELL_D22),
1167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1168 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1170 "Dell Latitude D620", STAC_9200_DELL_M22),
1171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1172 "unknown Dell", STAC_9200_DELL_D23),
1173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1174 "unknown Dell", STAC_9200_DELL_D23),
1175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1176 "unknown Dell", STAC_9200_DELL_M22),
1177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1178 "unknown Dell", STAC_9200_DELL_M24),
1179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1180 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1182 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1184 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1186 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1188 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1190 "Dell Precision M90", STAC_9200_DELL_M23),
1191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1192 "unknown Dell", STAC_9200_DELL_M22),
1193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1194 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1196 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1198 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1200 "unknown Dell", STAC_9200_DELL_D23),
1201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1202 "unknown Dell", STAC_9200_DELL_D23),
1203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1204 "unknown Dell", STAC_9200_DELL_D21),
1205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1206 "unknown Dell", STAC_9200_DELL_D23),
1207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1208 "unknown Dell", STAC_9200_DELL_D21),
1209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1210 "unknown Dell", STAC_9200_DELL_M25),
1211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1212 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1214 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1216 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1217 /* Panasonic */
117f257d 1218 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1219 /* Gateway machines needs EAPD to be set on resume */
1220 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1221 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1222 STAC_9200_GATEWAY),
1223 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1224 STAC_9200_GATEWAY),
bf277785
TD		 1225 /* OQO Mobile */
1226 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1227 {} /* terminator */
1228};
1229
8e21c34c
TD		 1230static unsigned int ref925x_pin_configs[8] = {
1231 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1232 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1233};
1234
1235static unsigned int stac925x_MA6_pin_configs[8] = {
1236 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1237 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1238};
1239
2c11f955
TD		 1240static unsigned int stac925x_PA6_pin_configs[8] = {
1241 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1242 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1243};
1244
8e21c34c 1245static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1246 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1247 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1248};
1249
1250static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1251 [STAC_REF] = ref925x_pin_configs,
1252 [STAC_M2_2] = stac925xM2_2_pin_configs,
1253 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1254 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1255};
1256
1257static const char *stac925x_models[STAC_925x_MODELS] = {
1258 [STAC_REF] = "ref",
1259 [STAC_M2_2] = "m2-2",
1260 [STAC_MA6] = "m6",
2c11f955 1261 [STAC_PA6] = "pa6",
8e21c34c
TD		 1262};
1263
1264static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1265 /* SigmaTel reference board */
1266 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1267 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1268 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1269 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1270 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1271 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1272 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1273 {} /* terminator */
1274};
1275
a7662640 1276static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1277 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1278 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1279 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1280 0x01452050,
1281};
1282
1283static unsigned int dell_m6_pin_configs[13] = {
1284 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1285 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1286 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1287 0x4f0000f0,
e1f0d669
MR		 1288};
1289
1290static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640
MR		 1291 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1292 [STAC_DELL_M6] = dell_m6_pin_configs,
e1f0d669
MR		 1293};
1294
1295static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1296 [STAC_92HD73XX_REF] = "ref",
a7662640 1297 [STAC_DELL_M6] = "dell-m6",
e1f0d669
MR		 1298};
1299
1300static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1301 /* SigmaTel reference board */
1302 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1303 "DFI LanParty", STAC_92HD73XX_REF),
1304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1305 "unknown Dell", STAC_DELL_M6),
1306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1307 "unknown Dell", STAC_DELL_M6),
1308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1309 "unknown Dell", STAC_DELL_M6),
1310 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1311 "unknown Dell", STAC_DELL_M6),
1312 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1313 "unknown Dell", STAC_DELL_M6),
1314 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1315 "unknown Dell", STAC_DELL_M6),
1316 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1317 "unknown Dell", STAC_DELL_M6),
e1f0d669
MR		 1318 {} /* terminator */
1319};
1320
e035b841
MR		 1321static unsigned int ref92hd71bxx_pin_configs[10] = {
1322 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1323 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1324 0x90a000f0, 0x01452050,
1325};
1326
aafc4412 1327static unsigned int dell_m4_1_pin_configs[10] = {
a7662640 1328 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1329 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
a7662640
MR		 1330 0x40f000f0, 0x4f0000f0,
1331};
1332
aafc4412 1333static unsigned int dell_m4_2_pin_configs[10] = {
a7662640
MR		 1334 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1335 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1336 0x40f000f0, 0x044413b0,
1337};
1338
e035b841
MR		 1339static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1340 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1341 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1342 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
e035b841
MR		 1343};
1344
1345static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1346 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1347 [STAC_DELL_M4_1] = "dell-m4-1",
1348 [STAC_DELL_M4_2] = "dell-m4-2",
e035b841
MR		 1349};
1350
1351static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1352 /* SigmaTel reference board */
1353 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1354 "DFI LanParty", STAC_92HD71BXX_REF),
a7662640
MR		 1355 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1356 "unknown Dell", STAC_DELL_M4_1),
1357 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1358 "unknown Dell", STAC_DELL_M4_1),
1359 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1360 "unknown Dell", STAC_DELL_M4_1),
1361 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1362 "unknown Dell", STAC_DELL_M4_1),
1363 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1364 "unknown Dell", STAC_DELL_M4_1),
1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1366 "unknown Dell", STAC_DELL_M4_1),
1367 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1368 "unknown Dell", STAC_DELL_M4_1),
1369 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1370 "unknown Dell", STAC_DELL_M4_2),
1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1372 "unknown Dell", STAC_DELL_M4_2),
1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1374 "unknown Dell", STAC_DELL_M4_2),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1376 "unknown Dell", STAC_DELL_M4_2),
e035b841
MR		 1377 {} /* terminator */
1378};
1379
403d1944
MP		 1380static unsigned int ref922x_pin_configs[10] = {
1381 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1382 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1383 0x40000100, 0x40000100,
1384};
1385
dfe495d0
TI		 1386/*
1387 STAC 922X pin configs for
1388 102801A7
1389 102801AB
1390 102801A9
1391 102801D1
1392 102801D2
1393*/
1394static unsigned int dell_922x_d81_pin_configs[10] = {
1395 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1396 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1397 0x01813122, 0x400001f2,
1398};
1399
1400/*
1401 STAC 922X pin configs for
1402 102801AC
1403 102801D0
1404*/
1405static unsigned int dell_922x_d82_pin_configs[10] = {
1406 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1407 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1408 0x01813122, 0x400001f1,
1409};
1410
1411/*
1412 STAC 922X pin configs for
1413 102801BF
1414*/
1415static unsigned int dell_922x_m81_pin_configs[10] = {
1416 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1417 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1418 0x40C003f1, 0x405003f0,
1419};
1420
1421/*
1422 STAC 9221 A1 pin configs for
1423 102801D7 (Dell XPS M1210)
1424*/
1425static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1426 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1427 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1428 0x508003f3, 0x405003f4,
1429};
1430
403d1944 1431static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1432 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1433 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1434 0x02a19120, 0x40000100,
1435};
1436
1437static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1438 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1439 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1440 0x02a19320, 0x40000100,
1441};
1442
5d5d3bc3
IZ		 1443static unsigned int intel_mac_v1_pin_configs[10] = {
1444 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1445 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1446 0x400000fc, 0x400000fb,
1447};
1448
1449static unsigned int intel_mac_v2_pin_configs[10] = {
1450 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1451 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1452 0x400000fc, 0x400000fb,
6f0778d8
NB		 1453};
1454
5d5d3bc3
IZ		 1455static unsigned int intel_mac_v3_pin_configs[10] = {
1456 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1457 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1458 0x400000fc, 0x400000fb,
1459};
1460
5d5d3bc3
IZ		 1461static unsigned int intel_mac_v4_pin_configs[10] = {
1462 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1463 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1464 0x400000fc, 0x400000fb,
1465};
1466
5d5d3bc3
IZ		 1467static unsigned int intel_mac_v5_pin_configs[10] = {
1468 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1469 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1470 0x400000fc, 0x400000fb,
0dae0f83
TI		 1471};
1472
76c08828 1473
19039bd0 1474static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1475 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1476 [STAC_D945GTP3] = d945gtp3_pin_configs,
1477 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1478 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1479 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1480 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1481 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1482 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1483 /* for backward compatibility */
5d5d3bc3
IZ		 1484 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1485 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1486 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1487 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1488 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1489 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1490 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1491 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1492 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1493 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1494};
1495
f5fcc13c
TI		 1496static const char *stac922x_models[STAC_922X_MODELS] = {
1497 [STAC_D945_REF] = "ref",
1498 [STAC_D945GTP5] = "5stack",
1499 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1500 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1501 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1502 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1503 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1504 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1505 /* for backward compatibility */
f5fcc13c 1506 [STAC_MACMINI] = "macmini",
3fc24d85 1507 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1508 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1509 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1510 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1511 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1512 [STAC_922X_DELL_D81] = "dell-d81",
1513 [STAC_922X_DELL_D82] = "dell-d82",
1514 [STAC_922X_DELL_M81] = "dell-m81",
1515 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1516};
1517
1518static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1519 /* SigmaTel reference board */
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1521 "DFI LanParty", STAC_D945_REF),
1522 /* Intel 945G based systems */
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1524 "Intel D945G", STAC_D945GTP3),
1525 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1526 "Intel D945G", STAC_D945GTP3),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1528 "Intel D945G", STAC_D945GTP3),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1530 "Intel D945G", STAC_D945GTP3),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1532 "Intel D945G", STAC_D945GTP3),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1534 "Intel D945G", STAC_D945GTP3),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1536 "Intel D945G", STAC_D945GTP3),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1538 "Intel D945G", STAC_D945GTP3),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1540 "Intel D945G", STAC_D945GTP3),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1542 "Intel D945G", STAC_D945GTP3),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1544 "Intel D945G", STAC_D945GTP3),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1546 "Intel D945G", STAC_D945GTP3),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1548 "Intel D945G", STAC_D945GTP3),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1550 "Intel D945G", STAC_D945GTP3),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1552 "Intel D945G", STAC_D945GTP3),
1553 /* Intel D945G 5-stack systems */
1554 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1555 "Intel D945G", STAC_D945GTP5),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1557 "Intel D945G", STAC_D945GTP5),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1559 "Intel D945G", STAC_D945GTP5),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1561 "Intel D945G", STAC_D945GTP5),
1562 /* Intel 945P based systems */
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1564 "Intel D945P", STAC_D945GTP3),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1566 "Intel D945P", STAC_D945GTP3),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1568 "Intel D945P", STAC_D945GTP3),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1570 "Intel D945P", STAC_D945GTP3),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1572 "Intel D945P", STAC_D945GTP3),
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1574 "Intel D945P", STAC_D945GTP5),
1575 /* other systems */
1576 /* Apple Mac Mini (early 2006) */
1577 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1578 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1579 /* Dell systems */
1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1581 "unknown Dell", STAC_922X_DELL_D81),
1582 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1583 "unknown Dell", STAC_922X_DELL_D81),
1584 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1585 "unknown Dell", STAC_922X_DELL_D81),
1586 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1587 "unknown Dell", STAC_922X_DELL_D82),
1588 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1589 "unknown Dell", STAC_922X_DELL_M81),
1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1591 "unknown Dell", STAC_922X_DELL_D82),
1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1593 "unknown Dell", STAC_922X_DELL_D81),
1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1595 "unknown Dell", STAC_922X_DELL_D81),
1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1597 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1598 {} /* terminator */
1599};
1600
3cc08dc6 1601static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1602 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1603 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1604 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1605 0x01c42190, 0x40000100,
3cc08dc6
MP		 1606};
1607
93ed1503 1608static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1609 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1610 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1611 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1612 0x40000100, 0x40000100
1613};
1614
93ed1503
TD		 1615static unsigned int d965_5st_pin_configs[14] = {
1616 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1617 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1618 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1619 0x40000100, 0x40000100
1620};
1621
4ff076e5
TD		 1622static unsigned int dell_3st_pin_configs[14] = {
1623 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1624 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1625 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1626 0x40c003fc, 0x40000100
1627};
1628
93ed1503 1629static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1630 [STAC_D965_REF] = ref927x_pin_configs,
1631 [STAC_D965_3ST] = d965_3st_pin_configs,
1632 [STAC_D965_5ST] = d965_5st_pin_configs,
1633 [STAC_DELL_3ST] = dell_3st_pin_configs,
1634 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1635};
1636
f5fcc13c 1637static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1638 [STAC_D965_REF] = "ref",
1639 [STAC_D965_3ST] = "3stack",
1640 [STAC_D965_5ST] = "5stack",
1641 [STAC_DELL_3ST] = "dell-3stack",
1642 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1643};
1644
1645static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1646 /* SigmaTel reference board */
1647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1648 "DFI LanParty", STAC_D965_REF),
81d3dbde 1649 /* Intel 946 based systems */
f5fcc13c
TI		 1650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1652 /* 965 based 3 stack systems */
f5fcc13c
TI		 1653 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1669 /* Dell 3 stack systems */
8e9068b1 1670 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1672 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1674 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1675 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1677 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1683 /* 965 based 5 stack systems */
f5fcc13c
TI		 1684 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1685 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1691 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1693 {} /* terminator */
1694};
1695
f3302a59
MP		 1696static unsigned int ref9205_pin_configs[12] = {
1697 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1698 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1699 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1700};
1701
dfe495d0
TI		 1702/*
1703 STAC 9205 pin configs for
1704 102801F1
1705 102801F2
1706 102801FC
1707 102801FD
1708 10280204
1709 1028021F
3fa2ef74 1710 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1711*/
1712static unsigned int dell_9205_m42_pin_configs[12] = {
1713 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1714 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1715 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1716};
1717
1718/*
1719 STAC 9205 pin configs for
1720 102801F9
1721 102801FA
1722 102801FE
1723 102801FF (Dell Precision M4300)
1724 10280206
1725 10280200
1726 10280201
1727*/
1728static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1729 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1730 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1731 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1732};
1733
dfe495d0 1734static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1735 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1736 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1737 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1738};
1739
f5fcc13c 1740static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1741 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1742 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1743 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1744 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1745};
1746
f5fcc13c
TI		 1747static const char *stac9205_models[STAC_9205_MODELS] = {
1748 [STAC_9205_REF] = "ref",
dfe495d0 1749 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1750 [STAC_9205_DELL_M43] = "dell-m43",
1751 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1752};
1753
1754static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1755 /* SigmaTel reference board */
1756 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1757 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1759 "unknown Dell", STAC_9205_DELL_M42),
1760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1761 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 1763 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1765 "Dell Precision", STAC_9205_DELL_M43),
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1767 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1769 "unknown Dell", STAC_9205_DELL_M42),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1771 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1773 "Dell Precision", STAC_9205_DELL_M43),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1775 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1777 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1779 "Dell Precision", STAC_9205_DELL_M43),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1781 "Dell Precision", STAC_9205_DELL_M43),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1783 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1785 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1787 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1788 {} /* terminator */
1789};
1790
11b44bbd
RF		 1791static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1792{
1793 int i;
1794 struct sigmatel_spec *spec = codec->spec;
1795
1796 if (! spec->bios_pin_configs) {
1797 spec->bios_pin_configs = kcalloc(spec->num_pins,
1798 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1799 if (! spec->bios_pin_configs)
1800 return -ENOMEM;
1801 }
1802
1803 for (i = 0; i < spec->num_pins; i++) {
1804 hda_nid_t nid = spec->pin_nids[i];
1805 unsigned int pin_cfg;
1806
1807 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1808 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1809 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1810 nid, pin_cfg);
1811 spec->bios_pin_configs[i] = pin_cfg;
1812 }
1813
1814 return 0;
1815}
1816
87d48363
MR		 1817static void stac92xx_set_config_reg(struct hda_codec *codec,
1818 hda_nid_t pin_nid, unsigned int pin_config)
1819{
1820 int i;
1821 snd_hda_codec_write(codec, pin_nid, 0,
1822 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1823 pin_config & 0x000000ff);
1824 snd_hda_codec_write(codec, pin_nid, 0,
1825 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1826 (pin_config & 0x0000ff00) >> 8);
1827 snd_hda_codec_write(codec, pin_nid, 0,
1828 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1829 (pin_config & 0x00ff0000) >> 16);
1830 snd_hda_codec_write(codec, pin_nid, 0,
1831 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1832 pin_config >> 24);
1833 i = snd_hda_codec_read(codec, pin_nid, 0,
1834 AC_VERB_GET_CONFIG_DEFAULT,
1835 0x00);
1836 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1837 pin_nid, i);
1838}
1839
2f2f4251
M		 1840static void stac92xx_set_config_regs(struct hda_codec *codec)
1841{
1842 int i;
1843 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1844
87d48363
MR		 1845 if (!spec->pin_configs)
1846 return;
11b44bbd 1847
87d48363
MR		 1848 for (i = 0; i < spec->num_pins; i++)
1849 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1850 spec->pin_configs[i]);
2f2f4251 1851}
2f2f4251 1852
dabbed6f 1853/*
c7d4b2fa 1854 * Analog playback callbacks
dabbed6f 1855 */
c7d4b2fa
M		 1856static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1857 struct hda_codec *codec,
c8b6bf9b 1858 struct snd_pcm_substream *substream)
2f2f4251 1859{
dabbed6f 1860 struct sigmatel_spec *spec = codec->spec;
9a08160b
TI		 1861 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1862 hinfo);
2f2f4251
M		 1863}
1864
2f2f4251
M		 1865static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1866 struct hda_codec *codec,
1867 unsigned int stream_tag,
1868 unsigned int format,
c8b6bf9b 1869 struct snd_pcm_substream *substream)
2f2f4251
M		 1870{
1871 struct sigmatel_spec *spec = codec->spec;
403d1944 1872 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1873}
1874
1875static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1876 struct hda_codec *codec,
c8b6bf9b 1877 struct snd_pcm_substream *substream)
2f2f4251
M		 1878{
1879 struct sigmatel_spec *spec = codec->spec;
1880 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1881}
1882
dabbed6f
M		 1883/*
1884 * Digital playback callbacks
1885 */
1886static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1887 struct hda_codec *codec,
c8b6bf9b 1888 struct snd_pcm_substream *substream)
dabbed6f
M		 1889{
1890 struct sigmatel_spec *spec = codec->spec;
1891 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1892}
1893
1894static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1895 struct hda_codec *codec,
c8b6bf9b 1896 struct snd_pcm_substream *substream)
dabbed6f
M		 1897{
1898 struct sigmatel_spec *spec = codec->spec;
1899 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1900}
1901
6b97eb45
TI		 1902static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1903 struct hda_codec *codec,
1904 unsigned int stream_tag,
1905 unsigned int format,
1906 struct snd_pcm_substream *substream)
1907{
1908 struct sigmatel_spec *spec = codec->spec;
1909 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1910 stream_tag, format, substream);
1911}
1912
dabbed6f 1913
2f2f4251
M		 1914/*
1915 * Analog capture callbacks
1916 */
1917static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1918 struct hda_codec *codec,
1919 unsigned int stream_tag,
1920 unsigned int format,
c8b6bf9b 1921 struct snd_pcm_substream *substream)
2f2f4251
M		 1922{
1923 struct sigmatel_spec *spec = codec->spec;
1924
1925 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1926 stream_tag, 0, format);
1927 return 0;
1928}
1929
1930static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1931 struct hda_codec *codec,
c8b6bf9b 1932 struct snd_pcm_substream *substream)
2f2f4251
M		 1933{
1934 struct sigmatel_spec *spec = codec->spec;
1935
888afa15 1936 snd_hda_codec_cleanup_stream(codec, spec->adc_nids[substream->number]);
2f2f4251
M		 1937 return 0;
1938}
1939
dabbed6f
M		 1940static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1941 .substreams = 1,
1942 .channels_min = 2,
1943 .channels_max = 2,
1944 /* NID is set in stac92xx_build_pcms */
1945 .ops = {
1946 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1947 .close = stac92xx_dig_playback_pcm_close,
1948 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1949 },
1950};
1951
1952static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1953 .substreams = 1,
1954 .channels_min = 2,
1955 .channels_max = 2,
1956 /* NID is set in stac92xx_build_pcms */
1957};
1958
2f2f4251
M		 1959static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1960 .substreams = 1,
1961 .channels_min = 2,
c7d4b2fa 1962 .channels_max = 8,
2f2f4251
M		 1963 .nid = 0x02, /* NID to query formats and rates */
1964 .ops = {
1965 .open = stac92xx_playback_pcm_open,
1966 .prepare = stac92xx_playback_pcm_prepare,
1967 .cleanup = stac92xx_playback_pcm_cleanup
1968 },
1969};
1970
3cc08dc6
MP		 1971static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1972 .substreams = 1,
1973 .channels_min = 2,
1974 .channels_max = 2,
1975 .nid = 0x06, /* NID to query formats and rates */
1976 .ops = {
1977 .open = stac92xx_playback_pcm_open,
1978 .prepare = stac92xx_playback_pcm_prepare,
1979 .cleanup = stac92xx_playback_pcm_cleanup
1980 },
1981};
1982
2f2f4251 1983static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1984 .channels_min = 2,
1985 .channels_max = 2,
9e05b7a3 1986 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1987 .ops = {
1988 .prepare = stac92xx_capture_pcm_prepare,
1989 .cleanup = stac92xx_capture_pcm_cleanup
1990 },
1991};
1992
1993static int stac92xx_build_pcms(struct hda_codec *codec)
1994{
1995 struct sigmatel_spec *spec = codec->spec;
1996 struct hda_pcm *info = spec->pcm_rec;
1997
1998 codec->num_pcms = 1;
1999 codec->pcm_info = info;
2000
c7d4b2fa 2001 info->name = "STAC92xx Analog";
2f2f4251 2002 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2003 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2004 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2005 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2006
2007 if (spec->alt_switch) {
2008 codec->num_pcms++;
2009 info++;
2010 info->name = "STAC92xx Analog Alt";
2011 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2012 }
2f2f4251 2013
dabbed6f
M		 2014 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2015 codec->num_pcms++;
2016 info++;
2017 info->name = "STAC92xx Digital";
7ba72ba1 2018 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2019 if (spec->multiout.dig_out_nid) {
2020 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2021 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2022 }
2023 if (spec->dig_in_nid) {
2024 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2025 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2026 }
2027 }
2028
2f2f4251
M		 2029 return 0;
2030}
2031
c960a03b
TI		 2032static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2033{
2034 unsigned int pincap = snd_hda_param_read(codec, nid,
2035 AC_PAR_PIN_CAP);
2036 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2037 if (pincap & AC_PINCAP_VREF_100)
2038 return AC_PINCTL_VREF_100;
2039 if (pincap & AC_PINCAP_VREF_80)
2040 return AC_PINCTL_VREF_80;
2041 if (pincap & AC_PINCAP_VREF_50)
2042 return AC_PINCTL_VREF_50;
2043 if (pincap & AC_PINCAP_VREF_GRD)
2044 return AC_PINCTL_VREF_GRD;
2045 return 0;
2046}
2047
403d1944
MP		 2048static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2049
2050{
82beb8fd
TI		 2051 snd_hda_codec_write_cache(codec, nid, 0,
2052 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2053}
2054
7c2ba97b
MR		 2055#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2056
2057static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2058 struct snd_ctl_elem_value *ucontrol)
2059{
2060 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2061 struct sigmatel_spec *spec = codec->spec;
2062
2063 ucontrol->value.integer.value[0] = spec->hp_switch;
2064 return 0;
2065}
2066
2067static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2068 struct snd_ctl_elem_value *ucontrol)
2069{
2070 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2071 struct sigmatel_spec *spec = codec->spec;
2072
2073 spec->hp_switch = ucontrol->value.integer.value[0];
2074
2075 /* check to be sure that the ports are upto date with
2076 * switch changes
2077 */
2078 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2079
2080 return 1;
2081}
2082
a5ce8890 2083#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2084
2085static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2086{
2087 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2088 struct sigmatel_spec *spec = codec->spec;
2089 int io_idx = kcontrol-> private_value & 0xff;
2090
2091 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2092 return 0;
2093}
2094
2095static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2096{
2097 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2098 struct sigmatel_spec *spec = codec->spec;
2099 hda_nid_t nid = kcontrol->private_value >> 8;
2100 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2101 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2102
2103 spec->io_switch[io_idx] = val;
2104
2105 if (val)
2106 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2107 else {
2108 unsigned int pinctl = AC_PINCTL_IN_EN;
2109 if (io_idx) /* set VREF for mic */
2110 pinctl |= stac92xx_get_vref(codec, nid);
2111 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2112 }
40c1d308
JZ		 2113
2114 /* check the auto-mute again: we need to mute/unmute the speaker
2115 * appropriately according to the pin direction
2116 */
2117 if (spec->hp_detect)
2118 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2119
403d1944
MP		 2120 return 1;
2121}
2122
0fb87bb4
ML		 2123#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2124
2125static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2126 struct snd_ctl_elem_value *ucontrol)
2127{
2128 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2129 struct sigmatel_spec *spec = codec->spec;
2130
2131 ucontrol->value.integer.value[0] = spec->clfe_swap;
2132 return 0;
2133}
2134
2135static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2136 struct snd_ctl_elem_value *ucontrol)
2137{
2138 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2139 struct sigmatel_spec *spec = codec->spec;
2140 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2141 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2142
68ea7b2f 2143 if (spec->clfe_swap == val)
0fb87bb4
ML		 2144 return 0;
2145
68ea7b2f 2146 spec->clfe_swap = val;
0fb87bb4
ML		 2147
2148 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2149 spec->clfe_swap ? 0x4 : 0x0);
2150
2151 return 1;
2152}
2153
7c2ba97b
MR		 2154#define STAC_CODEC_HP_SWITCH(xname) \
2155 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2156 .name = xname, \
2157 .index = 0, \
2158 .info = stac92xx_hp_switch_info, \
2159 .get = stac92xx_hp_switch_get, \
2160 .put = stac92xx_hp_switch_put, \
2161 }
2162
403d1944
MP		 2163#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2164 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2165 .name = xname, \
2166 .index = 0, \
2167 .info = stac92xx_io_switch_info, \
2168 .get = stac92xx_io_switch_get, \
2169 .put = stac92xx_io_switch_put, \
2170 .private_value = xpval, \
2171 }
2172
0fb87bb4
ML		 2173#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2174 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2175 .name = xname, \
2176 .index = 0, \
2177 .info = stac92xx_clfe_switch_info, \
2178 .get = stac92xx_clfe_switch_get, \
2179 .put = stac92xx_clfe_switch_put, \
2180 .private_value = xpval, \
2181 }
403d1944 2182
c7d4b2fa
M		 2183enum {
2184 STAC_CTL_WIDGET_VOL,
2185 STAC_CTL_WIDGET_MUTE,
09a99959 2186 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2187 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2188 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2189 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2190};
2191
c8b6bf9b 2192static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2193 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2194 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2195 STAC_MONO_MUX,
7c2ba97b 2196 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2197 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2198 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2199};
2200
2201/* add dynamic controls */
2202static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2203{
c8b6bf9b 2204 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2205
2206 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2207 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2208
2209 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2210 if (! knew)
2211 return -ENOMEM;
2212 if (spec->kctl_alloc) {
2213 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2214 kfree(spec->kctl_alloc);
2215 }
2216 spec->kctl_alloc = knew;
2217 spec->num_kctl_alloc = num;
2218 }
2219
2220 knew = &spec->kctl_alloc[spec->num_kctl_used];
2221 *knew = stac92xx_control_templates[type];
82fe0c58 2222 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2223 if (! knew->name)
2224 return -ENOMEM;
2225 knew->private_value = val;
2226 spec->num_kctl_used++;
2227 return 0;
2228}
2229
403d1944
MP		 2230/* flag inputs as additional dynamic lineouts */
2231static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2232{
2233 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2234 unsigned int wcaps, wtype;
2235 int i, num_dacs = 0;
2236
2237 /* use the wcaps cache to count all DACs available for line-outs */
2238 for (i = 0; i < codec->num_nodes; i++) {
2239 wcaps = codec->wcaps[i];
2240 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2241
7b043899
SL		 2242 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2243 num_dacs++;
2244 }
403d1944 2245
7b043899
SL		 2246 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2247
403d1944
MP		 2248 switch (cfg->line_outs) {
2249 case 3:
2250 /* add line-in as side */
7b043899 2251 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2252 cfg->line_out_pins[cfg->line_outs] =
2253 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2254 spec->line_switch = 1;
2255 cfg->line_outs++;
2256 }
2257 break;
2258 case 2:
2259 /* add line-in as clfe and mic as side */
7b043899 2260 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2261 cfg->line_out_pins[cfg->line_outs] =
2262 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2263 spec->line_switch = 1;
2264 cfg->line_outs++;
2265 }
7b043899 2266 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2267 cfg->line_out_pins[cfg->line_outs] =
2268 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2269 spec->mic_switch = 1;
2270 cfg->line_outs++;
2271 }
2272 break;
2273 case 1:
2274 /* add line-in as surr and mic as clfe */
7b043899 2275 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2276 cfg->line_out_pins[cfg->line_outs] =
2277 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2278 spec->line_switch = 1;
2279 cfg->line_outs++;
2280 }
7b043899 2281 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2282 cfg->line_out_pins[cfg->line_outs] =
2283 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2284 spec->mic_switch = 1;
2285 cfg->line_outs++;
2286 }
2287 break;
2288 }
2289
2290 return 0;
2291}
2292
7b043899
SL		 2293
2294static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2295{
2296 int i;
2297
2298 for (i = 0; i < spec->multiout.num_dacs; i++) {
2299 if (spec->multiout.dac_nids[i] == nid)
2300 return 1;
2301 }
2302
2303 return 0;
2304}
2305
3cc08dc6 2306/*
7b043899
SL		 2307 * Fill in the dac_nids table from the parsed pin configuration
2308 * This function only works when every pin in line_out_pins[]
2309 * contains atleast one DAC in its connection list. Some 92xx
2310 * codecs are not connected directly to a DAC, such as the 9200
2311 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2312 */
19039bd0 2313static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2314 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2315{
2316 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2317 int i, j, conn_len = 0;
2318 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2319 unsigned int wcaps, wtype;
2320
c7d4b2fa
M		 2321 for (i = 0; i < cfg->line_outs; i++) {
2322 nid = cfg->line_out_pins[i];
7b043899
SL		 2323 conn_len = snd_hda_get_connections(codec, nid, conn,
2324 HDA_MAX_CONNECTIONS);
2325 for (j = 0; j < conn_len; j++) {
2326 wcaps = snd_hda_param_read(codec, conn[j],
2327 AC_PAR_AUDIO_WIDGET_CAP);
2328 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2329 if (wtype != AC_WID_AUD_OUT ||
2330 (wcaps & AC_WCAP_DIGITAL))
2331 continue;
2332 /* conn[j] is a DAC routed to this line-out */
2333 if (!is_in_dac_nids(spec, conn[j]))
2334 break;
2335 }
2336
2337 if (j == conn_len) {
df802952
TI		 2338 if (spec->multiout.num_dacs > 0) {
2339 /* we have already working output pins,
2340 * so let's drop the broken ones again
2341 */
2342 cfg->line_outs = spec->multiout.num_dacs;
2343 break;
2344 }
7b043899
SL		 2345 /* error out, no available DAC found */
2346 snd_printk(KERN_ERR
2347 "%s: No available DAC for pin 0x%x\n",
2348 __func__, nid);
2349 return -ENODEV;
2350 }
2351
2352 spec->multiout.dac_nids[i] = conn[j];
2353 spec->multiout.num_dacs++;
2354 if (conn_len > 1) {
2355 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2356 snd_hda_codec_write_cache(codec, nid, 0,
2357 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2358
7b043899
SL		 2359 }
2360 }
c7d4b2fa 2361
7b043899
SL		 2362 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2363 spec->multiout.num_dacs,
2364 spec->multiout.dac_nids[0],
2365 spec->multiout.dac_nids[1],
2366 spec->multiout.dac_nids[2],
2367 spec->multiout.dac_nids[3],
2368 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2369 return 0;
2370}
2371
eb06ed8f
TI		 2372/* create volume control/switch for the given prefx type */
2373static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2374{
2375 char name[32];
2376 int err;
2377
2378 sprintf(name, "%s Playback Volume", pfx);
2379 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2380 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2381 if (err < 0)
2382 return err;
2383 sprintf(name, "%s Playback Switch", pfx);
2384 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2385 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2386 if (err < 0)
2387 return err;
2388 return 0;
2389}
2390
ae0afd81
MR		 2391static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2392{
2393 if (!spec->multiout.hp_nid)
2394 spec->multiout.hp_nid = nid;
2395 else if (spec->multiout.num_dacs > 4) {
2396 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2397 return 1;
2398 } else {
2399 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2400 spec->multiout.num_dacs++;
2401 }
2402 return 0;
2403}
2404
2405static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2406{
2407 if (is_in_dac_nids(spec, nid))
2408 return 1;
2409 if (spec->multiout.hp_nid == nid)
2410 return 1;
2411 return 0;
2412}
2413
c7d4b2fa 2414/* add playback controls from the parsed DAC table */
0fb87bb4 2415static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2416 const struct auto_pin_cfg *cfg)
c7d4b2fa 2417{
19039bd0
TI		 2418 static const char *chname[4] = {
2419 "Front", "Surround", NULL /*CLFE*/, "Side"
2420 };
c7d4b2fa
M		 2421 hda_nid_t nid;
2422 int i, err;
2423
0fb87bb4 2424 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2425 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2426
2427
40ac8c4f 2428 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2429 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2430 continue;
2431
2432 nid = spec->multiout.dac_nids[i];
2433
2434 if (i == 2) {
2435 /* Center/LFE */
eb06ed8f
TI		 2436 err = create_controls(spec, "Center", nid, 1);
2437 if (err < 0)
c7d4b2fa 2438 return err;
eb06ed8f
TI		 2439 err = create_controls(spec, "LFE", nid, 2);
2440 if (err < 0)
c7d4b2fa 2441 return err;
0fb87bb4
ML		 2442
2443 wid_caps = get_wcaps(codec, nid);
2444
2445 if (wid_caps & AC_WCAP_LR_SWAP) {
2446 err = stac92xx_add_control(spec,
2447 STAC_CTL_WIDGET_CLFE_SWITCH,
2448 "Swap Center/LFE Playback Switch", nid);
2449
2450 if (err < 0)
2451 return err;
2452 }
2453
c7d4b2fa 2454 } else {
eb06ed8f
TI		 2455 err = create_controls(spec, chname[i], nid, 3);
2456 if (err < 0)
c7d4b2fa
M		 2457 return err;
2458 }
2459 }
2460
7c2ba97b
MR		 2461 if (cfg->hp_outs > 1) {
2462 err = stac92xx_add_control(spec,
2463 STAC_CTL_WIDGET_HP_SWITCH,
2464 "Headphone as Line Out Switch", 0);
2465 if (err < 0)
2466 return err;
2467 }
2468
b5895dc8
MR		 2469 if (spec->line_switch) {
2470 nid = cfg->input_pins[AUTO_PIN_LINE];
2471 pincap = snd_hda_param_read(codec, nid,
2472 AC_PAR_PIN_CAP);
2473 if (pincap & AC_PINCAP_OUT) {
2474 err = stac92xx_add_control(spec,
2475 STAC_CTL_WIDGET_IO_SWITCH,
2476 "Line In as Output Switch", nid << 8);
2477 if (err < 0)
2478 return err;
2479 }
2480 }
403d1944 2481
b5895dc8 2482 if (spec->mic_switch) {
cace16f1 2483 unsigned int def_conf;
ae0afd81
MR		 2484 unsigned int mic_pin = AUTO_PIN_MIC;
2485again:
2486 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2487 def_conf = snd_hda_codec_read(codec, nid, 0,
2488 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2489 /* some laptops have an internal analog microphone
2490 * which can't be used as a output */
2491 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2492 pincap = snd_hda_param_read(codec, nid,
2493 AC_PAR_PIN_CAP);
2494 if (pincap & AC_PINCAP_OUT) {
2495 err = stac92xx_add_control(spec,
2496 STAC_CTL_WIDGET_IO_SWITCH,
2497 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2498 nid = snd_hda_codec_read(codec, nid, 0,
2499 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2500 if (!check_in_dac_nids(spec, nid))
2501 add_spec_dacs(spec, nid);
cace16f1
MR		 2502 if (err < 0)
2503 return err;
2504 }
ae0afd81
MR		 2505 } else if (mic_pin == AUTO_PIN_MIC) {
2506 mic_pin = AUTO_PIN_FRONT_MIC;
2507 goto again;
b5895dc8
MR		 2508 }
2509 }
403d1944 2510
c7d4b2fa
M		 2511 return 0;
2512}
2513
eb06ed8f
TI		 2514/* add playback controls for Speaker and HP outputs */
2515static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2516 struct auto_pin_cfg *cfg)
2517{
2518 struct sigmatel_spec *spec = codec->spec;
2519 hda_nid_t nid;
2520 int i, old_num_dacs, err;
2521
2522 old_num_dacs = spec->multiout.num_dacs;
2523 for (i = 0; i < cfg->hp_outs; i++) {
2524 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2525 if (wid_caps & AC_WCAP_UNSOL_CAP)
2526 spec->hp_detect = 1;
2527 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2528 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2529 if (check_in_dac_nids(spec, nid))
2530 nid = 0;
2531 if (! nid)
c7d4b2fa 2532 continue;
eb06ed8f
TI		 2533 add_spec_dacs(spec, nid);
2534 }
2535 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2536 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2537 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2538 if (check_in_dac_nids(spec, nid))
2539 nid = 0;
eb06ed8f
TI		 2540 if (! nid)
2541 continue;
2542 add_spec_dacs(spec, nid);
c7d4b2fa 2543 }
1b290a51
MR		 2544 for (i = 0; i < cfg->line_outs; i++) {
2545 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2546 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2547 if (check_in_dac_nids(spec, nid))
2548 nid = 0;
2549 if (! nid)
2550 continue;
2551 add_spec_dacs(spec, nid);
2552 }
eb06ed8f
TI		 2553 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2554 static const char *pfxs[] = {
2555 "Speaker", "External Speaker", "Speaker2",
2556 };
2557 err = create_controls(spec, pfxs[i - old_num_dacs],
2558 spec->multiout.dac_nids[i], 3);
2559 if (err < 0)
2560 return err;
2561 }
2562 if (spec->multiout.hp_nid) {
2626a263
TI		 2563 err = create_controls(spec, "Headphone",
2564 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 2565 if (err < 0)
2566 return err;
2567 }
c7d4b2fa
M		 2568
2569 return 0;
2570}
2571
b22b4821
MR		 2572/* labels for mono mux outputs */
2573static const char *stac92xx_mono_labels[3] = {
2574 "DAC0", "DAC1", "Mixer"
2575};
2576
2577/* create mono mux for mono out on capable codecs */
2578static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2579{
2580 struct sigmatel_spec *spec = codec->spec;
2581 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2582 int i, num_cons;
2583 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2584
2585 num_cons = snd_hda_get_connections(codec,
2586 spec->mono_nid,
2587 con_lst,
2588 HDA_MAX_NUM_INPUTS);
2589 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2590 return -EINVAL;
2591
2592 for (i = 0; i < num_cons; i++) {
2593 mono_mux->items[mono_mux->num_items].label =
2594 stac92xx_mono_labels[i];
2595 mono_mux->items[mono_mux->num_items].index = i;
2596 mono_mux->num_items++;
2597 }
09a99959
MR		 2598
2599 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2600 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2601}
2602
8b65727b 2603/* labels for dmic mux inputs */
ddc2cec4 2604static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2605 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2606 "Digital Mic 3", "Digital Mic 4"
2607};
2608
2609/* create playback/capture controls for input pins on dmic capable codecs */
2610static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2611 const struct auto_pin_cfg *cfg)
2612{
2613 struct sigmatel_spec *spec = codec->spec;
2614 struct hda_input_mux *dimux = &spec->private_dimux;
2615 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2616 int err, i, j;
2617 char name[32];
8b65727b
MP		 2618
2619 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2620 dimux->items[dimux->num_items].index = 0;
2621 dimux->num_items++;
2622
2623 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2624 hda_nid_t nid;
8b65727b
MP		 2625 int index;
2626 int num_cons;
0678accd 2627 unsigned int wcaps;
8b65727b
MP		 2628 unsigned int def_conf;
2629
2630 def_conf = snd_hda_codec_read(codec,
2631 spec->dmic_nids[i],
2632 0,
2633 AC_VERB_GET_CONFIG_DEFAULT,
2634 0);
2635 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2636 continue;
2637
0678accd 2638 nid = spec->dmic_nids[i];
8b65727b 2639 num_cons = snd_hda_get_connections(codec,
e1f0d669 2640 spec->dmux_nids[0],
8b65727b
MP		 2641 con_lst,
2642 HDA_MAX_NUM_INPUTS);
2643 for (j = 0; j < num_cons; j++)
0678accd 2644 if (con_lst[j] == nid) {
8b65727b
MP		 2645 index = j;
2646 goto found;
2647 }
2648 continue;
2649found:
0678accd
MR		 2650 wcaps = get_wcaps(codec, nid);
2651
2652 if (wcaps & AC_WCAP_OUT_AMP) {
2653 sprintf(name, "%s Capture Volume",
2654 stac92xx_dmic_labels[dimux->num_items]);
2655
2656 err = stac92xx_add_control(spec,
2657 STAC_CTL_WIDGET_VOL,
2658 name,
2659 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2660 if (err < 0)
2661 return err;
2662 }
2663
8b65727b
MP		 2664 dimux->items[dimux->num_items].label =
2665 stac92xx_dmic_labels[dimux->num_items];
2666 dimux->items[dimux->num_items].index = index;
2667 dimux->num_items++;
2668 }
2669
2670 return 0;
2671}
2672
c7d4b2fa
M		 2673/* create playback/capture controls for input pins */
2674static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2675{
2676 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2677 struct hda_input_mux *imux = &spec->private_imux;
2678 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2679 int i, j, k;
2680
2681 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2682 int index;
2683
2684 if (!cfg->input_pins[i])
2685 continue;
2686 index = -1;
2687 for (j = 0; j < spec->num_muxes; j++) {
2688 int num_cons;
2689 num_cons = snd_hda_get_connections(codec,
2690 spec->mux_nids[j],
2691 con_lst,
2692 HDA_MAX_NUM_INPUTS);
2693 for (k = 0; k < num_cons; k++)
2694 if (con_lst[k] == cfg->input_pins[i]) {
2695 index = k;
2696 goto found;
2697 }
c7d4b2fa 2698 }
314634bc
TI		 2699 continue;
2700 found:
2701 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2702 imux->items[imux->num_items].index = index;
2703 imux->num_items++;
c7d4b2fa
M		 2704 }
2705
7b043899 2706 if (imux->num_items) {
62fe78e9
SR		 2707 /*
2708 * Set the current input for the muxes.
2709 * The STAC9221 has two input muxes with identical source
2710 * NID lists. Hopefully this won't get confused.
2711 */
2712 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2713 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2714 AC_VERB_SET_CONNECT_SEL,
2715 imux->items[0].index);
62fe78e9
SR		 2716 }
2717 }
2718
c7d4b2fa
M		 2719 return 0;
2720}
2721
c7d4b2fa
M		 2722static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2723{
2724 struct sigmatel_spec *spec = codec->spec;
2725 int i;
2726
2727 for (i = 0; i < spec->autocfg.line_outs; i++) {
2728 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2729 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2730 }
2731}
2732
2733static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2734{
2735 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2736 int i;
c7d4b2fa 2737
eb06ed8f
TI		 2738 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2739 hda_nid_t pin;
2740 pin = spec->autocfg.hp_pins[i];
2741 if (pin) /* connect to front */
2742 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2743 }
2744 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2745 hda_nid_t pin;
2746 pin = spec->autocfg.speaker_pins[i];
2747 if (pin) /* connect to front */
2748 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2749 }
c7d4b2fa
M		 2750}
2751
3cc08dc6 2752static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2753{
2754 struct sigmatel_spec *spec = codec->spec;
2755 int err;
bcecd9bd 2756 int hp_speaker_swap = 0;
c7d4b2fa 2757
8b65727b
MP		 2758 if ((err = snd_hda_parse_pin_def_config(codec,
2759 &spec->autocfg,
2760 spec->dmic_nids)) < 0)
c7d4b2fa 2761 return err;
82bc955f 2762 if (! spec->autocfg.line_outs)
869264c4 2763 return 0; /* can't find valid pin config */
19039bd0 2764
bcecd9bd
JZ		 2765 /* If we have no real line-out pin and multiple hp-outs, HPs should
2766 * be set up as multi-channel outputs.
2767 */
2768 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2769 spec->autocfg.hp_outs > 1) {
2770 /* Copy hp_outs to line_outs, backup line_outs in
2771 * speaker_outs so that the following routines can handle
2772 * HP pins as primary outputs.
2773 */
2774 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2775 sizeof(spec->autocfg.line_out_pins));
2776 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2777 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2778 sizeof(spec->autocfg.hp_pins));
2779 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2780 hp_speaker_swap = 1;
2781 }
09a99959
MR		 2782 if (spec->autocfg.mono_out_pin) {
2783 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2784 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2785 u32 caps = query_amp_caps(codec,
2786 spec->autocfg.mono_out_pin, dir);
2787 hda_nid_t conn_list[1];
2788
2789 /* get the mixer node and then the mono mux if it exists */
2790 if (snd_hda_get_connections(codec,
2791 spec->autocfg.mono_out_pin, conn_list, 1) &&
2792 snd_hda_get_connections(codec, conn_list[0],
2793 conn_list, 1)) {
2794
2795 int wcaps = get_wcaps(codec, conn_list[0]);
2796 int wid_type = (wcaps & AC_WCAP_TYPE)
2797 >> AC_WCAP_TYPE_SHIFT;
2798 /* LR swap check, some stac925x have a mux that
2799 * changes the DACs output path instead of the
2800 * mono-mux path.
2801 */
2802 if (wid_type == AC_WID_AUD_SEL &&
2803 !(wcaps & AC_WCAP_LR_SWAP))
2804 spec->mono_nid = conn_list[0];
2805 }
2806 /* all mono outs have a least a mute/unmute switch */
2807 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2808 "Mono Playback Switch",
2809 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2810 1, 0, dir));
2811 if (err < 0)
2812 return err;
2813 /* check to see if there is volume support for the amp */
2814 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2815 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2816 "Mono Playback Volume",
2817 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2818 1, 0, dir));
2819 if (err < 0)
2820 return err;
2821 }
2822
2823 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2824 AC_PINCTL_OUT_EN);
2825 }
bcecd9bd 2826
403d1944
MP		 2827 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2828 return err;
19039bd0
TI		 2829 if (spec->multiout.num_dacs == 0)
2830 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2831 return err;
c7d4b2fa 2832
0fb87bb4
ML		 2833 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2834
2835 if (err < 0)
2836 return err;
2837
bcecd9bd
JZ		 2838 if (hp_speaker_swap == 1) {
2839 /* Restore the hp_outs and line_outs */
2840 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2841 sizeof(spec->autocfg.line_out_pins));
2842 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2843 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2844 sizeof(spec->autocfg.speaker_pins));
2845 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2846 memset(spec->autocfg.speaker_pins, 0,
2847 sizeof(spec->autocfg.speaker_pins));
2848 spec->autocfg.speaker_outs = 0;
2849 }
2850
0fb87bb4
ML		 2851 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2852
2853 if (err < 0)
2854 return err;
2855
2856 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2857
2858 if (err < 0)
c7d4b2fa
M		 2859 return err;
2860
b22b4821
MR		 2861 if (spec->mono_nid > 0) {
2862 err = stac92xx_auto_create_mono_output_ctls(codec);
2863 if (err < 0)
2864 return err;
2865 }
2866
8b65727b
MP		 2867 if (spec->num_dmics > 0)
2868 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2869 &spec->autocfg)) < 0)
2870 return err;
2871
c7d4b2fa 2872 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2873 if (spec->multiout.max_channels > 2)
c7d4b2fa 2874 spec->surr_switch = 1;
c7d4b2fa 2875
82bc955f 2876 if (spec->autocfg.dig_out_pin)
3cc08dc6 2877 spec->multiout.dig_out_nid = dig_out;
82bc955f 2878 if (spec->autocfg.dig_in_pin)
3cc08dc6 2879 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2880
2881 if (spec->kctl_alloc)
2882 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2883
2884 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2885 if (!spec->dinput_mux)
2886 spec->dinput_mux = &spec->private_dimux;
b22b4821 2887 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2888
2889 return 1;
2890}
2891
82bc955f
TI		 2892/* add playback controls for HP output */
2893static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2894 struct auto_pin_cfg *cfg)
2895{
2896 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2897 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2898 unsigned int wid_caps;
2899
2900 if (! pin)
2901 return 0;
2902
2903 wid_caps = get_wcaps(codec, pin);
505cb341 2904 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2905 spec->hp_detect = 1;
82bc955f
TI		 2906
2907 return 0;
2908}
2909
160ea0dc
RF		 2910/* add playback controls for LFE output */
2911static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2912 struct auto_pin_cfg *cfg)
2913{
2914 struct sigmatel_spec *spec = codec->spec;
2915 int err;
2916 hda_nid_t lfe_pin = 0x0;
2917 int i;
2918
2919 /*
2920 * search speaker outs and line outs for a mono speaker pin
2921 * with an amp. If one is found, add LFE controls
2922 * for it.
2923 */
2924 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2925 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 2926 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2927 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2928 if (wcaps == AC_WCAP_OUT_AMP)
2929 /* found a mono speaker with an amp, must be lfe */
2930 lfe_pin = pin;
2931 }
2932
2933 /* if speaker_outs is 0, then speakers may be in line_outs */
2934 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2935 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2936 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 2937 unsigned int defcfg;
8b551785 2938 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 2939 AC_VERB_GET_CONFIG_DEFAULT,
2940 0x00);
8b551785 2941 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 2942 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 2943 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2944 if (wcaps == AC_WCAP_OUT_AMP)
2945 /* found a mono speaker with an amp,
2946 must be lfe */
2947 lfe_pin = pin;
2948 }
2949 }
2950 }
2951
2952 if (lfe_pin) {
eb06ed8f 2953 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2954 if (err < 0)
2955 return err;
2956 }
2957
2958 return 0;
2959}
2960
c7d4b2fa
M		 2961static int stac9200_parse_auto_config(struct hda_codec *codec)
2962{
2963 struct sigmatel_spec *spec = codec->spec;
2964 int err;
2965
df694daa 2966 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2967 return err;
2968
2969 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2970 return err;
2971
82bc955f
TI		 2972 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2973 return err;
2974
160ea0dc
RF		 2975 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2976 return err;
2977
82bc955f 2978 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2979 spec->multiout.dig_out_nid = 0x05;
82bc955f 2980 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2981 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2982
2983 if (spec->kctl_alloc)
2984 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2985
2986 spec->input_mux = &spec->private_imux;
8b65727b 2987 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2988
2989 return 1;
2990}
2991
62fe78e9
SR		 2992/*
2993 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2994 * funky external mute control using GPIO pins.
2995 */
2996
76e1ddfb 2997static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2998 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2999{
3000 unsigned int gpiostate, gpiomask, gpiodir;
3001
3002 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3003 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3004 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3005
3006 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3007 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3008 gpiomask |= mask;
62fe78e9
SR		 3009
3010 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3011 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3012 gpiodir |= dir_mask;
62fe78e9 3013
76e1ddfb 3014 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3015 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3016
3017 snd_hda_codec_write(codec, codec->afg, 0,
3018 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3019 snd_hda_codec_read(codec, codec->afg, 0,
3020 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3021
3022 msleep(1);
3023
76e1ddfb
TI		 3024 snd_hda_codec_read(codec, codec->afg, 0,
3025 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3026}
3027
314634bc
TI		 3028static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3029 unsigned int event)
3030{
3031 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3032 snd_hda_codec_write_cache(codec, nid, 0,
3033 AC_VERB_SET_UNSOLICITED_ENABLE,
3034 (AC_USRSP_EN | event));
314634bc
TI		 3035}
3036
a64135a2
MR		 3037static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3038{
3039 int i;
3040 for (i = 0; i < cfg->hp_outs; i++)
3041 if (cfg->hp_pins[i] == nid)
3042 return 1; /* nid is a HP-Out */
3043
3044 return 0; /* nid is not a HP-Out */
3045};
3046
b76c850f
MR		 3047static void stac92xx_power_down(struct hda_codec *codec)
3048{
3049 struct sigmatel_spec *spec = codec->spec;
3050
3051 /* power down inactive DACs */
3052 hda_nid_t *dac;
3053 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3054 if (!is_in_dac_nids(spec, *dac) &&
3055 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3056 snd_hda_codec_write_cache(codec, *dac, 0,
3057 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3058}
3059
c7d4b2fa
M		 3060static int stac92xx_init(struct hda_codec *codec)
3061{
3062 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 3063 struct auto_pin_cfg *cfg = &spec->autocfg;
3064 int i;
c7d4b2fa 3065
c7d4b2fa
M		 3066 snd_hda_sequence_write(codec, spec->init);
3067
82bc955f
TI		 3068 /* set up pins */
3069 if (spec->hp_detect) {
505cb341 3070 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3071 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3072 enable_pin_detect(codec, cfg->hp_pins[i],
3073 STAC_HP_EVENT);
0a07acaf
TI		 3074 /* force to enable the first line-out; the others are set up
3075 * in unsol_event
3076 */
3077 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3078 AC_PINCTL_OUT_EN);
eb995a8c 3079 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3080 /* fake event to set up pins */
3081 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3082 } else {
3083 stac92xx_auto_init_multi_out(codec);
3084 stac92xx_auto_init_hp_out(codec);
3085 }
3086 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3087 hda_nid_t nid = cfg->input_pins[i];
3088 if (nid) {
3089 unsigned int pinctl = AC_PINCTL_IN_EN;
3090 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3091 pinctl |= stac92xx_get_vref(codec, nid);
3092 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3093 }
82bc955f 3094 }
a64135a2
MR		 3095 for (i = 0; i < spec->num_dmics; i++)
3096 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3097 AC_PINCTL_IN_EN);
3098 for (i = 0; i < spec->num_pwrs; i++) {
3099 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3100 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3101 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3102 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
bce6c2b5
MR		 3103 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3104 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
aafc4412 3105 def_conf = get_defcfg_connect(def_conf);
a64135a2
MR		 3106 /* outputs are only ports capable of power management
3107 * any attempts on powering down a input port cause the
3108 * referenced VREF to act quirky.
3109 */
3110 if (pinctl & AC_PINCTL_IN_EN)
3111 continue;
aafc4412
MR		 3112 /* skip any ports that don't have jacks since presence
3113 * detection is useless */
3114 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
bce6c2b5 3115 continue;
a64135a2
MR		 3116 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3117 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3118 }
b76c850f
MR		 3119 if (spec->dac_list)
3120 stac92xx_power_down(codec);
82bc955f
TI		 3121 if (cfg->dig_out_pin)
3122 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3123 AC_PINCTL_OUT_EN);
3124 if (cfg->dig_in_pin)
3125 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3126 AC_PINCTL_IN_EN);
3127
4fe5195c
MR		 3128 stac_gpio_set(codec, spec->gpio_mask,
3129 spec->gpio_dir, spec->gpio_data);
62fe78e9 3130
c7d4b2fa
M		 3131 return 0;
3132}
3133
2f2f4251
M		 3134static void stac92xx_free(struct hda_codec *codec)
3135{
c7d4b2fa
M		 3136 struct sigmatel_spec *spec = codec->spec;
3137 int i;
3138
3139 if (! spec)
3140 return;
3141
3142 if (spec->kctl_alloc) {
3143 for (i = 0; i < spec->num_kctl_used; i++)
3144 kfree(spec->kctl_alloc[i].name);
3145 kfree(spec->kctl_alloc);
3146 }
3147
11b44bbd
RF		 3148 if (spec->bios_pin_configs)
3149 kfree(spec->bios_pin_configs);
3150
c7d4b2fa 3151 kfree(spec);
2f2f4251
M		 3152}
3153
4e55096e
M		 3154static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3155 unsigned int flag)
3156{
3157 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3158 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3159
f9acba43
TI		 3160 if (pin_ctl & AC_PINCTL_IN_EN) {
3161 /*
3162 * we need to check the current set-up direction of
3163 * shared input pins since they can be switched via
3164 * "xxx as Output" mixer switch
3165 */
3166 struct sigmatel_spec *spec = codec->spec;
3167 struct auto_pin_cfg *cfg = &spec->autocfg;
3168 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3169 spec->line_switch) ||
3170 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3171 spec->mic_switch))
3172 return;
3173 }
3174
7b043899
SL		 3175 /* if setting pin direction bits, clear the current
3176 direction bits first */
3177 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3178 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3179
82beb8fd 3180 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3181 AC_VERB_SET_PIN_WIDGET_CONTROL,
3182 pin_ctl | flag);
3183}
3184
3185static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3186 unsigned int flag)
3187{
3188 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3189 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3190 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3191 AC_VERB_SET_PIN_WIDGET_CONTROL,
3192 pin_ctl & ~flag);
3193}
3194
40c1d308 3195static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3196{
3197 if (!nid)
3198 return 0;
3199 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3200 & (1 << 31)) {
3201 unsigned int pinctl;
3202 pinctl = snd_hda_codec_read(codec, nid, 0,
3203 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3204 if (pinctl & AC_PINCTL_IN_EN)
3205 return 0; /* mic- or line-input */
3206 else
3207 return 1; /* HP-output */
3208 }
314634bc
TI		 3209 return 0;
3210}
3211
3212static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3213{
3214 struct sigmatel_spec *spec = codec->spec;
3215 struct auto_pin_cfg *cfg = &spec->autocfg;
7c2ba97b 3216 int nid = cfg->hp_pins[cfg->hp_outs - 1];
4e55096e
M		 3217 int i, presence;
3218
eb06ed8f 3219 presence = 0;
4fe5195c
MR		 3220 if (spec->gpio_mute)
3221 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3222 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3223
eb06ed8f 3224 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3225 if (presence)
3226 break;
7c2ba97b
MR		 3227 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3228 break;
4fe5195c 3229 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3230 }
4e55096e
M		 3231
3232 if (presence) {
3233 /* disable lineouts, enable hp */
7c2ba97b
MR		 3234 if (spec->hp_switch)
3235 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3236 for (i = 0; i < cfg->line_outs; i++)
3237 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3238 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3239 for (i = 0; i < cfg->speaker_outs; i++)
3240 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3241 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3242 if (spec->eapd_mask)
3243 stac_gpio_set(codec, spec->gpio_mask,
3244 spec->gpio_dir, spec->gpio_data &
3245 ~spec->eapd_mask);
4e55096e
M		 3246 } else {
3247 /* enable lineouts, disable hp */
7c2ba97b
MR		 3248 if (spec->hp_switch)
3249 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3250 for (i = 0; i < cfg->line_outs; i++)
3251 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3252 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3253 for (i = 0; i < cfg->speaker_outs; i++)
3254 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3255 AC_PINCTL_OUT_EN);
0fc9dec4
MR		 3256 if (spec->eapd_mask)
3257 stac_gpio_set(codec, spec->gpio_mask,
3258 spec->gpio_dir, spec->gpio_data |
3259 spec->eapd_mask);
4e55096e 3260 }
7c2ba97b
MR		 3261 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3262 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
4e55096e
M		 3263}
3264
a64135a2
MR		 3265static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3266{
3267 struct sigmatel_spec *spec = codec->spec;
3268 hda_nid_t nid = spec->pwr_nids[idx];
3269 int presence, val;
3270 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3271 & 0x000000ff;
3272 presence = get_hp_pin_presence(codec, nid);
3273 idx = 1 << idx;
3274
3275 if (presence)
3276 val &= ~idx;
3277 else
3278 val |= idx;
3279
3280 /* power down unused output ports */
3281 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3282};
3283
314634bc
TI		 3284static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3285{
a64135a2
MR		 3286 struct sigmatel_spec *spec = codec->spec;
3287 int idx = res >> 26 & 0x0f;
3288
3289 switch ((res >> 26) & 0x30) {
314634bc
TI		 3290 case STAC_HP_EVENT:
3291 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3292 /* fallthru */
3293 case STAC_PWR_EVENT:
3294 if (spec->num_pwrs > 0)
3295 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3296 }
3297}
3298
cb53c626 3299#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3300static int stac92xx_resume(struct hda_codec *codec)
3301{
dc81bed1
TI		 3302 struct sigmatel_spec *spec = codec->spec;
3303
11b44bbd 3304 stac92xx_set_config_regs(codec);
dc81bed1 3305 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3306 stac_gpio_set(codec, spec->gpio_mask,
3307 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3308 snd_hda_codec_resume_amp(codec);
3309 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 3310 /* power down inactive DACs */
3311 if (spec->dac_list)
3312 stac92xx_power_down(codec);
dc81bed1
TI		 3313 /* invoke unsolicited event to reset the HP state */
3314 if (spec->hp_detect)
3315 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3316 return 0;
3317}
3318#endif
3319
2f2f4251
M		 3320static struct hda_codec_ops stac92xx_patch_ops = {
3321 .build_controls = stac92xx_build_controls,
3322 .build_pcms = stac92xx_build_pcms,
3323 .init = stac92xx_init,
3324 .free = stac92xx_free,
4e55096e 3325 .unsol_event = stac92xx_unsol_event,
cb53c626 3326#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3327 .resume = stac92xx_resume,
3328#endif
2f2f4251
M		 3329};
3330
3331static int patch_stac9200(struct hda_codec *codec)
3332{
3333 struct sigmatel_spec *spec;
c7d4b2fa 3334 int err;
2f2f4251 3335
e560d8d8 3336 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3337 if (spec == NULL)
3338 return -ENOMEM;
3339
3340 codec->spec = spec;
a4eed138 3341 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3342 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3343 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3344 stac9200_models,
3345 stac9200_cfg_tbl);
11b44bbd
RF		 3346 if (spec->board_config < 0) {
3347 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3348 err = stac92xx_save_bios_config_regs(codec);
3349 if (err < 0) {
3350 stac92xx_free(codec);
3351 return err;
3352 }
3353 spec->pin_configs = spec->bios_pin_configs;
3354 } else {
403d1944
MP		 3355 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3356 stac92xx_set_config_regs(codec);
3357 }
2f2f4251
M		 3358
3359 spec->multiout.max_channels = 2;
3360 spec->multiout.num_dacs = 1;
3361 spec->multiout.dac_nids = stac9200_dac_nids;
3362 spec->adc_nids = stac9200_adc_nids;
3363 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3364 spec->num_muxes = 1;
8b65727b 3365 spec->num_dmics = 0;
9e05b7a3 3366 spec->num_adcs = 1;
a64135a2 3367 spec->num_pwrs = 0;
c7d4b2fa 3368
bf277785
TD		 3369 if (spec->board_config == STAC_9200_GATEWAY ||
3370 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3371 spec->init = stac9200_eapd_init;
3372 else
3373 spec->init = stac9200_core_init;
2f2f4251 3374 spec->mixer = stac9200_mixer;
c7d4b2fa 3375
117f257d
TI		 3376 if (spec->board_config == STAC_9200_PANASONIC) {
3377 spec->gpio_mask = spec->gpio_dir = 0x09;
3378 spec->gpio_data = 0x00;
3379 }
3380
c7d4b2fa
M		 3381 err = stac9200_parse_auto_config(codec);
3382 if (err < 0) {
3383 stac92xx_free(codec);
3384 return err;
3385 }
2f2f4251
M		 3386
3387 codec->patch_ops = stac92xx_patch_ops;
3388
3389 return 0;
3390}
3391
8e21c34c
TD		 3392static int patch_stac925x(struct hda_codec *codec)
3393{
3394 struct sigmatel_spec *spec;
3395 int err;
3396
3397 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3398 if (spec == NULL)
3399 return -ENOMEM;
3400
3401 codec->spec = spec;
a4eed138 3402 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3403 spec->pin_nids = stac925x_pin_nids;
3404 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3405 stac925x_models,
3406 stac925x_cfg_tbl);
9e507abd 3407 again:
8e21c34c 3408 if (spec->board_config < 0) {
2c11f955
TD		 3409 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3410 "using BIOS defaults\n");
8e21c34c
TD		 3411 err = stac92xx_save_bios_config_regs(codec);
3412 if (err < 0) {
3413 stac92xx_free(codec);
3414 return err;
3415 }
3416 spec->pin_configs = spec->bios_pin_configs;
3417 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3418 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3419 stac92xx_set_config_regs(codec);
3420 }
3421
3422 spec->multiout.max_channels = 2;
3423 spec->multiout.num_dacs = 1;
3424 spec->multiout.dac_nids = stac925x_dac_nids;
3425 spec->adc_nids = stac925x_adc_nids;
3426 spec->mux_nids = stac925x_mux_nids;
3427 spec->num_muxes = 1;
9e05b7a3 3428 spec->num_adcs = 1;
a64135a2 3429 spec->num_pwrs = 0;
2c11f955
TD		 3430 switch (codec->vendor_id) {
3431 case 0x83847632: /* STAC9202 */
3432 case 0x83847633: /* STAC9202D */
3433 case 0x83847636: /* STAC9251 */
3434 case 0x83847637: /* STAC9251D */
f6e9852a 3435 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3436 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3437 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3438 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3439 break;
3440 default:
3441 spec->num_dmics = 0;
3442 break;
3443 }
8e21c34c
TD		 3444
3445 spec->init = stac925x_core_init;
3446 spec->mixer = stac925x_mixer;
3447
3448 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3449 if (!err) {
3450 if (spec->board_config < 0) {
3451 printk(KERN_WARNING "hda_codec: No auto-config is "
3452 "available, default to model=ref\n");
3453 spec->board_config = STAC_925x_REF;
3454 goto again;
3455 }
3456 err = -EINVAL;
3457 }
8e21c34c
TD		 3458 if (err < 0) {
3459 stac92xx_free(codec);
3460 return err;
3461 }
3462
3463 codec->patch_ops = stac92xx_patch_ops;
3464
3465 return 0;
3466}
3467
e1f0d669
MR		 3468static struct hda_input_mux stac92hd73xx_dmux = {
3469 .num_items = 4,
3470 .items = {
3471 { "Analog Inputs", 0x0b },
3472 { "CD", 0x08 },
3473 { "Digital Mic 1", 0x09 },
3474 { "Digital Mic 2", 0x0a },
3475 }
3476};
3477
3478static int patch_stac92hd73xx(struct hda_codec *codec)
3479{
3480 struct sigmatel_spec *spec;
3481 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3482 int err = 0;
3483
3484 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3485 if (spec == NULL)
3486 return -ENOMEM;
3487
3488 codec->spec = spec;
3489 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3490 spec->pin_nids = stac92hd73xx_pin_nids;
3491 spec->board_config = snd_hda_check_board_config(codec,
3492 STAC_92HD73XX_MODELS,
3493 stac92hd73xx_models,
3494 stac92hd73xx_cfg_tbl);
3495again:
3496 if (spec->board_config < 0) {
3497 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3498 " STAC92HD73XX, using BIOS defaults\n");
3499 err = stac92xx_save_bios_config_regs(codec);
3500 if (err < 0) {
3501 stac92xx_free(codec);
3502 return err;
3503 }
3504 spec->pin_configs = spec->bios_pin_configs;
3505 } else {
3506 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3507 stac92xx_set_config_regs(codec);
3508 }
3509
3510 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3511 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3512
3513 if (spec->multiout.num_dacs < 0) {
3514 printk(KERN_WARNING "hda_codec: Could not determine "
3515 "number of channels defaulting to DAC count\n");
3516 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3517 }
3518
3519 switch (spec->multiout.num_dacs) {
3520 case 0x3: /* 6 Channel */
7c2ba97b 3521 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 3522 spec->mixer = stac92hd73xx_6ch_mixer;
3523 spec->init = stac92hd73xx_6ch_core_init;
3524 break;
3525 case 0x4: /* 8 Channel */
3526 spec->multiout.hp_nid = 0x18;
3527 spec->mixer = stac92hd73xx_8ch_mixer;
3528 spec->init = stac92hd73xx_8ch_core_init;
3529 break;
3530 case 0x5: /* 10 Channel */
3531 spec->multiout.hp_nid = 0x19;
3532 spec->mixer = stac92hd73xx_10ch_mixer;
3533 spec->init = stac92hd73xx_10ch_core_init;
3534 };
3535
3536 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3537 spec->aloopback_mask = 0x01;
3538 spec->aloopback_shift = 8;
3539
3540 spec->mux_nids = stac92hd73xx_mux_nids;
3541 spec->adc_nids = stac92hd73xx_adc_nids;
3542 spec->dmic_nids = stac92hd73xx_dmic_nids;
3543 spec->dmux_nids = stac92hd73xx_dmux_nids;
3544
3545 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3546 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 3547 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3548 spec->dinput_mux = &stac92hd73xx_dmux;
3549 /* GPIO0 High = Enable EAPD */
0fc9dec4 3550 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3551 spec->gpio_data = 0x01;
e1f0d669 3552
a7662640
MR		 3553 switch (spec->board_config) {
3554 case STAC_DELL_M6:
d654a660 3555 spec->init = dell_eq_core_init;
a7662640
MR		 3556 switch (codec->subsystem_id) {
3557 case 0x1028025e: /* Analog Mics */
3558 case 0x1028025f:
3559 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3560 spec->num_dmics = 0;
3561 break;
d654a660 3562 case 0x10280271: /* Digital Mics */
a7662640 3563 case 0x10280272:
d654a660
MR		 3564 spec->init = dell_m6_core_init;
3565 /* fall-through */
3566 case 0x10280254:
3567 case 0x10280255:
a7662640
MR		 3568 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3569 spec->num_dmics = 1;
3570 break;
3571 case 0x10280256: /* Both */
3572 case 0x10280057:
3573 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3574 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3575 spec->num_dmics = 1;
3576 break;
3577 }
3578 break;
3579 default:
3580 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3581 }
3582
a64135a2
MR		 3583 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3584 spec->pwr_nids = stac92hd73xx_pwr_nids;
3585
e1f0d669
MR		 3586 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3587
3588 if (!err) {
3589 if (spec->board_config < 0) {
3590 printk(KERN_WARNING "hda_codec: No auto-config is "
3591 "available, default to model=ref\n");
3592 spec->board_config = STAC_92HD73XX_REF;
3593 goto again;
3594 }
3595 err = -EINVAL;
3596 }
3597
3598 if (err < 0) {
3599 stac92xx_free(codec);
3600 return err;
3601 }
3602
3603 codec->patch_ops = stac92xx_patch_ops;
3604
3605 return 0;
3606}
3607
e035b841
MR		 3608static int patch_stac92hd71bxx(struct hda_codec *codec)
3609{
3610 struct sigmatel_spec *spec;
3611 int err = 0;
3612
3613 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3614 if (spec == NULL)
3615 return -ENOMEM;
3616
3617 codec->spec = spec;
3618 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 3619 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 3620 spec->pin_nids = stac92hd71bxx_pin_nids;
3621 spec->board_config = snd_hda_check_board_config(codec,
3622 STAC_92HD71BXX_MODELS,
3623 stac92hd71bxx_models,
3624 stac92hd71bxx_cfg_tbl);
3625again:
3626 if (spec->board_config < 0) {
3627 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3628 " STAC92HD71BXX, using BIOS defaults\n");
3629 err = stac92xx_save_bios_config_regs(codec);
3630 if (err < 0) {
3631 stac92xx_free(codec);
3632 return err;
3633 }
3634 spec->pin_configs = spec->bios_pin_configs;
3635 } else {
3636 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3637 stac92xx_set_config_regs(codec);
3638 }
3639
541eee87
MR		 3640 switch (codec->vendor_id) {
3641 case 0x111d76b6: /* 4 Port without Analog Mixer */
3642 case 0x111d76b7:
3643 case 0x111d76b4: /* 6 Port without Analog Mixer */
3644 case 0x111d76b5:
3645 spec->mixer = stac92hd71bxx_mixer;
3646 spec->init = stac92hd71bxx_core_init;
3647 break;
aafc4412
MR		 3648 case 0x111d7608: /* 5 Port with Analog Mixer */
3649 /* no output amps */
3650 spec->num_pwrs = 0;
3651 spec->mixer = stac92hd71bxx_analog_mixer;
3652
3653 /* disable VSW */
3654 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
3655 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
3656 break;
3657 case 0x111d7603: /* 6 Port with Analog Mixer */
3658 /* no output amps */
3659 spec->num_pwrs = 0;
3660 /* fallthru */
541eee87
MR		 3661 default:
3662 spec->mixer = stac92hd71bxx_analog_mixer;
3663 spec->init = stac92hd71bxx_analog_core_init;
3664 }
3665
3666 spec->aloopback_mask = 0x20;
3667 spec->aloopback_shift = 0;
3668
4fe5195c 3669 /* GPIO0 High = EAPD */
0fc9dec4
MR		 3670 spec->gpio_mask = 0x01;
3671 spec->gpio_dir = 0x01;
0fc9dec4 3672 spec->gpio_data = 0x01;
e035b841 3673
e035b841
MR		 3674 spec->mux_nids = stac92hd71bxx_mux_nids;
3675 spec->adc_nids = stac92hd71bxx_adc_nids;
3676 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3677 spec->dmux_nids = stac92hd71bxx_dmux_nids;
aafc4412 3678 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 3679
3680 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3681 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3682 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3683 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3684
aea7bb0a 3685 spec->multiout.num_dacs = 1;
e035b841
MR		 3686 spec->multiout.hp_nid = 0x11;
3687 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3688
3689 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3690 if (!err) {
3691 if (spec->board_config < 0) {
3692 printk(KERN_WARNING "hda_codec: No auto-config is "
3693 "available, default to model=ref\n");
3694 spec->board_config = STAC_92HD71BXX_REF;
3695 goto again;
3696 }
3697 err = -EINVAL;
3698 }
3699
3700 if (err < 0) {
3701 stac92xx_free(codec);
3702 return err;
3703 }
3704
3705 codec->patch_ops = stac92xx_patch_ops;
3706
3707 return 0;
3708};
3709
2f2f4251
M		 3710static int patch_stac922x(struct hda_codec *codec)
3711{
3712 struct sigmatel_spec *spec;
c7d4b2fa 3713 int err;
2f2f4251 3714
e560d8d8 3715 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3716 if (spec == NULL)
3717 return -ENOMEM;
3718
3719 codec->spec = spec;
a4eed138 3720 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3721 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3722 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3723 stac922x_models,
3724 stac922x_cfg_tbl);
5d5d3bc3 3725 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3726 spec->gpio_mask = spec->gpio_dir = 0x03;
3727 spec->gpio_data = 0x03;
3fc24d85
TI		 3728 /* Intel Macs have all same PCI SSID, so we need to check
3729 * codec SSID to distinguish the exact models
3730 */
6f0778d8 3731 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3732 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3733
3734 case 0x106b0800:
3735 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3736 break;
5d5d3bc3
IZ		 3737 case 0x106b0600:
3738 case 0x106b0700:
3739 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3740 break;
5d5d3bc3
IZ		 3741 case 0x106b0e00:
3742 case 0x106b0f00:
3743 case 0x106b1600:
3744 case 0x106b1700:
3745 case 0x106b0200:
3746 case 0x106b1e00:
3747 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3748 break;
5d5d3bc3
IZ		 3749 case 0x106b1a00:
3750 case 0x00000100:
3751 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3752 break;
5d5d3bc3
IZ		 3753 case 0x106b0a00:
3754 case 0x106b2200:
3755 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3756 break;
3fc24d85
TI		 3757 }
3758 }
3759
9e507abd 3760 again:
11b44bbd
RF		 3761 if (spec->board_config < 0) {
3762 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3763 "using BIOS defaults\n");
3764 err = stac92xx_save_bios_config_regs(codec);
3765 if (err < 0) {
3766 stac92xx_free(codec);
3767 return err;
3768 }
3769 spec->pin_configs = spec->bios_pin_configs;
3770 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3771 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3772 stac92xx_set_config_regs(codec);
3773 }
2f2f4251 3774
c7d4b2fa
M		 3775 spec->adc_nids = stac922x_adc_nids;
3776 spec->mux_nids = stac922x_mux_nids;
2549413e 3777 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3778 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3779 spec->num_dmics = 0;
a64135a2 3780 spec->num_pwrs = 0;
c7d4b2fa
M		 3781
3782 spec->init = stac922x_core_init;
2f2f4251 3783 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3784
3785 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3786
3cc08dc6 3787 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3788 if (!err) {
3789 if (spec->board_config < 0) {
3790 printk(KERN_WARNING "hda_codec: No auto-config is "
3791 "available, default to model=ref\n");
3792 spec->board_config = STAC_D945_REF;
3793 goto again;
3794 }
3795 err = -EINVAL;
3796 }
3cc08dc6
MP		 3797 if (err < 0) {
3798 stac92xx_free(codec);
3799 return err;
3800 }
3801
3802 codec->patch_ops = stac92xx_patch_ops;
3803
807a4636
TI		 3804 /* Fix Mux capture level; max to 2 */
3805 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3806 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3807 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3808 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3809 (0 << AC_AMPCAP_MUTE_SHIFT));
3810
3cc08dc6
MP		 3811 return 0;
3812}
3813
3814static int patch_stac927x(struct hda_codec *codec)
3815{
3816 struct sigmatel_spec *spec;
3817 int err;
3818
3819 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3820 if (spec == NULL)
3821 return -ENOMEM;
3822
3823 codec->spec = spec;
a4eed138 3824 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3825 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3826 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3827 stac927x_models,
3828 stac927x_cfg_tbl);
9e507abd 3829 again:
8e9068b1
MR		 3830 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3831 if (spec->board_config < 0)
3832 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3833 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3834 err = stac92xx_save_bios_config_regs(codec);
3835 if (err < 0) {
3836 stac92xx_free(codec);
3837 return err;
3838 }
3839 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3840 } else {
3cc08dc6
MP		 3841 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3842 stac92xx_set_config_regs(codec);
3843 }
3844
8e9068b1
MR		 3845 spec->adc_nids = stac927x_adc_nids;
3846 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3847 spec->mux_nids = stac927x_mux_nids;
3848 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
b76c850f 3849 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 3850 spec->multiout.dac_nids = spec->dac_nids;
3851
81d3dbde 3852 switch (spec->board_config) {
93ed1503 3853 case STAC_D965_3ST:
93ed1503 3854 case STAC_D965_5ST:
8e9068b1 3855 /* GPIO0 High = Enable EAPD */
0fc9dec4 3856 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 3857 spec->gpio_data = 0x01;
8e9068b1
MR		 3858 spec->num_dmics = 0;
3859
93ed1503 3860 spec->init = d965_core_init;
9e05b7a3 3861 spec->mixer = stac927x_mixer;
81d3dbde 3862 break;
8e9068b1 3863 case STAC_DELL_BIOS:
780c8be4
MR		 3864 switch (codec->subsystem_id) {
3865 case 0x10280209:
3866 case 0x1028022e:
3867 /* correct the device field to SPDIF out */
3868 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
3869 break;
3870 };
03d7ca17
MR		 3871 /* configure the analog microphone on some laptops */
3872 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 3873 /* correct the front output jack as a hp out */
7989fba9 3874 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 3875 /* correct the front input jack as a mic */
3876 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3877 /* fallthru */
8e9068b1
MR		 3878 case STAC_DELL_3ST:
3879 /* GPIO2 High = Enable EAPD */
0fc9dec4 3880 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 3881 spec->gpio_data = 0x04;
7f16859a
MR		 3882 spec->dmic_nids = stac927x_dmic_nids;
3883 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3884
8e9068b1
MR		 3885 spec->init = d965_core_init;
3886 spec->mixer = stac927x_mixer;
3887 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3888 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3889 break;
3890 default:
f1f208d0 3891 /* GPIO0 High = Enable EAPD */
0fc9dec4 3892 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 3893 spec->gpio_data = 0x01;
8e9068b1
MR		 3894 spec->num_dmics = 0;
3895
3896 spec->init = stac927x_core_init;
3897 spec->mixer = stac927x_mixer;
7f16859a
MR		 3898 }
3899
a64135a2 3900 spec->num_pwrs = 0;
e1f0d669
MR		 3901 spec->aloopback_mask = 0x40;
3902 spec->aloopback_shift = 0;
8e9068b1 3903
3cc08dc6 3904 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3905 if (!err) {
3906 if (spec->board_config < 0) {
3907 printk(KERN_WARNING "hda_codec: No auto-config is "
3908 "available, default to model=ref\n");
3909 spec->board_config = STAC_D965_REF;
3910 goto again;
3911 }
3912 err = -EINVAL;
3913 }
c7d4b2fa
M		 3914 if (err < 0) {
3915 stac92xx_free(codec);
3916 return err;
3917 }
2f2f4251
M		 3918
3919 codec->patch_ops = stac92xx_patch_ops;
3920
52987656
TI		 3921 /*
3922 * !!FIXME!!
3923 * The STAC927x seem to require fairly long delays for certain
3924 * command sequences. With too short delays (even if the answer
3925 * is set to RIRB properly), it results in the silence output
3926 * on some hardwares like Dell.
3927 *
3928 * The below flag enables the longer delay (see get_response
3929 * in hda_intel.c).
3930 */
3931 codec->bus->needs_damn_long_delay = 1;
3932
2f2f4251
M		 3933 return 0;
3934}
3935
f3302a59
MP		 3936static int patch_stac9205(struct hda_codec *codec)
3937{
3938 struct sigmatel_spec *spec;
8259980e 3939 int err;
f3302a59
MP		 3940
3941 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3942 if (spec == NULL)
3943 return -ENOMEM;
3944
3945 codec->spec = spec;
a4eed138 3946 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3947 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3948 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3949 stac9205_models,
3950 stac9205_cfg_tbl);
9e507abd 3951 again:
11b44bbd
RF		 3952 if (spec->board_config < 0) {
3953 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3954 err = stac92xx_save_bios_config_regs(codec);
3955 if (err < 0) {
3956 stac92xx_free(codec);
3957 return err;
3958 }
3959 spec->pin_configs = spec->bios_pin_configs;
3960 } else {
f3302a59
MP		 3961 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3962 stac92xx_set_config_regs(codec);
3963 }
3964
3965 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3966 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3967 spec->mux_nids = stac9205_mux_nids;
2549413e 3968 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3969 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3970 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3971 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3972 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3973 spec->num_pwrs = 0;
f3302a59
MP		 3974
3975 spec->init = stac9205_core_init;
3976 spec->mixer = stac9205_mixer;
3977
e1f0d669
MR		 3978 spec->aloopback_mask = 0x40;
3979 spec->aloopback_shift = 0;
f3302a59 3980 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3981
ae0a8ed8 3982 switch (spec->board_config){
ae0a8ed8 3983 case STAC_9205_DELL_M43:
87d48363
MR		 3984 /* Enable SPDIF in/out */
3985 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3986 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3987
4fe5195c
MR		 3988 /* Enable unsol response for GPIO4/Dock HP connection */
3989 snd_hda_codec_write(codec, codec->afg, 0,
3990 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3991 snd_hda_codec_write_cache(codec, codec->afg, 0,
3992 AC_VERB_SET_UNSOLICITED_ENABLE,
3993 (AC_USRSP_EN | STAC_HP_EVENT));
3994
3995 spec->gpio_dir = 0x0b;
0fc9dec4 3996 spec->eapd_mask = 0x01;
4fe5195c
MR		 3997 spec->gpio_mask = 0x1b;
3998 spec->gpio_mute = 0x10;
e2e7d624 3999 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4000 * GPIO3 Low = DRM
87d48363 4001 */
4fe5195c 4002 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4003 break;
4004 default:
4005 /* GPIO0 High = EAPD */
0fc9dec4 4006 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 4007 spec->gpio_data = 0x01;
ae0a8ed8
TD		 4008 break;
4009 }
33382403 4010
f3302a59 4011 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 4012 if (!err) {
4013 if (spec->board_config < 0) {
4014 printk(KERN_WARNING "hda_codec: No auto-config is "
4015 "available, default to model=ref\n");
4016 spec->board_config = STAC_9205_REF;
4017 goto again;
4018 }
4019 err = -EINVAL;
4020 }
f3302a59
MP		 4021 if (err < 0) {
4022 stac92xx_free(codec);
4023 return err;
4024 }
4025
4026 codec->patch_ops = stac92xx_patch_ops;
4027
4028 return 0;
4029}
4030
db064e50 4031/*
6d859065 4032 * STAC9872 hack
db064e50
TI		 4033 */
4034
99ccc560 4035/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 4036static hda_nid_t vaio_dacs[] = { 0x2 };
4037#define VAIO_HP_DAC 0x5
4038static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
4039static hda_nid_t vaio_mux_nids[] = { 0x15 };
4040
4041static struct hda_input_mux vaio_mux = {
a3a2f429 4042 .num_items = 3,
db064e50 4043 .items = {
d773781c 4044 /* { "HP", 0x0 }, */
1624cb9a
TI		 4045 { "Mic Jack", 0x1 },
4046 { "Internal Mic", 0x2 },
db064e50
TI		 4047 { "PCM", 0x3 },
4048 }
4049};
4050
4051static struct hda_verb vaio_init[] = {
4052 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 4053 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 4054 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4055 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4056 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4057 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4058 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 4059 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4060 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4061 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4062 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4063 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4064 {}
4065};
4066
6d859065
GM		 4067static struct hda_verb vaio_ar_init[] = {
4068 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
4069 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
4070 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
4071 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
4072/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
4073 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 4074 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4075 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
4076 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
4077/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
4078 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
4079 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
4080 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4081 {}
4082};
4083
db064e50 4084/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4085static struct hda_bind_ctls vaio_bind_master_vol = {
4086 .ops = &snd_hda_bind_vol,
4087 .values = {
4088 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4089 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4090 0
4091 },
4092};
db064e50
TI		 4093
4094/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 4095static struct hda_bind_ctls vaio_bind_master_sw = {
4096 .ops = &snd_hda_bind_sw,
4097 .values = {
4098 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4099 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4100 0,
4101 },
4102};
db064e50
TI		 4103
4104static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 4105 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4106 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 4107 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4108 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4109 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4110 {
4111 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4112 .name = "Capture Source",
4113 .count = 1,
4114 .info = stac92xx_mux_enum_info,
4115 .get = stac92xx_mux_enum_get,
4116 .put = stac92xx_mux_enum_put,
4117 },
4118 {}
4119};
4120
6d859065 4121static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 4122 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4123 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 4124 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
4125 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4126 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4127 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
4128 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
4129 {
4130 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4131 .name = "Capture Source",
4132 .count = 1,
4133 .info = stac92xx_mux_enum_info,
4134 .get = stac92xx_mux_enum_get,
4135 .put = stac92xx_mux_enum_put,
4136 },
4137 {}
4138};
4139
4140static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 4141 .build_controls = stac92xx_build_controls,
4142 .build_pcms = stac92xx_build_pcms,
4143 .init = stac92xx_init,
4144 .free = stac92xx_free,
cb53c626 4145#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 4146 .resume = stac92xx_resume,
4147#endif
4148};
4149
72e7b0dd
TI		 4150static int stac9872_vaio_init(struct hda_codec *codec)
4151{
4152 int err;
4153
4154 err = stac92xx_init(codec);
4155 if (err < 0)
4156 return err;
4157 if (codec->patch_ops.unsol_event)
4158 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4159 return 0;
4160}
4161
4162static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4163{
40c1d308 4164 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 4165 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4166 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4167 } else {
4168 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4169 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4170 }
4171}
4172
4173static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4174{
4175 switch (res >> 26) {
4176 case STAC_HP_EVENT:
4177 stac9872_vaio_hp_detect(codec, res);
4178 break;
4179 }
4180}
4181
4182static struct hda_codec_ops stac9872_vaio_patch_ops = {
4183 .build_controls = stac92xx_build_controls,
4184 .build_pcms = stac92xx_build_pcms,
4185 .init = stac9872_vaio_init,
4186 .free = stac92xx_free,
4187 .unsol_event = stac9872_vaio_unsol_event,
4188#ifdef CONFIG_PM
4189 .resume = stac92xx_resume,
4190#endif
4191};
4192
6d859065
GM		 4193enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
4194 CXD9872RD_VAIO,
4195 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
4196 STAC9872AK_VAIO,
4197 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
4198 STAC9872K_VAIO,
4199 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 4200 CXD9872AKD_VAIO,
4201 STAC_9872_MODELS,
4202};
4203
4204static const char *stac9872_models[STAC_9872_MODELS] = {
4205 [CXD9872RD_VAIO] = "vaio",
4206 [CXD9872AKD_VAIO] = "vaio-ar",
4207};
4208
4209static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4210 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4211 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4212 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 4213 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 4214 {}
4215};
4216
6d859065 4217static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4218{
4219 struct sigmatel_spec *spec;
4220 int board_config;
4221
f5fcc13c
TI		 4222 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4223 stac9872_models,
4224 stac9872_cfg_tbl);
db064e50
TI		 4225 if (board_config < 0)
4226 /* unknown config, let generic-parser do its job... */
4227 return snd_hda_parse_generic_codec(codec);
4228
4229 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4230 if (spec == NULL)
4231 return -ENOMEM;
4232
4233 codec->spec = spec;
4234 switch (board_config) {
6d859065
GM		 4235 case CXD9872RD_VAIO:
4236 case STAC9872AK_VAIO:
4237 case STAC9872K_VAIO:
db064e50
TI		 4238 spec->mixer = vaio_mixer;
4239 spec->init = vaio_init;
4240 spec->multiout.max_channels = 2;
4241 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4242 spec->multiout.dac_nids = vaio_dacs;
4243 spec->multiout.hp_nid = VAIO_HP_DAC;
4244 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4245 spec->adc_nids = vaio_adcs;
a64135a2 4246 spec->num_pwrs = 0;
db064e50
TI		 4247 spec->input_mux = &vaio_mux;
4248 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4249 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 4250 break;
6d859065
GM		 4251
4252 case CXD9872AKD_VAIO:
4253 spec->mixer = vaio_ar_mixer;
4254 spec->init = vaio_ar_init;
4255 spec->multiout.max_channels = 2;
4256 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4257 spec->multiout.dac_nids = vaio_dacs;
4258 spec->multiout.hp_nid = VAIO_HP_DAC;
4259 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 4260 spec->num_pwrs = 0;
6d859065
GM		 4261 spec->adc_nids = vaio_adcs;
4262 spec->input_mux = &vaio_mux;
4263 spec->mux_nids = vaio_mux_nids;
72e7b0dd 4264 codec->patch_ops = stac9872_patch_ops;
6d859065 4265 break;
db064e50
TI		 4266 }
4267
db064e50
TI		 4268 return 0;
4269}
4270
4271
2f2f4251
M		 4272/*
4273 * patch entries
4274 */
4275struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4276 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4277 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4278 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4279 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4280 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4281 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4282 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4283 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4284 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4285 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4286 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4287 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4288 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4289 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4290 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4291 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4292 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4293 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4294 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4295 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4296 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4297 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4298 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4299 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4300 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4301 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4302 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4303 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4304 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4305 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4306 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4307 /* The following does not take into account .id=0x83847661 when subsys =
4308 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4309 * currently not fully supported.
4310 */
4311 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4312 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4313 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4314 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4315 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4316 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4317 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4318 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4319 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4320 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4321 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412
MR		 4322 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4323 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4324 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4325 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4326 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4327 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4328 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4329 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4330 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4331 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4332 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4333 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4334 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4335 {} /* terminator */
4336};
Linux kernel - Deliverables
This page took 0.648946 seconds and 5 git commands to generate.