ALSA: hda - Remove dead codes from patch_sigmatel.c
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
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1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
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8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
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34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
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38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
fefd67f3 43 STAC_LO_EVENT,
3d21d3f7 44 STAC_MIC_EVENT,
c6e4c666 45};
4e55096e 46
f5fcc13c 47enum {
1607b8ea 48 STAC_AUTO,
f5fcc13c 49 STAC_REF,
bf277785 50 STAC_9200_OQO,
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51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
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61 STAC_9200_M4,
62 STAC_9200_M4_2,
117f257d 63 STAC_9200_PANASONIC,
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64 STAC_9200_MODELS
65};
66
67enum {
1607b8ea 68 STAC_9205_AUTO,
f5fcc13c 69 STAC_9205_REF,
dfe495d0 70 STAC_9205_DELL_M42,
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71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
d9a4268e 73 STAC_9205_EAPD,
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74 STAC_9205_MODELS
75};
76
e1f0d669 77enum {
1607b8ea 78 STAC_92HD73XX_AUTO,
9e43f0de 79 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 80 STAC_92HD73XX_REF,
ae709440 81 STAC_92HD73XX_INTEL,
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82 STAC_DELL_M6_AMIC,
83 STAC_DELL_M6_DMIC,
84 STAC_DELL_M6_BOTH,
6b3ab21e 85 STAC_DELL_EQ,
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86 STAC_92HD73XX_MODELS
87};
88
d0513fc6 89enum {
1607b8ea 90 STAC_92HD83XXX_AUTO,
d0513fc6 91 STAC_92HD83XXX_REF,
32ed3f46 92 STAC_92HD83XXX_PWR_REF,
8bb0ac55 93 STAC_DELL_S14,
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94 STAC_92HD83XXX_MODELS
95};
96
e035b841 97enum {
1607b8ea 98 STAC_92HD71BXX_AUTO,
e035b841 99 STAC_92HD71BXX_REF,
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100 STAC_DELL_M4_1,
101 STAC_DELL_M4_2,
3a7abfd2 102 STAC_DELL_M4_3,
6a14f585 103 STAC_HP_M4,
1b0652eb 104 STAC_HP_DV5,
ae6241fb 105 STAC_HP_HDX,
514bf54c 106 STAC_HP_DV4_1222NR,
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107 STAC_92HD71BXX_MODELS
108};
109
8e21c34c 110enum {
1607b8ea 111 STAC_925x_AUTO,
8e21c34c 112 STAC_925x_REF,
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113 STAC_M1,
114 STAC_M1_2,
115 STAC_M2,
8e21c34c 116 STAC_M2_2,
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117 STAC_M3,
118 STAC_M5,
119 STAC_M6,
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120 STAC_925x_MODELS
121};
122
f5fcc13c 123enum {
1607b8ea 124 STAC_922X_AUTO,
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125 STAC_D945_REF,
126 STAC_D945GTP3,
127 STAC_D945GTP5,
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128 STAC_INTEL_MAC_V1,
129 STAC_INTEL_MAC_V2,
130 STAC_INTEL_MAC_V3,
131 STAC_INTEL_MAC_V4,
132 STAC_INTEL_MAC_V5,
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NB
133 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
134 * is given, one of the above models will be
135 * chosen according to the subsystem id. */
dfe495d0 136 /* for backward compatibility */
f5fcc13c 137 STAC_MACMINI,
3fc24d85 138 STAC_MACBOOK,
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NB
139 STAC_MACBOOK_PRO_V1,
140 STAC_MACBOOK_PRO_V2,
f16928fb 141 STAC_IMAC_INTEL,
0dae0f83 142 STAC_IMAC_INTEL_20,
8c650087 143 STAC_ECS_202,
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144 STAC_922X_DELL_D81,
145 STAC_922X_DELL_D82,
146 STAC_922X_DELL_M81,
147 STAC_922X_DELL_M82,
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148 STAC_922X_MODELS
149};
150
151enum {
1607b8ea 152 STAC_927X_AUTO,
e28d8322 153 STAC_D965_REF_NO_JD, /* no jack-detection */
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154 STAC_D965_REF,
155 STAC_D965_3ST,
156 STAC_D965_5ST,
679d92ed 157 STAC_D965_5ST_NO_FP,
4ff076e5 158 STAC_DELL_3ST,
8e9068b1 159 STAC_DELL_BIOS,
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160 STAC_927X_MODELS
161};
403d1944 162
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TI
163enum {
164 STAC_9872_AUTO,
165 STAC_9872_VAIO,
166 STAC_9872_MODELS
167};
168
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MR
169struct sigmatel_event {
170 hda_nid_t nid;
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171 unsigned char type;
172 unsigned char tag;
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173 int data;
174};
175
176struct sigmatel_jack {
177 hda_nid_t nid;
178 int type;
179 struct snd_jack *jack;
180};
181
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182struct sigmatel_mic_route {
183 hda_nid_t pin;
184 unsigned char mux_idx;
185 unsigned char dmux_idx;
186};
187
2f2f4251 188struct sigmatel_spec {
c8b6bf9b 189 struct snd_kcontrol_new *mixers[4];
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190 unsigned int num_mixers;
191
403d1944 192 int board_config;
c0cea0d0 193 unsigned int eapd_switch: 1;
c7d4b2fa 194 unsigned int surr_switch: 1;
3cc08dc6 195 unsigned int alt_switch: 1;
82bc955f 196 unsigned int hp_detect: 1;
00ef50c2 197 unsigned int spdif_mute: 1;
7c7767eb 198 unsigned int check_volume_offset:1;
3d21d3f7 199 unsigned int auto_mic:1;
c7d4b2fa 200
4fe5195c 201 /* gpio lines */
0fc9dec4 202 unsigned int eapd_mask;
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MR
203 unsigned int gpio_mask;
204 unsigned int gpio_dir;
205 unsigned int gpio_data;
206 unsigned int gpio_mute;
86d190e7 207 unsigned int gpio_led;
4fe5195c 208
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209 /* stream */
210 unsigned int stream_delay;
211
4fe5195c 212 /* analog loopback */
d78d7a90 213 struct snd_kcontrol_new *aloopback_ctl;
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214 unsigned char aloopback_mask;
215 unsigned char aloopback_shift;
8259980e 216
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217 /* power management */
218 unsigned int num_pwrs;
d0513fc6 219 unsigned int *pwr_mapping;
a64135a2 220 hda_nid_t *pwr_nids;
b76c850f 221 hda_nid_t *dac_list;
a64135a2 222
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223 /* jack detection */
224 struct snd_array jacks;
225
226 /* events */
227 struct snd_array events;
228
2f2f4251 229 /* playback */
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230 struct hda_input_mux *mono_mux;
231 unsigned int cur_mmux;
2f2f4251 232 struct hda_multi_out multiout;
3cc08dc6 233 hda_nid_t dac_nids[5];
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234 hda_nid_t hp_dacs[5];
235 hda_nid_t speaker_dacs[5];
2f2f4251 236
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237 int volume_offset;
238
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239 /* capture */
240 hda_nid_t *adc_nids;
2f2f4251 241 unsigned int num_adcs;
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242 hda_nid_t *mux_nids;
243 unsigned int num_muxes;
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244 hda_nid_t *dmic_nids;
245 unsigned int num_dmics;
e1f0d669 246 hda_nid_t *dmux_nids;
1697055e 247 unsigned int num_dmuxes;
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248 hda_nid_t *smux_nids;
249 unsigned int num_smuxes;
5207e10e 250 unsigned int num_analog_muxes;
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251
252 unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
253 unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
254 unsigned int num_caps; /* number of capture volume/switch elements */
255
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TI
256 struct sigmatel_mic_route ext_mic;
257 struct sigmatel_mic_route int_mic;
258
65973632 259 const char **spdif_labels;
d9737751 260
dabbed6f 261 hda_nid_t dig_in_nid;
b22b4821 262 hda_nid_t mono_nid;
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MR
263 hda_nid_t anabeep_nid;
264 hda_nid_t digbeep_nid;
2f2f4251 265
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266 /* pin widgets */
267 hda_nid_t *pin_nids;
268 unsigned int num_pins;
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269
270 /* codec specific stuff */
271 struct hda_verb *init;
c8b6bf9b 272 struct snd_kcontrol_new *mixer;
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273
274 /* capture source */
8b65727b 275 struct hda_input_mux *dinput_mux;
e1f0d669 276 unsigned int cur_dmux[2];
c7d4b2fa 277 struct hda_input_mux *input_mux;
3cc08dc6 278 unsigned int cur_mux[3];
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279 struct hda_input_mux *sinput_mux;
280 unsigned int cur_smux[2];
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MR
281 unsigned int cur_amux;
282 hda_nid_t *amp_nids;
8daaaa97 283 unsigned int powerdown_adcs;
2f2f4251 284
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285 /* i/o switches */
286 unsigned int io_switch[2];
0fb87bb4 287 unsigned int clfe_swap;
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TI
288 hda_nid_t line_switch; /* shared line-in for input and output */
289 hda_nid_t mic_switch; /* shared mic-in for input and output */
290 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 291 unsigned int aloopback;
2f2f4251 292
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293 struct hda_pcm pcm_rec[2]; /* PCM information */
294
295 /* dynamic controls and input_mux */
296 struct auto_pin_cfg autocfg;
603c4019 297 struct snd_array kctls;
8b65727b 298 struct hda_input_mux private_dimux;
c7d4b2fa 299 struct hda_input_mux private_imux;
d9737751 300 struct hda_input_mux private_smux;
b22b4821 301 struct hda_input_mux private_mono_mux;
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302};
303
304static hda_nid_t stac9200_adc_nids[1] = {
305 0x03,
306};
307
308static hda_nid_t stac9200_mux_nids[1] = {
309 0x0c,
310};
311
312static hda_nid_t stac9200_dac_nids[1] = {
313 0x02,
314};
315
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MR
316static hda_nid_t stac92hd73xx_pwr_nids[8] = {
317 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
318 0x0f, 0x10, 0x11
319};
320
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MR
321static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
322 0x26, 0,
323};
324
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325static hda_nid_t stac92hd73xx_adc_nids[2] = {
326 0x1a, 0x1b
327};
328
329#define STAC92HD73XX_NUM_DMICS 2
330static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
331 0x13, 0x14, 0
332};
333
334#define STAC92HD73_DAC_COUNT 5
e1f0d669 335
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TI
336static hda_nid_t stac92hd73xx_mux_nids[2] = {
337 0x20, 0x21,
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338};
339
340static hda_nid_t stac92hd73xx_dmux_nids[2] = {
341 0x20, 0x21,
342};
343
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344static hda_nid_t stac92hd73xx_smux_nids[2] = {
345 0x22, 0x23,
346};
347
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348#define STAC92HD73XX_NUM_CAPS 2
349static unsigned long stac92hd73xx_capvols[] = {
350 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
351 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
352};
353#define stac92hd73xx_capsws stac92hd73xx_capvols
354
d0513fc6 355#define STAC92HD83_DAC_COUNT 3
d0513fc6 356
667067d8 357static hda_nid_t stac92hd83xxx_mux_nids[2] = {
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MR
358 0x17, 0x18,
359};
360
361static hda_nid_t stac92hd83xxx_adc_nids[2] = {
362 0x15, 0x16,
363};
364
365static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
366 0xa, 0xb, 0xd, 0xe,
367};
368
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369static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
370 0x1e, 0,
371};
372
d0513fc6 373static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 374 0x03, 0x0c, 0x20, 0x40,
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375};
376
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377#define STAC92HD83XXX_NUM_CAPS 2
378static unsigned long stac92hd83xxx_capvols[] = {
379 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
380 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
381};
382#define stac92hd83xxx_capsws stac92hd83xxx_capvols
383
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384static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
385 0x0a, 0x0d, 0x0f
386};
387
e035b841
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388static hda_nid_t stac92hd71bxx_adc_nids[2] = {
389 0x12, 0x13,
390};
391
392static hda_nid_t stac92hd71bxx_mux_nids[2] = {
393 0x1a, 0x1b
394};
395
4b33c767
MR
396static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
397 0x1c, 0x1d,
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398};
399
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400static hda_nid_t stac92hd71bxx_smux_nids[2] = {
401 0x24, 0x25,
402};
403
e035b841
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404#define STAC92HD71BXX_NUM_DMICS 2
405static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
406 0x18, 0x19, 0
407};
408
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409static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
410 0x22, 0
411};
412
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413#define STAC92HD71BXX_NUM_CAPS 2
414static unsigned long stac92hd71bxx_capvols[] = {
415 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
416 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
417};
418#define stac92hd71bxx_capsws stac92hd71bxx_capvols
419
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TD
420static hda_nid_t stac925x_adc_nids[1] = {
421 0x03,
422};
423
424static hda_nid_t stac925x_mux_nids[1] = {
425 0x0f,
426};
427
428static hda_nid_t stac925x_dac_nids[1] = {
429 0x02,
430};
431
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432#define STAC925X_NUM_DMICS 1
433static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
434 0x15, 0
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TD
435};
436
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437static hda_nid_t stac925x_dmux_nids[1] = {
438 0x14,
439};
440
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441static unsigned long stac925x_capvols[] = {
442 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
443};
444static unsigned long stac925x_capsws[] = {
445 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
446};
447
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448static hda_nid_t stac922x_adc_nids[2] = {
449 0x06, 0x07,
450};
451
452static hda_nid_t stac922x_mux_nids[2] = {
453 0x12, 0x13,
454};
455
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456#define STAC922X_NUM_CAPS 2
457static unsigned long stac922x_capvols[] = {
458 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
459 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
460};
461#define stac922x_capsws stac922x_capvols
462
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463static hda_nid_t stac927x_slave_dig_outs[2] = {
464 0x1f, 0,
465};
466
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467static hda_nid_t stac927x_adc_nids[3] = {
468 0x07, 0x08, 0x09
469};
470
471static hda_nid_t stac927x_mux_nids[3] = {
472 0x15, 0x16, 0x17
473};
474
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475static hda_nid_t stac927x_smux_nids[1] = {
476 0x21,
477};
478
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479static hda_nid_t stac927x_dac_nids[6] = {
480 0x02, 0x03, 0x04, 0x05, 0x06, 0
481};
482
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483static hda_nid_t stac927x_dmux_nids[1] = {
484 0x1b,
485};
486
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487#define STAC927X_NUM_DMICS 2
488static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
489 0x13, 0x14, 0
490};
491
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492#define STAC927X_NUM_CAPS 3
493static unsigned long stac927x_capvols[] = {
494 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
495 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
496 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
497};
498static unsigned long stac927x_capsws[] = {
499 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
500 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
501 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
502};
503
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MR
504static const char *stac927x_spdif_labels[5] = {
505 "Digital Playback", "ADAT", "Analog Mux 1",
506 "Analog Mux 2", "Analog Mux 3"
507};
508
f3302a59
MP
509static hda_nid_t stac9205_adc_nids[2] = {
510 0x12, 0x13
511};
512
513static hda_nid_t stac9205_mux_nids[2] = {
514 0x19, 0x1a
515};
516
e1f0d669 517static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 518 0x1d,
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519};
520
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521static hda_nid_t stac9205_smux_nids[1] = {
522 0x21,
523};
524
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525#define STAC9205_NUM_DMICS 2
526static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
527 0x17, 0x18, 0
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MP
528};
529
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530#define STAC9205_NUM_CAPS 2
531static unsigned long stac9205_capvols[] = {
532 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
533 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
534};
535static unsigned long stac9205_capsws[] = {
536 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
537 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
538};
539
c7d4b2fa 540static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
541 0x08, 0x09, 0x0d, 0x0e,
542 0x0f, 0x10, 0x11, 0x12,
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M
543};
544
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TD
545static hda_nid_t stac925x_pin_nids[8] = {
546 0x07, 0x08, 0x0a, 0x0b,
547 0x0c, 0x0d, 0x10, 0x11,
548};
549
2f2f4251
M
550static hda_nid_t stac922x_pin_nids[10] = {
551 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
552 0x0f, 0x10, 0x11, 0x15, 0x1b,
553};
554
a7662640 555static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
556 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
557 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 558 0x14, 0x22, 0x23
e1f0d669
MR
559};
560
8bb0ac55 561static hda_nid_t stac92hd83xxx_pin_nids[10] = {
d0513fc6 562 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
8bb0ac55 563 0x0f, 0x10, 0x11, 0x1f, 0x20,
d0513fc6 564};
616f89e7
HRK
565
566#define STAC92HD71BXX_NUM_PINS 13
567static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
568 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
569 0x00, 0x14, 0x18, 0x19, 0x1e,
570 0x1f, 0x20, 0x27
571};
572static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR
573 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
574 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 575 0x1f, 0x20, 0x27
e035b841
MR
576};
577
3cc08dc6
MP
578static hda_nid_t stac927x_pin_nids[14] = {
579 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
580 0x0f, 0x10, 0x11, 0x12, 0x13,
581 0x14, 0x21, 0x22, 0x23,
582};
583
f3302a59
MP
584static hda_nid_t stac9205_pin_nids[12] = {
585 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
586 0x0f, 0x14, 0x16, 0x17, 0x18,
587 0x21, 0x22,
f3302a59
MP
588};
589
8b65727b
MP
590static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
591 struct snd_ctl_elem_info *uinfo)
592{
593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
594 struct sigmatel_spec *spec = codec->spec;
595 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
596}
597
598static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
599 struct snd_ctl_elem_value *ucontrol)
600{
601 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
602 struct sigmatel_spec *spec = codec->spec;
e1f0d669 603 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 604
e1f0d669 605 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
606 return 0;
607}
608
609static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
e1f0d669 614 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
615
616 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 617 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
618}
619
d9737751
MR
620static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
621 struct snd_ctl_elem_info *uinfo)
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
625 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
626}
627
628static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
629 struct snd_ctl_elem_value *ucontrol)
630{
631 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
632 struct sigmatel_spec *spec = codec->spec;
633 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
634
635 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
636 return 0;
637}
638
639static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
643 struct sigmatel_spec *spec = codec->spec;
00ef50c2 644 struct hda_input_mux *smux = &spec->private_smux;
d9737751 645 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
646 int err, val;
647 hda_nid_t nid;
d9737751 648
00ef50c2 649 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 650 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
651 if (err < 0)
652 return err;
653
654 if (spec->spdif_mute) {
655 if (smux_idx == 0)
656 nid = spec->multiout.dig_out_nid;
657 else
658 nid = codec->slave_dig_outs[smux_idx - 1];
659 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 660 val = HDA_AMP_MUTE;
00ef50c2 661 else
c9b46f91 662 val = 0;
00ef50c2 663 /* un/mute SPDIF out */
c9b46f91
TI
664 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
665 HDA_AMP_MUTE, val);
00ef50c2
MR
666 }
667 return 0;
d9737751
MR
668}
669
2fc99890
NL
670static unsigned int stac92xx_vref_set(struct hda_codec *codec,
671 hda_nid_t nid, unsigned int new_vref)
672{
b8621516 673 int error;
2fc99890
NL
674 unsigned int pincfg;
675 pincfg = snd_hda_codec_read(codec, nid, 0,
676 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
677
678 pincfg &= 0xff;
679 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
680 pincfg |= new_vref;
681
682 if (new_vref == AC_PINCTL_VREF_HIZ)
683 pincfg |= AC_PINCTL_OUT_EN;
684 else
685 pincfg |= AC_PINCTL_IN_EN;
686
687 error = snd_hda_codec_write_cache(codec, nid, 0,
688 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
689 if (error < 0)
690 return error;
691 else
692 return 1;
693}
694
695static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
696{
697 unsigned int vref;
698 vref = snd_hda_codec_read(codec, nid, 0,
699 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
700 vref &= AC_PINCTL_VREFEN;
701 return vref;
702}
703
c8b6bf9b 704static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
705{
706 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
707 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 708 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
709}
710
c8b6bf9b 711static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
712{
713 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
714 struct sigmatel_spec *spec = codec->spec;
715 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
716
717 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
718 return 0;
719}
720
c8b6bf9b 721static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
722{
723 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
724 struct sigmatel_spec *spec = codec->spec;
725 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e
TI
726 const struct hda_input_mux *imux = spec->input_mux;
727 unsigned int idx, prev_idx;
728
729 idx = ucontrol->value.enumerated.item[0];
730 if (idx >= imux->num_items)
731 idx = imux->num_items - 1;
732 prev_idx = spec->cur_mux[adc_idx];
733 if (prev_idx == idx)
734 return 0;
735 if (idx < spec->num_analog_muxes) {
736 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
737 AC_VERB_SET_CONNECT_SEL,
738 imux->items[idx].index);
739 if (prev_idx >= spec->num_analog_muxes) {
740 imux = spec->dinput_mux;
741 /* 0 = analog */
742 snd_hda_codec_write_cache(codec,
743 spec->dmux_nids[adc_idx], 0,
744 AC_VERB_SET_CONNECT_SEL,
745 imux->items[0].index);
746 }
747 } else {
748 imux = spec->dinput_mux;
749 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
750 AC_VERB_SET_CONNECT_SEL,
751 imux->items[idx - 1].index);
752 }
753 spec->cur_mux[adc_idx] = idx;
754 return 1;
2f2f4251
M
755}
756
b22b4821
MR
757static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
758 struct snd_ctl_elem_info *uinfo)
759{
760 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
761 struct sigmatel_spec *spec = codec->spec;
762 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
763}
764
765static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
766 struct snd_ctl_elem_value *ucontrol)
767{
768 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
769 struct sigmatel_spec *spec = codec->spec;
770
771 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
772 return 0;
773}
774
775static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
776 struct snd_ctl_elem_value *ucontrol)
777{
778 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
779 struct sigmatel_spec *spec = codec->spec;
780
781 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
782 spec->mono_nid, &spec->cur_mmux);
783}
784
5f10c4a9
ML
785#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
786
787static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
788 struct snd_ctl_elem_value *ucontrol)
789{
790 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 791 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
792 struct sigmatel_spec *spec = codec->spec;
793
e1f0d669
MR
794 ucontrol->value.integer.value[0] = !!(spec->aloopback &
795 (spec->aloopback_mask << idx));
5f10c4a9
ML
796 return 0;
797}
798
799static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
800 struct snd_ctl_elem_value *ucontrol)
801{
802 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
803 struct sigmatel_spec *spec = codec->spec;
e1f0d669 804 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 805 unsigned int dac_mode;
e1f0d669 806 unsigned int val, idx_val;
5f10c4a9 807
e1f0d669
MR
808 idx_val = spec->aloopback_mask << idx;
809 if (ucontrol->value.integer.value[0])
810 val = spec->aloopback | idx_val;
811 else
812 val = spec->aloopback & ~idx_val;
68ea7b2f 813 if (spec->aloopback == val)
5f10c4a9
ML
814 return 0;
815
68ea7b2f 816 spec->aloopback = val;
5f10c4a9 817
e1f0d669
MR
818 /* Only return the bits defined by the shift value of the
819 * first two bytes of the mask
820 */
5f10c4a9 821 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
822 kcontrol->private_value & 0xFFFF, 0x0);
823 dac_mode >>= spec->aloopback_shift;
5f10c4a9 824
e1f0d669 825 if (spec->aloopback & idx_val) {
5f10c4a9 826 snd_hda_power_up(codec);
e1f0d669 827 dac_mode |= idx_val;
5f10c4a9
ML
828 } else {
829 snd_hda_power_down(codec);
e1f0d669 830 dac_mode &= ~idx_val;
5f10c4a9
ML
831 }
832
833 snd_hda_codec_write_cache(codec, codec->afg, 0,
834 kcontrol->private_value >> 16, dac_mode);
835
836 return 1;
837}
838
c7d4b2fa 839static struct hda_verb stac9200_core_init[] = {
2f2f4251 840 /* set dac0mux for dac converter */
c7d4b2fa 841 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
842 {}
843};
844
1194b5b7
TI
845static struct hda_verb stac9200_eapd_init[] = {
846 /* set dac0mux for dac converter */
847 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
848 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
849 {}
850};
851
d654a660
MR
852static struct hda_verb dell_eq_core_init[] = {
853 /* set master volume to max value without distortion
854 * and direct control */
855 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR
856 {}
857};
858
e2aec171 859static struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR
860 /* set master volume and direct control */
861 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
862 {}
863};
864
d0513fc6 865static struct hda_verb stac92hd83xxx_core_init[] = {
8bb0ac55
MR
866 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x1},
867 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x1},
868 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x0},
d0513fc6
MR
869
870 /* power state controls amps */
871 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 872 {}
d0513fc6
MR
873};
874
e035b841 875static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
876 /* set master volume and direct control */
877 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 878 {}
541eee87
MR
879};
880
ca8d33fc
MR
881static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
882 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
883 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
884 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
885 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
886 {}
887};
888
8e21c34c
TD
889static struct hda_verb stac925x_core_init[] = {
890 /* set dac0mux for dac converter */
891 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
892 /* mute the master volume */
893 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
894 {}
895};
896
c7d4b2fa 897static struct hda_verb stac922x_core_init[] = {
2f2f4251 898 /* set master volume and direct control */
c7d4b2fa 899 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
900 {}
901};
902
93ed1503 903static struct hda_verb d965_core_init[] = {
19039bd0 904 /* set master volume and direct control */
93ed1503 905 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
906 /* unmute node 0x1b */
907 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
908 /* select node 0x03 as DAC */
909 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
910 {}
911};
912
3cc08dc6
MP
913static struct hda_verb stac927x_core_init[] = {
914 /* set master volume and direct control */
915 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
916 /* enable analog pc beep path */
917 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
918 {}
919};
920
f3302a59
MP
921static struct hda_verb stac9205_core_init[] = {
922 /* set master volume and direct control */
923 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
924 /* enable analog pc beep path */
925 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
926 {}
927};
928
b22b4821
MR
929#define STAC_MONO_MUX \
930 { \
931 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
932 .name = "Mono Mux", \
933 .count = 1, \
934 .info = stac92xx_mono_mux_enum_info, \
935 .get = stac92xx_mono_mux_enum_get, \
936 .put = stac92xx_mono_mux_enum_put, \
937 }
938
e1f0d669 939#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
940 { \
941 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
942 .name = "Analog Loopback", \
e1f0d669 943 .count = cnt, \
5f10c4a9
ML
944 .info = stac92xx_aloopback_info, \
945 .get = stac92xx_aloopback_get, \
946 .put = stac92xx_aloopback_put, \
947 .private_value = verb_read | (verb_write << 16), \
948 }
949
2fc99890
NL
950#define DC_BIAS(xname, idx, nid) \
951 { \
952 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
953 .name = xname, \
954 .index = idx, \
955 .info = stac92xx_dc_bias_info, \
956 .get = stac92xx_dc_bias_get, \
957 .put = stac92xx_dc_bias_put, \
958 .private_value = nid, \
959 }
960
c8b6bf9b 961static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M
962 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
963 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
964 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
965 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
966 { } /* end */
967};
968
d78d7a90
TI
969static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
970 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
971 {}
972};
973
974static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 975 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI
976 {}
977};
e1f0d669 978
d78d7a90
TI
979static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
980 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
981 {}
982};
983
d0513fc6 984
d78d7a90
TI
985static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
986 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
987};
541eee87 988
8e21c34c 989static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI
990 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
991 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M
992 { } /* end */
993};
994
d78d7a90
TI
995static struct snd_kcontrol_new stac9205_loopback[] = {
996 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
997 {}
998};
999
d78d7a90
TI
1000static struct snd_kcontrol_new stac927x_loopback[] = {
1001 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1002 {}
1003};
1004
1697055e
TI
1005static struct snd_kcontrol_new stac_dmux_mixer = {
1006 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1007 .name = "Digital Input Source",
1008 /* count set later */
1009 .info = stac92xx_dmux_enum_info,
1010 .get = stac92xx_dmux_enum_get,
1011 .put = stac92xx_dmux_enum_put,
1012};
1013
d9737751
MR
1014static struct snd_kcontrol_new stac_smux_mixer = {
1015 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1016 .name = "IEC958 Playback Source",
d9737751
MR
1017 /* count set later */
1018 .info = stac92xx_smux_enum_info,
1019 .get = stac92xx_smux_enum_get,
1020 .put = stac92xx_smux_enum_put,
1021};
1022
2134ea4f
TI
1023static const char *slave_vols[] = {
1024 "Front Playback Volume",
1025 "Surround Playback Volume",
1026 "Center Playback Volume",
1027 "LFE Playback Volume",
1028 "Side Playback Volume",
1029 "Headphone Playback Volume",
2134ea4f 1030 "Speaker Playback Volume",
2134ea4f
TI
1031 NULL
1032};
1033
1034static const char *slave_sws[] = {
1035 "Front Playback Switch",
1036 "Surround Playback Switch",
1037 "Center Playback Switch",
1038 "LFE Playback Switch",
1039 "Side Playback Switch",
1040 "Headphone Playback Switch",
2134ea4f 1041 "Speaker Playback Switch",
edb54a55 1042 "IEC958 Playback Switch",
2134ea4f
TI
1043 NULL
1044};
1045
603c4019 1046static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1047static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1048
2f2f4251
M
1049static int stac92xx_build_controls(struct hda_codec *codec)
1050{
1051 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI
1052 struct auto_pin_cfg *cfg = &spec->autocfg;
1053 hda_nid_t nid;
2f2f4251 1054 int err;
c7d4b2fa 1055 int i;
2f2f4251 1056
6479c631
TI
1057 if (spec->mixer) {
1058 err = snd_hda_add_new_ctls(codec, spec->mixer);
1059 if (err < 0)
1060 return err;
1061 }
c7d4b2fa
M
1062
1063 for (i = 0; i < spec->num_mixers; i++) {
1064 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1065 if (err < 0)
1066 return err;
1067 }
5207e10e
TI
1068 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1069 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1070 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1071 err = snd_hda_ctl_add(codec,
1697055e
TI
1072 snd_ctl_new1(&stac_dmux_mixer, codec));
1073 if (err < 0)
1074 return err;
1075 }
d9737751 1076 if (spec->num_smuxes > 0) {
00ef50c2
MR
1077 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1078 struct hda_input_mux *smux = &spec->private_smux;
1079 /* check for mute support on SPDIF out */
1080 if (wcaps & AC_WCAP_OUT_AMP) {
1081 smux->items[smux->num_items].label = "Off";
1082 smux->items[smux->num_items].index = 0;
1083 smux->num_items++;
1084 spec->spdif_mute = 1;
1085 }
d9737751 1086 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1087 err = snd_hda_ctl_add(codec,
d9737751
MR
1088 snd_ctl_new1(&stac_smux_mixer, codec));
1089 if (err < 0)
1090 return err;
1091 }
c7d4b2fa 1092
dabbed6f
M
1093 if (spec->multiout.dig_out_nid) {
1094 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1095 if (err < 0)
1096 return err;
9a08160b
TI
1097 err = snd_hda_create_spdif_share_sw(codec,
1098 &spec->multiout);
1099 if (err < 0)
1100 return err;
1101 spec->multiout.share_spdif = 1;
dabbed6f 1102 }
da74ae3e 1103 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1104 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1105 if (err < 0)
1106 return err;
1107 }
2134ea4f
TI
1108
1109 /* if we have no master control, let's create it */
1110 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1111 unsigned int vmaster_tlv[4];
2134ea4f 1112 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1113 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI
1114 /* correct volume offset */
1115 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
2134ea4f 1116 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1117 vmaster_tlv, slave_vols);
2134ea4f
TI
1118 if (err < 0)
1119 return err;
1120 }
1121 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1122 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1123 NULL, slave_sws);
1124 if (err < 0)
1125 return err;
1126 }
1127
d78d7a90
TI
1128 if (spec->aloopback_ctl &&
1129 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1130 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1131 if (err < 0)
1132 return err;
1133 }
1134
603c4019 1135 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI
1136
1137 /* create jack input elements */
1138 if (spec->hp_detect) {
1139 for (i = 0; i < cfg->hp_outs; i++) {
1140 int type = SND_JACK_HEADPHONE;
1141 nid = cfg->hp_pins[i];
1142 /* jack detection */
1143 if (cfg->hp_outs == i)
1144 type |= SND_JACK_LINEOUT;
1145 err = stac92xx_add_jack(codec, nid, type);
1146 if (err < 0)
1147 return err;
1148 }
1149 }
1150 for (i = 0; i < cfg->line_outs; i++) {
1151 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1152 SND_JACK_LINEOUT);
1153 if (err < 0)
1154 return err;
1155 }
1156 for (i = 0; i < AUTO_PIN_LAST; i++) {
1157 nid = cfg->input_pins[i];
1158 if (nid) {
1159 err = stac92xx_add_jack(codec, nid,
1160 SND_JACK_MICROPHONE);
1161 if (err < 0)
1162 return err;
1163 }
1164 }
1165
dabbed6f 1166 return 0;
2f2f4251
M
1167}
1168
403d1944 1169static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1170 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1171 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1172};
1173
58eec423
MCC
1174static unsigned int gateway9200_m4_pin_configs[8] = {
1175 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1176 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1177};
1178static unsigned int gateway9200_m4_2_pin_configs[8] = {
1179 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1180 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1181};
1182
1183/*
dfe495d0
TI
1184 STAC 9200 pin configs for
1185 102801A8
1186 102801DE
1187 102801E8
1188*/
1189static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1190 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1191 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1192};
1193
1194/*
1195 STAC 9200 pin configs for
1196 102801C0
1197 102801C1
1198*/
1199static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1200 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1201 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1202};
1203
1204/*
1205 STAC 9200 pin configs for
1206 102801C4 (Dell Dimension E310)
1207 102801C5
1208 102801C7
1209 102801D9
1210 102801DA
1211 102801E3
1212*/
1213static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1214 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1215 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1216};
1217
1218
1219/*
1220 STAC 9200-32 pin configs for
1221 102801B5 (Dell Inspiron 630m)
1222 102801D8 (Dell Inspiron 640m)
1223*/
1224static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1225 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1226 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1227};
1228
1229/*
1230 STAC 9200-32 pin configs for
1231 102801C2 (Dell Latitude D620)
1232 102801C8
1233 102801CC (Dell Latitude D820)
1234 102801D4
1235 102801D6
1236*/
1237static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1238 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1239 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1240};
1241
1242/*
1243 STAC 9200-32 pin configs for
1244 102801CE (Dell XPS M1710)
1245 102801CF (Dell Precision M90)
1246*/
1247static unsigned int dell9200_m23_pin_configs[8] = {
1248 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1249 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1250};
1251
1252/*
1253 STAC 9200-32 pin configs for
1254 102801C9
1255 102801CA
1256 102801CB (Dell Latitude 120L)
1257 102801D3
1258*/
1259static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1260 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1261 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1262};
1263
1264/*
1265 STAC 9200-32 pin configs for
1266 102801BD (Dell Inspiron E1505n)
1267 102801EE
1268 102801EF
1269*/
1270static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1271 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1272 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1273};
1274
1275/*
1276 STAC 9200-32 pin configs for
1277 102801F5 (Dell Inspiron 1501)
1278 102801F6
1279*/
1280static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1281 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1282 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1283};
1284
1285/*
1286 STAC 9200-32
1287 102801CD (Dell Inspiron E1705/9400)
1288*/
1289static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1290 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1291 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1292};
1293
bf277785
TD
1294static unsigned int oqo9200_pin_configs[8] = {
1295 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1296 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1297};
1298
dfe495d0 1299
f5fcc13c
TI
1300static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1301 [STAC_REF] = ref9200_pin_configs,
bf277785 1302 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1303 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1304 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1305 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1306 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1307 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1308 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1309 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1310 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1311 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1312 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1313 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1314 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1315 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1316};
1317
f5fcc13c 1318static const char *stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1319 [STAC_AUTO] = "auto",
f5fcc13c 1320 [STAC_REF] = "ref",
bf277785 1321 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1322 [STAC_9200_DELL_D21] = "dell-d21",
1323 [STAC_9200_DELL_D22] = "dell-d22",
1324 [STAC_9200_DELL_D23] = "dell-d23",
1325 [STAC_9200_DELL_M21] = "dell-m21",
1326 [STAC_9200_DELL_M22] = "dell-m22",
1327 [STAC_9200_DELL_M23] = "dell-m23",
1328 [STAC_9200_DELL_M24] = "dell-m24",
1329 [STAC_9200_DELL_M25] = "dell-m25",
1330 [STAC_9200_DELL_M26] = "dell-m26",
1331 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1332 [STAC_9200_M4] = "gateway-m4",
1333 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1334 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1335};
1336
1337static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1338 /* SigmaTel reference board */
1339 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1340 "DFI LanParty", STAC_REF),
577aa2c1
MR
1341 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1342 "DFI LanParty", STAC_REF),
e7377071 1343 /* Dell laptops have BIOS problem */
dfe495d0
TI
1344 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1345 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1346 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1347 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1348 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1349 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1350 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1351 "unknown Dell", STAC_9200_DELL_D22),
1352 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1353 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1354 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1355 "Dell Latitude D620", STAC_9200_DELL_M22),
1356 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1357 "unknown Dell", STAC_9200_DELL_D23),
1358 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1359 "unknown Dell", STAC_9200_DELL_D23),
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1361 "unknown Dell", STAC_9200_DELL_M22),
1362 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1363 "unknown Dell", STAC_9200_DELL_M24),
1364 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1365 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1366 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1367 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1369 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1370 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1371 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1373 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1375 "Dell Precision M90", STAC_9200_DELL_M23),
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1377 "unknown Dell", STAC_9200_DELL_M22),
1378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1379 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1381 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1383 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1385 "unknown Dell", STAC_9200_DELL_D23),
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1387 "unknown Dell", STAC_9200_DELL_D23),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1389 "unknown Dell", STAC_9200_DELL_D21),
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1391 "unknown Dell", STAC_9200_DELL_D23),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1393 "unknown Dell", STAC_9200_DELL_D21),
1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1395 "unknown Dell", STAC_9200_DELL_M25),
1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1397 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1399 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1401 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1402 /* Panasonic */
117f257d 1403 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1404 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1405 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1406 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1407 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1408 /* OQO Mobile */
1409 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1410 {} /* terminator */
1411};
1412
8e21c34c
TD
1413static unsigned int ref925x_pin_configs[8] = {
1414 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1415 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1416};
1417
9cb36c2a
MCC
1418static unsigned int stac925xM1_pin_configs[8] = {
1419 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1420 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1421};
1422
9cb36c2a
MCC
1423static unsigned int stac925xM1_2_pin_configs[8] = {
1424 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1425 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1426};
58eec423 1427
9cb36c2a
MCC
1428static unsigned int stac925xM2_pin_configs[8] = {
1429 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1430 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1431};
1432
8e21c34c 1433static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1434 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1435 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1436};
1437
9cb36c2a
MCC
1438static unsigned int stac925xM3_pin_configs[8] = {
1439 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1440 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1441};
58eec423 1442
9cb36c2a
MCC
1443static unsigned int stac925xM5_pin_configs[8] = {
1444 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1445 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1446};
1447
9cb36c2a
MCC
1448static unsigned int stac925xM6_pin_configs[8] = {
1449 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1450 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1451};
1452
1453static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1454 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1455 [STAC_M1] = stac925xM1_pin_configs,
1456 [STAC_M1_2] = stac925xM1_2_pin_configs,
1457 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1458 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1459 [STAC_M3] = stac925xM3_pin_configs,
1460 [STAC_M5] = stac925xM5_pin_configs,
1461 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1462};
1463
1464static const char *stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1465 [STAC_925x_AUTO] = "auto",
8e21c34c 1466 [STAC_REF] = "ref",
9cb36c2a
MCC
1467 [STAC_M1] = "m1",
1468 [STAC_M1_2] = "m1-2",
1469 [STAC_M2] = "m2",
8e21c34c 1470 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1471 [STAC_M3] = "m3",
1472 [STAC_M5] = "m5",
1473 [STAC_M6] = "m6",
8e21c34c
TD
1474};
1475
9cb36c2a 1476static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1477 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1478 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1479 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1480 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1481 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1482 /* Not sure about the brand name for those */
1483 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1484 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1485 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1486 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1487 {} /* terminator */
8e21c34c
TD
1488};
1489
1490static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1491 /* SigmaTel reference board */
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1494 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1495
1496 /* Default table for unknown ID */
1497 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1498
8e21c34c
TD
1499 {} /* terminator */
1500};
1501
a7662640 1502static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1503 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1504 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1505 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1506 0x01452050,
1507};
1508
1509static unsigned int dell_m6_pin_configs[13] = {
1510 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1511 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1512 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1513 0x4f0000f0,
e1f0d669
MR
1514};
1515
1516static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1517 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1518 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1519 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1520 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1521 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR
1522};
1523
1524static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1525 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1526 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1527 [STAC_92HD73XX_REF] = "ref",
ae709440 1528 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI
1529 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1530 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1531 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1532 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR
1533};
1534
1535static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1536 /* SigmaTel reference board */
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1538 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1540 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1542 "Intel DG45ID", STAC_92HD73XX_INTEL),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1544 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1546 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1548 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1550 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1552 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1554 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1556 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1558 "unknown Dell", STAC_DELL_M6_DMIC),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1560 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1562 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1564 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1566 "Dell Studio 1555", STAC_DELL_M6_DMIC),
e1f0d669
MR
1567 {} /* terminator */
1568};
1569
8bb0ac55 1570static unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR
1571 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1572 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR
1573 0x01451160, 0x98560170,
1574};
1575
8bb0ac55
MR
1576static unsigned int dell_s14_pin_configs[10] = {
1577 0x02214030, 0x02211010, 0x02a19020, 0x01014050,
1578 0x40f000f0, 0x01819040, 0x40f000f0, 0x90a60160,
1579 0x40f000f0, 0x40f000f0,
1580};
1581
d0513fc6
MR
1582static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1583 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1584 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1585 [STAC_DELL_S14] = dell_s14_pin_configs,
d0513fc6
MR
1586};
1587
1588static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1589 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1590 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1591 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1592 [STAC_DELL_S14] = "dell-s14",
d0513fc6
MR
1593};
1594
1595static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1596 /* SigmaTel reference board */
1597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1598 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1600 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR
1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1602 "unknown Dell", STAC_DELL_S14),
574f3c4f 1603 {} /* terminator */
d0513fc6
MR
1604};
1605
616f89e7 1606static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1607 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1608 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK
1609 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1610 0x00000000
e035b841
MR
1611};
1612
616f89e7 1613static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1614 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1615 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1616 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1617 0x00000000
a7662640
MR
1618};
1619
616f89e7 1620static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR
1621 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1622 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK
1623 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1624 0x00000000
a7662640
MR
1625};
1626
616f89e7 1627static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR
1628 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1629 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1630 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1631 0x00000000
3a7abfd2
MR
1632};
1633
e035b841
MR
1634static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1635 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1636 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1637 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1638 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1639 [STAC_HP_M4] = NULL,
1b0652eb 1640 [STAC_HP_DV5] = NULL,
ae6241fb 1641 [STAC_HP_HDX] = NULL,
514bf54c 1642 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR
1643};
1644
1645static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1646 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1647 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1648 [STAC_DELL_M4_1] = "dell-m4-1",
1649 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1650 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1651 [STAC_HP_M4] = "hp-m4",
1b0652eb 1652 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1653 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1654 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR
1655};
1656
1657static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1658 /* SigmaTel reference board */
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1660 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1662 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1664 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
58d8395b
TI
1665 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1666 "HP", STAC_HP_DV5),
2ae466f8
TI
1667 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
1668 "HP dv4-7", STAC_HP_DV5),
1669 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1670 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1672 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1673 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1674 "HP mini 1000", STAC_HP_M4),
ae6241fb 1675 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1676 "HP HDX", STAC_HP_HDX), /* HDX16 */
1972d025
TI
1677 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1678 "HP", STAC_HP_DV5),
a7662640
MR
1679 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1680 "unknown Dell", STAC_DELL_M4_1),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1682 "unknown Dell", STAC_DELL_M4_1),
1683 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1684 "unknown Dell", STAC_DELL_M4_1),
1685 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1686 "unknown Dell", STAC_DELL_M4_1),
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1688 "unknown Dell", STAC_DELL_M4_1),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1690 "unknown Dell", STAC_DELL_M4_1),
1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1692 "unknown Dell", STAC_DELL_M4_1),
1693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1694 "unknown Dell", STAC_DELL_M4_2),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1696 "unknown Dell", STAC_DELL_M4_2),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1698 "unknown Dell", STAC_DELL_M4_2),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1700 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1702 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1703 {} /* terminator */
1704};
1705
403d1944
MP
1706static unsigned int ref922x_pin_configs[10] = {
1707 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1708 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1709 0x40000100, 0x40000100,
1710};
1711
dfe495d0
TI
1712/*
1713 STAC 922X pin configs for
1714 102801A7
1715 102801AB
1716 102801A9
1717 102801D1
1718 102801D2
1719*/
1720static unsigned int dell_922x_d81_pin_configs[10] = {
1721 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1722 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1723 0x01813122, 0x400001f2,
1724};
1725
1726/*
1727 STAC 922X pin configs for
1728 102801AC
1729 102801D0
1730*/
1731static unsigned int dell_922x_d82_pin_configs[10] = {
1732 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1733 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1734 0x01813122, 0x400001f1,
1735};
1736
1737/*
1738 STAC 922X pin configs for
1739 102801BF
1740*/
1741static unsigned int dell_922x_m81_pin_configs[10] = {
1742 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1743 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1744 0x40C003f1, 0x405003f0,
1745};
1746
1747/*
1748 STAC 9221 A1 pin configs for
1749 102801D7 (Dell XPS M1210)
1750*/
1751static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1752 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1753 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1754 0x508003f3, 0x405003f4,
1755};
1756
403d1944 1757static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1758 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1759 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1760 0x02a19120, 0x40000100,
1761};
1762
1763static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1764 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1765 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1766 0x02a19320, 0x40000100,
1767};
1768
5d5d3bc3
IZ
1769static unsigned int intel_mac_v1_pin_configs[10] = {
1770 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1771 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1772 0x400000fc, 0x400000fb,
1773};
1774
1775static unsigned int intel_mac_v2_pin_configs[10] = {
1776 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1777 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1778 0x400000fc, 0x400000fb,
6f0778d8
NB
1779};
1780
5d5d3bc3
IZ
1781static unsigned int intel_mac_v3_pin_configs[10] = {
1782 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1783 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1784 0x400000fc, 0x400000fb,
1785};
1786
5d5d3bc3
IZ
1787static unsigned int intel_mac_v4_pin_configs[10] = {
1788 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1789 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1790 0x400000fc, 0x400000fb,
1791};
1792
5d5d3bc3
IZ
1793static unsigned int intel_mac_v5_pin_configs[10] = {
1794 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1795 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1796 0x400000fc, 0x400000fb,
0dae0f83
TI
1797};
1798
8c650087
MCC
1799static unsigned int ecs202_pin_configs[10] = {
1800 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1801 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1802 0x9037012e, 0x40e000f2,
1803};
76c08828 1804
19039bd0 1805static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1806 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1807 [STAC_D945GTP3] = d945gtp3_pin_configs,
1808 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1809 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1810 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1811 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1812 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1813 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1814 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1815 /* for backward compatibility */
5d5d3bc3
IZ
1816 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1817 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1818 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1819 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1820 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1821 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1822 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
1823 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1824 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1825 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1826 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
1827};
1828
f5fcc13c 1829static const char *stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1830 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI
1831 [STAC_D945_REF] = "ref",
1832 [STAC_D945GTP5] = "5stack",
1833 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
1834 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1835 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1836 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1837 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1838 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1839 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1840 /* for backward compatibility */
f5fcc13c 1841 [STAC_MACMINI] = "macmini",
3fc24d85 1842 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
1843 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1844 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1845 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1846 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1847 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
1848 [STAC_922X_DELL_D81] = "dell-d81",
1849 [STAC_922X_DELL_D82] = "dell-d82",
1850 [STAC_922X_DELL_M81] = "dell-m81",
1851 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
1852};
1853
1854static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1855 /* SigmaTel reference board */
1856 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1857 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
1858 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1859 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
1860 /* Intel 945G based systems */
1861 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1862 "Intel D945G", STAC_D945GTP3),
1863 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1864 "Intel D945G", STAC_D945GTP3),
1865 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1866 "Intel D945G", STAC_D945GTP3),
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1868 "Intel D945G", STAC_D945GTP3),
1869 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1870 "Intel D945G", STAC_D945GTP3),
1871 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1872 "Intel D945G", STAC_D945GTP3),
1873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1874 "Intel D945G", STAC_D945GTP3),
1875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1876 "Intel D945G", STAC_D945GTP3),
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1878 "Intel D945G", STAC_D945GTP3),
1879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1880 "Intel D945G", STAC_D945GTP3),
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1882 "Intel D945G", STAC_D945GTP3),
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1884 "Intel D945G", STAC_D945GTP3),
1885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1886 "Intel D945G", STAC_D945GTP3),
1887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1888 "Intel D945G", STAC_D945GTP3),
1889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1890 "Intel D945G", STAC_D945GTP3),
1891 /* Intel D945G 5-stack systems */
1892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1893 "Intel D945G", STAC_D945GTP5),
1894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1895 "Intel D945G", STAC_D945GTP5),
1896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1897 "Intel D945G", STAC_D945GTP5),
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1899 "Intel D945G", STAC_D945GTP5),
1900 /* Intel 945P based systems */
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1902 "Intel D945P", STAC_D945GTP3),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1904 "Intel D945P", STAC_D945GTP3),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1906 "Intel D945P", STAC_D945GTP3),
1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1908 "Intel D945P", STAC_D945GTP3),
1909 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1910 "Intel D945P", STAC_D945GTP3),
1911 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1912 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
1913 /* other intel */
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
1915 "Intel D945", STAC_D945_REF),
f5fcc13c 1916 /* other systems */
536319af 1917 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1918 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1919 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
1920 /* Dell systems */
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1922 "unknown Dell", STAC_922X_DELL_D81),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1924 "unknown Dell", STAC_922X_DELL_D81),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1926 "unknown Dell", STAC_922X_DELL_D81),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1928 "unknown Dell", STAC_922X_DELL_D82),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1930 "unknown Dell", STAC_922X_DELL_M81),
1931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1932 "unknown Dell", STAC_922X_DELL_D82),
1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1934 "unknown Dell", STAC_922X_DELL_D81),
1935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1936 "unknown Dell", STAC_922X_DELL_D81),
1937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1938 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 1939 /* ECS/PC Chips boards */
dea0a509 1940 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 1941 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
1942 {} /* terminator */
1943};
1944
3cc08dc6 1945static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
1946 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1947 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1948 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1949 0x01c42190, 0x40000100,
3cc08dc6
MP
1950};
1951
93ed1503 1952static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
1953 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1954 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1955 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1956 0x40000100, 0x40000100
1957};
1958
93ed1503
TD
1959static unsigned int d965_5st_pin_configs[14] = {
1960 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1961 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1962 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1963 0x40000100, 0x40000100
1964};
1965
679d92ed
TI
1966static unsigned int d965_5st_no_fp_pin_configs[14] = {
1967 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
1968 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1969 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1970 0x40000100, 0x40000100
1971};
1972
4ff076e5
TD
1973static unsigned int dell_3st_pin_configs[14] = {
1974 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1975 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1976 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
1977 0x40c003fc, 0x40000100
1978};
1979
93ed1503 1980static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 1981 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
1982 [STAC_D965_REF] = ref927x_pin_configs,
1983 [STAC_D965_3ST] = d965_3st_pin_configs,
1984 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 1985 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR
1986 [STAC_DELL_3ST] = dell_3st_pin_configs,
1987 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP
1988};
1989
f5fcc13c 1990static const char *stac927x_models[STAC_927X_MODELS] = {
1607b8ea 1991 [STAC_927X_AUTO] = "auto",
e28d8322 1992 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
1993 [STAC_D965_REF] = "ref",
1994 [STAC_D965_3ST] = "3stack",
1995 [STAC_D965_5ST] = "5stack",
679d92ed 1996 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR
1997 [STAC_DELL_3ST] = "dell-3stack",
1998 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI
1999};
2000
2001static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2002 /* SigmaTel reference board */
2003 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2004 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2005 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2006 "DFI LanParty", STAC_D965_REF),
81d3dbde 2007 /* Intel 946 based systems */
f5fcc13c
TI
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2010 /* 965 based 3 stack systems */
dea0a509
TI
2011 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2012 "Intel D965", STAC_D965_3ST),
2013 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2014 "Intel D965", STAC_D965_3ST),
4ff076e5 2015 /* Dell 3 stack systems */
8e9068b1 2016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2017 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2020 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2022 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2023 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2024 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2026 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2028 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2029 /* 965 based 5 stack systems */
dea0a509
TI
2030 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2031 "Intel D965", STAC_D965_5ST),
2032 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2033 "Intel D965", STAC_D965_5ST),
3cc08dc6
MP
2034 {} /* terminator */
2035};
2036
f3302a59
MP
2037static unsigned int ref9205_pin_configs[12] = {
2038 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2039 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2040 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2041};
2042
dfe495d0
TI
2043/*
2044 STAC 9205 pin configs for
2045 102801F1
2046 102801F2
2047 102801FC
2048 102801FD
2049 10280204
2050 1028021F
3fa2ef74 2051 10280228 (Dell Vostro 1500)
dfe495d0
TI
2052*/
2053static unsigned int dell_9205_m42_pin_configs[12] = {
2054 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2055 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2056 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2057};
2058
2059/*
2060 STAC 9205 pin configs for
2061 102801F9
2062 102801FA
2063 102801FE
2064 102801FF (Dell Precision M4300)
2065 10280206
2066 10280200
2067 10280201
2068*/
2069static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2070 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2071 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2072 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2073};
2074
dfe495d0 2075static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2076 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2077 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2078 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2079};
2080
f5fcc13c 2081static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2082 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2083 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2084 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2085 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2086 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2087};
2088
f5fcc13c 2089static const char *stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2090 [STAC_9205_AUTO] = "auto",
f5fcc13c 2091 [STAC_9205_REF] = "ref",
dfe495d0 2092 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2093 [STAC_9205_DELL_M43] = "dell-m43",
2094 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2095 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2096};
2097
2098static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2099 /* SigmaTel reference board */
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2101 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2103 "SigmaTel", STAC_9205_REF),
577aa2c1
MR
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2105 "DFI LanParty", STAC_9205_REF),
d9a4268e 2106 /* Dell */
dfe495d0
TI
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2108 "unknown Dell", STAC_9205_DELL_M42),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2110 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2112 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2114 "Dell Precision", STAC_9205_DELL_M43),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2116 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2118 "unknown Dell", STAC_9205_DELL_M42),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2120 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2122 "Dell Precision", STAC_9205_DELL_M43),
2123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2124 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2126 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2128 "Dell Precision", STAC_9205_DELL_M43),
2129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2130 "Dell Precision", STAC_9205_DELL_M43),
2131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2132 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2134 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2136 "Dell Vostro 1500", STAC_9205_DELL_M42),
d9a4268e 2137 /* Gateway */
42b95f0c 2138 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2139 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2140 {} /* terminator */
2141};
2142
330ee995
TI
2143static void stac92xx_set_config_regs(struct hda_codec *codec,
2144 unsigned int *pincfgs)
11b44bbd
RF
2145{
2146 int i;
2147 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2148
330ee995
TI
2149 if (!pincfgs)
2150 return;
11b44bbd 2151
87d48363 2152 for (i = 0; i < spec->num_pins; i++)
330ee995
TI
2153 if (spec->pin_nids[i] && pincfgs[i])
2154 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2155 pincfgs[i]);
af9f341a
TI
2156}
2157
dabbed6f 2158/*
c7d4b2fa 2159 * Analog playback callbacks
dabbed6f 2160 */
c7d4b2fa
M
2161static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2162 struct hda_codec *codec,
c8b6bf9b 2163 struct snd_pcm_substream *substream)
2f2f4251 2164{
dabbed6f 2165 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2166 if (spec->stream_delay)
2167 msleep(spec->stream_delay);
9a08160b
TI
2168 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2169 hinfo);
2f2f4251
M
2170}
2171
2f2f4251
M
2172static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2173 struct hda_codec *codec,
2174 unsigned int stream_tag,
2175 unsigned int format,
c8b6bf9b 2176 struct snd_pcm_substream *substream)
2f2f4251
M
2177{
2178 struct sigmatel_spec *spec = codec->spec;
403d1944 2179 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2180}
2181
2182static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2183 struct hda_codec *codec,
c8b6bf9b 2184 struct snd_pcm_substream *substream)
2f2f4251
M
2185{
2186 struct sigmatel_spec *spec = codec->spec;
2187 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2188}
2189
dabbed6f
M
2190/*
2191 * Digital playback callbacks
2192 */
2193static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2194 struct hda_codec *codec,
c8b6bf9b 2195 struct snd_pcm_substream *substream)
dabbed6f
M
2196{
2197 struct sigmatel_spec *spec = codec->spec;
2198 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2199}
2200
2201static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2202 struct hda_codec *codec,
c8b6bf9b 2203 struct snd_pcm_substream *substream)
dabbed6f
M
2204{
2205 struct sigmatel_spec *spec = codec->spec;
2206 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2207}
2208
6b97eb45
TI
2209static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2210 struct hda_codec *codec,
2211 unsigned int stream_tag,
2212 unsigned int format,
2213 struct snd_pcm_substream *substream)
2214{
2215 struct sigmatel_spec *spec = codec->spec;
2216 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2217 stream_tag, format, substream);
2218}
2219
9411e21c
TI
2220static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2221 struct hda_codec *codec,
2222 struct snd_pcm_substream *substream)
2223{
2224 struct sigmatel_spec *spec = codec->spec;
2225 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2226}
2227
dabbed6f 2228
2f2f4251
M
2229/*
2230 * Analog capture callbacks
2231 */
2232static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2233 struct hda_codec *codec,
2234 unsigned int stream_tag,
2235 unsigned int format,
c8b6bf9b 2236 struct snd_pcm_substream *substream)
2f2f4251
M
2237{
2238 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2239 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2240
8daaaa97
MR
2241 if (spec->powerdown_adcs) {
2242 msleep(40);
8c2f767b 2243 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2244 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2245 }
2246 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2247 return 0;
2248}
2249
2250static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2251 struct hda_codec *codec,
c8b6bf9b 2252 struct snd_pcm_substream *substream)
2f2f4251
M
2253{
2254 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2255 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2256
8daaaa97
MR
2257 snd_hda_codec_cleanup_stream(codec, nid);
2258 if (spec->powerdown_adcs)
8c2f767b 2259 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2260 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2261 return 0;
2262}
2263
dabbed6f
M
2264static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2265 .substreams = 1,
2266 .channels_min = 2,
2267 .channels_max = 2,
2268 /* NID is set in stac92xx_build_pcms */
2269 .ops = {
2270 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2271 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI
2272 .prepare = stac92xx_dig_playback_pcm_prepare,
2273 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M
2274 },
2275};
2276
2277static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2278 .substreams = 1,
2279 .channels_min = 2,
2280 .channels_max = 2,
2281 /* NID is set in stac92xx_build_pcms */
2282};
2283
2f2f4251
M
2284static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2285 .substreams = 1,
2286 .channels_min = 2,
c7d4b2fa 2287 .channels_max = 8,
2f2f4251
M
2288 .nid = 0x02, /* NID to query formats and rates */
2289 .ops = {
2290 .open = stac92xx_playback_pcm_open,
2291 .prepare = stac92xx_playback_pcm_prepare,
2292 .cleanup = stac92xx_playback_pcm_cleanup
2293 },
2294};
2295
3cc08dc6
MP
2296static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2297 .substreams = 1,
2298 .channels_min = 2,
2299 .channels_max = 2,
2300 .nid = 0x06, /* NID to query formats and rates */
2301 .ops = {
2302 .open = stac92xx_playback_pcm_open,
2303 .prepare = stac92xx_playback_pcm_prepare,
2304 .cleanup = stac92xx_playback_pcm_cleanup
2305 },
2306};
2307
2f2f4251 2308static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2309 .channels_min = 2,
2310 .channels_max = 2,
9e05b7a3 2311 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2312 .ops = {
2313 .prepare = stac92xx_capture_pcm_prepare,
2314 .cleanup = stac92xx_capture_pcm_cleanup
2315 },
2316};
2317
2318static int stac92xx_build_pcms(struct hda_codec *codec)
2319{
2320 struct sigmatel_spec *spec = codec->spec;
2321 struct hda_pcm *info = spec->pcm_rec;
2322
2323 codec->num_pcms = 1;
2324 codec->pcm_info = info;
2325
c7d4b2fa 2326 info->name = "STAC92xx Analog";
2f2f4251 2327 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2328 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2329 spec->multiout.dac_nids[0];
2f2f4251 2330 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2331 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2332 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2333
2334 if (spec->alt_switch) {
2335 codec->num_pcms++;
2336 info++;
2337 info->name = "STAC92xx Analog Alt";
2338 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2339 }
2f2f4251 2340
dabbed6f
M
2341 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2342 codec->num_pcms++;
2343 info++;
2344 info->name = "STAC92xx Digital";
0852d7a6 2345 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M
2346 if (spec->multiout.dig_out_nid) {
2347 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2348 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2349 }
2350 if (spec->dig_in_nid) {
2351 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2352 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2353 }
2354 }
2355
2f2f4251
M
2356 return 0;
2357}
2358
7c922de7
NL
2359static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2360 hda_nid_t nid)
c960a03b 2361{
1327a32b 2362 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI
2363 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2364 if (pincap & AC_PINCAP_VREF_100)
2365 return AC_PINCTL_VREF_100;
2366 if (pincap & AC_PINCAP_VREF_80)
2367 return AC_PINCTL_VREF_80;
2368 if (pincap & AC_PINCAP_VREF_50)
2369 return AC_PINCTL_VREF_50;
2370 if (pincap & AC_PINCAP_VREF_GRD)
2371 return AC_PINCTL_VREF_GRD;
2372 return 0;
2373}
2374
403d1944
MP
2375static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2376
2377{
82beb8fd
TI
2378 snd_hda_codec_write_cache(codec, nid, 0,
2379 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP
2380}
2381
7c2ba97b
MR
2382#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2383
2384static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2385 struct snd_ctl_elem_value *ucontrol)
2386{
2387 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2388 struct sigmatel_spec *spec = codec->spec;
2389
d7a89436 2390 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2391 return 0;
2392}
2393
62558ce1 2394static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2395
7c2ba97b
MR
2396static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2397 struct snd_ctl_elem_value *ucontrol)
2398{
2399 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2400 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2401 int nid = kcontrol->private_value;
2402
2403 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR
2404
2405 /* check to be sure that the ports are upto date with
2406 * switch changes
2407 */
62558ce1 2408 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR
2409
2410 return 1;
2411}
2412
7c922de7
NL
2413static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2414 struct snd_ctl_elem_info *uinfo)
2415{
2416 int i;
2417 static char *texts[] = {
2418 "Mic In", "Line In", "Line Out"
2419 };
2420
2421 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2422 struct sigmatel_spec *spec = codec->spec;
2423 hda_nid_t nid = kcontrol->private_value;
2424
2425 if (nid == spec->mic_switch || nid == spec->line_switch)
2426 i = 3;
2427 else
2428 i = 2;
2429
2430 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2431 uinfo->value.enumerated.items = i;
2432 uinfo->count = 1;
2433 if (uinfo->value.enumerated.item >= i)
2434 uinfo->value.enumerated.item = i-1;
2435 strcpy(uinfo->value.enumerated.name,
2436 texts[uinfo->value.enumerated.item]);
2437
2438 return 0;
2439}
2440
2441static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2442 struct snd_ctl_elem_value *ucontrol)
2443{
2444 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2445 hda_nid_t nid = kcontrol->private_value;
2446 unsigned int vref = stac92xx_vref_get(codec, nid);
2447
2448 if (vref == stac92xx_get_default_vref(codec, nid))
2449 ucontrol->value.enumerated.item[0] = 0;
2450 else if (vref == AC_PINCTL_VREF_GRD)
2451 ucontrol->value.enumerated.item[0] = 1;
2452 else if (vref == AC_PINCTL_VREF_HIZ)
2453 ucontrol->value.enumerated.item[0] = 2;
2454
2455 return 0;
2456}
2457
2458static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2459 struct snd_ctl_elem_value *ucontrol)
2460{
2461 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2462 unsigned int new_vref = 0;
b8621516 2463 int error;
7c922de7
NL
2464 hda_nid_t nid = kcontrol->private_value;
2465
2466 if (ucontrol->value.enumerated.item[0] == 0)
2467 new_vref = stac92xx_get_default_vref(codec, nid);
2468 else if (ucontrol->value.enumerated.item[0] == 1)
2469 new_vref = AC_PINCTL_VREF_GRD;
2470 else if (ucontrol->value.enumerated.item[0] == 2)
2471 new_vref = AC_PINCTL_VREF_HIZ;
2472 else
2473 return 0;
2474
2475 if (new_vref != stac92xx_vref_get(codec, nid)) {
2476 error = stac92xx_vref_set(codec, nid, new_vref);
2477 return error;
2478 }
2479
2480 return 0;
2481}
2482
2483static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2484 struct snd_ctl_elem_info *uinfo)
2485{
2486 static char *texts[2];
2487 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2488 struct sigmatel_spec *spec = codec->spec;
2489
2490 if (kcontrol->private_value == spec->line_switch)
2491 texts[0] = "Line In";
2492 else
2493 texts[0] = "Mic In";
2494 texts[1] = "Line Out";
2495 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2496 uinfo->value.enumerated.items = 2;
2497 uinfo->count = 1;
2498
2499 if (uinfo->value.enumerated.item >= 2)
2500 uinfo->value.enumerated.item = 1;
2501 strcpy(uinfo->value.enumerated.name,
2502 texts[uinfo->value.enumerated.item]);
2503
2504 return 0;
2505}
403d1944
MP
2506
2507static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2508{
2509 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2510 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2511 hda_nid_t nid = kcontrol->private_value;
2512 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2513
7c922de7 2514 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP
2515 return 0;
2516}
2517
2518static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2519{
2520 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2521 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2522 hda_nid_t nid = kcontrol->private_value;
2523 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2524 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP
2525
2526 spec->io_switch[io_idx] = val;
2527
2528 if (val)
2529 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2530 else {
2531 unsigned int pinctl = AC_PINCTL_IN_EN;
2532 if (io_idx) /* set VREF for mic */
7c922de7 2533 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI
2534 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2535 }
40c1d308
JZ
2536
2537 /* check the auto-mute again: we need to mute/unmute the speaker
2538 * appropriately according to the pin direction
2539 */
2540 if (spec->hp_detect)
62558ce1 2541 stac_issue_unsol_event(codec, nid);
40c1d308 2542
403d1944
MP
2543 return 1;
2544}
2545
0fb87bb4
ML
2546#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2547
2548static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2549 struct snd_ctl_elem_value *ucontrol)
2550{
2551 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2552 struct sigmatel_spec *spec = codec->spec;
2553
2554 ucontrol->value.integer.value[0] = spec->clfe_swap;
2555 return 0;
2556}
2557
2558static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2559 struct snd_ctl_elem_value *ucontrol)
2560{
2561 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2562 struct sigmatel_spec *spec = codec->spec;
2563 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2564 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2565
68ea7b2f 2566 if (spec->clfe_swap == val)
0fb87bb4
ML
2567 return 0;
2568
68ea7b2f 2569 spec->clfe_swap = val;
0fb87bb4
ML
2570
2571 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2572 spec->clfe_swap ? 0x4 : 0x0);
2573
2574 return 1;
2575}
2576
7c2ba97b
MR
2577#define STAC_CODEC_HP_SWITCH(xname) \
2578 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2579 .name = xname, \
2580 .index = 0, \
2581 .info = stac92xx_hp_switch_info, \
2582 .get = stac92xx_hp_switch_get, \
2583 .put = stac92xx_hp_switch_put, \
2584 }
2585
403d1944
MP
2586#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2587 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2588 .name = xname, \
2589 .index = 0, \
2590 .info = stac92xx_io_switch_info, \
2591 .get = stac92xx_io_switch_get, \
2592 .put = stac92xx_io_switch_put, \
2593 .private_value = xpval, \
2594 }
2595
0fb87bb4
ML
2596#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2597 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2598 .name = xname, \
2599 .index = 0, \
2600 .info = stac92xx_clfe_switch_info, \
2601 .get = stac92xx_clfe_switch_get, \
2602 .put = stac92xx_clfe_switch_put, \
2603 .private_value = xpval, \
2604 }
403d1944 2605
c7d4b2fa
M
2606enum {
2607 STAC_CTL_WIDGET_VOL,
2608 STAC_CTL_WIDGET_MUTE,
09a99959 2609 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2610 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2611 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL
2612 STAC_CTL_WIDGET_CLFE_SWITCH,
2613 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M
2614};
2615
c8b6bf9b 2616static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2617 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2618 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2619 STAC_MONO_MUX,
7c2ba97b 2620 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2621 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2622 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2623 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M
2624};
2625
2626/* add dynamic controls */
e3c75964
TI
2627static struct snd_kcontrol_new *
2628stac_control_new(struct sigmatel_spec *spec,
2629 struct snd_kcontrol_new *ktemp,
2630 const char *name)
c7d4b2fa 2631{
c8b6bf9b 2632 struct snd_kcontrol_new *knew;
c7d4b2fa 2633
603c4019
TI
2634 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2635 knew = snd_array_new(&spec->kctls);
2636 if (!knew)
e3c75964 2637 return NULL;
4d4e9bb3 2638 *knew = *ktemp;
82fe0c58 2639 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2640 if (!knew->name) {
2641 /* roolback */
2642 memset(knew, 0, sizeof(*knew));
2643 spec->kctls.alloced--;
2644 return NULL;
2645 }
2646 return knew;
2647}
2648
2649static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2650 struct snd_kcontrol_new *ktemp,
2651 int idx, const char *name,
2652 unsigned long val)
2653{
2654 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name);
2655 if (!knew)
c7d4b2fa 2656 return -ENOMEM;
e3c75964 2657 knew->index = idx;
c7d4b2fa 2658 knew->private_value = val;
c7d4b2fa
M
2659 return 0;
2660}
2661
4d4e9bb3
TI
2662static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2663 int type, int idx, const char *name,
2664 unsigned long val)
2665{
2666 return stac92xx_add_control_temp(spec,
2667 &stac92xx_control_templates[type],
2668 idx, name, val);
2669}
2670
4682eee0
MR
2671
2672/* add dynamic controls */
4d4e9bb3
TI
2673static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2674 const char *name, unsigned long val)
4682eee0
MR
2675{
2676 return stac92xx_add_control_idx(spec, type, 0, name, val);
2677}
2678
e3c75964
TI
2679static struct snd_kcontrol_new stac_input_src_temp = {
2680 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2681 .name = "Input Source",
2682 .info = stac92xx_mux_enum_info,
2683 .get = stac92xx_mux_enum_get,
2684 .put = stac92xx_mux_enum_put,
2685};
2686
7c922de7
NL
2687static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2688 hda_nid_t nid, int idx)
2689{
2690 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2691 int control = 0;
2692 struct sigmatel_spec *spec = codec->spec;
2693 char name[22];
2694
2695 if (!((get_defcfg_connect(def_conf)) & AC_JACK_PORT_FIXED)) {
2696 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2697 && nid == spec->line_switch)
2698 control = STAC_CTL_WIDGET_IO_SWITCH;
2699 else if (snd_hda_query_pin_caps(codec, nid)
2700 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2701 control = STAC_CTL_WIDGET_DC_BIAS;
2702 else if (nid == spec->mic_switch)
2703 control = STAC_CTL_WIDGET_IO_SWITCH;
2704 }
2705
2706 if (control) {
2707 strcpy(name, auto_pin_cfg_labels[idx]);
2708 return stac92xx_add_control(codec->spec, control,
2709 strcat(name, " Jack Mode"), nid);
2710 }
2711
2712 return 0;
2713}
2714
e3c75964
TI
2715static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2716{
2717 struct snd_kcontrol_new *knew;
2718 struct hda_input_mux *imux = &spec->private_imux;
2719
3d21d3f7
TI
2720 if (spec->auto_mic)
2721 return 0; /* no need for input source */
e3c75964
TI
2722 if (!spec->num_adcs || imux->num_items <= 1)
2723 return 0; /* no need for input source control */
2724 knew = stac_control_new(spec, &stac_input_src_temp,
2725 stac_input_src_temp.name);
2726 if (!knew)
2727 return -ENOMEM;
2728 knew->count = spec->num_adcs;
2729 return 0;
2730}
2731
c21ca4a8
TI
2732/* check whether the line-input can be used as line-out */
2733static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2734{
2735 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2736 struct auto_pin_cfg *cfg = &spec->autocfg;
2737 hda_nid_t nid;
2738 unsigned int pincap;
8e9068b1 2739
c21ca4a8
TI
2740 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2741 return 0;
2742 nid = cfg->input_pins[AUTO_PIN_LINE];
1327a32b 2743 pincap = snd_hda_query_pin_caps(codec, nid);
c21ca4a8
TI
2744 if (pincap & AC_PINCAP_OUT)
2745 return nid;
2746 return 0;
2747}
403d1944 2748
c21ca4a8
TI
2749/* check whether the mic-input can be used as line-out */
2750static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2751{
2752 struct sigmatel_spec *spec = codec->spec;
2753 struct auto_pin_cfg *cfg = &spec->autocfg;
2754 unsigned int def_conf, pincap;
2755 unsigned int mic_pin;
2756
2757 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2758 return 0;
2759 mic_pin = AUTO_PIN_MIC;
2760 for (;;) {
2761 hda_nid_t nid = cfg->input_pins[mic_pin];
330ee995 2762 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI
2763 /* some laptops have an internal analog microphone
2764 * which can't be used as a output */
2765 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
1327a32b 2766 pincap = snd_hda_query_pin_caps(codec, nid);
c21ca4a8
TI
2767 if (pincap & AC_PINCAP_OUT)
2768 return nid;
403d1944 2769 }
c21ca4a8
TI
2770 if (mic_pin == AUTO_PIN_MIC)
2771 mic_pin = AUTO_PIN_FRONT_MIC;
2772 else
2773 break;
403d1944 2774 }
403d1944
MP
2775 return 0;
2776}
2777
7b043899
SL
2778static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2779{
2780 int i;
2781
2782 for (i = 0; i < spec->multiout.num_dacs; i++) {
2783 if (spec->multiout.dac_nids[i] == nid)
2784 return 1;
2785 }
2786
2787 return 0;
2788}
2789
c21ca4a8
TI
2790static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2791{
2792 int i;
2793 if (is_in_dac_nids(spec, nid))
2794 return 1;
2795 for (i = 0; i < spec->autocfg.hp_outs; i++)
2796 if (spec->hp_dacs[i] == nid)
2797 return 1;
2798 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2799 if (spec->speaker_dacs[i] == nid)
2800 return 1;
2801 return 0;
2802}
2803
2804static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2805{
2806 struct sigmatel_spec *spec = codec->spec;
2807 int j, conn_len;
2808 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2809 unsigned int wcaps, wtype;
2810
2811 conn_len = snd_hda_get_connections(codec, nid, conn,
2812 HDA_MAX_CONNECTIONS);
2813 for (j = 0; j < conn_len; j++) {
14bafe32 2814 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2815 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI
2816 /* we check only analog outputs */
2817 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2818 continue;
2819 /* if this route has a free DAC, assign it */
2820 if (!check_all_dac_nids(spec, conn[j])) {
2821 if (conn_len > 1) {
2822 /* select this DAC in the pin's input mux */
2823 snd_hda_codec_write_cache(codec, nid, 0,
2824 AC_VERB_SET_CONNECT_SEL, j);
2825 }
2826 return conn[j];
2827 }
2828 }
ee58a7ca
TI
2829 /* if all DACs are already assigned, connect to the primary DAC */
2830 if (conn_len > 1) {
2831 for (j = 0; j < conn_len; j++) {
2832 if (conn[j] == spec->multiout.dac_nids[0]) {
2833 snd_hda_codec_write_cache(codec, nid, 0,
2834 AC_VERB_SET_CONNECT_SEL, j);
2835 break;
2836 }
2837 }
2838 }
c21ca4a8
TI
2839 return 0;
2840}
2841
2842static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2843static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2844
3cc08dc6 2845/*
7b043899
SL
2846 * Fill in the dac_nids table from the parsed pin configuration
2847 * This function only works when every pin in line_out_pins[]
2848 * contains atleast one DAC in its connection list. Some 92xx
2849 * codecs are not connected directly to a DAC, such as the 9200
2850 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2851 */
c21ca4a8 2852static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
2853{
2854 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2855 struct auto_pin_cfg *cfg = &spec->autocfg;
2856 int i;
2857 hda_nid_t nid, dac;
7b043899 2858
c7d4b2fa
M
2859 for (i = 0; i < cfg->line_outs; i++) {
2860 nid = cfg->line_out_pins[i];
c21ca4a8
TI
2861 dac = get_unassigned_dac(codec, nid);
2862 if (!dac) {
df802952
TI
2863 if (spec->multiout.num_dacs > 0) {
2864 /* we have already working output pins,
2865 * so let's drop the broken ones again
2866 */
2867 cfg->line_outs = spec->multiout.num_dacs;
2868 break;
2869 }
7b043899
SL
2870 /* error out, no available DAC found */
2871 snd_printk(KERN_ERR
2872 "%s: No available DAC for pin 0x%x\n",
2873 __func__, nid);
2874 return -ENODEV;
2875 }
c21ca4a8
TI
2876 add_spec_dacs(spec, dac);
2877 }
7b043899 2878
139e071b
TI
2879 for (i = 0; i < cfg->hp_outs; i++) {
2880 nid = cfg->hp_pins[i];
2881 dac = get_unassigned_dac(codec, nid);
2882 if (dac) {
2883 if (!spec->multiout.hp_nid)
2884 spec->multiout.hp_nid = dac;
2885 else
2886 add_spec_extra_dacs(spec, dac);
2887 }
2888 spec->hp_dacs[i] = dac;
2889 }
2890
2891 for (i = 0; i < cfg->speaker_outs; i++) {
2892 nid = cfg->speaker_pins[i];
2893 dac = get_unassigned_dac(codec, nid);
2894 if (dac)
2895 add_spec_extra_dacs(spec, dac);
2896 spec->speaker_dacs[i] = dac;
2897 }
2898
c21ca4a8
TI
2899 /* add line-in as output */
2900 nid = check_line_out_switch(codec);
2901 if (nid) {
2902 dac = get_unassigned_dac(codec, nid);
2903 if (dac) {
2904 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2905 nid, cfg->line_outs);
2906 cfg->line_out_pins[cfg->line_outs] = nid;
2907 cfg->line_outs++;
2908 spec->line_switch = nid;
2909 add_spec_dacs(spec, dac);
2910 }
2911 }
2912 /* add mic as output */
2913 nid = check_mic_out_switch(codec);
2914 if (nid) {
2915 dac = get_unassigned_dac(codec, nid);
2916 if (dac) {
2917 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2918 nid, cfg->line_outs);
2919 cfg->line_out_pins[cfg->line_outs] = nid;
2920 cfg->line_outs++;
2921 spec->mic_switch = nid;
2922 add_spec_dacs(spec, dac);
2923 }
2924 }
c7d4b2fa 2925
c21ca4a8 2926 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
2927 spec->multiout.num_dacs,
2928 spec->multiout.dac_nids[0],
2929 spec->multiout.dac_nids[1],
2930 spec->multiout.dac_nids[2],
2931 spec->multiout.dac_nids[3],
2932 spec->multiout.dac_nids[4]);
c21ca4a8 2933
c7d4b2fa
M
2934 return 0;
2935}
2936
eb06ed8f 2937/* create volume control/switch for the given prefx type */
668b9652
TI
2938static int create_controls_idx(struct hda_codec *codec, const char *pfx,
2939 int idx, hda_nid_t nid, int chs)
eb06ed8f 2940{
7c7767eb 2941 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
2942 char name[32];
2943 int err;
2944
7c7767eb
TI
2945 if (!spec->check_volume_offset) {
2946 unsigned int caps, step, nums, db_scale;
2947 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
2948 step = (caps & AC_AMPCAP_STEP_SIZE) >>
2949 AC_AMPCAP_STEP_SIZE_SHIFT;
2950 step = (step + 1) * 25; /* in .01dB unit */
2951 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
2952 AC_AMPCAP_NUM_STEPS_SHIFT;
2953 db_scale = nums * step;
2954 /* if dB scale is over -64dB, and finer enough,
2955 * let's reduce it to half
2956 */
2957 if (db_scale > 6400 && nums >= 0x1f)
2958 spec->volume_offset = nums / 2;
2959 spec->check_volume_offset = 1;
2960 }
2961
eb06ed8f 2962 sprintf(name, "%s Playback Volume", pfx);
668b9652 2963 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI
2964 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
2965 spec->volume_offset));
eb06ed8f
TI
2966 if (err < 0)
2967 return err;
2968 sprintf(name, "%s Playback Switch", pfx);
668b9652 2969 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI
2970 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2971 if (err < 0)
2972 return err;
2973 return 0;
2974}
2975
668b9652
TI
2976#define create_controls(codec, pfx, nid, chs) \
2977 create_controls_idx(codec, pfx, 0, nid, chs)
2978
ae0afd81
MR
2979static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2980{
c21ca4a8 2981 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
2982 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2983 return 1;
2984 } else {
2985 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2986 spec->multiout.num_dacs++;
2987 }
2988 return 0;
2989}
2990
c21ca4a8 2991static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 2992{
c21ca4a8
TI
2993 int i;
2994 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
2995 if (!spec->multiout.extra_out_nid[i]) {
2996 spec->multiout.extra_out_nid[i] = nid;
2997 return 0;
2998 }
2999 }
3000 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3001 return 1;
ae0afd81
MR
3002}
3003
dc04d1b4
TI
3004/* Create output controls
3005 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3006 */
3007static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3008 const hda_nid_t *pins,
3009 const hda_nid_t *dac_nids,
3010 int type)
c7d4b2fa 3011{
76624534 3012 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI
3013 static const char *chname[4] = {
3014 "Front", "Surround", NULL /*CLFE*/, "Side"
3015 };
dc04d1b4 3016 hda_nid_t nid;
91589232
TI
3017 int i, err;
3018 unsigned int wid_caps;
0fb87bb4 3019
dc04d1b4 3020 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c
TI
3021 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
3022 wid_caps = get_wcaps(codec, pins[i]);
3023 if (wid_caps & AC_WCAP_UNSOL_CAP)
3024 spec->hp_detect = 1;
3025 }
dc04d1b4
TI
3026 nid = dac_nids[i];
3027 if (!nid)
3028 continue;
3029 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3030 /* Center/LFE */
7c7767eb 3031 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3032 if (err < 0)
c7d4b2fa 3033 return err;
7c7767eb 3034 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3035 if (err < 0)
c7d4b2fa 3036 return err;
0fb87bb4
ML
3037
3038 wid_caps = get_wcaps(codec, nid);
3039
3040 if (wid_caps & AC_WCAP_LR_SWAP) {
3041 err = stac92xx_add_control(spec,
3042 STAC_CTL_WIDGET_CLFE_SWITCH,
3043 "Swap Center/LFE Playback Switch", nid);
3044
3045 if (err < 0)
3046 return err;
3047 }
3048
c7d4b2fa 3049 } else {
dc04d1b4 3050 const char *name;
668b9652 3051 int idx;
dc04d1b4
TI
3052 switch (type) {
3053 case AUTO_PIN_HP_OUT:
668b9652
TI
3054 name = "Headphone";
3055 idx = i;
dc04d1b4
TI
3056 break;
3057 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI
3058 name = "Speaker";
3059 idx = i;
dc04d1b4
TI
3060 break;
3061 default:
3062 name = chname[i];
668b9652 3063 idx = 0;
dc04d1b4 3064 break;
76624534 3065 }
668b9652 3066 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3067 if (err < 0)
c7d4b2fa
M
3068 return err;
3069 }
3070 }
dc04d1b4
TI
3071 return 0;
3072}
3073
6479c631
TI
3074static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3075 unsigned long sw, int idx)
3076{
3077 int err;
3078 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3079 "Capture Volume", vol);
6479c631
TI
3080 if (err < 0)
3081 return err;
3082 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3083 "Capture Switch", sw);
6479c631
TI
3084 if (err < 0)
3085 return err;
3086 return 0;
3087}
3088
dc04d1b4
TI
3089/* add playback controls from the parsed DAC table */
3090static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3091 const struct auto_pin_cfg *cfg)
3092{
3093 struct sigmatel_spec *spec = codec->spec;
7c922de7 3094 hda_nid_t nid;
dc04d1b4 3095 int err;
7c922de7 3096 int idx;
dc04d1b4
TI
3097
3098 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3099 spec->multiout.dac_nids,
3100 cfg->line_out_type);
3101 if (err < 0)
3102 return err;
c7d4b2fa 3103
a9cb5c90 3104 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3105 err = stac92xx_add_control(spec,
3106 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3107 "Headphone as Line Out Switch",
3108 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3109 if (err < 0)
3110 return err;
3111 }
3112
7c922de7
NL
3113 for (idx = AUTO_PIN_MIC; idx <= AUTO_PIN_FRONT_LINE; idx++) {
3114 nid = cfg->input_pins[idx];
3115 if (nid) {
3116 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3117 if (err < 0)
3118 return err;
3119 }
b5895dc8 3120 }
403d1944 3121
c7d4b2fa
M
3122 return 0;
3123}
3124
eb06ed8f
TI
3125/* add playback controls for Speaker and HP outputs */
3126static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3127 struct auto_pin_cfg *cfg)
3128{
3129 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI
3130 int err;
3131
3132 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3133 spec->hp_dacs, AUTO_PIN_HP_OUT);
3134 if (err < 0)
3135 return err;
3136
3137 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3138 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3139 if (err < 0)
3140 return err;
eb06ed8f 3141
c7d4b2fa
M
3142 return 0;
3143}
3144
b22b4821 3145/* labels for mono mux outputs */
d0513fc6
MR
3146static const char *stac92xx_mono_labels[4] = {
3147 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3148};
3149
3150/* create mono mux for mono out on capable codecs */
3151static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3152{
3153 struct sigmatel_spec *spec = codec->spec;
3154 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3155 int i, num_cons;
3156 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3157
3158 num_cons = snd_hda_get_connections(codec,
3159 spec->mono_nid,
3160 con_lst,
3161 HDA_MAX_NUM_INPUTS);
16a433d8 3162 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR
3163 return -EINVAL;
3164
3165 for (i = 0; i < num_cons; i++) {
3166 mono_mux->items[mono_mux->num_items].label =
3167 stac92xx_mono_labels[i];
3168 mono_mux->items[mono_mux->num_items].index = i;
3169 mono_mux->num_items++;
3170 }
09a99959
MR
3171
3172 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3173 "Mono Mux", spec->mono_nid);
b22b4821
MR
3174}
3175
1cd2224c
MR
3176/* create PC beep volume controls */
3177static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3178 hda_nid_t nid)
3179{
3180 struct sigmatel_spec *spec = codec->spec;
3181 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3182 int err;
3183
3184 /* check for mute support for the the amp */
3185 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3186 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3187 "PC Beep Playback Switch",
3188 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3189 if (err < 0)
3190 return err;
3191 }
3192
3193 /* check to see if there is volume support for the amp */
3194 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3195 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3196 "PC Beep Playback Volume",
3197 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3198 if (err < 0)
3199 return err;
3200 }
3201 return 0;
3202}
3203
4d4e9bb3
TI
3204#ifdef CONFIG_SND_HDA_INPUT_BEEP
3205#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3206
3207static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3208 struct snd_ctl_elem_value *ucontrol)
3209{
3210 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3211 ucontrol->value.integer.value[0] = codec->beep->enabled;
3212 return 0;
3213}
3214
3215static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3216 struct snd_ctl_elem_value *ucontrol)
3217{
3218 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3219 int enabled = !!ucontrol->value.integer.value[0];
3220 if (codec->beep->enabled != enabled) {
3221 codec->beep->enabled = enabled;
3222 return 1;
3223 }
3224 return 0;
3225}
3226
3227static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3228 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3229 .info = stac92xx_dig_beep_switch_info,
3230 .get = stac92xx_dig_beep_switch_get,
3231 .put = stac92xx_dig_beep_switch_put,
3232};
3233
3234static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3235{
3236 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3237 0, "PC Beep Playback Switch", 0);
3238}
3239#endif
3240
4682eee0
MR
3241static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3242{
3243 struct sigmatel_spec *spec = codec->spec;
667067d8 3244 int i, j, err = 0;
4682eee0
MR
3245
3246 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI
3247 hda_nid_t nid;
3248 unsigned int wcaps;
3249 unsigned long val;
3250
4682eee0
MR
3251 nid = spec->mux_nids[i];
3252 wcaps = get_wcaps(codec, nid);
667067d8
TI
3253 if (!(wcaps & AC_WCAP_OUT_AMP))
3254 continue;
4682eee0 3255
667067d8
TI
3256 /* check whether already the same control was created as
3257 * normal Capture Volume.
3258 */
3259 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3260 for (j = 0; j < spec->num_caps; j++) {
3261 if (spec->capvols[j] == val)
3262 break;
4682eee0 3263 }
667067d8
TI
3264 if (j < spec->num_caps)
3265 continue;
3266
3267 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3268 "Mux Capture Volume", val);
3269 if (err < 0)
3270 return err;
4682eee0
MR
3271 }
3272 return 0;
3273};
3274
d9737751 3275static const char *stac92xx_spdif_labels[3] = {
65973632 3276 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3277};
3278
3279static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3280{
3281 struct sigmatel_spec *spec = codec->spec;
3282 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3283 const char **labels = spec->spdif_labels;
d9737751 3284 int i, num_cons;
65973632 3285 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3286
3287 num_cons = snd_hda_get_connections(codec,
3288 spec->smux_nids[0],
3289 con_lst,
3290 HDA_MAX_NUM_INPUTS);
16a433d8 3291 if (num_cons <= 0)
d9737751
MR
3292 return -EINVAL;
3293
65973632
MR
3294 if (!labels)
3295 labels = stac92xx_spdif_labels;
3296
d9737751 3297 for (i = 0; i < num_cons; i++) {
65973632 3298 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR
3299 spdif_mux->items[spdif_mux->num_items].index = i;
3300 spdif_mux->num_items++;
3301 }
3302
3303 return 0;
3304}
3305
8b65727b 3306/* labels for dmic mux inputs */
ddc2cec4 3307static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP
3308 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3309 "Digital Mic 3", "Digital Mic 4"
3310};
3311
3d21d3f7
TI
3312static int get_connection_index(struct hda_codec *codec, hda_nid_t mux,
3313 hda_nid_t nid)
3314{
3315 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3316 int i, nums;
3317
3318 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3319 for (i = 0; i < nums; i++)
3320 if (conn[i] == nid)
3321 return i;
3322 return -1;
3323}
3324
667067d8 3325/* create a volume assigned to the given pin (only if supported) */
96f845de 3326/* return 1 if the volume control is created */
667067d8 3327static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
96f845de 3328 const char *label, int direction)
667067d8
TI
3329{
3330 unsigned int caps, nums;
3331 char name[32];
96f845de 3332 int err;
667067d8 3333
96f845de
TI
3334 if (direction == HDA_OUTPUT)
3335 caps = AC_WCAP_OUT_AMP;
3336 else
3337 caps = AC_WCAP_IN_AMP;
3338 if (!(get_wcaps(codec, nid) & caps))
667067d8 3339 return 0;
96f845de 3340 caps = query_amp_caps(codec, nid, direction);
667067d8
TI
3341 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3342 if (!nums)
3343 return 0;
3344 snprintf(name, sizeof(name), "%s Capture Volume", label);
96f845de
TI
3345 err = stac92xx_add_control(codec->spec, STAC_CTL_WIDGET_VOL, name,
3346 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
3347 if (err < 0)
3348 return err;
3349 return 1;
667067d8
TI
3350}
3351
8b65727b
MP
3352/* create playback/capture controls for input pins on dmic capable codecs */
3353static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3354 const struct auto_pin_cfg *cfg)
3355{
3356 struct sigmatel_spec *spec = codec->spec;
5207e10e 3357 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3358 struct hda_input_mux *dimux = &spec->private_dimux;
5207e10e
TI
3359 int err, i, active_mics;
3360 unsigned int def_conf;
8b65727b
MP
3361
3362 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3363 dimux->items[dimux->num_items].index = 0;
3364 dimux->num_items++;
3365
5207e10e
TI
3366 active_mics = 0;
3367 for (i = 0; i < spec->num_dmics; i++) {
667067d8
TI
3368 /* check the validity: sometimes it's a dead vendor-spec node */
3369 if (get_wcaps_type(get_wcaps(codec, spec->dmic_nids[i]))
3370 != AC_WID_PIN)
3371 continue;
5207e10e
TI
3372 def_conf = snd_hda_codec_get_pincfg(codec, spec->dmic_nids[i]);
3373 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
3374 active_mics++;
3375 }
3376
8b65727b 3377 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3378 hda_nid_t nid;
8b65727b 3379 int index;
5207e10e 3380 const char *label;
8b65727b 3381
667067d8
TI
3382 nid = spec->dmic_nids[i];
3383 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3384 continue;
3385 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP
3386 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3387 continue;
3388
3d21d3f7
TI
3389 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3390 if (index < 0)
3391 continue;
3392
5207e10e
TI
3393 if (active_mics == 1)
3394 label = "Digital Mic";
3395 else
3396 label = stac92xx_dmic_labels[dimux->num_items];
3397
96f845de 3398 err = create_elem_capture_vol(codec, nid, label, HDA_INPUT);
667067d8
TI
3399 if (err < 0)
3400 return err;
96f845de
TI
3401 if (!err) {
3402 err = create_elem_capture_vol(codec, nid, label,
3403 HDA_OUTPUT);
3404 if (err < 0)
3405 return err;
3406 }
0678accd 3407
5207e10e 3408 dimux->items[dimux->num_items].label = label;
8b65727b
MP
3409 dimux->items[dimux->num_items].index = index;
3410 dimux->num_items++;
5207e10e
TI
3411 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1) {
3412 imux->items[imux->num_items].label = label;
3413 imux->items[imux->num_items].index = index;
3414 imux->num_items++;
3415 }
8b65727b
MP
3416 }
3417
3418 return 0;
3419}
3420
3d21d3f7
TI
3421static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
3422 hda_nid_t *fixed, hda_nid_t *ext)
3423{
3424 unsigned int cfg;
3425
3426 if (!nid)
3427 return 0;
3428 cfg = snd_hda_codec_get_pincfg(codec, nid);
3429 switch (get_defcfg_connect(cfg)) {
3430 case AC_JACK_PORT_FIXED:
3431 if (*fixed)
3432 return 1; /* already occupied */
3433 *fixed = nid;
3434 break;
3435 case AC_JACK_PORT_COMPLEX:
3436 if (*ext)
3437 return 1; /* already occupied */
3438 *ext = nid;
3439 break;
3440 }
3441 return 0;
3442}
3443
3444static int set_mic_route(struct hda_codec *codec,
3445 struct sigmatel_mic_route *mic,
3446 hda_nid_t pin)
3447{
3448 struct sigmatel_spec *spec = codec->spec;
3449 struct auto_pin_cfg *cfg = &spec->autocfg;
3450 int i;
3451
3452 mic->pin = pin;
3453 for (i = AUTO_PIN_MIC; i <= AUTO_PIN_FRONT_MIC; i++)
3454 if (pin == cfg->input_pins[i])
3455 break;
3456 if (i <= AUTO_PIN_FRONT_MIC) {
3457 /* analog pin */
3458 mic->dmux_idx = 0;
3459 i = get_connection_index(codec, spec->mux_nids[0], pin);
3460 if (i < 0)
3461 return -1;
3462 mic->mux_idx = i;
da2a2aaa 3463 } else if (spec->dmux_nids) {
3d21d3f7
TI
3464 /* digital pin */
3465 mic->mux_idx = 0;
3466 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3467 if (i < 0)
3468 return -1;
3469 mic->dmux_idx = i;
3470 }
3471 return 0;
3472}
3473
3474/* return non-zero if the device is for automatic mic switch */
3475static int stac_check_auto_mic(struct hda_codec *codec)
3476{
3477 struct sigmatel_spec *spec = codec->spec;
3478 struct auto_pin_cfg *cfg = &spec->autocfg;
3479 hda_nid_t fixed, ext;
3480 int i;
3481
3482 for (i = AUTO_PIN_LINE; i < AUTO_PIN_LAST; i++) {
3483 if (cfg->input_pins[i])
3484 return 0; /* must be exclusively mics */
3485 }
3486 fixed = ext = 0;
3487 for (i = AUTO_PIN_MIC; i <= AUTO_PIN_FRONT_MIC; i++)
3488 if (check_mic_pin(codec, cfg->input_pins[i], &fixed, &ext))
3489 return 0;
3490 for (i = 0; i < spec->num_dmics; i++)
3491 if (check_mic_pin(codec, spec->dmic_nids[i], &fixed, &ext))
3492 return 0;
3493 if (!fixed || !ext)
3494 return 0;
3495 if (!(get_wcaps(codec, ext) & AC_WCAP_UNSOL_CAP))
3496 return 0; /* no unsol support */
3497 if (set_mic_route(codec, &spec->ext_mic, ext) ||
3498 set_mic_route(codec, &spec->int_mic, fixed))
3499 return 0; /* something is wrong */
3500 return 1;
3501}
3502
c7d4b2fa
M
3503/* create playback/capture controls for input pins */
3504static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3505{
3506 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3507 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3508 int i, j;
c7d4b2fa
M
3509
3510 for (i = 0; i < AUTO_PIN_LAST; i++) {
667067d8
TI
3511 hda_nid_t nid = cfg->input_pins[i];
3512 int index, err;
314634bc 3513
667067d8 3514 if (!nid)
314634bc
TI
3515 continue;
3516 index = -1;
3517 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI
3518 index = get_connection_index(codec, spec->mux_nids[j],
3519 nid);
3520 if (index >= 0)
3521 break;
c7d4b2fa 3522 }
667067d8
TI
3523 if (index < 0)
3524 continue;
3525
3526 err = create_elem_capture_vol(codec, nid,
96f845de
TI
3527 auto_pin_cfg_labels[i],
3528 HDA_INPUT);
667067d8
TI
3529 if (err < 0)
3530 return err;
3531
314634bc
TI
3532 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3533 imux->items[imux->num_items].index = index;
3534 imux->num_items++;
c7d4b2fa 3535 }
5207e10e 3536 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3537
7b043899 3538 if (imux->num_items) {
62fe78e9
SR
3539 /*
3540 * Set the current input for the muxes.
3541 * The STAC9221 has two input muxes with identical source
3542 * NID lists. Hopefully this won't get confused.
3543 */
3544 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3545 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3546 AC_VERB_SET_CONNECT_SEL,
3547 imux->items[0].index);
62fe78e9
SR
3548 }
3549 }
3550
c7d4b2fa
M
3551 return 0;
3552}
3553
c7d4b2fa
M
3554static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3555{
3556 struct sigmatel_spec *spec = codec->spec;
3557 int i;
3558
3559 for (i = 0; i < spec->autocfg.line_outs; i++) {
3560 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3561 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3562 }
3563}
3564
3565static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3566{
3567 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3568 int i;
c7d4b2fa 3569
eb06ed8f
TI
3570 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3571 hda_nid_t pin;
3572 pin = spec->autocfg.hp_pins[i];
3573 if (pin) /* connect to front */
3574 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3575 }
3576 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3577 hda_nid_t pin;
3578 pin = spec->autocfg.speaker_pins[i];
3579 if (pin) /* connect to front */
3580 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3581 }
c7d4b2fa
M
3582}
3583
3cc08dc6 3584static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M
3585{
3586 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3587 int hp_swap = 0;
6479c631 3588 int i, err;
c7d4b2fa 3589
8b65727b
MP
3590 if ((err = snd_hda_parse_pin_def_config(codec,
3591 &spec->autocfg,
3592 spec->dmic_nids)) < 0)
c7d4b2fa 3593 return err;
82bc955f 3594 if (! spec->autocfg.line_outs)
869264c4 3595 return 0; /* can't find valid pin config */
19039bd0 3596
bcecd9bd
JZ
3597 /* If we have no real line-out pin and multiple hp-outs, HPs should
3598 * be set up as multi-channel outputs.
3599 */
3600 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3601 spec->autocfg.hp_outs > 1) {
3602 /* Copy hp_outs to line_outs, backup line_outs in
3603 * speaker_outs so that the following routines can handle
3604 * HP pins as primary outputs.
3605 */
c21ca4a8 3606 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3607 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3608 sizeof(spec->autocfg.line_out_pins));
3609 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3610 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3611 sizeof(spec->autocfg.hp_pins));
3612 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3613 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3614 spec->autocfg.hp_outs = 0;
dc04d1b4 3615 hp_swap = 1;
bcecd9bd 3616 }
09a99959 3617 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3618 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3619 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3620 u32 caps = query_amp_caps(codec,
3621 spec->autocfg.mono_out_pin, dir);
3622 hda_nid_t conn_list[1];
3623
3624 /* get the mixer node and then the mono mux if it exists */
3625 if (snd_hda_get_connections(codec,
3626 spec->autocfg.mono_out_pin, conn_list, 1) &&
3627 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3628 conn_list, 1) > 0) {
09a99959
MR
3629
3630 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3631 int wid_type = get_wcaps_type(wcaps);
09a99959
MR
3632 /* LR swap check, some stac925x have a mux that
3633 * changes the DACs output path instead of the
3634 * mono-mux path.
3635 */
3636 if (wid_type == AC_WID_AUD_SEL &&
3637 !(wcaps & AC_WCAP_LR_SWAP))
3638 spec->mono_nid = conn_list[0];
3639 }
d0513fc6
MR
3640 if (dir) {
3641 hda_nid_t nid = spec->autocfg.mono_out_pin;
3642
3643 /* most mono outs have a least a mute/unmute switch */
3644 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3645 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3646 "Mono Playback Switch",
3647 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3648 if (err < 0)
3649 return err;
d0513fc6
MR
3650 /* check for volume support for the amp */
3651 if ((caps & AC_AMPCAP_NUM_STEPS)
3652 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3653 err = stac92xx_add_control(spec,
3654 STAC_CTL_WIDGET_VOL,
3655 "Mono Playback Volume",
3656 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3657 if (err < 0)
3658 return err;
3659 }
09a99959
MR
3660 }
3661
3662 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3663 AC_PINCTL_OUT_EN);
3664 }
bcecd9bd 3665
c21ca4a8
TI
3666 if (!spec->multiout.num_dacs) {
3667 err = stac92xx_auto_fill_dac_nids(codec);
3668 if (err < 0)
19039bd0 3669 return err;
c9280d68
TI
3670 err = stac92xx_auto_create_multi_out_ctls(codec,
3671 &spec->autocfg);
3672 if (err < 0)
3673 return err;
c21ca4a8 3674 }
c7d4b2fa 3675
1cd2224c
MR
3676 /* setup analog beep controls */
3677 if (spec->anabeep_nid > 0) {
3678 err = stac92xx_auto_create_beep_ctls(codec,
3679 spec->anabeep_nid);
3680 if (err < 0)
3681 return err;
3682 }
3683
3684 /* setup digital beep controls and input device */
3685#ifdef CONFIG_SND_HDA_INPUT_BEEP
3686 if (spec->digbeep_nid > 0) {
3687 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3688 unsigned int caps;
1cd2224c
MR
3689
3690 err = stac92xx_auto_create_beep_ctls(codec, nid);
3691 if (err < 0)
3692 return err;
3693 err = snd_hda_attach_beep_device(codec, nid);
3694 if (err < 0)
3695 return err;
fa797966
TI
3696 /* IDT/STAC codecs have linear beep tone parameter */
3697 codec->beep->linear_tone = 1;
4d4e9bb3
TI
3698 /* if no beep switch is available, make its own one */
3699 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3700 if (codec->beep &&
3701 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3702 err = stac92xx_beep_switch_ctl(codec);
3703 if (err < 0)
3704 return err;
3705 }
1cd2224c
MR
3706 }
3707#endif
3708
0fb87bb4 3709 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML
3710 if (err < 0)
3711 return err;
3712
dc04d1b4
TI
3713 /* All output parsing done, now restore the swapped hp pins */
3714 if (hp_swap) {
3715 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3716 sizeof(spec->autocfg.hp_pins));
3717 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3718 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3719 spec->autocfg.line_outs = 0;
3720 }
0fb87bb4 3721
3d21d3f7
TI
3722 if (stac_check_auto_mic(codec)) {
3723 spec->auto_mic = 1;
3724 /* only one capture for auto-mic */
3725 spec->num_adcs = 1;
3726 spec->num_caps = 1;
3727 spec->num_muxes = 1;
3728 }
3729
6479c631
TI
3730 for (i = 0; i < spec->num_caps; i++) {
3731 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3732 spec->capsws[i], i);
3733 if (err < 0)
3734 return err;
3735 }
3736
dc04d1b4 3737 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3738 if (err < 0)
c7d4b2fa
M
3739 return err;
3740
b22b4821
MR
3741 if (spec->mono_nid > 0) {
3742 err = stac92xx_auto_create_mono_output_ctls(codec);
3743 if (err < 0)
3744 return err;
3745 }
2a9c7816 3746 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
3747 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3748 &spec->autocfg)) < 0)
3749 return err;
4682eee0
MR
3750 if (spec->num_muxes > 0) {
3751 err = stac92xx_auto_create_mux_input_ctls(codec);
3752 if (err < 0)
3753 return err;
3754 }
d9737751
MR
3755 if (spec->num_smuxes > 0) {
3756 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3757 if (err < 0)
3758 return err;
3759 }
8b65727b 3760
e3c75964
TI
3761 err = stac92xx_add_input_source(spec);
3762 if (err < 0)
3763 return err;
3764
c7d4b2fa 3765 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3766 if (spec->multiout.max_channels > 2)
c7d4b2fa 3767 spec->surr_switch = 1;
c7d4b2fa 3768
0852d7a6 3769 if (spec->autocfg.dig_outs)
3cc08dc6 3770 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3771 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3772 spec->dig_in_nid = dig_in;
c7d4b2fa 3773
603c4019
TI
3774 if (spec->kctls.list)
3775 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3776
3777 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
3778 if (!spec->dinput_mux)
3779 spec->dinput_mux = &spec->private_dimux;
d9737751 3780 spec->sinput_mux = &spec->private_smux;
b22b4821 3781 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M
3782 return 1;
3783}
3784
82bc955f
TI
3785/* add playback controls for HP output */
3786static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3787 struct auto_pin_cfg *cfg)
3788{
3789 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3790 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
3791 unsigned int wid_caps;
3792
3793 if (! pin)
3794 return 0;
3795
3796 wid_caps = get_wcaps(codec, pin);
505cb341 3797 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3798 spec->hp_detect = 1;
82bc955f
TI
3799
3800 return 0;
3801}
3802
160ea0dc
RF
3803/* add playback controls for LFE output */
3804static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3805 struct auto_pin_cfg *cfg)
3806{
3807 struct sigmatel_spec *spec = codec->spec;
3808 int err;
3809 hda_nid_t lfe_pin = 0x0;
3810 int i;
3811
3812 /*
3813 * search speaker outs and line outs for a mono speaker pin
3814 * with an amp. If one is found, add LFE controls
3815 * for it.
3816 */
3817 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3818 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3819 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3820 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3821 if (wcaps == AC_WCAP_OUT_AMP)
3822 /* found a mono speaker with an amp, must be lfe */
3823 lfe_pin = pin;
3824 }
3825
3826 /* if speaker_outs is 0, then speakers may be in line_outs */
3827 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3828 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3829 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3830 unsigned int defcfg;
330ee995 3831 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 3832 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3833 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
3834 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3835 if (wcaps == AC_WCAP_OUT_AMP)
3836 /* found a mono speaker with an amp,
3837 must be lfe */
3838 lfe_pin = pin;
3839 }
3840 }
3841 }
3842
3843 if (lfe_pin) {
7c7767eb 3844 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
3845 if (err < 0)
3846 return err;
3847 }
3848
3849 return 0;
3850}
3851
c7d4b2fa
M
3852static int stac9200_parse_auto_config(struct hda_codec *codec)
3853{
3854 struct sigmatel_spec *spec = codec->spec;
3855 int err;
3856
df694daa 3857 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
3858 return err;
3859
3860 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3861 return err;
3862
82bc955f
TI
3863 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3864 return err;
3865
160ea0dc
RF
3866 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3867 return err;
3868
355a0ec4
TI
3869 if (spec->num_muxes > 0) {
3870 err = stac92xx_auto_create_mux_input_ctls(codec);
3871 if (err < 0)
3872 return err;
3873 }
3874
e3c75964
TI
3875 err = stac92xx_add_input_source(spec);
3876 if (err < 0)
3877 return err;
3878
0852d7a6 3879 if (spec->autocfg.dig_outs)
c7d4b2fa 3880 spec->multiout.dig_out_nid = 0x05;
82bc955f 3881 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3882 spec->dig_in_nid = 0x04;
c7d4b2fa 3883
603c4019
TI
3884 if (spec->kctls.list)
3885 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
3886
3887 spec->input_mux = &spec->private_imux;
8b65727b 3888 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
3889
3890 return 1;
3891}
3892
62fe78e9
SR
3893/*
3894 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3895 * funky external mute control using GPIO pins.
3896 */
3897
76e1ddfb 3898static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3899 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
3900{
3901 unsigned int gpiostate, gpiomask, gpiodir;
3902
3903 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3904 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3905 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
3906
3907 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3908 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3909 gpiomask |= mask;
62fe78e9
SR
3910
3911 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3912 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3913 gpiodir |= dir_mask;
62fe78e9 3914
76e1ddfb 3915 /* Configure GPIOx as CMOS */
62fe78e9
SR
3916 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3917
3918 snd_hda_codec_write(codec, codec->afg, 0,
3919 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
3920 snd_hda_codec_read(codec, codec->afg, 0,
3921 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
3922
3923 msleep(1);
3924
76e1ddfb
TI
3925 snd_hda_codec_read(codec, codec->afg, 0,
3926 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
3927}
3928
8c8145b8 3929#ifdef CONFIG_SND_HDA_INPUT_JACK
95c09099
TI
3930static void stac92xx_free_jack_priv(struct snd_jack *jack)
3931{
3932 struct sigmatel_jack *jacks = jack->private_data;
3933 jacks->nid = 0;
3934 jacks->jack = NULL;
3935}
3936#endif
3937
74aeaabc
MR
3938static int stac92xx_add_jack(struct hda_codec *codec,
3939 hda_nid_t nid, int type)
3940{
8c8145b8 3941#ifdef CONFIG_SND_HDA_INPUT_JACK
74aeaabc
MR
3942 struct sigmatel_spec *spec = codec->spec;
3943 struct sigmatel_jack *jack;
330ee995 3944 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR
3945 int connectivity = get_defcfg_connect(def_conf);
3946 char name[32];
95c09099 3947 int err;
74aeaabc
MR
3948
3949 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3950 return 0;
3951
3952 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3953 jack = snd_array_new(&spec->jacks);
3954 if (!jack)
3955 return -ENOMEM;
3956 jack->nid = nid;
3957 jack->type = type;
3958
86de7416 3959 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR
3960 snd_hda_get_jack_type(def_conf),
3961 snd_hda_get_jack_connectivity(def_conf),
3962 snd_hda_get_jack_location(def_conf));
3963
95c09099
TI
3964 err = snd_jack_new(codec->bus->card, name, type, &jack->jack);
3965 if (err < 0) {
3966 jack->nid = 0;
3967 return err;
3968 }
3969 jack->jack->private_data = jack;
3970 jack->jack->private_free = stac92xx_free_jack_priv;
e4973e1e 3971#endif
95c09099 3972 return 0;
74aeaabc
MR
3973}
3974
c6e4c666
TI
3975static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3976 unsigned char type, int data)
74aeaabc
MR
3977{
3978 struct sigmatel_event *event;
3979
3980 snd_array_init(&spec->events, sizeof(*event), 32);
3981 event = snd_array_new(&spec->events);
3982 if (!event)
3983 return -ENOMEM;
3984 event->nid = nid;
c6e4c666
TI
3985 event->type = type;
3986 event->tag = spec->events.used;
74aeaabc
MR
3987 event->data = data;
3988
c6e4c666 3989 return event->tag;
74aeaabc
MR
3990}
3991
c6e4c666 3992static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 3993 hda_nid_t nid)
74aeaabc
MR
3994{
3995 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
3996 struct sigmatel_event *event = spec->events.list;
3997 int i;
3998
3999 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4000 if (event->nid == nid)
c6e4c666 4001 return event;
74aeaabc 4002 }
c6e4c666 4003 return NULL;
74aeaabc
MR
4004}
4005
c6e4c666
TI
4006static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4007 unsigned char tag)
314634bc 4008{
c6e4c666
TI
4009 struct sigmatel_spec *spec = codec->spec;
4010 struct sigmatel_event *event = spec->events.list;
4011 int i;
4012
4013 for (i = 0; i < spec->events.used; i++, event++) {
4014 if (event->tag == tag)
4015 return event;
74aeaabc 4016 }
c6e4c666
TI
4017 return NULL;
4018}
4019
62558ce1
TI
4020/* check if given nid is a valid pin and no other events are assigned
4021 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4022 * Otherwise, returns zero.
4023 */
4024static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4025 unsigned int type)
c6e4c666
TI
4026{
4027 struct sigmatel_event *event;
4028 int tag;
4029
4030 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
62558ce1
TI
4031 return 0;
4032 event = stac_get_event(codec, nid);
4033 if (event) {
4034 if (event->type != type)
4035 return 0;
c6e4c666 4036 tag = event->tag;
62558ce1 4037 } else {
c6e4c666 4038 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI
4039 if (tag < 0)
4040 return 0;
4041 }
c6e4c666
TI
4042 snd_hda_codec_write_cache(codec, nid, 0,
4043 AC_VERB_SET_UNSOLICITED_ENABLE,
4044 AC_USRSP_EN | tag);
62558ce1 4045 return 1;
314634bc
TI
4046}
4047
a64135a2
MR
4048static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4049{
4050 int i;
4051 for (i = 0; i < cfg->hp_outs; i++)
4052 if (cfg->hp_pins[i] == nid)
4053 return 1; /* nid is a HP-Out */
4054
4055 return 0; /* nid is not a HP-Out */
4056};
4057
b76c850f
MR
4058static void stac92xx_power_down(struct hda_codec *codec)
4059{
4060 struct sigmatel_spec *spec = codec->spec;
4061
4062 /* power down inactive DACs */
4063 hda_nid_t *dac;
4064 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4065 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4066 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
4067 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4068}
4069
f73d3585
TI
4070static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4071 int enable);
4072
6565e4fa
TI
4073/* override some hints from the hwdep entry */
4074static void stac_store_hints(struct hda_codec *codec)
4075{
4076 struct sigmatel_spec *spec = codec->spec;
4077 const char *p;
4078 int val;
4079
4080 val = snd_hda_get_bool_hint(codec, "hp_detect");
4081 if (val >= 0)
4082 spec->hp_detect = val;
4083 p = snd_hda_get_hint(codec, "gpio_mask");
4084 if (p) {
4085 spec->gpio_mask = simple_strtoul(p, NULL, 0);
4086 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4087 spec->gpio_mask;
4088 }
4089 p = snd_hda_get_hint(codec, "gpio_dir");
4090 if (p)
4091 spec->gpio_dir = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
4092 p = snd_hda_get_hint(codec, "gpio_data");
4093 if (p)
4094 spec->gpio_data = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
4095 p = snd_hda_get_hint(codec, "eapd_mask");
4096 if (p)
4097 spec->eapd_mask = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
4098 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4099 if (val >= 0)
4100 spec->eapd_switch = val;
4101}
4102
c7d4b2fa
M
4103static int stac92xx_init(struct hda_codec *codec)
4104{
4105 struct sigmatel_spec *spec = codec->spec;
82bc955f 4106 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4107 unsigned int gpio;
e4973e1e 4108 int i;
c7d4b2fa 4109
c7d4b2fa
M
4110 snd_hda_sequence_write(codec, spec->init);
4111
8daaaa97
MR
4112 /* power down adcs initially */
4113 if (spec->powerdown_adcs)
4114 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4115 snd_hda_codec_write(codec,
8daaaa97
MR
4116 spec->adc_nids[i], 0,
4117 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4118
6565e4fa
TI
4119 /* override some hints */
4120 stac_store_hints(codec);
4121
f73d3585
TI
4122 /* set up GPIO */
4123 gpio = spec->gpio_data;
4124 /* turn on EAPD statically when spec->eapd_switch isn't set.
4125 * otherwise, unsol event will turn it on/off dynamically
4126 */
4127 if (!spec->eapd_switch)
4128 gpio |= spec->eapd_mask;
4129 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4130
82bc955f
TI
4131 /* set up pins */
4132 if (spec->hp_detect) {
505cb341 4133 /* Enable unsolicited responses on the HP widget */
74aeaabc 4134 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4135 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4136 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4137 }
1c4bdf9b
TI
4138 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4139 cfg->speaker_outs > 0) {
fefd67f3 4140 /* enable pin-detect for line-outs as well */
15cfa2b3
TI
4141 for (i = 0; i < cfg->line_outs; i++) {
4142 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI
4143 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4144 }
4145 }
4146
0a07acaf
TI
4147 /* force to enable the first line-out; the others are set up
4148 * in unsol_event
4149 */
4150 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4151 AC_PINCTL_OUT_EN);
82bc955f 4152 /* fake event to set up pins */
62558ce1 4153 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
82bc955f
TI
4154 } else {
4155 stac92xx_auto_init_multi_out(codec);
4156 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4157 for (i = 0; i < cfg->hp_outs; i++)
4158 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4159 }
3d21d3f7 4160 if (spec->auto_mic) {
15b4f296 4161 /* initialize connection to analog input */
da2a2aaa
TI
4162 if (spec->dmux_nids)
4163 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4164 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI
4165 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4166 stac_issue_unsol_event(codec, spec->ext_mic.pin);
4167 }
82bc955f 4168 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI
4169 hda_nid_t nid = cfg->input_pins[i];
4170 if (nid) {
12dde4c6 4171 unsigned int pinctl, conf;
4f1e6bc3
TI
4172 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4173 /* for mic pins, force to initialize */
7c922de7 4174 pinctl = stac92xx_get_default_vref(codec, nid);
12dde4c6
TI
4175 pinctl |= AC_PINCTL_IN_EN;
4176 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI
4177 } else {
4178 pinctl = snd_hda_codec_read(codec, nid, 0,
4179 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4180 /* if PINCTL already set then skip */
5dd17cb9
TI
4181 /* Also, if both INPUT and OUTPUT are set,
4182 * it must be a BIOS bug; need to override, too
4183 */
4184 if (!(pinctl & AC_PINCTL_IN_EN) ||
4185 (pinctl & AC_PINCTL_OUT_EN)) {
4186 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI
4187 pinctl |= AC_PINCTL_IN_EN;
4188 stac92xx_auto_set_pinctl(codec, nid,
4189 pinctl);
4190 }
4191 }
330ee995 4192 conf = snd_hda_codec_get_pincfg(codec, nid);
12dde4c6 4193 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
62558ce1
TI
4194 if (enable_pin_detect(codec, nid,
4195 STAC_INSERT_EVENT))
4196 stac_issue_unsol_event(codec, nid);
4f1e6bc3 4197 }
c960a03b 4198 }
82bc955f 4199 }
a64135a2
MR
4200 for (i = 0; i < spec->num_dmics; i++)
4201 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4202 AC_PINCTL_IN_EN);
0852d7a6
TI
4203 if (cfg->dig_out_pins[0])
4204 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI
4205 AC_PINCTL_OUT_EN);
4206 if (cfg->dig_in_pin)
4207 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4208 AC_PINCTL_IN_EN);
a64135a2 4209 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI
4210 hda_nid_t nid = spec->pwr_nids[i];
4211 int pinctl, def_conf;
f73d3585 4212
eb632128
TI
4213 /* power on when no jack detection is available */
4214 if (!spec->hp_detect) {
4215 stac_toggle_power_map(codec, nid, 1);
4216 continue;
4217 }
4218
4219 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI
4220 continue; /* already has an unsol event */
4221
4222 pinctl = snd_hda_codec_read(codec, nid, 0,
4223 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4224 /* outputs are only ports capable of power management
4225 * any attempts on powering down a input port cause the
4226 * referenced VREF to act quirky.
4227 */
eb632128
TI
4228 if (pinctl & AC_PINCTL_IN_EN) {
4229 stac_toggle_power_map(codec, nid, 1);
a64135a2 4230 continue;
eb632128 4231 }
330ee995 4232 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4233 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR
4234 /* skip any ports that don't have jacks since presence
4235 * detection is useless */
f73d3585
TI
4236 if (def_conf != AC_JACK_PORT_COMPLEX) {
4237 if (def_conf != AC_JACK_PORT_NONE)
4238 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4239 continue;
f73d3585 4240 }
62558ce1
TI
4241 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4242 stac_issue_unsol_event(codec, nid);
a64135a2 4243 }
b76c850f
MR
4244 if (spec->dac_list)
4245 stac92xx_power_down(codec);
c7d4b2fa
M
4246 return 0;
4247}
4248
74aeaabc
MR
4249static void stac92xx_free_jacks(struct hda_codec *codec)
4250{
8c8145b8 4251#ifdef CONFIG_SND_HDA_INPUT_JACK
b94d3539 4252 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4253 struct sigmatel_spec *spec = codec->spec;
b94d3539 4254 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR
4255 struct sigmatel_jack *jacks = spec->jacks.list;
4256 int i;
95c09099
TI
4257 for (i = 0; i < spec->jacks.used; i++, jacks++) {
4258 if (jacks->jack)
4259 snd_device_free(codec->bus->card, jacks->jack);
4260 }
74aeaabc
MR
4261 }
4262 snd_array_free(&spec->jacks);
e4973e1e 4263#endif
74aeaabc
MR
4264}
4265
603c4019
TI
4266static void stac92xx_free_kctls(struct hda_codec *codec)
4267{
4268 struct sigmatel_spec *spec = codec->spec;
4269
4270 if (spec->kctls.list) {
4271 struct snd_kcontrol_new *kctl = spec->kctls.list;
4272 int i;
4273 for (i = 0; i < spec->kctls.used; i++)
4274 kfree(kctl[i].name);
4275 }
4276 snd_array_free(&spec->kctls);
4277}
4278
2f2f4251
M
4279static void stac92xx_free(struct hda_codec *codec)
4280{
c7d4b2fa 4281 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4282
4283 if (! spec)
4284 return;
4285
74aeaabc
MR
4286 stac92xx_free_jacks(codec);
4287 snd_array_free(&spec->events);
11b44bbd 4288
c7d4b2fa 4289 kfree(spec);
1cd2224c 4290 snd_hda_detach_beep_device(codec);
2f2f4251
M
4291}
4292
4e55096e
M
4293static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4294 unsigned int flag)
4295{
8ce84198
TI
4296 unsigned int old_ctl, pin_ctl;
4297
4298 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4299 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4300
f9acba43
TI
4301 if (pin_ctl & AC_PINCTL_IN_EN) {
4302 /*
4303 * we need to check the current set-up direction of
4304 * shared input pins since they can be switched via
4305 * "xxx as Output" mixer switch
4306 */
4307 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4308 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4309 return;
4310 }
4311
8ce84198 4312 old_ctl = pin_ctl;
7b043899
SL
4313 /* if setting pin direction bits, clear the current
4314 direction bits first */
4315 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4316 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4317
8ce84198
TI
4318 pin_ctl |= flag;
4319 if (old_ctl != pin_ctl)
4320 snd_hda_codec_write_cache(codec, nid, 0,
4321 AC_VERB_SET_PIN_WIDGET_CONTROL,
4322 pin_ctl);
4e55096e
M
4323}
4324
4325static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4326 unsigned int flag)
4327{
4328 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4329 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI
4330 if (pin_ctl & flag)
4331 snd_hda_codec_write_cache(codec, nid, 0,
4332 AC_VERB_SET_PIN_WIDGET_CONTROL,
4333 pin_ctl & ~flag);
4e55096e
M
4334}
4335
e6e3ea25 4336static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4337{
4338 if (!nid)
4339 return 0;
4340 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI
4341 & (1 << 31))
4342 return 1;
314634bc
TI
4343 return 0;
4344}
4345
fefd67f3
TI
4346static void stac92xx_line_out_detect(struct hda_codec *codec,
4347 int presence)
4348{
4349 struct sigmatel_spec *spec = codec->spec;
4350 struct auto_pin_cfg *cfg = &spec->autocfg;
4351 int i;
4352
4353 for (i = 0; i < cfg->line_outs; i++) {
4354 if (presence)
4355 break;
4356 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4357 if (presence) {
4358 unsigned int pinctl;
4359 pinctl = snd_hda_codec_read(codec,
4360 cfg->line_out_pins[i], 0,
4361 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4362 if (pinctl & AC_PINCTL_IN_EN)
4363 presence = 0; /* mic- or line-input */
4364 }
4365 }
4366
4367 if (presence) {
4368 /* disable speakers */
4369 for (i = 0; i < cfg->speaker_outs; i++)
4370 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4371 AC_PINCTL_OUT_EN);
4372 if (spec->eapd_mask && spec->eapd_switch)
4373 stac_gpio_set(codec, spec->gpio_mask,
4374 spec->gpio_dir, spec->gpio_data &
4375 ~spec->eapd_mask);
4376 } else {
4377 /* enable speakers */
4378 for (i = 0; i < cfg->speaker_outs; i++)
4379 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4380 AC_PINCTL_OUT_EN);
4381 if (spec->eapd_mask && spec->eapd_switch)
4382 stac_gpio_set(codec, spec->gpio_mask,
4383 spec->gpio_dir, spec->gpio_data |
4384 spec->eapd_mask);
4385 }
4386}
4387
d7a89436
TI
4388/* return non-zero if the hp-pin of the given array index isn't
4389 * a jack-detection target
4390 */
4391static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4392{
4393 struct auto_pin_cfg *cfg = &spec->autocfg;
4394
4395 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4396 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4397 return 1;
c21ca4a8 4398 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4399 return 1;
4400 /* ignore if the pin is set as line-out */
4401 if (cfg->hp_pins[i] == spec->hp_switch)
4402 return 1;
4403 return 0;
4404}
4405
c6e4c666 4406static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4407{
4408 struct sigmatel_spec *spec = codec->spec;
4409 struct auto_pin_cfg *cfg = &spec->autocfg;
4410 int i, presence;
4411
eb06ed8f 4412 presence = 0;
4fe5195c
MR
4413 if (spec->gpio_mute)
4414 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4415 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4416
eb06ed8f 4417 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4418 if (presence)
4419 break;
d7a89436
TI
4420 if (no_hp_sensing(spec, i))
4421 continue;
e6e3ea25
TI
4422 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4423 if (presence) {
4424 unsigned int pinctl;
4425 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4426 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4427 if (pinctl & AC_PINCTL_IN_EN)
4428 presence = 0; /* mic- or line-input */
4429 }
eb06ed8f 4430 }
4e55096e
M
4431
4432 if (presence) {
d7a89436 4433 /* disable lineouts */
7c2ba97b 4434 if (spec->hp_switch)
d7a89436
TI
4435 stac92xx_reset_pinctl(codec, spec->hp_switch,
4436 AC_PINCTL_OUT_EN);
4e55096e
M
4437 for (i = 0; i < cfg->line_outs; i++)
4438 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4439 AC_PINCTL_OUT_EN);
4e55096e 4440 } else {
d7a89436 4441 /* enable lineouts */
7c2ba97b 4442 if (spec->hp_switch)
d7a89436
TI
4443 stac92xx_set_pinctl(codec, spec->hp_switch,
4444 AC_PINCTL_OUT_EN);
4e55096e
M
4445 for (i = 0; i < cfg->line_outs; i++)
4446 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4447 AC_PINCTL_OUT_EN);
4e55096e 4448 }
fefd67f3 4449 stac92xx_line_out_detect(codec, presence);
d7a89436
TI
4450 /* toggle hp outs */
4451 for (i = 0; i < cfg->hp_outs; i++) {
4452 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4453 if (no_hp_sensing(spec, i))
4454 continue;
4455 if (presence)
4456 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4457#if 0 /* FIXME */
4458/* Resetting the pinctl like below may lead to (a sort of) regressions
4459 * on some devices since they use the HP pin actually for line/speaker
4460 * outs although the default pin config shows a different pin (that is
4461 * wrong and useless).
4462 *
4463 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4464 * But, disabling the code below just works around it, and I'm too tired of
4465 * bug reports with such devices...
4466 */
d7a89436
TI
4467 else
4468 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4469#endif /* FIXME */
d7a89436 4470 }
4e55096e
M
4471}
4472
f73d3585
TI
4473static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4474 int enable)
a64135a2
MR
4475{
4476 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4477 unsigned int idx, val;
4478
4479 for (idx = 0; idx < spec->num_pwrs; idx++) {
4480 if (spec->pwr_nids[idx] == nid)
4481 break;
4482 }
4483 if (idx >= spec->num_pwrs)
4484 return;
d0513fc6
MR
4485
4486 /* several codecs have two power down bits */
4487 if (spec->pwr_mapping)
4488 idx = spec->pwr_mapping[idx];
4489 else
4490 idx = 1 << idx;
a64135a2 4491
f73d3585
TI
4492 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4493 if (enable)
a64135a2
MR
4494 val &= ~idx;
4495 else
4496 val |= idx;
4497
4498 /* power down unused output ports */
4499 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR
4500}
4501
f73d3585
TI
4502static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4503{
e6e3ea25 4504 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4505}
a64135a2 4506
74aeaabc
MR
4507static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4508{
4509 struct sigmatel_spec *spec = codec->spec;
4510 struct sigmatel_jack *jacks = spec->jacks.list;
4511
4512 if (jacks) {
4513 int i;
4514 for (i = 0; i < spec->jacks.used; i++) {
4515 if (jacks->nid == nid) {
4516 unsigned int pin_ctl =
4517 snd_hda_codec_read(codec, nid,
4518 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4519 0x00);
4520 int type = jacks->type;
4521 if (type == (SND_JACK_LINEOUT
4522 | SND_JACK_HEADPHONE))
4523 type = (pin_ctl & AC_PINCTL_HP_EN)
4524 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4525 snd_jack_report(jacks->jack,
e6e3ea25 4526 get_pin_presence(codec, nid)
74aeaabc
MR
4527 ? type : 0);
4528 }
4529 jacks++;
4530 }
4531 }
4532}
a64135a2 4533
3d21d3f7
TI
4534static void stac92xx_mic_detect(struct hda_codec *codec)
4535{
4536 struct sigmatel_spec *spec = codec->spec;
4537 struct sigmatel_mic_route *mic;
4538
4539 if (get_pin_presence(codec, spec->ext_mic.pin))
4540 mic = &spec->ext_mic;
4541 else
4542 mic = &spec->int_mic;
4543 if (mic->dmux_idx)
4544 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4545 AC_VERB_SET_CONNECT_SEL,
4546 mic->dmux_idx);
4547 else
4548 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4549 AC_VERB_SET_CONNECT_SEL,
4550 mic->mux_idx);
4551}
4552
62558ce1 4553static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4554{
62558ce1 4555 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI
4556 if (!event)
4557 return;
4558 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4559}
4560
314634bc
TI
4561static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4562{
a64135a2 4563 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI
4564 struct sigmatel_event *event;
4565 int tag, data;
a64135a2 4566
c6e4c666
TI
4567 tag = (res >> 26) & 0x7f;
4568 event = stac_get_event_from_tag(codec, tag);
4569 if (!event)
4570 return;
4571
4572 switch (event->type) {
314634bc 4573 case STAC_HP_EVENT:
fefd67f3 4574 case STAC_LO_EVENT:
16ffe32c 4575 stac92xx_hp_detect(codec);
fefd67f3 4576 break;
3d21d3f7
TI
4577 case STAC_MIC_EVENT:
4578 stac92xx_mic_detect(codec);
4579 break;
4580 }
4581
4582 switch (event->type) {
4583 case STAC_HP_EVENT:
fefd67f3 4584 case STAC_LO_EVENT:
3d21d3f7 4585 case STAC_MIC_EVENT:
74aeaabc 4586 case STAC_INSERT_EVENT:
a64135a2 4587 case STAC_PWR_EVENT:
c6e4c666
TI
4588 if (spec->num_pwrs > 0)
4589 stac92xx_pin_sense(codec, event->nid);
4590 stac92xx_report_jack(codec, event->nid);
fd60cc89
MR
4591
4592 switch (codec->subsystem_id) {
4593 case 0x103c308f:
4594 if (event->nid == 0xb) {
4595 int pin = AC_PINCTL_IN_EN;
4596
4597 if (get_pin_presence(codec, 0xa)
4598 && get_pin_presence(codec, 0xb))
4599 pin |= AC_PINCTL_VREF_80;
4600 if (!get_pin_presence(codec, 0xb))
4601 pin |= AC_PINCTL_VREF_80;
4602
4603 /* toggle VREF state based on mic + hp pin
4604 * status
4605 */
4606 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4607 }
4608 }
72474be6 4609 break;
c6e4c666
TI
4610 case STAC_VREF_EVENT:
4611 data = snd_hda_codec_read(codec, codec->afg, 0,
4612 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4613 /* toggle VREF state based on GPIOx status */
4614 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4615 !!(data & (1 << event->data)));
72474be6 4616 break;
314634bc
TI
4617 }
4618}
4619
2d34e1b3
TI
4620#ifdef CONFIG_PROC_FS
4621static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4622 struct hda_codec *codec, hda_nid_t nid)
4623{
4624 if (nid == codec->afg)
4625 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4626 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4627}
4628
4629static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4630 struct hda_codec *codec,
4631 unsigned int verb)
4632{
4633 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4634 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4635}
4636
4637/* stac92hd71bxx, stac92hd73xx */
4638static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4639 struct hda_codec *codec, hda_nid_t nid)
4640{
4641 stac92hd_proc_hook(buffer, codec, nid);
4642 if (nid == codec->afg)
4643 analog_loop_proc_hook(buffer, codec, 0xfa0);
4644}
4645
4646static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4647 struct hda_codec *codec, hda_nid_t nid)
4648{
4649 if (nid == codec->afg)
4650 analog_loop_proc_hook(buffer, codec, 0xfe0);
4651}
4652
4653static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4654 struct hda_codec *codec, hda_nid_t nid)
4655{
4656 if (nid == codec->afg)
4657 analog_loop_proc_hook(buffer, codec, 0xfeb);
4658}
4659#else
4660#define stac92hd_proc_hook NULL
4661#define stac92hd7x_proc_hook NULL
4662#define stac9205_proc_hook NULL
4663#define stac927x_proc_hook NULL
4664#endif
4665
cb53c626 4666#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M
4667static int stac92xx_resume(struct hda_codec *codec)
4668{
dc81bed1
TI
4669 struct sigmatel_spec *spec = codec->spec;
4670
2c885878 4671 stac92xx_init(codec);
82beb8fd
TI
4672 snd_hda_codec_resume_amp(codec);
4673 snd_hda_codec_resume_cache(codec);
2c885878 4674 /* fake event to set up pins again to override cached values */
dc81bed1 4675 if (spec->hp_detect)
62558ce1 4676 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
ff6fdc37
M
4677 return 0;
4678}
c6798d2b 4679
ae6241fb 4680/*
514bf54c 4681 * using power check for controlling mute led of HP notebooks
ae6241fb
CP
4682 * check for mute state only on Speakers (nid = 0x10)
4683 *
4684 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
4685 * the LED is NOT working properly !
514bf54c
JG
4686 *
4687 * Changed name to reflect that it now works for any designated
4688 * model, not just HP HDX.
ae6241fb
CP
4689 */
4690
4691#ifdef CONFIG_SND_HDA_POWER_SAVE
514bf54c 4692static int stac92xx_hp_check_power_status(struct hda_codec *codec,
6fce61ae 4693 hda_nid_t nid)
ae6241fb
CP
4694{
4695 struct sigmatel_spec *spec = codec->spec;
6fce61ae
TI
4696
4697 if (nid == 0x10) {
4698 if (snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
ae6241fb 4699 HDA_AMP_MUTE)
86d190e7 4700 spec->gpio_data &= ~spec->gpio_led; /* orange */
ba84bfcd
TI
4701 else
4702 spec->gpio_data |= spec->gpio_led; /* white */
6fce61ae
TI
4703
4704 stac_gpio_set(codec, spec->gpio_mask,
4705 spec->gpio_dir,
ae6241fb
CP
4706 spec->gpio_data);
4707 }
4708
4709 return 0;
4710}
4711#endif
4712
c6798d2b
MR
4713static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4714{
4715 struct sigmatel_spec *spec = codec->spec;
05ff7e11
TI
4716 int i;
4717 hda_nid_t nid;
4718
4719 /* reset each pin before powering down DAC/ADC to avoid click noise */
4720 nid = codec->start_nid;
4721 for (i = 0; i < codec->num_nodes; i++, nid++) {
4722 unsigned int wcaps = get_wcaps(codec, nid);
a22d543a 4723 unsigned int wid_type = get_wcaps_type(wcaps);
05ff7e11
TI
4724 if (wid_type == AC_WID_PIN)
4725 snd_hda_codec_read(codec, nid, 0,
4726 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
4727 }
4728
c6798d2b
MR
4729 if (spec->eapd_mask)
4730 stac_gpio_set(codec, spec->gpio_mask,
4731 spec->gpio_dir, spec->gpio_data &
4732 ~spec->eapd_mask);
4733 return 0;
4734}
ff6fdc37
M
4735#endif
4736
2f2f4251
M
4737static struct hda_codec_ops stac92xx_patch_ops = {
4738 .build_controls = stac92xx_build_controls,
4739 .build_pcms = stac92xx_build_pcms,
4740 .init = stac92xx_init,
4741 .free = stac92xx_free,
4e55096e 4742 .unsol_event = stac92xx_unsol_event,
cb53c626 4743#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4744 .suspend = stac92xx_suspend,
ff6fdc37
M
4745 .resume = stac92xx_resume,
4746#endif
2f2f4251
M
4747};
4748
4749static int patch_stac9200(struct hda_codec *codec)
4750{
4751 struct sigmatel_spec *spec;
c7d4b2fa 4752 int err;
2f2f4251 4753
e560d8d8 4754 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
4755 if (spec == NULL)
4756 return -ENOMEM;
4757
4758 codec->spec = spec;
a4eed138 4759 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4760 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI
4761 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4762 stac9200_models,
4763 stac9200_cfg_tbl);
330ee995 4764 if (spec->board_config < 0)
9a11f1aa
TI
4765 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4766 codec->chip_name);
330ee995
TI
4767 else
4768 stac92xx_set_config_regs(codec,
af9f341a 4769 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M
4770
4771 spec->multiout.max_channels = 2;
4772 spec->multiout.num_dacs = 1;
4773 spec->multiout.dac_nids = stac9200_dac_nids;
4774 spec->adc_nids = stac9200_adc_nids;
4775 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4776 spec->num_muxes = 1;
8b65727b 4777 spec->num_dmics = 0;
9e05b7a3 4778 spec->num_adcs = 1;
a64135a2 4779 spec->num_pwrs = 0;
c7d4b2fa 4780
58eec423
MCC
4781 if (spec->board_config == STAC_9200_M4 ||
4782 spec->board_config == STAC_9200_M4_2 ||
bf277785 4783 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
4784 spec->init = stac9200_eapd_init;
4785 else
4786 spec->init = stac9200_core_init;
2f2f4251 4787 spec->mixer = stac9200_mixer;
c7d4b2fa 4788
117f257d
TI
4789 if (spec->board_config == STAC_9200_PANASONIC) {
4790 spec->gpio_mask = spec->gpio_dir = 0x09;
4791 spec->gpio_data = 0x00;
4792 }
4793
c7d4b2fa
M
4794 err = stac9200_parse_auto_config(codec);
4795 if (err < 0) {
4796 stac92xx_free(codec);
4797 return err;
4798 }
2f2f4251 4799
2acc9dcb
TI
4800 /* CF-74 has no headphone detection, and the driver should *NOT*
4801 * do detection and HP/speaker toggle because the hardware does it.
4802 */
4803 if (spec->board_config == STAC_9200_PANASONIC)
4804 spec->hp_detect = 0;
4805
2f2f4251
M
4806 codec->patch_ops = stac92xx_patch_ops;
4807
4808 return 0;
4809}
4810
8e21c34c
TD
4811static int patch_stac925x(struct hda_codec *codec)
4812{
4813 struct sigmatel_spec *spec;
4814 int err;
4815
4816 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4817 if (spec == NULL)
4818 return -ENOMEM;
4819
4820 codec->spec = spec;
a4eed138 4821 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4822 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC
4823
4824 /* Check first for codec ID */
4825 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4826 STAC_925x_MODELS,
4827 stac925x_models,
4828 stac925x_codec_id_cfg_tbl);
4829
4830 /* Now checks for PCI ID, if codec ID is not found */
4831 if (spec->board_config < 0)
4832 spec->board_config = snd_hda_check_board_config(codec,
4833 STAC_925x_MODELS,
8e21c34c
TD
4834 stac925x_models,
4835 stac925x_cfg_tbl);
9e507abd 4836 again:
330ee995 4837 if (spec->board_config < 0)
9a11f1aa
TI
4838 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4839 codec->chip_name);
330ee995
TI
4840 else
4841 stac92xx_set_config_regs(codec,
af9f341a 4842 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD
4843
4844 spec->multiout.max_channels = 2;
4845 spec->multiout.num_dacs = 1;
4846 spec->multiout.dac_nids = stac925x_dac_nids;
4847 spec->adc_nids = stac925x_adc_nids;
4848 spec->mux_nids = stac925x_mux_nids;
4849 spec->num_muxes = 1;
9e05b7a3 4850 spec->num_adcs = 1;
a64135a2 4851 spec->num_pwrs = 0;
2c11f955
TD
4852 switch (codec->vendor_id) {
4853 case 0x83847632: /* STAC9202 */
4854 case 0x83847633: /* STAC9202D */
4855 case 0x83847636: /* STAC9251 */
4856 case 0x83847637: /* STAC9251D */
f6e9852a 4857 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4858 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
4859 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4860 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
4861 break;
4862 default:
4863 spec->num_dmics = 0;
4864 break;
4865 }
8e21c34c
TD
4866
4867 spec->init = stac925x_core_init;
4868 spec->mixer = stac925x_mixer;
6479c631
TI
4869 spec->num_caps = 1;
4870 spec->capvols = stac925x_capvols;
4871 spec->capsws = stac925x_capsws;
8e21c34c
TD
4872
4873 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI
4874 if (!err) {
4875 if (spec->board_config < 0) {
4876 printk(KERN_WARNING "hda_codec: No auto-config is "
4877 "available, default to model=ref\n");
4878 spec->board_config = STAC_925x_REF;
4879 goto again;
4880 }
4881 err = -EINVAL;
4882 }
8e21c34c
TD
4883 if (err < 0) {
4884 stac92xx_free(codec);
4885 return err;
4886 }
4887
4888 codec->patch_ops = stac92xx_patch_ops;
4889
4890 return 0;
4891}
4892
e1f0d669
MR
4893static int patch_stac92hd73xx(struct hda_codec *codec)
4894{
4895 struct sigmatel_spec *spec;
4896 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4897 int err = 0;
c21ca4a8 4898 int num_dacs;
e1f0d669
MR
4899
4900 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4901 if (spec == NULL)
4902 return -ENOMEM;
4903
4904 codec->spec = spec;
e99d32b3 4905 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
4906 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4907 spec->pin_nids = stac92hd73xx_pin_nids;
4908 spec->board_config = snd_hda_check_board_config(codec,
4909 STAC_92HD73XX_MODELS,
4910 stac92hd73xx_models,
4911 stac92hd73xx_cfg_tbl);
4912again:
330ee995 4913 if (spec->board_config < 0)
9a11f1aa
TI
4914 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
4915 codec->chip_name);
330ee995
TI
4916 else
4917 stac92xx_set_config_regs(codec,
af9f341a 4918 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 4919
c21ca4a8 4920 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
4921 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4922
c21ca4a8 4923 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
4924 printk(KERN_WARNING "hda_codec: Could not determine "
4925 "number of channels defaulting to DAC count\n");
c21ca4a8 4926 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4927 }
e2aec171 4928 spec->init = stac92hd73xx_core_init;
c21ca4a8 4929 switch (num_dacs) {
e1f0d669 4930 case 0x3: /* 6 Channel */
d78d7a90 4931 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR
4932 break;
4933 case 0x4: /* 8 Channel */
d78d7a90 4934 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR
4935 break;
4936 case 0x5: /* 10 Channel */
d78d7a90
TI
4937 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
4938 break;
c21ca4a8
TI
4939 }
4940 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4941
e1f0d669
MR
4942 spec->aloopback_mask = 0x01;
4943 spec->aloopback_shift = 8;
4944
1cd2224c 4945 spec->digbeep_nid = 0x1c;
e1f0d669
MR
4946 spec->mux_nids = stac92hd73xx_mux_nids;
4947 spec->adc_nids = stac92hd73xx_adc_nids;
4948 spec->dmic_nids = stac92hd73xx_dmic_nids;
4949 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4950 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR
4951
4952 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4953 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4954 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 4955
6479c631
TI
4956 spec->num_caps = STAC92HD73XX_NUM_CAPS;
4957 spec->capvols = stac92hd73xx_capvols;
4958 spec->capsws = stac92hd73xx_capsws;
4959
a7662640 4960 switch (spec->board_config) {
6b3ab21e 4961 case STAC_DELL_EQ:
d654a660 4962 spec->init = dell_eq_core_init;
6b3ab21e 4963 /* fallthru */
661cd8fb
TI
4964 case STAC_DELL_M6_AMIC:
4965 case STAC_DELL_M6_DMIC:
4966 case STAC_DELL_M6_BOTH:
2a9c7816 4967 spec->num_smuxes = 0;
c0cea0d0 4968 spec->eapd_switch = 0;
6b3ab21e 4969
661cd8fb
TI
4970 switch (spec->board_config) {
4971 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 4972 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR
4973 spec->num_dmics = 0;
4974 break;
661cd8fb 4975 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 4976 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
4977 spec->num_dmics = 1;
4978 break;
661cd8fb 4979 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI
4980 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
4981 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
4982 spec->num_dmics = 1;
4983 break;
4984 }
4985 break;
4986 default:
4987 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4988 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4989 spec->eapd_switch = 1;
5207e10e 4990 break;
a7662640 4991 }
b2c4f4d7
MR
4992 if (spec->board_config > STAC_92HD73XX_REF) {
4993 /* GPIO0 High = Enable EAPD */
4994 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4995 spec->gpio_data = 0x01;
4996 }
a7662640 4997
a64135a2
MR
4998 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4999 spec->pwr_nids = stac92hd73xx_pwr_nids;
5000
d9737751 5001 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR
5002
5003 if (!err) {
5004 if (spec->board_config < 0) {
5005 printk(KERN_WARNING "hda_codec: No auto-config is "
5006 "available, default to model=ref\n");
5007 spec->board_config = STAC_92HD73XX_REF;
5008 goto again;
5009 }
5010 err = -EINVAL;
5011 }
5012
5013 if (err < 0) {
5014 stac92xx_free(codec);
5015 return err;
5016 }
5017
9e43f0de
TI
5018 if (spec->board_config == STAC_92HD73XX_NO_JD)
5019 spec->hp_detect = 0;
5020
e1f0d669
MR
5021 codec->patch_ops = stac92xx_patch_ops;
5022
2d34e1b3
TI
5023 codec->proc_widget_hook = stac92hd7x_proc_hook;
5024
e1f0d669
MR
5025 return 0;
5026}
5027
d0513fc6
MR
5028static int patch_stac92hd83xxx(struct hda_codec *codec)
5029{
5030 struct sigmatel_spec *spec;
65557f35 5031 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5032 int err;
65557f35 5033 int num_dacs;
8bb0ac55 5034 hda_nid_t nid;
d0513fc6
MR
5035
5036 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5037 if (spec == NULL)
5038 return -ENOMEM;
5039
5040 codec->spec = spec;
0ffa9807 5041 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR
5042 spec->mono_nid = 0x19;
5043 spec->digbeep_nid = 0x21;
667067d8
TI
5044 spec->mux_nids = stac92hd83xxx_mux_nids;
5045 spec->num_muxes = ARRAY_SIZE(stac92hd83xxx_mux_nids);
d0513fc6 5046 spec->adc_nids = stac92hd83xxx_adc_nids;
7570ef18 5047 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
d0513fc6
MR
5048 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5049 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5050 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5051 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6
MR
5052
5053 spec->init = stac92hd83xxx_core_init;
d0513fc6 5054 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
d0513fc6 5055 spec->pin_nids = stac92hd83xxx_pin_nids;
6479c631
TI
5056 spec->num_caps = STAC92HD83XXX_NUM_CAPS;
5057 spec->capvols = stac92hd83xxx_capvols;
5058 spec->capsws = stac92hd83xxx_capsws;
5059
d0513fc6
MR
5060 spec->board_config = snd_hda_check_board_config(codec,
5061 STAC_92HD83XXX_MODELS,
5062 stac92hd83xxx_models,
5063 stac92hd83xxx_cfg_tbl);
5064again:
330ee995 5065 if (spec->board_config < 0)
9a11f1aa
TI
5066 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5067 codec->chip_name);
330ee995
TI
5068 else
5069 stac92xx_set_config_regs(codec,
af9f341a 5070 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5071
32ed3f46
MR
5072 switch (codec->vendor_id) {
5073 case 0x111d7604:
5074 case 0x111d7605:
ff2e7337 5075 case 0x111d76d5:
32ed3f46
MR
5076 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5077 break;
5078 spec->num_pwrs = 0;
5079 break;
5080 }
5081
d0513fc6
MR
5082 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5083 if (!err) {
5084 if (spec->board_config < 0) {
5085 printk(KERN_WARNING "hda_codec: No auto-config is "
5086 "available, default to model=ref\n");
5087 spec->board_config = STAC_92HD83XXX_REF;
5088 goto again;
5089 }
5090 err = -EINVAL;
5091 }
5092
5093 if (err < 0) {
5094 stac92xx_free(codec);
5095 return err;
5096 }
5097
8bb0ac55
MR
5098 switch (spec->board_config) {
5099 case STAC_DELL_S14:
5100 nid = 0xf;
5101 break;
5102 default:
5103 nid = 0xe;
5104 break;
5105 }
5106
5107 num_dacs = snd_hda_get_connections(codec, nid,
5108 conn, STAC92HD83_DAC_COUNT + 1) - 1;
16a433d8
JK
5109 if (num_dacs < 0)
5110 num_dacs = STAC92HD83_DAC_COUNT;
8bb0ac55
MR
5111
5112 /* set port X to select the last DAC
5113 */
5114 snd_hda_codec_write_cache(codec, nid, 0,
5115 AC_VERB_SET_CONNECT_SEL, num_dacs);
5116
d0513fc6
MR
5117 codec->patch_ops = stac92xx_patch_ops;
5118
2d34e1b3
TI
5119 codec->proc_widget_hook = stac92hd_proc_hook;
5120
d0513fc6
MR
5121 return 0;
5122}
5123
330ee995
TI
5124/* get the pin connection (fixed, none, etc) */
5125static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
5126{
5127 struct sigmatel_spec *spec = codec->spec;
5128 unsigned int cfg;
5129
5130 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
5131 return get_defcfg_connect(cfg);
5132}
5133
6df703ae
HRK
5134static int stac92hd71bxx_connected_ports(struct hda_codec *codec,
5135 hda_nid_t *nids, int num_nids)
5136{
5137 struct sigmatel_spec *spec = codec->spec;
5138 int idx, num;
5139 unsigned int def_conf;
5140
5141 for (num = 0; num < num_nids; num++) {
5142 for (idx = 0; idx < spec->num_pins; idx++)
5143 if (spec->pin_nids[idx] == nids[num])
5144 break;
5145 if (idx >= spec->num_pins)
5146 break;
330ee995 5147 def_conf = stac_get_defcfg_connect(codec, idx);
6df703ae
HRK
5148 if (def_conf == AC_JACK_PORT_NONE)
5149 break;
5150 }
5151 return num;
5152}
5153
5154static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5155 hda_nid_t dig0pin)
5156{
5157 struct sigmatel_spec *spec = codec->spec;
5158 int idx;
5159
5160 for (idx = 0; idx < spec->num_pins; idx++)
5161 if (spec->pin_nids[idx] == dig0pin)
5162 break;
5163 if ((idx + 2) >= spec->num_pins)
5164 return 0;
5165
5166 /* dig1pin case */
330ee995 5167 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK
5168 return 2;
5169
5170 /* dig0pin + dig2pin case */
330ee995 5171 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5172 return 2;
330ee995 5173 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK
5174 return 1;
5175 else
5176 return 0;
5177}
5178
e035b841
MR
5179static int patch_stac92hd71bxx(struct hda_codec *codec)
5180{
5181 struct sigmatel_spec *spec;
ca8d33fc 5182 struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
e035b841
MR
5183 int err = 0;
5184
5185 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5186 if (spec == NULL)
5187 return -ENOMEM;
5188
5189 codec->spec = spec;
8daaaa97 5190 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK
5191 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5192 switch (codec->vendor_id) {
5193 case 0x111d76b6:
5194 case 0x111d76b7:
5195 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5196 break;
5197 case 0x111d7603:
5198 case 0x111d7608:
5199 /* On 92HD75Bx 0x27 isn't a pin nid */
5200 spec->num_pins--;
5201 /* fallthrough */
5202 default:
5203 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5204 }
aafc4412 5205 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR
5206 spec->board_config = snd_hda_check_board_config(codec,
5207 STAC_92HD71BXX_MODELS,
5208 stac92hd71bxx_models,
5209 stac92hd71bxx_cfg_tbl);
5210again:
330ee995 5211 if (spec->board_config < 0)
9a11f1aa
TI
5212 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5213 codec->chip_name);
330ee995
TI
5214 else
5215 stac92xx_set_config_regs(codec,
af9f341a 5216 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5217
41c3b648
TI
5218 if (spec->board_config > STAC_92HD71BXX_REF) {
5219 /* GPIO0 = EAPD */
5220 spec->gpio_mask = 0x01;
5221 spec->gpio_dir = 0x01;
5222 spec->gpio_data = 0x01;
5223 }
5224
6df703ae
HRK
5225 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5226 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5227
6479c631
TI
5228 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5229 spec->capvols = stac92hd71bxx_capvols;
5230 spec->capsws = stac92hd71bxx_capsws;
5231
541eee87
MR
5232 switch (codec->vendor_id) {
5233 case 0x111d76b6: /* 4 Port without Analog Mixer */
5234 case 0x111d76b7:
23c7b521
HRK
5235 unmute_init++;
5236 /* fallthru */
541eee87
MR
5237 case 0x111d76b4: /* 6 Port without Analog Mixer */
5238 case 0x111d76b5:
541eee87 5239 spec->init = stac92hd71bxx_core_init;
0ffa9807 5240 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5241 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5242 stac92hd71bxx_dmic_nids,
5243 STAC92HD71BXX_NUM_DMICS);
541eee87 5244 break;
aafc4412 5245 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
5246 switch (spec->board_config) {
5247 case STAC_HP_M4:
72474be6 5248 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI
5249 err = stac_add_event(spec, codec->afg,
5250 STAC_VREF_EVENT, 0x02);
5251 if (err < 0)
5252 return err;
c5d08bb5 5253 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR
5254 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5255 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5256 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5257 AC_USRSP_EN | err);
72474be6
MR
5258 spec->gpio_mask |= 0x02;
5259 break;
5260 }
8daaaa97 5261 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5262 (codec->revision_id & 0xf) == 1)
8daaaa97 5263 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5264
aafc4412
MR
5265 /* no output amps */
5266 spec->num_pwrs = 0;
aafc4412 5267 /* disable VSW */
26a27980 5268 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5269 unmute_init++;
330ee995
TI
5270 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5271 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
6df703ae
HRK
5272 stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
5273 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5274 stac92hd71bxx_dmic_nids,
5275 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR
5276 break;
5277 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5278 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5279 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5280
aafc4412
MR
5281 /* no output amps */
5282 spec->num_pwrs = 0;
5283 /* fallthru */
541eee87 5284 default:
26a27980 5285 spec->init = stac92hd71bxx_core_init;
0ffa9807 5286 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
6df703ae
HRK
5287 spec->num_dmics = stac92hd71bxx_connected_ports(codec,
5288 stac92hd71bxx_dmic_nids,
5289 STAC92HD71BXX_NUM_DMICS);
5207e10e 5290 break;
541eee87
MR
5291 }
5292
ca8d33fc
MR
5293 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5294 snd_hda_sequence_write_cache(codec, unmute_init);
5295
b20f3b83
TI
5296 /* Some HP machines seem to have unstable codec communications
5297 * especially with ATI fglrx driver. For recovering from the
5298 * CORB/RIRB stall, allow the BUS reset and keep always sync
5299 */
5300 if (spec->board_config == STAC_HP_DV5) {
5301 codec->bus->sync_write = 1;
5302 codec->bus->allow_bus_reset = 1;
5303 }
5304
d78d7a90 5305 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5306 spec->aloopback_mask = 0x50;
541eee87
MR
5307 spec->aloopback_shift = 0;
5308
8daaaa97 5309 spec->powerdown_adcs = 1;
1cd2224c 5310 spec->digbeep_nid = 0x26;
e035b841
MR
5311 spec->mux_nids = stac92hd71bxx_mux_nids;
5312 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5313 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5314 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5315
5316 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5317 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5318 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5319 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5320
6a14f585
MR
5321 switch (spec->board_config) {
5322 case STAC_HP_M4:
6a14f585 5323 /* enable internal microphone */
330ee995 5324 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR
5325 stac92xx_auto_set_pinctl(codec, 0x0e,
5326 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5327 /* fallthru */
5328 case STAC_DELL_M4_2:
5329 spec->num_dmics = 0;
5330 spec->num_smuxes = 0;
5331 spec->num_dmuxes = 0;
5332 break;
5333 case STAC_DELL_M4_1:
5334 case STAC_DELL_M4_3:
5335 spec->num_dmics = 1;
5336 spec->num_smuxes = 0;
ea18aa46 5337 spec->num_dmuxes = 1;
6a14f585 5338 break;
514bf54c
JG
5339 case STAC_HP_DV4_1222NR:
5340 spec->num_dmics = 1;
5341 /* I don't know if it needs 1 or 2 smuxes - will wait for
5342 * bug reports to fix if needed
5343 */
5344 spec->num_smuxes = 1;
5345 spec->num_dmuxes = 1;
86d190e7 5346 spec->gpio_led = 0x01;
514bf54c 5347 /* fallthrough */
e2ea57a8 5348 case STAC_HP_DV5:
330ee995 5349 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8
HRK
5350 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
5351 break;
ae6241fb
CP
5352 case STAC_HP_HDX:
5353 spec->num_dmics = 1;
5354 spec->num_dmuxes = 1;
5355 spec->num_smuxes = 1;
443e26d0 5356 /* orange/white mute led on GPIO3, orange=0, white=1 */
86d190e7
TI
5357 spec->gpio_led = 0x08;
5358 break;
5359 }
443e26d0 5360
86d190e7
TI
5361#ifdef CONFIG_SND_HDA_POWER_SAVE
5362 if (spec->gpio_led) {
5363 spec->gpio_mask |= spec->gpio_led;
5364 spec->gpio_dir |= spec->gpio_led;
5365 spec->gpio_data |= spec->gpio_led;
443e26d0 5366 /* register check_power_status callback. */
6fce61ae 5367 codec->patch_ops.check_power_status =
86d190e7
TI
5368 stac92xx_hp_check_power_status;
5369 }
443e26d0 5370#endif
6a14f585 5371
c21ca4a8 5372 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5373
29d4ab4d 5374 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR
5375 if (!err) {
5376 if (spec->board_config < 0) {
5377 printk(KERN_WARNING "hda_codec: No auto-config is "
5378 "available, default to model=ref\n");
5379 spec->board_config = STAC_92HD71BXX_REF;
5380 goto again;
5381 }
5382 err = -EINVAL;
5383 }
5384
5385 if (err < 0) {
5386 stac92xx_free(codec);
5387 return err;
5388 }
5389
2d34e1b3
TI
5390 codec->proc_widget_hook = stac92hd7x_proc_hook;
5391
e035b841 5392 return 0;
86d190e7 5393}
e035b841 5394
2f2f4251
M
5395static int patch_stac922x(struct hda_codec *codec)
5396{
5397 struct sigmatel_spec *spec;
c7d4b2fa 5398 int err;
2f2f4251 5399
e560d8d8 5400 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M
5401 if (spec == NULL)
5402 return -ENOMEM;
5403
5404 codec->spec = spec;
a4eed138 5405 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5406 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI
5407 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5408 stac922x_models,
5409 stac922x_cfg_tbl);
536319af 5410 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
5411 spec->gpio_mask = spec->gpio_dir = 0x03;
5412 spec->gpio_data = 0x03;
3fc24d85
TI
5413 /* Intel Macs have all same PCI SSID, so we need to check
5414 * codec SSID to distinguish the exact models
5415 */
6f0778d8 5416 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5417 switch (codec->subsystem_id) {
5d5d3bc3
IZ
5418
5419 case 0x106b0800:
5420 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5421 break;
5d5d3bc3
IZ
5422 case 0x106b0600:
5423 case 0x106b0700:
5424 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5425 break;
5d5d3bc3
IZ
5426 case 0x106b0e00:
5427 case 0x106b0f00:
5428 case 0x106b1600:
5429 case 0x106b1700:
5430 case 0x106b0200:
5431 case 0x106b1e00:
5432 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5433 break;
5d5d3bc3
IZ
5434 case 0x106b1a00:
5435 case 0x00000100:
5436 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5437 break;
5d5d3bc3
IZ
5438 case 0x106b0a00:
5439 case 0x106b2200:
5440 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5441 break;
536319af
NB
5442 default:
5443 spec->board_config = STAC_INTEL_MAC_V3;
5444 break;
3fc24d85
TI
5445 }
5446 }
5447
9e507abd 5448 again:
330ee995 5449 if (spec->board_config < 0)
9a11f1aa
TI
5450 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5451 codec->chip_name);
330ee995
TI
5452 else
5453 stac92xx_set_config_regs(codec,
af9f341a 5454 stac922x_brd_tbl[spec->board_config]);
2f2f4251 5455
c7d4b2fa
M
5456 spec->adc_nids = stac922x_adc_nids;
5457 spec->mux_nids = stac922x_mux_nids;
2549413e 5458 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5459 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5460 spec->num_dmics = 0;
a64135a2 5461 spec->num_pwrs = 0;
c7d4b2fa
M
5462
5463 spec->init = stac922x_core_init;
6479c631
TI
5464
5465 spec->num_caps = STAC922X_NUM_CAPS;
5466 spec->capvols = stac922x_capvols;
5467 spec->capsws = stac922x_capsws;
c7d4b2fa
M
5468
5469 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5470
3cc08dc6 5471 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI
5472 if (!err) {
5473 if (spec->board_config < 0) {
5474 printk(KERN_WARNING "hda_codec: No auto-config is "
5475 "available, default to model=ref\n");
5476 spec->board_config = STAC_D945_REF;
5477 goto again;
5478 }
5479 err = -EINVAL;
5480 }
3cc08dc6
MP
5481 if (err < 0) {
5482 stac92xx_free(codec);
5483 return err;
5484 }
5485
5486 codec->patch_ops = stac92xx_patch_ops;
5487
807a4636
TI
5488 /* Fix Mux capture level; max to 2 */
5489 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5490 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5491 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5492 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5493 (0 << AC_AMPCAP_MUTE_SHIFT));
5494
3cc08dc6
MP
5495 return 0;
5496}
5497
5498static int patch_stac927x(struct hda_codec *codec)
5499{
5500 struct sigmatel_spec *spec;
5501 int err;
5502
5503 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5504 if (spec == NULL)
5505 return -ENOMEM;
5506
5507 codec->spec = spec;
45c1d85b 5508 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 5509 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5510 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI
5511 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5512 stac927x_models,
5513 stac927x_cfg_tbl);
9e507abd 5514 again:
330ee995 5515 if (spec->board_config < 0)
9a11f1aa
TI
5516 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5517 codec->chip_name);
330ee995
TI
5518 else
5519 stac92xx_set_config_regs(codec,
af9f341a 5520 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 5521
1cd2224c 5522 spec->digbeep_nid = 0x23;
8e9068b1
MR
5523 spec->adc_nids = stac927x_adc_nids;
5524 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5525 spec->mux_nids = stac927x_mux_nids;
5526 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
5527 spec->smux_nids = stac927x_smux_nids;
5528 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5529 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5530 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
5531 spec->multiout.dac_nids = spec->dac_nids;
5532
81d3dbde 5533 switch (spec->board_config) {
93ed1503 5534 case STAC_D965_3ST:
93ed1503 5535 case STAC_D965_5ST:
8e9068b1 5536 /* GPIO0 High = Enable EAPD */
0fc9dec4 5537 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5538 spec->gpio_data = 0x01;
8e9068b1
MR
5539 spec->num_dmics = 0;
5540
93ed1503 5541 spec->init = d965_core_init;
81d3dbde 5542 break;
8e9068b1 5543 case STAC_DELL_BIOS:
780c8be4
MR
5544 switch (codec->subsystem_id) {
5545 case 0x10280209:
5546 case 0x1028022e:
5547 /* correct the device field to SPDIF out */
330ee995 5548 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 5549 break;
86d190e7 5550 }
03d7ca17 5551 /* configure the analog microphone on some laptops */
330ee995 5552 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 5553 /* correct the front output jack as a hp out */
330ee995 5554 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 5555 /* correct the front input jack as a mic */
330ee995 5556 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 5557 /* fallthru */
8e9068b1
MR
5558 case STAC_DELL_3ST:
5559 /* GPIO2 High = Enable EAPD */
0fc9dec4 5560 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5561 spec->gpio_data = 0x04;
84d3dc20
CW
5562 switch (codec->subsystem_id) {
5563 case 0x1028022f:
5564 /* correct EAPD to be GPIO0 */
5565 spec->eapd_mask = spec->gpio_mask = 0x01;
5566 spec->gpio_dir = spec->gpio_data = 0x01;
5567 break;
5568 };
7f16859a
MR
5569 spec->dmic_nids = stac927x_dmic_nids;
5570 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5571
8e9068b1 5572 spec->init = d965_core_init;
8e9068b1 5573 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5574 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR
5575 break;
5576 default:
b2c4f4d7
MR
5577 if (spec->board_config > STAC_D965_REF) {
5578 /* GPIO0 High = Enable EAPD */
5579 spec->eapd_mask = spec->gpio_mask = 0x01;
5580 spec->gpio_dir = spec->gpio_data = 0x01;
5581 }
8e9068b1
MR
5582 spec->num_dmics = 0;
5583
5584 spec->init = stac927x_core_init;
7f16859a
MR
5585 }
5586
6479c631
TI
5587 spec->num_caps = STAC927X_NUM_CAPS;
5588 spec->capvols = stac927x_capvols;
5589 spec->capsws = stac927x_capsws;
5590
a64135a2 5591 spec->num_pwrs = 0;
d78d7a90 5592 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR
5593 spec->aloopback_mask = 0x40;
5594 spec->aloopback_shift = 0;
c0cea0d0 5595 spec->eapd_switch = 1;
8e9068b1 5596
3cc08dc6 5597 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI
5598 if (!err) {
5599 if (spec->board_config < 0) {
5600 printk(KERN_WARNING "hda_codec: No auto-config is "
5601 "available, default to model=ref\n");
5602 spec->board_config = STAC_D965_REF;
5603 goto again;
5604 }
5605 err = -EINVAL;
5606 }
c7d4b2fa
M
5607 if (err < 0) {
5608 stac92xx_free(codec);
5609 return err;
5610 }
2f2f4251
M
5611
5612 codec->patch_ops = stac92xx_patch_ops;
5613
2d34e1b3
TI
5614 codec->proc_widget_hook = stac927x_proc_hook;
5615
52987656
TI
5616 /*
5617 * !!FIXME!!
5618 * The STAC927x seem to require fairly long delays for certain
5619 * command sequences. With too short delays (even if the answer
5620 * is set to RIRB properly), it results in the silence output
5621 * on some hardwares like Dell.
5622 *
5623 * The below flag enables the longer delay (see get_response
5624 * in hda_intel.c).
5625 */
5626 codec->bus->needs_damn_long_delay = 1;
5627
e28d8322
TI
5628 /* no jack detecion for ref-no-jd model */
5629 if (spec->board_config == STAC_D965_REF_NO_JD)
5630 spec->hp_detect = 0;
5631
2f2f4251
M
5632 return 0;
5633}
5634
f3302a59
MP
5635static int patch_stac9205(struct hda_codec *codec)
5636{
5637 struct sigmatel_spec *spec;
8259980e 5638 int err;
f3302a59
MP
5639
5640 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5641 if (spec == NULL)
5642 return -ENOMEM;
5643
5644 codec->spec = spec;
a4eed138 5645 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5646 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI
5647 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5648 stac9205_models,
5649 stac9205_cfg_tbl);
9e507abd 5650 again:
330ee995 5651 if (spec->board_config < 0)
9a11f1aa
TI
5652 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5653 codec->chip_name);
330ee995
TI
5654 else
5655 stac92xx_set_config_regs(codec,
af9f341a 5656 stac9205_brd_tbl[spec->board_config]);
f3302a59 5657
1cd2224c 5658 spec->digbeep_nid = 0x23;
f3302a59 5659 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5660 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5661 spec->mux_nids = stac9205_mux_nids;
2549413e 5662 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
5663 spec->smux_nids = stac9205_smux_nids;
5664 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5665 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5666 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5667 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5668 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5669 spec->num_pwrs = 0;
f3302a59
MP
5670
5671 spec->init = stac9205_core_init;
d78d7a90 5672 spec->aloopback_ctl = stac9205_loopback;
f3302a59 5673
6479c631
TI
5674 spec->num_caps = STAC9205_NUM_CAPS;
5675 spec->capvols = stac9205_capvols;
5676 spec->capsws = stac9205_capsws;
5677
e1f0d669
MR
5678 spec->aloopback_mask = 0x40;
5679 spec->aloopback_shift = 0;
d9a4268e
TI
5680 /* Turn on/off EAPD per HP plugging */
5681 if (spec->board_config != STAC_9205_EAPD)
5682 spec->eapd_switch = 1;
f3302a59 5683 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5684
ae0a8ed8 5685 switch (spec->board_config){
ae0a8ed8 5686 case STAC_9205_DELL_M43:
87d48363 5687 /* Enable SPDIF in/out */
330ee995
TI
5688 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
5689 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 5690
4fe5195c 5691 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI
5692 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5693 if (err < 0)
5694 return err;
c5d08bb5 5695 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR
5696 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5697 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI
5698 AC_VERB_SET_UNSOLICITED_ENABLE,
5699 AC_USRSP_EN | err);
4fe5195c
MR
5700
5701 spec->gpio_dir = 0x0b;
0fc9dec4 5702 spec->eapd_mask = 0x01;
4fe5195c
MR
5703 spec->gpio_mask = 0x1b;
5704 spec->gpio_mute = 0x10;
e2e7d624 5705 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5706 * GPIO3 Low = DRM
87d48363 5707 */
4fe5195c 5708 spec->gpio_data = 0x01;
ae0a8ed8 5709 break;
b2c4f4d7
MR
5710 case STAC_9205_REF:
5711 /* SPDIF-In enabled */
5712 break;
ae0a8ed8
TD
5713 default:
5714 /* GPIO0 High = EAPD */
0fc9dec4 5715 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5716 spec->gpio_data = 0x01;
ae0a8ed8
TD
5717 break;
5718 }
33382403 5719
f3302a59 5720 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI
5721 if (!err) {
5722 if (spec->board_config < 0) {
5723 printk(KERN_WARNING "hda_codec: No auto-config is "
5724 "available, default to model=ref\n");
5725 spec->board_config = STAC_9205_REF;
5726 goto again;
5727 }
5728 err = -EINVAL;
5729 }
f3302a59
MP
5730 if (err < 0) {
5731 stac92xx_free(codec);
5732 return err;
5733 }
5734
5735 codec->patch_ops = stac92xx_patch_ops;
5736
2d34e1b3
TI
5737 codec->proc_widget_hook = stac9205_proc_hook;
5738
f3302a59
MP
5739 return 0;
5740}
5741
db064e50 5742/*
6d859065 5743 * STAC9872 hack
db064e50
TI
5744 */
5745
1e137f92 5746static struct hda_verb stac9872_core_init[] = {
1624cb9a 5747 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
5748 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5749 {}
5750};
5751
caa10b6e
TI
5752static hda_nid_t stac9872_pin_nids[] = {
5753 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
5754 0x11, 0x13, 0x14,
5755};
5756
5757static hda_nid_t stac9872_adc_nids[] = {
5758 0x8 /*,0x6*/
5759};
5760
5761static hda_nid_t stac9872_mux_nids[] = {
5762 0x15
5763};
5764
6479c631
TI
5765static unsigned long stac9872_capvols[] = {
5766 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
5767};
5768#define stac9872_capsws stac9872_capvols
5769
307282c8
TI
5770static unsigned int stac9872_vaio_pin_configs[9] = {
5771 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
5772 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
5773 0x90a7013e
5774};
5775
5776static const char *stac9872_models[STAC_9872_MODELS] = {
5777 [STAC_9872_AUTO] = "auto",
5778 [STAC_9872_VAIO] = "vaio",
5779};
5780
5781static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
5782 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
5783};
5784
5785static struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI
5786 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5787 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI
5788 {} /* terminator */
5789};
5790
6d859065 5791static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
5792{
5793 struct sigmatel_spec *spec;
1e137f92 5794 int err;
db064e50 5795
db064e50
TI
5796 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5797 if (spec == NULL)
5798 return -ENOMEM;
db064e50 5799 codec->spec = spec;
b04add95
TI
5800 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
5801 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI
5802
5803 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5804 stac9872_models,
5805 stac9872_cfg_tbl);
307282c8 5806 if (spec->board_config < 0)
9a11f1aa
TI
5807 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5808 codec->chip_name);
307282c8
TI
5809 else
5810 stac92xx_set_config_regs(codec,
5811 stac9872_brd_tbl[spec->board_config]);
db064e50 5812
1e137f92
TI
5813 spec->multiout.dac_nids = spec->dac_nids;
5814 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
5815 spec->adc_nids = stac9872_adc_nids;
5816 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
5817 spec->mux_nids = stac9872_mux_nids;
1e137f92 5818 spec->init = stac9872_core_init;
6479c631
TI
5819 spec->num_caps = 1;
5820 spec->capvols = stac9872_capvols;
5821 spec->capsws = stac9872_capsws;
1e137f92
TI
5822
5823 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
5824 if (err < 0) {
5825 stac92xx_free(codec);
5826 return -EINVAL;
5827 }
5828 spec->input_mux = &spec->private_imux;
5829 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
5830 return 0;
5831}
5832
5833
2f2f4251
M
5834/*
5835 * patch entries
5836 */
1289e9e8 5837static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
5838 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5839 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5840 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5841 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5842 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5843 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5844 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
5845 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5846 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5847 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5848 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5849 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5850 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
5851 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5852 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5853 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5854 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5855 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5856 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5857 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5858 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5859 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5860 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
5861 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5862 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5863 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5864 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5865 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5866 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
5867 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5868 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
5869 /* The following does not take into account .id=0x83847661 when subsys =
5870 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5871 * currently not fully supported.
5872 */
5873 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5874 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5875 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 5876 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP
5877 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5878 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5879 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5880 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5881 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5882 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5883 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5884 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5885 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR
5886 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5887 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 5888 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
aafc4412 5889 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
5890 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5891 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5892 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
5893 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5894 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5895 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5896 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5897 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5898 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5899 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5900 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M
5901 {} /* terminator */
5902};
1289e9e8
TI
5903
5904MODULE_ALIAS("snd-hda-codec-id:8384*");
5905MODULE_ALIAS("snd-hda-codec-id:111d*");
5906
5907MODULE_LICENSE("GPL");
5908MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5909
5910static struct hda_codec_preset_list sigmatel_list = {
5911 .preset = snd_hda_preset_sigmatel,
5912 .owner = THIS_MODULE,
5913};
5914
5915static int __init patch_sigmatel_init(void)
5916{
5917 return snd_hda_add_codec_preset(&sigmatel_list);
5918}
5919
5920static void __exit patch_sigmatel_exit(void)
5921{
5922 snd_hda_delete_codec_preset(&sigmatel_list);
5923}
5924
5925module_init(patch_sigmatel_init)
5926module_exit(patch_sigmatel_exit)
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