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Merge commit 'jwb/next' into next
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
45a6ac16 33#include <sound/jack.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
c6e4c666
TI		 38enum {
39 STAC_VREF_EVENT = 1,
40 STAC_INSERT_EVENT,
41 STAC_PWR_EVENT,
42 STAC_HP_EVENT,
43};
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
58eec423
MCC		 58 STAC_9200_M4,
59 STAC_9200_M4_2,
117f257d 60 STAC_9200_PANASONIC,
f5fcc13c
TI		 61 STAC_9200_MODELS
62};
63
64enum {
65 STAC_9205_REF,
dfe495d0 66 STAC_9205_DELL_M42,
ae0a8ed8
TD		 67 STAC_9205_DELL_M43,
68 STAC_9205_DELL_M44,
f5fcc13c
TI		 69 STAC_9205_MODELS
70};
71
e1f0d669 72enum {
9e43f0de 73 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 74 STAC_92HD73XX_REF,
661cd8fb
TI		 75 STAC_DELL_M6_AMIC,
76 STAC_DELL_M6_DMIC,
77 STAC_DELL_M6_BOTH,
6b3ab21e 78 STAC_DELL_EQ,
e1f0d669
MR		 79 STAC_92HD73XX_MODELS
80};
81
d0513fc6
MR		 82enum {
83 STAC_92HD83XXX_REF,
32ed3f46 84 STAC_92HD83XXX_PWR_REF,
d0513fc6
MR		 85 STAC_92HD83XXX_MODELS
86};
87
e035b841
MR		 88enum {
89 STAC_92HD71BXX_REF,
a7662640
MR		 90 STAC_DELL_M4_1,
91 STAC_DELL_M4_2,
3a7abfd2 92 STAC_DELL_M4_3,
6a14f585 93 STAC_HP_M4,
1b0652eb 94 STAC_HP_DV5,
e035b841
MR		 95 STAC_92HD71BXX_MODELS
96};
97
8e21c34c
TD		 98enum {
99 STAC_925x_REF,
9cb36c2a
MCC		 100 STAC_M1,
101 STAC_M1_2,
102 STAC_M2,
8e21c34c 103 STAC_M2_2,
9cb36c2a
MCC		 104 STAC_M3,
105 STAC_M5,
106 STAC_M6,
8e21c34c
TD		 107 STAC_925x_MODELS
108};
109
f5fcc13c
TI		 110enum {
111 STAC_D945_REF,
112 STAC_D945GTP3,
113 STAC_D945GTP5,
5d5d3bc3
IZ		 114 STAC_INTEL_MAC_V1,
115 STAC_INTEL_MAC_V2,
116 STAC_INTEL_MAC_V3,
117 STAC_INTEL_MAC_V4,
118 STAC_INTEL_MAC_V5,
536319af
NB		 119 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
120 * is given, one of the above models will be
121 * chosen according to the subsystem id. */
dfe495d0 122 /* for backward compatibility */
f5fcc13c 123 STAC_MACMINI,
3fc24d85 124 STAC_MACBOOK,
6f0778d8
NB		 125 STAC_MACBOOK_PRO_V1,
126 STAC_MACBOOK_PRO_V2,
f16928fb 127 STAC_IMAC_INTEL,
0dae0f83 128 STAC_IMAC_INTEL_20,
8c650087 129 STAC_ECS_202,
dfe495d0
TI		 130 STAC_922X_DELL_D81,
131 STAC_922X_DELL_D82,
132 STAC_922X_DELL_M81,
133 STAC_922X_DELL_M82,
f5fcc13c
TI		 134 STAC_922X_MODELS
135};
136
137enum {
e28d8322 138 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 139 STAC_D965_REF,
140 STAC_D965_3ST,
141 STAC_D965_5ST,
4ff076e5 142 STAC_DELL_3ST,
8e9068b1 143 STAC_DELL_BIOS,
f5fcc13c
TI		 144 STAC_927X_MODELS
145};
403d1944 146
74aeaabc
MR		 147struct sigmatel_event {
148 hda_nid_t nid;
c6e4c666
TI		 149 unsigned char type;
150 unsigned char tag;
74aeaabc
MR		 151 int data;
152};
153
154struct sigmatel_jack {
155 hda_nid_t nid;
156 int type;
157 struct snd_jack *jack;
158};
159
2f2f4251 160struct sigmatel_spec {
c8b6bf9b 161 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 162 unsigned int num_mixers;
163
403d1944 164 int board_config;
c0cea0d0 165 unsigned int eapd_switch: 1;
c7d4b2fa 166 unsigned int surr_switch: 1;
3cc08dc6 167 unsigned int alt_switch: 1;
82bc955f 168 unsigned int hp_detect: 1;
00ef50c2 169 unsigned int spdif_mute: 1;
c7d4b2fa 170
4fe5195c 171 /* gpio lines */
0fc9dec4 172 unsigned int eapd_mask;
4fe5195c
MR		 173 unsigned int gpio_mask;
174 unsigned int gpio_dir;
175 unsigned int gpio_data;
176 unsigned int gpio_mute;
177
8daaaa97
MR		 178 /* stream */
179 unsigned int stream_delay;
180
4fe5195c 181 /* analog loopback */
e1f0d669
MR		 182 unsigned char aloopback_mask;
183 unsigned char aloopback_shift;
8259980e 184
a64135a2
MR		 185 /* power management */
186 unsigned int num_pwrs;
d0513fc6 187 unsigned int *pwr_mapping;
a64135a2 188 hda_nid_t *pwr_nids;
b76c850f 189 hda_nid_t *dac_list;
a64135a2 190
74aeaabc
MR		 191 /* jack detection */
192 struct snd_array jacks;
193
194 /* events */
195 struct snd_array events;
196
2f2f4251 197 /* playback */
b22b4821 198 struct hda_input_mux *mono_mux;
89385035 199 struct hda_input_mux *amp_mux;
b22b4821 200 unsigned int cur_mmux;
2f2f4251 201 struct hda_multi_out multiout;
3cc08dc6 202 hda_nid_t dac_nids[5];
c21ca4a8
TI		 203 hda_nid_t hp_dacs[5];
204 hda_nid_t speaker_dacs[5];
2f2f4251
M		 205
206 /* capture */
207 hda_nid_t *adc_nids;
2f2f4251 208 unsigned int num_adcs;
dabbed6f
M		 209 hda_nid_t *mux_nids;
210 unsigned int num_muxes;
8b65727b
MP		 211 hda_nid_t *dmic_nids;
212 unsigned int num_dmics;
e1f0d669 213 hda_nid_t *dmux_nids;
1697055e 214 unsigned int num_dmuxes;
d9737751
MR		 215 hda_nid_t *smux_nids;
216 unsigned int num_smuxes;
65973632 217 const char **spdif_labels;
d9737751 218
dabbed6f 219 hda_nid_t dig_in_nid;
b22b4821 220 hda_nid_t mono_nid;
1cd2224c
MR		 221 hda_nid_t anabeep_nid;
222 hda_nid_t digbeep_nid;
2f2f4251 223
2f2f4251
M		 224 /* pin widgets */
225 hda_nid_t *pin_nids;
226 unsigned int num_pins;
2f2f4251 227 unsigned int *pin_configs;
2f2f4251
M		 228
229 /* codec specific stuff */
230 struct hda_verb *init;
c8b6bf9b 231 struct snd_kcontrol_new *mixer;
2f2f4251
M		 232
233 /* capture source */
8b65727b 234 struct hda_input_mux *dinput_mux;
e1f0d669 235 unsigned int cur_dmux[2];
c7d4b2fa 236 struct hda_input_mux *input_mux;
3cc08dc6 237 unsigned int cur_mux[3];
d9737751
MR		 238 struct hda_input_mux *sinput_mux;
239 unsigned int cur_smux[2];
2a9c7816
MR		 240 unsigned int cur_amux;
241 hda_nid_t *amp_nids;
242 unsigned int num_amps;
8daaaa97 243 unsigned int powerdown_adcs;
2f2f4251 244
403d1944
MP		 245 /* i/o switches */
246 unsigned int io_switch[2];
0fb87bb4 247 unsigned int clfe_swap;
c21ca4a8
TI		 248 hda_nid_t line_switch; /* shared line-in for input and output */
249 hda_nid_t mic_switch; /* shared mic-in for input and output */
250 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 251 unsigned int aloopback;
2f2f4251 252
c7d4b2fa
M		 253 struct hda_pcm pcm_rec[2]; /* PCM information */
254
255 /* dynamic controls and input_mux */
256 struct auto_pin_cfg autocfg;
603c4019 257 struct snd_array kctls;
8b65727b 258 struct hda_input_mux private_dimux;
c7d4b2fa 259 struct hda_input_mux private_imux;
d9737751 260 struct hda_input_mux private_smux;
89385035 261 struct hda_input_mux private_amp_mux;
b22b4821 262 struct hda_input_mux private_mono_mux;
2f2f4251
M		 263};
264
265static hda_nid_t stac9200_adc_nids[1] = {
266 0x03,
267};
268
269static hda_nid_t stac9200_mux_nids[1] = {
270 0x0c,
271};
272
273static hda_nid_t stac9200_dac_nids[1] = {
274 0x02,
275};
276
a64135a2
MR		 277static hda_nid_t stac92hd73xx_pwr_nids[8] = {
278 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
279 0x0f, 0x10, 0x11
280};
281
0ffa9807
MR		 282static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
283 0x26, 0,
284};
285
e1f0d669
MR		 286static hda_nid_t stac92hd73xx_adc_nids[2] = {
287 0x1a, 0x1b
288};
289
2a9c7816
MR		 290#define DELL_M6_AMP 2
291static hda_nid_t stac92hd73xx_amp_nids[3] = {
292 0x0b, 0x0c, 0x0e
89385035
MR		 293};
294
e1f0d669
MR		 295#define STAC92HD73XX_NUM_DMICS 2
296static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
297 0x13, 0x14, 0
298};
299
300#define STAC92HD73_DAC_COUNT 5
e1f0d669
MR		 301
302static hda_nid_t stac92hd73xx_mux_nids[4] = {
303 0x28, 0x29, 0x2a, 0x2b,
304};
305
306static hda_nid_t stac92hd73xx_dmux_nids[2] = {
307 0x20, 0x21,
308};
309
d9737751
MR		 310static hda_nid_t stac92hd73xx_smux_nids[2] = {
311 0x22, 0x23,
312};
313
d0513fc6
MR		 314#define STAC92HD83XXX_NUM_DMICS 2
315static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
316 0x11, 0x12, 0
317};
318
d0513fc6 319#define STAC92HD83_DAC_COUNT 3
d0513fc6
MR		 320
321static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
322 0x17, 0x18,
323};
324
325static hda_nid_t stac92hd83xxx_adc_nids[2] = {
326 0x15, 0x16,
327};
328
329static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
330 0xa, 0xb, 0xd, 0xe,
331};
332
0ffa9807
MR		 333static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
334 0x1e, 0,
335};
336
d0513fc6 337static unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 338 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 339};
340
9248f269 341static hda_nid_t stac92hd83xxx_amp_nids[1] = {
c15c5060
MR		 342 0xc,
343};
344
a64135a2
MR		 345static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
346 0x0a, 0x0d, 0x0f
347};
348
e035b841
MR		 349static hda_nid_t stac92hd71bxx_adc_nids[2] = {
350 0x12, 0x13,
351};
352
353static hda_nid_t stac92hd71bxx_mux_nids[2] = {
354 0x1a, 0x1b
355};
356
4b33c767
MR		 357static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
358 0x1c, 0x1d,
e1f0d669
MR		 359};
360
d9737751
MR		 361static hda_nid_t stac92hd71bxx_smux_nids[2] = {
362 0x24, 0x25,
363};
364
e035b841
MR		 365#define STAC92HD71BXX_NUM_DMICS 2
366static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
367 0x18, 0x19, 0
368};
369
0ffa9807
MR		 370static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
371 0x22, 0
372};
373
8e21c34c
TD		 374static hda_nid_t stac925x_adc_nids[1] = {
375 0x03,
376};
377
378static hda_nid_t stac925x_mux_nids[1] = {
379 0x0f,
380};
381
382static hda_nid_t stac925x_dac_nids[1] = {
383 0x02,
384};
385
f6e9852a
TI		 386#define STAC925X_NUM_DMICS 1
387static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
388 0x15, 0
2c11f955
TD		 389};
390
1697055e
TI		 391static hda_nid_t stac925x_dmux_nids[1] = {
392 0x14,
393};
394
2f2f4251
M		 395static hda_nid_t stac922x_adc_nids[2] = {
396 0x06, 0x07,
397};
398
399static hda_nid_t stac922x_mux_nids[2] = {
400 0x12, 0x13,
401};
402
3cc08dc6
MP		 403static hda_nid_t stac927x_adc_nids[3] = {
404 0x07, 0x08, 0x09
405};
406
407static hda_nid_t stac927x_mux_nids[3] = {
408 0x15, 0x16, 0x17
409};
410
d9737751
MR		 411static hda_nid_t stac927x_smux_nids[1] = {
412 0x21,
413};
414
b76c850f
MR		 415static hda_nid_t stac927x_dac_nids[6] = {
416 0x02, 0x03, 0x04, 0x05, 0x06, 0
417};
418
e1f0d669
MR		 419static hda_nid_t stac927x_dmux_nids[1] = {
420 0x1b,
421};
422
7f16859a
MR		 423#define STAC927X_NUM_DMICS 2
424static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
425 0x13, 0x14, 0
426};
427
65973632
MR		 428static const char *stac927x_spdif_labels[5] = {
429 "Digital Playback", "ADAT", "Analog Mux 1",
430 "Analog Mux 2", "Analog Mux 3"
431};
432
f3302a59
MP		 433static hda_nid_t stac9205_adc_nids[2] = {
434 0x12, 0x13
435};
436
437static hda_nid_t stac9205_mux_nids[2] = {
438 0x19, 0x1a
439};
440
e1f0d669 441static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 442 0x1d,
e1f0d669
MR		 443};
444
d9737751
MR		 445static hda_nid_t stac9205_smux_nids[1] = {
446 0x21,
447};
448
f6e9852a
TI		 449#define STAC9205_NUM_DMICS 2
450static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
451 0x17, 0x18, 0
8b65727b
MP		 452};
453
c7d4b2fa 454static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 455 0x08, 0x09, 0x0d, 0x0e,
456 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 457};
458
8e21c34c
TD		 459static hda_nid_t stac925x_pin_nids[8] = {
460 0x07, 0x08, 0x0a, 0x0b,
461 0x0c, 0x0d, 0x10, 0x11,
462};
463
2f2f4251
M		 464static hda_nid_t stac922x_pin_nids[10] = {
465 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
466 0x0f, 0x10, 0x11, 0x15, 0x1b,
467};
468
a7662640 469static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 470 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
471 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 472 0x14, 0x22, 0x23
e1f0d669
MR		 473};
474
d0513fc6
MR		 475static hda_nid_t stac92hd83xxx_pin_nids[14] = {
476 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
477 0x0f, 0x10, 0x11, 0x12, 0x13,
478 0x1d, 0x1e, 0x1f, 0x20
479};
0ffa9807 480static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 481 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
482 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 483 0x1f,
e035b841
MR		 484};
485
3cc08dc6
MP		 486static hda_nid_t stac927x_pin_nids[14] = {
487 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
488 0x0f, 0x10, 0x11, 0x12, 0x13,
489 0x14, 0x21, 0x22, 0x23,
490};
491
f3302a59
MP		 492static hda_nid_t stac9205_pin_nids[12] = {
493 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
494 0x0f, 0x14, 0x16, 0x17, 0x18,
495 0x21, 0x22,
f3302a59
MP		 496};
497
89385035
MR		 498#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
499
500static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
501 struct snd_ctl_elem_value *ucontrol)
502{
503 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
504 struct sigmatel_spec *spec = codec->spec;
505 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
506
507 kcontrol->private_value ^= get_amp_nid(kcontrol);
508 kcontrol->private_value |= nid;
509
510 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
511}
512
513static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
514 struct snd_ctl_elem_value *ucontrol)
515{
516 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
517 struct sigmatel_spec *spec = codec->spec;
518 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
519
520 kcontrol->private_value ^= get_amp_nid(kcontrol);
521 kcontrol->private_value |= nid;
522
523 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
524}
525
8b65727b
MP		 526static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
531 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
532}
533
534static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_value *ucontrol)
536{
537 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
538 struct sigmatel_spec *spec = codec->spec;
e1f0d669 539 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 540
e1f0d669 541 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 542 return 0;
543}
544
545static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
e1f0d669 550 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 551
552 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 553 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 554}
555
d9737751
MR		 556static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
557 struct snd_ctl_elem_info *uinfo)
558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
561 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
562}
563
564static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *ucontrol)
566{
567 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
568 struct sigmatel_spec *spec = codec->spec;
569 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
570
571 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
572 return 0;
573}
574
575static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
576 struct snd_ctl_elem_value *ucontrol)
577{
578 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
579 struct sigmatel_spec *spec = codec->spec;
00ef50c2 580 struct hda_input_mux *smux = &spec->private_smux;
d9737751 581 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 582 int err, val;
583 hda_nid_t nid;
d9737751 584
00ef50c2 585 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 586 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 587 if (err < 0)
588 return err;
589
590 if (spec->spdif_mute) {
591 if (smux_idx == 0)
592 nid = spec->multiout.dig_out_nid;
593 else
594 nid = codec->slave_dig_outs[smux_idx - 1];
595 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 596 val = HDA_AMP_MUTE;
00ef50c2 597 else
c9b46f91 598 val = 0;
00ef50c2 599 /* un/mute SPDIF out */
c9b46f91
TI		 600 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
601 HDA_AMP_MUTE, val);
00ef50c2
MR		 602 }
603 return 0;
d9737751
MR		 604}
605
c8b6bf9b 606static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 607{
608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
609 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 610 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 611}
612
c8b6bf9b 613static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 614{
615 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
616 struct sigmatel_spec *spec = codec->spec;
617 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
618
619 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
620 return 0;
621}
622
c8b6bf9b 623static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
627 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
628
c7d4b2fa 629 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 630 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
631}
632
b22b4821
MR		 633static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
634 struct snd_ctl_elem_info *uinfo)
635{
636 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
637 struct sigmatel_spec *spec = codec->spec;
638 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
639}
640
641static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
642 struct snd_ctl_elem_value *ucontrol)
643{
644 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
645 struct sigmatel_spec *spec = codec->spec;
646
647 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
648 return 0;
649}
650
651static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
652 struct snd_ctl_elem_value *ucontrol)
653{
654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
655 struct sigmatel_spec *spec = codec->spec;
656
657 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
658 spec->mono_nid, &spec->cur_mmux);
659}
660
89385035
MR		 661static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
662 struct snd_ctl_elem_info *uinfo)
663{
664 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
665 struct sigmatel_spec *spec = codec->spec;
666 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
667}
668
669static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
670 struct snd_ctl_elem_value *ucontrol)
671{
672 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
673 struct sigmatel_spec *spec = codec->spec;
674
675 ucontrol->value.enumerated.item[0] = spec->cur_amux;
676 return 0;
677}
678
679static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
680 struct snd_ctl_elem_value *ucontrol)
681{
682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
683 struct sigmatel_spec *spec = codec->spec;
684 struct snd_kcontrol *ctl =
685 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
686 if (!ctl)
687 return -EINVAL;
688
689 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
690 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
691
692 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
693 0, &spec->cur_amux);
694}
695
5f10c4a9
ML		 696#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
697
698static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
699 struct snd_ctl_elem_value *ucontrol)
700{
701 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 702 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 703 struct sigmatel_spec *spec = codec->spec;
704
e1f0d669
MR		 705 ucontrol->value.integer.value[0] = !!(spec->aloopback &
706 (spec->aloopback_mask << idx));
5f10c4a9
ML		 707 return 0;
708}
709
710static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
711 struct snd_ctl_elem_value *ucontrol)
712{
713 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
714 struct sigmatel_spec *spec = codec->spec;
e1f0d669 715 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 716 unsigned int dac_mode;
e1f0d669 717 unsigned int val, idx_val;
5f10c4a9 718
e1f0d669
MR		 719 idx_val = spec->aloopback_mask << idx;
720 if (ucontrol->value.integer.value[0])
721 val = spec->aloopback | idx_val;
722 else
723 val = spec->aloopback & ~idx_val;
68ea7b2f 724 if (spec->aloopback == val)
5f10c4a9
ML		 725 return 0;
726
68ea7b2f 727 spec->aloopback = val;
5f10c4a9 728
e1f0d669
MR		 729 /* Only return the bits defined by the shift value of the
730 * first two bytes of the mask
731 */
5f10c4a9 732 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 733 kcontrol->private_value & 0xFFFF, 0x0);
734 dac_mode >>= spec->aloopback_shift;
5f10c4a9 735
e1f0d669 736 if (spec->aloopback & idx_val) {
5f10c4a9 737 snd_hda_power_up(codec);
e1f0d669 738 dac_mode |= idx_val;
5f10c4a9
ML		 739 } else {
740 snd_hda_power_down(codec);
e1f0d669 741 dac_mode &= ~idx_val;
5f10c4a9
ML		 742 }
743
744 snd_hda_codec_write_cache(codec, codec->afg, 0,
745 kcontrol->private_value >> 16, dac_mode);
746
747 return 1;
748}
749
c7d4b2fa 750static struct hda_verb stac9200_core_init[] = {
2f2f4251 751 /* set dac0mux for dac converter */
c7d4b2fa 752 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 753 {}
754};
755
1194b5b7
TI		 756static struct hda_verb stac9200_eapd_init[] = {
757 /* set dac0mux for dac converter */
758 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
759 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
760 {}
761};
762
e1f0d669
MR		 763static struct hda_verb stac92hd73xx_6ch_core_init[] = {
764 /* set master volume and direct control */
765 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 766 /* setup adcs to point to mixer */
767 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
768 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 769 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
770 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
771 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
772 /* setup import muxs */
773 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
774 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
775 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
776 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
777 {}
778};
779
d654a660
MR		 780static struct hda_verb dell_eq_core_init[] = {
781 /* set master volume to max value without distortion
782 * and direct control */
783 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d654a660
MR		 784 /* setup adcs to point to mixer */
785 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
786 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
787 /* setup import muxs */
788 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
789 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
790 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
791 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
792 {}
793};
794
52fe0f9d 795static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 796 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d
MR		 797 /* setup adcs to point to mixer */
798 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
799 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
800 /* setup import muxs */
801 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
802 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
803 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
804 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
805 {}
806};
807
e1f0d669
MR		 808static struct hda_verb stac92hd73xx_8ch_core_init[] = {
809 /* set master volume and direct control */
810 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 811 /* setup adcs to point to mixer */
812 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
813 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 814 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 /* setup import muxs */
818 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
822 {}
823};
824
825static struct hda_verb stac92hd73xx_10ch_core_init[] = {
826 /* set master volume and direct control */
827 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 828 /* dac3 is connected to import3 mux */
829 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
e1f0d669
MR		 830 /* setup adcs to point to mixer */
831 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
832 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 833 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
834 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
835 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
836 /* setup import muxs */
837 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
838 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
839 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
840 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
841 {}
842};
843
d0513fc6 844static struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 845 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
846 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
847 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
848
849 /* power state controls amps */
850 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 851 {}
d0513fc6
MR		 852};
853
e035b841 854static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 855 /* set master volume and direct control */
856 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
541eee87
MR		 857 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
858 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
859 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
860 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
574f3c4f 861 {}
541eee87
MR		 862};
863
4b33c767 864#define HD_DISABLE_PORTF 2
541eee87 865static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 866 /* start of config #1 */
867
868 /* connect port 0f to audio mixer */
869 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 870 /* unmute right and left channels for node 0x0f */
871 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
872 /* start of config #2 */
873
e035b841
MR		 874 /* set master volume and direct control */
875 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
aafc4412 876 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 877 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
878 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 879 {}
880};
881
8e21c34c
TD		 882static struct hda_verb stac925x_core_init[] = {
883 /* set dac0mux for dac converter */
884 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 885 /* mute the master volume */
886 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 887 {}
888};
889
c7d4b2fa 890static struct hda_verb stac922x_core_init[] = {
2f2f4251 891 /* set master volume and direct control */
c7d4b2fa 892 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 893 {}
894};
895
93ed1503 896static struct hda_verb d965_core_init[] = {
19039bd0 897 /* set master volume and direct control */
93ed1503 898 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 899 /* unmute node 0x1b */
900 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
901 /* select node 0x03 as DAC */
902 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
903 {}
904};
905
3cc08dc6
MP		 906static struct hda_verb stac927x_core_init[] = {
907 /* set master volume and direct control */
908 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 909 /* enable analog pc beep path */
910 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 911 {}
912};
913
f3302a59
MP		 914static struct hda_verb stac9205_core_init[] = {
915 /* set master volume and direct control */
916 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 917 /* enable analog pc beep path */
918 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 919 {}
920};
921
b22b4821
MR		 922#define STAC_MONO_MUX \
923 { \
924 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
925 .name = "Mono Mux", \
926 .count = 1, \
927 .info = stac92xx_mono_mux_enum_info, \
928 .get = stac92xx_mono_mux_enum_get, \
929 .put = stac92xx_mono_mux_enum_put, \
930 }
931
89385035
MR		 932#define STAC_AMP_MUX \
933 { \
934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
935 .name = "Amp Selector Capture Switch", \
936 .count = 1, \
937 .info = stac92xx_amp_mux_enum_info, \
938 .get = stac92xx_amp_mux_enum_get, \
939 .put = stac92xx_amp_mux_enum_put, \
940 }
941
942#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
943 { \
944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
945 .name = xname, \
946 .index = 0, \
947 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
948 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
949 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
950 .info = stac92xx_amp_volume_info, \
951 .get = stac92xx_amp_volume_get, \
952 .put = stac92xx_amp_volume_put, \
953 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
954 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
955 }
956
9e05b7a3 957#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 958 { \
959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
960 .name = "Input Source", \
9e05b7a3 961 .count = cnt, \
ca7c5a8b
ML		 962 .info = stac92xx_mux_enum_info, \
963 .get = stac92xx_mux_enum_get, \
964 .put = stac92xx_mux_enum_put, \
965 }
966
e1f0d669 967#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 968 { \
969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
970 .name = "Analog Loopback", \
e1f0d669 971 .count = cnt, \
5f10c4a9
ML		 972 .info = stac92xx_aloopback_info, \
973 .get = stac92xx_aloopback_get, \
974 .put = stac92xx_aloopback_put, \
975 .private_value = verb_read | (verb_write << 16), \
976 }
977
c8b6bf9b 978static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 979 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
980 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 981 STAC_INPUT_SOURCE(1),
2f2f4251
M		 982 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
983 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 984 { } /* end */
985};
986
2a9c7816 987#define DELL_M6_MIXER 6
e1f0d669 988static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 989 /* start of config #1 */
e1f0d669
MR		 990 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
991 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
992
e1f0d669
MR		 993 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
994 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
995
2a9c7816
MR		 996 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
997 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
998
999 /* start of config #2 */
1000 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1001 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1002
e1f0d669
MR		 1003 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1004 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1005
2a9c7816
MR		 1006 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1007
1008 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1009 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1010
1011 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1012 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1013
e1f0d669
MR		 1014 { } /* end */
1015};
1016
1017static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1018 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1019
e1f0d669
MR		 1020 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1022
1023 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1025
1026 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1027 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1028
1029 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1030 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1031
1032 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1033 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1034
1035 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1036 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1037
1038 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1039 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1040 { } /* end */
1041};
1042
1043static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1044 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1045
e1f0d669
MR		 1046 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1047 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1048
1049 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1051
1052 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1053 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1054
1055 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1056 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1057
1058 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1059 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1060
1061 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1062 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1063
1064 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1065 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1066 { } /* end */
1067};
1068
d0513fc6
MR		 1069
1070static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1071 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1072 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1073
1074 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1075 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1076
74b7ff48
MR		 1077 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0x3, HDA_INPUT),
1078 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0x3, HDA_INPUT),
d0513fc6 1079
74b7ff48
MR		 1080 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x4, HDA_INPUT),
1081 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x4, HDA_INPUT),
d0513fc6 1082
74b7ff48
MR		 1083 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x0, HDA_INPUT),
1084 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x0, HDA_INPUT),
d0513fc6 1085
74b7ff48
MR		 1086 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x2, HDA_INPUT),
1087 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x2, HDA_INPUT),
d0513fc6
MR		 1088
1089 /*
74b7ff48
MR		 1090 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x1, HDA_INPUT),
1091 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x1, HDA_INPUT),
d0513fc6
MR		 1092 */
1093 { } /* end */
1094};
1095
541eee87 1096static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1097 STAC_INPUT_SOURCE(2),
4b33c767 1098 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1099
9b35947f
MR		 1100 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1101 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1102
1103 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1104 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1105 /* analog pc-beep replaced with digital beep support */
1106 /*
f7c5dda2
MR		 1107 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1108 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1109 */
f7c5dda2 1110
687cb98e
MR		 1111 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1112 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1113
687cb98e
MR		 1114 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1115 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1116
1117 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1118 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1119
1120 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1121 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1122 { } /* end */
1123};
1124
541eee87 1125static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1126 STAC_INPUT_SOURCE(2),
1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1128
541eee87
MR		 1129 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1130 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1131
1132 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1133 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1134 { } /* end */
1135};
1136
8e21c34c 1137static struct snd_kcontrol_new stac925x_mixer[] = {
c9280d68
TI		 1138 HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
1139 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
9e05b7a3 1140 STAC_INPUT_SOURCE(1),
8e21c34c 1141 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1142 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1143 { } /* end */
1144};
1145
9e05b7a3 1146static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1147 STAC_INPUT_SOURCE(2),
e1f0d669 1148 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1149
1150 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1151 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1152
1153 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1154 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1155 { } /* end */
1156};
1157
19039bd0 1158/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1159static struct snd_kcontrol_new stac922x_mixer[] = {
1160 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1161 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1162 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1163
1164 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1165 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1166 { } /* end */
1167};
1168
9e05b7a3 1169
d1d985f0 1170static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1171 STAC_INPUT_SOURCE(3),
e1f0d669 1172 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1173
9e05b7a3
ML		 1174 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1175 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1176
1177 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1178 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1179
1180 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1181 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1182 { } /* end */
1183};
1184
1697055e
TI		 1185static struct snd_kcontrol_new stac_dmux_mixer = {
1186 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1187 .name = "Digital Input Source",
1188 /* count set later */
1189 .info = stac92xx_dmux_enum_info,
1190 .get = stac92xx_dmux_enum_get,
1191 .put = stac92xx_dmux_enum_put,
1192};
1193
d9737751
MR		 1194static struct snd_kcontrol_new stac_smux_mixer = {
1195 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1196 .name = "IEC958 Playback Source",
d9737751
MR		 1197 /* count set later */
1198 .info = stac92xx_smux_enum_info,
1199 .get = stac92xx_smux_enum_get,
1200 .put = stac92xx_smux_enum_put,
1201};
1202
2134ea4f
TI		 1203static const char *slave_vols[] = {
1204 "Front Playback Volume",
1205 "Surround Playback Volume",
1206 "Center Playback Volume",
1207 "LFE Playback Volume",
1208 "Side Playback Volume",
1209 "Headphone Playback Volume",
1210 "Headphone Playback Volume",
1211 "Speaker Playback Volume",
1212 "External Speaker Playback Volume",
1213 "Speaker2 Playback Volume",
1214 NULL
1215};
1216
1217static const char *slave_sws[] = {
1218 "Front Playback Switch",
1219 "Surround Playback Switch",
1220 "Center Playback Switch",
1221 "LFE Playback Switch",
1222 "Side Playback Switch",
1223 "Headphone Playback Switch",
1224 "Headphone Playback Switch",
1225 "Speaker Playback Switch",
1226 "External Speaker Playback Switch",
1227 "Speaker2 Playback Switch",
edb54a55 1228 "IEC958 Playback Switch",
2134ea4f
TI		 1229 NULL
1230};
1231
603c4019 1232static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1233static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1234
2f2f4251
M		 1235static int stac92xx_build_controls(struct hda_codec *codec)
1236{
1237 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1238 struct auto_pin_cfg *cfg = &spec->autocfg;
1239 hda_nid_t nid;
2f2f4251 1240 int err;
c7d4b2fa 1241 int i;
2f2f4251
M		 1242
1243 err = snd_hda_add_new_ctls(codec, spec->mixer);
1244 if (err < 0)
1245 return err;
c7d4b2fa
M		 1246
1247 for (i = 0; i < spec->num_mixers; i++) {
1248 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1249 if (err < 0)
1250 return err;
1251 }
1697055e
TI		 1252 if (spec->num_dmuxes > 0) {
1253 stac_dmux_mixer.count = spec->num_dmuxes;
d13bd412 1254 err = snd_hda_ctl_add(codec,
1697055e
TI		 1255 snd_ctl_new1(&stac_dmux_mixer, codec));
1256 if (err < 0)
1257 return err;
1258 }
d9737751 1259 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1260 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1261 struct hda_input_mux *smux = &spec->private_smux;
1262 /* check for mute support on SPDIF out */
1263 if (wcaps & AC_WCAP_OUT_AMP) {
1264 smux->items[smux->num_items].label = "Off";
1265 smux->items[smux->num_items].index = 0;
1266 smux->num_items++;
1267 spec->spdif_mute = 1;
1268 }
d9737751 1269 stac_smux_mixer.count = spec->num_smuxes;
4f2d23e1 1270 err = snd_hda_ctl_add(codec,
d9737751
MR		 1271 snd_ctl_new1(&stac_smux_mixer, codec));
1272 if (err < 0)
1273 return err;
1274 }
c7d4b2fa 1275
dabbed6f
M		 1276 if (spec->multiout.dig_out_nid) {
1277 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1278 if (err < 0)
1279 return err;
9a08160b
TI		 1280 err = snd_hda_create_spdif_share_sw(codec,
1281 &spec->multiout);
1282 if (err < 0)
1283 return err;
1284 spec->multiout.share_spdif = 1;
dabbed6f 1285 }
da74ae3e 1286 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1287 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1288 if (err < 0)
1289 return err;
1290 }
2134ea4f
TI		 1291
1292 /* if we have no master control, let's create it */
1293 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1294 unsigned int vmaster_tlv[4];
2134ea4f 1295 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1296 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1297 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1298 vmaster_tlv, slave_vols);
2134ea4f
TI		 1299 if (err < 0)
1300 return err;
1301 }
1302 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1303 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1304 NULL, slave_sws);
1305 if (err < 0)
1306 return err;
1307 }
1308
603c4019 1309 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1310
1311 /* create jack input elements */
1312 if (spec->hp_detect) {
1313 for (i = 0; i < cfg->hp_outs; i++) {
1314 int type = SND_JACK_HEADPHONE;
1315 nid = cfg->hp_pins[i];
1316 /* jack detection */
1317 if (cfg->hp_outs == i)
1318 type |= SND_JACK_LINEOUT;
1319 err = stac92xx_add_jack(codec, nid, type);
1320 if (err < 0)
1321 return err;
1322 }
1323 }
1324 for (i = 0; i < cfg->line_outs; i++) {
1325 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1326 SND_JACK_LINEOUT);
1327 if (err < 0)
1328 return err;
1329 }
1330 for (i = 0; i < AUTO_PIN_LAST; i++) {
1331 nid = cfg->input_pins[i];
1332 if (nid) {
1333 err = stac92xx_add_jack(codec, nid,
1334 SND_JACK_MICROPHONE);
1335 if (err < 0)
1336 return err;
1337 }
1338 }
1339
dabbed6f 1340 return 0;
2f2f4251
M		 1341}
1342
403d1944 1343static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1344 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1345 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1346};
1347
58eec423
MCC		 1348static unsigned int gateway9200_m4_pin_configs[8] = {
1349 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1350 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1351};
1352static unsigned int gateway9200_m4_2_pin_configs[8] = {
1353 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1354 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1355};
1356
1357/*
dfe495d0
TI		 1358 STAC 9200 pin configs for
1359 102801A8
1360 102801DE
1361 102801E8
1362*/
1363static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1364 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1365 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1366};
1367
1368/*
1369 STAC 9200 pin configs for
1370 102801C0
1371 102801C1
1372*/
1373static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1374 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1375 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1376};
1377
1378/*
1379 STAC 9200 pin configs for
1380 102801C4 (Dell Dimension E310)
1381 102801C5
1382 102801C7
1383 102801D9
1384 102801DA
1385 102801E3
1386*/
1387static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1388 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1389 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1390};
1391
1392
1393/*
1394 STAC 9200-32 pin configs for
1395 102801B5 (Dell Inspiron 630m)
1396 102801D8 (Dell Inspiron 640m)
1397*/
1398static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1399 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1400 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1401};
1402
1403/*
1404 STAC 9200-32 pin configs for
1405 102801C2 (Dell Latitude D620)
1406 102801C8
1407 102801CC (Dell Latitude D820)
1408 102801D4
1409 102801D6
1410*/
1411static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1412 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1413 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1414};
1415
1416/*
1417 STAC 9200-32 pin configs for
1418 102801CE (Dell XPS M1710)
1419 102801CF (Dell Precision M90)
1420*/
1421static unsigned int dell9200_m23_pin_configs[8] = {
1422 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1423 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1424};
1425
1426/*
1427 STAC 9200-32 pin configs for
1428 102801C9
1429 102801CA
1430 102801CB (Dell Latitude 120L)
1431 102801D3
1432*/
1433static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1434 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1435 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1436};
1437
1438/*
1439 STAC 9200-32 pin configs for
1440 102801BD (Dell Inspiron E1505n)
1441 102801EE
1442 102801EF
1443*/
1444static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1445 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1446 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1447};
1448
1449/*
1450 STAC 9200-32 pin configs for
1451 102801F5 (Dell Inspiron 1501)
1452 102801F6
1453*/
1454static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1455 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1456 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1457};
1458
1459/*
1460 STAC 9200-32
1461 102801CD (Dell Inspiron E1705/9400)
1462*/
1463static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1464 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1465 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1466};
1467
bf277785
TD		 1468static unsigned int oqo9200_pin_configs[8] = {
1469 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1470 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1471};
1472
dfe495d0 1473
f5fcc13c
TI		 1474static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1475 [STAC_REF] = ref9200_pin_configs,
bf277785 1476 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1477 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1478 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1479 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1480 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1481 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1482 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1483 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1484 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1485 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1486 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1487 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1488 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1489 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1490};
1491
f5fcc13c
TI		 1492static const char *stac9200_models[STAC_9200_MODELS] = {
1493 [STAC_REF] = "ref",
bf277785 1494 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1495 [STAC_9200_DELL_D21] = "dell-d21",
1496 [STAC_9200_DELL_D22] = "dell-d22",
1497 [STAC_9200_DELL_D23] = "dell-d23",
1498 [STAC_9200_DELL_M21] = "dell-m21",
1499 [STAC_9200_DELL_M22] = "dell-m22",
1500 [STAC_9200_DELL_M23] = "dell-m23",
1501 [STAC_9200_DELL_M24] = "dell-m24",
1502 [STAC_9200_DELL_M25] = "dell-m25",
1503 [STAC_9200_DELL_M26] = "dell-m26",
1504 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1505 [STAC_9200_M4] = "gateway-m4",
1506 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1507 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1508};
1509
1510static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1511 /* SigmaTel reference board */
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1513 "DFI LanParty", STAC_REF),
e7377071 1514 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1516 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1518 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1520 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1522 "unknown Dell", STAC_9200_DELL_D22),
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1524 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1526 "Dell Latitude D620", STAC_9200_DELL_M22),
1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1528 "unknown Dell", STAC_9200_DELL_D23),
1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1530 "unknown Dell", STAC_9200_DELL_D23),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1532 "unknown Dell", STAC_9200_DELL_M22),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1534 "unknown Dell", STAC_9200_DELL_M24),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1536 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1538 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1540 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1542 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1544 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1546 "Dell Precision M90", STAC_9200_DELL_M23),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1548 "unknown Dell", STAC_9200_DELL_M22),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1550 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1552 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1554 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1556 "unknown Dell", STAC_9200_DELL_D23),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1558 "unknown Dell", STAC_9200_DELL_D23),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1560 "unknown Dell", STAC_9200_DELL_D21),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1562 "unknown Dell", STAC_9200_DELL_D23),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1564 "unknown Dell", STAC_9200_DELL_D21),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1566 "unknown Dell", STAC_9200_DELL_M25),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1568 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1569 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1570 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1571 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1572 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1573 /* Panasonic */
117f257d 1574 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1575 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1576 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1577 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1578 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1579 /* OQO Mobile */
1580 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1581 {} /* terminator */
1582};
1583
8e21c34c
TD		 1584static unsigned int ref925x_pin_configs[8] = {
1585 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1586 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1587};
1588
9cb36c2a
MCC		 1589static unsigned int stac925xM1_pin_configs[8] = {
1590 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1591 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1592};
1593
9cb36c2a
MCC		 1594static unsigned int stac925xM1_2_pin_configs[8] = {
1595 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1596 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1597};
58eec423 1598
9cb36c2a
MCC		 1599static unsigned int stac925xM2_pin_configs[8] = {
1600 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1601 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1602};
1603
8e21c34c 1604static unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1605 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1606 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1607};
1608
9cb36c2a
MCC		 1609static unsigned int stac925xM3_pin_configs[8] = {
1610 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1611 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1612};
58eec423 1613
9cb36c2a
MCC		 1614static unsigned int stac925xM5_pin_configs[8] = {
1615 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1616 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1617};
1618
9cb36c2a
MCC		 1619static unsigned int stac925xM6_pin_configs[8] = {
1620 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1621 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1622};
1623
1624static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1625 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1626 [STAC_M1] = stac925xM1_pin_configs,
1627 [STAC_M1_2] = stac925xM1_2_pin_configs,
1628 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1629 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1630 [STAC_M3] = stac925xM3_pin_configs,
1631 [STAC_M5] = stac925xM5_pin_configs,
1632 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1633};
1634
1635static const char *stac925x_models[STAC_925x_MODELS] = {
1636 [STAC_REF] = "ref",
9cb36c2a
MCC		 1637 [STAC_M1] = "m1",
1638 [STAC_M1_2] = "m1-2",
1639 [STAC_M2] = "m2",
8e21c34c 1640 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1641 [STAC_M3] = "m3",
1642 [STAC_M5] = "m5",
1643 [STAC_M6] = "m6",
8e21c34c
TD		 1644};
1645
9cb36c2a 1646static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1647 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1648 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1649 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1650 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1651 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1652 /* Not sure about the brand name for those */
1653 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1654 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1655 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1656 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1657 {} /* terminator */
8e21c34c
TD		 1658};
1659
1660static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1661 /* SigmaTel reference board */
1662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1663 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1664
1665 /* Default table for unknown ID */
1666 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1667
8e21c34c
TD		 1668 {} /* terminator */
1669};
1670
a7662640 1671static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1672 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1673 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1674 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1675 0x01452050,
1676};
1677
1678static unsigned int dell_m6_pin_configs[13] = {
1679 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1680 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1681 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1682 0x4f0000f0,
e1f0d669
MR		 1683};
1684
1685static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1686 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1687 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1688 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1689 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1690 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1691};
1692
1693static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1694 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1695 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1696 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1697 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1698 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1699 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1700};
1701
1702static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1703 /* SigmaTel reference board */
1704 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1705 "DFI LanParty", STAC_92HD73XX_REF),
1706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1707 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1709 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1711 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1713 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1715 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1717 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1719 "unknown Dell", STAC_DELL_M6_DMIC),
1720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1721 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1723 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1725 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1726 {} /* terminator */
1727};
1728
d0513fc6
MR		 1729static unsigned int ref92hd83xxx_pin_configs[14] = {
1730 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1731 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1732 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1733 0x01451160, 0x98560170,
1734};
1735
1736static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1737 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1738 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
d0513fc6
MR		 1739};
1740
1741static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1742 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1743 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
d0513fc6
MR		 1744};
1745
1746static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1747 /* SigmaTel reference board */
1748 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1749 "DFI LanParty", STAC_92HD83XXX_REF),
574f3c4f 1750 {} /* terminator */
d0513fc6
MR		 1751};
1752
0ffa9807 1753static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1754 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1755 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1756 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1757};
1758
0ffa9807 1759static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1760 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1761 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1762 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1763};
1764
0ffa9807 1765static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1766 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1767 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1768 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1769};
1770
3a7abfd2
MR		 1771static unsigned int dell_m4_3_pin_configs[11] = {
1772 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1773 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1774 0x40f000f0, 0x044413b0, 0x044413b0,
1775};
1776
e035b841
MR		 1777static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1778 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1779 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1780 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1781 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1782 [STAC_HP_M4] = NULL,
1b0652eb 1783 [STAC_HP_DV5] = NULL,
e035b841
MR		 1784};
1785
1786static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1787 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1788 [STAC_DELL_M4_1] = "dell-m4-1",
1789 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1790 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1791 [STAC_HP_M4] = "hp-m4",
1b0652eb 1792 [STAC_HP_DV5] = "hp-dv5",
e035b841
MR		 1793};
1794
1795static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1796 /* SigmaTel reference board */
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1798 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1800 "HP dv5", STAC_HP_M4),
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
92258a3e 1802 "HP dv7", STAC_HP_DV5),
e0c0e943
TI		 1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
1804 "HP dv4", STAC_HP_DV5),
69dfaefe
TI		 1805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
1806 "HP dv7", STAC_HP_M4),
42de55cb
TI		 1807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3600,
1808 "HP dv5", STAC_HP_DV5),
dafb70ce 1809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
1b0652eb 1810 "HP dv5", STAC_HP_DV5),
9a9e2359
MR		 1811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1812 "unknown HP", STAC_HP_M4),
a7662640
MR		 1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1814 "unknown Dell", STAC_DELL_M4_1),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1816 "unknown Dell", STAC_DELL_M4_1),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1818 "unknown Dell", STAC_DELL_M4_1),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1820 "unknown Dell", STAC_DELL_M4_1),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1822 "unknown Dell", STAC_DELL_M4_1),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1824 "unknown Dell", STAC_DELL_M4_1),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1826 "unknown Dell", STAC_DELL_M4_1),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1828 "unknown Dell", STAC_DELL_M4_2),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1830 "unknown Dell", STAC_DELL_M4_2),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1832 "unknown Dell", STAC_DELL_M4_2),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1834 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1836 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1837 {} /* terminator */
1838};
1839
403d1944
MP		 1840static unsigned int ref922x_pin_configs[10] = {
1841 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1842 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1843 0x40000100, 0x40000100,
1844};
1845
dfe495d0
TI		 1846/*
1847 STAC 922X pin configs for
1848 102801A7
1849 102801AB
1850 102801A9
1851 102801D1
1852 102801D2
1853*/
1854static unsigned int dell_922x_d81_pin_configs[10] = {
1855 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1856 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1857 0x01813122, 0x400001f2,
1858};
1859
1860/*
1861 STAC 922X pin configs for
1862 102801AC
1863 102801D0
1864*/
1865static unsigned int dell_922x_d82_pin_configs[10] = {
1866 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1867 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1868 0x01813122, 0x400001f1,
1869};
1870
1871/*
1872 STAC 922X pin configs for
1873 102801BF
1874*/
1875static unsigned int dell_922x_m81_pin_configs[10] = {
1876 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1877 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1878 0x40C003f1, 0x405003f0,
1879};
1880
1881/*
1882 STAC 9221 A1 pin configs for
1883 102801D7 (Dell XPS M1210)
1884*/
1885static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1886 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1887 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1888 0x508003f3, 0x405003f4,
1889};
1890
403d1944 1891static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1892 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1893 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1894 0x02a19120, 0x40000100,
1895};
1896
1897static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1898 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1899 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1900 0x02a19320, 0x40000100,
1901};
1902
5d5d3bc3
IZ		 1903static unsigned int intel_mac_v1_pin_configs[10] = {
1904 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1905 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1906 0x400000fc, 0x400000fb,
1907};
1908
1909static unsigned int intel_mac_v2_pin_configs[10] = {
1910 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1911 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1912 0x400000fc, 0x400000fb,
6f0778d8
NB		 1913};
1914
5d5d3bc3
IZ		 1915static unsigned int intel_mac_v3_pin_configs[10] = {
1916 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1917 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1918 0x400000fc, 0x400000fb,
1919};
1920
5d5d3bc3
IZ		 1921static unsigned int intel_mac_v4_pin_configs[10] = {
1922 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1923 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1924 0x400000fc, 0x400000fb,
1925};
1926
5d5d3bc3
IZ		 1927static unsigned int intel_mac_v5_pin_configs[10] = {
1928 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1929 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1930 0x400000fc, 0x400000fb,
0dae0f83
TI		 1931};
1932
8c650087
MCC		 1933static unsigned int ecs202_pin_configs[10] = {
1934 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1935 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1936 0x9037012e, 0x40e000f2,
1937};
76c08828 1938
19039bd0 1939static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1940 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1941 [STAC_D945GTP3] = d945gtp3_pin_configs,
1942 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1943 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1944 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1945 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1946 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1947 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1948 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1949 /* for backward compatibility */
5d5d3bc3
IZ		 1950 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1951 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1952 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1953 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1954 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1955 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1956 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1957 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1958 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1959 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1960 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1961};
1962
f5fcc13c
TI		 1963static const char *stac922x_models[STAC_922X_MODELS] = {
1964 [STAC_D945_REF] = "ref",
1965 [STAC_D945GTP5] = "5stack",
1966 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1967 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1968 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1969 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1970 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1971 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1972 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1973 /* for backward compatibility */
f5fcc13c 1974 [STAC_MACMINI] = "macmini",
3fc24d85 1975 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1976 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1977 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1978 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1979 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1980 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1981 [STAC_922X_DELL_D81] = "dell-d81",
1982 [STAC_922X_DELL_D82] = "dell-d82",
1983 [STAC_922X_DELL_M81] = "dell-m81",
1984 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1985};
1986
1987static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1988 /* SigmaTel reference board */
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1990 "DFI LanParty", STAC_D945_REF),
1991 /* Intel 945G based systems */
1992 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1993 "Intel D945G", STAC_D945GTP3),
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1995 "Intel D945G", STAC_D945GTP3),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1997 "Intel D945G", STAC_D945GTP3),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1999 "Intel D945G", STAC_D945GTP3),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2001 "Intel D945G", STAC_D945GTP3),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2003 "Intel D945G", STAC_D945GTP3),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2005 "Intel D945G", STAC_D945GTP3),
2006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2007 "Intel D945G", STAC_D945GTP3),
2008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2009 "Intel D945G", STAC_D945GTP3),
2010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2011 "Intel D945G", STAC_D945GTP3),
2012 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2013 "Intel D945G", STAC_D945GTP3),
2014 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2015 "Intel D945G", STAC_D945GTP3),
2016 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2017 "Intel D945G", STAC_D945GTP3),
2018 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2019 "Intel D945G", STAC_D945GTP3),
2020 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2021 "Intel D945G", STAC_D945GTP3),
2022 /* Intel D945G 5-stack systems */
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2024 "Intel D945G", STAC_D945GTP5),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2026 "Intel D945G", STAC_D945GTP5),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2028 "Intel D945G", STAC_D945GTP5),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2030 "Intel D945G", STAC_D945GTP5),
2031 /* Intel 945P based systems */
2032 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2033 "Intel D945P", STAC_D945GTP3),
2034 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2035 "Intel D945P", STAC_D945GTP3),
2036 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2037 "Intel D945P", STAC_D945GTP3),
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2039 "Intel D945P", STAC_D945GTP3),
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2041 "Intel D945P", STAC_D945GTP3),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2043 "Intel D945P", STAC_D945GTP5),
2044 /* other systems */
536319af 2045 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2046 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2047 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2048 /* Dell systems */
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2050 "unknown Dell", STAC_922X_DELL_D81),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2052 "unknown Dell", STAC_922X_DELL_D81),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2054 "unknown Dell", STAC_922X_DELL_D81),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2056 "unknown Dell", STAC_922X_DELL_D82),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2058 "unknown Dell", STAC_922X_DELL_M81),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2060 "unknown Dell", STAC_922X_DELL_D82),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2062 "unknown Dell", STAC_922X_DELL_D81),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2064 "unknown Dell", STAC_922X_DELL_D81),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2066 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 2067 /* ECS/PC Chips boards */
2068 SND_PCI_QUIRK(0x1019, 0x2144,
2069 "ECS/PC chips", STAC_ECS_202),
2070 SND_PCI_QUIRK(0x1019, 0x2608,
2071 "ECS/PC chips", STAC_ECS_202),
2072 SND_PCI_QUIRK(0x1019, 0x2633,
2073 "ECS/PC chips P17G/1333", STAC_ECS_202),
2074 SND_PCI_QUIRK(0x1019, 0x2811,
2075 "ECS/PC chips", STAC_ECS_202),
2076 SND_PCI_QUIRK(0x1019, 0x2812,
2077 "ECS/PC chips", STAC_ECS_202),
2078 SND_PCI_QUIRK(0x1019, 0x2813,
2079 "ECS/PC chips", STAC_ECS_202),
2080 SND_PCI_QUIRK(0x1019, 0x2814,
2081 "ECS/PC chips", STAC_ECS_202),
2082 SND_PCI_QUIRK(0x1019, 0x2815,
2083 "ECS/PC chips", STAC_ECS_202),
2084 SND_PCI_QUIRK(0x1019, 0x2816,
2085 "ECS/PC chips", STAC_ECS_202),
2086 SND_PCI_QUIRK(0x1019, 0x2817,
2087 "ECS/PC chips", STAC_ECS_202),
2088 SND_PCI_QUIRK(0x1019, 0x2818,
2089 "ECS/PC chips", STAC_ECS_202),
2090 SND_PCI_QUIRK(0x1019, 0x2819,
2091 "ECS/PC chips", STAC_ECS_202),
2092 SND_PCI_QUIRK(0x1019, 0x2820,
2093 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2094 {} /* terminator */
2095};
2096
3cc08dc6 2097static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2098 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2099 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2100 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2101 0x01c42190, 0x40000100,
3cc08dc6
MP		 2102};
2103
93ed1503 2104static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2105 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2106 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2107 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2108 0x40000100, 0x40000100
2109};
2110
93ed1503
TD		 2111static unsigned int d965_5st_pin_configs[14] = {
2112 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2113 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2114 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2115 0x40000100, 0x40000100
2116};
2117
4ff076e5
TD		 2118static unsigned int dell_3st_pin_configs[14] = {
2119 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2120 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2121 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2122 0x40c003fc, 0x40000100
2123};
2124
93ed1503 2125static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2126 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2127 [STAC_D965_REF] = ref927x_pin_configs,
2128 [STAC_D965_3ST] = d965_3st_pin_configs,
2129 [STAC_D965_5ST] = d965_5st_pin_configs,
2130 [STAC_DELL_3ST] = dell_3st_pin_configs,
2131 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2132};
2133
f5fcc13c 2134static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2135 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2136 [STAC_D965_REF] = "ref",
2137 [STAC_D965_3ST] = "3stack",
2138 [STAC_D965_5ST] = "5stack",
2139 [STAC_DELL_3ST] = "dell-3stack",
2140 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2141};
2142
2143static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2144 /* SigmaTel reference board */
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2146 "DFI LanParty", STAC_D965_REF),
81d3dbde 2147 /* Intel 946 based systems */
f5fcc13c
TI		 2148 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2150 /* 965 based 3 stack systems */
f5fcc13c
TI		 2151 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2160 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2164 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2165 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2167 /* Dell 3 stack systems */
8e9068b1 2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2172 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2181 /* 965 based 5 stack systems */
f5fcc13c
TI		 2182 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2183 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2184 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2186 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2188 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2190 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2191 {} /* terminator */
2192};
2193
f3302a59
MP		 2194static unsigned int ref9205_pin_configs[12] = {
2195 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2196 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2197 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2198};
2199
dfe495d0
TI		 2200/*
2201 STAC 9205 pin configs for
2202 102801F1
2203 102801F2
2204 102801FC
2205 102801FD
2206 10280204
2207 1028021F
3fa2ef74 2208 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2209*/
2210static unsigned int dell_9205_m42_pin_configs[12] = {
2211 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2212 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2213 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2214};
2215
2216/*
2217 STAC 9205 pin configs for
2218 102801F9
2219 102801FA
2220 102801FE
2221 102801FF (Dell Precision M4300)
2222 10280206
2223 10280200
2224 10280201
2225*/
2226static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2227 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2228 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2229 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2230};
2231
dfe495d0 2232static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2233 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2234 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2235 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2236};
2237
f5fcc13c 2238static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2239 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2240 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2241 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2242 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2243};
2244
f5fcc13c
TI		 2245static const char *stac9205_models[STAC_9205_MODELS] = {
2246 [STAC_9205_REF] = "ref",
dfe495d0 2247 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2248 [STAC_9205_DELL_M43] = "dell-m43",
2249 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2250};
2251
2252static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2253 /* SigmaTel reference board */
2254 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2255 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2256 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2257 "unknown Dell", STAC_9205_DELL_M42),
2258 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2259 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2261 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2263 "Dell Precision", STAC_9205_DELL_M43),
2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2265 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2267 "unknown Dell", STAC_9205_DELL_M42),
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2269 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2271 "Dell Precision", STAC_9205_DELL_M43),
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2273 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2275 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2277 "Dell Precision", STAC_9205_DELL_M43),
2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2279 "Dell Precision", STAC_9205_DELL_M43),
2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2281 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2283 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2285 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2286 {} /* terminator */
2287};
2288
11b44bbd
RF		 2289static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2290{
2291 int i;
2292 struct sigmatel_spec *spec = codec->spec;
2293
af9f341a
TI		 2294 kfree(spec->pin_configs);
2295 spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
2296 GFP_KERNEL);
2297 if (!spec->pin_configs)
2298 return -ENOMEM;
11b44bbd
RF		 2299
2300 for (i = 0; i < spec->num_pins; i++) {
2301 hda_nid_t nid = spec->pin_nids[i];
2302 unsigned int pin_cfg;
2303
2304 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2305 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2306 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2307 nid, pin_cfg);
af9f341a 2308 spec->pin_configs[i] = pin_cfg;
11b44bbd
RF		 2309 }
2310
2311 return 0;
2312}
2313
87d48363
MR		 2314static void stac92xx_set_config_reg(struct hda_codec *codec,
2315 hda_nid_t pin_nid, unsigned int pin_config)
2316{
2317 int i;
2318 snd_hda_codec_write(codec, pin_nid, 0,
2319 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2320 pin_config & 0x000000ff);
2321 snd_hda_codec_write(codec, pin_nid, 0,
2322 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2323 (pin_config & 0x0000ff00) >> 8);
2324 snd_hda_codec_write(codec, pin_nid, 0,
2325 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2326 (pin_config & 0x00ff0000) >> 16);
2327 snd_hda_codec_write(codec, pin_nid, 0,
2328 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2329 pin_config >> 24);
2330 i = snd_hda_codec_read(codec, pin_nid, 0,
2331 AC_VERB_GET_CONFIG_DEFAULT,
2332 0x00);
2333 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2334 pin_nid, i);
2335}
2336
2f2f4251
M		 2337static void stac92xx_set_config_regs(struct hda_codec *codec)
2338{
2339 int i;
2340 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2341
87d48363
MR		 2342 if (!spec->pin_configs)
2343 return;
11b44bbd 2344
87d48363
MR		 2345 for (i = 0; i < spec->num_pins; i++)
2346 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2347 spec->pin_configs[i]);
2f2f4251 2348}
2f2f4251 2349
af9f341a
TI		 2350static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
2351{
2352 struct sigmatel_spec *spec = codec->spec;
2353
2354 if (!pins)
2355 return stac92xx_save_bios_config_regs(codec);
2356
2357 kfree(spec->pin_configs);
2358 spec->pin_configs = kmemdup(pins,
2359 spec->num_pins * sizeof(*pins),
2360 GFP_KERNEL);
2361 if (!spec->pin_configs)
2362 return -ENOMEM;
2363
2364 stac92xx_set_config_regs(codec);
2365 return 0;
2366}
2367
2368static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
2369 unsigned int cfg)
2370{
2371 struct sigmatel_spec *spec = codec->spec;
2372 int i;
2373
2374 for (i = 0; i < spec->num_pins; i++) {
2375 if (spec->pin_nids[i] == nid) {
2376 spec->pin_configs[i] = cfg;
2377 stac92xx_set_config_reg(codec, nid, cfg);
2378 break;
2379 }
2380 }
2381}
2382
dabbed6f 2383/*
c7d4b2fa 2384 * Analog playback callbacks
dabbed6f 2385 */
c7d4b2fa
M		 2386static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2387 struct hda_codec *codec,
c8b6bf9b 2388 struct snd_pcm_substream *substream)
2f2f4251 2389{
dabbed6f 2390 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2391 if (spec->stream_delay)
2392 msleep(spec->stream_delay);
9a08160b
TI		 2393 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2394 hinfo);
2f2f4251
M		 2395}
2396
2f2f4251
M		 2397static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2398 struct hda_codec *codec,
2399 unsigned int stream_tag,
2400 unsigned int format,
c8b6bf9b 2401 struct snd_pcm_substream *substream)
2f2f4251
M		 2402{
2403 struct sigmatel_spec *spec = codec->spec;
403d1944 2404 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2405}
2406
2407static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2408 struct hda_codec *codec,
c8b6bf9b 2409 struct snd_pcm_substream *substream)
2f2f4251
M		 2410{
2411 struct sigmatel_spec *spec = codec->spec;
2412 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2413}
2414
dabbed6f
M		 2415/*
2416 * Digital playback callbacks
2417 */
2418static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2419 struct hda_codec *codec,
c8b6bf9b 2420 struct snd_pcm_substream *substream)
dabbed6f
M		 2421{
2422 struct sigmatel_spec *spec = codec->spec;
2423 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2424}
2425
2426static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2427 struct hda_codec *codec,
c8b6bf9b 2428 struct snd_pcm_substream *substream)
dabbed6f
M		 2429{
2430 struct sigmatel_spec *spec = codec->spec;
2431 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2432}
2433
6b97eb45
TI		 2434static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2435 struct hda_codec *codec,
2436 unsigned int stream_tag,
2437 unsigned int format,
2438 struct snd_pcm_substream *substream)
2439{
2440 struct sigmatel_spec *spec = codec->spec;
2441 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2442 stream_tag, format, substream);
2443}
2444
9411e21c
TI		 2445static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2446 struct hda_codec *codec,
2447 struct snd_pcm_substream *substream)
2448{
2449 struct sigmatel_spec *spec = codec->spec;
2450 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2451}
2452
dabbed6f 2453
2f2f4251
M		 2454/*
2455 * Analog capture callbacks
2456 */
2457static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2458 struct hda_codec *codec,
2459 unsigned int stream_tag,
2460 unsigned int format,
c8b6bf9b 2461 struct snd_pcm_substream *substream)
2f2f4251
M		 2462{
2463 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2464 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2465
8daaaa97
MR		 2466 if (spec->powerdown_adcs) {
2467 msleep(40);
8c2f767b 2468 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2469 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2470 }
2471 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2472 return 0;
2473}
2474
2475static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2476 struct hda_codec *codec,
c8b6bf9b 2477 struct snd_pcm_substream *substream)
2f2f4251
M		 2478{
2479 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2480 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2481
8daaaa97
MR		 2482 snd_hda_codec_cleanup_stream(codec, nid);
2483 if (spec->powerdown_adcs)
8c2f767b 2484 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2485 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2486 return 0;
2487}
2488
dabbed6f
M		 2489static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2490 .substreams = 1,
2491 .channels_min = 2,
2492 .channels_max = 2,
2493 /* NID is set in stac92xx_build_pcms */
2494 .ops = {
2495 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2496 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2497 .prepare = stac92xx_dig_playback_pcm_prepare,
2498 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2499 },
2500};
2501
2502static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2503 .substreams = 1,
2504 .channels_min = 2,
2505 .channels_max = 2,
2506 /* NID is set in stac92xx_build_pcms */
2507};
2508
2f2f4251
M		 2509static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2510 .substreams = 1,
2511 .channels_min = 2,
c7d4b2fa 2512 .channels_max = 8,
2f2f4251
M		 2513 .nid = 0x02, /* NID to query formats and rates */
2514 .ops = {
2515 .open = stac92xx_playback_pcm_open,
2516 .prepare = stac92xx_playback_pcm_prepare,
2517 .cleanup = stac92xx_playback_pcm_cleanup
2518 },
2519};
2520
3cc08dc6
MP		 2521static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2522 .substreams = 1,
2523 .channels_min = 2,
2524 .channels_max = 2,
2525 .nid = 0x06, /* NID to query formats and rates */
2526 .ops = {
2527 .open = stac92xx_playback_pcm_open,
2528 .prepare = stac92xx_playback_pcm_prepare,
2529 .cleanup = stac92xx_playback_pcm_cleanup
2530 },
2531};
2532
2f2f4251 2533static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2534 .channels_min = 2,
2535 .channels_max = 2,
9e05b7a3 2536 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2537 .ops = {
2538 .prepare = stac92xx_capture_pcm_prepare,
2539 .cleanup = stac92xx_capture_pcm_cleanup
2540 },
2541};
2542
2543static int stac92xx_build_pcms(struct hda_codec *codec)
2544{
2545 struct sigmatel_spec *spec = codec->spec;
2546 struct hda_pcm *info = spec->pcm_rec;
2547
2548 codec->num_pcms = 1;
2549 codec->pcm_info = info;
2550
c7d4b2fa 2551 info->name = "STAC92xx Analog";
2f2f4251 2552 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2553 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2554 spec->multiout.dac_nids[0];
2f2f4251 2555 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2556 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2557 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2558
2559 if (spec->alt_switch) {
2560 codec->num_pcms++;
2561 info++;
2562 info->name = "STAC92xx Analog Alt";
2563 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2564 }
2f2f4251 2565
dabbed6f
M		 2566 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2567 codec->num_pcms++;
2568 info++;
2569 info->name = "STAC92xx Digital";
7ba72ba1 2570 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2571 if (spec->multiout.dig_out_nid) {
2572 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2573 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2574 }
2575 if (spec->dig_in_nid) {
2576 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2577 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2578 }
2579 }
2580
2f2f4251
M		 2581 return 0;
2582}
2583
c960a03b
TI		 2584static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2585{
2586 unsigned int pincap = snd_hda_param_read(codec, nid,
2587 AC_PAR_PIN_CAP);
2588 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2589 if (pincap & AC_PINCAP_VREF_100)
2590 return AC_PINCTL_VREF_100;
2591 if (pincap & AC_PINCAP_VREF_80)
2592 return AC_PINCTL_VREF_80;
2593 if (pincap & AC_PINCAP_VREF_50)
2594 return AC_PINCTL_VREF_50;
2595 if (pincap & AC_PINCAP_VREF_GRD)
2596 return AC_PINCTL_VREF_GRD;
2597 return 0;
2598}
2599
403d1944
MP		 2600static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2601
2602{
82beb8fd
TI		 2603 snd_hda_codec_write_cache(codec, nid, 0,
2604 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2605}
2606
7c2ba97b
MR		 2607#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2608
2609static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2610 struct snd_ctl_elem_value *ucontrol)
2611{
2612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2613 struct sigmatel_spec *spec = codec->spec;
2614
d7a89436 2615 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2616 return 0;
2617}
2618
c6e4c666
TI		 2619static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
2620 unsigned char type);
2621
7c2ba97b
MR		 2622static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2623 struct snd_ctl_elem_value *ucontrol)
2624{
2625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2626 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2627 int nid = kcontrol->private_value;
2628
2629 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2630
2631 /* check to be sure that the ports are upto date with
2632 * switch changes
2633 */
c6e4c666 2634 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
7c2ba97b
MR		 2635
2636 return 1;
2637}
2638
a5ce8890 2639#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2640
2641static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2642{
2643 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2644 struct sigmatel_spec *spec = codec->spec;
2645 int io_idx = kcontrol-> private_value & 0xff;
2646
2647 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2648 return 0;
2649}
2650
2651static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2652{
2653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2654 struct sigmatel_spec *spec = codec->spec;
2655 hda_nid_t nid = kcontrol->private_value >> 8;
2656 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2657 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2658
2659 spec->io_switch[io_idx] = val;
2660
2661 if (val)
2662 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2663 else {
2664 unsigned int pinctl = AC_PINCTL_IN_EN;
2665 if (io_idx) /* set VREF for mic */
2666 pinctl |= stac92xx_get_vref(codec, nid);
2667 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2668 }
40c1d308
JZ		 2669
2670 /* check the auto-mute again: we need to mute/unmute the speaker
2671 * appropriately according to the pin direction
2672 */
2673 if (spec->hp_detect)
c6e4c666 2674 stac_issue_unsol_event(codec, nid, STAC_HP_EVENT);
40c1d308 2675
403d1944
MP		 2676 return 1;
2677}
2678
0fb87bb4
ML		 2679#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2680
2681static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2682 struct snd_ctl_elem_value *ucontrol)
2683{
2684 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2685 struct sigmatel_spec *spec = codec->spec;
2686
2687 ucontrol->value.integer.value[0] = spec->clfe_swap;
2688 return 0;
2689}
2690
2691static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2692 struct snd_ctl_elem_value *ucontrol)
2693{
2694 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2695 struct sigmatel_spec *spec = codec->spec;
2696 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2697 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2698
68ea7b2f 2699 if (spec->clfe_swap == val)
0fb87bb4
ML		 2700 return 0;
2701
68ea7b2f 2702 spec->clfe_swap = val;
0fb87bb4
ML		 2703
2704 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2705 spec->clfe_swap ? 0x4 : 0x0);
2706
2707 return 1;
2708}
2709
7c2ba97b
MR		 2710#define STAC_CODEC_HP_SWITCH(xname) \
2711 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2712 .name = xname, \
2713 .index = 0, \
2714 .info = stac92xx_hp_switch_info, \
2715 .get = stac92xx_hp_switch_get, \
2716 .put = stac92xx_hp_switch_put, \
2717 }
2718
403d1944
MP		 2719#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2720 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2721 .name = xname, \
2722 .index = 0, \
2723 .info = stac92xx_io_switch_info, \
2724 .get = stac92xx_io_switch_get, \
2725 .put = stac92xx_io_switch_put, \
2726 .private_value = xpval, \
2727 }
2728
0fb87bb4
ML		 2729#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2730 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2731 .name = xname, \
2732 .index = 0, \
2733 .info = stac92xx_clfe_switch_info, \
2734 .get = stac92xx_clfe_switch_get, \
2735 .put = stac92xx_clfe_switch_put, \
2736 .private_value = xpval, \
2737 }
403d1944 2738
c7d4b2fa
M		 2739enum {
2740 STAC_CTL_WIDGET_VOL,
2741 STAC_CTL_WIDGET_MUTE,
09a99959 2742 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2743 STAC_CTL_WIDGET_AMP_MUX,
2744 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2745 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2746 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2747 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2748};
2749
c8b6bf9b 2750static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2751 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2752 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2753 STAC_MONO_MUX,
89385035
MR		 2754 STAC_AMP_MUX,
2755 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2756 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2757 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2758 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2759};
2760
2761/* add dynamic controls */
4d4e9bb3
TI		 2762static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2763 struct snd_kcontrol_new *ktemp,
2764 int idx, const char *name,
2765 unsigned long val)
c7d4b2fa 2766{
c8b6bf9b 2767 struct snd_kcontrol_new *knew;
c7d4b2fa 2768
603c4019
TI		 2769 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2770 knew = snd_array_new(&spec->kctls);
2771 if (!knew)
2772 return -ENOMEM;
4d4e9bb3 2773 *knew = *ktemp;
4682eee0 2774 knew->index = idx;
82fe0c58 2775 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2776 if (!knew->name)
c7d4b2fa
M		 2777 return -ENOMEM;
2778 knew->private_value = val;
c7d4b2fa
M		 2779 return 0;
2780}
2781
4d4e9bb3
TI		 2782static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2783 int type, int idx, const char *name,
2784 unsigned long val)
2785{
2786 return stac92xx_add_control_temp(spec,
2787 &stac92xx_control_templates[type],
2788 idx, name, val);
2789}
2790
4682eee0
MR		 2791
2792/* add dynamic controls */
4d4e9bb3
TI		 2793static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2794 const char *name, unsigned long val)
4682eee0
MR		 2795{
2796 return stac92xx_add_control_idx(spec, type, 0, name, val);
2797}
2798
c21ca4a8
TI		 2799/* check whether the line-input can be used as line-out */
2800static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2801{
2802 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2803 struct auto_pin_cfg *cfg = &spec->autocfg;
2804 hda_nid_t nid;
2805 unsigned int pincap;
8e9068b1 2806
c21ca4a8
TI		 2807 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2808 return 0;
2809 nid = cfg->input_pins[AUTO_PIN_LINE];
2810 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2811 if (pincap & AC_PINCAP_OUT)
2812 return nid;
2813 return 0;
2814}
403d1944 2815
c21ca4a8
TI		 2816/* check whether the mic-input can be used as line-out */
2817static hda_nid_t check_mic_out_switch(struct hda_codec *codec)
2818{
2819 struct sigmatel_spec *spec = codec->spec;
2820 struct auto_pin_cfg *cfg = &spec->autocfg;
2821 unsigned int def_conf, pincap;
2822 unsigned int mic_pin;
2823
2824 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2825 return 0;
2826 mic_pin = AUTO_PIN_MIC;
2827 for (;;) {
2828 hda_nid_t nid = cfg->input_pins[mic_pin];
2829 def_conf = snd_hda_codec_read(codec, nid, 0,
2830 AC_VERB_GET_CONFIG_DEFAULT, 0);
2831 /* some laptops have an internal analog microphone
2832 * which can't be used as a output */
2833 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2834 pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
2835 if (pincap & AC_PINCAP_OUT)
2836 return nid;
403d1944 2837 }
c21ca4a8
TI		 2838 if (mic_pin == AUTO_PIN_MIC)
2839 mic_pin = AUTO_PIN_FRONT_MIC;
2840 else
2841 break;
403d1944 2842 }
403d1944
MP		 2843 return 0;
2844}
2845
7b043899
SL		 2846static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2847{
2848 int i;
2849
2850 for (i = 0; i < spec->multiout.num_dacs; i++) {
2851 if (spec->multiout.dac_nids[i] == nid)
2852 return 1;
2853 }
2854
2855 return 0;
2856}
2857
c21ca4a8
TI		 2858static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2859{
2860 int i;
2861 if (is_in_dac_nids(spec, nid))
2862 return 1;
2863 for (i = 0; i < spec->autocfg.hp_outs; i++)
2864 if (spec->hp_dacs[i] == nid)
2865 return 1;
2866 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2867 if (spec->speaker_dacs[i] == nid)
2868 return 1;
2869 return 0;
2870}
2871
2872static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2873{
2874 struct sigmatel_spec *spec = codec->spec;
2875 int j, conn_len;
2876 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2877 unsigned int wcaps, wtype;
2878
2879 conn_len = snd_hda_get_connections(codec, nid, conn,
2880 HDA_MAX_CONNECTIONS);
2881 for (j = 0; j < conn_len; j++) {
2882 wcaps = snd_hda_param_read(codec, conn[j],
2883 AC_PAR_AUDIO_WIDGET_CAP);
2884 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2885 /* we check only analog outputs */
2886 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2887 continue;
2888 /* if this route has a free DAC, assign it */
2889 if (!check_all_dac_nids(spec, conn[j])) {
2890 if (conn_len > 1) {
2891 /* select this DAC in the pin's input mux */
2892 snd_hda_codec_write_cache(codec, nid, 0,
2893 AC_VERB_SET_CONNECT_SEL, j);
2894 }
2895 return conn[j];
2896 }
2897 }
2898 return 0;
2899}
2900
2901static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2902static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
2903
3cc08dc6 2904/*
7b043899
SL		 2905 * Fill in the dac_nids table from the parsed pin configuration
2906 * This function only works when every pin in line_out_pins[]
2907 * contains atleast one DAC in its connection list. Some 92xx
2908 * codecs are not connected directly to a DAC, such as the 9200
2909 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2910 */
c21ca4a8 2911static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 2912{
2913 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2914 struct auto_pin_cfg *cfg = &spec->autocfg;
2915 int i;
2916 hda_nid_t nid, dac;
7b043899 2917
c7d4b2fa
M		 2918 for (i = 0; i < cfg->line_outs; i++) {
2919 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 2920 dac = get_unassigned_dac(codec, nid);
2921 if (!dac) {
df802952
TI		 2922 if (spec->multiout.num_dacs > 0) {
2923 /* we have already working output pins,
2924 * so let's drop the broken ones again
2925 */
2926 cfg->line_outs = spec->multiout.num_dacs;
2927 break;
2928 }
7b043899
SL		 2929 /* error out, no available DAC found */
2930 snd_printk(KERN_ERR
2931 "%s: No available DAC for pin 0x%x\n",
2932 __func__, nid);
2933 return -ENODEV;
2934 }
c21ca4a8
TI		 2935 add_spec_dacs(spec, dac);
2936 }
7b043899 2937
c21ca4a8
TI		 2938 /* add line-in as output */
2939 nid = check_line_out_switch(codec);
2940 if (nid) {
2941 dac = get_unassigned_dac(codec, nid);
2942 if (dac) {
2943 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
2944 nid, cfg->line_outs);
2945 cfg->line_out_pins[cfg->line_outs] = nid;
2946 cfg->line_outs++;
2947 spec->line_switch = nid;
2948 add_spec_dacs(spec, dac);
2949 }
2950 }
2951 /* add mic as output */
2952 nid = check_mic_out_switch(codec);
2953 if (nid) {
2954 dac = get_unassigned_dac(codec, nid);
2955 if (dac) {
2956 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
2957 nid, cfg->line_outs);
2958 cfg->line_out_pins[cfg->line_outs] = nid;
2959 cfg->line_outs++;
2960 spec->mic_switch = nid;
2961 add_spec_dacs(spec, dac);
2962 }
2963 }
c7d4b2fa 2964
c21ca4a8
TI		 2965 for (i = 0; i < cfg->hp_outs; i++) {
2966 nid = cfg->hp_pins[i];
2967 dac = get_unassigned_dac(codec, nid);
2968 if (dac) {
2969 if (!spec->multiout.hp_nid)
2970 spec->multiout.hp_nid = dac;
2971 else
2972 add_spec_extra_dacs(spec, dac);
7b043899 2973 }
c21ca4a8
TI		 2974 spec->hp_dacs[i] = dac;
2975 }
2976
2977 for (i = 0; i < cfg->speaker_outs; i++) {
2978 nid = cfg->speaker_pins[i];
2979 dac = get_unassigned_dac(codec, nid);
2980 if (dac)
2981 add_spec_extra_dacs(spec, dac);
2982 spec->speaker_dacs[i] = dac;
7b043899 2983 }
c7d4b2fa 2984
c21ca4a8 2985 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 2986 spec->multiout.num_dacs,
2987 spec->multiout.dac_nids[0],
2988 spec->multiout.dac_nids[1],
2989 spec->multiout.dac_nids[2],
2990 spec->multiout.dac_nids[3],
2991 spec->multiout.dac_nids[4]);
c21ca4a8 2992
c7d4b2fa
M		 2993 return 0;
2994}
2995
eb06ed8f
TI		 2996/* create volume control/switch for the given prefx type */
2997static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2998{
2999 char name[32];
3000 int err;
3001
3002 sprintf(name, "%s Playback Volume", pfx);
3003 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
3004 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3005 if (err < 0)
3006 return err;
3007 sprintf(name, "%s Playback Switch", pfx);
3008 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
3009 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3010 if (err < 0)
3011 return err;
3012 return 0;
3013}
3014
ae0afd81
MR		 3015static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3016{
c21ca4a8 3017 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3018 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3019 return 1;
3020 } else {
3021 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
3022 spec->multiout.num_dacs++;
3023 }
3024 return 0;
3025}
3026
c21ca4a8 3027static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3028{
c21ca4a8
TI		 3029 int i;
3030 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3031 if (!spec->multiout.extra_out_nid[i]) {
3032 spec->multiout.extra_out_nid[i] = nid;
3033 return 0;
3034 }
3035 }
3036 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3037 return 1;
ae0afd81
MR		 3038}
3039
76624534
TI		 3040static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
3041{
3042 int i;
3043
3044 if (spec->autocfg.line_outs != 1)
3045 return 0;
3046 if (spec->multiout.hp_nid == nid)
3047 return 0;
3048 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
3049 if (spec->multiout.extra_out_nid[i] == nid)
3050 return 0;
3051 return 1;
3052}
3053
c7d4b2fa 3054/* add playback controls from the parsed DAC table */
0fb87bb4 3055static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 3056 const struct auto_pin_cfg *cfg)
c7d4b2fa 3057{
76624534 3058 struct sigmatel_spec *spec = codec->spec;
19039bd0
TI		 3059 static const char *chname[4] = {
3060 "Front", "Surround", NULL /*CLFE*/, "Side"
3061 };
d21995e3 3062 hda_nid_t nid = 0;
91589232
TI		 3063 int i, err;
3064 unsigned int wid_caps;
0fb87bb4 3065
c21ca4a8 3066 for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
c7d4b2fa 3067 nid = spec->multiout.dac_nids[i];
c7d4b2fa
M		 3068 if (i == 2) {
3069 /* Center/LFE */
eb06ed8f
TI		 3070 err = create_controls(spec, "Center", nid, 1);
3071 if (err < 0)
c7d4b2fa 3072 return err;
eb06ed8f
TI		 3073 err = create_controls(spec, "LFE", nid, 2);
3074 if (err < 0)
c7d4b2fa 3075 return err;
0fb87bb4
ML		 3076
3077 wid_caps = get_wcaps(codec, nid);
3078
3079 if (wid_caps & AC_WCAP_LR_SWAP) {
3080 err = stac92xx_add_control(spec,
3081 STAC_CTL_WIDGET_CLFE_SWITCH,
3082 "Swap Center/LFE Playback Switch", nid);
3083
3084 if (err < 0)
3085 return err;
3086 }
3087
c7d4b2fa 3088 } else {
76624534
TI		 3089 const char *name = chname[i];
3090 /* if it's a single DAC, assign a better name */
3091 if (!i && is_unique_dac(spec, nid)) {
3092 switch (cfg->line_out_type) {
3093 case AUTO_PIN_HP_OUT:
3094 name = "Headphone";
3095 break;
3096 case AUTO_PIN_SPEAKER_OUT:
3097 name = "Speaker";
3098 break;
3099 }
3100 }
3101 err = create_controls(spec, name, nid, 3);
eb06ed8f 3102 if (err < 0)
c7d4b2fa
M		 3103 return err;
3104 }
3105 }
3106
a9cb5c90 3107 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3108 err = stac92xx_add_control(spec,
3109 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3110 "Headphone as Line Out Switch",
3111 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3112 if (err < 0)
3113 return err;
3114 }
3115
b5895dc8 3116 if (spec->line_switch) {
c21ca4a8
TI		 3117 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3118 "Line In as Output Switch",
3119 spec->line_switch << 8);
3120 if (err < 0)
3121 return err;
b5895dc8 3122 }
403d1944 3123
b5895dc8 3124 if (spec->mic_switch) {
c21ca4a8
TI		 3125 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH,
3126 "Mic as Output Switch",
3127 (spec->mic_switch << 8) | 1);
3128 if (err < 0)
3129 return err;
b5895dc8 3130 }
403d1944 3131
c7d4b2fa
M		 3132 return 0;
3133}
3134
eb06ed8f
TI		 3135/* add playback controls for Speaker and HP outputs */
3136static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3137 struct auto_pin_cfg *cfg)
3138{
3139 struct sigmatel_spec *spec = codec->spec;
3140 hda_nid_t nid;
c21ca4a8 3141 int i, err, nums;
eb06ed8f 3142
c21ca4a8 3143 nums = 0;
eb06ed8f 3144 for (i = 0; i < cfg->hp_outs; i++) {
c21ca4a8
TI		 3145 static const char *pfxs[] = {
3146 "Headphone", "Headphone2", "Headphone3",
3147 };
eb06ed8f
TI		 3148 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
3149 if (wid_caps & AC_WCAP_UNSOL_CAP)
3150 spec->hp_detect = 1;
c21ca4a8 3151 if (nums >= ARRAY_SIZE(pfxs))
c7d4b2fa 3152 continue;
c21ca4a8
TI		 3153 nid = spec->hp_dacs[i];
3154 if (!nid)
eb06ed8f 3155 continue;
c21ca4a8
TI		 3156 err = create_controls(spec, pfxs[nums++], nid, 3);
3157 if (err < 0)
3158 return err;
1b290a51 3159 }
c21ca4a8
TI		 3160 nums = 0;
3161 for (i = 0; i < cfg->speaker_outs; i++) {
eb06ed8f
TI		 3162 static const char *pfxs[] = {
3163 "Speaker", "External Speaker", "Speaker2",
3164 };
c21ca4a8
TI		 3165 if (nums >= ARRAY_SIZE(pfxs))
3166 continue;
3167 nid = spec->speaker_dacs[i];
3168 if (!nid)
3169 continue;
3170 err = create_controls(spec, pfxs[nums++], nid, 3);
eb06ed8f
TI		 3171 if (err < 0)
3172 return err;
3173 }
c7d4b2fa
M		 3174 return 0;
3175}
3176
b22b4821 3177/* labels for mono mux outputs */
d0513fc6
MR		 3178static const char *stac92xx_mono_labels[4] = {
3179 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3180};
3181
3182/* create mono mux for mono out on capable codecs */
3183static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3184{
3185 struct sigmatel_spec *spec = codec->spec;
3186 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3187 int i, num_cons;
3188 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3189
3190 num_cons = snd_hda_get_connections(codec,
3191 spec->mono_nid,
3192 con_lst,
3193 HDA_MAX_NUM_INPUTS);
3194 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3195 return -EINVAL;
3196
3197 for (i = 0; i < num_cons; i++) {
3198 mono_mux->items[mono_mux->num_items].label =
3199 stac92xx_mono_labels[i];
3200 mono_mux->items[mono_mux->num_items].index = i;
3201 mono_mux->num_items++;
3202 }
09a99959
MR		 3203
3204 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3205 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3206}
3207
89385035
MR		 3208/* labels for amp mux outputs */
3209static const char *stac92xx_amp_labels[3] = {
4b33c767 3210 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3211};
3212
3213/* create amp out controls mux on capable codecs */
3214static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3215{
3216 struct sigmatel_spec *spec = codec->spec;
3217 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3218 int i, err;
3219
2a9c7816 3220 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3221 amp_mux->items[amp_mux->num_items].label =
3222 stac92xx_amp_labels[i];
3223 amp_mux->items[amp_mux->num_items].index = i;
3224 amp_mux->num_items++;
3225 }
3226
2a9c7816
MR		 3227 if (spec->num_amps > 1) {
3228 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3229 "Amp Selector Capture Switch", 0);
3230 if (err < 0)
3231 return err;
3232 }
89385035
MR		 3233 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3234 "Amp Capture Volume",
3235 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3236}
3237
3238
1cd2224c
MR		 3239/* create PC beep volume controls */
3240static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3241 hda_nid_t nid)
3242{
3243 struct sigmatel_spec *spec = codec->spec;
3244 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3245 int err;
3246
3247 /* check for mute support for the the amp */
3248 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3249 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3250 "PC Beep Playback Switch",
3251 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3252 if (err < 0)
3253 return err;
3254 }
3255
3256 /* check to see if there is volume support for the amp */
3257 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3258 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3259 "PC Beep Playback Volume",
3260 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3261 if (err < 0)
3262 return err;
3263 }
3264 return 0;
3265}
3266
4d4e9bb3
TI		 3267#ifdef CONFIG_SND_HDA_INPUT_BEEP
3268#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3269
3270static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3271 struct snd_ctl_elem_value *ucontrol)
3272{
3273 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3274 ucontrol->value.integer.value[0] = codec->beep->enabled;
3275 return 0;
3276}
3277
3278static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3279 struct snd_ctl_elem_value *ucontrol)
3280{
3281 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3282 int enabled = !!ucontrol->value.integer.value[0];
3283 if (codec->beep->enabled != enabled) {
3284 codec->beep->enabled = enabled;
3285 return 1;
3286 }
3287 return 0;
3288}
3289
3290static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3291 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3292 .info = stac92xx_dig_beep_switch_info,
3293 .get = stac92xx_dig_beep_switch_get,
3294 .put = stac92xx_dig_beep_switch_put,
3295};
3296
3297static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3298{
3299 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3300 0, "PC Beep Playback Switch", 0);
3301}
3302#endif
3303
4682eee0
MR		 3304static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3305{
3306 struct sigmatel_spec *spec = codec->spec;
3307 int wcaps, nid, i, err = 0;
3308
3309 for (i = 0; i < spec->num_muxes; i++) {
3310 nid = spec->mux_nids[i];
3311 wcaps = get_wcaps(codec, nid);
3312
3313 if (wcaps & AC_WCAP_OUT_AMP) {
3314 err = stac92xx_add_control_idx(spec,
3315 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3316 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3317 if (err < 0)
3318 return err;
3319 }
3320 }
3321 return 0;
3322};
3323
d9737751 3324static const char *stac92xx_spdif_labels[3] = {
65973632 3325 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3326};
3327
3328static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3329{
3330 struct sigmatel_spec *spec = codec->spec;
3331 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3332 const char **labels = spec->spdif_labels;
d9737751 3333 int i, num_cons;
65973632 3334 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3335
3336 num_cons = snd_hda_get_connections(codec,
3337 spec->smux_nids[0],
3338 con_lst,
3339 HDA_MAX_NUM_INPUTS);
65973632 3340 if (!num_cons)
d9737751
MR		 3341 return -EINVAL;
3342
65973632
MR		 3343 if (!labels)
3344 labels = stac92xx_spdif_labels;
3345
d9737751 3346 for (i = 0; i < num_cons; i++) {
65973632 3347 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3348 spdif_mux->items[spdif_mux->num_items].index = i;
3349 spdif_mux->num_items++;
3350 }
3351
3352 return 0;
3353}
3354
8b65727b 3355/* labels for dmic mux inputs */
ddc2cec4 3356static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3357 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3358 "Digital Mic 3", "Digital Mic 4"
3359};
3360
3361/* create playback/capture controls for input pins on dmic capable codecs */
3362static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3363 const struct auto_pin_cfg *cfg)
3364{
3365 struct sigmatel_spec *spec = codec->spec;
3366 struct hda_input_mux *dimux = &spec->private_dimux;
3367 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3368 int err, i, j;
3369 char name[32];
8b65727b
MP		 3370
3371 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3372 dimux->items[dimux->num_items].index = 0;
3373 dimux->num_items++;
3374
3375 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3376 hda_nid_t nid;
8b65727b
MP		 3377 int index;
3378 int num_cons;
0678accd 3379 unsigned int wcaps;
8b65727b
MP		 3380 unsigned int def_conf;
3381
3382 def_conf = snd_hda_codec_read(codec,
3383 spec->dmic_nids[i],
3384 0,
3385 AC_VERB_GET_CONFIG_DEFAULT,
3386 0);
3387 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3388 continue;
3389
0678accd 3390 nid = spec->dmic_nids[i];
8b65727b 3391 num_cons = snd_hda_get_connections(codec,
e1f0d669 3392 spec->dmux_nids[0],
8b65727b
MP		 3393 con_lst,
3394 HDA_MAX_NUM_INPUTS);
3395 for (j = 0; j < num_cons; j++)
0678accd 3396 if (con_lst[j] == nid) {
8b65727b
MP		 3397 index = j;
3398 goto found;
3399 }
3400 continue;
3401found:
d0513fc6
MR		 3402 wcaps = get_wcaps(codec, nid) &
3403 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3404
d0513fc6 3405 if (wcaps) {
0678accd
MR		 3406 sprintf(name, "%s Capture Volume",
3407 stac92xx_dmic_labels[dimux->num_items]);
3408
3409 err = stac92xx_add_control(spec,
3410 STAC_CTL_WIDGET_VOL,
3411 name,
d0513fc6
MR		 3412 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3413 (wcaps & AC_WCAP_OUT_AMP) ?
3414 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3415 if (err < 0)
3416 return err;
3417 }
3418
8b65727b
MP		 3419 dimux->items[dimux->num_items].label =
3420 stac92xx_dmic_labels[dimux->num_items];
3421 dimux->items[dimux->num_items].index = index;
3422 dimux->num_items++;
3423 }
3424
3425 return 0;
3426}
3427
c7d4b2fa
M		 3428/* create playback/capture controls for input pins */
3429static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3430{
3431 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3432 struct hda_input_mux *imux = &spec->private_imux;
3433 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3434 int i, j, k;
3435
3436 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3437 int index;
3438
3439 if (!cfg->input_pins[i])
3440 continue;
3441 index = -1;
3442 for (j = 0; j < spec->num_muxes; j++) {
3443 int num_cons;
3444 num_cons = snd_hda_get_connections(codec,
3445 spec->mux_nids[j],
3446 con_lst,
3447 HDA_MAX_NUM_INPUTS);
3448 for (k = 0; k < num_cons; k++)
3449 if (con_lst[k] == cfg->input_pins[i]) {
3450 index = k;
3451 goto found;
3452 }
c7d4b2fa 3453 }
314634bc
TI		 3454 continue;
3455 found:
3456 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3457 imux->items[imux->num_items].index = index;
3458 imux->num_items++;
c7d4b2fa
M		 3459 }
3460
7b043899 3461 if (imux->num_items) {
62fe78e9
SR		 3462 /*
3463 * Set the current input for the muxes.
3464 * The STAC9221 has two input muxes with identical source
3465 * NID lists. Hopefully this won't get confused.
3466 */
3467 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3468 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3469 AC_VERB_SET_CONNECT_SEL,
3470 imux->items[0].index);
62fe78e9
SR		 3471 }
3472 }
3473
c7d4b2fa
M		 3474 return 0;
3475}
3476
c7d4b2fa
M		 3477static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3478{
3479 struct sigmatel_spec *spec = codec->spec;
3480 int i;
3481
3482 for (i = 0; i < spec->autocfg.line_outs; i++) {
3483 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3484 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3485 }
3486}
3487
3488static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3489{
3490 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3491 int i;
c7d4b2fa 3492
eb06ed8f
TI		 3493 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3494 hda_nid_t pin;
3495 pin = spec->autocfg.hp_pins[i];
3496 if (pin) /* connect to front */
3497 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3498 }
3499 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3500 hda_nid_t pin;
3501 pin = spec->autocfg.speaker_pins[i];
3502 if (pin) /* connect to front */
3503 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3504 }
c7d4b2fa
M		 3505}
3506
3cc08dc6 3507static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3508{
3509 struct sigmatel_spec *spec = codec->spec;
3510 int err;
3511
8b65727b
MP		 3512 if ((err = snd_hda_parse_pin_def_config(codec,
3513 &spec->autocfg,
3514 spec->dmic_nids)) < 0)
c7d4b2fa 3515 return err;
82bc955f 3516 if (! spec->autocfg.line_outs)
869264c4 3517 return 0; /* can't find valid pin config */
19039bd0 3518
bcecd9bd
JZ		 3519 /* If we have no real line-out pin and multiple hp-outs, HPs should
3520 * be set up as multi-channel outputs.
3521 */
3522 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3523 spec->autocfg.hp_outs > 1) {
3524 /* Copy hp_outs to line_outs, backup line_outs in
3525 * speaker_outs so that the following routines can handle
3526 * HP pins as primary outputs.
3527 */
c21ca4a8 3528 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3529 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3530 sizeof(spec->autocfg.line_out_pins));
3531 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3532 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3533 sizeof(spec->autocfg.hp_pins));
3534 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3535 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3536 spec->autocfg.hp_outs = 0;
bcecd9bd 3537 }
09a99959 3538 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3539 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3540 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3541 u32 caps = query_amp_caps(codec,
3542 spec->autocfg.mono_out_pin, dir);
3543 hda_nid_t conn_list[1];
3544
3545 /* get the mixer node and then the mono mux if it exists */
3546 if (snd_hda_get_connections(codec,
3547 spec->autocfg.mono_out_pin, conn_list, 1) &&
3548 snd_hda_get_connections(codec, conn_list[0],
3549 conn_list, 1)) {
3550
3551 int wcaps = get_wcaps(codec, conn_list[0]);
3552 int wid_type = (wcaps & AC_WCAP_TYPE)
3553 >> AC_WCAP_TYPE_SHIFT;
3554 /* LR swap check, some stac925x have a mux that
3555 * changes the DACs output path instead of the
3556 * mono-mux path.
3557 */
3558 if (wid_type == AC_WID_AUD_SEL &&
3559 !(wcaps & AC_WCAP_LR_SWAP))
3560 spec->mono_nid = conn_list[0];
3561 }
d0513fc6
MR		 3562 if (dir) {
3563 hda_nid_t nid = spec->autocfg.mono_out_pin;
3564
3565 /* most mono outs have a least a mute/unmute switch */
3566 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3567 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3568 "Mono Playback Switch",
3569 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3570 if (err < 0)
3571 return err;
d0513fc6
MR		 3572 /* check for volume support for the amp */
3573 if ((caps & AC_AMPCAP_NUM_STEPS)
3574 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3575 err = stac92xx_add_control(spec,
3576 STAC_CTL_WIDGET_VOL,
3577 "Mono Playback Volume",
3578 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3579 if (err < 0)
3580 return err;
3581 }
09a99959
MR		 3582 }
3583
3584 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3585 AC_PINCTL_OUT_EN);
3586 }
bcecd9bd 3587
c21ca4a8
TI		 3588 if (!spec->multiout.num_dacs) {
3589 err = stac92xx_auto_fill_dac_nids(codec);
3590 if (err < 0)
19039bd0 3591 return err;
c9280d68
TI		 3592 err = stac92xx_auto_create_multi_out_ctls(codec,
3593 &spec->autocfg);
3594 if (err < 0)
3595 return err;
c21ca4a8 3596 }
c7d4b2fa 3597
1cd2224c
MR		 3598 /* setup analog beep controls */
3599 if (spec->anabeep_nid > 0) {
3600 err = stac92xx_auto_create_beep_ctls(codec,
3601 spec->anabeep_nid);
3602 if (err < 0)
3603 return err;
3604 }
3605
3606 /* setup digital beep controls and input device */
3607#ifdef CONFIG_SND_HDA_INPUT_BEEP
3608 if (spec->digbeep_nid > 0) {
3609 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3610 unsigned int caps;
1cd2224c
MR		 3611
3612 err = stac92xx_auto_create_beep_ctls(codec, nid);
3613 if (err < 0)
3614 return err;
3615 err = snd_hda_attach_beep_device(codec, nid);
3616 if (err < 0)
3617 return err;
4d4e9bb3
TI		 3618 /* if no beep switch is available, make its own one */
3619 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3620 if (codec->beep &&
3621 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3622 err = stac92xx_beep_switch_ctl(codec);
3623 if (err < 0)
3624 return err;
3625 }
1cd2224c
MR		 3626 }
3627#endif
3628
0fb87bb4
ML		 3629 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3630
3631 if (err < 0)
3632 return err;
3633
3634 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3635
3636 if (err < 0)
c7d4b2fa
M		 3637 return err;
3638
b22b4821
MR		 3639 if (spec->mono_nid > 0) {
3640 err = stac92xx_auto_create_mono_output_ctls(codec);
3641 if (err < 0)
3642 return err;
3643 }
2a9c7816 3644 if (spec->num_amps > 0) {
89385035
MR		 3645 err = stac92xx_auto_create_amp_output_ctls(codec);
3646 if (err < 0)
3647 return err;
3648 }
2a9c7816 3649 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3650 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3651 &spec->autocfg)) < 0)
3652 return err;
4682eee0
MR		 3653 if (spec->num_muxes > 0) {
3654 err = stac92xx_auto_create_mux_input_ctls(codec);
3655 if (err < 0)
3656 return err;
3657 }
d9737751
MR		 3658 if (spec->num_smuxes > 0) {
3659 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3660 if (err < 0)
3661 return err;
3662 }
8b65727b 3663
c7d4b2fa 3664 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3665 if (spec->multiout.max_channels > 2)
c7d4b2fa 3666 spec->surr_switch = 1;
c7d4b2fa 3667
82bc955f 3668 if (spec->autocfg.dig_out_pin)
3cc08dc6 3669 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3670 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3671 spec->dig_in_nid = dig_in;
c7d4b2fa 3672
603c4019
TI		 3673 if (spec->kctls.list)
3674 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3675
3676 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3677 if (!spec->dinput_mux)
3678 spec->dinput_mux = &spec->private_dimux;
d9737751 3679 spec->sinput_mux = &spec->private_smux;
b22b4821 3680 spec->mono_mux = &spec->private_mono_mux;
89385035 3681 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3682 return 1;
3683}
3684
82bc955f
TI		 3685/* add playback controls for HP output */
3686static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3687 struct auto_pin_cfg *cfg)
3688{
3689 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3690 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3691 unsigned int wid_caps;
3692
3693 if (! pin)
3694 return 0;
3695
3696 wid_caps = get_wcaps(codec, pin);
505cb341 3697 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3698 spec->hp_detect = 1;
82bc955f
TI		 3699
3700 return 0;
3701}
3702
160ea0dc
RF		 3703/* add playback controls for LFE output */
3704static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3705 struct auto_pin_cfg *cfg)
3706{
3707 struct sigmatel_spec *spec = codec->spec;
3708 int err;
3709 hda_nid_t lfe_pin = 0x0;
3710 int i;
3711
3712 /*
3713 * search speaker outs and line outs for a mono speaker pin
3714 * with an amp. If one is found, add LFE controls
3715 * for it.
3716 */
3717 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3718 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3719 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3720 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3721 if (wcaps == AC_WCAP_OUT_AMP)
3722 /* found a mono speaker with an amp, must be lfe */
3723 lfe_pin = pin;
3724 }
3725
3726 /* if speaker_outs is 0, then speakers may be in line_outs */
3727 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3728 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3729 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3730 unsigned int defcfg;
8b551785 3731 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3732 AC_VERB_GET_CONFIG_DEFAULT,
3733 0x00);
8b551785 3734 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3735 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3736 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3737 if (wcaps == AC_WCAP_OUT_AMP)
3738 /* found a mono speaker with an amp,
3739 must be lfe */
3740 lfe_pin = pin;
3741 }
3742 }
3743 }
3744
3745 if (lfe_pin) {
eb06ed8f 3746 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3747 if (err < 0)
3748 return err;
3749 }
3750
3751 return 0;
3752}
3753
c7d4b2fa
M		 3754static int stac9200_parse_auto_config(struct hda_codec *codec)
3755{
3756 struct sigmatel_spec *spec = codec->spec;
3757 int err;
3758
df694daa 3759 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3760 return err;
3761
3762 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3763 return err;
3764
82bc955f
TI		 3765 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3766 return err;
3767
160ea0dc
RF		 3768 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3769 return err;
3770
355a0ec4
TI		 3771 if (spec->num_muxes > 0) {
3772 err = stac92xx_auto_create_mux_input_ctls(codec);
3773 if (err < 0)
3774 return err;
3775 }
3776
82bc955f 3777 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3778 spec->multiout.dig_out_nid = 0x05;
82bc955f 3779 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3780 spec->dig_in_nid = 0x04;
c7d4b2fa 3781
603c4019
TI		 3782 if (spec->kctls.list)
3783 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3784
3785 spec->input_mux = &spec->private_imux;
8b65727b 3786 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3787
3788 return 1;
3789}
3790
62fe78e9
SR		 3791/*
3792 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3793 * funky external mute control using GPIO pins.
3794 */
3795
76e1ddfb 3796static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3797 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3798{
3799 unsigned int gpiostate, gpiomask, gpiodir;
3800
3801 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3802 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3803 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3804
3805 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3806 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3807 gpiomask |= mask;
62fe78e9
SR		 3808
3809 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3810 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3811 gpiodir |= dir_mask;
62fe78e9 3812
76e1ddfb 3813 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3814 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3815
3816 snd_hda_codec_write(codec, codec->afg, 0,
3817 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3818 snd_hda_codec_read(codec, codec->afg, 0,
3819 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3820
3821 msleep(1);
3822
76e1ddfb
TI		 3823 snd_hda_codec_read(codec, codec->afg, 0,
3824 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3825}
3826
74aeaabc
MR		 3827static int stac92xx_add_jack(struct hda_codec *codec,
3828 hda_nid_t nid, int type)
3829{
e4973e1e 3830#ifdef CONFIG_SND_JACK
74aeaabc
MR		 3831 struct sigmatel_spec *spec = codec->spec;
3832 struct sigmatel_jack *jack;
3833 int def_conf = snd_hda_codec_read(codec, nid,
3834 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3835 int connectivity = get_defcfg_connect(def_conf);
3836 char name[32];
3837
3838 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
3839 return 0;
3840
3841 snd_array_init(&spec->jacks, sizeof(*jack), 32);
3842 jack = snd_array_new(&spec->jacks);
3843 if (!jack)
3844 return -ENOMEM;
3845 jack->nid = nid;
3846 jack->type = type;
3847
3848 sprintf(name, "%s at %s %s Jack",
3849 snd_hda_get_jack_type(def_conf),
3850 snd_hda_get_jack_connectivity(def_conf),
3851 snd_hda_get_jack_location(def_conf));
3852
3853 return snd_jack_new(codec->bus->card, name, type, &jack->jack);
e4973e1e
TI		 3854#else
3855 return 0;
3856#endif
74aeaabc
MR		 3857}
3858
c6e4c666
TI		 3859static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
3860 unsigned char type, int data)
74aeaabc
MR		 3861{
3862 struct sigmatel_event *event;
3863
3864 snd_array_init(&spec->events, sizeof(*event), 32);
3865 event = snd_array_new(&spec->events);
3866 if (!event)
3867 return -ENOMEM;
3868 event->nid = nid;
c6e4c666
TI		 3869 event->type = type;
3870 event->tag = spec->events.used;
74aeaabc
MR		 3871 event->data = data;
3872
c6e4c666 3873 return event->tag;
74aeaabc
MR		 3874}
3875
c6e4c666
TI		 3876static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
3877 hda_nid_t nid, unsigned char type)
74aeaabc
MR		 3878{
3879 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 3880 struct sigmatel_event *event = spec->events.list;
3881 int i;
3882
3883 for (i = 0; i < spec->events.used; i++, event++) {
3884 if (event->nid == nid && event->type == type)
3885 return event;
74aeaabc 3886 }
c6e4c666 3887 return NULL;
74aeaabc
MR		 3888}
3889
c6e4c666
TI		 3890static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
3891 unsigned char tag)
314634bc 3892{
c6e4c666
TI		 3893 struct sigmatel_spec *spec = codec->spec;
3894 struct sigmatel_event *event = spec->events.list;
3895 int i;
3896
3897 for (i = 0; i < spec->events.used; i++, event++) {
3898 if (event->tag == tag)
3899 return event;
74aeaabc 3900 }
c6e4c666
TI		 3901 return NULL;
3902}
3903
3904static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3905 unsigned int type)
3906{
3907 struct sigmatel_event *event;
3908 int tag;
3909
3910 if (!(get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP))
3911 return;
3912 event = stac_get_event(codec, nid, type);
3913 if (event)
3914 tag = event->tag;
3915 else
3916 tag = stac_add_event(codec->spec, nid, type, 0);
3917 if (tag < 0)
3918 return;
3919 snd_hda_codec_write_cache(codec, nid, 0,
3920 AC_VERB_SET_UNSOLICITED_ENABLE,
3921 AC_USRSP_EN | tag);
314634bc
TI		 3922}
3923
a64135a2
MR		 3924static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3925{
3926 int i;
3927 for (i = 0; i < cfg->hp_outs; i++)
3928 if (cfg->hp_pins[i] == nid)
3929 return 1; /* nid is a HP-Out */
3930
3931 return 0; /* nid is not a HP-Out */
3932};
3933
b76c850f
MR		 3934static void stac92xx_power_down(struct hda_codec *codec)
3935{
3936 struct sigmatel_spec *spec = codec->spec;
3937
3938 /* power down inactive DACs */
3939 hda_nid_t *dac;
3940 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 3941 if (!check_all_dac_nids(spec, *dac))
8c2f767b 3942 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 3943 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3944}
3945
f73d3585
TI		 3946static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3947 int enable);
3948
c7d4b2fa
M		 3949static int stac92xx_init(struct hda_codec *codec)
3950{
3951 struct sigmatel_spec *spec = codec->spec;
82bc955f 3952 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3953 unsigned int gpio;
e4973e1e 3954 int i;
c7d4b2fa 3955
c7d4b2fa
M		 3956 snd_hda_sequence_write(codec, spec->init);
3957
8daaaa97
MR		 3958 /* power down adcs initially */
3959 if (spec->powerdown_adcs)
3960 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 3961 snd_hda_codec_write(codec,
8daaaa97
MR		 3962 spec->adc_nids[i], 0,
3963 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3964
3965 /* set up GPIO */
3966 gpio = spec->gpio_data;
3967 /* turn on EAPD statically when spec->eapd_switch isn't set.
3968 * otherwise, unsol event will turn it on/off dynamically
3969 */
3970 if (!spec->eapd_switch)
3971 gpio |= spec->eapd_mask;
3972 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3973
82bc955f
TI		 3974 /* set up pins */
3975 if (spec->hp_detect) {
505cb341 3976 /* Enable unsolicited responses on the HP widget */
74aeaabc 3977 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 3978 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 3979 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 3980 }
0a07acaf
TI		 3981 /* force to enable the first line-out; the others are set up
3982 * in unsol_event
3983 */
3984 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 3985 AC_PINCTL_OUT_EN);
82bc955f 3986 /* fake event to set up pins */
c6e4c666
TI		 3987 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
3988 STAC_HP_EVENT);
82bc955f
TI		 3989 } else {
3990 stac92xx_auto_init_multi_out(codec);
3991 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 3992 for (i = 0; i < cfg->hp_outs; i++)
3993 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f
TI		 3994 }
3995 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3996 hda_nid_t nid = cfg->input_pins[i];
3997 if (nid) {
12dde4c6 3998 unsigned int pinctl, conf;
4f1e6bc3
TI		 3999 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
4000 /* for mic pins, force to initialize */
4001 pinctl = stac92xx_get_vref(codec, nid);
12dde4c6
TI		 4002 pinctl |= AC_PINCTL_IN_EN;
4003 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3
TI		 4004 } else {
4005 pinctl = snd_hda_codec_read(codec, nid, 0,
4006 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4007 /* if PINCTL already set then skip */
12dde4c6
TI		 4008 if (!(pinctl & AC_PINCTL_IN_EN)) {
4009 pinctl |= AC_PINCTL_IN_EN;
4010 stac92xx_auto_set_pinctl(codec, nid,
4011 pinctl);
4012 }
4013 }
4014 conf = snd_hda_codec_read(codec, nid, 0,
4015 AC_VERB_GET_CONFIG_DEFAULT, 0);
4016 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4017 enable_pin_detect(codec, nid,
4018 STAC_INSERT_EVENT);
4019 stac_issue_unsol_event(codec, nid,
4020 STAC_INSERT_EVENT);
4f1e6bc3 4021 }
c960a03b 4022 }
82bc955f 4023 }
a64135a2
MR		 4024 for (i = 0; i < spec->num_dmics; i++)
4025 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4026 AC_PINCTL_IN_EN);
f73d3585
TI		 4027 if (cfg->dig_out_pin)
4028 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
4029 AC_PINCTL_OUT_EN);
4030 if (cfg->dig_in_pin)
4031 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4032 AC_PINCTL_IN_EN);
a64135a2 4033 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4034 hda_nid_t nid = spec->pwr_nids[i];
4035 int pinctl, def_conf;
f73d3585 4036
eb632128
TI		 4037 /* power on when no jack detection is available */
4038 if (!spec->hp_detect) {
4039 stac_toggle_power_map(codec, nid, 1);
4040 continue;
4041 }
4042
4043 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4044 continue; /* already has an unsol event */
4045
4046 pinctl = snd_hda_codec_read(codec, nid, 0,
4047 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4048 /* outputs are only ports capable of power management
4049 * any attempts on powering down a input port cause the
4050 * referenced VREF to act quirky.
4051 */
eb632128
TI		 4052 if (pinctl & AC_PINCTL_IN_EN) {
4053 stac_toggle_power_map(codec, nid, 1);
a64135a2 4054 continue;
eb632128 4055 }
f73d3585
TI		 4056 def_conf = snd_hda_codec_read(codec, nid, 0,
4057 AC_VERB_GET_CONFIG_DEFAULT, 0);
4058 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4059 /* skip any ports that don't have jacks since presence
4060 * detection is useless */
f73d3585
TI		 4061 if (def_conf != AC_JACK_PORT_COMPLEX) {
4062 if (def_conf != AC_JACK_PORT_NONE)
4063 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4064 continue;
f73d3585 4065 }
12dde4c6
TI		 4066 if (!stac_get_event(codec, nid, STAC_INSERT_EVENT)) {
4067 enable_pin_detect(codec, nid, STAC_PWR_EVENT);
4068 stac_issue_unsol_event(codec, nid, STAC_PWR_EVENT);
4069 }
a64135a2 4070 }
b76c850f
MR		 4071 if (spec->dac_list)
4072 stac92xx_power_down(codec);
c7d4b2fa
M		 4073 return 0;
4074}
4075
74aeaabc
MR		 4076static void stac92xx_free_jacks(struct hda_codec *codec)
4077{
e4973e1e 4078#ifdef CONFIG_SND_JACK
b94d3539 4079 /* free jack instances manually when clearing/reconfiguring */
74aeaabc 4080 struct sigmatel_spec *spec = codec->spec;
b94d3539 4081 if (!codec->bus->shutdown && spec->jacks.list) {
74aeaabc
MR		 4082 struct sigmatel_jack *jacks = spec->jacks.list;
4083 int i;
4084 for (i = 0; i < spec->jacks.used; i++)
4085 snd_device_free(codec->bus->card, &jacks[i].jack);
4086 }
4087 snd_array_free(&spec->jacks);
e4973e1e 4088#endif
74aeaabc
MR		 4089}
4090
603c4019
TI		 4091static void stac92xx_free_kctls(struct hda_codec *codec)
4092{
4093 struct sigmatel_spec *spec = codec->spec;
4094
4095 if (spec->kctls.list) {
4096 struct snd_kcontrol_new *kctl = spec->kctls.list;
4097 int i;
4098 for (i = 0; i < spec->kctls.used; i++)
4099 kfree(kctl[i].name);
4100 }
4101 snd_array_free(&spec->kctls);
4102}
4103
2f2f4251
M		 4104static void stac92xx_free(struct hda_codec *codec)
4105{
c7d4b2fa 4106 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4107
4108 if (! spec)
4109 return;
4110
af9f341a 4111 kfree(spec->pin_configs);
74aeaabc
MR		 4112 stac92xx_free_jacks(codec);
4113 snd_array_free(&spec->events);
11b44bbd 4114
c7d4b2fa 4115 kfree(spec);
1cd2224c 4116 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4117}
4118
4e55096e
M		 4119static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4120 unsigned int flag)
4121{
4122 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4123 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4124
f9acba43
TI		 4125 if (pin_ctl & AC_PINCTL_IN_EN) {
4126 /*
4127 * we need to check the current set-up direction of
4128 * shared input pins since they can be switched via
4129 * "xxx as Output" mixer switch
4130 */
4131 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4132 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4133 return;
4134 }
4135
7b043899
SL		 4136 /* if setting pin direction bits, clear the current
4137 direction bits first */
4138 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4139 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4140
82beb8fd 4141 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4142 AC_VERB_SET_PIN_WIDGET_CONTROL,
4143 pin_ctl | flag);
4144}
4145
4146static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4147 unsigned int flag)
4148{
4149 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4150 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 4151 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 4152 AC_VERB_SET_PIN_WIDGET_CONTROL,
4153 pin_ctl & ~flag);
4154}
4155
e6e3ea25 4156static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4157{
4158 if (!nid)
4159 return 0;
4160 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
e6e3ea25
TI		 4161 & (1 << 31))
4162 return 1;
314634bc
TI		 4163 return 0;
4164}
4165
d7a89436
TI		 4166/* return non-zero if the hp-pin of the given array index isn't
4167 * a jack-detection target
4168 */
4169static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4170{
4171 struct auto_pin_cfg *cfg = &spec->autocfg;
4172
4173 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4174 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4175 return 1;
c21ca4a8 4176 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4177 return 1;
4178 /* ignore if the pin is set as line-out */
4179 if (cfg->hp_pins[i] == spec->hp_switch)
4180 return 1;
4181 return 0;
4182}
4183
c6e4c666 4184static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4185{
4186 struct sigmatel_spec *spec = codec->spec;
4187 struct auto_pin_cfg *cfg = &spec->autocfg;
4188 int i, presence;
4189
eb06ed8f 4190 presence = 0;
4fe5195c
MR		 4191 if (spec->gpio_mute)
4192 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4193 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4194
eb06ed8f 4195 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4196 if (presence)
4197 break;
d7a89436
TI		 4198 if (no_hp_sensing(spec, i))
4199 continue;
e6e3ea25
TI		 4200 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4201 if (presence) {
4202 unsigned int pinctl;
4203 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4204 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4205 if (pinctl & AC_PINCTL_IN_EN)
4206 presence = 0; /* mic- or line-input */
4207 }
eb06ed8f 4208 }
4e55096e
M		 4209
4210 if (presence) {
d7a89436 4211 /* disable lineouts */
7c2ba97b 4212 if (spec->hp_switch)
d7a89436
TI		 4213 stac92xx_reset_pinctl(codec, spec->hp_switch,
4214 AC_PINCTL_OUT_EN);
4e55096e
M		 4215 for (i = 0; i < cfg->line_outs; i++)
4216 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4217 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4218 for (i = 0; i < cfg->speaker_outs; i++)
4219 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4220 AC_PINCTL_OUT_EN);
c0cea0d0 4221 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4222 stac_gpio_set(codec, spec->gpio_mask,
4223 spec->gpio_dir, spec->gpio_data &
4224 ~spec->eapd_mask);
4e55096e 4225 } else {
d7a89436 4226 /* enable lineouts */
7c2ba97b 4227 if (spec->hp_switch)
d7a89436
TI		 4228 stac92xx_set_pinctl(codec, spec->hp_switch,
4229 AC_PINCTL_OUT_EN);
4e55096e
M		 4230 for (i = 0; i < cfg->line_outs; i++)
4231 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4232 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 4233 for (i = 0; i < cfg->speaker_outs; i++)
4234 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4235 AC_PINCTL_OUT_EN);
c0cea0d0 4236 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 4237 stac_gpio_set(codec, spec->gpio_mask,
4238 spec->gpio_dir, spec->gpio_data |
4239 spec->eapd_mask);
4e55096e 4240 }
d7a89436
TI		 4241 /* toggle hp outs */
4242 for (i = 0; i < cfg->hp_outs; i++) {
4243 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4244 if (no_hp_sensing(spec, i))
4245 continue;
4246 if (presence)
4247 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4248#if 0 /* FIXME */
4249/* Resetting the pinctl like below may lead to (a sort of) regressions
4250 * on some devices since they use the HP pin actually for line/speaker
4251 * outs although the default pin config shows a different pin (that is
4252 * wrong and useless).
4253 *
4254 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4255 * But, disabling the code below just works around it, and I'm too tired of
4256 * bug reports with such devices...
4257 */
d7a89436
TI		 4258 else
4259 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4260#endif /* FIXME */
d7a89436 4261 }
4e55096e
M		 4262}
4263
f73d3585
TI		 4264static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4265 int enable)
a64135a2
MR		 4266{
4267 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4268 unsigned int idx, val;
4269
4270 for (idx = 0; idx < spec->num_pwrs; idx++) {
4271 if (spec->pwr_nids[idx] == nid)
4272 break;
4273 }
4274 if (idx >= spec->num_pwrs)
4275 return;
d0513fc6
MR		 4276
4277 /* several codecs have two power down bits */
4278 if (spec->pwr_mapping)
4279 idx = spec->pwr_mapping[idx];
4280 else
4281 idx = 1 << idx;
a64135a2 4282
f73d3585
TI		 4283 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4284 if (enable)
a64135a2
MR		 4285 val &= ~idx;
4286 else
4287 val |= idx;
4288
4289 /* power down unused output ports */
4290 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4291}
4292
f73d3585
TI		 4293static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4294{
e6e3ea25 4295 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4296}
a64135a2 4297
74aeaabc
MR		 4298static void stac92xx_report_jack(struct hda_codec *codec, hda_nid_t nid)
4299{
4300 struct sigmatel_spec *spec = codec->spec;
4301 struct sigmatel_jack *jacks = spec->jacks.list;
4302
4303 if (jacks) {
4304 int i;
4305 for (i = 0; i < spec->jacks.used; i++) {
4306 if (jacks->nid == nid) {
4307 unsigned int pin_ctl =
4308 snd_hda_codec_read(codec, nid,
4309 0, AC_VERB_GET_PIN_WIDGET_CONTROL,
4310 0x00);
4311 int type = jacks->type;
4312 if (type == (SND_JACK_LINEOUT
4313 | SND_JACK_HEADPHONE))
4314 type = (pin_ctl & AC_PINCTL_HP_EN)
4315 ? SND_JACK_HEADPHONE : SND_JACK_LINEOUT;
4316 snd_jack_report(jacks->jack,
e6e3ea25 4317 get_pin_presence(codec, nid)
74aeaabc
MR		 4318 ? type : 0);
4319 }
4320 jacks++;
4321 }
4322 }
4323}
a64135a2 4324
c6e4c666
TI		 4325static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid,
4326 unsigned char type)
4327{
4328 struct sigmatel_event *event = stac_get_event(codec, nid, type);
4329 if (!event)
4330 return;
4331 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4332}
4333
314634bc
TI		 4334static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4335{
a64135a2 4336 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4337 struct sigmatel_event *event;
4338 int tag, data;
a64135a2 4339
c6e4c666
TI		 4340 tag = (res >> 26) & 0x7f;
4341 event = stac_get_event_from_tag(codec, tag);
4342 if (!event)
4343 return;
4344
4345 switch (event->type) {
314634bc 4346 case STAC_HP_EVENT:
c6e4c666 4347 stac92xx_hp_detect(codec);
a64135a2 4348 /* fallthru */
74aeaabc 4349 case STAC_INSERT_EVENT:
a64135a2 4350 case STAC_PWR_EVENT:
c6e4c666
TI		 4351 if (spec->num_pwrs > 0)
4352 stac92xx_pin_sense(codec, event->nid);
4353 stac92xx_report_jack(codec, event->nid);
72474be6 4354 break;
c6e4c666
TI		 4355 case STAC_VREF_EVENT:
4356 data = snd_hda_codec_read(codec, codec->afg, 0,
4357 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4358 /* toggle VREF state based on GPIOx status */
4359 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4360 !!(data & (1 << event->data)));
72474be6 4361 break;
314634bc
TI		 4362 }
4363}
4364
2d34e1b3
TI		 4365#ifdef CONFIG_PROC_FS
4366static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4367 struct hda_codec *codec, hda_nid_t nid)
4368{
4369 if (nid == codec->afg)
4370 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4371 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4372}
4373
4374static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4375 struct hda_codec *codec,
4376 unsigned int verb)
4377{
4378 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4379 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4380}
4381
4382/* stac92hd71bxx, stac92hd73xx */
4383static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4384 struct hda_codec *codec, hda_nid_t nid)
4385{
4386 stac92hd_proc_hook(buffer, codec, nid);
4387 if (nid == codec->afg)
4388 analog_loop_proc_hook(buffer, codec, 0xfa0);
4389}
4390
4391static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4392 struct hda_codec *codec, hda_nid_t nid)
4393{
4394 if (nid == codec->afg)
4395 analog_loop_proc_hook(buffer, codec, 0xfe0);
4396}
4397
4398static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4399 struct hda_codec *codec, hda_nid_t nid)
4400{
4401 if (nid == codec->afg)
4402 analog_loop_proc_hook(buffer, codec, 0xfeb);
4403}
4404#else
4405#define stac92hd_proc_hook NULL
4406#define stac92hd7x_proc_hook NULL
4407#define stac9205_proc_hook NULL
4408#define stac927x_proc_hook NULL
4409#endif
4410
cb53c626 4411#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4412static int stac92xx_resume(struct hda_codec *codec)
4413{
dc81bed1
TI		 4414 struct sigmatel_spec *spec = codec->spec;
4415
11b44bbd 4416 stac92xx_set_config_regs(codec);
2c885878 4417 stac92xx_init(codec);
82beb8fd
TI		 4418 snd_hda_codec_resume_amp(codec);
4419 snd_hda_codec_resume_cache(codec);
2c885878 4420 /* fake event to set up pins again to override cached values */
dc81bed1 4421 if (spec->hp_detect)
c6e4c666
TI		 4422 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0],
4423 STAC_HP_EVENT);
ff6fdc37
M		 4424 return 0;
4425}
c6798d2b
MR		 4426
4427static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
4428{
4429 struct sigmatel_spec *spec = codec->spec;
4430 if (spec->eapd_mask)
4431 stac_gpio_set(codec, spec->gpio_mask,
4432 spec->gpio_dir, spec->gpio_data &
4433 ~spec->eapd_mask);
4434 return 0;
4435}
ff6fdc37
M		 4436#endif
4437
2f2f4251
M		 4438static struct hda_codec_ops stac92xx_patch_ops = {
4439 .build_controls = stac92xx_build_controls,
4440 .build_pcms = stac92xx_build_pcms,
4441 .init = stac92xx_init,
4442 .free = stac92xx_free,
4e55096e 4443 .unsol_event = stac92xx_unsol_event,
cb53c626 4444#ifdef SND_HDA_NEEDS_RESUME
c6798d2b 4445 .suspend = stac92xx_suspend,
ff6fdc37
M		 4446 .resume = stac92xx_resume,
4447#endif
2f2f4251
M		 4448};
4449
4450static int patch_stac9200(struct hda_codec *codec)
4451{
4452 struct sigmatel_spec *spec;
c7d4b2fa 4453 int err;
2f2f4251 4454
e560d8d8 4455 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4456 if (spec == NULL)
4457 return -ENOMEM;
4458
4459 codec->spec = spec;
a4eed138 4460 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4461 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4462 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4463 stac9200_models,
4464 stac9200_cfg_tbl);
11b44bbd
RF		 4465 if (spec->board_config < 0) {
4466 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4467 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4468 } else
4469 err = stac_save_pin_cfgs(codec,
4470 stac9200_brd_tbl[spec->board_config]);
4471 if (err < 0) {
4472 stac92xx_free(codec);
4473 return err;
403d1944 4474 }
2f2f4251
M		 4475
4476 spec->multiout.max_channels = 2;
4477 spec->multiout.num_dacs = 1;
4478 spec->multiout.dac_nids = stac9200_dac_nids;
4479 spec->adc_nids = stac9200_adc_nids;
4480 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4481 spec->num_muxes = 1;
8b65727b 4482 spec->num_dmics = 0;
9e05b7a3 4483 spec->num_adcs = 1;
a64135a2 4484 spec->num_pwrs = 0;
c7d4b2fa 4485
58eec423
MCC		 4486 if (spec->board_config == STAC_9200_M4 ||
4487 spec->board_config == STAC_9200_M4_2 ||
bf277785 4488 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4489 spec->init = stac9200_eapd_init;
4490 else
4491 spec->init = stac9200_core_init;
2f2f4251 4492 spec->mixer = stac9200_mixer;
c7d4b2fa 4493
117f257d
TI		 4494 if (spec->board_config == STAC_9200_PANASONIC) {
4495 spec->gpio_mask = spec->gpio_dir = 0x09;
4496 spec->gpio_data = 0x00;
4497 }
4498
c7d4b2fa
M		 4499 err = stac9200_parse_auto_config(codec);
4500 if (err < 0) {
4501 stac92xx_free(codec);
4502 return err;
4503 }
2f2f4251 4504
2acc9dcb
TI		 4505 /* CF-74 has no headphone detection, and the driver should *NOT*
4506 * do detection and HP/speaker toggle because the hardware does it.
4507 */
4508 if (spec->board_config == STAC_9200_PANASONIC)
4509 spec->hp_detect = 0;
4510
2f2f4251
M		 4511 codec->patch_ops = stac92xx_patch_ops;
4512
4513 return 0;
4514}
4515
8e21c34c
TD		 4516static int patch_stac925x(struct hda_codec *codec)
4517{
4518 struct sigmatel_spec *spec;
4519 int err;
4520
4521 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4522 if (spec == NULL)
4523 return -ENOMEM;
4524
4525 codec->spec = spec;
a4eed138 4526 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 4527 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 4528
4529 /* Check first for codec ID */
4530 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
4531 STAC_925x_MODELS,
4532 stac925x_models,
4533 stac925x_codec_id_cfg_tbl);
4534
4535 /* Now checks for PCI ID, if codec ID is not found */
4536 if (spec->board_config < 0)
4537 spec->board_config = snd_hda_check_board_config(codec,
4538 STAC_925x_MODELS,
8e21c34c
TD		 4539 stac925x_models,
4540 stac925x_cfg_tbl);
9e507abd 4541 again:
8e21c34c 4542 if (spec->board_config < 0) {
9cb36c2a 4543 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2c11f955 4544 "using BIOS defaults\n");
8e21c34c 4545 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4546 } else
4547 err = stac_save_pin_cfgs(codec,
4548 stac925x_brd_tbl[spec->board_config]);
4549 if (err < 0) {
4550 stac92xx_free(codec);
4551 return err;
8e21c34c
TD		 4552 }
4553
4554 spec->multiout.max_channels = 2;
4555 spec->multiout.num_dacs = 1;
4556 spec->multiout.dac_nids = stac925x_dac_nids;
4557 spec->adc_nids = stac925x_adc_nids;
4558 spec->mux_nids = stac925x_mux_nids;
4559 spec->num_muxes = 1;
9e05b7a3 4560 spec->num_adcs = 1;
a64135a2 4561 spec->num_pwrs = 0;
2c11f955
TD		 4562 switch (codec->vendor_id) {
4563 case 0x83847632: /* STAC9202 */
4564 case 0x83847633: /* STAC9202D */
4565 case 0x83847636: /* STAC9251 */
4566 case 0x83847637: /* STAC9251D */
f6e9852a 4567 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4568 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4569 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4570 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4571 break;
4572 default:
4573 spec->num_dmics = 0;
4574 break;
4575 }
8e21c34c
TD		 4576
4577 spec->init = stac925x_core_init;
4578 spec->mixer = stac925x_mixer;
4579
4580 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4581 if (!err) {
4582 if (spec->board_config < 0) {
4583 printk(KERN_WARNING "hda_codec: No auto-config is "
4584 "available, default to model=ref\n");
4585 spec->board_config = STAC_925x_REF;
4586 goto again;
4587 }
4588 err = -EINVAL;
4589 }
8e21c34c
TD		 4590 if (err < 0) {
4591 stac92xx_free(codec);
4592 return err;
4593 }
4594
4595 codec->patch_ops = stac92xx_patch_ops;
4596
4597 return 0;
4598}
4599
e1f0d669
MR		 4600static struct hda_input_mux stac92hd73xx_dmux = {
4601 .num_items = 4,
4602 .items = {
4603 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4604 { "Digital Mic 1", 0x09 },
4605 { "Digital Mic 2", 0x0a },
2a9c7816 4606 { "CD", 0x08 },
e1f0d669
MR		 4607 }
4608};
4609
4610static int patch_stac92hd73xx(struct hda_codec *codec)
4611{
4612 struct sigmatel_spec *spec;
4613 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4614 int err = 0;
c21ca4a8 4615 int num_dacs;
e1f0d669
MR		 4616
4617 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4618 if (spec == NULL)
4619 return -ENOMEM;
4620
4621 codec->spec = spec;
e99d32b3 4622 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4623 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4624 spec->pin_nids = stac92hd73xx_pin_nids;
4625 spec->board_config = snd_hda_check_board_config(codec,
4626 STAC_92HD73XX_MODELS,
4627 stac92hd73xx_models,
4628 stac92hd73xx_cfg_tbl);
4629again:
4630 if (spec->board_config < 0) {
4631 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4632 " STAC92HD73XX, using BIOS defaults\n");
4633 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4634 } else
4635 err = stac_save_pin_cfgs(codec,
4636 stac92hd73xx_brd_tbl[spec->board_config]);
4637 if (err < 0) {
4638 stac92xx_free(codec);
4639 return err;
e1f0d669
MR		 4640 }
4641
c21ca4a8 4642 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 4643 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4644
c21ca4a8 4645 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 4646 printk(KERN_WARNING "hda_codec: Could not determine "
4647 "number of channels defaulting to DAC count\n");
c21ca4a8 4648 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 4649 }
c21ca4a8 4650 switch (num_dacs) {
e1f0d669
MR		 4651 case 0x3: /* 6 Channel */
4652 spec->mixer = stac92hd73xx_6ch_mixer;
4653 spec->init = stac92hd73xx_6ch_core_init;
4654 break;
4655 case 0x4: /* 8 Channel */
e1f0d669
MR		 4656 spec->mixer = stac92hd73xx_8ch_mixer;
4657 spec->init = stac92hd73xx_8ch_core_init;
4658 break;
4659 case 0x5: /* 10 Channel */
e1f0d669
MR		 4660 spec->mixer = stac92hd73xx_10ch_mixer;
4661 spec->init = stac92hd73xx_10ch_core_init;
c21ca4a8
TI		 4662 }
4663 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 4664
e1f0d669
MR		 4665 spec->aloopback_mask = 0x01;
4666 spec->aloopback_shift = 8;
4667
1cd2224c 4668 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4669 spec->mux_nids = stac92hd73xx_mux_nids;
4670 spec->adc_nids = stac92hd73xx_adc_nids;
4671 spec->dmic_nids = stac92hd73xx_dmic_nids;
4672 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4673 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4674 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4675 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4676
4677 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4678 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4679 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4680 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4681 sizeof(stac92hd73xx_dmux));
4682
a7662640 4683 switch (spec->board_config) {
6b3ab21e 4684 case STAC_DELL_EQ:
d654a660 4685 spec->init = dell_eq_core_init;
6b3ab21e 4686 /* fallthru */
661cd8fb
TI		 4687 case STAC_DELL_M6_AMIC:
4688 case STAC_DELL_M6_DMIC:
4689 case STAC_DELL_M6_BOTH:
2a9c7816 4690 spec->num_smuxes = 0;
2a9c7816
MR		 4691 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4692 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
c0cea0d0 4693 spec->eapd_switch = 0;
2a9c7816 4694 spec->num_amps = 1;
6b3ab21e 4695
c21ca4a8 4696 if (spec->board_config != STAC_DELL_EQ)
6b3ab21e 4697 spec->init = dell_m6_core_init;
661cd8fb
TI		 4698 switch (spec->board_config) {
4699 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4700 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4701 spec->num_dmics = 0;
2a9c7816 4702 spec->private_dimux.num_items = 1;
a7662640 4703 break;
661cd8fb 4704 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4705 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4706 spec->num_dmics = 1;
2a9c7816 4707 spec->private_dimux.num_items = 2;
a7662640 4708 break;
661cd8fb 4709 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4710 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4711 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4712 spec->num_dmics = 1;
2a9c7816 4713 spec->private_dimux.num_items = 2;
a7662640
MR		 4714 break;
4715 }
4716 break;
4717 default:
4718 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4719 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 4720 spec->eapd_switch = 1;
a7662640 4721 }
b2c4f4d7
MR		 4722 if (spec->board_config > STAC_92HD73XX_REF) {
4723 /* GPIO0 High = Enable EAPD */
4724 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4725 spec->gpio_data = 0x01;
4726 }
2a9c7816 4727 spec->dinput_mux = &spec->private_dimux;
a7662640 4728
a64135a2
MR		 4729 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4730 spec->pwr_nids = stac92hd73xx_pwr_nids;
4731
d9737751 4732 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4733
4734 if (!err) {
4735 if (spec->board_config < 0) {
4736 printk(KERN_WARNING "hda_codec: No auto-config is "
4737 "available, default to model=ref\n");
4738 spec->board_config = STAC_92HD73XX_REF;
4739 goto again;
4740 }
4741 err = -EINVAL;
4742 }
4743
4744 if (err < 0) {
4745 stac92xx_free(codec);
4746 return err;
4747 }
4748
9e43f0de
TI		 4749 if (spec->board_config == STAC_92HD73XX_NO_JD)
4750 spec->hp_detect = 0;
4751
e1f0d669
MR		 4752 codec->patch_ops = stac92xx_patch_ops;
4753
2d34e1b3
TI		 4754 codec->proc_widget_hook = stac92hd7x_proc_hook;
4755
e1f0d669
MR		 4756 return 0;
4757}
4758
d0513fc6
MR		 4759static struct hda_input_mux stac92hd83xxx_dmux = {
4760 .num_items = 3,
4761 .items = {
4762 { "Analog Inputs", 0x03 },
4763 { "Digital Mic 1", 0x04 },
4764 { "Digital Mic 2", 0x05 },
4765 }
4766};
4767
4768static int patch_stac92hd83xxx(struct hda_codec *codec)
4769{
4770 struct sigmatel_spec *spec;
65557f35 4771 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 4772 int err;
65557f35 4773 int num_dacs;
d0513fc6
MR		 4774
4775 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4776 if (spec == NULL)
4777 return -ENOMEM;
4778
4779 codec->spec = spec;
0ffa9807 4780 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4781 spec->mono_nid = 0x19;
4782 spec->digbeep_nid = 0x21;
4783 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4784 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4785 spec->adc_nids = stac92hd83xxx_adc_nids;
4786 spec->pwr_nids = stac92hd83xxx_pwr_nids;
c15c5060 4787 spec->amp_nids = stac92hd83xxx_amp_nids;
d0513fc6
MR		 4788 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4789 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 4790 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 4791
65557f35
MR		 4792
4793 /* set port 0xe to select the last DAC
4794 */
4795 num_dacs = snd_hda_get_connections(codec, 0x0e,
4796 conn, STAC92HD83_DAC_COUNT + 1) - 1;
4797
4798 snd_hda_codec_write_cache(codec, 0xe, 0,
4799 AC_VERB_SET_CONNECT_SEL, num_dacs);
4800
d0513fc6 4801 spec->init = stac92hd83xxx_core_init;
d0513fc6
MR		 4802 spec->mixer = stac92hd83xxx_mixer;
4803 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4804 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4805 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
c15c5060 4806 spec->num_amps = ARRAY_SIZE(stac92hd83xxx_amp_nids);
d0513fc6
MR		 4807 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4808 spec->dinput_mux = &stac92hd83xxx_dmux;
4809 spec->pin_nids = stac92hd83xxx_pin_nids;
4810 spec->board_config = snd_hda_check_board_config(codec,
4811 STAC_92HD83XXX_MODELS,
4812 stac92hd83xxx_models,
4813 stac92hd83xxx_cfg_tbl);
4814again:
4815 if (spec->board_config < 0) {
4816 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4817 " STAC92HD83XXX, using BIOS defaults\n");
4818 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4819 } else
4820 err = stac_save_pin_cfgs(codec,
4821 stac92hd83xxx_brd_tbl[spec->board_config]);
4822 if (err < 0) {
4823 stac92xx_free(codec);
4824 return err;
d0513fc6
MR		 4825 }
4826
32ed3f46
MR		 4827 switch (codec->vendor_id) {
4828 case 0x111d7604:
4829 case 0x111d7605:
4830 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
4831 break;
4832 spec->num_pwrs = 0;
4833 break;
4834 }
4835
d0513fc6
MR		 4836 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4837 if (!err) {
4838 if (spec->board_config < 0) {
4839 printk(KERN_WARNING "hda_codec: No auto-config is "
4840 "available, default to model=ref\n");
4841 spec->board_config = STAC_92HD83XXX_REF;
4842 goto again;
4843 }
4844 err = -EINVAL;
4845 }
4846
4847 if (err < 0) {
4848 stac92xx_free(codec);
4849 return err;
4850 }
4851
4852 codec->patch_ops = stac92xx_patch_ops;
4853
2d34e1b3
TI		 4854 codec->proc_widget_hook = stac92hd_proc_hook;
4855
d0513fc6
MR		 4856 return 0;
4857}
4858
4b33c767
MR		 4859static struct hda_input_mux stac92hd71bxx_dmux = {
4860 .num_items = 4,
4861 .items = {
4862 { "Analog Inputs", 0x00 },
4863 { "Mixer", 0x01 },
4864 { "Digital Mic 1", 0x02 },
4865 { "Digital Mic 2", 0x03 },
4866 }
4867};
4868
e035b841
MR		 4869static int patch_stac92hd71bxx(struct hda_codec *codec)
4870{
4871 struct sigmatel_spec *spec;
4872 int err = 0;
4873
4874 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4875 if (spec == NULL)
4876 return -ENOMEM;
4877
4878 codec->spec = spec;
8daaaa97 4879 codec->patch_ops = stac92xx_patch_ops;
e035b841 4880 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4881 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4882 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4883 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4884 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4885 spec->board_config = snd_hda_check_board_config(codec,
4886 STAC_92HD71BXX_MODELS,
4887 stac92hd71bxx_models,
4888 stac92hd71bxx_cfg_tbl);
4889again:
4890 if (spec->board_config < 0) {
4891 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4892 " STAC92HD71BXX, using BIOS defaults\n");
4893 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 4894 } else
4895 err = stac_save_pin_cfgs(codec,
4896 stac92hd71bxx_brd_tbl[spec->board_config]);
4897 if (err < 0) {
4898 stac92xx_free(codec);
4899 return err;
e035b841
MR		 4900 }
4901
41c3b648
TI		 4902 if (spec->board_config > STAC_92HD71BXX_REF) {
4903 /* GPIO0 = EAPD */
4904 spec->gpio_mask = 0x01;
4905 spec->gpio_dir = 0x01;
4906 spec->gpio_data = 0x01;
4907 }
4908
541eee87
MR		 4909 switch (codec->vendor_id) {
4910 case 0x111d76b6: /* 4 Port without Analog Mixer */
4911 case 0x111d76b7:
4912 case 0x111d76b4: /* 6 Port without Analog Mixer */
4913 case 0x111d76b5:
4914 spec->mixer = stac92hd71bxx_mixer;
4915 spec->init = stac92hd71bxx_core_init;
0ffa9807 4916 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4917 break;
aafc4412 4918 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4919 switch (spec->board_config) {
4920 case STAC_HP_M4:
72474be6 4921 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 4922 err = stac_add_event(spec, codec->afg,
4923 STAC_VREF_EVENT, 0x02);
4924 if (err < 0)
4925 return err;
c5d08bb5 4926 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4927 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4928 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 4929 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 4930 AC_USRSP_EN | err);
72474be6
MR		 4931 spec->gpio_mask |= 0x02;
4932 break;
4933 }
8daaaa97 4934 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4935 (codec->revision_id & 0xf) == 1)
8daaaa97 4936 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4937
aafc4412
MR		 4938 /* no output amps */
4939 spec->num_pwrs = 0;
4940 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4941 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4942
4943 /* disable VSW */
4944 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
af9f341a 4945 stac_change_pin_config(codec, 0xf, 0x40f000f0);
aafc4412
MR		 4946 break;
4947 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4948 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4949 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4950
aafc4412
MR		 4951 /* no output amps */
4952 spec->num_pwrs = 0;
4953 /* fallthru */
541eee87 4954 default:
4b33c767 4955 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4956 spec->mixer = stac92hd71bxx_analog_mixer;
4957 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4958 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4959 }
4960
4b33c767 4961 spec->aloopback_mask = 0x50;
541eee87
MR		 4962 spec->aloopback_shift = 0;
4963
8daaaa97 4964 spec->powerdown_adcs = 1;
1cd2224c 4965 spec->digbeep_nid = 0x26;
e035b841
MR		 4966 spec->mux_nids = stac92hd71bxx_mux_nids;
4967 spec->adc_nids = stac92hd71bxx_adc_nids;
4968 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4969 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4970 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4971 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4972
4973 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4974 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4975
6a14f585
MR		 4976 switch (spec->board_config) {
4977 case STAC_HP_M4:
6a14f585 4978 /* enable internal microphone */
af9f341a 4979 stac_change_pin_config(codec, 0x0e, 0x01813040);
b9aea715
MR		 4980 stac92xx_auto_set_pinctl(codec, 0x0e,
4981 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4982 /* fallthru */
4983 case STAC_DELL_M4_2:
4984 spec->num_dmics = 0;
4985 spec->num_smuxes = 0;
4986 spec->num_dmuxes = 0;
4987 break;
4988 case STAC_DELL_M4_1:
4989 case STAC_DELL_M4_3:
4990 spec->num_dmics = 1;
4991 spec->num_smuxes = 0;
4992 spec->num_dmuxes = 0;
6a14f585
MR		 4993 break;
4994 default:
4995 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4996 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4997 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4998 };
4999
c21ca4a8 5000 spec->multiout.dac_nids = spec->dac_nids;
4b33c767
MR		 5001 if (spec->dinput_mux)
5002 spec->private_dimux.num_items +=
5003 spec->num_dmics -
5004 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 5005
5006 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
5007 if (!err) {
5008 if (spec->board_config < 0) {
5009 printk(KERN_WARNING "hda_codec: No auto-config is "
5010 "available, default to model=ref\n");
5011 spec->board_config = STAC_92HD71BXX_REF;
5012 goto again;
5013 }
5014 err = -EINVAL;
5015 }
5016
5017 if (err < 0) {
5018 stac92xx_free(codec);
5019 return err;
5020 }
5021
2d34e1b3
TI		 5022 codec->proc_widget_hook = stac92hd7x_proc_hook;
5023
e035b841
MR		 5024 return 0;
5025};
5026
2f2f4251
M		 5027static int patch_stac922x(struct hda_codec *codec)
5028{
5029 struct sigmatel_spec *spec;
c7d4b2fa 5030 int err;
2f2f4251 5031
e560d8d8 5032 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5033 if (spec == NULL)
5034 return -ENOMEM;
5035
5036 codec->spec = spec;
a4eed138 5037 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 5038 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 5039 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
5040 stac922x_models,
5041 stac922x_cfg_tbl);
536319af 5042 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 5043 spec->gpio_mask = spec->gpio_dir = 0x03;
5044 spec->gpio_data = 0x03;
3fc24d85
TI		 5045 /* Intel Macs have all same PCI SSID, so we need to check
5046 * codec SSID to distinguish the exact models
5047 */
6f0778d8 5048 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 5049 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 5050
5051 case 0x106b0800:
5052 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 5053 break;
5d5d3bc3
IZ		 5054 case 0x106b0600:
5055 case 0x106b0700:
5056 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 5057 break;
5d5d3bc3
IZ		 5058 case 0x106b0e00:
5059 case 0x106b0f00:
5060 case 0x106b1600:
5061 case 0x106b1700:
5062 case 0x106b0200:
5063 case 0x106b1e00:
5064 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 5065 break;
5d5d3bc3
IZ		 5066 case 0x106b1a00:
5067 case 0x00000100:
5068 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 5069 break;
5d5d3bc3
IZ		 5070 case 0x106b0a00:
5071 case 0x106b2200:
5072 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 5073 break;
536319af
NB		 5074 default:
5075 spec->board_config = STAC_INTEL_MAC_V3;
5076 break;
3fc24d85
TI		 5077 }
5078 }
5079
9e507abd 5080 again:
11b44bbd
RF		 5081 if (spec->board_config < 0) {
5082 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
5083 "using BIOS defaults\n");
5084 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5085 } else
5086 err = stac_save_pin_cfgs(codec,
5087 stac922x_brd_tbl[spec->board_config]);
5088 if (err < 0) {
5089 stac92xx_free(codec);
5090 return err;
403d1944 5091 }
2f2f4251 5092
c7d4b2fa
M		 5093 spec->adc_nids = stac922x_adc_nids;
5094 spec->mux_nids = stac922x_mux_nids;
2549413e 5095 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 5096 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 5097 spec->num_dmics = 0;
a64135a2 5098 spec->num_pwrs = 0;
c7d4b2fa
M		 5099
5100 spec->init = stac922x_core_init;
2f2f4251 5101 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 5102
5103 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 5104
3cc08dc6 5105 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 5106 if (!err) {
5107 if (spec->board_config < 0) {
5108 printk(KERN_WARNING "hda_codec: No auto-config is "
5109 "available, default to model=ref\n");
5110 spec->board_config = STAC_D945_REF;
5111 goto again;
5112 }
5113 err = -EINVAL;
5114 }
3cc08dc6
MP		 5115 if (err < 0) {
5116 stac92xx_free(codec);
5117 return err;
5118 }
5119
5120 codec->patch_ops = stac92xx_patch_ops;
5121
807a4636
TI		 5122 /* Fix Mux capture level; max to 2 */
5123 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
5124 (0 << AC_AMPCAP_OFFSET_SHIFT) |
5125 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
5126 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
5127 (0 << AC_AMPCAP_MUTE_SHIFT));
5128
3cc08dc6
MP		 5129 return 0;
5130}
5131
5132static int patch_stac927x(struct hda_codec *codec)
5133{
5134 struct sigmatel_spec *spec;
5135 int err;
5136
5137 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5138 if (spec == NULL)
5139 return -ENOMEM;
5140
5141 codec->spec = spec;
a4eed138 5142 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 5143 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 5144 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
5145 stac927x_models,
5146 stac927x_cfg_tbl);
9e507abd 5147 again:
8e9068b1
MR		 5148 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
5149 if (spec->board_config < 0)
5150 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
5151 "STAC927x, using BIOS defaults\n");
11b44bbd 5152 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5153 } else
5154 err = stac_save_pin_cfgs(codec,
5155 stac927x_brd_tbl[spec->board_config]);
5156 if (err < 0) {
5157 stac92xx_free(codec);
5158 return err;
3cc08dc6
MP		 5159 }
5160
1cd2224c 5161 spec->digbeep_nid = 0x23;
8e9068b1
MR		 5162 spec->adc_nids = stac927x_adc_nids;
5163 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
5164 spec->mux_nids = stac927x_mux_nids;
5165 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 5166 spec->smux_nids = stac927x_smux_nids;
5167 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 5168 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 5169 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 5170 spec->multiout.dac_nids = spec->dac_nids;
5171
81d3dbde 5172 switch (spec->board_config) {
93ed1503 5173 case STAC_D965_3ST:
93ed1503 5174 case STAC_D965_5ST:
8e9068b1 5175 /* GPIO0 High = Enable EAPD */
0fc9dec4 5176 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 5177 spec->gpio_data = 0x01;
8e9068b1
MR		 5178 spec->num_dmics = 0;
5179
93ed1503 5180 spec->init = d965_core_init;
9e05b7a3 5181 spec->mixer = stac927x_mixer;
81d3dbde 5182 break;
8e9068b1 5183 case STAC_DELL_BIOS:
780c8be4
MR		 5184 switch (codec->subsystem_id) {
5185 case 0x10280209:
5186 case 0x1028022e:
5187 /* correct the device field to SPDIF out */
af9f341a 5188 stac_change_pin_config(codec, 0x21, 0x01442070);
780c8be4
MR		 5189 break;
5190 };
03d7ca17 5191 /* configure the analog microphone on some laptops */
af9f341a 5192 stac_change_pin_config(codec, 0x0c, 0x90a79130);
2f32d909 5193 /* correct the front output jack as a hp out */
af9f341a 5194 stac_change_pin_config(codec, 0x0f, 0x0227011f);
c481fca3 5195 /* correct the front input jack as a mic */
af9f341a 5196 stac_change_pin_config(codec, 0x0e, 0x02a79130);
c481fca3 5197 /* fallthru */
8e9068b1
MR		 5198 case STAC_DELL_3ST:
5199 /* GPIO2 High = Enable EAPD */
0fc9dec4 5200 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 5201 spec->gpio_data = 0x04;
7f16859a
MR		 5202 spec->dmic_nids = stac927x_dmic_nids;
5203 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 5204
8e9068b1
MR		 5205 spec->init = d965_core_init;
5206 spec->mixer = stac927x_mixer;
5207 spec->dmux_nids = stac927x_dmux_nids;
1697055e 5208 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 5209 break;
5210 default:
b2c4f4d7
MR		 5211 if (spec->board_config > STAC_D965_REF) {
5212 /* GPIO0 High = Enable EAPD */
5213 spec->eapd_mask = spec->gpio_mask = 0x01;
5214 spec->gpio_dir = spec->gpio_data = 0x01;
5215 }
8e9068b1
MR		 5216 spec->num_dmics = 0;
5217
5218 spec->init = stac927x_core_init;
5219 spec->mixer = stac927x_mixer;
7f16859a
MR		 5220 }
5221
a64135a2 5222 spec->num_pwrs = 0;
e1f0d669
MR		 5223 spec->aloopback_mask = 0x40;
5224 spec->aloopback_shift = 0;
c0cea0d0 5225 spec->eapd_switch = 1;
8e9068b1 5226
3cc08dc6 5227 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 5228 if (!err) {
5229 if (spec->board_config < 0) {
5230 printk(KERN_WARNING "hda_codec: No auto-config is "
5231 "available, default to model=ref\n");
5232 spec->board_config = STAC_D965_REF;
5233 goto again;
5234 }
5235 err = -EINVAL;
5236 }
c7d4b2fa
M		 5237 if (err < 0) {
5238 stac92xx_free(codec);
5239 return err;
5240 }
2f2f4251
M		 5241
5242 codec->patch_ops = stac92xx_patch_ops;
5243
2d34e1b3
TI		 5244 codec->proc_widget_hook = stac927x_proc_hook;
5245
52987656
TI		 5246 /*
5247 * !!FIXME!!
5248 * The STAC927x seem to require fairly long delays for certain
5249 * command sequences. With too short delays (even if the answer
5250 * is set to RIRB properly), it results in the silence output
5251 * on some hardwares like Dell.
5252 *
5253 * The below flag enables the longer delay (see get_response
5254 * in hda_intel.c).
5255 */
5256 codec->bus->needs_damn_long_delay = 1;
5257
e28d8322
TI		 5258 /* no jack detecion for ref-no-jd model */
5259 if (spec->board_config == STAC_D965_REF_NO_JD)
5260 spec->hp_detect = 0;
5261
2f2f4251
M		 5262 return 0;
5263}
5264
f3302a59
MP		 5265static int patch_stac9205(struct hda_codec *codec)
5266{
5267 struct sigmatel_spec *spec;
8259980e 5268 int err;
f3302a59
MP		 5269
5270 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5271 if (spec == NULL)
5272 return -ENOMEM;
5273
5274 codec->spec = spec;
a4eed138 5275 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 5276 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 5277 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
5278 stac9205_models,
5279 stac9205_cfg_tbl);
9e507abd 5280 again:
11b44bbd
RF		 5281 if (spec->board_config < 0) {
5282 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
5283 err = stac92xx_save_bios_config_regs(codec);
af9f341a
TI		 5284 } else
5285 err = stac_save_pin_cfgs(codec,
5286 stac9205_brd_tbl[spec->board_config]);
5287 if (err < 0) {
5288 stac92xx_free(codec);
5289 return err;
f3302a59
MP		 5290 }
5291
1cd2224c 5292 spec->digbeep_nid = 0x23;
f3302a59 5293 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 5294 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 5295 spec->mux_nids = stac9205_mux_nids;
2549413e 5296 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 5297 spec->smux_nids = stac9205_smux_nids;
5298 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 5299 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 5300 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 5301 spec->dmux_nids = stac9205_dmux_nids;
1697055e 5302 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 5303 spec->num_pwrs = 0;
f3302a59
MP		 5304
5305 spec->init = stac9205_core_init;
5306 spec->mixer = stac9205_mixer;
5307
e1f0d669
MR		 5308 spec->aloopback_mask = 0x40;
5309 spec->aloopback_shift = 0;
c0cea0d0 5310 spec->eapd_switch = 1;
f3302a59 5311 spec->multiout.dac_nids = spec->dac_nids;
87d48363 5312
ae0a8ed8 5313 switch (spec->board_config){
ae0a8ed8 5314 case STAC_9205_DELL_M43:
87d48363 5315 /* Enable SPDIF in/out */
af9f341a
TI		 5316 stac_change_pin_config(codec, 0x1f, 0x01441030);
5317 stac_change_pin_config(codec, 0x20, 0x1c410030);
87d48363 5318
4fe5195c 5319 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 5320 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
5321 if (err < 0)
5322 return err;
c5d08bb5 5323 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 5324 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
5325 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 5326 AC_VERB_SET_UNSOLICITED_ENABLE,
5327 AC_USRSP_EN | err);
4fe5195c
MR		 5328
5329 spec->gpio_dir = 0x0b;
0fc9dec4 5330 spec->eapd_mask = 0x01;
4fe5195c
MR		 5331 spec->gpio_mask = 0x1b;
5332 spec->gpio_mute = 0x10;
e2e7d624 5333 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 5334 * GPIO3 Low = DRM
87d48363 5335 */
4fe5195c 5336 spec->gpio_data = 0x01;
ae0a8ed8 5337 break;
b2c4f4d7
MR		 5338 case STAC_9205_REF:
5339 /* SPDIF-In enabled */
5340 break;
ae0a8ed8
TD		 5341 default:
5342 /* GPIO0 High = EAPD */
0fc9dec4 5343 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5344 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5345 break;
5346 }
33382403 5347
f3302a59 5348 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5349 if (!err) {
5350 if (spec->board_config < 0) {
5351 printk(KERN_WARNING "hda_codec: No auto-config is "
5352 "available, default to model=ref\n");
5353 spec->board_config = STAC_9205_REF;
5354 goto again;
5355 }
5356 err = -EINVAL;
5357 }
f3302a59
MP		 5358 if (err < 0) {
5359 stac92xx_free(codec);
5360 return err;
5361 }
5362
5363 codec->patch_ops = stac92xx_patch_ops;
5364
2d34e1b3
TI		 5365 codec->proc_widget_hook = stac9205_proc_hook;
5366
f3302a59
MP		 5367 return 0;
5368}
5369
db064e50 5370/*
6d859065 5371 * STAC9872 hack
db064e50
TI		 5372 */
5373
99ccc560 5374/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5375static hda_nid_t vaio_dacs[] = { 0x2 };
5376#define VAIO_HP_DAC 0x5
5377static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5378static hda_nid_t vaio_mux_nids[] = { 0x15 };
5379
5380static struct hda_input_mux vaio_mux = {
a3a2f429 5381 .num_items = 3,
db064e50 5382 .items = {
d773781c 5383 /* { "HP", 0x0 }, */
1624cb9a
TI		 5384 { "Mic Jack", 0x1 },
5385 { "Internal Mic", 0x2 },
db064e50
TI		 5386 { "PCM", 0x3 },
5387 }
5388};
5389
5390static struct hda_verb vaio_init[] = {
5391 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5392 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5393 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5394 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5395 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5396 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5397 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5398 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5399 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5400 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5401 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5402 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5403 {}
5404};
5405
6d859065
GM		 5406static struct hda_verb vaio_ar_init[] = {
5407 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5408 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5409 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5410 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5411/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5412 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5413 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5414 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5415 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5416/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5417 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5418 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5419 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5420 {}
5421};
5422
db064e50 5423static struct snd_kcontrol_new vaio_mixer[] = {
127e82e3
TI		 5424 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5425 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5426 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5427 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
db064e50
TI		 5428 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5429 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5430 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5431 {
5432 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5433 .name = "Capture Source",
5434 .count = 1,
5435 .info = stac92xx_mux_enum_info,
5436 .get = stac92xx_mux_enum_get,
5437 .put = stac92xx_mux_enum_put,
5438 },
5439 {}
5440};
5441
6d859065 5442static struct snd_kcontrol_new vaio_ar_mixer[] = {
127e82e3
TI		 5443 HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
5444 HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
5445 HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
5446 HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
6d859065
GM		 5447 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5448 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5449 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5450 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5451 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5452 {
5453 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5454 .name = "Capture Source",
5455 .count = 1,
5456 .info = stac92xx_mux_enum_info,
5457 .get = stac92xx_mux_enum_get,
5458 .put = stac92xx_mux_enum_put,
5459 },
5460 {}
5461};
5462
5463static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5464 .build_controls = stac92xx_build_controls,
5465 .build_pcms = stac92xx_build_pcms,
5466 .init = stac92xx_init,
5467 .free = stac92xx_free,
cb53c626 5468#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5469 .resume = stac92xx_resume,
5470#endif
5471};
5472
72e7b0dd
TI		 5473static int stac9872_vaio_init(struct hda_codec *codec)
5474{
5475 int err;
5476
5477 err = stac92xx_init(codec);
5478 if (err < 0)
5479 return err;
5480 if (codec->patch_ops.unsol_event)
5481 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5482 return 0;
5483}
5484
5485static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5486{
e6e3ea25 5487 if (get_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5488 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5489 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5490 } else {
5491 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5492 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5493 }
5494}
5495
5496static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5497{
5498 switch (res >> 26) {
5499 case STAC_HP_EVENT:
5500 stac9872_vaio_hp_detect(codec, res);
5501 break;
5502 }
5503}
5504
5505static struct hda_codec_ops stac9872_vaio_patch_ops = {
5506 .build_controls = stac92xx_build_controls,
5507 .build_pcms = stac92xx_build_pcms,
5508 .init = stac9872_vaio_init,
5509 .free = stac92xx_free,
5510 .unsol_event = stac9872_vaio_unsol_event,
5511#ifdef CONFIG_PM
5512 .resume = stac92xx_resume,
5513#endif
5514};
5515
6d859065
GM		 5516enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5517 CXD9872RD_VAIO,
5518 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5519 STAC9872AK_VAIO,
5520 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5521 STAC9872K_VAIO,
5522 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5523 CXD9872AKD_VAIO,
5524 STAC_9872_MODELS,
5525};
5526
5527static const char *stac9872_models[STAC_9872_MODELS] = {
5528 [CXD9872RD_VAIO] = "vaio",
5529 [CXD9872AKD_VAIO] = "vaio-ar",
5530};
5531
5532static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5533 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5534 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5535 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5536 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5537 {}
5538};
5539
6d859065 5540static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5541{
5542 struct sigmatel_spec *spec;
5543 int board_config;
5544
f5fcc13c
TI		 5545 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5546 stac9872_models,
5547 stac9872_cfg_tbl);
db064e50
TI		 5548 if (board_config < 0)
5549 /* unknown config, let generic-parser do its job... */
5550 return snd_hda_parse_generic_codec(codec);
5551
5552 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5553 if (spec == NULL)
5554 return -ENOMEM;
5555
5556 codec->spec = spec;
5557 switch (board_config) {
6d859065
GM		 5558 case CXD9872RD_VAIO:
5559 case STAC9872AK_VAIO:
5560 case STAC9872K_VAIO:
db064e50
TI		 5561 spec->mixer = vaio_mixer;
5562 spec->init = vaio_init;
5563 spec->multiout.max_channels = 2;
5564 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5565 spec->multiout.dac_nids = vaio_dacs;
5566 spec->multiout.hp_nid = VAIO_HP_DAC;
5567 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5568 spec->adc_nids = vaio_adcs;
a64135a2 5569 spec->num_pwrs = 0;
db064e50
TI		 5570 spec->input_mux = &vaio_mux;
5571 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5572 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5573 break;
6d859065
GM		 5574
5575 case CXD9872AKD_VAIO:
5576 spec->mixer = vaio_ar_mixer;
5577 spec->init = vaio_ar_init;
5578 spec->multiout.max_channels = 2;
5579 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5580 spec->multiout.dac_nids = vaio_dacs;
5581 spec->multiout.hp_nid = VAIO_HP_DAC;
5582 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5583 spec->num_pwrs = 0;
6d859065
GM		 5584 spec->adc_nids = vaio_adcs;
5585 spec->input_mux = &vaio_mux;
5586 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5587 codec->patch_ops = stac9872_patch_ops;
6d859065 5588 break;
db064e50
TI		 5589 }
5590
db064e50
TI		 5591 return 0;
5592}
5593
5594
2f2f4251
M		 5595/*
5596 * patch entries
5597 */
1289e9e8 5598static struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 5599 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5600 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5601 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5602 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5603 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5604 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5605 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5606 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5607 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5608 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5609 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5610 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5611 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5612 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5613 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5614 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5615 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5616 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5617 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5618 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5619 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5620 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5621 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5622 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5623 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5624 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5625 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5626 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5627 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5628 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5629 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5630 /* The following does not take into account .id=0x83847661 when subsys =
5631 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5632 * currently not fully supported.
5633 */
5634 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5635 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5636 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5637 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5638 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5639 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5640 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5641 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5642 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5643 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5644 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5645 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5646 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5647 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5648 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5649 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5650 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5651 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5652 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5653 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5654 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5655 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5656 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5657 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5658 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5659 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5660 {} /* terminator */
5661};
1289e9e8
TI		 5662
5663MODULE_ALIAS("snd-hda-codec-id:8384*");
5664MODULE_ALIAS("snd-hda-codec-id:111d*");
5665
5666MODULE_LICENSE("GPL");
5667MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5668
5669static struct hda_codec_preset_list sigmatel_list = {
5670 .preset = snd_hda_preset_sigmatel,
5671 .owner = THIS_MODULE,
5672};
5673
5674static int __init patch_sigmatel_init(void)
5675{
5676 return snd_hda_add_codec_preset(&sigmatel_list);
5677}
5678
5679static void __exit patch_sigmatel_exit(void)
5680{
5681 snd_hda_delete_codec_preset(&sigmatel_list);
5682}
5683
5684module_init(patch_sigmatel_init)
5685module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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