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[ALSA] hda-codec - Check value range in ctl callbacks
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e035b841
MR		 64enum {
65 STAC_92HD71BXX_REF,
66 STAC_92HD71BXX_MODELS
67};
68
8e21c34c
TD		 69enum {
70 STAC_925x_REF,
71 STAC_M2_2,
72 STAC_MA6,
2c11f955 73 STAC_PA6,
8e21c34c
TD		 74 STAC_925x_MODELS
75};
76
f5fcc13c
TI		 77enum {
78 STAC_D945_REF,
79 STAC_D945GTP3,
80 STAC_D945GTP5,
5d5d3bc3
IZ		 81 STAC_INTEL_MAC_V1,
82 STAC_INTEL_MAC_V2,
83 STAC_INTEL_MAC_V3,
84 STAC_INTEL_MAC_V4,
85 STAC_INTEL_MAC_V5,
dfe495d0 86 /* for backward compatibility */
f5fcc13c 87 STAC_MACMINI,
3fc24d85 88 STAC_MACBOOK,
6f0778d8
NB		 89 STAC_MACBOOK_PRO_V1,
90 STAC_MACBOOK_PRO_V2,
f16928fb 91 STAC_IMAC_INTEL,
0dae0f83 92 STAC_IMAC_INTEL_20,
dfe495d0
TI		 93 STAC_922X_DELL_D81,
94 STAC_922X_DELL_D82,
95 STAC_922X_DELL_M81,
96 STAC_922X_DELL_M82,
f5fcc13c
TI		 97 STAC_922X_MODELS
98};
99
100enum {
101 STAC_D965_REF,
102 STAC_D965_3ST,
103 STAC_D965_5ST,
4ff076e5 104 STAC_DELL_3ST,
f5fcc13c
TI		 105 STAC_927X_MODELS
106};
403d1944 107
2f2f4251 108struct sigmatel_spec {
c8b6bf9b 109 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 110 unsigned int num_mixers;
111
403d1944 112 int board_config;
c7d4b2fa 113 unsigned int surr_switch: 1;
403d1944
MP		 114 unsigned int line_switch: 1;
115 unsigned int mic_switch: 1;
3cc08dc6 116 unsigned int alt_switch: 1;
82bc955f 117 unsigned int hp_detect: 1;
62fe78e9 118 unsigned int gpio_mute: 1;
c7d4b2fa 119
8259980e
TI		 120 unsigned int gpio_mask, gpio_data;
121
2f2f4251
M		 122 /* playback */
123 struct hda_multi_out multiout;
3cc08dc6 124 hda_nid_t dac_nids[5];
2f2f4251
M		 125
126 /* capture */
127 hda_nid_t *adc_nids;
2f2f4251 128 unsigned int num_adcs;
dabbed6f
M		 129 hda_nid_t *mux_nids;
130 unsigned int num_muxes;
8b65727b
MP		 131 hda_nid_t *dmic_nids;
132 unsigned int num_dmics;
133 hda_nid_t dmux_nid;
dabbed6f 134 hda_nid_t dig_in_nid;
2f2f4251 135
2f2f4251
M		 136 /* pin widgets */
137 hda_nid_t *pin_nids;
138 unsigned int num_pins;
2f2f4251 139 unsigned int *pin_configs;
11b44bbd 140 unsigned int *bios_pin_configs;
2f2f4251
M		 141
142 /* codec specific stuff */
143 struct hda_verb *init;
c8b6bf9b 144 struct snd_kcontrol_new *mixer;
2f2f4251
M		 145
146 /* capture source */
8b65727b
MP		 147 struct hda_input_mux *dinput_mux;
148 unsigned int cur_dmux;
c7d4b2fa 149 struct hda_input_mux *input_mux;
3cc08dc6 150 unsigned int cur_mux[3];
2f2f4251 151
403d1944
MP		 152 /* i/o switches */
153 unsigned int io_switch[2];
0fb87bb4 154 unsigned int clfe_swap;
5f10c4a9 155 unsigned int aloopback;
2f2f4251 156
c7d4b2fa
M		 157 struct hda_pcm pcm_rec[2]; /* PCM information */
158
159 /* dynamic controls and input_mux */
160 struct auto_pin_cfg autocfg;
161 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 162 struct snd_kcontrol_new *kctl_alloc;
8b65727b 163 struct hda_input_mux private_dimux;
c7d4b2fa 164 struct hda_input_mux private_imux;
2f2f4251
M		 165};
166
167static hda_nid_t stac9200_adc_nids[1] = {
168 0x03,
169};
170
171static hda_nid_t stac9200_mux_nids[1] = {
172 0x0c,
173};
174
175static hda_nid_t stac9200_dac_nids[1] = {
176 0x02,
177};
178
e035b841
MR		 179static hda_nid_t stac92hd71bxx_adc_nids[2] = {
180 0x12, 0x13,
181};
182
183static hda_nid_t stac92hd71bxx_mux_nids[2] = {
184 0x1a, 0x1b
185};
186
187static hda_nid_t stac92hd71bxx_dac_nids[2] = {
188 0x10, /*0x11, */
189};
190
191#define STAC92HD71BXX_NUM_DMICS 2
192static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
193 0x18, 0x19, 0
194};
195
8e21c34c
TD		 196static hda_nid_t stac925x_adc_nids[1] = {
197 0x03,
198};
199
200static hda_nid_t stac925x_mux_nids[1] = {
201 0x0f,
202};
203
204static hda_nid_t stac925x_dac_nids[1] = {
205 0x02,
206};
207
f6e9852a
TI		 208#define STAC925X_NUM_DMICS 1
209static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
210 0x15, 0
2c11f955
TD		 211};
212
2f2f4251
M		 213static hda_nid_t stac922x_adc_nids[2] = {
214 0x06, 0x07,
215};
216
217static hda_nid_t stac922x_mux_nids[2] = {
218 0x12, 0x13,
219};
220
3cc08dc6
MP		 221static hda_nid_t stac927x_adc_nids[3] = {
222 0x07, 0x08, 0x09
223};
224
225static hda_nid_t stac927x_mux_nids[3] = {
226 0x15, 0x16, 0x17
227};
228
7f16859a
MR		 229#define STAC927X_NUM_DMICS 2
230static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
231 0x13, 0x14, 0
232};
233
f3302a59
MP		 234static hda_nid_t stac9205_adc_nids[2] = {
235 0x12, 0x13
236};
237
238static hda_nid_t stac9205_mux_nids[2] = {
239 0x19, 0x1a
240};
241
f6e9852a
TI		 242#define STAC9205_NUM_DMICS 2
243static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
244 0x17, 0x18, 0
8b65727b
MP		 245};
246
c7d4b2fa 247static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 248 0x08, 0x09, 0x0d, 0x0e,
249 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 250};
251
8e21c34c
TD		 252static hda_nid_t stac925x_pin_nids[8] = {
253 0x07, 0x08, 0x0a, 0x0b,
254 0x0c, 0x0d, 0x10, 0x11,
255};
256
2f2f4251
M		 257static hda_nid_t stac922x_pin_nids[10] = {
258 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
259 0x0f, 0x10, 0x11, 0x15, 0x1b,
260};
261
e035b841
MR		 262static hda_nid_t stac92hd71bxx_pin_nids[10] = {
263 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
264 0x0f, 0x14, 0x18, 0x19, 0x1e,
265};
266
3cc08dc6
MP		 267static hda_nid_t stac927x_pin_nids[14] = {
268 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
269 0x0f, 0x10, 0x11, 0x12, 0x13,
270 0x14, 0x21, 0x22, 0x23,
271};
272
f3302a59
MP		 273static hda_nid_t stac9205_pin_nids[12] = {
274 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
275 0x0f, 0x14, 0x16, 0x17, 0x18,
276 0x21, 0x22,
f3302a59
MP		 277};
278
8b65727b
MP		 279static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
280 struct snd_ctl_elem_info *uinfo)
281{
282 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
283 struct sigmatel_spec *spec = codec->spec;
284 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
285}
286
287static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
288 struct snd_ctl_elem_value *ucontrol)
289{
290 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
291 struct sigmatel_spec *spec = codec->spec;
292
293 ucontrol->value.enumerated.item[0] = spec->cur_dmux;
294 return 0;
295}
296
297static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
298 struct snd_ctl_elem_value *ucontrol)
299{
300 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
301 struct sigmatel_spec *spec = codec->spec;
302
303 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
304 spec->dmux_nid, &spec->cur_dmux);
305}
306
c8b6bf9b 307static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 308{
309 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
310 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 311 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 312}
313
c8b6bf9b 314static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 315{
316 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
317 struct sigmatel_spec *spec = codec->spec;
318 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
319
320 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
321 return 0;
322}
323
c8b6bf9b 324static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 325{
326 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
327 struct sigmatel_spec *spec = codec->spec;
328 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
329
c7d4b2fa 330 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 331 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
332}
333
5f10c4a9
ML		 334#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
335
336static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
337 struct snd_ctl_elem_value *ucontrol)
338{
339 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
340 struct sigmatel_spec *spec = codec->spec;
341
342 ucontrol->value.integer.value[0] = spec->aloopback;
343 return 0;
344}
345
346static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_value *ucontrol)
348{
349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
350 struct sigmatel_spec *spec = codec->spec;
351 unsigned int dac_mode;
68ea7b2f 352 unsigned int val;
5f10c4a9 353
68ea7b2f
TI		 354 val = !!ucontrol->value.integer.value[0];
355 if (spec->aloopback == val)
5f10c4a9
ML		 356 return 0;
357
68ea7b2f 358 spec->aloopback = val;
5f10c4a9
ML		 359
360 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
361 kcontrol->private_value & 0xFFFF, 0x0);
362
363 if (spec->aloopback) {
364 snd_hda_power_up(codec);
365 dac_mode |= 0x40;
366 } else {
367 snd_hda_power_down(codec);
368 dac_mode &= ~0x40;
369 }
370
371 snd_hda_codec_write_cache(codec, codec->afg, 0,
372 kcontrol->private_value >> 16, dac_mode);
373
374 return 1;
375}
376
68ea7b2f
TI		 377static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_info *uinfo)
379{
380 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
381 uinfo->count = 1;
382 uinfo->value.integer.min = 0;
383 uinfo->value.integer.max = 127;
384 return 0;
385}
386
387static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_value *ucontrol)
389{
390 ucontrol->value.integer.value[0] = kcontrol->private_value & 0xff;
391 return 0;
392}
393
394static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
395 struct snd_ctl_elem_value *ucontrol)
396{
397 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
398 unsigned int oval = kcontrol->private_value & 0xff;
399 unsigned int val;
400
401 val = ucontrol->value.integer.value[0] & 0xff;
402 if (val == oval)
403 return 0;
404
405 kcontrol->private_value &= ~0xff;
406 kcontrol->private_value |= val;
407
408 snd_hda_codec_write_cache(codec, kcontrol->private_value >> 16, 0,
409 AC_VERB_SET_VOLUME_KNOB_CONTROL, val | 0x80);
410 return 1;
411}
412
c7d4b2fa 413static struct hda_verb stac9200_core_init[] = {
2f2f4251 414 /* set dac0mux for dac converter */
c7d4b2fa 415 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 416 {}
417};
418
1194b5b7
TI		 419static struct hda_verb stac9200_eapd_init[] = {
420 /* set dac0mux for dac converter */
421 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
422 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
423 {}
424};
425
e035b841
MR		 426static struct hda_verb stac92hd71bxx_core_init[] = {
427 /* set master volume and direct control */
428 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
429 /* connect headphone jack to dac1 */
430 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 431 /* connect ports 0d and 0f to audio mixer */
432 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
433 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
434 /* unmute dac0 input in audio mixer */
435 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 436 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
437 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
438 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
439 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
440 /* unmute mono out node */
441 { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
442 {}
443};
444
8e21c34c
TD		 445static struct hda_verb stac925x_core_init[] = {
446 /* set dac0mux for dac converter */
447 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
448 {}
449};
450
c7d4b2fa 451static struct hda_verb stac922x_core_init[] = {
2f2f4251 452 /* set master volume and direct control */
c7d4b2fa 453 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 454 {}
455};
456
93ed1503 457static struct hda_verb d965_core_init[] = {
19039bd0 458 /* set master volume and direct control */
93ed1503 459 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 460 /* unmute node 0x1b */
461 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
462 /* select node 0x03 as DAC */
463 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
464 {}
465};
466
3cc08dc6
MP		 467static struct hda_verb stac927x_core_init[] = {
468 /* set master volume and direct control */
469 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
470 {}
471};
472
f3302a59
MP		 473static struct hda_verb stac9205_core_init[] = {
474 /* set master volume and direct control */
475 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
476 {}
477};
478
47744f63
MR		 479#define STAC_DIGITAL_INPUT_SOURCE(cnt) \
480 { \
481 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
482 .name = "Digital Input Source", \
483 .count = cnt, \
484 .info = stac92xx_dmux_enum_info, \
485 .get = stac92xx_dmux_enum_get, \
486 .put = stac92xx_dmux_enum_put,\
487 }
488
9e05b7a3 489#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 490 { \
491 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
492 .name = "Input Source", \
9e05b7a3 493 .count = cnt, \
ca7c5a8b
ML		 494 .info = stac92xx_mux_enum_info, \
495 .get = stac92xx_mux_enum_get, \
496 .put = stac92xx_mux_enum_put, \
497 }
498
5f10c4a9
ML		 499#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
500 { \
501 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
502 .name = "Analog Loopback", \
503 .count = 1, \
504 .info = stac92xx_aloopback_info, \
505 .get = stac92xx_aloopback_get, \
506 .put = stac92xx_aloopback_put, \
507 .private_value = verb_read | (verb_write << 16), \
508 }
509
9b35947f
MR		 510#define STAC_VOLKNOB(knob_nid) \
511 { \
512 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
513 .name = "Master Playback Volume", \
514 .count = 1, \
515 .info = stac92xx_volknob_info, \
516 .get = stac92xx_volknob_get, \
517 .put = stac92xx_volknob_put, \
518 .private_value = 127 | (knob_nid << 16), \
519 }
520
c8b6bf9b 521static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 522 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
523 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 524 STAC_INPUT_SOURCE(1),
2f2f4251
M		 525 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
526 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 527 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 528 { } /* end */
529};
530
e035b841
MR		 531static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
532 STAC_DIGITAL_INPUT_SOURCE(1),
533 STAC_INPUT_SOURCE(2),
534 STAC_VOLKNOB(0x28),
535
536 /* hardware gain controls */
9b35947f
MR		 537 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x18, 0x0, HDA_OUTPUT),
538 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x19, 0x0, HDA_OUTPUT),
539
540 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
542 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
543
544 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
545 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
546 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 547
9b35947f
MR		 548 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
549 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 550 { } /* end */
551};
552
8e21c34c 553static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 554 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 555 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
556 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
557 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
558 { } /* end */
559};
560
9e05b7a3 561static struct snd_kcontrol_new stac9205_mixer[] = {
47744f63 562 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3
ML		 563 STAC_INPUT_SOURCE(2),
564 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
9e05b7a3
ML		 565
566 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
567 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
568 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
569
570 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
571 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
572 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
573
2f2f4251
M		 574 { } /* end */
575};
576
19039bd0 577/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 578static struct snd_kcontrol_new stac922x_mixer[] = {
579 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 580 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
581 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
582 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
583
584 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
585 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
586 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 587 { } /* end */
588};
589
9e05b7a3 590
d1d985f0 591static struct snd_kcontrol_new stac927x_mixer[] = {
47744f63 592 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3 593 STAC_INPUT_SOURCE(3),
5f10c4a9 594 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
3cc08dc6 595
9e05b7a3
ML		 596 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
597 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
598 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
599
600 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
601 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
602 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
603
604 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
605 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
606 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 607 { } /* end */
608};
609
2f2f4251
M		 610static int stac92xx_build_controls(struct hda_codec *codec)
611{
612 struct sigmatel_spec *spec = codec->spec;
613 int err;
c7d4b2fa 614 int i;
2f2f4251
M		 615
616 err = snd_hda_add_new_ctls(codec, spec->mixer);
617 if (err < 0)
618 return err;
c7d4b2fa
M		 619
620 for (i = 0; i < spec->num_mixers; i++) {
621 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
622 if (err < 0)
623 return err;
624 }
625
dabbed6f
M		 626 if (spec->multiout.dig_out_nid) {
627 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
628 if (err < 0)
629 return err;
630 }
631 if (spec->dig_in_nid) {
632 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
633 if (err < 0)
634 return err;
635 }
636 return 0;
2f2f4251
M		 637}
638
403d1944 639static unsigned int ref9200_pin_configs[8] = {
dabbed6f 640 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 641 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
642};
643
dfe495d0
TI		 644/*
645 STAC 9200 pin configs for
646 102801A8
647 102801DE
648 102801E8
649*/
650static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 651 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
652 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 653};
654
655/*
656 STAC 9200 pin configs for
657 102801C0
658 102801C1
659*/
660static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 661 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
662 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 663};
664
665/*
666 STAC 9200 pin configs for
667 102801C4 (Dell Dimension E310)
668 102801C5
669 102801C7
670 102801D9
671 102801DA
672 102801E3
673*/
674static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 675 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
676 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 677};
678
679
680/*
681 STAC 9200-32 pin configs for
682 102801B5 (Dell Inspiron 630m)
683 102801D8 (Dell Inspiron 640m)
684*/
685static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 686 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
687 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 688};
689
690/*
691 STAC 9200-32 pin configs for
692 102801C2 (Dell Latitude D620)
693 102801C8
694 102801CC (Dell Latitude D820)
695 102801D4
696 102801D6
697*/
698static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 699 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
700 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 701};
702
703/*
704 STAC 9200-32 pin configs for
705 102801CE (Dell XPS M1710)
706 102801CF (Dell Precision M90)
707*/
708static unsigned int dell9200_m23_pin_configs[8] = {
709 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
710 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
711};
712
713/*
714 STAC 9200-32 pin configs for
715 102801C9
716 102801CA
717 102801CB (Dell Latitude 120L)
718 102801D3
719*/
720static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 721 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
722 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 723};
724
725/*
726 STAC 9200-32 pin configs for
727 102801BD (Dell Inspiron E1505n)
728 102801EE
729 102801EF
730*/
731static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 732 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
733 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 734};
735
736/*
737 STAC 9200-32 pin configs for
738 102801F5 (Dell Inspiron 1501)
739 102801F6
740*/
741static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 742 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
743 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 744};
745
746/*
747 STAC 9200-32
748 102801CD (Dell Inspiron E1705/9400)
749*/
750static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 751 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
752 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 753};
754
755
f5fcc13c
TI		 756static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
757 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 758 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
759 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
760 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
761 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
762 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
763 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
764 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
765 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
766 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
767 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 768};
769
f5fcc13c
TI		 770static const char *stac9200_models[STAC_9200_MODELS] = {
771 [STAC_REF] = "ref",
dfe495d0
TI		 772 [STAC_9200_DELL_D21] = "dell-d21",
773 [STAC_9200_DELL_D22] = "dell-d22",
774 [STAC_9200_DELL_D23] = "dell-d23",
775 [STAC_9200_DELL_M21] = "dell-m21",
776 [STAC_9200_DELL_M22] = "dell-m22",
777 [STAC_9200_DELL_M23] = "dell-m23",
778 [STAC_9200_DELL_M24] = "dell-m24",
779 [STAC_9200_DELL_M25] = "dell-m25",
780 [STAC_9200_DELL_M26] = "dell-m26",
781 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 782 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 783};
784
785static struct snd_pci_quirk stac9200_cfg_tbl[] = {
786 /* SigmaTel reference board */
787 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
788 "DFI LanParty", STAC_REF),
e7377071 789 /* Dell laptops have BIOS problem */
dfe495d0
TI		 790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
791 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 792 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 793 "Dell Inspiron 630m", STAC_9200_DELL_M21),
794 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
795 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
796 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
797 "unknown Dell", STAC_9200_DELL_D22),
798 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
799 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 800 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 801 "Dell Latitude D620", STAC_9200_DELL_M22),
802 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
803 "unknown Dell", STAC_9200_DELL_D23),
804 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
805 "unknown Dell", STAC_9200_DELL_D23),
806 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
807 "unknown Dell", STAC_9200_DELL_M22),
808 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
809 "unknown Dell", STAC_9200_DELL_M24),
810 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
811 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 812 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 813 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 814 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 815 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 816 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 817 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 818 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 819 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 820 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 821 "Dell Precision M90", STAC_9200_DELL_M23),
822 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
823 "unknown Dell", STAC_9200_DELL_M22),
824 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
825 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 826 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 827 "unknown Dell", STAC_9200_DELL_M22),
49c605db 828 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 829 "Dell Inspiron 640m", STAC_9200_DELL_M21),
830 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
831 "unknown Dell", STAC_9200_DELL_D23),
832 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
833 "unknown Dell", STAC_9200_DELL_D23),
834 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
835 "unknown Dell", STAC_9200_DELL_D21),
836 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
837 "unknown Dell", STAC_9200_DELL_D23),
838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
839 "unknown Dell", STAC_9200_DELL_D21),
840 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
841 "unknown Dell", STAC_9200_DELL_M25),
842 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
843 "unknown Dell", STAC_9200_DELL_M25),
49c605db 844 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 845 "Dell Inspiron 1501", STAC_9200_DELL_M26),
846 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
847 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 848 /* Panasonic */
849 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 850 /* Gateway machines needs EAPD to be set on resume */
851 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
852 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
853 STAC_9200_GATEWAY),
854 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
855 STAC_9200_GATEWAY),
403d1944
MP		 856 {} /* terminator */
857};
858
8e21c34c
TD		 859static unsigned int ref925x_pin_configs[8] = {
860 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
861 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
862};
863
864static unsigned int stac925x_MA6_pin_configs[8] = {
865 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
866 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
867};
868
2c11f955
TD		 869static unsigned int stac925x_PA6_pin_configs[8] = {
870 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
871 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
872};
873
8e21c34c 874static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 875 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
876 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 877};
878
879static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
880 [STAC_REF] = ref925x_pin_configs,
881 [STAC_M2_2] = stac925xM2_2_pin_configs,
882 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 883 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 884};
885
886static const char *stac925x_models[STAC_925x_MODELS] = {
887 [STAC_REF] = "ref",
888 [STAC_M2_2] = "m2-2",
889 [STAC_MA6] = "m6",
2c11f955 890 [STAC_PA6] = "pa6",
8e21c34c
TD		 891};
892
893static struct snd_pci_quirk stac925x_cfg_tbl[] = {
894 /* SigmaTel reference board */
895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 896 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 897 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
898 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
899 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 900 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 901 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
902 {} /* terminator */
903};
904
e035b841
MR		 905static unsigned int ref92hd71bxx_pin_configs[10] = {
906 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
907 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0,
908 0x90a000f0, 0x01452050,
909};
910
911static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
912 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
913};
914
915static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
916 [STAC_92HD71BXX_REF] = "ref",
917};
918
919static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
920 /* SigmaTel reference board */
921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
922 "DFI LanParty", STAC_92HD71BXX_REF),
923 {} /* terminator */
924};
925
403d1944
MP		 926static unsigned int ref922x_pin_configs[10] = {
927 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
928 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 929 0x40000100, 0x40000100,
930};
931
dfe495d0
TI		 932/*
933 STAC 922X pin configs for
934 102801A7
935 102801AB
936 102801A9
937 102801D1
938 102801D2
939*/
940static unsigned int dell_922x_d81_pin_configs[10] = {
941 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
942 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
943 0x01813122, 0x400001f2,
944};
945
946/*
947 STAC 922X pin configs for
948 102801AC
949 102801D0
950*/
951static unsigned int dell_922x_d82_pin_configs[10] = {
952 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
953 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
954 0x01813122, 0x400001f1,
955};
956
957/*
958 STAC 922X pin configs for
959 102801BF
960*/
961static unsigned int dell_922x_m81_pin_configs[10] = {
962 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
963 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
964 0x40C003f1, 0x405003f0,
965};
966
967/*
968 STAC 9221 A1 pin configs for
969 102801D7 (Dell XPS M1210)
970*/
971static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 972 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
973 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 974 0x508003f3, 0x405003f4,
975};
976
403d1944 977static unsigned int d945gtp3_pin_configs[10] = {
869264c4 978 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 979 0x40000100, 0x40000100, 0x40000100, 0x40000100,
980 0x02a19120, 0x40000100,
981};
982
983static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 984 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
985 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 986 0x02a19320, 0x40000100,
987};
988
5d5d3bc3
IZ		 989static unsigned int intel_mac_v1_pin_configs[10] = {
990 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
991 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
992 0x400000fc, 0x400000fb,
993};
994
995static unsigned int intel_mac_v2_pin_configs[10] = {
996 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
997 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
998 0x400000fc, 0x400000fb,
6f0778d8
NB		 999};
1000
5d5d3bc3
IZ		 1001static unsigned int intel_mac_v3_pin_configs[10] = {
1002 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1003 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1004 0x400000fc, 0x400000fb,
1005};
1006
5d5d3bc3
IZ		 1007static unsigned int intel_mac_v4_pin_configs[10] = {
1008 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1009 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1010 0x400000fc, 0x400000fb,
1011};
1012
5d5d3bc3
IZ		 1013static unsigned int intel_mac_v5_pin_configs[10] = {
1014 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1015 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1016 0x400000fc, 0x400000fb,
0dae0f83
TI		 1017};
1018
76c08828 1019
19039bd0 1020static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1021 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1022 [STAC_D945GTP3] = d945gtp3_pin_configs,
1023 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1024 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1025 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1026 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1027 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1028 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1029 /* for backward compatibility */
5d5d3bc3
IZ		 1030 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1031 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1032 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1033 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1034 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1035 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1036 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1037 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1038 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1039 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1040};
1041
f5fcc13c
TI		 1042static const char *stac922x_models[STAC_922X_MODELS] = {
1043 [STAC_D945_REF] = "ref",
1044 [STAC_D945GTP5] = "5stack",
1045 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1046 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1047 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1048 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1049 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1050 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1051 /* for backward compatibility */
f5fcc13c 1052 [STAC_MACMINI] = "macmini",
3fc24d85 1053 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1054 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1055 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1056 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1057 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1058 [STAC_922X_DELL_D81] = "dell-d81",
1059 [STAC_922X_DELL_D82] = "dell-d82",
1060 [STAC_922X_DELL_M81] = "dell-m81",
1061 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1062};
1063
1064static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1065 /* SigmaTel reference board */
1066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1067 "DFI LanParty", STAC_D945_REF),
1068 /* Intel 945G based systems */
1069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1070 "Intel D945G", STAC_D945GTP3),
1071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1072 "Intel D945G", STAC_D945GTP3),
1073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1074 "Intel D945G", STAC_D945GTP3),
1075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1076 "Intel D945G", STAC_D945GTP3),
1077 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1078 "Intel D945G", STAC_D945GTP3),
1079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1080 "Intel D945G", STAC_D945GTP3),
1081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1082 "Intel D945G", STAC_D945GTP3),
1083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1084 "Intel D945G", STAC_D945GTP3),
1085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1086 "Intel D945G", STAC_D945GTP3),
1087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1088 "Intel D945G", STAC_D945GTP3),
1089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1090 "Intel D945G", STAC_D945GTP3),
1091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1092 "Intel D945G", STAC_D945GTP3),
1093 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1094 "Intel D945G", STAC_D945GTP3),
1095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1096 "Intel D945G", STAC_D945GTP3),
1097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1098 "Intel D945G", STAC_D945GTP3),
1099 /* Intel D945G 5-stack systems */
1100 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1101 "Intel D945G", STAC_D945GTP5),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1103 "Intel D945G", STAC_D945GTP5),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1105 "Intel D945G", STAC_D945GTP5),
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1107 "Intel D945G", STAC_D945GTP5),
1108 /* Intel 945P based systems */
1109 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1110 "Intel D945P", STAC_D945GTP3),
1111 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1112 "Intel D945P", STAC_D945GTP3),
1113 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1114 "Intel D945P", STAC_D945GTP3),
1115 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1116 "Intel D945P", STAC_D945GTP3),
1117 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1118 "Intel D945P", STAC_D945GTP3),
1119 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1120 "Intel D945P", STAC_D945GTP5),
1121 /* other systems */
1122 /* Apple Mac Mini (early 2006) */
1123 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1124 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1125 /* Dell systems */
1126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1127 "unknown Dell", STAC_922X_DELL_D81),
1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1129 "unknown Dell", STAC_922X_DELL_D81),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1131 "unknown Dell", STAC_922X_DELL_D81),
1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1133 "unknown Dell", STAC_922X_DELL_D82),
1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1135 "unknown Dell", STAC_922X_DELL_M81),
1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1137 "unknown Dell", STAC_922X_DELL_D82),
1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1139 "unknown Dell", STAC_922X_DELL_D81),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1141 "unknown Dell", STAC_922X_DELL_D81),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1143 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1144 {} /* terminator */
1145};
1146
3cc08dc6 1147static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1148 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1149 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1150 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1151 0x01c42190, 0x40000100,
3cc08dc6
MP		 1152};
1153
93ed1503 1154static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1155 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1156 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1157 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1158 0x40000100, 0x40000100
1159};
1160
93ed1503
TD		 1161static unsigned int d965_5st_pin_configs[14] = {
1162 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1163 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1164 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1165 0x40000100, 0x40000100
1166};
1167
4ff076e5
TD		 1168static unsigned int dell_3st_pin_configs[14] = {
1169 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1170 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1171 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1172 0x40c003fc, 0x40000100
1173};
1174
93ed1503 1175static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
f5fcc13c 1176 [STAC_D965_REF] = ref927x_pin_configs,
93ed1503
TD		 1177 [STAC_D965_3ST] = d965_3st_pin_configs,
1178 [STAC_D965_5ST] = d965_5st_pin_configs,
4ff076e5 1179 [STAC_DELL_3ST] = dell_3st_pin_configs,
3cc08dc6
MP		 1180};
1181
f5fcc13c
TI		 1182static const char *stac927x_models[STAC_927X_MODELS] = {
1183 [STAC_D965_REF] = "ref",
1184 [STAC_D965_3ST] = "3stack",
1185 [STAC_D965_5ST] = "5stack",
4ff076e5 1186 [STAC_DELL_3ST] = "dell-3stack",
f5fcc13c
TI		 1187};
1188
1189static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1190 /* SigmaTel reference board */
1191 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1192 "DFI LanParty", STAC_D965_REF),
81d3dbde 1193 /* Intel 946 based systems */
f5fcc13c
TI		 1194 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1195 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1196 /* 965 based 3 stack systems */
f5fcc13c
TI		 1197 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1198 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1199 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1200 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1201 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1202 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1203 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1204 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1205 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1206 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1207 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1208 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1209 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1210 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1211 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1212 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
5e915bb3 1213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
4ff076e5 1214 /* Dell 3 stack systems */
dfe495d0 1215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
93ed1503 1218 /* 965 based 5 stack systems */
5e915bb3 1219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
f5fcc13c
TI		 1220 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1221 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1222 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1223 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1224 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1225 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1226 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1227 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1228 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1229 {} /* terminator */
1230};
1231
f3302a59
MP		 1232static unsigned int ref9205_pin_configs[12] = {
1233 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1234 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1235 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1236};
1237
dfe495d0
TI		 1238/*
1239 STAC 9205 pin configs for
1240 102801F1
1241 102801F2
1242 102801FC
1243 102801FD
1244 10280204
1245 1028021F
1246*/
1247static unsigned int dell_9205_m42_pin_configs[12] = {
1248 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1249 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1250 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1251};
1252
1253/*
1254 STAC 9205 pin configs for
1255 102801F9
1256 102801FA
1257 102801FE
1258 102801FF (Dell Precision M4300)
1259 10280206
1260 10280200
1261 10280201
1262*/
1263static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1264 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1265 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1266 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1267};
1268
dfe495d0 1269static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1270 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1271 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1272 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1273};
1274
f5fcc13c 1275static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1276 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1277 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1278 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1279 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1280};
1281
f5fcc13c
TI		 1282static const char *stac9205_models[STAC_9205_MODELS] = {
1283 [STAC_9205_REF] = "ref",
dfe495d0 1284 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1285 [STAC_9205_DELL_M43] = "dell-m43",
1286 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1287};
1288
1289static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1290 /* SigmaTel reference board */
1291 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1292 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1293 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1294 "unknown Dell", STAC_9205_DELL_M42),
1295 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1296 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1297 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1298 "Dell Precision", STAC_9205_DELL_M43),
1299 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1300 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1301 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1302 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1303 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1304 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1305 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1306 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1307 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1308 "unknown Dell", STAC_9205_DELL_M42),
1309 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1310 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1311 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1312 "Dell Precision", STAC_9205_DELL_M43),
1313 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1314 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1315 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1316 "Dell Precision", STAC_9205_DELL_M43),
1317 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1318 "Dell Inspiron", STAC_9205_DELL_M44),
1319 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1320 "Dell Inspiron", STAC_9205_DELL_M44),
1321 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1322 "Dell Inspiron", STAC_9205_DELL_M44),
1323 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1324 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1325 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1326 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1327 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1328 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1329 {} /* terminator */
1330};
1331
11b44bbd
RF		 1332static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1333{
1334 int i;
1335 struct sigmatel_spec *spec = codec->spec;
1336
1337 if (! spec->bios_pin_configs) {
1338 spec->bios_pin_configs = kcalloc(spec->num_pins,
1339 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1340 if (! spec->bios_pin_configs)
1341 return -ENOMEM;
1342 }
1343
1344 for (i = 0; i < spec->num_pins; i++) {
1345 hda_nid_t nid = spec->pin_nids[i];
1346 unsigned int pin_cfg;
1347
1348 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1349 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1350 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1351 nid, pin_cfg);
1352 spec->bios_pin_configs[i] = pin_cfg;
1353 }
1354
1355 return 0;
1356}
1357
87d48363
MR		 1358static void stac92xx_set_config_reg(struct hda_codec *codec,
1359 hda_nid_t pin_nid, unsigned int pin_config)
1360{
1361 int i;
1362 snd_hda_codec_write(codec, pin_nid, 0,
1363 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1364 pin_config & 0x000000ff);
1365 snd_hda_codec_write(codec, pin_nid, 0,
1366 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1367 (pin_config & 0x0000ff00) >> 8);
1368 snd_hda_codec_write(codec, pin_nid, 0,
1369 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1370 (pin_config & 0x00ff0000) >> 16);
1371 snd_hda_codec_write(codec, pin_nid, 0,
1372 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1373 pin_config >> 24);
1374 i = snd_hda_codec_read(codec, pin_nid, 0,
1375 AC_VERB_GET_CONFIG_DEFAULT,
1376 0x00);
1377 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1378 pin_nid, i);
1379}
1380
2f2f4251
M		 1381static void stac92xx_set_config_regs(struct hda_codec *codec)
1382{
1383 int i;
1384 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1385
87d48363
MR		 1386 if (!spec->pin_configs)
1387 return;
11b44bbd 1388
87d48363
MR		 1389 for (i = 0; i < spec->num_pins; i++)
1390 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1391 spec->pin_configs[i]);
2f2f4251 1392}
2f2f4251 1393
8259980e 1394static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1395{
8259980e 1396 struct sigmatel_spec *spec = codec->spec;
87d48363 1397 /* Configure GPIOx as output */
82beb8fd
TI		 1398 snd_hda_codec_write_cache(codec, codec->afg, 0,
1399 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1400 /* Configure GPIOx as CMOS */
82beb8fd 1401 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1402 /* Assert GPIOx */
82beb8fd
TI		 1403 snd_hda_codec_write_cache(codec, codec->afg, 0,
1404 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1405 /* Enable GPIOx */
82beb8fd
TI		 1406 snd_hda_codec_write_cache(codec, codec->afg, 0,
1407 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1408}
1409
dabbed6f 1410/*
c7d4b2fa 1411 * Analog playback callbacks
dabbed6f 1412 */
c7d4b2fa
M		 1413static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1414 struct hda_codec *codec,
c8b6bf9b 1415 struct snd_pcm_substream *substream)
2f2f4251 1416{
dabbed6f 1417 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1418 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1419}
1420
2f2f4251
M		 1421static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1422 struct hda_codec *codec,
1423 unsigned int stream_tag,
1424 unsigned int format,
c8b6bf9b 1425 struct snd_pcm_substream *substream)
2f2f4251
M		 1426{
1427 struct sigmatel_spec *spec = codec->spec;
403d1944 1428 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1429}
1430
1431static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1432 struct hda_codec *codec,
c8b6bf9b 1433 struct snd_pcm_substream *substream)
2f2f4251
M		 1434{
1435 struct sigmatel_spec *spec = codec->spec;
1436 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1437}
1438
dabbed6f
M		 1439/*
1440 * Digital playback callbacks
1441 */
1442static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1443 struct hda_codec *codec,
c8b6bf9b 1444 struct snd_pcm_substream *substream)
dabbed6f
M		 1445{
1446 struct sigmatel_spec *spec = codec->spec;
1447 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1448}
1449
1450static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1451 struct hda_codec *codec,
c8b6bf9b 1452 struct snd_pcm_substream *substream)
dabbed6f
M		 1453{
1454 struct sigmatel_spec *spec = codec->spec;
1455 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1456}
1457
6b97eb45
TI		 1458static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1459 struct hda_codec *codec,
1460 unsigned int stream_tag,
1461 unsigned int format,
1462 struct snd_pcm_substream *substream)
1463{
1464 struct sigmatel_spec *spec = codec->spec;
1465 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1466 stream_tag, format, substream);
1467}
1468
dabbed6f 1469
2f2f4251
M		 1470/*
1471 * Analog capture callbacks
1472 */
1473static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1474 struct hda_codec *codec,
1475 unsigned int stream_tag,
1476 unsigned int format,
c8b6bf9b 1477 struct snd_pcm_substream *substream)
2f2f4251
M		 1478{
1479 struct sigmatel_spec *spec = codec->spec;
1480
1481 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1482 stream_tag, 0, format);
1483 return 0;
1484}
1485
1486static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1487 struct hda_codec *codec,
c8b6bf9b 1488 struct snd_pcm_substream *substream)
2f2f4251
M		 1489{
1490 struct sigmatel_spec *spec = codec->spec;
1491
1492 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1493 return 0;
1494}
1495
dabbed6f
M		 1496static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1497 .substreams = 1,
1498 .channels_min = 2,
1499 .channels_max = 2,
1500 /* NID is set in stac92xx_build_pcms */
1501 .ops = {
1502 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1503 .close = stac92xx_dig_playback_pcm_close,
1504 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1505 },
1506};
1507
1508static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1509 .substreams = 1,
1510 .channels_min = 2,
1511 .channels_max = 2,
1512 /* NID is set in stac92xx_build_pcms */
1513};
1514
2f2f4251
M		 1515static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1516 .substreams = 1,
1517 .channels_min = 2,
c7d4b2fa 1518 .channels_max = 8,
2f2f4251
M		 1519 .nid = 0x02, /* NID to query formats and rates */
1520 .ops = {
1521 .open = stac92xx_playback_pcm_open,
1522 .prepare = stac92xx_playback_pcm_prepare,
1523 .cleanup = stac92xx_playback_pcm_cleanup
1524 },
1525};
1526
3cc08dc6
MP		 1527static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1528 .substreams = 1,
1529 .channels_min = 2,
1530 .channels_max = 2,
1531 .nid = 0x06, /* NID to query formats and rates */
1532 .ops = {
1533 .open = stac92xx_playback_pcm_open,
1534 .prepare = stac92xx_playback_pcm_prepare,
1535 .cleanup = stac92xx_playback_pcm_cleanup
1536 },
1537};
1538
2f2f4251 1539static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1540 .channels_min = 2,
1541 .channels_max = 2,
9e05b7a3 1542 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1543 .ops = {
1544 .prepare = stac92xx_capture_pcm_prepare,
1545 .cleanup = stac92xx_capture_pcm_cleanup
1546 },
1547};
1548
1549static int stac92xx_build_pcms(struct hda_codec *codec)
1550{
1551 struct sigmatel_spec *spec = codec->spec;
1552 struct hda_pcm *info = spec->pcm_rec;
1553
1554 codec->num_pcms = 1;
1555 codec->pcm_info = info;
1556
c7d4b2fa 1557 info->name = "STAC92xx Analog";
2f2f4251 1558 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1559 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1560 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1561 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1562
1563 if (spec->alt_switch) {
1564 codec->num_pcms++;
1565 info++;
1566 info->name = "STAC92xx Analog Alt";
1567 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1568 }
2f2f4251 1569
dabbed6f
M		 1570 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1571 codec->num_pcms++;
1572 info++;
1573 info->name = "STAC92xx Digital";
1574 if (spec->multiout.dig_out_nid) {
1575 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1576 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1577 }
1578 if (spec->dig_in_nid) {
1579 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1580 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1581 }
1582 }
1583
2f2f4251
M		 1584 return 0;
1585}
1586
c960a03b
TI		 1587static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1588{
1589 unsigned int pincap = snd_hda_param_read(codec, nid,
1590 AC_PAR_PIN_CAP);
1591 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1592 if (pincap & AC_PINCAP_VREF_100)
1593 return AC_PINCTL_VREF_100;
1594 if (pincap & AC_PINCAP_VREF_80)
1595 return AC_PINCTL_VREF_80;
1596 if (pincap & AC_PINCAP_VREF_50)
1597 return AC_PINCTL_VREF_50;
1598 if (pincap & AC_PINCAP_VREF_GRD)
1599 return AC_PINCTL_VREF_GRD;
1600 return 0;
1601}
1602
403d1944
MP		 1603static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1604
1605{
82beb8fd
TI		 1606 snd_hda_codec_write_cache(codec, nid, 0,
1607 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1608}
1609
a5ce8890 1610#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1611
1612static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1613{
1614 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1615 struct sigmatel_spec *spec = codec->spec;
1616 int io_idx = kcontrol-> private_value & 0xff;
1617
1618 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1619 return 0;
1620}
1621
1622static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1623{
1624 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1625 struct sigmatel_spec *spec = codec->spec;
1626 hda_nid_t nid = kcontrol->private_value >> 8;
1627 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1628 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1629
1630 spec->io_switch[io_idx] = val;
1631
1632 if (val)
1633 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1634 else {
1635 unsigned int pinctl = AC_PINCTL_IN_EN;
1636 if (io_idx) /* set VREF for mic */
1637 pinctl |= stac92xx_get_vref(codec, nid);
1638 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1639 }
40c1d308
JZ		 1640
1641 /* check the auto-mute again: we need to mute/unmute the speaker
1642 * appropriately according to the pin direction
1643 */
1644 if (spec->hp_detect)
1645 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1646
403d1944
MP		 1647 return 1;
1648}
1649
0fb87bb4
ML		 1650#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1651
1652static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1653 struct snd_ctl_elem_value *ucontrol)
1654{
1655 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1656 struct sigmatel_spec *spec = codec->spec;
1657
1658 ucontrol->value.integer.value[0] = spec->clfe_swap;
1659 return 0;
1660}
1661
1662static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1663 struct snd_ctl_elem_value *ucontrol)
1664{
1665 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1666 struct sigmatel_spec *spec = codec->spec;
1667 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1668 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1669
68ea7b2f 1670 if (spec->clfe_swap == val)
0fb87bb4
ML		 1671 return 0;
1672
68ea7b2f 1673 spec->clfe_swap = val;
0fb87bb4
ML		 1674
1675 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1676 spec->clfe_swap ? 0x4 : 0x0);
1677
1678 return 1;
1679}
1680
403d1944
MP		 1681#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1682 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1683 .name = xname, \
1684 .index = 0, \
1685 .info = stac92xx_io_switch_info, \
1686 .get = stac92xx_io_switch_get, \
1687 .put = stac92xx_io_switch_put, \
1688 .private_value = xpval, \
1689 }
1690
0fb87bb4
ML		 1691#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1692 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1693 .name = xname, \
1694 .index = 0, \
1695 .info = stac92xx_clfe_switch_info, \
1696 .get = stac92xx_clfe_switch_get, \
1697 .put = stac92xx_clfe_switch_put, \
1698 .private_value = xpval, \
1699 }
403d1944 1700
c7d4b2fa
M		 1701enum {
1702 STAC_CTL_WIDGET_VOL,
1703 STAC_CTL_WIDGET_MUTE,
403d1944 1704 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1705 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1706};
1707
c8b6bf9b 1708static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1709 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1710 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1711 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1712 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1713};
1714
1715/* add dynamic controls */
1716static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1717{
c8b6bf9b 1718 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1719
1720 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1721 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1722
1723 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1724 if (! knew)
1725 return -ENOMEM;
1726 if (spec->kctl_alloc) {
1727 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1728 kfree(spec->kctl_alloc);
1729 }
1730 spec->kctl_alloc = knew;
1731 spec->num_kctl_alloc = num;
1732 }
1733
1734 knew = &spec->kctl_alloc[spec->num_kctl_used];
1735 *knew = stac92xx_control_templates[type];
82fe0c58 1736 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1737 if (! knew->name)
1738 return -ENOMEM;
1739 knew->private_value = val;
1740 spec->num_kctl_used++;
1741 return 0;
1742}
1743
403d1944
MP		 1744/* flag inputs as additional dynamic lineouts */
1745static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1746{
1747 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1748 unsigned int wcaps, wtype;
1749 int i, num_dacs = 0;
1750
1751 /* use the wcaps cache to count all DACs available for line-outs */
1752 for (i = 0; i < codec->num_nodes; i++) {
1753 wcaps = codec->wcaps[i];
1754 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1755 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
1756 num_dacs++;
1757 }
403d1944 1758
7b043899
SL		 1759 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
1760
403d1944
MP		 1761 switch (cfg->line_outs) {
1762 case 3:
1763 /* add line-in as side */
7b043899 1764 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 1765 cfg->line_out_pins[cfg->line_outs] =
1766 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1767 spec->line_switch = 1;
1768 cfg->line_outs++;
1769 }
1770 break;
1771 case 2:
1772 /* add line-in as clfe and mic as side */
7b043899 1773 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 1774 cfg->line_out_pins[cfg->line_outs] =
1775 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1776 spec->line_switch = 1;
1777 cfg->line_outs++;
1778 }
7b043899 1779 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 1780 cfg->line_out_pins[cfg->line_outs] =
1781 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1782 spec->mic_switch = 1;
1783 cfg->line_outs++;
1784 }
1785 break;
1786 case 1:
1787 /* add line-in as surr and mic as clfe */
7b043899 1788 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 1789 cfg->line_out_pins[cfg->line_outs] =
1790 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 1791 spec->line_switch = 1;
1792 cfg->line_outs++;
1793 }
7b043899 1794 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 1795 cfg->line_out_pins[cfg->line_outs] =
1796 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 1797 spec->mic_switch = 1;
1798 cfg->line_outs++;
1799 }
1800 break;
1801 }
1802
1803 return 0;
1804}
1805
7b043899
SL		 1806
1807static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
1808{
1809 int i;
1810
1811 for (i = 0; i < spec->multiout.num_dacs; i++) {
1812 if (spec->multiout.dac_nids[i] == nid)
1813 return 1;
1814 }
1815
1816 return 0;
1817}
1818
3cc08dc6 1819/*
7b043899
SL		 1820 * Fill in the dac_nids table from the parsed pin configuration
1821 * This function only works when every pin in line_out_pins[]
1822 * contains atleast one DAC in its connection list. Some 92xx
1823 * codecs are not connected directly to a DAC, such as the 9200
1824 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 1825 */
19039bd0 1826static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 1827 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 1828{
1829 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1830 int i, j, conn_len = 0;
1831 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
1832 unsigned int wcaps, wtype;
1833
c7d4b2fa
M		 1834 for (i = 0; i < cfg->line_outs; i++) {
1835 nid = cfg->line_out_pins[i];
7b043899
SL		 1836 conn_len = snd_hda_get_connections(codec, nid, conn,
1837 HDA_MAX_CONNECTIONS);
1838 for (j = 0; j < conn_len; j++) {
1839 wcaps = snd_hda_param_read(codec, conn[j],
1840 AC_PAR_AUDIO_WIDGET_CAP);
1841 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
1842
1843 if (wtype != AC_WID_AUD_OUT ||
1844 (wcaps & AC_WCAP_DIGITAL))
1845 continue;
1846 /* conn[j] is a DAC routed to this line-out */
1847 if (!is_in_dac_nids(spec, conn[j]))
1848 break;
1849 }
1850
1851 if (j == conn_len) {
df802952
TI		 1852 if (spec->multiout.num_dacs > 0) {
1853 /* we have already working output pins,
1854 * so let's drop the broken ones again
1855 */
1856 cfg->line_outs = spec->multiout.num_dacs;
1857 break;
1858 }
7b043899
SL		 1859 /* error out, no available DAC found */
1860 snd_printk(KERN_ERR
1861 "%s: No available DAC for pin 0x%x\n",
1862 __func__, nid);
1863 return -ENODEV;
1864 }
1865
1866 spec->multiout.dac_nids[i] = conn[j];
1867 spec->multiout.num_dacs++;
1868 if (conn_len > 1) {
1869 /* select this DAC in the pin's input mux */
82beb8fd
TI		 1870 snd_hda_codec_write_cache(codec, nid, 0,
1871 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 1872
7b043899
SL		 1873 }
1874 }
c7d4b2fa 1875
7b043899
SL		 1876 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
1877 spec->multiout.num_dacs,
1878 spec->multiout.dac_nids[0],
1879 spec->multiout.dac_nids[1],
1880 spec->multiout.dac_nids[2],
1881 spec->multiout.dac_nids[3],
1882 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 1883 return 0;
1884}
1885
eb06ed8f
TI		 1886/* create volume control/switch for the given prefx type */
1887static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
1888{
1889 char name[32];
1890 int err;
1891
1892 sprintf(name, "%s Playback Volume", pfx);
1893 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
1894 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1895 if (err < 0)
1896 return err;
1897 sprintf(name, "%s Playback Switch", pfx);
1898 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
1899 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
1900 if (err < 0)
1901 return err;
1902 return 0;
1903}
1904
c7d4b2fa 1905/* add playback controls from the parsed DAC table */
0fb87bb4 1906static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 1907 const struct auto_pin_cfg *cfg)
c7d4b2fa 1908{
19039bd0
TI		 1909 static const char *chname[4] = {
1910 "Front", "Surround", NULL /*CLFE*/, "Side"
1911 };
c7d4b2fa
M		 1912 hda_nid_t nid;
1913 int i, err;
1914
0fb87bb4
ML		 1915 struct sigmatel_spec *spec = codec->spec;
1916 unsigned int wid_caps;
1917
1918
c7d4b2fa 1919 for (i = 0; i < cfg->line_outs; i++) {
403d1944 1920 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 1921 continue;
1922
1923 nid = spec->multiout.dac_nids[i];
1924
1925 if (i == 2) {
1926 /* Center/LFE */
eb06ed8f
TI		 1927 err = create_controls(spec, "Center", nid, 1);
1928 if (err < 0)
c7d4b2fa 1929 return err;
eb06ed8f
TI		 1930 err = create_controls(spec, "LFE", nid, 2);
1931 if (err < 0)
c7d4b2fa 1932 return err;
0fb87bb4
ML		 1933
1934 wid_caps = get_wcaps(codec, nid);
1935
1936 if (wid_caps & AC_WCAP_LR_SWAP) {
1937 err = stac92xx_add_control(spec,
1938 STAC_CTL_WIDGET_CLFE_SWITCH,
1939 "Swap Center/LFE Playback Switch", nid);
1940
1941 if (err < 0)
1942 return err;
1943 }
1944
c7d4b2fa 1945 } else {
eb06ed8f
TI		 1946 err = create_controls(spec, chname[i], nid, 3);
1947 if (err < 0)
c7d4b2fa
M		 1948 return err;
1949 }
1950 }
1951
403d1944
MP		 1952 if (spec->line_switch)
1953 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
1954 return err;
1955
1956 if (spec->mic_switch)
1957 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
1958 return err;
1959
c7d4b2fa
M		 1960 return 0;
1961}
1962
eb06ed8f 1963static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 1964{
7b043899
SL		 1965 if (is_in_dac_nids(spec, nid))
1966 return 1;
eb06ed8f
TI		 1967 if (spec->multiout.hp_nid == nid)
1968 return 1;
1969 return 0;
1970}
c7d4b2fa 1971
eb06ed8f
TI		 1972static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
1973{
1974 if (!spec->multiout.hp_nid)
1975 spec->multiout.hp_nid = nid;
1976 else if (spec->multiout.num_dacs > 4) {
1977 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
1978 return 1;
1979 } else {
1980 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
1981 spec->multiout.num_dacs++;
1982 }
1983 return 0;
1984}
4e55096e 1985
eb06ed8f
TI		 1986/* add playback controls for Speaker and HP outputs */
1987static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
1988 struct auto_pin_cfg *cfg)
1989{
1990 struct sigmatel_spec *spec = codec->spec;
1991 hda_nid_t nid;
1992 int i, old_num_dacs, err;
1993
1994 old_num_dacs = spec->multiout.num_dacs;
1995 for (i = 0; i < cfg->hp_outs; i++) {
1996 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
1997 if (wid_caps & AC_WCAP_UNSOL_CAP)
1998 spec->hp_detect = 1;
1999 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2000 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2001 if (check_in_dac_nids(spec, nid))
2002 nid = 0;
2003 if (! nid)
c7d4b2fa 2004 continue;
eb06ed8f
TI		 2005 add_spec_dacs(spec, nid);
2006 }
2007 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2008 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2009 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2010 if (check_in_dac_nids(spec, nid))
2011 nid = 0;
eb06ed8f
TI		 2012 if (! nid)
2013 continue;
2014 add_spec_dacs(spec, nid);
c7d4b2fa 2015 }
1b290a51
MR		 2016 for (i = 0; i < cfg->line_outs; i++) {
2017 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2018 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2019 if (check_in_dac_nids(spec, nid))
2020 nid = 0;
2021 if (! nid)
2022 continue;
2023 add_spec_dacs(spec, nid);
2024 }
eb06ed8f
TI		 2025 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2026 static const char *pfxs[] = {
2027 "Speaker", "External Speaker", "Speaker2",
2028 };
2029 err = create_controls(spec, pfxs[i - old_num_dacs],
2030 spec->multiout.dac_nids[i], 3);
2031 if (err < 0)
2032 return err;
2033 }
2034 if (spec->multiout.hp_nid) {
2035 const char *pfx;
6020c008 2036 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2037 pfx = "Master";
2038 else
2039 pfx = "Headphone";
2040 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2041 if (err < 0)
2042 return err;
2043 }
c7d4b2fa
M		 2044
2045 return 0;
2046}
2047
8b65727b 2048/* labels for dmic mux inputs */
ddc2cec4 2049static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2050 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2051 "Digital Mic 3", "Digital Mic 4"
2052};
2053
2054/* create playback/capture controls for input pins on dmic capable codecs */
2055static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2056 const struct auto_pin_cfg *cfg)
2057{
2058 struct sigmatel_spec *spec = codec->spec;
2059 struct hda_input_mux *dimux = &spec->private_dimux;
2060 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2061 int i, j;
2062
2063 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2064 dimux->items[dimux->num_items].index = 0;
2065 dimux->num_items++;
2066
2067 for (i = 0; i < spec->num_dmics; i++) {
2068 int index;
2069 int num_cons;
2070 unsigned int def_conf;
2071
2072 def_conf = snd_hda_codec_read(codec,
2073 spec->dmic_nids[i],
2074 0,
2075 AC_VERB_GET_CONFIG_DEFAULT,
2076 0);
2077 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2078 continue;
2079
2080 num_cons = snd_hda_get_connections(codec,
2081 spec->dmux_nid,
2082 con_lst,
2083 HDA_MAX_NUM_INPUTS);
2084 for (j = 0; j < num_cons; j++)
2085 if (con_lst[j] == spec->dmic_nids[i]) {
2086 index = j;
2087 goto found;
2088 }
2089 continue;
2090found:
2091 dimux->items[dimux->num_items].label =
2092 stac92xx_dmic_labels[dimux->num_items];
2093 dimux->items[dimux->num_items].index = index;
2094 dimux->num_items++;
2095 }
2096
2097 return 0;
2098}
2099
c7d4b2fa
M		 2100/* create playback/capture controls for input pins */
2101static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2102{
2103 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2104 struct hda_input_mux *imux = &spec->private_imux;
2105 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2106 int i, j, k;
2107
2108 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2109 int index;
2110
2111 if (!cfg->input_pins[i])
2112 continue;
2113 index = -1;
2114 for (j = 0; j < spec->num_muxes; j++) {
2115 int num_cons;
2116 num_cons = snd_hda_get_connections(codec,
2117 spec->mux_nids[j],
2118 con_lst,
2119 HDA_MAX_NUM_INPUTS);
2120 for (k = 0; k < num_cons; k++)
2121 if (con_lst[k] == cfg->input_pins[i]) {
2122 index = k;
2123 goto found;
2124 }
c7d4b2fa 2125 }
314634bc
TI		 2126 continue;
2127 found:
2128 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2129 imux->items[imux->num_items].index = index;
2130 imux->num_items++;
c7d4b2fa
M		 2131 }
2132
7b043899 2133 if (imux->num_items) {
62fe78e9
SR		 2134 /*
2135 * Set the current input for the muxes.
2136 * The STAC9221 has two input muxes with identical source
2137 * NID lists. Hopefully this won't get confused.
2138 */
2139 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2140 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2141 AC_VERB_SET_CONNECT_SEL,
2142 imux->items[0].index);
62fe78e9
SR		 2143 }
2144 }
2145
c7d4b2fa
M		 2146 return 0;
2147}
2148
c7d4b2fa
M		 2149static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2150{
2151 struct sigmatel_spec *spec = codec->spec;
2152 int i;
2153
2154 for (i = 0; i < spec->autocfg.line_outs; i++) {
2155 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2156 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2157 }
2158}
2159
2160static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2161{
2162 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2163 int i;
c7d4b2fa 2164
eb06ed8f
TI		 2165 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2166 hda_nid_t pin;
2167 pin = spec->autocfg.hp_pins[i];
2168 if (pin) /* connect to front */
2169 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2170 }
2171 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2172 hda_nid_t pin;
2173 pin = spec->autocfg.speaker_pins[i];
2174 if (pin) /* connect to front */
2175 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2176 }
c7d4b2fa
M		 2177}
2178
3cc08dc6 2179static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2180{
2181 struct sigmatel_spec *spec = codec->spec;
2182 int err;
bcecd9bd 2183 int hp_speaker_swap = 0;
c7d4b2fa 2184
8b65727b
MP		 2185 if ((err = snd_hda_parse_pin_def_config(codec,
2186 &spec->autocfg,
2187 spec->dmic_nids)) < 0)
c7d4b2fa 2188 return err;
82bc955f 2189 if (! spec->autocfg.line_outs)
869264c4 2190 return 0; /* can't find valid pin config */
19039bd0 2191
bcecd9bd
JZ		 2192 /* If we have no real line-out pin and multiple hp-outs, HPs should
2193 * be set up as multi-channel outputs.
2194 */
2195 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2196 spec->autocfg.hp_outs > 1) {
2197 /* Copy hp_outs to line_outs, backup line_outs in
2198 * speaker_outs so that the following routines can handle
2199 * HP pins as primary outputs.
2200 */
2201 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2202 sizeof(spec->autocfg.line_out_pins));
2203 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2204 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2205 sizeof(spec->autocfg.hp_pins));
2206 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2207 hp_speaker_swap = 1;
2208 }
2209
403d1944
MP		 2210 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2211 return err;
19039bd0
TI		 2212 if (spec->multiout.num_dacs == 0)
2213 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2214 return err;
c7d4b2fa 2215
0fb87bb4
ML		 2216 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2217
2218 if (err < 0)
2219 return err;
2220
bcecd9bd
JZ		 2221 if (hp_speaker_swap == 1) {
2222 /* Restore the hp_outs and line_outs */
2223 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2224 sizeof(spec->autocfg.line_out_pins));
2225 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2226 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2227 sizeof(spec->autocfg.speaker_pins));
2228 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2229 memset(spec->autocfg.speaker_pins, 0,
2230 sizeof(spec->autocfg.speaker_pins));
2231 spec->autocfg.speaker_outs = 0;
2232 }
2233
0fb87bb4
ML		 2234 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2235
2236 if (err < 0)
2237 return err;
2238
2239 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2240
2241 if (err < 0)
c7d4b2fa
M		 2242 return err;
2243
8b65727b
MP		 2244 if (spec->num_dmics > 0)
2245 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2246 &spec->autocfg)) < 0)
2247 return err;
2248
c7d4b2fa 2249 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2250 if (spec->multiout.max_channels > 2)
c7d4b2fa 2251 spec->surr_switch = 1;
c7d4b2fa 2252
82bc955f 2253 if (spec->autocfg.dig_out_pin)
3cc08dc6 2254 spec->multiout.dig_out_nid = dig_out;
82bc955f 2255 if (spec->autocfg.dig_in_pin)
3cc08dc6 2256 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2257
2258 if (spec->kctl_alloc)
2259 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2260
2261 spec->input_mux = &spec->private_imux;
8b65727b 2262 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2263
2264 return 1;
2265}
2266
82bc955f
TI		 2267/* add playback controls for HP output */
2268static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2269 struct auto_pin_cfg *cfg)
2270{
2271 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2272 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2273 unsigned int wid_caps;
2274
2275 if (! pin)
2276 return 0;
2277
2278 wid_caps = get_wcaps(codec, pin);
505cb341 2279 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2280 spec->hp_detect = 1;
82bc955f
TI		 2281
2282 return 0;
2283}
2284
160ea0dc
RF		 2285/* add playback controls for LFE output */
2286static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2287 struct auto_pin_cfg *cfg)
2288{
2289 struct sigmatel_spec *spec = codec->spec;
2290 int err;
2291 hda_nid_t lfe_pin = 0x0;
2292 int i;
2293
2294 /*
2295 * search speaker outs and line outs for a mono speaker pin
2296 * with an amp. If one is found, add LFE controls
2297 * for it.
2298 */
2299 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2300 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2301 unsigned long wcaps = get_wcaps(codec, pin);
2302 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2303 if (wcaps == AC_WCAP_OUT_AMP)
2304 /* found a mono speaker with an amp, must be lfe */
2305 lfe_pin = pin;
2306 }
2307
2308 /* if speaker_outs is 0, then speakers may be in line_outs */
2309 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2310 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2311 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2312 unsigned long cfg;
2313 cfg = snd_hda_codec_read(codec, pin, 0,
2314 AC_VERB_GET_CONFIG_DEFAULT,
2315 0x00);
2316 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2317 unsigned long wcaps = get_wcaps(codec, pin);
2318 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2319 if (wcaps == AC_WCAP_OUT_AMP)
2320 /* found a mono speaker with an amp,
2321 must be lfe */
2322 lfe_pin = pin;
2323 }
2324 }
2325 }
2326
2327 if (lfe_pin) {
eb06ed8f 2328 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2329 if (err < 0)
2330 return err;
2331 }
2332
2333 return 0;
2334}
2335
c7d4b2fa
M		 2336static int stac9200_parse_auto_config(struct hda_codec *codec)
2337{
2338 struct sigmatel_spec *spec = codec->spec;
2339 int err;
2340
df694daa 2341 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2342 return err;
2343
2344 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2345 return err;
2346
82bc955f
TI		 2347 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2348 return err;
2349
160ea0dc
RF		 2350 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2351 return err;
2352
82bc955f 2353 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2354 spec->multiout.dig_out_nid = 0x05;
82bc955f 2355 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2356 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2357
2358 if (spec->kctl_alloc)
2359 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2360
2361 spec->input_mux = &spec->private_imux;
8b65727b 2362 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2363
2364 return 1;
2365}
2366
62fe78e9
SR		 2367/*
2368 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2369 * funky external mute control using GPIO pins.
2370 */
2371
2372static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2373{
2374 unsigned int gpiostate, gpiomask, gpiodir;
2375
2376 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2377 AC_VERB_GET_GPIO_DATA, 0);
2378
2379 if (!muted)
2380 gpiostate |= (1 << pin);
2381 else
2382 gpiostate &= ~(1 << pin);
2383
2384 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2385 AC_VERB_GET_GPIO_MASK, 0);
2386 gpiomask |= (1 << pin);
2387
2388 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2389 AC_VERB_GET_GPIO_DIRECTION, 0);
2390 gpiodir |= (1 << pin);
2391
2392 /* AppleHDA seems to do this -- WTF is this verb?? */
2393 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2394
2395 snd_hda_codec_write(codec, codec->afg, 0,
2396 AC_VERB_SET_GPIO_MASK, gpiomask);
2397 snd_hda_codec_write(codec, codec->afg, 0,
2398 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2399
2400 msleep(1);
2401
2402 snd_hda_codec_write(codec, codec->afg, 0,
2403 AC_VERB_SET_GPIO_DATA, gpiostate);
2404}
2405
314634bc
TI		 2406static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2407 unsigned int event)
2408{
2409 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2410 snd_hda_codec_write_cache(codec, nid, 0,
2411 AC_VERB_SET_UNSOLICITED_ENABLE,
2412 (AC_USRSP_EN | event));
314634bc
TI		 2413}
2414
c7d4b2fa
M		 2415static int stac92xx_init(struct hda_codec *codec)
2416{
2417 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2418 struct auto_pin_cfg *cfg = &spec->autocfg;
2419 int i;
c7d4b2fa 2420
c7d4b2fa
M		 2421 snd_hda_sequence_write(codec, spec->init);
2422
82bc955f
TI		 2423 /* set up pins */
2424 if (spec->hp_detect) {
505cb341 2425 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2426 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2427 enable_pin_detect(codec, cfg->hp_pins[i],
2428 STAC_HP_EVENT);
0a07acaf
TI		 2429 /* force to enable the first line-out; the others are set up
2430 * in unsol_event
2431 */
2432 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2433 AC_PINCTL_OUT_EN);
eb995a8c 2434 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2435 /* fake event to set up pins */
2436 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2437 } else {
2438 stac92xx_auto_init_multi_out(codec);
2439 stac92xx_auto_init_hp_out(codec);
2440 }
2441 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2442 hda_nid_t nid = cfg->input_pins[i];
2443 if (nid) {
2444 unsigned int pinctl = AC_PINCTL_IN_EN;
2445 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2446 pinctl |= stac92xx_get_vref(codec, nid);
2447 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2448 }
82bc955f 2449 }
8b65727b
MP		 2450 if (spec->num_dmics > 0)
2451 for (i = 0; i < spec->num_dmics; i++)
2452 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2453 AC_PINCTL_IN_EN);
2454
82bc955f
TI		 2455 if (cfg->dig_out_pin)
2456 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2457 AC_PINCTL_OUT_EN);
2458 if (cfg->dig_in_pin)
2459 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2460 AC_PINCTL_IN_EN);
2461
62fe78e9
SR		 2462 if (spec->gpio_mute) {
2463 stac922x_gpio_mute(codec, 0, 0);
2464 stac922x_gpio_mute(codec, 1, 0);
2465 }
2466
c7d4b2fa
M		 2467 return 0;
2468}
2469
2f2f4251
M		 2470static void stac92xx_free(struct hda_codec *codec)
2471{
c7d4b2fa
M		 2472 struct sigmatel_spec *spec = codec->spec;
2473 int i;
2474
2475 if (! spec)
2476 return;
2477
2478 if (spec->kctl_alloc) {
2479 for (i = 0; i < spec->num_kctl_used; i++)
2480 kfree(spec->kctl_alloc[i].name);
2481 kfree(spec->kctl_alloc);
2482 }
2483
11b44bbd
RF		 2484 if (spec->bios_pin_configs)
2485 kfree(spec->bios_pin_configs);
2486
c7d4b2fa 2487 kfree(spec);
2f2f4251
M		 2488}
2489
4e55096e
M		 2490static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2491 unsigned int flag)
2492{
2493 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2494 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2495
f9acba43
TI		 2496 if (pin_ctl & AC_PINCTL_IN_EN) {
2497 /*
2498 * we need to check the current set-up direction of
2499 * shared input pins since they can be switched via
2500 * "xxx as Output" mixer switch
2501 */
2502 struct sigmatel_spec *spec = codec->spec;
2503 struct auto_pin_cfg *cfg = &spec->autocfg;
2504 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2505 spec->line_switch) ||
2506 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2507 spec->mic_switch))
2508 return;
2509 }
2510
7b043899
SL		 2511 /* if setting pin direction bits, clear the current
2512 direction bits first */
2513 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2514 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2515
82beb8fd 2516 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2517 AC_VERB_SET_PIN_WIDGET_CONTROL,
2518 pin_ctl | flag);
2519}
2520
2521static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2522 unsigned int flag)
2523{
2524 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2525 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2526 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2527 AC_VERB_SET_PIN_WIDGET_CONTROL,
2528 pin_ctl & ~flag);
2529}
2530
40c1d308 2531static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2532{
2533 if (!nid)
2534 return 0;
2535 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 2536 & (1 << 31)) {
2537 unsigned int pinctl;
2538 pinctl = snd_hda_codec_read(codec, nid, 0,
2539 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2540 if (pinctl & AC_PINCTL_IN_EN)
2541 return 0; /* mic- or line-input */
2542 else
2543 return 1; /* HP-output */
2544 }
314634bc
TI		 2545 return 0;
2546}
2547
2548static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2549{
2550 struct sigmatel_spec *spec = codec->spec;
2551 struct auto_pin_cfg *cfg = &spec->autocfg;
2552 int i, presence;
2553
eb06ed8f
TI		 2554 presence = 0;
2555 for (i = 0; i < cfg->hp_outs; i++) {
40c1d308 2556 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
314634bc
TI		 2557 if (presence)
2558 break;
eb06ed8f 2559 }
4e55096e
M		 2560
2561 if (presence) {
2562 /* disable lineouts, enable hp */
2563 for (i = 0; i < cfg->line_outs; i++)
2564 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2565 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2566 for (i = 0; i < cfg->speaker_outs; i++)
2567 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2568 AC_PINCTL_OUT_EN);
4e55096e
M		 2569 } else {
2570 /* enable lineouts, disable hp */
2571 for (i = 0; i < cfg->line_outs; i++)
2572 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2573 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2574 for (i = 0; i < cfg->speaker_outs; i++)
2575 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2576 AC_PINCTL_OUT_EN);
4e55096e
M		 2577 }
2578}
2579
314634bc
TI		 2580static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2581{
2582 switch (res >> 26) {
2583 case STAC_HP_EVENT:
2584 stac92xx_hp_detect(codec, res);
2585 break;
2586 }
2587}
2588
cb53c626 2589#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2590static int stac92xx_resume(struct hda_codec *codec)
2591{
dc81bed1
TI		 2592 struct sigmatel_spec *spec = codec->spec;
2593
11b44bbd 2594 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2595 snd_hda_sequence_write(codec, spec->init);
2596 if (spec->gpio_mute) {
2597 stac922x_gpio_mute(codec, 0, 0);
2598 stac922x_gpio_mute(codec, 1, 0);
2599 }
82beb8fd
TI		 2600 snd_hda_codec_resume_amp(codec);
2601 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2602 /* invoke unsolicited event to reset the HP state */
2603 if (spec->hp_detect)
2604 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2605 return 0;
2606}
2607#endif
2608
2f2f4251
M		 2609static struct hda_codec_ops stac92xx_patch_ops = {
2610 .build_controls = stac92xx_build_controls,
2611 .build_pcms = stac92xx_build_pcms,
2612 .init = stac92xx_init,
2613 .free = stac92xx_free,
4e55096e 2614 .unsol_event = stac92xx_unsol_event,
cb53c626 2615#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2616 .resume = stac92xx_resume,
2617#endif
2f2f4251
M		 2618};
2619
2620static int patch_stac9200(struct hda_codec *codec)
2621{
2622 struct sigmatel_spec *spec;
c7d4b2fa 2623 int err;
2f2f4251 2624
e560d8d8 2625 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2626 if (spec == NULL)
2627 return -ENOMEM;
2628
2629 codec->spec = spec;
a4eed138 2630 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2631 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2632 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2633 stac9200_models,
2634 stac9200_cfg_tbl);
11b44bbd
RF		 2635 if (spec->board_config < 0) {
2636 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2637 err = stac92xx_save_bios_config_regs(codec);
2638 if (err < 0) {
2639 stac92xx_free(codec);
2640 return err;
2641 }
2642 spec->pin_configs = spec->bios_pin_configs;
2643 } else {
403d1944
MP		 2644 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2645 stac92xx_set_config_regs(codec);
2646 }
2f2f4251
M		 2647
2648 spec->multiout.max_channels = 2;
2649 spec->multiout.num_dacs = 1;
2650 spec->multiout.dac_nids = stac9200_dac_nids;
2651 spec->adc_nids = stac9200_adc_nids;
2652 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2653 spec->num_muxes = 1;
8b65727b 2654 spec->num_dmics = 0;
9e05b7a3 2655 spec->num_adcs = 1;
c7d4b2fa 2656
1194b5b7
TI		 2657 if (spec->board_config == STAC_9200_GATEWAY)
2658 spec->init = stac9200_eapd_init;
2659 else
2660 spec->init = stac9200_core_init;
2f2f4251 2661 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2662
2663 err = stac9200_parse_auto_config(codec);
2664 if (err < 0) {
2665 stac92xx_free(codec);
2666 return err;
2667 }
2f2f4251
M		 2668
2669 codec->patch_ops = stac92xx_patch_ops;
2670
2671 return 0;
2672}
2673
8e21c34c
TD		 2674static int patch_stac925x(struct hda_codec *codec)
2675{
2676 struct sigmatel_spec *spec;
2677 int err;
2678
2679 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2680 if (spec == NULL)
2681 return -ENOMEM;
2682
2683 codec->spec = spec;
a4eed138 2684 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2685 spec->pin_nids = stac925x_pin_nids;
2686 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2687 stac925x_models,
2688 stac925x_cfg_tbl);
9e507abd 2689 again:
8e21c34c 2690 if (spec->board_config < 0) {
2c11f955
TD		 2691 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2692 "using BIOS defaults\n");
8e21c34c
TD		 2693 err = stac92xx_save_bios_config_regs(codec);
2694 if (err < 0) {
2695 stac92xx_free(codec);
2696 return err;
2697 }
2698 spec->pin_configs = spec->bios_pin_configs;
2699 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2700 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2701 stac92xx_set_config_regs(codec);
2702 }
2703
2704 spec->multiout.max_channels = 2;
2705 spec->multiout.num_dacs = 1;
2706 spec->multiout.dac_nids = stac925x_dac_nids;
2707 spec->adc_nids = stac925x_adc_nids;
2708 spec->mux_nids = stac925x_mux_nids;
2709 spec->num_muxes = 1;
9e05b7a3 2710 spec->num_adcs = 1;
2c11f955
TD		 2711 switch (codec->vendor_id) {
2712 case 0x83847632: /* STAC9202 */
2713 case 0x83847633: /* STAC9202D */
2714 case 0x83847636: /* STAC9251 */
2715 case 0x83847637: /* STAC9251D */
f6e9852a 2716 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955
TD		 2717 spec->dmic_nids = stac925x_dmic_nids;
2718 break;
2719 default:
2720 spec->num_dmics = 0;
2721 break;
2722 }
8e21c34c
TD		 2723
2724 spec->init = stac925x_core_init;
2725 spec->mixer = stac925x_mixer;
2726
2727 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2728 if (!err) {
2729 if (spec->board_config < 0) {
2730 printk(KERN_WARNING "hda_codec: No auto-config is "
2731 "available, default to model=ref\n");
2732 spec->board_config = STAC_925x_REF;
2733 goto again;
2734 }
2735 err = -EINVAL;
2736 }
8e21c34c
TD		 2737 if (err < 0) {
2738 stac92xx_free(codec);
2739 return err;
2740 }
2741
2742 codec->patch_ops = stac92xx_patch_ops;
2743
2744 return 0;
2745}
2746
e035b841
MR		 2747static int patch_stac92hd71bxx(struct hda_codec *codec)
2748{
2749 struct sigmatel_spec *spec;
2750 int err = 0;
2751
2752 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2753 if (spec == NULL)
2754 return -ENOMEM;
2755
2756 codec->spec = spec;
2757 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
2758 spec->pin_nids = stac92hd71bxx_pin_nids;
2759 spec->board_config = snd_hda_check_board_config(codec,
2760 STAC_92HD71BXX_MODELS,
2761 stac92hd71bxx_models,
2762 stac92hd71bxx_cfg_tbl);
2763again:
2764 if (spec->board_config < 0) {
2765 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
2766 " STAC92HD71BXX, using BIOS defaults\n");
2767 err = stac92xx_save_bios_config_regs(codec);
2768 if (err < 0) {
2769 stac92xx_free(codec);
2770 return err;
2771 }
2772 spec->pin_configs = spec->bios_pin_configs;
2773 } else {
2774 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
2775 stac92xx_set_config_regs(codec);
2776 }
2777
2778 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
2779 stac92xx_enable_gpio_mask(codec);
2780
2781 spec->init = stac92hd71bxx_core_init;
2782 spec->mixer = stac92hd71bxx_mixer;
2783
2784 spec->mux_nids = stac92hd71bxx_mux_nids;
2785 spec->adc_nids = stac92hd71bxx_adc_nids;
2786 spec->dmic_nids = stac92hd71bxx_dmic_nids;
2787 spec->dmux_nid = 0x1c;
2788
2789 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
2790 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
2791 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
2792
2793 spec->multiout.num_dacs = 2;
2794 spec->multiout.hp_nid = 0x11;
2795 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
2796
2797 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
2798 if (!err) {
2799 if (spec->board_config < 0) {
2800 printk(KERN_WARNING "hda_codec: No auto-config is "
2801 "available, default to model=ref\n");
2802 spec->board_config = STAC_92HD71BXX_REF;
2803 goto again;
2804 }
2805 err = -EINVAL;
2806 }
2807
2808 if (err < 0) {
2809 stac92xx_free(codec);
2810 return err;
2811 }
2812
2813 codec->patch_ops = stac92xx_patch_ops;
2814
2815 return 0;
2816};
2817
2f2f4251
M		 2818static int patch_stac922x(struct hda_codec *codec)
2819{
2820 struct sigmatel_spec *spec;
c7d4b2fa 2821 int err;
2f2f4251 2822
e560d8d8 2823 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2824 if (spec == NULL)
2825 return -ENOMEM;
2826
2827 codec->spec = spec;
a4eed138 2828 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 2829 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 2830 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
2831 stac922x_models,
2832 stac922x_cfg_tbl);
5d5d3bc3 2833 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 2834 spec->gpio_mute = 1;
2835 /* Intel Macs have all same PCI SSID, so we need to check
2836 * codec SSID to distinguish the exact models
2837 */
6f0778d8 2838 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 2839 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 2840
2841 case 0x106b0800:
2842 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 2843 break;
5d5d3bc3
IZ		 2844 case 0x106b0600:
2845 case 0x106b0700:
2846 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 2847 break;
5d5d3bc3
IZ		 2848 case 0x106b0e00:
2849 case 0x106b0f00:
2850 case 0x106b1600:
2851 case 0x106b1700:
2852 case 0x106b0200:
2853 case 0x106b1e00:
2854 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 2855 break;
5d5d3bc3
IZ		 2856 case 0x106b1a00:
2857 case 0x00000100:
2858 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 2859 break;
5d5d3bc3
IZ		 2860 case 0x106b0a00:
2861 case 0x106b2200:
2862 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 2863 break;
3fc24d85
TI		 2864 }
2865 }
2866
9e507abd 2867 again:
11b44bbd
RF		 2868 if (spec->board_config < 0) {
2869 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
2870 "using BIOS defaults\n");
2871 err = stac92xx_save_bios_config_regs(codec);
2872 if (err < 0) {
2873 stac92xx_free(codec);
2874 return err;
2875 }
2876 spec->pin_configs = spec->bios_pin_configs;
2877 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 2878 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
2879 stac92xx_set_config_regs(codec);
2880 }
2f2f4251 2881
c7d4b2fa
M		 2882 spec->adc_nids = stac922x_adc_nids;
2883 spec->mux_nids = stac922x_mux_nids;
2549413e 2884 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 2885 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 2886 spec->num_dmics = 0;
c7d4b2fa
M		 2887
2888 spec->init = stac922x_core_init;
2f2f4251 2889 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 2890
2891 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 2892
3cc08dc6 2893 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 2894 if (!err) {
2895 if (spec->board_config < 0) {
2896 printk(KERN_WARNING "hda_codec: No auto-config is "
2897 "available, default to model=ref\n");
2898 spec->board_config = STAC_D945_REF;
2899 goto again;
2900 }
2901 err = -EINVAL;
2902 }
3cc08dc6
MP		 2903 if (err < 0) {
2904 stac92xx_free(codec);
2905 return err;
2906 }
2907
2908 codec->patch_ops = stac92xx_patch_ops;
2909
807a4636
TI		 2910 /* Fix Mux capture level; max to 2 */
2911 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
2912 (0 << AC_AMPCAP_OFFSET_SHIFT) |
2913 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
2914 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
2915 (0 << AC_AMPCAP_MUTE_SHIFT));
2916
3cc08dc6
MP		 2917 return 0;
2918}
2919
2920static int patch_stac927x(struct hda_codec *codec)
2921{
2922 struct sigmatel_spec *spec;
2923 int err;
2924
2925 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2926 if (spec == NULL)
2927 return -ENOMEM;
2928
2929 codec->spec = spec;
a4eed138 2930 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 2931 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 2932 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
2933 stac927x_models,
2934 stac927x_cfg_tbl);
9e507abd 2935 again:
11b44bbd 2936 if (spec->board_config < 0) {
3cc08dc6 2937 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
11b44bbd
RF		 2938 err = stac92xx_save_bios_config_regs(codec);
2939 if (err < 0) {
2940 stac92xx_free(codec);
2941 return err;
2942 }
2943 spec->pin_configs = spec->bios_pin_configs;
2944 } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
3cc08dc6
MP		 2945 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
2946 stac92xx_set_config_regs(codec);
2947 }
2948
81d3dbde 2949 switch (spec->board_config) {
93ed1503 2950 case STAC_D965_3ST:
81d3dbde
TD		 2951 spec->adc_nids = stac927x_adc_nids;
2952 spec->mux_nids = stac927x_mux_nids;
2549413e 2953 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2954 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
93ed1503 2955 spec->init = d965_core_init;
9e05b7a3 2956 spec->mixer = stac927x_mixer;
81d3dbde 2957 break;
93ed1503
TD		 2958 case STAC_D965_5ST:
2959 spec->adc_nids = stac927x_adc_nids;
2960 spec->mux_nids = stac927x_mux_nids;
2549413e 2961 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2962 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
93ed1503 2963 spec->init = d965_core_init;
9e05b7a3 2964 spec->mixer = stac927x_mixer;
81d3dbde
TD		 2965 break;
2966 default:
2967 spec->adc_nids = stac927x_adc_nids;
2968 spec->mux_nids = stac927x_mux_nids;
2549413e 2969 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
9e05b7a3 2970 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
81d3dbde
TD		 2971 spec->init = stac927x_core_init;
2972 spec->mixer = stac927x_mixer;
2973 }
3cc08dc6 2974
7f16859a 2975 switch (codec->subsystem_id) {
b222fe50
MR		 2976 case 0x10280242: /* STAC 9228 */
2977 case 0x102801f3:
2978 case 0x1028020A:
2979 case 0x10280209:
7f16859a
MR		 2980 spec->dmic_nids = stac927x_dmic_nids;
2981 spec->num_dmics = STAC927X_NUM_DMICS;
83eef75b 2982 spec->dmux_nid = 0x1b;
f1f208d0
MR		 2983
2984 /* Enable DMIC0 */
2985 stac92xx_set_config_reg(codec, 0x13, 0x90a60040);
2986
2987 /* GPIO2 High = Enable EAPD */
2988 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 2989 break;
2990 default:
f1f208d0
MR		 2991 spec->num_dmics = 0;
2992
2993 /* GPIO0 High = Enable EAPD */
2994 spec->gpio_mask = spec->gpio_data = 0x00000001;
7f16859a
MR		 2995 }
2996
3cc08dc6 2997 spec->multiout.dac_nids = spec->dac_nids;
8259980e 2998 stac92xx_enable_gpio_mask(codec);
92a22beb 2999
3cc08dc6 3000 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3001 if (!err) {
3002 if (spec->board_config < 0) {
3003 printk(KERN_WARNING "hda_codec: No auto-config is "
3004 "available, default to model=ref\n");
3005 spec->board_config = STAC_D965_REF;
3006 goto again;
3007 }
3008 err = -EINVAL;
3009 }
c7d4b2fa
M		 3010 if (err < 0) {
3011 stac92xx_free(codec);
3012 return err;
3013 }
2f2f4251
M		 3014
3015 codec->patch_ops = stac92xx_patch_ops;
3016
3017 return 0;
3018}
3019
f3302a59
MP		 3020static int patch_stac9205(struct hda_codec *codec)
3021{
3022 struct sigmatel_spec *spec;
8259980e 3023 int err;
f3302a59
MP		 3024
3025 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3026 if (spec == NULL)
3027 return -ENOMEM;
3028
3029 codec->spec = spec;
a4eed138 3030 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3031 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3032 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3033 stac9205_models,
3034 stac9205_cfg_tbl);
9e507abd 3035 again:
11b44bbd
RF		 3036 if (spec->board_config < 0) {
3037 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3038 err = stac92xx_save_bios_config_regs(codec);
3039 if (err < 0) {
3040 stac92xx_free(codec);
3041 return err;
3042 }
3043 spec->pin_configs = spec->bios_pin_configs;
3044 } else {
f3302a59
MP		 3045 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3046 stac92xx_set_config_regs(codec);
3047 }
3048
3049 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3050 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3051 spec->mux_nids = stac9205_mux_nids;
2549413e 3052 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3053 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3054 spec->num_dmics = STAC9205_NUM_DMICS;
8b65727b 3055 spec->dmux_nid = 0x1d;
f3302a59
MP		 3056
3057 spec->init = stac9205_core_init;
3058 spec->mixer = stac9205_mixer;
3059
3060 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3061
ae0a8ed8 3062 switch (spec->board_config){
ae0a8ed8 3063 case STAC_9205_DELL_M43:
87d48363
MR		 3064 /* Enable SPDIF in/out */
3065 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3066 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3067
8259980e 3068 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 3069 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
3070 * GPIO2 High = Headphone Mute
3071 */
8259980e 3072 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 3073 break;
3074 default:
3075 /* GPIO0 High = EAPD */
3076 spec->gpio_mask = spec->gpio_data = 0x00000001;
3077 break;
3078 }
33382403 3079
8259980e 3080 stac92xx_enable_gpio_mask(codec);
f3302a59 3081 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3082 if (!err) {
3083 if (spec->board_config < 0) {
3084 printk(KERN_WARNING "hda_codec: No auto-config is "
3085 "available, default to model=ref\n");
3086 spec->board_config = STAC_9205_REF;
3087 goto again;
3088 }
3089 err = -EINVAL;
3090 }
f3302a59
MP		 3091 if (err < 0) {
3092 stac92xx_free(codec);
3093 return err;
3094 }
3095
3096 codec->patch_ops = stac92xx_patch_ops;
3097
3098 return 0;
3099}
3100
db064e50 3101/*
6d859065 3102 * STAC9872 hack
db064e50
TI		 3103 */
3104
99ccc560 3105/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3106static hda_nid_t vaio_dacs[] = { 0x2 };
3107#define VAIO_HP_DAC 0x5
3108static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3109static hda_nid_t vaio_mux_nids[] = { 0x15 };
3110
3111static struct hda_input_mux vaio_mux = {
a3a2f429 3112 .num_items = 3,
db064e50 3113 .items = {
d773781c 3114 /* { "HP", 0x0 }, */
1624cb9a
TI		 3115 { "Mic Jack", 0x1 },
3116 { "Internal Mic", 0x2 },
db064e50
TI		 3117 { "PCM", 0x3 },
3118 }
3119};
3120
3121static struct hda_verb vaio_init[] = {
3122 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3123 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3124 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3125 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3126 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3127 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3128 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3129 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3130 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3131 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3132 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3133 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3134 {}
3135};
3136
6d859065
GM		 3137static struct hda_verb vaio_ar_init[] = {
3138 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3139 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3140 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3141 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3142/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3143 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3144 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3145 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3146 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3147/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3148 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3149 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3150 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3151 {}
3152};
3153
db064e50 3154/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3155static struct hda_bind_ctls vaio_bind_master_vol = {
3156 .ops = &snd_hda_bind_vol,
3157 .values = {
3158 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3159 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3160 0
3161 },
3162};
db064e50
TI		 3163
3164/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3165static struct hda_bind_ctls vaio_bind_master_sw = {
3166 .ops = &snd_hda_bind_sw,
3167 .values = {
3168 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3169 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3170 0,
3171 },
3172};
db064e50
TI		 3173
3174static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3175 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3176 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3177 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3178 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3179 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3180 {
3181 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3182 .name = "Capture Source",
3183 .count = 1,
3184 .info = stac92xx_mux_enum_info,
3185 .get = stac92xx_mux_enum_get,
3186 .put = stac92xx_mux_enum_put,
3187 },
3188 {}
3189};
3190
6d859065 3191static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3192 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3193 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3194 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3195 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3196 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3197 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3198 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3199 {
3200 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3201 .name = "Capture Source",
3202 .count = 1,
3203 .info = stac92xx_mux_enum_info,
3204 .get = stac92xx_mux_enum_get,
3205 .put = stac92xx_mux_enum_put,
3206 },
3207 {}
3208};
3209
3210static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3211 .build_controls = stac92xx_build_controls,
3212 .build_pcms = stac92xx_build_pcms,
3213 .init = stac92xx_init,
3214 .free = stac92xx_free,
cb53c626 3215#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3216 .resume = stac92xx_resume,
3217#endif
3218};
3219
72e7b0dd
TI		 3220static int stac9872_vaio_init(struct hda_codec *codec)
3221{
3222 int err;
3223
3224 err = stac92xx_init(codec);
3225 if (err < 0)
3226 return err;
3227 if (codec->patch_ops.unsol_event)
3228 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3229 return 0;
3230}
3231
3232static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3233{
40c1d308 3234 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3235 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3236 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3237 } else {
3238 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3239 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3240 }
3241}
3242
3243static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3244{
3245 switch (res >> 26) {
3246 case STAC_HP_EVENT:
3247 stac9872_vaio_hp_detect(codec, res);
3248 break;
3249 }
3250}
3251
3252static struct hda_codec_ops stac9872_vaio_patch_ops = {
3253 .build_controls = stac92xx_build_controls,
3254 .build_pcms = stac92xx_build_pcms,
3255 .init = stac9872_vaio_init,
3256 .free = stac92xx_free,
3257 .unsol_event = stac9872_vaio_unsol_event,
3258#ifdef CONFIG_PM
3259 .resume = stac92xx_resume,
3260#endif
3261};
3262
6d859065
GM		 3263enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3264 CXD9872RD_VAIO,
3265 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3266 STAC9872AK_VAIO,
3267 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3268 STAC9872K_VAIO,
3269 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3270 CXD9872AKD_VAIO,
3271 STAC_9872_MODELS,
3272};
3273
3274static const char *stac9872_models[STAC_9872_MODELS] = {
3275 [CXD9872RD_VAIO] = "vaio",
3276 [CXD9872AKD_VAIO] = "vaio-ar",
3277};
3278
3279static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3280 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3281 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3282 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3283 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3284 {}
3285};
3286
6d859065 3287static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3288{
3289 struct sigmatel_spec *spec;
3290 int board_config;
3291
f5fcc13c
TI		 3292 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3293 stac9872_models,
3294 stac9872_cfg_tbl);
db064e50
TI		 3295 if (board_config < 0)
3296 /* unknown config, let generic-parser do its job... */
3297 return snd_hda_parse_generic_codec(codec);
3298
3299 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3300 if (spec == NULL)
3301 return -ENOMEM;
3302
3303 codec->spec = spec;
3304 switch (board_config) {
6d859065
GM		 3305 case CXD9872RD_VAIO:
3306 case STAC9872AK_VAIO:
3307 case STAC9872K_VAIO:
db064e50
TI		 3308 spec->mixer = vaio_mixer;
3309 spec->init = vaio_init;
3310 spec->multiout.max_channels = 2;
3311 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3312 spec->multiout.dac_nids = vaio_dacs;
3313 spec->multiout.hp_nid = VAIO_HP_DAC;
3314 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3315 spec->adc_nids = vaio_adcs;
3316 spec->input_mux = &vaio_mux;
3317 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3318 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3319 break;
6d859065
GM		 3320
3321 case CXD9872AKD_VAIO:
3322 spec->mixer = vaio_ar_mixer;
3323 spec->init = vaio_ar_init;
3324 spec->multiout.max_channels = 2;
3325 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3326 spec->multiout.dac_nids = vaio_dacs;
3327 spec->multiout.hp_nid = VAIO_HP_DAC;
3328 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3329 spec->adc_nids = vaio_adcs;
3330 spec->input_mux = &vaio_mux;
3331 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3332 codec->patch_ops = stac9872_patch_ops;
6d859065 3333 break;
db064e50
TI		 3334 }
3335
db064e50
TI		 3336 return 0;
3337}
3338
3339
2f2f4251
M		 3340/*
3341 * patch entries
3342 */
3343struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3344 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3345 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3346 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3347 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3348 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3349 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3350 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3351 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3352 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3353 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3354 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3355 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3356 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3357 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3358 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3359 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3360 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3361 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3362 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3363 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3364 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3365 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3366 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3367 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3368 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3369 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3370 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3371 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3372 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3373 /* The following does not take into account .id=0x83847661 when subsys =
3374 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3375 * currently not fully supported.
3376 */
3377 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3378 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3379 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3380 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3381 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3382 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3383 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3384 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3385 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3386 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3387 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
e035b841 3388 { .id = 0x111d76b0, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
2f2f4251
M		 3389 {} /* terminator */
3390};
Linux kernel - Deliverables
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