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[ALSA] Add more fallbacks to OSS PHONEOUT mixer map
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
35
4e55096e 36#define NUM_CONTROL_ALLOC 32
a64135a2
MR		 37#define STAC_PWR_EVENT 0x20
38#define STAC_HP_EVENT 0x30
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
bf277785 42 STAC_9200_OQO,
dfe495d0
TI		 43 STAC_9200_DELL_D21,
44 STAC_9200_DELL_D22,
45 STAC_9200_DELL_D23,
46 STAC_9200_DELL_M21,
47 STAC_9200_DELL_M22,
48 STAC_9200_DELL_M23,
49 STAC_9200_DELL_M24,
50 STAC_9200_DELL_M25,
51 STAC_9200_DELL_M26,
52 STAC_9200_DELL_M27,
1194b5b7 53 STAC_9200_GATEWAY,
f5fcc13c
TI		 54 STAC_9200_MODELS
55};
56
57enum {
58 STAC_9205_REF,
dfe495d0 59 STAC_9205_DELL_M42,
ae0a8ed8
TD		 60 STAC_9205_DELL_M43,
61 STAC_9205_DELL_M44,
f5fcc13c
TI		 62 STAC_9205_MODELS
63};
64
e1f0d669
MR		 65enum {
66 STAC_92HD73XX_REF,
67 STAC_92HD73XX_MODELS
68};
69
e035b841
MR		 70enum {
71 STAC_92HD71BXX_REF,
72 STAC_92HD71BXX_MODELS
73};
74
8e21c34c
TD		 75enum {
76 STAC_925x_REF,
77 STAC_M2_2,
78 STAC_MA6,
2c11f955 79 STAC_PA6,
8e21c34c
TD		 80 STAC_925x_MODELS
81};
82
f5fcc13c
TI		 83enum {
84 STAC_D945_REF,
85 STAC_D945GTP3,
86 STAC_D945GTP5,
5d5d3bc3
IZ		 87 STAC_INTEL_MAC_V1,
88 STAC_INTEL_MAC_V2,
89 STAC_INTEL_MAC_V3,
90 STAC_INTEL_MAC_V4,
91 STAC_INTEL_MAC_V5,
dfe495d0 92 /* for backward compatibility */
f5fcc13c 93 STAC_MACMINI,
3fc24d85 94 STAC_MACBOOK,
6f0778d8
NB		 95 STAC_MACBOOK_PRO_V1,
96 STAC_MACBOOK_PRO_V2,
f16928fb 97 STAC_IMAC_INTEL,
0dae0f83 98 STAC_IMAC_INTEL_20,
dfe495d0
TI		 99 STAC_922X_DELL_D81,
100 STAC_922X_DELL_D82,
101 STAC_922X_DELL_M81,
102 STAC_922X_DELL_M82,
f5fcc13c
TI		 103 STAC_922X_MODELS
104};
105
106enum {
107 STAC_D965_REF,
108 STAC_D965_3ST,
109 STAC_D965_5ST,
4ff076e5 110 STAC_DELL_3ST,
8e9068b1 111 STAC_DELL_BIOS,
f5fcc13c
TI		 112 STAC_927X_MODELS
113};
403d1944 114
2f2f4251 115struct sigmatel_spec {
c8b6bf9b 116 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 117 unsigned int num_mixers;
118
403d1944 119 int board_config;
c7d4b2fa 120 unsigned int surr_switch: 1;
403d1944
MP		 121 unsigned int line_switch: 1;
122 unsigned int mic_switch: 1;
3cc08dc6 123 unsigned int alt_switch: 1;
82bc955f 124 unsigned int hp_detect: 1;
c7d4b2fa 125
4fe5195c
MR		 126 /* gpio lines */
127 unsigned int gpio_mask;
128 unsigned int gpio_dir;
129 unsigned int gpio_data;
130 unsigned int gpio_mute;
131
132 /* analog loopback */
e1f0d669
MR		 133 unsigned char aloopback_mask;
134 unsigned char aloopback_shift;
8259980e 135
a64135a2
MR		 136 /* power management */
137 unsigned int num_pwrs;
138 hda_nid_t *pwr_nids;
139
2f2f4251 140 /* playback */
b22b4821
MR		 141 struct hda_input_mux *mono_mux;
142 unsigned int cur_mmux;
2f2f4251 143 struct hda_multi_out multiout;
3cc08dc6 144 hda_nid_t dac_nids[5];
2f2f4251
M		 145
146 /* capture */
147 hda_nid_t *adc_nids;
2f2f4251 148 unsigned int num_adcs;
dabbed6f
M		 149 hda_nid_t *mux_nids;
150 unsigned int num_muxes;
8b65727b
MP		 151 hda_nid_t *dmic_nids;
152 unsigned int num_dmics;
e1f0d669 153 hda_nid_t *dmux_nids;
1697055e 154 unsigned int num_dmuxes;
dabbed6f 155 hda_nid_t dig_in_nid;
b22b4821 156 hda_nid_t mono_nid;
2f2f4251 157
2f2f4251
M		 158 /* pin widgets */
159 hda_nid_t *pin_nids;
160 unsigned int num_pins;
2f2f4251 161 unsigned int *pin_configs;
11b44bbd 162 unsigned int *bios_pin_configs;
2f2f4251
M		 163
164 /* codec specific stuff */
165 struct hda_verb *init;
c8b6bf9b 166 struct snd_kcontrol_new *mixer;
2f2f4251
M		 167
168 /* capture source */
8b65727b 169 struct hda_input_mux *dinput_mux;
e1f0d669 170 unsigned int cur_dmux[2];
c7d4b2fa 171 struct hda_input_mux *input_mux;
3cc08dc6 172 unsigned int cur_mux[3];
2f2f4251 173
403d1944
MP		 174 /* i/o switches */
175 unsigned int io_switch[2];
0fb87bb4 176 unsigned int clfe_swap;
5f10c4a9 177 unsigned int aloopback;
2f2f4251 178
c7d4b2fa
M		 179 struct hda_pcm pcm_rec[2]; /* PCM information */
180
181 /* dynamic controls and input_mux */
182 struct auto_pin_cfg autocfg;
183 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 184 struct snd_kcontrol_new *kctl_alloc;
8b65727b 185 struct hda_input_mux private_dimux;
c7d4b2fa 186 struct hda_input_mux private_imux;
b22b4821 187 struct hda_input_mux private_mono_mux;
2134ea4f
TI		 188
189 /* virtual master */
190 unsigned int vmaster_tlv[4];
2f2f4251
M		 191};
192
193static hda_nid_t stac9200_adc_nids[1] = {
194 0x03,
195};
196
197static hda_nid_t stac9200_mux_nids[1] = {
198 0x0c,
199};
200
201static hda_nid_t stac9200_dac_nids[1] = {
202 0x02,
203};
204
a64135a2
MR		 205static hda_nid_t stac92hd73xx_pwr_nids[8] = {
206 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
207 0x0f, 0x10, 0x11
208};
209
e1f0d669
MR		 210static hda_nid_t stac92hd73xx_adc_nids[2] = {
211 0x1a, 0x1b
212};
213
214#define STAC92HD73XX_NUM_DMICS 2
215static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
216 0x13, 0x14, 0
217};
218
219#define STAC92HD73_DAC_COUNT 5
220static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
221 0x15, 0x16, 0x17, 0x18, 0x19,
222};
223
224static hda_nid_t stac92hd73xx_mux_nids[4] = {
225 0x28, 0x29, 0x2a, 0x2b,
226};
227
228static hda_nid_t stac92hd73xx_dmux_nids[2] = {
229 0x20, 0x21,
230};
231
a64135a2
MR		 232static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
233 0x0a, 0x0d, 0x0f
234};
235
e035b841
MR		 236static hda_nid_t stac92hd71bxx_adc_nids[2] = {
237 0x12, 0x13,
238};
239
240static hda_nid_t stac92hd71bxx_mux_nids[2] = {
241 0x1a, 0x1b
242};
243
e1f0d669
MR		 244static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
245 0x1c,
246};
247
e035b841
MR		 248static hda_nid_t stac92hd71bxx_dac_nids[2] = {
249 0x10, /*0x11, */
250};
251
252#define STAC92HD71BXX_NUM_DMICS 2
253static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
254 0x18, 0x19, 0
255};
256
8e21c34c
TD		 257static hda_nid_t stac925x_adc_nids[1] = {
258 0x03,
259};
260
261static hda_nid_t stac925x_mux_nids[1] = {
262 0x0f,
263};
264
265static hda_nid_t stac925x_dac_nids[1] = {
266 0x02,
267};
268
f6e9852a
TI		 269#define STAC925X_NUM_DMICS 1
270static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
271 0x15, 0
2c11f955
TD		 272};
273
1697055e
TI		 274static hda_nid_t stac925x_dmux_nids[1] = {
275 0x14,
276};
277
2f2f4251
M		 278static hda_nid_t stac922x_adc_nids[2] = {
279 0x06, 0x07,
280};
281
282static hda_nid_t stac922x_mux_nids[2] = {
283 0x12, 0x13,
284};
285
3cc08dc6
MP		 286static hda_nid_t stac927x_adc_nids[3] = {
287 0x07, 0x08, 0x09
288};
289
290static hda_nid_t stac927x_mux_nids[3] = {
291 0x15, 0x16, 0x17
292};
293
e1f0d669
MR		 294static hda_nid_t stac927x_dmux_nids[1] = {
295 0x1b,
296};
297
7f16859a
MR		 298#define STAC927X_NUM_DMICS 2
299static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
300 0x13, 0x14, 0
301};
302
f3302a59
MP		 303static hda_nid_t stac9205_adc_nids[2] = {
304 0x12, 0x13
305};
306
307static hda_nid_t stac9205_mux_nids[2] = {
308 0x19, 0x1a
309};
310
e1f0d669 311static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 312 0x1d,
e1f0d669
MR		 313};
314
f6e9852a
TI		 315#define STAC9205_NUM_DMICS 2
316static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
317 0x17, 0x18, 0
8b65727b
MP		 318};
319
c7d4b2fa 320static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 321 0x08, 0x09, 0x0d, 0x0e,
322 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 323};
324
8e21c34c
TD		 325static hda_nid_t stac925x_pin_nids[8] = {
326 0x07, 0x08, 0x0a, 0x0b,
327 0x0c, 0x0d, 0x10, 0x11,
328};
329
2f2f4251
M		 330static hda_nid_t stac922x_pin_nids[10] = {
331 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
332 0x0f, 0x10, 0x11, 0x15, 0x1b,
333};
334
e1f0d669
MR		 335static hda_nid_t stac92hd73xx_pin_nids[12] = {
336 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
337 0x0f, 0x10, 0x11, 0x12, 0x13,
338 0x14, 0x22
339};
340
e035b841
MR		 341static hda_nid_t stac92hd71bxx_pin_nids[10] = {
342 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
343 0x0f, 0x14, 0x18, 0x19, 0x1e,
344};
345
3cc08dc6
MP		 346static hda_nid_t stac927x_pin_nids[14] = {
347 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
348 0x0f, 0x10, 0x11, 0x12, 0x13,
349 0x14, 0x21, 0x22, 0x23,
350};
351
f3302a59
MP		 352static hda_nid_t stac9205_pin_nids[12] = {
353 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
354 0x0f, 0x14, 0x16, 0x17, 0x18,
355 0x21, 0x22,
f3302a59
MP		 356};
357
8b65727b
MP		 358static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
359 struct snd_ctl_elem_info *uinfo)
360{
361 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
362 struct sigmatel_spec *spec = codec->spec;
363 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
364}
365
366static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
367 struct snd_ctl_elem_value *ucontrol)
368{
369 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
370 struct sigmatel_spec *spec = codec->spec;
e1f0d669 371 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 372
e1f0d669 373 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 374 return 0;
375}
376
377static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_value *ucontrol)
379{
380 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
381 struct sigmatel_spec *spec = codec->spec;
e1f0d669 382 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 383
384 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 385 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 386}
387
c8b6bf9b 388static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 389{
390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
391 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 392 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 393}
394
c8b6bf9b 395static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 396{
397 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
398 struct sigmatel_spec *spec = codec->spec;
399 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
400
401 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
402 return 0;
403}
404
c8b6bf9b 405static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 406{
407 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
408 struct sigmatel_spec *spec = codec->spec;
409 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
410
c7d4b2fa 411 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 412 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
413}
414
b22b4821
MR		 415static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
416 struct snd_ctl_elem_info *uinfo)
417{
418 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
419 struct sigmatel_spec *spec = codec->spec;
420 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
421}
422
423static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
424 struct snd_ctl_elem_value *ucontrol)
425{
426 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
427 struct sigmatel_spec *spec = codec->spec;
428
429 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
430 return 0;
431}
432
433static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
434 struct snd_ctl_elem_value *ucontrol)
435{
436 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
437 struct sigmatel_spec *spec = codec->spec;
438
439 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
440 spec->mono_nid, &spec->cur_mmux);
441}
442
5f10c4a9
ML		 443#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
444
445static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
446 struct snd_ctl_elem_value *ucontrol)
447{
448 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 449 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 450 struct sigmatel_spec *spec = codec->spec;
451
e1f0d669
MR		 452 ucontrol->value.integer.value[0] = !!(spec->aloopback &
453 (spec->aloopback_mask << idx));
5f10c4a9
ML		 454 return 0;
455}
456
457static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
458 struct snd_ctl_elem_value *ucontrol)
459{
460 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
461 struct sigmatel_spec *spec = codec->spec;
e1f0d669 462 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 463 unsigned int dac_mode;
e1f0d669 464 unsigned int val, idx_val;
5f10c4a9 465
e1f0d669
MR		 466 idx_val = spec->aloopback_mask << idx;
467 if (ucontrol->value.integer.value[0])
468 val = spec->aloopback | idx_val;
469 else
470 val = spec->aloopback & ~idx_val;
68ea7b2f 471 if (spec->aloopback == val)
5f10c4a9
ML		 472 return 0;
473
68ea7b2f 474 spec->aloopback = val;
5f10c4a9 475
e1f0d669
MR		 476 /* Only return the bits defined by the shift value of the
477 * first two bytes of the mask
478 */
5f10c4a9 479 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 480 kcontrol->private_value & 0xFFFF, 0x0);
481 dac_mode >>= spec->aloopback_shift;
5f10c4a9 482
e1f0d669 483 if (spec->aloopback & idx_val) {
5f10c4a9 484 snd_hda_power_up(codec);
e1f0d669 485 dac_mode |= idx_val;
5f10c4a9
ML		 486 } else {
487 snd_hda_power_down(codec);
e1f0d669 488 dac_mode &= ~idx_val;
5f10c4a9
ML		 489 }
490
491 snd_hda_codec_write_cache(codec, codec->afg, 0,
492 kcontrol->private_value >> 16, dac_mode);
493
494 return 1;
495}
496
c7d4b2fa 497static struct hda_verb stac9200_core_init[] = {
2f2f4251 498 /* set dac0mux for dac converter */
c7d4b2fa 499 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 500 {}
501};
502
1194b5b7
TI		 503static struct hda_verb stac9200_eapd_init[] = {
504 /* set dac0mux for dac converter */
505 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
506 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
507 {}
508};
509
e1f0d669
MR		 510static struct hda_verb stac92hd73xx_6ch_core_init[] = {
511 /* set master volume and direct control */
512 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
513 /* setup audio connections */
514 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
515 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
516 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
517 /* setup adcs to point to mixer */
518 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
519 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 520 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
521 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
522 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
523 /* setup import muxs */
524 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
525 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
526 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
527 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
528 {}
529};
530
531static struct hda_verb stac92hd73xx_8ch_core_init[] = {
532 /* set master volume and direct control */
533 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
534 /* setup audio connections */
535 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
536 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
537 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
538 /* connect hp ports to dac3 */
539 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
540 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
541 /* setup adcs to point to mixer */
542 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
543 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 544 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
545 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
546 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
547 /* setup import muxs */
548 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
549 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
550 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
551 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
552 {}
553};
554
555static struct hda_verb stac92hd73xx_10ch_core_init[] = {
556 /* set master volume and direct control */
557 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
558 /* setup audio connections */
559 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
560 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
561 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
562 /* dac3 is connected to import3 mux */
563 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
564 /* connect hp ports to dac4 */
565 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
566 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
567 /* setup adcs to point to mixer */
568 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
569 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 570 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
571 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
572 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
573 /* setup import muxs */
574 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
575 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
576 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
577 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
578 {}
579};
580
e035b841 581static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 582 /* set master volume and direct control */
583 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
584 /* connect headphone jack to dac1 */
585 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
586 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
587 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
588 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
589 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
590 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 591};
592
593static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 594 /* set master volume and direct control */
595 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
596 /* connect headphone jack to dac1 */
597 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 598 /* connect ports 0d and 0f to audio mixer */
599 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
600 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
a64135a2 601 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
9b35947f
MR		 602 /* unmute dac0 input in audio mixer */
603 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 604 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
605 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
606 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
607 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 608 {}
609};
610
8e21c34c
TD		 611static struct hda_verb stac925x_core_init[] = {
612 /* set dac0mux for dac converter */
613 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
614 {}
615};
616
c7d4b2fa 617static struct hda_verb stac922x_core_init[] = {
2f2f4251 618 /* set master volume and direct control */
c7d4b2fa 619 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 620 {}
621};
622
93ed1503 623static struct hda_verb d965_core_init[] = {
19039bd0 624 /* set master volume and direct control */
93ed1503 625 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 626 /* unmute node 0x1b */
627 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
628 /* select node 0x03 as DAC */
629 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
630 {}
631};
632
3cc08dc6
MP		 633static struct hda_verb stac927x_core_init[] = {
634 /* set master volume and direct control */
635 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
636 {}
637};
638
f3302a59
MP		 639static struct hda_verb stac9205_core_init[] = {
640 /* set master volume and direct control */
641 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
642 {}
643};
644
b22b4821
MR		 645#define STAC_MONO_MUX \
646 { \
647 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
648 .name = "Mono Mux", \
649 .count = 1, \
650 .info = stac92xx_mono_mux_enum_info, \
651 .get = stac92xx_mono_mux_enum_get, \
652 .put = stac92xx_mono_mux_enum_put, \
653 }
654
9e05b7a3 655#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 656 { \
657 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
658 .name = "Input Source", \
9e05b7a3 659 .count = cnt, \
ca7c5a8b
ML		 660 .info = stac92xx_mux_enum_info, \
661 .get = stac92xx_mux_enum_get, \
662 .put = stac92xx_mux_enum_put, \
663 }
664
e1f0d669 665#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 666 { \
667 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
668 .name = "Analog Loopback", \
e1f0d669 669 .count = cnt, \
5f10c4a9
ML		 670 .info = stac92xx_aloopback_info, \
671 .get = stac92xx_aloopback_get, \
672 .put = stac92xx_aloopback_put, \
673 .private_value = verb_read | (verb_write << 16), \
674 }
675
c8b6bf9b 676static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 677 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
678 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 679 STAC_INPUT_SOURCE(1),
2f2f4251
M		 680 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
681 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 682 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 683 { } /* end */
684};
685
e1f0d669 686static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
e1f0d669
MR		 687 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
688
e1f0d669
MR		 689 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
690 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
691
692 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
693 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
694
695 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
696 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
697
698 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
699 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
700
701 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
702 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
703
704 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
705 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
706
707 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
708 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
709 { } /* end */
710};
711
712static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 713 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
714
e1f0d669
MR		 715 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
716 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
717
718 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
719 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
720
721 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
722 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
723
724 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
725 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
726
727 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
728 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
729
730 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
731 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
732
733 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
734 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
735 { } /* end */
736};
737
738static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 739 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
740
e1f0d669
MR		 741 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
742 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
743
744 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
745 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
746
747 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
748 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
749
750 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
751 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
752
753 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
754 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
755
756 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
757 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
758
759 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
760 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
761 { } /* end */
762};
763
541eee87 764static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 765 STAC_INPUT_SOURCE(2),
e035b841 766
9b35947f
MR		 767 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
768 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
769 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
770
771 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
772 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
773 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 774
9b35947f
MR		 775 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
776 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 777 { } /* end */
778};
779
541eee87 780static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 781 STAC_INPUT_SOURCE(2),
782 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
783
541eee87
MR		 784 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
785 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
786 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
787
788 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
789 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
790 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
791 { } /* end */
792};
793
8e21c34c 794static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 795 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 796 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
797 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
798 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
799 { } /* end */
800};
801
9e05b7a3 802static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 803 STAC_INPUT_SOURCE(2),
e1f0d669 804 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 805
806 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
807 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
808 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
809
810 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
811 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
812 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
813
2f2f4251
M		 814 { } /* end */
815};
816
19039bd0 817/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 818static struct snd_kcontrol_new stac922x_mixer[] = {
819 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 820 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
821 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
822 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
823
824 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
825 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
826 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 827 { } /* end */
828};
829
9e05b7a3 830
d1d985f0 831static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 832 STAC_INPUT_SOURCE(3),
e1f0d669 833 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 834
9e05b7a3
ML		 835 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
836 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
837 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
838
839 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
840 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
841 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
842
843 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
844 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
845 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 846 { } /* end */
847};
848
1697055e
TI		 849static struct snd_kcontrol_new stac_dmux_mixer = {
850 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
851 .name = "Digital Input Source",
852 /* count set later */
853 .info = stac92xx_dmux_enum_info,
854 .get = stac92xx_dmux_enum_get,
855 .put = stac92xx_dmux_enum_put,
856};
857
2134ea4f
TI		 858static const char *slave_vols[] = {
859 "Front Playback Volume",
860 "Surround Playback Volume",
861 "Center Playback Volume",
862 "LFE Playback Volume",
863 "Side Playback Volume",
864 "Headphone Playback Volume",
865 "Headphone Playback Volume",
866 "Speaker Playback Volume",
867 "External Speaker Playback Volume",
868 "Speaker2 Playback Volume",
869 NULL
870};
871
872static const char *slave_sws[] = {
873 "Front Playback Switch",
874 "Surround Playback Switch",
875 "Center Playback Switch",
876 "LFE Playback Switch",
877 "Side Playback Switch",
878 "Headphone Playback Switch",
879 "Headphone Playback Switch",
880 "Speaker Playback Switch",
881 "External Speaker Playback Switch",
882 "Speaker2 Playback Switch",
edb54a55 883 "IEC958 Playback Switch",
2134ea4f
TI		 884 NULL
885};
886
2f2f4251
M		 887static int stac92xx_build_controls(struct hda_codec *codec)
888{
889 struct sigmatel_spec *spec = codec->spec;
890 int err;
c7d4b2fa 891 int i;
2f2f4251
M		 892
893 err = snd_hda_add_new_ctls(codec, spec->mixer);
894 if (err < 0)
895 return err;
c7d4b2fa
M		 896
897 for (i = 0; i < spec->num_mixers; i++) {
898 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
899 if (err < 0)
900 return err;
901 }
1697055e
TI		 902 if (spec->num_dmuxes > 0) {
903 stac_dmux_mixer.count = spec->num_dmuxes;
904 err = snd_ctl_add(codec->bus->card,
905 snd_ctl_new1(&stac_dmux_mixer, codec));
906 if (err < 0)
907 return err;
908 }
c7d4b2fa 909
dabbed6f
M		 910 if (spec->multiout.dig_out_nid) {
911 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
912 if (err < 0)
913 return err;
914 }
915 if (spec->dig_in_nid) {
916 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
917 if (err < 0)
918 return err;
919 }
2134ea4f
TI		 920
921 /* if we have no master control, let's create it */
922 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
923 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
924 HDA_OUTPUT, spec->vmaster_tlv);
925 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
926 spec->vmaster_tlv, slave_vols);
927 if (err < 0)
928 return err;
929 }
930 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
931 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
932 NULL, slave_sws);
933 if (err < 0)
934 return err;
935 }
936
dabbed6f 937 return 0;
2f2f4251
M		 938}
939
403d1944 940static unsigned int ref9200_pin_configs[8] = {
dabbed6f 941 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 942 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
943};
944
dfe495d0
TI		 945/*
946 STAC 9200 pin configs for
947 102801A8
948 102801DE
949 102801E8
950*/
951static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 952 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
953 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 954};
955
956/*
957 STAC 9200 pin configs for
958 102801C0
959 102801C1
960*/
961static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 962 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
963 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 964};
965
966/*
967 STAC 9200 pin configs for
968 102801C4 (Dell Dimension E310)
969 102801C5
970 102801C7
971 102801D9
972 102801DA
973 102801E3
974*/
975static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 976 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
977 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 978};
979
980
981/*
982 STAC 9200-32 pin configs for
983 102801B5 (Dell Inspiron 630m)
984 102801D8 (Dell Inspiron 640m)
985*/
986static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 987 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
988 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 989};
990
991/*
992 STAC 9200-32 pin configs for
993 102801C2 (Dell Latitude D620)
994 102801C8
995 102801CC (Dell Latitude D820)
996 102801D4
997 102801D6
998*/
999static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1000 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1001 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1002};
1003
1004/*
1005 STAC 9200-32 pin configs for
1006 102801CE (Dell XPS M1710)
1007 102801CF (Dell Precision M90)
1008*/
1009static unsigned int dell9200_m23_pin_configs[8] = {
1010 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1011 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1012};
1013
1014/*
1015 STAC 9200-32 pin configs for
1016 102801C9
1017 102801CA
1018 102801CB (Dell Latitude 120L)
1019 102801D3
1020*/
1021static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1022 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1023 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1024};
1025
1026/*
1027 STAC 9200-32 pin configs for
1028 102801BD (Dell Inspiron E1505n)
1029 102801EE
1030 102801EF
1031*/
1032static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1033 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1034 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1035};
1036
1037/*
1038 STAC 9200-32 pin configs for
1039 102801F5 (Dell Inspiron 1501)
1040 102801F6
1041*/
1042static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1043 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1044 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1045};
1046
1047/*
1048 STAC 9200-32
1049 102801CD (Dell Inspiron E1705/9400)
1050*/
1051static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1052 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1053 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1054};
1055
bf277785
TD		 1056static unsigned int oqo9200_pin_configs[8] = {
1057 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1058 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1059};
1060
dfe495d0 1061
f5fcc13c
TI		 1062static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1063 [STAC_REF] = ref9200_pin_configs,
bf277785 1064 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1065 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1066 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1067 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1068 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1069 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1070 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1071 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1072 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1073 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1074 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 1075};
1076
f5fcc13c
TI		 1077static const char *stac9200_models[STAC_9200_MODELS] = {
1078 [STAC_REF] = "ref",
bf277785 1079 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1080 [STAC_9200_DELL_D21] = "dell-d21",
1081 [STAC_9200_DELL_D22] = "dell-d22",
1082 [STAC_9200_DELL_D23] = "dell-d23",
1083 [STAC_9200_DELL_M21] = "dell-m21",
1084 [STAC_9200_DELL_M22] = "dell-m22",
1085 [STAC_9200_DELL_M23] = "dell-m23",
1086 [STAC_9200_DELL_M24] = "dell-m24",
1087 [STAC_9200_DELL_M25] = "dell-m25",
1088 [STAC_9200_DELL_M26] = "dell-m26",
1089 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1090 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1091};
1092
1093static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1094 /* SigmaTel reference board */
1095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1096 "DFI LanParty", STAC_REF),
e7377071 1097 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1099 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1101 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1103 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1105 "unknown Dell", STAC_9200_DELL_D22),
1106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1107 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1109 "Dell Latitude D620", STAC_9200_DELL_M22),
1110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1111 "unknown Dell", STAC_9200_DELL_D23),
1112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1113 "unknown Dell", STAC_9200_DELL_D23),
1114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1115 "unknown Dell", STAC_9200_DELL_M22),
1116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1117 "unknown Dell", STAC_9200_DELL_M24),
1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1119 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1121 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1123 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1125 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1127 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1129 "Dell Precision M90", STAC_9200_DELL_M23),
1130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1131 "unknown Dell", STAC_9200_DELL_M22),
1132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1133 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1135 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1137 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1139 "unknown Dell", STAC_9200_DELL_D23),
1140 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1141 "unknown Dell", STAC_9200_DELL_D23),
1142 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1143 "unknown Dell", STAC_9200_DELL_D21),
1144 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1145 "unknown Dell", STAC_9200_DELL_D23),
1146 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1147 "unknown Dell", STAC_9200_DELL_D21),
1148 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1149 "unknown Dell", STAC_9200_DELL_M25),
1150 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1151 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1152 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1153 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1154 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1155 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1156 /* Panasonic */
1157 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1158 /* Gateway machines needs EAPD to be set on resume */
1159 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1160 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1161 STAC_9200_GATEWAY),
1162 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1163 STAC_9200_GATEWAY),
bf277785
TD		 1164 /* OQO Mobile */
1165 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1166 {} /* terminator */
1167};
1168
8e21c34c
TD		 1169static unsigned int ref925x_pin_configs[8] = {
1170 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1171 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1172};
1173
1174static unsigned int stac925x_MA6_pin_configs[8] = {
1175 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1176 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1177};
1178
2c11f955
TD		 1179static unsigned int stac925x_PA6_pin_configs[8] = {
1180 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1181 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1182};
1183
8e21c34c 1184static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1185 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1186 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1187};
1188
1189static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1190 [STAC_REF] = ref925x_pin_configs,
1191 [STAC_M2_2] = stac925xM2_2_pin_configs,
1192 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1193 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1194};
1195
1196static const char *stac925x_models[STAC_925x_MODELS] = {
1197 [STAC_REF] = "ref",
1198 [STAC_M2_2] = "m2-2",
1199 [STAC_MA6] = "m6",
2c11f955 1200 [STAC_PA6] = "pa6",
8e21c34c
TD		 1201};
1202
1203static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1204 /* SigmaTel reference board */
1205 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1206 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1207 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1208 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1209 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1210 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1211 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1212 {} /* terminator */
1213};
1214
e1f0d669
MR		 1215static unsigned int ref92hd73xx_pin_configs[12] = {
1216 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1217 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1218 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1219};
1220
1221static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1222 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1223};
1224
1225static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1226 [STAC_92HD73XX_REF] = "ref",
1227};
1228
1229static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1230 /* SigmaTel reference board */
1231 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1232 "DFI LanParty", STAC_92HD73XX_REF),
1233 {} /* terminator */
1234};
1235
e035b841
MR		 1236static unsigned int ref92hd71bxx_pin_configs[10] = {
1237 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
b22b4821 1238 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
e035b841
MR		 1239 0x90a000f0, 0x01452050,
1240};
1241
1242static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1243 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1244};
1245
1246static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1247 [STAC_92HD71BXX_REF] = "ref",
1248};
1249
1250static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1251 /* SigmaTel reference board */
1252 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1253 "DFI LanParty", STAC_92HD71BXX_REF),
1254 {} /* terminator */
1255};
1256
403d1944
MP		 1257static unsigned int ref922x_pin_configs[10] = {
1258 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1259 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1260 0x40000100, 0x40000100,
1261};
1262
dfe495d0
TI		 1263/*
1264 STAC 922X pin configs for
1265 102801A7
1266 102801AB
1267 102801A9
1268 102801D1
1269 102801D2
1270*/
1271static unsigned int dell_922x_d81_pin_configs[10] = {
1272 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1273 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1274 0x01813122, 0x400001f2,
1275};
1276
1277/*
1278 STAC 922X pin configs for
1279 102801AC
1280 102801D0
1281*/
1282static unsigned int dell_922x_d82_pin_configs[10] = {
1283 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1284 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1285 0x01813122, 0x400001f1,
1286};
1287
1288/*
1289 STAC 922X pin configs for
1290 102801BF
1291*/
1292static unsigned int dell_922x_m81_pin_configs[10] = {
1293 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1294 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1295 0x40C003f1, 0x405003f0,
1296};
1297
1298/*
1299 STAC 9221 A1 pin configs for
1300 102801D7 (Dell XPS M1210)
1301*/
1302static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1303 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1304 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1305 0x508003f3, 0x405003f4,
1306};
1307
403d1944 1308static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1309 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1310 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1311 0x02a19120, 0x40000100,
1312};
1313
1314static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1315 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1316 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1317 0x02a19320, 0x40000100,
1318};
1319
5d5d3bc3
IZ		 1320static unsigned int intel_mac_v1_pin_configs[10] = {
1321 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1322 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1323 0x400000fc, 0x400000fb,
1324};
1325
1326static unsigned int intel_mac_v2_pin_configs[10] = {
1327 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1328 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1329 0x400000fc, 0x400000fb,
6f0778d8
NB		 1330};
1331
5d5d3bc3
IZ		 1332static unsigned int intel_mac_v3_pin_configs[10] = {
1333 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1334 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1335 0x400000fc, 0x400000fb,
1336};
1337
5d5d3bc3
IZ		 1338static unsigned int intel_mac_v4_pin_configs[10] = {
1339 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1340 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1341 0x400000fc, 0x400000fb,
1342};
1343
5d5d3bc3
IZ		 1344static unsigned int intel_mac_v5_pin_configs[10] = {
1345 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1346 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1347 0x400000fc, 0x400000fb,
0dae0f83
TI		 1348};
1349
76c08828 1350
19039bd0 1351static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1352 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1353 [STAC_D945GTP3] = d945gtp3_pin_configs,
1354 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1355 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1356 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1357 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1358 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1359 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1360 /* for backward compatibility */
5d5d3bc3
IZ		 1361 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1362 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1363 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1364 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1365 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1366 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1367 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1368 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1369 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1370 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1371};
1372
f5fcc13c
TI		 1373static const char *stac922x_models[STAC_922X_MODELS] = {
1374 [STAC_D945_REF] = "ref",
1375 [STAC_D945GTP5] = "5stack",
1376 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1377 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1378 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1379 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1380 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1381 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1382 /* for backward compatibility */
f5fcc13c 1383 [STAC_MACMINI] = "macmini",
3fc24d85 1384 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1385 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1386 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1387 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1388 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1389 [STAC_922X_DELL_D81] = "dell-d81",
1390 [STAC_922X_DELL_D82] = "dell-d82",
1391 [STAC_922X_DELL_M81] = "dell-m81",
1392 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1393};
1394
1395static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1396 /* SigmaTel reference board */
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1398 "DFI LanParty", STAC_D945_REF),
1399 /* Intel 945G based systems */
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1401 "Intel D945G", STAC_D945GTP3),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1403 "Intel D945G", STAC_D945GTP3),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1405 "Intel D945G", STAC_D945GTP3),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1407 "Intel D945G", STAC_D945GTP3),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1409 "Intel D945G", STAC_D945GTP3),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1411 "Intel D945G", STAC_D945GTP3),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1413 "Intel D945G", STAC_D945GTP3),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1415 "Intel D945G", STAC_D945GTP3),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1417 "Intel D945G", STAC_D945GTP3),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1419 "Intel D945G", STAC_D945GTP3),
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1421 "Intel D945G", STAC_D945GTP3),
1422 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1423 "Intel D945G", STAC_D945GTP3),
1424 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1425 "Intel D945G", STAC_D945GTP3),
1426 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1427 "Intel D945G", STAC_D945GTP3),
1428 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1429 "Intel D945G", STAC_D945GTP3),
1430 /* Intel D945G 5-stack systems */
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1432 "Intel D945G", STAC_D945GTP5),
1433 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1434 "Intel D945G", STAC_D945GTP5),
1435 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1436 "Intel D945G", STAC_D945GTP5),
1437 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1438 "Intel D945G", STAC_D945GTP5),
1439 /* Intel 945P based systems */
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1441 "Intel D945P", STAC_D945GTP3),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1443 "Intel D945P", STAC_D945GTP3),
1444 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1445 "Intel D945P", STAC_D945GTP3),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1447 "Intel D945P", STAC_D945GTP3),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1449 "Intel D945P", STAC_D945GTP3),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1451 "Intel D945P", STAC_D945GTP5),
1452 /* other systems */
1453 /* Apple Mac Mini (early 2006) */
1454 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1455 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1456 /* Dell systems */
1457 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1458 "unknown Dell", STAC_922X_DELL_D81),
1459 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1460 "unknown Dell", STAC_922X_DELL_D81),
1461 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1462 "unknown Dell", STAC_922X_DELL_D81),
1463 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1464 "unknown Dell", STAC_922X_DELL_D82),
1465 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1466 "unknown Dell", STAC_922X_DELL_M81),
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1468 "unknown Dell", STAC_922X_DELL_D82),
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1470 "unknown Dell", STAC_922X_DELL_D81),
1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1472 "unknown Dell", STAC_922X_DELL_D81),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1474 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1475 {} /* terminator */
1476};
1477
3cc08dc6 1478static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1479 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1480 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1481 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1482 0x01c42190, 0x40000100,
3cc08dc6
MP		 1483};
1484
93ed1503 1485static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1486 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1487 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1488 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1489 0x40000100, 0x40000100
1490};
1491
93ed1503
TD		 1492static unsigned int d965_5st_pin_configs[14] = {
1493 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1494 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1495 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1496 0x40000100, 0x40000100
1497};
1498
4ff076e5
TD		 1499static unsigned int dell_3st_pin_configs[14] = {
1500 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1501 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1502 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1503 0x40c003fc, 0x40000100
1504};
1505
93ed1503 1506static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1507 [STAC_D965_REF] = ref927x_pin_configs,
1508 [STAC_D965_3ST] = d965_3st_pin_configs,
1509 [STAC_D965_5ST] = d965_5st_pin_configs,
1510 [STAC_DELL_3ST] = dell_3st_pin_configs,
1511 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1512};
1513
f5fcc13c 1514static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1515 [STAC_D965_REF] = "ref",
1516 [STAC_D965_3ST] = "3stack",
1517 [STAC_D965_5ST] = "5stack",
1518 [STAC_DELL_3ST] = "dell-3stack",
1519 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1520};
1521
1522static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1523 /* SigmaTel reference board */
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1525 "DFI LanParty", STAC_D965_REF),
81d3dbde 1526 /* Intel 946 based systems */
f5fcc13c
TI		 1527 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1529 /* 965 based 3 stack systems */
f5fcc13c
TI		 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1531 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1546 /* Dell 3 stack systems */
8e9068b1 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 1551 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1
MR		 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1560 /* 965 based 5 stack systems */
f5fcc13c
TI		 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1562 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1565 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1567 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1569 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1570 {} /* terminator */
1571};
1572
f3302a59
MP		 1573static unsigned int ref9205_pin_configs[12] = {
1574 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 1575 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 1576 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1577};
1578
dfe495d0
TI		 1579/*
1580 STAC 9205 pin configs for
1581 102801F1
1582 102801F2
1583 102801FC
1584 102801FD
1585 10280204
1586 1028021F
3fa2ef74 1587 10280228 (Dell Vostro 1500)
dfe495d0
TI		 1588*/
1589static unsigned int dell_9205_m42_pin_configs[12] = {
1590 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1591 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1592 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1593};
1594
1595/*
1596 STAC 9205 pin configs for
1597 102801F9
1598 102801FA
1599 102801FE
1600 102801FF (Dell Precision M4300)
1601 10280206
1602 10280200
1603 10280201
1604*/
1605static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1606 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1607 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1608 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1609};
1610
dfe495d0 1611static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1612 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1613 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1614 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1615};
1616
f5fcc13c 1617static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1618 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1619 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1620 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1621 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1622};
1623
f5fcc13c
TI		 1624static const char *stac9205_models[STAC_9205_MODELS] = {
1625 [STAC_9205_REF] = "ref",
dfe495d0 1626 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1627 [STAC_9205_DELL_M43] = "dell-m43",
1628 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1629};
1630
1631static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1632 /* SigmaTel reference board */
1633 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1634 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1636 "unknown Dell", STAC_9205_DELL_M42),
1637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1638 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1640 "Dell Precision", STAC_9205_DELL_M43),
1641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1642 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1644 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1646 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1647 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1648 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1649 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1650 "unknown Dell", STAC_9205_DELL_M42),
1651 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1652 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1653 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1654 "Dell Precision", STAC_9205_DELL_M43),
1655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1656 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1658 "Dell Precision", STAC_9205_DELL_M43),
1659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1660 "Dell Inspiron", STAC_9205_DELL_M44),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1662 "Dell Inspiron", STAC_9205_DELL_M44),
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1664 "Dell Inspiron", STAC_9205_DELL_M44),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1666 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1668 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1670 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 1671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1672 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 1673 {} /* terminator */
1674};
1675
11b44bbd
RF		 1676static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1677{
1678 int i;
1679 struct sigmatel_spec *spec = codec->spec;
1680
1681 if (! spec->bios_pin_configs) {
1682 spec->bios_pin_configs = kcalloc(spec->num_pins,
1683 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1684 if (! spec->bios_pin_configs)
1685 return -ENOMEM;
1686 }
1687
1688 for (i = 0; i < spec->num_pins; i++) {
1689 hda_nid_t nid = spec->pin_nids[i];
1690 unsigned int pin_cfg;
1691
1692 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1693 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1694 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1695 nid, pin_cfg);
1696 spec->bios_pin_configs[i] = pin_cfg;
1697 }
1698
1699 return 0;
1700}
1701
87d48363
MR		 1702static void stac92xx_set_config_reg(struct hda_codec *codec,
1703 hda_nid_t pin_nid, unsigned int pin_config)
1704{
1705 int i;
1706 snd_hda_codec_write(codec, pin_nid, 0,
1707 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1708 pin_config & 0x000000ff);
1709 snd_hda_codec_write(codec, pin_nid, 0,
1710 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1711 (pin_config & 0x0000ff00) >> 8);
1712 snd_hda_codec_write(codec, pin_nid, 0,
1713 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1714 (pin_config & 0x00ff0000) >> 16);
1715 snd_hda_codec_write(codec, pin_nid, 0,
1716 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1717 pin_config >> 24);
1718 i = snd_hda_codec_read(codec, pin_nid, 0,
1719 AC_VERB_GET_CONFIG_DEFAULT,
1720 0x00);
1721 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1722 pin_nid, i);
1723}
1724
2f2f4251
M		 1725static void stac92xx_set_config_regs(struct hda_codec *codec)
1726{
1727 int i;
1728 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1729
87d48363
MR		 1730 if (!spec->pin_configs)
1731 return;
11b44bbd 1732
87d48363
MR		 1733 for (i = 0; i < spec->num_pins; i++)
1734 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1735 spec->pin_configs[i]);
2f2f4251 1736}
2f2f4251 1737
dabbed6f 1738/*
c7d4b2fa 1739 * Analog playback callbacks
dabbed6f 1740 */
c7d4b2fa
M		 1741static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1742 struct hda_codec *codec,
c8b6bf9b 1743 struct snd_pcm_substream *substream)
2f2f4251 1744{
dabbed6f 1745 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1746 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1747}
1748
2f2f4251
M		 1749static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1750 struct hda_codec *codec,
1751 unsigned int stream_tag,
1752 unsigned int format,
c8b6bf9b 1753 struct snd_pcm_substream *substream)
2f2f4251
M		 1754{
1755 struct sigmatel_spec *spec = codec->spec;
403d1944 1756 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1757}
1758
1759static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1760 struct hda_codec *codec,
c8b6bf9b 1761 struct snd_pcm_substream *substream)
2f2f4251
M		 1762{
1763 struct sigmatel_spec *spec = codec->spec;
1764 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1765}
1766
dabbed6f
M		 1767/*
1768 * Digital playback callbacks
1769 */
1770static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1771 struct hda_codec *codec,
c8b6bf9b 1772 struct snd_pcm_substream *substream)
dabbed6f
M		 1773{
1774 struct sigmatel_spec *spec = codec->spec;
1775 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1776}
1777
1778static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1779 struct hda_codec *codec,
c8b6bf9b 1780 struct snd_pcm_substream *substream)
dabbed6f
M		 1781{
1782 struct sigmatel_spec *spec = codec->spec;
1783 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1784}
1785
6b97eb45
TI		 1786static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1787 struct hda_codec *codec,
1788 unsigned int stream_tag,
1789 unsigned int format,
1790 struct snd_pcm_substream *substream)
1791{
1792 struct sigmatel_spec *spec = codec->spec;
1793 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1794 stream_tag, format, substream);
1795}
1796
dabbed6f 1797
2f2f4251
M		 1798/*
1799 * Analog capture callbacks
1800 */
1801static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1802 struct hda_codec *codec,
1803 unsigned int stream_tag,
1804 unsigned int format,
c8b6bf9b 1805 struct snd_pcm_substream *substream)
2f2f4251
M		 1806{
1807 struct sigmatel_spec *spec = codec->spec;
1808
1809 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1810 stream_tag, 0, format);
1811 return 0;
1812}
1813
1814static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1815 struct hda_codec *codec,
c8b6bf9b 1816 struct snd_pcm_substream *substream)
2f2f4251
M		 1817{
1818 struct sigmatel_spec *spec = codec->spec;
1819
1820 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1821 return 0;
1822}
1823
dabbed6f
M		 1824static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1825 .substreams = 1,
1826 .channels_min = 2,
1827 .channels_max = 2,
1828 /* NID is set in stac92xx_build_pcms */
1829 .ops = {
1830 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1831 .close = stac92xx_dig_playback_pcm_close,
1832 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1833 },
1834};
1835
1836static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1837 .substreams = 1,
1838 .channels_min = 2,
1839 .channels_max = 2,
1840 /* NID is set in stac92xx_build_pcms */
1841};
1842
2f2f4251
M		 1843static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1844 .substreams = 1,
1845 .channels_min = 2,
c7d4b2fa 1846 .channels_max = 8,
2f2f4251
M		 1847 .nid = 0x02, /* NID to query formats and rates */
1848 .ops = {
1849 .open = stac92xx_playback_pcm_open,
1850 .prepare = stac92xx_playback_pcm_prepare,
1851 .cleanup = stac92xx_playback_pcm_cleanup
1852 },
1853};
1854
3cc08dc6
MP		 1855static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1856 .substreams = 1,
1857 .channels_min = 2,
1858 .channels_max = 2,
1859 .nid = 0x06, /* NID to query formats and rates */
1860 .ops = {
1861 .open = stac92xx_playback_pcm_open,
1862 .prepare = stac92xx_playback_pcm_prepare,
1863 .cleanup = stac92xx_playback_pcm_cleanup
1864 },
1865};
1866
2f2f4251 1867static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1868 .channels_min = 2,
1869 .channels_max = 2,
9e05b7a3 1870 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1871 .ops = {
1872 .prepare = stac92xx_capture_pcm_prepare,
1873 .cleanup = stac92xx_capture_pcm_cleanup
1874 },
1875};
1876
1877static int stac92xx_build_pcms(struct hda_codec *codec)
1878{
1879 struct sigmatel_spec *spec = codec->spec;
1880 struct hda_pcm *info = spec->pcm_rec;
1881
1882 codec->num_pcms = 1;
1883 codec->pcm_info = info;
1884
c7d4b2fa 1885 info->name = "STAC92xx Analog";
2f2f4251 1886 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1887 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1888 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1889 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1890
1891 if (spec->alt_switch) {
1892 codec->num_pcms++;
1893 info++;
1894 info->name = "STAC92xx Analog Alt";
1895 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1896 }
2f2f4251 1897
dabbed6f
M		 1898 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1899 codec->num_pcms++;
1900 info++;
1901 info->name = "STAC92xx Digital";
1902 if (spec->multiout.dig_out_nid) {
1903 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1904 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1905 }
1906 if (spec->dig_in_nid) {
1907 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1908 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1909 }
1910 }
1911
2f2f4251
M		 1912 return 0;
1913}
1914
c960a03b
TI		 1915static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1916{
1917 unsigned int pincap = snd_hda_param_read(codec, nid,
1918 AC_PAR_PIN_CAP);
1919 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1920 if (pincap & AC_PINCAP_VREF_100)
1921 return AC_PINCTL_VREF_100;
1922 if (pincap & AC_PINCAP_VREF_80)
1923 return AC_PINCTL_VREF_80;
1924 if (pincap & AC_PINCAP_VREF_50)
1925 return AC_PINCTL_VREF_50;
1926 if (pincap & AC_PINCAP_VREF_GRD)
1927 return AC_PINCTL_VREF_GRD;
1928 return 0;
1929}
1930
403d1944
MP		 1931static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1932
1933{
82beb8fd
TI		 1934 snd_hda_codec_write_cache(codec, nid, 0,
1935 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1936}
1937
a5ce8890 1938#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1939
1940static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1941{
1942 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1943 struct sigmatel_spec *spec = codec->spec;
1944 int io_idx = kcontrol-> private_value & 0xff;
1945
1946 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1947 return 0;
1948}
1949
1950static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1951{
1952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1953 struct sigmatel_spec *spec = codec->spec;
1954 hda_nid_t nid = kcontrol->private_value >> 8;
1955 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1956 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1957
1958 spec->io_switch[io_idx] = val;
1959
1960 if (val)
1961 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1962 else {
1963 unsigned int pinctl = AC_PINCTL_IN_EN;
1964 if (io_idx) /* set VREF for mic */
1965 pinctl |= stac92xx_get_vref(codec, nid);
1966 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1967 }
40c1d308
JZ		 1968
1969 /* check the auto-mute again: we need to mute/unmute the speaker
1970 * appropriately according to the pin direction
1971 */
1972 if (spec->hp_detect)
1973 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1974
403d1944
MP		 1975 return 1;
1976}
1977
0fb87bb4
ML		 1978#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1979
1980static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1981 struct snd_ctl_elem_value *ucontrol)
1982{
1983 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1984 struct sigmatel_spec *spec = codec->spec;
1985
1986 ucontrol->value.integer.value[0] = spec->clfe_swap;
1987 return 0;
1988}
1989
1990static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1991 struct snd_ctl_elem_value *ucontrol)
1992{
1993 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1994 struct sigmatel_spec *spec = codec->spec;
1995 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1996 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1997
68ea7b2f 1998 if (spec->clfe_swap == val)
0fb87bb4
ML		 1999 return 0;
2000
68ea7b2f 2001 spec->clfe_swap = val;
0fb87bb4
ML		 2002
2003 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2004 spec->clfe_swap ? 0x4 : 0x0);
2005
2006 return 1;
2007}
2008
403d1944
MP		 2009#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2010 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2011 .name = xname, \
2012 .index = 0, \
2013 .info = stac92xx_io_switch_info, \
2014 .get = stac92xx_io_switch_get, \
2015 .put = stac92xx_io_switch_put, \
2016 .private_value = xpval, \
2017 }
2018
0fb87bb4
ML		 2019#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2020 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2021 .name = xname, \
2022 .index = 0, \
2023 .info = stac92xx_clfe_switch_info, \
2024 .get = stac92xx_clfe_switch_get, \
2025 .put = stac92xx_clfe_switch_put, \
2026 .private_value = xpval, \
2027 }
403d1944 2028
c7d4b2fa
M		 2029enum {
2030 STAC_CTL_WIDGET_VOL,
2031 STAC_CTL_WIDGET_MUTE,
09a99959 2032 STAC_CTL_WIDGET_MONO_MUX,
403d1944 2033 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2034 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2035};
2036
c8b6bf9b 2037static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2038 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2039 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2040 STAC_MONO_MUX,
403d1944 2041 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2042 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2043};
2044
2045/* add dynamic controls */
2046static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2047{
c8b6bf9b 2048 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2049
2050 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2051 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2052
2053 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2054 if (! knew)
2055 return -ENOMEM;
2056 if (spec->kctl_alloc) {
2057 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2058 kfree(spec->kctl_alloc);
2059 }
2060 spec->kctl_alloc = knew;
2061 spec->num_kctl_alloc = num;
2062 }
2063
2064 knew = &spec->kctl_alloc[spec->num_kctl_used];
2065 *knew = stac92xx_control_templates[type];
82fe0c58 2066 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 2067 if (! knew->name)
2068 return -ENOMEM;
2069 knew->private_value = val;
2070 spec->num_kctl_used++;
2071 return 0;
2072}
2073
403d1944
MP		 2074/* flag inputs as additional dynamic lineouts */
2075static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2076{
2077 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2078 unsigned int wcaps, wtype;
2079 int i, num_dacs = 0;
2080
2081 /* use the wcaps cache to count all DACs available for line-outs */
2082 for (i = 0; i < codec->num_nodes; i++) {
2083 wcaps = codec->wcaps[i];
2084 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2085
7b043899
SL		 2086 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2087 num_dacs++;
2088 }
403d1944 2089
7b043899
SL		 2090 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2091
403d1944
MP		 2092 switch (cfg->line_outs) {
2093 case 3:
2094 /* add line-in as side */
7b043899 2095 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2096 cfg->line_out_pins[cfg->line_outs] =
2097 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2098 spec->line_switch = 1;
2099 cfg->line_outs++;
2100 }
2101 break;
2102 case 2:
2103 /* add line-in as clfe and mic as side */
7b043899 2104 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2105 cfg->line_out_pins[cfg->line_outs] =
2106 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2107 spec->line_switch = 1;
2108 cfg->line_outs++;
2109 }
7b043899 2110 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2111 cfg->line_out_pins[cfg->line_outs] =
2112 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2113 spec->mic_switch = 1;
2114 cfg->line_outs++;
2115 }
2116 break;
2117 case 1:
2118 /* add line-in as surr and mic as clfe */
7b043899 2119 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2120 cfg->line_out_pins[cfg->line_outs] =
2121 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2122 spec->line_switch = 1;
2123 cfg->line_outs++;
2124 }
7b043899 2125 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2126 cfg->line_out_pins[cfg->line_outs] =
2127 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2128 spec->mic_switch = 1;
2129 cfg->line_outs++;
2130 }
2131 break;
2132 }
2133
2134 return 0;
2135}
2136
7b043899
SL		 2137
2138static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2139{
2140 int i;
2141
2142 for (i = 0; i < spec->multiout.num_dacs; i++) {
2143 if (spec->multiout.dac_nids[i] == nid)
2144 return 1;
2145 }
2146
2147 return 0;
2148}
2149
3cc08dc6 2150/*
7b043899
SL		 2151 * Fill in the dac_nids table from the parsed pin configuration
2152 * This function only works when every pin in line_out_pins[]
2153 * contains atleast one DAC in its connection list. Some 92xx
2154 * codecs are not connected directly to a DAC, such as the 9200
2155 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2156 */
19039bd0 2157static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2158 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2159{
2160 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2161 int i, j, conn_len = 0;
2162 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2163 unsigned int wcaps, wtype;
2164
c7d4b2fa
M		 2165 for (i = 0; i < cfg->line_outs; i++) {
2166 nid = cfg->line_out_pins[i];
7b043899
SL		 2167 conn_len = snd_hda_get_connections(codec, nid, conn,
2168 HDA_MAX_CONNECTIONS);
2169 for (j = 0; j < conn_len; j++) {
2170 wcaps = snd_hda_param_read(codec, conn[j],
2171 AC_PAR_AUDIO_WIDGET_CAP);
2172 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2173 if (wtype != AC_WID_AUD_OUT ||
2174 (wcaps & AC_WCAP_DIGITAL))
2175 continue;
2176 /* conn[j] is a DAC routed to this line-out */
2177 if (!is_in_dac_nids(spec, conn[j]))
2178 break;
2179 }
2180
2181 if (j == conn_len) {
df802952
TI		 2182 if (spec->multiout.num_dacs > 0) {
2183 /* we have already working output pins,
2184 * so let's drop the broken ones again
2185 */
2186 cfg->line_outs = spec->multiout.num_dacs;
2187 break;
2188 }
7b043899
SL		 2189 /* error out, no available DAC found */
2190 snd_printk(KERN_ERR
2191 "%s: No available DAC for pin 0x%x\n",
2192 __func__, nid);
2193 return -ENODEV;
2194 }
2195
2196 spec->multiout.dac_nids[i] = conn[j];
2197 spec->multiout.num_dacs++;
2198 if (conn_len > 1) {
2199 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2200 snd_hda_codec_write_cache(codec, nid, 0,
2201 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2202
7b043899
SL		 2203 }
2204 }
c7d4b2fa 2205
7b043899
SL		 2206 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2207 spec->multiout.num_dacs,
2208 spec->multiout.dac_nids[0],
2209 spec->multiout.dac_nids[1],
2210 spec->multiout.dac_nids[2],
2211 spec->multiout.dac_nids[3],
2212 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2213 return 0;
2214}
2215
eb06ed8f
TI		 2216/* create volume control/switch for the given prefx type */
2217static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2218{
2219 char name[32];
2220 int err;
2221
2222 sprintf(name, "%s Playback Volume", pfx);
2223 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2224 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2225 if (err < 0)
2226 return err;
2227 sprintf(name, "%s Playback Switch", pfx);
2228 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2229 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2230 if (err < 0)
2231 return err;
2232 return 0;
2233}
2234
c7d4b2fa 2235/* add playback controls from the parsed DAC table */
0fb87bb4 2236static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2237 const struct auto_pin_cfg *cfg)
c7d4b2fa 2238{
19039bd0
TI		 2239 static const char *chname[4] = {
2240 "Front", "Surround", NULL /*CLFE*/, "Side"
2241 };
c7d4b2fa
M		 2242 hda_nid_t nid;
2243 int i, err;
2244
0fb87bb4 2245 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2246 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2247
2248
c7d4b2fa 2249 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2250 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2251 continue;
2252
2253 nid = spec->multiout.dac_nids[i];
2254
2255 if (i == 2) {
2256 /* Center/LFE */
eb06ed8f
TI		 2257 err = create_controls(spec, "Center", nid, 1);
2258 if (err < 0)
c7d4b2fa 2259 return err;
eb06ed8f
TI		 2260 err = create_controls(spec, "LFE", nid, 2);
2261 if (err < 0)
c7d4b2fa 2262 return err;
0fb87bb4
ML		 2263
2264 wid_caps = get_wcaps(codec, nid);
2265
2266 if (wid_caps & AC_WCAP_LR_SWAP) {
2267 err = stac92xx_add_control(spec,
2268 STAC_CTL_WIDGET_CLFE_SWITCH,
2269 "Swap Center/LFE Playback Switch", nid);
2270
2271 if (err < 0)
2272 return err;
2273 }
2274
c7d4b2fa 2275 } else {
eb06ed8f
TI		 2276 err = create_controls(spec, chname[i], nid, 3);
2277 if (err < 0)
c7d4b2fa
M		 2278 return err;
2279 }
2280 }
2281
b5895dc8
MR		 2282 if (spec->line_switch) {
2283 nid = cfg->input_pins[AUTO_PIN_LINE];
2284 pincap = snd_hda_param_read(codec, nid,
2285 AC_PAR_PIN_CAP);
2286 if (pincap & AC_PINCAP_OUT) {
2287 err = stac92xx_add_control(spec,
2288 STAC_CTL_WIDGET_IO_SWITCH,
2289 "Line In as Output Switch", nid << 8);
2290 if (err < 0)
2291 return err;
2292 }
2293 }
403d1944 2294
b5895dc8 2295 if (spec->mic_switch) {
cace16f1 2296 unsigned int def_conf;
b5895dc8 2297 nid = cfg->input_pins[AUTO_PIN_MIC];
cace16f1
MR		 2298 def_conf = snd_hda_codec_read(codec, nid, 0,
2299 AC_VERB_GET_CONFIG_DEFAULT, 0);
2300
2301 /* some laptops have an internal analog microphone
2302 * which can't be used as a output */
2303 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2304 pincap = snd_hda_param_read(codec, nid,
2305 AC_PAR_PIN_CAP);
2306 if (pincap & AC_PINCAP_OUT) {
2307 err = stac92xx_add_control(spec,
2308 STAC_CTL_WIDGET_IO_SWITCH,
2309 "Mic as Output Switch", (nid << 8) | 1);
2310 if (err < 0)
2311 return err;
2312 }
b5895dc8
MR		 2313 }
2314 }
403d1944 2315
c7d4b2fa
M		 2316 return 0;
2317}
2318
eb06ed8f 2319static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2320{
7b043899
SL		 2321 if (is_in_dac_nids(spec, nid))
2322 return 1;
eb06ed8f
TI		 2323 if (spec->multiout.hp_nid == nid)
2324 return 1;
2325 return 0;
2326}
c7d4b2fa 2327
eb06ed8f
TI		 2328static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2329{
2330 if (!spec->multiout.hp_nid)
2331 spec->multiout.hp_nid = nid;
2332 else if (spec->multiout.num_dacs > 4) {
2333 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2334 return 1;
2335 } else {
2336 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2337 spec->multiout.num_dacs++;
2338 }
2339 return 0;
2340}
4e55096e 2341
eb06ed8f
TI		 2342/* add playback controls for Speaker and HP outputs */
2343static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2344 struct auto_pin_cfg *cfg)
2345{
2346 struct sigmatel_spec *spec = codec->spec;
2347 hda_nid_t nid;
2348 int i, old_num_dacs, err;
2349
2350 old_num_dacs = spec->multiout.num_dacs;
2351 for (i = 0; i < cfg->hp_outs; i++) {
2352 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2353 if (wid_caps & AC_WCAP_UNSOL_CAP)
2354 spec->hp_detect = 1;
2355 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2356 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2357 if (check_in_dac_nids(spec, nid))
2358 nid = 0;
2359 if (! nid)
c7d4b2fa 2360 continue;
eb06ed8f
TI		 2361 add_spec_dacs(spec, nid);
2362 }
2363 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2364 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2365 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2366 if (check_in_dac_nids(spec, nid))
2367 nid = 0;
eb06ed8f
TI		 2368 if (! nid)
2369 continue;
2370 add_spec_dacs(spec, nid);
c7d4b2fa 2371 }
1b290a51
MR		 2372 for (i = 0; i < cfg->line_outs; i++) {
2373 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2374 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2375 if (check_in_dac_nids(spec, nid))
2376 nid = 0;
2377 if (! nid)
2378 continue;
2379 add_spec_dacs(spec, nid);
2380 }
eb06ed8f
TI		 2381 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2382 static const char *pfxs[] = {
2383 "Speaker", "External Speaker", "Speaker2",
2384 };
2385 err = create_controls(spec, pfxs[i - old_num_dacs],
2386 spec->multiout.dac_nids[i], 3);
2387 if (err < 0)
2388 return err;
2389 }
2390 if (spec->multiout.hp_nid) {
2391 const char *pfx;
6020c008 2392 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2393 pfx = "Master";
2394 else
2395 pfx = "Headphone";
2396 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2397 if (err < 0)
2398 return err;
2399 }
c7d4b2fa
M		 2400
2401 return 0;
2402}
2403
b22b4821
MR		 2404/* labels for mono mux outputs */
2405static const char *stac92xx_mono_labels[3] = {
2406 "DAC0", "DAC1", "Mixer"
2407};
2408
2409/* create mono mux for mono out on capable codecs */
2410static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2411{
2412 struct sigmatel_spec *spec = codec->spec;
2413 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2414 int i, num_cons;
2415 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2416
2417 num_cons = snd_hda_get_connections(codec,
2418 spec->mono_nid,
2419 con_lst,
2420 HDA_MAX_NUM_INPUTS);
2421 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2422 return -EINVAL;
2423
2424 for (i = 0; i < num_cons; i++) {
2425 mono_mux->items[mono_mux->num_items].label =
2426 stac92xx_mono_labels[i];
2427 mono_mux->items[mono_mux->num_items].index = i;
2428 mono_mux->num_items++;
2429 }
09a99959
MR		 2430
2431 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2432 "Mono Mux", spec->mono_nid);
b22b4821
MR		 2433}
2434
8b65727b 2435/* labels for dmic mux inputs */
ddc2cec4 2436static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2437 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2438 "Digital Mic 3", "Digital Mic 4"
2439};
2440
2441/* create playback/capture controls for input pins on dmic capable codecs */
2442static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2443 const struct auto_pin_cfg *cfg)
2444{
2445 struct sigmatel_spec *spec = codec->spec;
2446 struct hda_input_mux *dimux = &spec->private_dimux;
2447 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 2448 int err, i, j;
2449 char name[32];
8b65727b
MP		 2450
2451 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2452 dimux->items[dimux->num_items].index = 0;
2453 dimux->num_items++;
2454
2455 for (i = 0; i < spec->num_dmics; i++) {
0678accd 2456 hda_nid_t nid;
8b65727b
MP		 2457 int index;
2458 int num_cons;
0678accd 2459 unsigned int wcaps;
8b65727b
MP		 2460 unsigned int def_conf;
2461
2462 def_conf = snd_hda_codec_read(codec,
2463 spec->dmic_nids[i],
2464 0,
2465 AC_VERB_GET_CONFIG_DEFAULT,
2466 0);
2467 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2468 continue;
2469
0678accd 2470 nid = spec->dmic_nids[i];
8b65727b 2471 num_cons = snd_hda_get_connections(codec,
e1f0d669 2472 spec->dmux_nids[0],
8b65727b
MP		 2473 con_lst,
2474 HDA_MAX_NUM_INPUTS);
2475 for (j = 0; j < num_cons; j++)
0678accd 2476 if (con_lst[j] == nid) {
8b65727b
MP		 2477 index = j;
2478 goto found;
2479 }
2480 continue;
2481found:
0678accd
MR		 2482 wcaps = get_wcaps(codec, nid);
2483
2484 if (wcaps & AC_WCAP_OUT_AMP) {
2485 sprintf(name, "%s Capture Volume",
2486 stac92xx_dmic_labels[dimux->num_items]);
2487
2488 err = stac92xx_add_control(spec,
2489 STAC_CTL_WIDGET_VOL,
2490 name,
2491 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2492 if (err < 0)
2493 return err;
2494 }
2495
8b65727b
MP		 2496 dimux->items[dimux->num_items].label =
2497 stac92xx_dmic_labels[dimux->num_items];
2498 dimux->items[dimux->num_items].index = index;
2499 dimux->num_items++;
2500 }
2501
2502 return 0;
2503}
2504
c7d4b2fa
M		 2505/* create playback/capture controls for input pins */
2506static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2507{
2508 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2509 struct hda_input_mux *imux = &spec->private_imux;
2510 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2511 int i, j, k;
2512
2513 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2514 int index;
2515
2516 if (!cfg->input_pins[i])
2517 continue;
2518 index = -1;
2519 for (j = 0; j < spec->num_muxes; j++) {
2520 int num_cons;
2521 num_cons = snd_hda_get_connections(codec,
2522 spec->mux_nids[j],
2523 con_lst,
2524 HDA_MAX_NUM_INPUTS);
2525 for (k = 0; k < num_cons; k++)
2526 if (con_lst[k] == cfg->input_pins[i]) {
2527 index = k;
2528 goto found;
2529 }
c7d4b2fa 2530 }
314634bc
TI		 2531 continue;
2532 found:
2533 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2534 imux->items[imux->num_items].index = index;
2535 imux->num_items++;
c7d4b2fa
M		 2536 }
2537
7b043899 2538 if (imux->num_items) {
62fe78e9
SR		 2539 /*
2540 * Set the current input for the muxes.
2541 * The STAC9221 has two input muxes with identical source
2542 * NID lists. Hopefully this won't get confused.
2543 */
2544 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2545 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2546 AC_VERB_SET_CONNECT_SEL,
2547 imux->items[0].index);
62fe78e9
SR		 2548 }
2549 }
2550
c7d4b2fa
M		 2551 return 0;
2552}
2553
c7d4b2fa
M		 2554static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2555{
2556 struct sigmatel_spec *spec = codec->spec;
2557 int i;
2558
2559 for (i = 0; i < spec->autocfg.line_outs; i++) {
2560 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2561 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2562 }
2563}
2564
2565static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2566{
2567 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2568 int i;
c7d4b2fa 2569
eb06ed8f
TI		 2570 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2571 hda_nid_t pin;
2572 pin = spec->autocfg.hp_pins[i];
2573 if (pin) /* connect to front */
2574 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2575 }
2576 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2577 hda_nid_t pin;
2578 pin = spec->autocfg.speaker_pins[i];
2579 if (pin) /* connect to front */
2580 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2581 }
c7d4b2fa
M		 2582}
2583
3cc08dc6 2584static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2585{
2586 struct sigmatel_spec *spec = codec->spec;
2587 int err;
bcecd9bd 2588 int hp_speaker_swap = 0;
c7d4b2fa 2589
8b65727b
MP		 2590 if ((err = snd_hda_parse_pin_def_config(codec,
2591 &spec->autocfg,
2592 spec->dmic_nids)) < 0)
c7d4b2fa 2593 return err;
82bc955f 2594 if (! spec->autocfg.line_outs)
869264c4 2595 return 0; /* can't find valid pin config */
19039bd0 2596
bcecd9bd
JZ		 2597 /* If we have no real line-out pin and multiple hp-outs, HPs should
2598 * be set up as multi-channel outputs.
2599 */
2600 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2601 spec->autocfg.hp_outs > 1) {
2602 /* Copy hp_outs to line_outs, backup line_outs in
2603 * speaker_outs so that the following routines can handle
2604 * HP pins as primary outputs.
2605 */
2606 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2607 sizeof(spec->autocfg.line_out_pins));
2608 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2609 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2610 sizeof(spec->autocfg.hp_pins));
2611 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2612 hp_speaker_swap = 1;
2613 }
09a99959
MR		 2614 if (spec->autocfg.mono_out_pin) {
2615 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2616 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2617 u32 caps = query_amp_caps(codec,
2618 spec->autocfg.mono_out_pin, dir);
2619 hda_nid_t conn_list[1];
2620
2621 /* get the mixer node and then the mono mux if it exists */
2622 if (snd_hda_get_connections(codec,
2623 spec->autocfg.mono_out_pin, conn_list, 1) &&
2624 snd_hda_get_connections(codec, conn_list[0],
2625 conn_list, 1)) {
2626
2627 int wcaps = get_wcaps(codec, conn_list[0]);
2628 int wid_type = (wcaps & AC_WCAP_TYPE)
2629 >> AC_WCAP_TYPE_SHIFT;
2630 /* LR swap check, some stac925x have a mux that
2631 * changes the DACs output path instead of the
2632 * mono-mux path.
2633 */
2634 if (wid_type == AC_WID_AUD_SEL &&
2635 !(wcaps & AC_WCAP_LR_SWAP))
2636 spec->mono_nid = conn_list[0];
2637 }
2638 /* all mono outs have a least a mute/unmute switch */
2639 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2640 "Mono Playback Switch",
2641 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2642 1, 0, dir));
2643 if (err < 0)
2644 return err;
2645 /* check to see if there is volume support for the amp */
2646 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2647 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2648 "Mono Playback Volume",
2649 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2650 1, 0, dir));
2651 if (err < 0)
2652 return err;
2653 }
2654
2655 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2656 AC_PINCTL_OUT_EN);
2657 }
bcecd9bd 2658
403d1944
MP		 2659 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2660 return err;
19039bd0
TI		 2661 if (spec->multiout.num_dacs == 0)
2662 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2663 return err;
c7d4b2fa 2664
0fb87bb4
ML		 2665 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2666
2667 if (err < 0)
2668 return err;
2669
bcecd9bd
JZ		 2670 if (hp_speaker_swap == 1) {
2671 /* Restore the hp_outs and line_outs */
2672 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2673 sizeof(spec->autocfg.line_out_pins));
2674 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2675 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2676 sizeof(spec->autocfg.speaker_pins));
2677 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2678 memset(spec->autocfg.speaker_pins, 0,
2679 sizeof(spec->autocfg.speaker_pins));
2680 spec->autocfg.speaker_outs = 0;
2681 }
2682
0fb87bb4
ML		 2683 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2684
2685 if (err < 0)
2686 return err;
2687
2688 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2689
2690 if (err < 0)
c7d4b2fa
M		 2691 return err;
2692
b22b4821
MR		 2693 if (spec->mono_nid > 0) {
2694 err = stac92xx_auto_create_mono_output_ctls(codec);
2695 if (err < 0)
2696 return err;
2697 }
2698
8b65727b
MP		 2699 if (spec->num_dmics > 0)
2700 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2701 &spec->autocfg)) < 0)
2702 return err;
2703
c7d4b2fa 2704 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2705 if (spec->multiout.max_channels > 2)
c7d4b2fa 2706 spec->surr_switch = 1;
c7d4b2fa 2707
82bc955f 2708 if (spec->autocfg.dig_out_pin)
3cc08dc6 2709 spec->multiout.dig_out_nid = dig_out;
82bc955f 2710 if (spec->autocfg.dig_in_pin)
3cc08dc6 2711 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2712
2713 if (spec->kctl_alloc)
2714 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2715
2716 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2717 if (!spec->dinput_mux)
2718 spec->dinput_mux = &spec->private_dimux;
b22b4821 2719 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 2720
2721 return 1;
2722}
2723
82bc955f
TI		 2724/* add playback controls for HP output */
2725static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2726 struct auto_pin_cfg *cfg)
2727{
2728 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2729 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2730 unsigned int wid_caps;
2731
2732 if (! pin)
2733 return 0;
2734
2735 wid_caps = get_wcaps(codec, pin);
505cb341 2736 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2737 spec->hp_detect = 1;
82bc955f
TI		 2738
2739 return 0;
2740}
2741
160ea0dc
RF		 2742/* add playback controls for LFE output */
2743static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2744 struct auto_pin_cfg *cfg)
2745{
2746 struct sigmatel_spec *spec = codec->spec;
2747 int err;
2748 hda_nid_t lfe_pin = 0x0;
2749 int i;
2750
2751 /*
2752 * search speaker outs and line outs for a mono speaker pin
2753 * with an amp. If one is found, add LFE controls
2754 * for it.
2755 */
2756 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2757 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2758 unsigned long wcaps = get_wcaps(codec, pin);
2759 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2760 if (wcaps == AC_WCAP_OUT_AMP)
2761 /* found a mono speaker with an amp, must be lfe */
2762 lfe_pin = pin;
2763 }
2764
2765 /* if speaker_outs is 0, then speakers may be in line_outs */
2766 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2767 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2768 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2769 unsigned long cfg;
2770 cfg = snd_hda_codec_read(codec, pin, 0,
2771 AC_VERB_GET_CONFIG_DEFAULT,
2772 0x00);
2773 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2774 unsigned long wcaps = get_wcaps(codec, pin);
2775 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2776 if (wcaps == AC_WCAP_OUT_AMP)
2777 /* found a mono speaker with an amp,
2778 must be lfe */
2779 lfe_pin = pin;
2780 }
2781 }
2782 }
2783
2784 if (lfe_pin) {
eb06ed8f 2785 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2786 if (err < 0)
2787 return err;
2788 }
2789
2790 return 0;
2791}
2792
c7d4b2fa
M		 2793static int stac9200_parse_auto_config(struct hda_codec *codec)
2794{
2795 struct sigmatel_spec *spec = codec->spec;
2796 int err;
2797
df694daa 2798 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2799 return err;
2800
2801 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2802 return err;
2803
82bc955f
TI		 2804 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2805 return err;
2806
160ea0dc
RF		 2807 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2808 return err;
2809
82bc955f 2810 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2811 spec->multiout.dig_out_nid = 0x05;
82bc955f 2812 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2813 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2814
2815 if (spec->kctl_alloc)
2816 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2817
2818 spec->input_mux = &spec->private_imux;
8b65727b 2819 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2820
2821 return 1;
2822}
2823
62fe78e9
SR		 2824/*
2825 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2826 * funky external mute control using GPIO pins.
2827 */
2828
76e1ddfb 2829static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 2830 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 2831{
2832 unsigned int gpiostate, gpiomask, gpiodir;
2833
2834 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2835 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 2836 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 2837
2838 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2839 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 2840 gpiomask |= mask;
62fe78e9
SR		 2841
2842 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2843 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 2844 gpiodir |= dir_mask;
62fe78e9 2845
76e1ddfb 2846 /* Configure GPIOx as CMOS */
62fe78e9
SR		 2847 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2848
2849 snd_hda_codec_write(codec, codec->afg, 0,
2850 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 2851 snd_hda_codec_read(codec, codec->afg, 0,
2852 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 2853
2854 msleep(1);
2855
76e1ddfb
TI		 2856 snd_hda_codec_read(codec, codec->afg, 0,
2857 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 2858}
2859
314634bc
TI		 2860static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2861 unsigned int event)
2862{
2863 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2864 snd_hda_codec_write_cache(codec, nid, 0,
2865 AC_VERB_SET_UNSOLICITED_ENABLE,
2866 (AC_USRSP_EN | event));
314634bc
TI		 2867}
2868
a64135a2
MR		 2869static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
2870{
2871 int i;
2872 for (i = 0; i < cfg->hp_outs; i++)
2873 if (cfg->hp_pins[i] == nid)
2874 return 1; /* nid is a HP-Out */
2875
2876 return 0; /* nid is not a HP-Out */
2877};
2878
c7d4b2fa
M		 2879static int stac92xx_init(struct hda_codec *codec)
2880{
2881 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2882 struct auto_pin_cfg *cfg = &spec->autocfg;
2883 int i;
c7d4b2fa 2884
c7d4b2fa
M		 2885 snd_hda_sequence_write(codec, spec->init);
2886
82bc955f
TI		 2887 /* set up pins */
2888 if (spec->hp_detect) {
505cb341 2889 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2890 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2891 enable_pin_detect(codec, cfg->hp_pins[i],
2892 STAC_HP_EVENT);
0a07acaf
TI		 2893 /* force to enable the first line-out; the others are set up
2894 * in unsol_event
2895 */
2896 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2897 AC_PINCTL_OUT_EN);
eb995a8c 2898 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2899 /* fake event to set up pins */
2900 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2901 } else {
2902 stac92xx_auto_init_multi_out(codec);
2903 stac92xx_auto_init_hp_out(codec);
2904 }
2905 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2906 hda_nid_t nid = cfg->input_pins[i];
2907 if (nid) {
2908 unsigned int pinctl = AC_PINCTL_IN_EN;
2909 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2910 pinctl |= stac92xx_get_vref(codec, nid);
2911 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2912 }
82bc955f 2913 }
a64135a2
MR		 2914 for (i = 0; i < spec->num_dmics; i++)
2915 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2916 AC_PINCTL_IN_EN);
2917 for (i = 0; i < spec->num_pwrs; i++) {
2918 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
2919 ? STAC_HP_EVENT : STAC_PWR_EVENT;
2920 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
2921 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2922 /* outputs are only ports capable of power management
2923 * any attempts on powering down a input port cause the
2924 * referenced VREF to act quirky.
2925 */
2926 if (pinctl & AC_PINCTL_IN_EN)
2927 continue;
2928 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
2929 codec->patch_ops.unsol_event(codec, (event | i) << 26);
2930 }
8b65727b 2931
82bc955f
TI		 2932 if (cfg->dig_out_pin)
2933 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2934 AC_PINCTL_OUT_EN);
2935 if (cfg->dig_in_pin)
2936 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2937 AC_PINCTL_IN_EN);
2938
4fe5195c
MR		 2939 stac_gpio_set(codec, spec->gpio_mask,
2940 spec->gpio_dir, spec->gpio_data);
62fe78e9 2941
c7d4b2fa
M		 2942 return 0;
2943}
2944
2f2f4251
M		 2945static void stac92xx_free(struct hda_codec *codec)
2946{
c7d4b2fa
M		 2947 struct sigmatel_spec *spec = codec->spec;
2948 int i;
2949
2950 if (! spec)
2951 return;
2952
2953 if (spec->kctl_alloc) {
2954 for (i = 0; i < spec->num_kctl_used; i++)
2955 kfree(spec->kctl_alloc[i].name);
2956 kfree(spec->kctl_alloc);
2957 }
2958
11b44bbd
RF		 2959 if (spec->bios_pin_configs)
2960 kfree(spec->bios_pin_configs);
2961
c7d4b2fa 2962 kfree(spec);
2f2f4251
M		 2963}
2964
4e55096e
M		 2965static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2966 unsigned int flag)
2967{
2968 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2969 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2970
f9acba43
TI		 2971 if (pin_ctl & AC_PINCTL_IN_EN) {
2972 /*
2973 * we need to check the current set-up direction of
2974 * shared input pins since they can be switched via
2975 * "xxx as Output" mixer switch
2976 */
2977 struct sigmatel_spec *spec = codec->spec;
2978 struct auto_pin_cfg *cfg = &spec->autocfg;
2979 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2980 spec->line_switch) ||
2981 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2982 spec->mic_switch))
2983 return;
2984 }
2985
7b043899
SL		 2986 /* if setting pin direction bits, clear the current
2987 direction bits first */
2988 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2989 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2990
82beb8fd 2991 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2992 AC_VERB_SET_PIN_WIDGET_CONTROL,
2993 pin_ctl | flag);
2994}
2995
2996static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2997 unsigned int flag)
2998{
2999 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3000 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3001 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3002 AC_VERB_SET_PIN_WIDGET_CONTROL,
3003 pin_ctl & ~flag);
3004}
3005
40c1d308 3006static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3007{
3008 if (!nid)
3009 return 0;
3010 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3011 & (1 << 31)) {
3012 unsigned int pinctl;
3013 pinctl = snd_hda_codec_read(codec, nid, 0,
3014 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3015 if (pinctl & AC_PINCTL_IN_EN)
3016 return 0; /* mic- or line-input */
3017 else
3018 return 1; /* HP-output */
3019 }
314634bc
TI		 3020 return 0;
3021}
3022
3023static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3024{
3025 struct sigmatel_spec *spec = codec->spec;
3026 struct auto_pin_cfg *cfg = &spec->autocfg;
3027 int i, presence;
3028
eb06ed8f 3029 presence = 0;
4fe5195c
MR		 3030 if (spec->gpio_mute)
3031 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3032 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3033
eb06ed8f 3034 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3035 if (presence)
3036 break;
4fe5195c 3037 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3038 }
4e55096e
M		 3039
3040 if (presence) {
3041 /* disable lineouts, enable hp */
3042 for (i = 0; i < cfg->line_outs; i++)
3043 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3044 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3045 for (i = 0; i < cfg->speaker_outs; i++)
3046 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3047 AC_PINCTL_OUT_EN);
4e55096e
M		 3048 } else {
3049 /* enable lineouts, disable hp */
3050 for (i = 0; i < cfg->line_outs; i++)
3051 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3052 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3053 for (i = 0; i < cfg->speaker_outs; i++)
3054 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3055 AC_PINCTL_OUT_EN);
4e55096e
M		 3056 }
3057}
3058
a64135a2
MR		 3059static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3060{
3061 struct sigmatel_spec *spec = codec->spec;
3062 hda_nid_t nid = spec->pwr_nids[idx];
3063 int presence, val;
3064 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3065 & 0x000000ff;
3066 presence = get_hp_pin_presence(codec, nid);
3067 idx = 1 << idx;
3068
3069 if (presence)
3070 val &= ~idx;
3071 else
3072 val |= idx;
3073
3074 /* power down unused output ports */
3075 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3076};
3077
314634bc
TI		 3078static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3079{
a64135a2
MR		 3080 struct sigmatel_spec *spec = codec->spec;
3081 int idx = res >> 26 & 0x0f;
3082
3083 switch ((res >> 26) & 0x30) {
314634bc
TI		 3084 case STAC_HP_EVENT:
3085 stac92xx_hp_detect(codec, res);
a64135a2
MR		 3086 /* fallthru */
3087 case STAC_PWR_EVENT:
3088 if (spec->num_pwrs > 0)
3089 stac92xx_pin_sense(codec, idx);
314634bc
TI		 3090 }
3091}
3092
cb53c626 3093#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3094static int stac92xx_resume(struct hda_codec *codec)
3095{
dc81bed1
TI		 3096 struct sigmatel_spec *spec = codec->spec;
3097
11b44bbd 3098 stac92xx_set_config_regs(codec);
dc81bed1 3099 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 3100 stac_gpio_set(codec, spec->gpio_mask,
3101 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 3102 snd_hda_codec_resume_amp(codec);
3103 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 3104 /* invoke unsolicited event to reset the HP state */
3105 if (spec->hp_detect)
3106 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 3107 return 0;
3108}
3109#endif
3110
2f2f4251
M		 3111static struct hda_codec_ops stac92xx_patch_ops = {
3112 .build_controls = stac92xx_build_controls,
3113 .build_pcms = stac92xx_build_pcms,
3114 .init = stac92xx_init,
3115 .free = stac92xx_free,
4e55096e 3116 .unsol_event = stac92xx_unsol_event,
cb53c626 3117#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 3118 .resume = stac92xx_resume,
3119#endif
2f2f4251
M		 3120};
3121
3122static int patch_stac9200(struct hda_codec *codec)
3123{
3124 struct sigmatel_spec *spec;
c7d4b2fa 3125 int err;
2f2f4251 3126
e560d8d8 3127 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3128 if (spec == NULL)
3129 return -ENOMEM;
3130
3131 codec->spec = spec;
a4eed138 3132 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 3133 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 3134 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3135 stac9200_models,
3136 stac9200_cfg_tbl);
11b44bbd
RF		 3137 if (spec->board_config < 0) {
3138 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3139 err = stac92xx_save_bios_config_regs(codec);
3140 if (err < 0) {
3141 stac92xx_free(codec);
3142 return err;
3143 }
3144 spec->pin_configs = spec->bios_pin_configs;
3145 } else {
403d1944
MP		 3146 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3147 stac92xx_set_config_regs(codec);
3148 }
2f2f4251
M		 3149
3150 spec->multiout.max_channels = 2;
3151 spec->multiout.num_dacs = 1;
3152 spec->multiout.dac_nids = stac9200_dac_nids;
3153 spec->adc_nids = stac9200_adc_nids;
3154 spec->mux_nids = stac9200_mux_nids;
dabbed6f 3155 spec->num_muxes = 1;
8b65727b 3156 spec->num_dmics = 0;
9e05b7a3 3157 spec->num_adcs = 1;
a64135a2 3158 spec->num_pwrs = 0;
c7d4b2fa 3159
bf277785
TD		 3160 if (spec->board_config == STAC_9200_GATEWAY ||
3161 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 3162 spec->init = stac9200_eapd_init;
3163 else
3164 spec->init = stac9200_core_init;
2f2f4251 3165 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 3166
3167 err = stac9200_parse_auto_config(codec);
3168 if (err < 0) {
3169 stac92xx_free(codec);
3170 return err;
3171 }
2f2f4251
M		 3172
3173 codec->patch_ops = stac92xx_patch_ops;
3174
3175 return 0;
3176}
3177
8e21c34c
TD		 3178static int patch_stac925x(struct hda_codec *codec)
3179{
3180 struct sigmatel_spec *spec;
3181 int err;
3182
3183 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3184 if (spec == NULL)
3185 return -ENOMEM;
3186
3187 codec->spec = spec;
a4eed138 3188 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 3189 spec->pin_nids = stac925x_pin_nids;
3190 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3191 stac925x_models,
3192 stac925x_cfg_tbl);
9e507abd 3193 again:
8e21c34c 3194 if (spec->board_config < 0) {
2c11f955
TD		 3195 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3196 "using BIOS defaults\n");
8e21c34c
TD		 3197 err = stac92xx_save_bios_config_regs(codec);
3198 if (err < 0) {
3199 stac92xx_free(codec);
3200 return err;
3201 }
3202 spec->pin_configs = spec->bios_pin_configs;
3203 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3204 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3205 stac92xx_set_config_regs(codec);
3206 }
3207
3208 spec->multiout.max_channels = 2;
3209 spec->multiout.num_dacs = 1;
3210 spec->multiout.dac_nids = stac925x_dac_nids;
3211 spec->adc_nids = stac925x_adc_nids;
3212 spec->mux_nids = stac925x_mux_nids;
3213 spec->num_muxes = 1;
9e05b7a3 3214 spec->num_adcs = 1;
a64135a2 3215 spec->num_pwrs = 0;
2c11f955
TD		 3216 switch (codec->vendor_id) {
3217 case 0x83847632: /* STAC9202 */
3218 case 0x83847633: /* STAC9202D */
3219 case 0x83847636: /* STAC9251 */
3220 case 0x83847637: /* STAC9251D */
f6e9852a 3221 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 3222 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 3223 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3224 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 3225 break;
3226 default:
3227 spec->num_dmics = 0;
3228 break;
3229 }
8e21c34c
TD		 3230
3231 spec->init = stac925x_core_init;
3232 spec->mixer = stac925x_mixer;
3233
3234 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 3235 if (!err) {
3236 if (spec->board_config < 0) {
3237 printk(KERN_WARNING "hda_codec: No auto-config is "
3238 "available, default to model=ref\n");
3239 spec->board_config = STAC_925x_REF;
3240 goto again;
3241 }
3242 err = -EINVAL;
3243 }
8e21c34c
TD		 3244 if (err < 0) {
3245 stac92xx_free(codec);
3246 return err;
3247 }
3248
3249 codec->patch_ops = stac92xx_patch_ops;
3250
3251 return 0;
3252}
3253
e1f0d669
MR		 3254static struct hda_input_mux stac92hd73xx_dmux = {
3255 .num_items = 4,
3256 .items = {
3257 { "Analog Inputs", 0x0b },
3258 { "CD", 0x08 },
3259 { "Digital Mic 1", 0x09 },
3260 { "Digital Mic 2", 0x0a },
3261 }
3262};
3263
3264static int patch_stac92hd73xx(struct hda_codec *codec)
3265{
3266 struct sigmatel_spec *spec;
3267 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3268 int err = 0;
3269
3270 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3271 if (spec == NULL)
3272 return -ENOMEM;
3273
3274 codec->spec = spec;
3275 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3276 spec->pin_nids = stac92hd73xx_pin_nids;
3277 spec->board_config = snd_hda_check_board_config(codec,
3278 STAC_92HD73XX_MODELS,
3279 stac92hd73xx_models,
3280 stac92hd73xx_cfg_tbl);
3281again:
3282 if (spec->board_config < 0) {
3283 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3284 " STAC92HD73XX, using BIOS defaults\n");
3285 err = stac92xx_save_bios_config_regs(codec);
3286 if (err < 0) {
3287 stac92xx_free(codec);
3288 return err;
3289 }
3290 spec->pin_configs = spec->bios_pin_configs;
3291 } else {
3292 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3293 stac92xx_set_config_regs(codec);
3294 }
3295
3296 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3297 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3298
3299 if (spec->multiout.num_dacs < 0) {
3300 printk(KERN_WARNING "hda_codec: Could not determine "
3301 "number of channels defaulting to DAC count\n");
3302 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3303 }
3304
3305 switch (spec->multiout.num_dacs) {
3306 case 0x3: /* 6 Channel */
3307 spec->mixer = stac92hd73xx_6ch_mixer;
3308 spec->init = stac92hd73xx_6ch_core_init;
3309 break;
3310 case 0x4: /* 8 Channel */
3311 spec->multiout.hp_nid = 0x18;
3312 spec->mixer = stac92hd73xx_8ch_mixer;
3313 spec->init = stac92hd73xx_8ch_core_init;
3314 break;
3315 case 0x5: /* 10 Channel */
3316 spec->multiout.hp_nid = 0x19;
3317 spec->mixer = stac92hd73xx_10ch_mixer;
3318 spec->init = stac92hd73xx_10ch_core_init;
3319 };
3320
3321 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3322 spec->aloopback_mask = 0x01;
3323 spec->aloopback_shift = 8;
3324
3325 spec->mux_nids = stac92hd73xx_mux_nids;
3326 spec->adc_nids = stac92hd73xx_adc_nids;
3327 spec->dmic_nids = stac92hd73xx_dmic_nids;
3328 spec->dmux_nids = stac92hd73xx_dmux_nids;
3329
3330 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3331 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3332 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
1697055e 3333 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
e1f0d669
MR		 3334 spec->dinput_mux = &stac92hd73xx_dmux;
3335 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3336 spec->gpio_mask = spec->gpio_dir = 0x1;
3337 spec->gpio_data = 0x01;
e1f0d669 3338
a64135a2
MR		 3339 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3340 spec->pwr_nids = stac92hd73xx_pwr_nids;
3341
e1f0d669
MR		 3342 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3343
3344 if (!err) {
3345 if (spec->board_config < 0) {
3346 printk(KERN_WARNING "hda_codec: No auto-config is "
3347 "available, default to model=ref\n");
3348 spec->board_config = STAC_92HD73XX_REF;
3349 goto again;
3350 }
3351 err = -EINVAL;
3352 }
3353
3354 if (err < 0) {
3355 stac92xx_free(codec);
3356 return err;
3357 }
3358
3359 codec->patch_ops = stac92xx_patch_ops;
3360
3361 return 0;
3362}
3363
e035b841
MR		 3364static int patch_stac92hd71bxx(struct hda_codec *codec)
3365{
3366 struct sigmatel_spec *spec;
3367 int err = 0;
3368
3369 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3370 if (spec == NULL)
3371 return -ENOMEM;
3372
3373 codec->spec = spec;
3374 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3375 spec->pin_nids = stac92hd71bxx_pin_nids;
3376 spec->board_config = snd_hda_check_board_config(codec,
3377 STAC_92HD71BXX_MODELS,
3378 stac92hd71bxx_models,
3379 stac92hd71bxx_cfg_tbl);
3380again:
3381 if (spec->board_config < 0) {
3382 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3383 " STAC92HD71BXX, using BIOS defaults\n");
3384 err = stac92xx_save_bios_config_regs(codec);
3385 if (err < 0) {
3386 stac92xx_free(codec);
3387 return err;
3388 }
3389 spec->pin_configs = spec->bios_pin_configs;
3390 } else {
3391 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3392 stac92xx_set_config_regs(codec);
3393 }
3394
541eee87
MR		 3395 switch (codec->vendor_id) {
3396 case 0x111d76b6: /* 4 Port without Analog Mixer */
3397 case 0x111d76b7:
3398 case 0x111d76b4: /* 6 Port without Analog Mixer */
3399 case 0x111d76b5:
3400 spec->mixer = stac92hd71bxx_mixer;
3401 spec->init = stac92hd71bxx_core_init;
3402 break;
3403 default:
3404 spec->mixer = stac92hd71bxx_analog_mixer;
3405 spec->init = stac92hd71bxx_analog_core_init;
3406 }
3407
3408 spec->aloopback_mask = 0x20;
3409 spec->aloopback_shift = 0;
3410
4fe5195c
MR		 3411 /* GPIO0 High = EAPD */
3412 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0x1;
e035b841 3413
e035b841
MR		 3414 spec->mux_nids = stac92hd71bxx_mux_nids;
3415 spec->adc_nids = stac92hd71bxx_adc_nids;
3416 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3417 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3418
3419 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3420 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3421 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
1697055e 3422 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
e035b841 3423
a64135a2
MR		 3424 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3425 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3426
e035b841
MR		 3427 spec->multiout.num_dacs = 2;
3428 spec->multiout.hp_nid = 0x11;
3429 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3430
3431 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3432 if (!err) {
3433 if (spec->board_config < 0) {
3434 printk(KERN_WARNING "hda_codec: No auto-config is "
3435 "available, default to model=ref\n");
3436 spec->board_config = STAC_92HD71BXX_REF;
3437 goto again;
3438 }
3439 err = -EINVAL;
3440 }
3441
3442 if (err < 0) {
3443 stac92xx_free(codec);
3444 return err;
3445 }
3446
3447 codec->patch_ops = stac92xx_patch_ops;
3448
3449 return 0;
3450};
3451
2f2f4251
M		 3452static int patch_stac922x(struct hda_codec *codec)
3453{
3454 struct sigmatel_spec *spec;
c7d4b2fa 3455 int err;
2f2f4251 3456
e560d8d8 3457 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3458 if (spec == NULL)
3459 return -ENOMEM;
3460
3461 codec->spec = spec;
a4eed138 3462 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3463 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3464 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3465 stac922x_models,
3466 stac922x_cfg_tbl);
5d5d3bc3 3467 if (spec->board_config == STAC_INTEL_MAC_V3) {
4fe5195c
MR		 3468 spec->gpio_mask = spec->gpio_dir = 0x03;
3469 spec->gpio_data = 0x03;
3fc24d85
TI		 3470 /* Intel Macs have all same PCI SSID, so we need to check
3471 * codec SSID to distinguish the exact models
3472 */
6f0778d8 3473 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3474 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3475
3476 case 0x106b0800:
3477 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3478 break;
5d5d3bc3
IZ		 3479 case 0x106b0600:
3480 case 0x106b0700:
3481 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3482 break;
5d5d3bc3
IZ		 3483 case 0x106b0e00:
3484 case 0x106b0f00:
3485 case 0x106b1600:
3486 case 0x106b1700:
3487 case 0x106b0200:
3488 case 0x106b1e00:
3489 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3490 break;
5d5d3bc3
IZ		 3491 case 0x106b1a00:
3492 case 0x00000100:
3493 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3494 break;
5d5d3bc3
IZ		 3495 case 0x106b0a00:
3496 case 0x106b2200:
3497 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3498 break;
3fc24d85
TI		 3499 }
3500 }
3501
9e507abd 3502 again:
11b44bbd
RF		 3503 if (spec->board_config < 0) {
3504 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3505 "using BIOS defaults\n");
3506 err = stac92xx_save_bios_config_regs(codec);
3507 if (err < 0) {
3508 stac92xx_free(codec);
3509 return err;
3510 }
3511 spec->pin_configs = spec->bios_pin_configs;
3512 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3513 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3514 stac92xx_set_config_regs(codec);
3515 }
2f2f4251 3516
c7d4b2fa
M		 3517 spec->adc_nids = stac922x_adc_nids;
3518 spec->mux_nids = stac922x_mux_nids;
2549413e 3519 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3520 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3521 spec->num_dmics = 0;
a64135a2 3522 spec->num_pwrs = 0;
c7d4b2fa
M		 3523
3524 spec->init = stac922x_core_init;
2f2f4251 3525 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3526
3527 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3528
3cc08dc6 3529 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3530 if (!err) {
3531 if (spec->board_config < 0) {
3532 printk(KERN_WARNING "hda_codec: No auto-config is "
3533 "available, default to model=ref\n");
3534 spec->board_config = STAC_D945_REF;
3535 goto again;
3536 }
3537 err = -EINVAL;
3538 }
3cc08dc6
MP		 3539 if (err < 0) {
3540 stac92xx_free(codec);
3541 return err;
3542 }
3543
3544 codec->patch_ops = stac92xx_patch_ops;
3545
807a4636
TI		 3546 /* Fix Mux capture level; max to 2 */
3547 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3548 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3549 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3550 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3551 (0 << AC_AMPCAP_MUTE_SHIFT));
3552
3cc08dc6
MP		 3553 return 0;
3554}
3555
3556static int patch_stac927x(struct hda_codec *codec)
3557{
3558 struct sigmatel_spec *spec;
3559 int err;
3560
3561 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3562 if (spec == NULL)
3563 return -ENOMEM;
3564
3565 codec->spec = spec;
a4eed138 3566 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3567 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3568 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3569 stac927x_models,
3570 stac927x_cfg_tbl);
9e507abd 3571 again:
8e9068b1
MR		 3572 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3573 if (spec->board_config < 0)
3574 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3575 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3576 err = stac92xx_save_bios_config_regs(codec);
3577 if (err < 0) {
3578 stac92xx_free(codec);
3579 return err;
3580 }
3581 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3582 } else {
3cc08dc6
MP		 3583 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3584 stac92xx_set_config_regs(codec);
3585 }
3586
8e9068b1
MR		 3587 spec->adc_nids = stac927x_adc_nids;
3588 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3589 spec->mux_nids = stac927x_mux_nids;
3590 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3591 spec->multiout.dac_nids = spec->dac_nids;
3592
81d3dbde 3593 switch (spec->board_config) {
93ed1503 3594 case STAC_D965_3ST:
93ed1503 3595 case STAC_D965_5ST:
8e9068b1 3596 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3597 spec->gpio_mask = spec->gpio_dir = 0x01;
3598 spec->gpio_data = 0x01;
8e9068b1
MR		 3599 spec->num_dmics = 0;
3600
93ed1503 3601 spec->init = d965_core_init;
9e05b7a3 3602 spec->mixer = stac927x_mixer;
81d3dbde 3603 break;
8e9068b1 3604 case STAC_DELL_BIOS:
2f32d909
MR		 3605 /* correct the front output jack as a hp out */
3606 stac92xx_set_config_reg(codec, 0x0f, 0x02270110);
c481fca3
MR		 3607 /* correct the front input jack as a mic */
3608 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3609 /* fallthru */
8e9068b1
MR		 3610 case STAC_DELL_3ST:
3611 /* GPIO2 High = Enable EAPD */
4fe5195c
MR		 3612 spec->gpio_mask = spec->gpio_dir = 0x04;
3613 spec->gpio_data = 0x04;
7f16859a
MR		 3614 spec->dmic_nids = stac927x_dmic_nids;
3615 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3616
8e9068b1
MR		 3617 spec->init = d965_core_init;
3618 spec->mixer = stac927x_mixer;
3619 spec->dmux_nids = stac927x_dmux_nids;
1697055e 3620 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 3621 break;
3622 default:
f1f208d0 3623 /* GPIO0 High = Enable EAPD */
4fe5195c
MR		 3624 spec->gpio_mask = spec->gpio_dir = 0x1;
3625 spec->gpio_data = 0x01;
8e9068b1
MR		 3626 spec->num_dmics = 0;
3627
3628 spec->init = stac927x_core_init;
3629 spec->mixer = stac927x_mixer;
7f16859a
MR		 3630 }
3631
a64135a2 3632 spec->num_pwrs = 0;
e1f0d669
MR		 3633 spec->aloopback_mask = 0x40;
3634 spec->aloopback_shift = 0;
8e9068b1 3635
3cc08dc6 3636 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3637 if (!err) {
3638 if (spec->board_config < 0) {
3639 printk(KERN_WARNING "hda_codec: No auto-config is "
3640 "available, default to model=ref\n");
3641 spec->board_config = STAC_D965_REF;
3642 goto again;
3643 }
3644 err = -EINVAL;
3645 }
c7d4b2fa
M		 3646 if (err < 0) {
3647 stac92xx_free(codec);
3648 return err;
3649 }
2f2f4251
M		 3650
3651 codec->patch_ops = stac92xx_patch_ops;
3652
52987656
TI		 3653 /*
3654 * !!FIXME!!
3655 * The STAC927x seem to require fairly long delays for certain
3656 * command sequences. With too short delays (even if the answer
3657 * is set to RIRB properly), it results in the silence output
3658 * on some hardwares like Dell.
3659 *
3660 * The below flag enables the longer delay (see get_response
3661 * in hda_intel.c).
3662 */
3663 codec->bus->needs_damn_long_delay = 1;
3664
2f2f4251
M		 3665 return 0;
3666}
3667
f3302a59
MP		 3668static int patch_stac9205(struct hda_codec *codec)
3669{
3670 struct sigmatel_spec *spec;
8259980e 3671 int err;
f3302a59
MP		 3672
3673 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3674 if (spec == NULL)
3675 return -ENOMEM;
3676
3677 codec->spec = spec;
a4eed138 3678 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3679 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3680 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3681 stac9205_models,
3682 stac9205_cfg_tbl);
9e507abd 3683 again:
11b44bbd
RF		 3684 if (spec->board_config < 0) {
3685 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3686 err = stac92xx_save_bios_config_regs(codec);
3687 if (err < 0) {
3688 stac92xx_free(codec);
3689 return err;
3690 }
3691 spec->pin_configs = spec->bios_pin_configs;
3692 } else {
f3302a59
MP		 3693 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3694 stac92xx_set_config_regs(codec);
3695 }
3696
3697 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3698 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3699 spec->mux_nids = stac9205_mux_nids;
2549413e 3700 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3701 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3702 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3703 spec->dmux_nids = stac9205_dmux_nids;
1697055e 3704 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 3705 spec->num_pwrs = 0;
f3302a59
MP		 3706
3707 spec->init = stac9205_core_init;
3708 spec->mixer = stac9205_mixer;
3709
e1f0d669
MR		 3710 spec->aloopback_mask = 0x40;
3711 spec->aloopback_shift = 0;
f3302a59 3712 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3713
ae0a8ed8 3714 switch (spec->board_config){
ae0a8ed8 3715 case STAC_9205_DELL_M43:
87d48363
MR		 3716 /* Enable SPDIF in/out */
3717 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3718 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3719
4fe5195c
MR		 3720 /* Enable unsol response for GPIO4/Dock HP connection */
3721 snd_hda_codec_write(codec, codec->afg, 0,
3722 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3723 snd_hda_codec_write_cache(codec, codec->afg, 0,
3724 AC_VERB_SET_UNSOLICITED_ENABLE,
3725 (AC_USRSP_EN | STAC_HP_EVENT));
3726
3727 spec->gpio_dir = 0x0b;
3728 spec->gpio_mask = 0x1b;
3729 spec->gpio_mute = 0x10;
e2e7d624 3730 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 3731 * GPIO3 Low = DRM
87d48363 3732 */
4fe5195c 3733 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3734 break;
3735 default:
3736 /* GPIO0 High = EAPD */
4fe5195c
MR		 3737 spec->gpio_mask = spec->gpio_dir = 0x1;
3738 spec->gpio_data = 0x01;
ae0a8ed8
TD		 3739 break;
3740 }
33382403 3741
f3302a59 3742 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3743 if (!err) {
3744 if (spec->board_config < 0) {
3745 printk(KERN_WARNING "hda_codec: No auto-config is "
3746 "available, default to model=ref\n");
3747 spec->board_config = STAC_9205_REF;
3748 goto again;
3749 }
3750 err = -EINVAL;
3751 }
f3302a59
MP		 3752 if (err < 0) {
3753 stac92xx_free(codec);
3754 return err;
3755 }
3756
3757 codec->patch_ops = stac92xx_patch_ops;
3758
3759 return 0;
3760}
3761
db064e50 3762/*
6d859065 3763 * STAC9872 hack
db064e50
TI		 3764 */
3765
99ccc560 3766/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3767static hda_nid_t vaio_dacs[] = { 0x2 };
3768#define VAIO_HP_DAC 0x5
3769static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3770static hda_nid_t vaio_mux_nids[] = { 0x15 };
3771
3772static struct hda_input_mux vaio_mux = {
a3a2f429 3773 .num_items = 3,
db064e50 3774 .items = {
d773781c 3775 /* { "HP", 0x0 }, */
1624cb9a
TI		 3776 { "Mic Jack", 0x1 },
3777 { "Internal Mic", 0x2 },
db064e50
TI		 3778 { "PCM", 0x3 },
3779 }
3780};
3781
3782static struct hda_verb vaio_init[] = {
3783 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3784 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3785 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3786 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3787 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3788 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3789 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3790 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3791 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3792 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3793 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3794 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3795 {}
3796};
3797
6d859065
GM		 3798static struct hda_verb vaio_ar_init[] = {
3799 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3800 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3801 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3802 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3803/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3804 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3805 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3806 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3807 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3808/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3809 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3810 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3811 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3812 {}
3813};
3814
db064e50 3815/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3816static struct hda_bind_ctls vaio_bind_master_vol = {
3817 .ops = &snd_hda_bind_vol,
3818 .values = {
3819 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3820 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3821 0
3822 },
3823};
db064e50
TI		 3824
3825/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3826static struct hda_bind_ctls vaio_bind_master_sw = {
3827 .ops = &snd_hda_bind_sw,
3828 .values = {
3829 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3830 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3831 0,
3832 },
3833};
db064e50
TI		 3834
3835static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3836 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3837 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3838 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3839 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3840 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3841 {
3842 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3843 .name = "Capture Source",
3844 .count = 1,
3845 .info = stac92xx_mux_enum_info,
3846 .get = stac92xx_mux_enum_get,
3847 .put = stac92xx_mux_enum_put,
3848 },
3849 {}
3850};
3851
6d859065 3852static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3853 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3854 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3855 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3856 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3857 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3858 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3859 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3860 {
3861 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3862 .name = "Capture Source",
3863 .count = 1,
3864 .info = stac92xx_mux_enum_info,
3865 .get = stac92xx_mux_enum_get,
3866 .put = stac92xx_mux_enum_put,
3867 },
3868 {}
3869};
3870
3871static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3872 .build_controls = stac92xx_build_controls,
3873 .build_pcms = stac92xx_build_pcms,
3874 .init = stac92xx_init,
3875 .free = stac92xx_free,
cb53c626 3876#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3877 .resume = stac92xx_resume,
3878#endif
3879};
3880
72e7b0dd
TI		 3881static int stac9872_vaio_init(struct hda_codec *codec)
3882{
3883 int err;
3884
3885 err = stac92xx_init(codec);
3886 if (err < 0)
3887 return err;
3888 if (codec->patch_ops.unsol_event)
3889 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3890 return 0;
3891}
3892
3893static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3894{
40c1d308 3895 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3896 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3897 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3898 } else {
3899 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3900 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3901 }
3902}
3903
3904static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3905{
3906 switch (res >> 26) {
3907 case STAC_HP_EVENT:
3908 stac9872_vaio_hp_detect(codec, res);
3909 break;
3910 }
3911}
3912
3913static struct hda_codec_ops stac9872_vaio_patch_ops = {
3914 .build_controls = stac92xx_build_controls,
3915 .build_pcms = stac92xx_build_pcms,
3916 .init = stac9872_vaio_init,
3917 .free = stac92xx_free,
3918 .unsol_event = stac9872_vaio_unsol_event,
3919#ifdef CONFIG_PM
3920 .resume = stac92xx_resume,
3921#endif
3922};
3923
6d859065
GM		 3924enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3925 CXD9872RD_VAIO,
3926 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3927 STAC9872AK_VAIO,
3928 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3929 STAC9872K_VAIO,
3930 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3931 CXD9872AKD_VAIO,
3932 STAC_9872_MODELS,
3933};
3934
3935static const char *stac9872_models[STAC_9872_MODELS] = {
3936 [CXD9872RD_VAIO] = "vaio",
3937 [CXD9872AKD_VAIO] = "vaio-ar",
3938};
3939
3940static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3941 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3942 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3943 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3944 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3945 {}
3946};
3947
6d859065 3948static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3949{
3950 struct sigmatel_spec *spec;
3951 int board_config;
3952
f5fcc13c
TI		 3953 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3954 stac9872_models,
3955 stac9872_cfg_tbl);
db064e50
TI		 3956 if (board_config < 0)
3957 /* unknown config, let generic-parser do its job... */
3958 return snd_hda_parse_generic_codec(codec);
3959
3960 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3961 if (spec == NULL)
3962 return -ENOMEM;
3963
3964 codec->spec = spec;
3965 switch (board_config) {
6d859065
GM		 3966 case CXD9872RD_VAIO:
3967 case STAC9872AK_VAIO:
3968 case STAC9872K_VAIO:
db064e50
TI		 3969 spec->mixer = vaio_mixer;
3970 spec->init = vaio_init;
3971 spec->multiout.max_channels = 2;
3972 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3973 spec->multiout.dac_nids = vaio_dacs;
3974 spec->multiout.hp_nid = VAIO_HP_DAC;
3975 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3976 spec->adc_nids = vaio_adcs;
a64135a2 3977 spec->num_pwrs = 0;
db064e50
TI		 3978 spec->input_mux = &vaio_mux;
3979 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3980 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3981 break;
6d859065
GM		 3982
3983 case CXD9872AKD_VAIO:
3984 spec->mixer = vaio_ar_mixer;
3985 spec->init = vaio_ar_init;
3986 spec->multiout.max_channels = 2;
3987 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3988 spec->multiout.dac_nids = vaio_dacs;
3989 spec->multiout.hp_nid = VAIO_HP_DAC;
3990 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 3991 spec->num_pwrs = 0;
6d859065
GM		 3992 spec->adc_nids = vaio_adcs;
3993 spec->input_mux = &vaio_mux;
3994 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3995 codec->patch_ops = stac9872_patch_ops;
6d859065 3996 break;
db064e50
TI		 3997 }
3998
db064e50
TI		 3999 return 0;
4000}
4001
4002
2f2f4251
M		 4003/*
4004 * patch entries
4005 */
4006struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4007 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4008 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4009 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4010 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4011 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4012 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4013 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4014 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4015 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4016 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4017 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4018 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4019 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4020 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4021 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4022 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4023 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4024 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4025 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4026 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4027 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4028 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4029 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4030 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4031 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4032 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4033 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4034 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4035 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 4036 /* The following does not take into account .id=0x83847661 when subsys =
4037 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4038 * currently not fully supported.
4039 */
4040 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4041 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4042 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 4043 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4044 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4045 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4046 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4047 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4048 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4049 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4050 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 4051 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4052 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4053 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 4054 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
4055 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4056 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4057 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4058 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4059 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4060 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4061 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4062 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 4063 {} /* terminator */
4064};
Linux kernel - Deliverables
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