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[ALSA] cs4270: wrong sample rate when CONFIG_SND_SOC_CS4270_VD33_ERRATA is set
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <sound/driver.h>
28#include <linux/init.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/pci.h>
32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
2f2f4251
M		 34#include "hda_codec.h"
35#include "hda_local.h"
36
4e55096e
M		 37#define NUM_CONTROL_ALLOC 32
38#define STAC_HP_EVENT 0x37
4e55096e 39
f5fcc13c
TI		 40enum {
41 STAC_REF,
dfe495d0
TI		 42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
1194b5b7 52 STAC_9200_GATEWAY,
f5fcc13c
TI		 53 STAC_9200_MODELS
54};
55
56enum {
57 STAC_9205_REF,
dfe495d0 58 STAC_9205_DELL_M42,
ae0a8ed8
TD		 59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
f5fcc13c
TI		 61 STAC_9205_MODELS
62};
63
e1f0d669
MR		 64enum {
65 STAC_92HD73XX_REF,
66 STAC_92HD73XX_MODELS
67};
68
e035b841
MR		 69enum {
70 STAC_92HD71BXX_REF,
71 STAC_92HD71BXX_MODELS
72};
73
8e21c34c
TD		 74enum {
75 STAC_925x_REF,
76 STAC_M2_2,
77 STAC_MA6,
2c11f955 78 STAC_PA6,
8e21c34c
TD		 79 STAC_925x_MODELS
80};
81
f5fcc13c
TI		 82enum {
83 STAC_D945_REF,
84 STAC_D945GTP3,
85 STAC_D945GTP5,
5d5d3bc3
IZ		 86 STAC_INTEL_MAC_V1,
87 STAC_INTEL_MAC_V2,
88 STAC_INTEL_MAC_V3,
89 STAC_INTEL_MAC_V4,
90 STAC_INTEL_MAC_V5,
dfe495d0 91 /* for backward compatibility */
f5fcc13c 92 STAC_MACMINI,
3fc24d85 93 STAC_MACBOOK,
6f0778d8
NB		 94 STAC_MACBOOK_PRO_V1,
95 STAC_MACBOOK_PRO_V2,
f16928fb 96 STAC_IMAC_INTEL,
0dae0f83 97 STAC_IMAC_INTEL_20,
dfe495d0
TI		 98 STAC_922X_DELL_D81,
99 STAC_922X_DELL_D82,
100 STAC_922X_DELL_M81,
101 STAC_922X_DELL_M82,
f5fcc13c
TI		 102 STAC_922X_MODELS
103};
104
105enum {
106 STAC_D965_REF,
107 STAC_D965_3ST,
108 STAC_D965_5ST,
4ff076e5 109 STAC_DELL_3ST,
8e9068b1 110 STAC_DELL_BIOS,
f5fcc13c
TI		 111 STAC_927X_MODELS
112};
403d1944 113
2f2f4251 114struct sigmatel_spec {
c8b6bf9b 115 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 116 unsigned int num_mixers;
117
403d1944 118 int board_config;
c7d4b2fa 119 unsigned int surr_switch: 1;
403d1944
MP		 120 unsigned int line_switch: 1;
121 unsigned int mic_switch: 1;
3cc08dc6 122 unsigned int alt_switch: 1;
82bc955f 123 unsigned int hp_detect: 1;
62fe78e9 124 unsigned int gpio_mute: 1;
c7d4b2fa 125
8259980e 126 unsigned int gpio_mask, gpio_data;
e1f0d669
MR		 127 unsigned char aloopback_mask;
128 unsigned char aloopback_shift;
8259980e 129
2f2f4251
M		 130 /* playback */
131 struct hda_multi_out multiout;
3cc08dc6 132 hda_nid_t dac_nids[5];
2f2f4251
M		 133
134 /* capture */
135 hda_nid_t *adc_nids;
2f2f4251 136 unsigned int num_adcs;
dabbed6f
M		 137 hda_nid_t *mux_nids;
138 unsigned int num_muxes;
8b65727b
MP		 139 hda_nid_t *dmic_nids;
140 unsigned int num_dmics;
e1f0d669 141 hda_nid_t *dmux_nids;
dabbed6f 142 hda_nid_t dig_in_nid;
2f2f4251 143
2f2f4251
M		 144 /* pin widgets */
145 hda_nid_t *pin_nids;
146 unsigned int num_pins;
2f2f4251 147 unsigned int *pin_configs;
11b44bbd 148 unsigned int *bios_pin_configs;
2f2f4251
M		 149
150 /* codec specific stuff */
151 struct hda_verb *init;
c8b6bf9b 152 struct snd_kcontrol_new *mixer;
2f2f4251
M		 153
154 /* capture source */
8b65727b 155 struct hda_input_mux *dinput_mux;
e1f0d669 156 unsigned int cur_dmux[2];
c7d4b2fa 157 struct hda_input_mux *input_mux;
3cc08dc6 158 unsigned int cur_mux[3];
2f2f4251 159
403d1944
MP		 160 /* i/o switches */
161 unsigned int io_switch[2];
0fb87bb4 162 unsigned int clfe_swap;
5f10c4a9 163 unsigned int aloopback;
2f2f4251 164
c7d4b2fa
M		 165 struct hda_pcm pcm_rec[2]; /* PCM information */
166
167 /* dynamic controls and input_mux */
168 struct auto_pin_cfg autocfg;
169 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 170 struct snd_kcontrol_new *kctl_alloc;
8b65727b 171 struct hda_input_mux private_dimux;
c7d4b2fa 172 struct hda_input_mux private_imux;
2f2f4251
M		 173};
174
175static hda_nid_t stac9200_adc_nids[1] = {
176 0x03,
177};
178
179static hda_nid_t stac9200_mux_nids[1] = {
180 0x0c,
181};
182
183static hda_nid_t stac9200_dac_nids[1] = {
184 0x02,
185};
186
e1f0d669
MR		 187static hda_nid_t stac92hd73xx_adc_nids[2] = {
188 0x1a, 0x1b
189};
190
191#define STAC92HD73XX_NUM_DMICS 2
192static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
193 0x13, 0x14, 0
194};
195
196#define STAC92HD73_DAC_COUNT 5
197static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
198 0x15, 0x16, 0x17, 0x18, 0x19,
199};
200
201static hda_nid_t stac92hd73xx_mux_nids[4] = {
202 0x28, 0x29, 0x2a, 0x2b,
203};
204
205static hda_nid_t stac92hd73xx_dmux_nids[2] = {
206 0x20, 0x21,
207};
208
e035b841
MR		 209static hda_nid_t stac92hd71bxx_adc_nids[2] = {
210 0x12, 0x13,
211};
212
213static hda_nid_t stac92hd71bxx_mux_nids[2] = {
214 0x1a, 0x1b
215};
216
e1f0d669
MR		 217static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
218 0x1c,
219};
220
e035b841
MR		 221static hda_nid_t stac92hd71bxx_dac_nids[2] = {
222 0x10, /*0x11, */
223};
224
225#define STAC92HD71BXX_NUM_DMICS 2
226static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
227 0x18, 0x19, 0
228};
229
8e21c34c
TD		 230static hda_nid_t stac925x_adc_nids[1] = {
231 0x03,
232};
233
234static hda_nid_t stac925x_mux_nids[1] = {
235 0x0f,
236};
237
238static hda_nid_t stac925x_dac_nids[1] = {
239 0x02,
240};
241
f6e9852a
TI		 242#define STAC925X_NUM_DMICS 1
243static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
244 0x15, 0
2c11f955
TD		 245};
246
2f2f4251
M		 247static hda_nid_t stac922x_adc_nids[2] = {
248 0x06, 0x07,
249};
250
251static hda_nid_t stac922x_mux_nids[2] = {
252 0x12, 0x13,
253};
254
3cc08dc6
MP		 255static hda_nid_t stac927x_adc_nids[3] = {
256 0x07, 0x08, 0x09
257};
258
259static hda_nid_t stac927x_mux_nids[3] = {
260 0x15, 0x16, 0x17
261};
262
e1f0d669
MR		 263static hda_nid_t stac927x_dmux_nids[1] = {
264 0x1b,
265};
266
7f16859a
MR		 267#define STAC927X_NUM_DMICS 2
268static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
269 0x13, 0x14, 0
270};
271
f3302a59
MP		 272static hda_nid_t stac9205_adc_nids[2] = {
273 0x12, 0x13
274};
275
276static hda_nid_t stac9205_mux_nids[2] = {
277 0x19, 0x1a
278};
279
e1f0d669
MR		 280static hda_nid_t stac9205_dmux_nids[1] = {
281 0x1d,
282};
283
f6e9852a
TI		 284#define STAC9205_NUM_DMICS 2
285static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
286 0x17, 0x18, 0
8b65727b
MP		 287};
288
c7d4b2fa 289static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 290 0x08, 0x09, 0x0d, 0x0e,
291 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 292};
293
8e21c34c
TD		 294static hda_nid_t stac925x_pin_nids[8] = {
295 0x07, 0x08, 0x0a, 0x0b,
296 0x0c, 0x0d, 0x10, 0x11,
297};
298
2f2f4251
M		 299static hda_nid_t stac922x_pin_nids[10] = {
300 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
301 0x0f, 0x10, 0x11, 0x15, 0x1b,
302};
303
e1f0d669
MR		 304static hda_nid_t stac92hd73xx_pin_nids[12] = {
305 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
306 0x0f, 0x10, 0x11, 0x12, 0x13,
307 0x14, 0x22
308};
309
e035b841
MR		 310static hda_nid_t stac92hd71bxx_pin_nids[10] = {
311 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
312 0x0f, 0x14, 0x18, 0x19, 0x1e,
313};
314
3cc08dc6
MP		 315static hda_nid_t stac927x_pin_nids[14] = {
316 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
317 0x0f, 0x10, 0x11, 0x12, 0x13,
318 0x14, 0x21, 0x22, 0x23,
319};
320
f3302a59
MP		 321static hda_nid_t stac9205_pin_nids[12] = {
322 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
323 0x0f, 0x14, 0x16, 0x17, 0x18,
324 0x21, 0x22,
f3302a59
MP		 325};
326
8b65727b
MP		 327static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
328 struct snd_ctl_elem_info *uinfo)
329{
330 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
331 struct sigmatel_spec *spec = codec->spec;
332 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
333}
334
335static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
336 struct snd_ctl_elem_value *ucontrol)
337{
338 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
339 struct sigmatel_spec *spec = codec->spec;
e1f0d669 340 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 341
e1f0d669 342 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 343 return 0;
344}
345
346static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_value *ucontrol)
348{
349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
350 struct sigmatel_spec *spec = codec->spec;
e1f0d669 351 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 352
353 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 354 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 355}
356
c8b6bf9b 357static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 358{
359 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
360 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 361 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 362}
363
c8b6bf9b 364static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 365{
366 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
367 struct sigmatel_spec *spec = codec->spec;
368 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
369
370 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
371 return 0;
372}
373
c8b6bf9b 374static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 375{
376 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
377 struct sigmatel_spec *spec = codec->spec;
378 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
379
c7d4b2fa 380 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 381 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
382}
383
5f10c4a9
ML		 384#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
385
386static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
387 struct snd_ctl_elem_value *ucontrol)
388{
389 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 390 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 391 struct sigmatel_spec *spec = codec->spec;
392
e1f0d669
MR		 393 ucontrol->value.integer.value[0] = !!(spec->aloopback &
394 (spec->aloopback_mask << idx));
5f10c4a9
ML		 395 return 0;
396}
397
398static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
399 struct snd_ctl_elem_value *ucontrol)
400{
401 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
402 struct sigmatel_spec *spec = codec->spec;
e1f0d669 403 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 404 unsigned int dac_mode;
e1f0d669 405 unsigned int val, idx_val;
5f10c4a9 406
e1f0d669
MR		 407 idx_val = spec->aloopback_mask << idx;
408 if (ucontrol->value.integer.value[0])
409 val = spec->aloopback | idx_val;
410 else
411 val = spec->aloopback & ~idx_val;
68ea7b2f 412 if (spec->aloopback == val)
5f10c4a9
ML		 413 return 0;
414
68ea7b2f 415 spec->aloopback = val;
5f10c4a9 416
e1f0d669
MR		 417 /* Only return the bits defined by the shift value of the
418 * first two bytes of the mask
419 */
5f10c4a9 420 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 421 kcontrol->private_value & 0xFFFF, 0x0);
422 dac_mode >>= spec->aloopback_shift;
5f10c4a9 423
e1f0d669 424 if (spec->aloopback & idx_val) {
5f10c4a9 425 snd_hda_power_up(codec);
e1f0d669 426 dac_mode |= idx_val;
5f10c4a9
ML		 427 } else {
428 snd_hda_power_down(codec);
e1f0d669 429 dac_mode &= ~idx_val;
5f10c4a9
ML		 430 }
431
432 snd_hda_codec_write_cache(codec, codec->afg, 0,
433 kcontrol->private_value >> 16, dac_mode);
434
435 return 1;
436}
437
c7d4b2fa 438static struct hda_verb stac9200_core_init[] = {
2f2f4251 439 /* set dac0mux for dac converter */
c7d4b2fa 440 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 441 {}
442};
443
1194b5b7
TI		 444static struct hda_verb stac9200_eapd_init[] = {
445 /* set dac0mux for dac converter */
446 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
447 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
448 {}
449};
450
e1f0d669
MR		 451static struct hda_verb stac92hd73xx_6ch_core_init[] = {
452 /* set master volume and direct control */
453 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
454 /* setup audio connections */
455 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
456 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
457 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
458 /* setup adcs to point to mixer */
459 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
460 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
461 { 0x0b, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Front Mic */
462 { 0x0c, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Mic */
463 { 0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Line In */
464 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
465 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
466 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
467 /* setup import muxs */
468 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
469 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
470 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
471 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
472 {}
473};
474
475static struct hda_verb stac92hd73xx_8ch_core_init[] = {
476 /* set master volume and direct control */
477 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
478 /* setup audio connections */
479 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
480 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
481 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
482 /* connect hp ports to dac3 */
483 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
484 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
485 /* setup adcs to point to mixer */
486 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
487 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
488 { 0x0b, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Front Mic */
489 { 0x0c, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Mic */
490 { 0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Line In */
491 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
492 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
493 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
494 /* setup import muxs */
495 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
496 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
497 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
498 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
499 {}
500};
501
502static struct hda_verb stac92hd73xx_10ch_core_init[] = {
503 /* set master volume and direct control */
504 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
505 /* setup audio connections */
506 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
507 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
508 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
509 /* dac3 is connected to import3 mux */
510 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
511 /* connect hp ports to dac4 */
512 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
513 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
514 /* setup adcs to point to mixer */
515 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
516 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
517 { 0x0b, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Front Mic */
518 { 0x0c, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Mic */
519 { 0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, /* Line In */
520 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
521 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
522 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
523 /* setup import muxs */
524 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
525 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
526 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
527 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
528 {}
529};
530
e035b841 531static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 532 /* set master volume and direct control */
533 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
534 /* connect headphone jack to dac1 */
535 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
536 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, /* Speaker */
537 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
538 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
539 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
540 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541 /* unmute mono out node */
542 { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
543};
544
545static struct hda_verb stac92hd71bxx_analog_core_init[] = {
e035b841
MR		 546 /* set master volume and direct control */
547 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
548 /* connect headphone jack to dac1 */
549 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
9b35947f
MR		 550 /* connect ports 0d and 0f to audio mixer */
551 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
552 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
541eee87 553 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
9b35947f
MR		 554 /* unmute dac0 input in audio mixer */
555 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
e035b841
MR		 556 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
557 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
558 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
559 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
560 /* unmute mono out node */
561 { 0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
562 {}
563};
564
8e21c34c
TD		 565static struct hda_verb stac925x_core_init[] = {
566 /* set dac0mux for dac converter */
567 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
568 {}
569};
570
c7d4b2fa 571static struct hda_verb stac922x_core_init[] = {
2f2f4251 572 /* set master volume and direct control */
c7d4b2fa 573 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 574 {}
575};
576
93ed1503 577static struct hda_verb d965_core_init[] = {
19039bd0 578 /* set master volume and direct control */
93ed1503 579 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 580 /* unmute node 0x1b */
581 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
582 /* select node 0x03 as DAC */
583 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
584 {}
585};
586
3cc08dc6
MP		 587static struct hda_verb stac927x_core_init[] = {
588 /* set master volume and direct control */
589 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
590 {}
591};
592
f3302a59
MP		 593static struct hda_verb stac9205_core_init[] = {
594 /* set master volume and direct control */
595 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
596 {}
597};
598
47744f63
MR		 599#define STAC_DIGITAL_INPUT_SOURCE(cnt) \
600 { \
601 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
602 .name = "Digital Input Source", \
603 .count = cnt, \
604 .info = stac92xx_dmux_enum_info, \
605 .get = stac92xx_dmux_enum_get, \
606 .put = stac92xx_dmux_enum_put,\
607 }
608
9e05b7a3 609#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 610 { \
611 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
612 .name = "Input Source", \
9e05b7a3 613 .count = cnt, \
ca7c5a8b
ML		 614 .info = stac92xx_mux_enum_info, \
615 .get = stac92xx_mux_enum_get, \
616 .put = stac92xx_mux_enum_put, \
617 }
618
e1f0d669 619#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 620 { \
621 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
622 .name = "Analog Loopback", \
e1f0d669 623 .count = cnt, \
5f10c4a9
ML		 624 .info = stac92xx_aloopback_info, \
625 .get = stac92xx_aloopback_get, \
626 .put = stac92xx_aloopback_put, \
627 .private_value = verb_read | (verb_write << 16), \
628 }
629
c8b6bf9b 630static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 631 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
632 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 633 STAC_INPUT_SOURCE(1),
2f2f4251
M		 634 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
635 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
c7d4b2fa 636 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
2f2f4251
M		 637 { } /* end */
638};
639
e1f0d669
MR		 640static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
641 STAC_DIGITAL_INPUT_SOURCE(2),
642 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
643
644 /* hardware gain controls */
71685b90
MR		 645 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x13, 0x0, HDA_INPUT),
646 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x14, 0x0, HDA_INPUT),
e1f0d669
MR		 647
648 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
649 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
650
651 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
652 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
653
654 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
655 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
656
657 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
658 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
659
660 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
661 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
662
663 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
664 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
665
666 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
667 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
668 { } /* end */
669};
670
671static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
672 STAC_DIGITAL_INPUT_SOURCE(2),
673 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
674
675 /* hardware gain controls */
71685b90
MR		 676 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x13, 0x0, HDA_INPUT),
677 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x14, 0x0, HDA_INPUT),
e1f0d669
MR		 678
679 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
680 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
681
682 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
683 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
684
685 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
686 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
687
688 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
689 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
690
691 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
692 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
693
694 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
695 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
696
697 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
698 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
699 { } /* end */
700};
701
702static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
703 STAC_DIGITAL_INPUT_SOURCE(2),
704 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
705
706 /* hardware gain controls */
71685b90
MR		 707 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x13, 0x0, HDA_INPUT),
708 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x14, 0x0, HDA_INPUT),
e1f0d669
MR		 709
710 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
711 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
712
713 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
714 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
715
716 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
717 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
718
719 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
720 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
721
722 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
723 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
724
725 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
726 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
727
728 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
729 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
730 { } /* end */
731};
732
541eee87 733static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841
MR		 734 STAC_DIGITAL_INPUT_SOURCE(1),
735 STAC_INPUT_SOURCE(2),
e035b841
MR		 736
737 /* hardware gain controls */
9b35947f
MR		 738 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x18, 0x0, HDA_OUTPUT),
739 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x19, 0x0, HDA_OUTPUT),
740
741 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
742 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
743 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
744
745 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
746 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
747 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
e035b841 748
9b35947f
MR		 749 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
750 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 751 { } /* end */
752};
753
541eee87
MR		 754static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
755 STAC_DIGITAL_INPUT_SOURCE(1),
756 STAC_INPUT_SOURCE(2),
757 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
758
759 /* hardware gain controls */
760 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x0, 0x18, 0x0, HDA_OUTPUT),
761 HDA_CODEC_VOLUME_IDX("Digital Mic Volume", 0x1, 0x19, 0x0, HDA_OUTPUT),
762
763 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
764 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
765 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
766
767 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
768 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
769 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
770 { } /* end */
771};
772
8e21c34c 773static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 774 STAC_INPUT_SOURCE(1),
8e21c34c
TD		 775 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
776 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
777 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
778 { } /* end */
779};
780
9e05b7a3 781static struct snd_kcontrol_new stac9205_mixer[] = {
47744f63 782 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3 783 STAC_INPUT_SOURCE(2),
e1f0d669 784 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 785
786 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
787 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
788 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
789
790 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
791 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
792 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
793
2f2f4251
M		 794 { } /* end */
795};
796
19039bd0 797/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 798static struct snd_kcontrol_new stac922x_mixer[] = {
799 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 800 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
801 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
802 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
803
804 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
805 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
806 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
19039bd0
TI		 807 { } /* end */
808};
809
9e05b7a3 810
d1d985f0 811static struct snd_kcontrol_new stac927x_mixer[] = {
47744f63 812 STAC_DIGITAL_INPUT_SOURCE(1),
9e05b7a3 813 STAC_INPUT_SOURCE(3),
e1f0d669 814 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 815
9e05b7a3
ML		 816 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
817 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
818 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
819
820 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
821 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
822 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
823
824 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
825 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
826 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
f3302a59
MP		 827 { } /* end */
828};
829
2f2f4251
M		 830static int stac92xx_build_controls(struct hda_codec *codec)
831{
832 struct sigmatel_spec *spec = codec->spec;
833 int err;
c7d4b2fa 834 int i;
2f2f4251
M		 835
836 err = snd_hda_add_new_ctls(codec, spec->mixer);
837 if (err < 0)
838 return err;
c7d4b2fa
M		 839
840 for (i = 0; i < spec->num_mixers; i++) {
841 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
842 if (err < 0)
843 return err;
844 }
845
dabbed6f
M		 846 if (spec->multiout.dig_out_nid) {
847 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
848 if (err < 0)
849 return err;
850 }
851 if (spec->dig_in_nid) {
852 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
853 if (err < 0)
854 return err;
855 }
856 return 0;
2f2f4251
M		 857}
858
403d1944 859static unsigned int ref9200_pin_configs[8] = {
dabbed6f 860 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 861 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
862};
863
dfe495d0
TI		 864/*
865 STAC 9200 pin configs for
866 102801A8
867 102801DE
868 102801E8
869*/
870static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 871 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
872 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 873};
874
875/*
876 STAC 9200 pin configs for
877 102801C0
878 102801C1
879*/
880static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 881 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
882 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 883};
884
885/*
886 STAC 9200 pin configs for
887 102801C4 (Dell Dimension E310)
888 102801C5
889 102801C7
890 102801D9
891 102801DA
892 102801E3
893*/
894static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 895 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
896 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 897};
898
899
900/*
901 STAC 9200-32 pin configs for
902 102801B5 (Dell Inspiron 630m)
903 102801D8 (Dell Inspiron 640m)
904*/
905static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 906 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
907 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 908};
909
910/*
911 STAC 9200-32 pin configs for
912 102801C2 (Dell Latitude D620)
913 102801C8
914 102801CC (Dell Latitude D820)
915 102801D4
916 102801D6
917*/
918static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 919 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
920 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 921};
922
923/*
924 STAC 9200-32 pin configs for
925 102801CE (Dell XPS M1710)
926 102801CF (Dell Precision M90)
927*/
928static unsigned int dell9200_m23_pin_configs[8] = {
929 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
930 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
931};
932
933/*
934 STAC 9200-32 pin configs for
935 102801C9
936 102801CA
937 102801CB (Dell Latitude 120L)
938 102801D3
939*/
940static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 941 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
942 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 943};
944
945/*
946 STAC 9200-32 pin configs for
947 102801BD (Dell Inspiron E1505n)
948 102801EE
949 102801EF
950*/
951static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 952 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
953 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 954};
955
956/*
957 STAC 9200-32 pin configs for
958 102801F5 (Dell Inspiron 1501)
959 102801F6
960*/
961static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 962 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
963 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 964};
965
966/*
967 STAC 9200-32
968 102801CD (Dell Inspiron E1705/9400)
969*/
970static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 971 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
972 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 973};
974
975
f5fcc13c
TI		 976static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
977 [STAC_REF] = ref9200_pin_configs,
dfe495d0
TI		 978 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
979 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
980 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
981 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
982 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
983 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
984 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
985 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
986 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
987 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
403d1944
MP		 988};
989
f5fcc13c
TI		 990static const char *stac9200_models[STAC_9200_MODELS] = {
991 [STAC_REF] = "ref",
dfe495d0
TI		 992 [STAC_9200_DELL_D21] = "dell-d21",
993 [STAC_9200_DELL_D22] = "dell-d22",
994 [STAC_9200_DELL_D23] = "dell-d23",
995 [STAC_9200_DELL_M21] = "dell-m21",
996 [STAC_9200_DELL_M22] = "dell-m22",
997 [STAC_9200_DELL_M23] = "dell-m23",
998 [STAC_9200_DELL_M24] = "dell-m24",
999 [STAC_9200_DELL_M25] = "dell-m25",
1000 [STAC_9200_DELL_M26] = "dell-m26",
1001 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1002 [STAC_9200_GATEWAY] = "gateway",
f5fcc13c
TI		 1003};
1004
1005static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1006 /* SigmaTel reference board */
1007 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1008 "DFI LanParty", STAC_REF),
e7377071 1009 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1010 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1011 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1012 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1013 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1014 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1015 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1016 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1017 "unknown Dell", STAC_9200_DELL_D22),
1018 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1019 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1020 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1021 "Dell Latitude D620", STAC_9200_DELL_M22),
1022 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1023 "unknown Dell", STAC_9200_DELL_D23),
1024 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1025 "unknown Dell", STAC_9200_DELL_D23),
1026 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1027 "unknown Dell", STAC_9200_DELL_M22),
1028 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1029 "unknown Dell", STAC_9200_DELL_M24),
1030 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1031 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1032 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1033 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1034 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1035 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1036 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1037 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1039 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1041 "Dell Precision M90", STAC_9200_DELL_M23),
1042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1043 "unknown Dell", STAC_9200_DELL_M22),
1044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1045 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1047 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1049 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1051 "unknown Dell", STAC_9200_DELL_D23),
1052 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1053 "unknown Dell", STAC_9200_DELL_D23),
1054 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1055 "unknown Dell", STAC_9200_DELL_D21),
1056 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1057 "unknown Dell", STAC_9200_DELL_D23),
1058 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1059 "unknown Dell", STAC_9200_DELL_D21),
1060 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1061 "unknown Dell", STAC_9200_DELL_M25),
1062 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1063 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1064 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1065 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1066 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1067 "unknown Dell", STAC_9200_DELL_M26),
49c605db
TD		 1068 /* Panasonic */
1069 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
1194b5b7
TI		 1070 /* Gateway machines needs EAPD to be set on resume */
1071 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1072 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1073 STAC_9200_GATEWAY),
1074 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1075 STAC_9200_GATEWAY),
403d1944
MP		 1076 {} /* terminator */
1077};
1078
8e21c34c
TD		 1079static unsigned int ref925x_pin_configs[8] = {
1080 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1081 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
1082};
1083
1084static unsigned int stac925x_MA6_pin_configs[8] = {
1085 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1086 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1087};
1088
2c11f955
TD		 1089static unsigned int stac925x_PA6_pin_configs[8] = {
1090 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1091 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1092};
1093
8e21c34c 1094static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1095 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1096 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1097};
1098
1099static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1100 [STAC_REF] = ref925x_pin_configs,
1101 [STAC_M2_2] = stac925xM2_2_pin_configs,
1102 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1103 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1104};
1105
1106static const char *stac925x_models[STAC_925x_MODELS] = {
1107 [STAC_REF] = "ref",
1108 [STAC_M2_2] = "m2-2",
1109 [STAC_MA6] = "m6",
2c11f955 1110 [STAC_PA6] = "pa6",
8e21c34c
TD		 1111};
1112
1113static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1114 /* SigmaTel reference board */
1115 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1116 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1117 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1118 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1119 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1120 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1121 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1122 {} /* terminator */
1123};
1124
e1f0d669
MR		 1125static unsigned int ref92hd73xx_pin_configs[12] = {
1126 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1127 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1128 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1129};
1130
1131static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1132 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1133};
1134
1135static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1136 [STAC_92HD73XX_REF] = "ref",
1137};
1138
1139static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1140 /* SigmaTel reference board */
1141 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1142 "DFI LanParty", STAC_92HD73XX_REF),
1143 {} /* terminator */
1144};
1145
e035b841
MR		 1146static unsigned int ref92hd71bxx_pin_configs[10] = {
1147 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
1148 0x0181302e, 0x01114010, 0x01a19020, 0x90a000f0,
1149 0x90a000f0, 0x01452050,
1150};
1151
1152static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1153 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1154};
1155
1156static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1157 [STAC_92HD71BXX_REF] = "ref",
1158};
1159
1160static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1161 /* SigmaTel reference board */
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1163 "DFI LanParty", STAC_92HD71BXX_REF),
1164 {} /* terminator */
1165};
1166
403d1944
MP		 1167static unsigned int ref922x_pin_configs[10] = {
1168 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1169 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1170 0x40000100, 0x40000100,
1171};
1172
dfe495d0
TI		 1173/*
1174 STAC 922X pin configs for
1175 102801A7
1176 102801AB
1177 102801A9
1178 102801D1
1179 102801D2
1180*/
1181static unsigned int dell_922x_d81_pin_configs[10] = {
1182 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1183 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1184 0x01813122, 0x400001f2,
1185};
1186
1187/*
1188 STAC 922X pin configs for
1189 102801AC
1190 102801D0
1191*/
1192static unsigned int dell_922x_d82_pin_configs[10] = {
1193 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1194 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1195 0x01813122, 0x400001f1,
1196};
1197
1198/*
1199 STAC 922X pin configs for
1200 102801BF
1201*/
1202static unsigned int dell_922x_m81_pin_configs[10] = {
1203 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1204 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1205 0x40C003f1, 0x405003f0,
1206};
1207
1208/*
1209 STAC 9221 A1 pin configs for
1210 102801D7 (Dell XPS M1210)
1211*/
1212static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1213 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1214 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1215 0x508003f3, 0x405003f4,
1216};
1217
403d1944 1218static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1219 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1220 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1221 0x02a19120, 0x40000100,
1222};
1223
1224static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1225 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1226 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1227 0x02a19320, 0x40000100,
1228};
1229
5d5d3bc3
IZ		 1230static unsigned int intel_mac_v1_pin_configs[10] = {
1231 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1232 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1233 0x400000fc, 0x400000fb,
1234};
1235
1236static unsigned int intel_mac_v2_pin_configs[10] = {
1237 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1238 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1239 0x400000fc, 0x400000fb,
6f0778d8
NB		 1240};
1241
5d5d3bc3
IZ		 1242static unsigned int intel_mac_v3_pin_configs[10] = {
1243 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1244 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1245 0x400000fc, 0x400000fb,
1246};
1247
5d5d3bc3
IZ		 1248static unsigned int intel_mac_v4_pin_configs[10] = {
1249 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1250 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1251 0x400000fc, 0x400000fb,
1252};
1253
5d5d3bc3
IZ		 1254static unsigned int intel_mac_v5_pin_configs[10] = {
1255 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1256 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1257 0x400000fc, 0x400000fb,
0dae0f83
TI		 1258};
1259
76c08828 1260
19039bd0 1261static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1262 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1263 [STAC_D945GTP3] = d945gtp3_pin_configs,
1264 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1265 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1266 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1267 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1268 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1269 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
dfe495d0 1270 /* for backward compatibility */
5d5d3bc3
IZ		 1271 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1272 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1273 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1274 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1275 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1276 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
dfe495d0
TI		 1277 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1278 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1279 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1280 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1281};
1282
f5fcc13c
TI		 1283static const char *stac922x_models[STAC_922X_MODELS] = {
1284 [STAC_D945_REF] = "ref",
1285 [STAC_D945GTP5] = "5stack",
1286 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1287 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1288 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1289 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1290 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1291 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
dfe495d0 1292 /* for backward compatibility */
f5fcc13c 1293 [STAC_MACMINI] = "macmini",
3fc24d85 1294 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1295 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1296 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1297 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1298 [STAC_IMAC_INTEL_20] = "imac-intel-20",
dfe495d0
TI		 1299 [STAC_922X_DELL_D81] = "dell-d81",
1300 [STAC_922X_DELL_D82] = "dell-d82",
1301 [STAC_922X_DELL_M81] = "dell-m81",
1302 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1303};
1304
1305static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1306 /* SigmaTel reference board */
1307 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1308 "DFI LanParty", STAC_D945_REF),
1309 /* Intel 945G based systems */
1310 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1311 "Intel D945G", STAC_D945GTP3),
1312 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1313 "Intel D945G", STAC_D945GTP3),
1314 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1315 "Intel D945G", STAC_D945GTP3),
1316 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1317 "Intel D945G", STAC_D945GTP3),
1318 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1319 "Intel D945G", STAC_D945GTP3),
1320 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1321 "Intel D945G", STAC_D945GTP3),
1322 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1323 "Intel D945G", STAC_D945GTP3),
1324 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1325 "Intel D945G", STAC_D945GTP3),
1326 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1327 "Intel D945G", STAC_D945GTP3),
1328 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1329 "Intel D945G", STAC_D945GTP3),
1330 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1331 "Intel D945G", STAC_D945GTP3),
1332 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1333 "Intel D945G", STAC_D945GTP3),
1334 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1335 "Intel D945G", STAC_D945GTP3),
1336 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1337 "Intel D945G", STAC_D945GTP3),
1338 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1339 "Intel D945G", STAC_D945GTP3),
1340 /* Intel D945G 5-stack systems */
1341 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1342 "Intel D945G", STAC_D945GTP5),
1343 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1344 "Intel D945G", STAC_D945GTP5),
1345 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1346 "Intel D945G", STAC_D945GTP5),
1347 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1348 "Intel D945G", STAC_D945GTP5),
1349 /* Intel 945P based systems */
1350 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1351 "Intel D945P", STAC_D945GTP3),
1352 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1353 "Intel D945P", STAC_D945GTP3),
1354 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1355 "Intel D945P", STAC_D945GTP3),
1356 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1357 "Intel D945P", STAC_D945GTP3),
1358 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1359 "Intel D945P", STAC_D945GTP3),
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1361 "Intel D945P", STAC_D945GTP5),
1362 /* other systems */
1363 /* Apple Mac Mini (early 2006) */
1364 SND_PCI_QUIRK(0x8384, 0x7680,
5d5d3bc3 1365 "Mac Mini", STAC_INTEL_MAC_V3),
dfe495d0
TI		 1366 /* Dell systems */
1367 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1368 "unknown Dell", STAC_922X_DELL_D81),
1369 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1370 "unknown Dell", STAC_922X_DELL_D81),
1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1372 "unknown Dell", STAC_922X_DELL_D81),
1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1374 "unknown Dell", STAC_922X_DELL_D82),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1376 "unknown Dell", STAC_922X_DELL_M81),
1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1378 "unknown Dell", STAC_922X_DELL_D82),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1380 "unknown Dell", STAC_922X_DELL_D81),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1382 "unknown Dell", STAC_922X_DELL_D81),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1384 "Dell XPS M1210", STAC_922X_DELL_M82),
403d1944
MP		 1385 {} /* terminator */
1386};
1387
3cc08dc6 1388static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 1389 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1390 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1391 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1392 0x01c42190, 0x40000100,
3cc08dc6
MP		 1393};
1394
93ed1503 1395static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 1396 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1397 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1398 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1399 0x40000100, 0x40000100
1400};
1401
93ed1503
TD		 1402static unsigned int d965_5st_pin_configs[14] = {
1403 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1404 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1405 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1406 0x40000100, 0x40000100
1407};
1408
4ff076e5
TD		 1409static unsigned int dell_3st_pin_configs[14] = {
1410 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1411 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 1412 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 1413 0x40c003fc, 0x40000100
1414};
1415
93ed1503 1416static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
8e9068b1
MR		 1417 [STAC_D965_REF] = ref927x_pin_configs,
1418 [STAC_D965_3ST] = d965_3st_pin_configs,
1419 [STAC_D965_5ST] = d965_5st_pin_configs,
1420 [STAC_DELL_3ST] = dell_3st_pin_configs,
1421 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 1422};
1423
f5fcc13c 1424static const char *stac927x_models[STAC_927X_MODELS] = {
8e9068b1
MR		 1425 [STAC_D965_REF] = "ref",
1426 [STAC_D965_3ST] = "3stack",
1427 [STAC_D965_5ST] = "5stack",
1428 [STAC_DELL_3ST] = "dell-3stack",
1429 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 1430};
1431
1432static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1433 /* SigmaTel reference board */
1434 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1435 "DFI LanParty", STAC_D965_REF),
81d3dbde 1436 /* Intel 946 based systems */
f5fcc13c
TI		 1437 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1438 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 1439 /* 965 based 3 stack systems */
f5fcc13c
TI		 1440 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1441 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1443 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1444 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1445 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1447 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1448 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1449 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1451 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1452 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1453 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1454 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1455 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 1456 /* Dell 3 stack systems */
8e9068b1
MR		 1457 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_3ST),
1458 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 1459 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 1460 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1461 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1
MR		 1462 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_3ST),
1463 /* Dell 3 stack systems with verb table in BIOS */
1464 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell ", STAC_DELL_BIOS),
1465 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1466 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1467 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1468 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 1470 /* 965 based 5 stack systems */
f5fcc13c
TI		 1471 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1472 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1474 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1475 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1476 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1478 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1479 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 1480 {} /* terminator */
1481};
1482
f3302a59
MP		 1483static unsigned int ref9205_pin_configs[12] = {
1484 0x40000100, 0x40000100, 0x01016011, 0x01014010,
8b65727b
MP		 1485 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
1486 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 1487};
1488
dfe495d0
TI		 1489/*
1490 STAC 9205 pin configs for
1491 102801F1
1492 102801F2
1493 102801FC
1494 102801FD
1495 10280204
1496 1028021F
1497*/
1498static unsigned int dell_9205_m42_pin_configs[12] = {
1499 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1500 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1501 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1502};
1503
1504/*
1505 STAC 9205 pin configs for
1506 102801F9
1507 102801FA
1508 102801FE
1509 102801FF (Dell Precision M4300)
1510 10280206
1511 10280200
1512 10280201
1513*/
1514static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 1515 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1516 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1517 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1518};
1519
dfe495d0 1520static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 1521 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1522 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1523 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1524};
1525
f5fcc13c 1526static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 1527 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 1528 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1529 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1530 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 1531};
1532
f5fcc13c
TI		 1533static const char *stac9205_models[STAC_9205_MODELS] = {
1534 [STAC_9205_REF] = "ref",
dfe495d0 1535 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 1536 [STAC_9205_DELL_M43] = "dell-m43",
1537 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 1538};
1539
1540static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1541 /* SigmaTel reference board */
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1543 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1545 "unknown Dell", STAC_9205_DELL_M42),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1547 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1
MR		 1549 "Dell Precision", STAC_9205_DELL_M43),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1551 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1552 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1553 "Dell Precision", STAC_9205_DELL_M43),
e45e459e
MR		 1554 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1555 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1556 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1557 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 1558 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1559 "unknown Dell", STAC_9205_DELL_M42),
1560 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1561 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1562 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1563 "Dell Precision", STAC_9205_DELL_M43),
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 1565 "Dell Precision M4300", STAC_9205_DELL_M43),
ae0a8ed8
TD		 1566 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1567 "Dell Precision", STAC_9205_DELL_M43),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1569 "Dell Inspiron", STAC_9205_DELL_M44),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1571 "Dell Inspiron", STAC_9205_DELL_M44),
1572 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1573 "Dell Inspiron", STAC_9205_DELL_M44),
1574 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1575 "Dell Inspiron", STAC_9205_DELL_M44),
dfe495d0
TI		 1576 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1577 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 1578 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1579 "Dell Inspiron", STAC_9205_DELL_M44),
f3302a59
MP		 1580 {} /* terminator */
1581};
1582
11b44bbd
RF		 1583static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1584{
1585 int i;
1586 struct sigmatel_spec *spec = codec->spec;
1587
1588 if (! spec->bios_pin_configs) {
1589 spec->bios_pin_configs = kcalloc(spec->num_pins,
1590 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1591 if (! spec->bios_pin_configs)
1592 return -ENOMEM;
1593 }
1594
1595 for (i = 0; i < spec->num_pins; i++) {
1596 hda_nid_t nid = spec->pin_nids[i];
1597 unsigned int pin_cfg;
1598
1599 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1600 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1601 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1602 nid, pin_cfg);
1603 spec->bios_pin_configs[i] = pin_cfg;
1604 }
1605
1606 return 0;
1607}
1608
87d48363
MR		 1609static void stac92xx_set_config_reg(struct hda_codec *codec,
1610 hda_nid_t pin_nid, unsigned int pin_config)
1611{
1612 int i;
1613 snd_hda_codec_write(codec, pin_nid, 0,
1614 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1615 pin_config & 0x000000ff);
1616 snd_hda_codec_write(codec, pin_nid, 0,
1617 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1618 (pin_config & 0x0000ff00) >> 8);
1619 snd_hda_codec_write(codec, pin_nid, 0,
1620 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1621 (pin_config & 0x00ff0000) >> 16);
1622 snd_hda_codec_write(codec, pin_nid, 0,
1623 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1624 pin_config >> 24);
1625 i = snd_hda_codec_read(codec, pin_nid, 0,
1626 AC_VERB_GET_CONFIG_DEFAULT,
1627 0x00);
1628 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1629 pin_nid, i);
1630}
1631
2f2f4251
M		 1632static void stac92xx_set_config_regs(struct hda_codec *codec)
1633{
1634 int i;
1635 struct sigmatel_spec *spec = codec->spec;
2f2f4251 1636
87d48363
MR		 1637 if (!spec->pin_configs)
1638 return;
11b44bbd 1639
87d48363
MR		 1640 for (i = 0; i < spec->num_pins; i++)
1641 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1642 spec->pin_configs[i]);
2f2f4251 1643}
2f2f4251 1644
8259980e 1645static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
92a22beb 1646{
8259980e 1647 struct sigmatel_spec *spec = codec->spec;
87d48363 1648 /* Configure GPIOx as output */
82beb8fd
TI		 1649 snd_hda_codec_write_cache(codec, codec->afg, 0,
1650 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
87d48363 1651 /* Configure GPIOx as CMOS */
82beb8fd 1652 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
87d48363 1653 /* Assert GPIOx */
82beb8fd
TI		 1654 snd_hda_codec_write_cache(codec, codec->afg, 0,
1655 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
87d48363 1656 /* Enable GPIOx */
82beb8fd
TI		 1657 snd_hda_codec_write_cache(codec, codec->afg, 0,
1658 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
92a22beb
MR		 1659}
1660
dabbed6f 1661/*
c7d4b2fa 1662 * Analog playback callbacks
dabbed6f 1663 */
c7d4b2fa
M		 1664static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1665 struct hda_codec *codec,
c8b6bf9b 1666 struct snd_pcm_substream *substream)
2f2f4251 1667{
dabbed6f 1668 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 1669 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
2f2f4251
M		 1670}
1671
2f2f4251
M		 1672static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1673 struct hda_codec *codec,
1674 unsigned int stream_tag,
1675 unsigned int format,
c8b6bf9b 1676 struct snd_pcm_substream *substream)
2f2f4251
M		 1677{
1678 struct sigmatel_spec *spec = codec->spec;
403d1944 1679 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 1680}
1681
1682static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1683 struct hda_codec *codec,
c8b6bf9b 1684 struct snd_pcm_substream *substream)
2f2f4251
M		 1685{
1686 struct sigmatel_spec *spec = codec->spec;
1687 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1688}
1689
dabbed6f
M		 1690/*
1691 * Digital playback callbacks
1692 */
1693static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1694 struct hda_codec *codec,
c8b6bf9b 1695 struct snd_pcm_substream *substream)
dabbed6f
M		 1696{
1697 struct sigmatel_spec *spec = codec->spec;
1698 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1699}
1700
1701static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1702 struct hda_codec *codec,
c8b6bf9b 1703 struct snd_pcm_substream *substream)
dabbed6f
M		 1704{
1705 struct sigmatel_spec *spec = codec->spec;
1706 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1707}
1708
6b97eb45
TI		 1709static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1710 struct hda_codec *codec,
1711 unsigned int stream_tag,
1712 unsigned int format,
1713 struct snd_pcm_substream *substream)
1714{
1715 struct sigmatel_spec *spec = codec->spec;
1716 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1717 stream_tag, format, substream);
1718}
1719
dabbed6f 1720
2f2f4251
M		 1721/*
1722 * Analog capture callbacks
1723 */
1724static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1725 struct hda_codec *codec,
1726 unsigned int stream_tag,
1727 unsigned int format,
c8b6bf9b 1728 struct snd_pcm_substream *substream)
2f2f4251
M		 1729{
1730 struct sigmatel_spec *spec = codec->spec;
1731
1732 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1733 stream_tag, 0, format);
1734 return 0;
1735}
1736
1737static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1738 struct hda_codec *codec,
c8b6bf9b 1739 struct snd_pcm_substream *substream)
2f2f4251
M		 1740{
1741 struct sigmatel_spec *spec = codec->spec;
1742
1743 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
1744 return 0;
1745}
1746
dabbed6f
M		 1747static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1748 .substreams = 1,
1749 .channels_min = 2,
1750 .channels_max = 2,
1751 /* NID is set in stac92xx_build_pcms */
1752 .ops = {
1753 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 1754 .close = stac92xx_dig_playback_pcm_close,
1755 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 1756 },
1757};
1758
1759static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1760 .substreams = 1,
1761 .channels_min = 2,
1762 .channels_max = 2,
1763 /* NID is set in stac92xx_build_pcms */
1764};
1765
2f2f4251
M		 1766static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1767 .substreams = 1,
1768 .channels_min = 2,
c7d4b2fa 1769 .channels_max = 8,
2f2f4251
M		 1770 .nid = 0x02, /* NID to query formats and rates */
1771 .ops = {
1772 .open = stac92xx_playback_pcm_open,
1773 .prepare = stac92xx_playback_pcm_prepare,
1774 .cleanup = stac92xx_playback_pcm_cleanup
1775 },
1776};
1777
3cc08dc6
MP		 1778static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1779 .substreams = 1,
1780 .channels_min = 2,
1781 .channels_max = 2,
1782 .nid = 0x06, /* NID to query formats and rates */
1783 .ops = {
1784 .open = stac92xx_playback_pcm_open,
1785 .prepare = stac92xx_playback_pcm_prepare,
1786 .cleanup = stac92xx_playback_pcm_cleanup
1787 },
1788};
1789
2f2f4251 1790static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 1791 .channels_min = 2,
1792 .channels_max = 2,
9e05b7a3 1793 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 1794 .ops = {
1795 .prepare = stac92xx_capture_pcm_prepare,
1796 .cleanup = stac92xx_capture_pcm_cleanup
1797 },
1798};
1799
1800static int stac92xx_build_pcms(struct hda_codec *codec)
1801{
1802 struct sigmatel_spec *spec = codec->spec;
1803 struct hda_pcm *info = spec->pcm_rec;
1804
1805 codec->num_pcms = 1;
1806 codec->pcm_info = info;
1807
c7d4b2fa 1808 info->name = "STAC92xx Analog";
2f2f4251 1809 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 1810 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 1811 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 1812 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 1813
1814 if (spec->alt_switch) {
1815 codec->num_pcms++;
1816 info++;
1817 info->name = "STAC92xx Analog Alt";
1818 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
1819 }
2f2f4251 1820
dabbed6f
M		 1821 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
1822 codec->num_pcms++;
1823 info++;
1824 info->name = "STAC92xx Digital";
1825 if (spec->multiout.dig_out_nid) {
1826 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
1827 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
1828 }
1829 if (spec->dig_in_nid) {
1830 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
1831 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
1832 }
1833 }
1834
2f2f4251
M		 1835 return 0;
1836}
1837
c960a03b
TI		 1838static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1839{
1840 unsigned int pincap = snd_hda_param_read(codec, nid,
1841 AC_PAR_PIN_CAP);
1842 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
1843 if (pincap & AC_PINCAP_VREF_100)
1844 return AC_PINCTL_VREF_100;
1845 if (pincap & AC_PINCAP_VREF_80)
1846 return AC_PINCTL_VREF_80;
1847 if (pincap & AC_PINCAP_VREF_50)
1848 return AC_PINCTL_VREF_50;
1849 if (pincap & AC_PINCAP_VREF_GRD)
1850 return AC_PINCTL_VREF_GRD;
1851 return 0;
1852}
1853
403d1944
MP		 1854static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1855
1856{
82beb8fd
TI		 1857 snd_hda_codec_write_cache(codec, nid, 0,
1858 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 1859}
1860
a5ce8890 1861#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 1862
1863static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1864{
1865 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1866 struct sigmatel_spec *spec = codec->spec;
1867 int io_idx = kcontrol-> private_value & 0xff;
1868
1869 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
1870 return 0;
1871}
1872
1873static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1874{
1875 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1876 struct sigmatel_spec *spec = codec->spec;
1877 hda_nid_t nid = kcontrol->private_value >> 8;
1878 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 1879 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 1880
1881 spec->io_switch[io_idx] = val;
1882
1883 if (val)
1884 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 1885 else {
1886 unsigned int pinctl = AC_PINCTL_IN_EN;
1887 if (io_idx) /* set VREF for mic */
1888 pinctl |= stac92xx_get_vref(codec, nid);
1889 stac92xx_auto_set_pinctl(codec, nid, pinctl);
1890 }
40c1d308
JZ		 1891
1892 /* check the auto-mute again: we need to mute/unmute the speaker
1893 * appropriately according to the pin direction
1894 */
1895 if (spec->hp_detect)
1896 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1897
403d1944
MP		 1898 return 1;
1899}
1900
0fb87bb4
ML		 1901#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1902
1903static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1904 struct snd_ctl_elem_value *ucontrol)
1905{
1906 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1907 struct sigmatel_spec *spec = codec->spec;
1908
1909 ucontrol->value.integer.value[0] = spec->clfe_swap;
1910 return 0;
1911}
1912
1913static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1914 struct snd_ctl_elem_value *ucontrol)
1915{
1916 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1917 struct sigmatel_spec *spec = codec->spec;
1918 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 1919 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 1920
68ea7b2f 1921 if (spec->clfe_swap == val)
0fb87bb4
ML		 1922 return 0;
1923
68ea7b2f 1924 spec->clfe_swap = val;
0fb87bb4
ML		 1925
1926 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1927 spec->clfe_swap ? 0x4 : 0x0);
1928
1929 return 1;
1930}
1931
403d1944
MP		 1932#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1933 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1934 .name = xname, \
1935 .index = 0, \
1936 .info = stac92xx_io_switch_info, \
1937 .get = stac92xx_io_switch_get, \
1938 .put = stac92xx_io_switch_put, \
1939 .private_value = xpval, \
1940 }
1941
0fb87bb4
ML		 1942#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1943 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1944 .name = xname, \
1945 .index = 0, \
1946 .info = stac92xx_clfe_switch_info, \
1947 .get = stac92xx_clfe_switch_get, \
1948 .put = stac92xx_clfe_switch_put, \
1949 .private_value = xpval, \
1950 }
403d1944 1951
c7d4b2fa
M		 1952enum {
1953 STAC_CTL_WIDGET_VOL,
1954 STAC_CTL_WIDGET_MUTE,
403d1944 1955 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 1956 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 1957};
1958
c8b6bf9b 1959static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 1960 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1961 HDA_CODEC_MUTE(NULL, 0, 0, 0),
403d1944 1962 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 1963 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 1964};
1965
1966/* add dynamic controls */
1967static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
1968{
c8b6bf9b 1969 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 1970
1971 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
1972 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
1973
1974 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
1975 if (! knew)
1976 return -ENOMEM;
1977 if (spec->kctl_alloc) {
1978 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
1979 kfree(spec->kctl_alloc);
1980 }
1981 spec->kctl_alloc = knew;
1982 spec->num_kctl_alloc = num;
1983 }
1984
1985 knew = &spec->kctl_alloc[spec->num_kctl_used];
1986 *knew = stac92xx_control_templates[type];
82fe0c58 1987 knew->name = kstrdup(name, GFP_KERNEL);
c7d4b2fa
M		 1988 if (! knew->name)
1989 return -ENOMEM;
1990 knew->private_value = val;
1991 spec->num_kctl_used++;
1992 return 0;
1993}
1994
403d1944
MP		 1995/* flag inputs as additional dynamic lineouts */
1996static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
1997{
1998 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 1999 unsigned int wcaps, wtype;
2000 int i, num_dacs = 0;
2001
2002 /* use the wcaps cache to count all DACs available for line-outs */
2003 for (i = 0; i < codec->num_nodes; i++) {
2004 wcaps = codec->wcaps[i];
2005 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2006
7b043899
SL		 2007 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2008 num_dacs++;
2009 }
403d1944 2010
7b043899
SL		 2011 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2012
403d1944
MP		 2013 switch (cfg->line_outs) {
2014 case 3:
2015 /* add line-in as side */
7b043899 2016 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2017 cfg->line_out_pins[cfg->line_outs] =
2018 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2019 spec->line_switch = 1;
2020 cfg->line_outs++;
2021 }
2022 break;
2023 case 2:
2024 /* add line-in as clfe and mic as side */
7b043899 2025 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2026 cfg->line_out_pins[cfg->line_outs] =
2027 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2028 spec->line_switch = 1;
2029 cfg->line_outs++;
2030 }
7b043899 2031 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2032 cfg->line_out_pins[cfg->line_outs] =
2033 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2034 spec->mic_switch = 1;
2035 cfg->line_outs++;
2036 }
2037 break;
2038 case 1:
2039 /* add line-in as surr and mic as clfe */
7b043899 2040 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2041 cfg->line_out_pins[cfg->line_outs] =
2042 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2043 spec->line_switch = 1;
2044 cfg->line_outs++;
2045 }
7b043899 2046 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2047 cfg->line_out_pins[cfg->line_outs] =
2048 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2049 spec->mic_switch = 1;
2050 cfg->line_outs++;
2051 }
2052 break;
2053 }
2054
2055 return 0;
2056}
2057
7b043899
SL		 2058
2059static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2060{
2061 int i;
2062
2063 for (i = 0; i < spec->multiout.num_dacs; i++) {
2064 if (spec->multiout.dac_nids[i] == nid)
2065 return 1;
2066 }
2067
2068 return 0;
2069}
2070
3cc08dc6 2071/*
7b043899
SL		 2072 * Fill in the dac_nids table from the parsed pin configuration
2073 * This function only works when every pin in line_out_pins[]
2074 * contains atleast one DAC in its connection list. Some 92xx
2075 * codecs are not connected directly to a DAC, such as the 9200
2076 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2077 */
19039bd0 2078static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2079 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2080{
2081 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2082 int i, j, conn_len = 0;
2083 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2084 unsigned int wcaps, wtype;
2085
c7d4b2fa
M		 2086 for (i = 0; i < cfg->line_outs; i++) {
2087 nid = cfg->line_out_pins[i];
7b043899
SL		 2088 conn_len = snd_hda_get_connections(codec, nid, conn,
2089 HDA_MAX_CONNECTIONS);
2090 for (j = 0; j < conn_len; j++) {
2091 wcaps = snd_hda_param_read(codec, conn[j],
2092 AC_PAR_AUDIO_WIDGET_CAP);
2093 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2094 if (wtype != AC_WID_AUD_OUT ||
2095 (wcaps & AC_WCAP_DIGITAL))
2096 continue;
2097 /* conn[j] is a DAC routed to this line-out */
2098 if (!is_in_dac_nids(spec, conn[j]))
2099 break;
2100 }
2101
2102 if (j == conn_len) {
df802952
TI		 2103 if (spec->multiout.num_dacs > 0) {
2104 /* we have already working output pins,
2105 * so let's drop the broken ones again
2106 */
2107 cfg->line_outs = spec->multiout.num_dacs;
2108 break;
2109 }
7b043899
SL		 2110 /* error out, no available DAC found */
2111 snd_printk(KERN_ERR
2112 "%s: No available DAC for pin 0x%x\n",
2113 __func__, nid);
2114 return -ENODEV;
2115 }
2116
2117 spec->multiout.dac_nids[i] = conn[j];
2118 spec->multiout.num_dacs++;
2119 if (conn_len > 1) {
2120 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2121 snd_hda_codec_write_cache(codec, nid, 0,
2122 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2123
7b043899
SL		 2124 }
2125 }
c7d4b2fa 2126
7b043899
SL		 2127 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2128 spec->multiout.num_dacs,
2129 spec->multiout.dac_nids[0],
2130 spec->multiout.dac_nids[1],
2131 spec->multiout.dac_nids[2],
2132 spec->multiout.dac_nids[3],
2133 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2134 return 0;
2135}
2136
eb06ed8f
TI		 2137/* create volume control/switch for the given prefx type */
2138static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2139{
2140 char name[32];
2141 int err;
2142
2143 sprintf(name, "%s Playback Volume", pfx);
2144 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2145 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2146 if (err < 0)
2147 return err;
2148 sprintf(name, "%s Playback Switch", pfx);
2149 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2150 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2151 if (err < 0)
2152 return err;
2153 return 0;
2154}
2155
c7d4b2fa 2156/* add playback controls from the parsed DAC table */
0fb87bb4 2157static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2158 const struct auto_pin_cfg *cfg)
c7d4b2fa 2159{
19039bd0
TI		 2160 static const char *chname[4] = {
2161 "Front", "Surround", NULL /*CLFE*/, "Side"
2162 };
c7d4b2fa
M		 2163 hda_nid_t nid;
2164 int i, err;
2165
0fb87bb4
ML		 2166 struct sigmatel_spec *spec = codec->spec;
2167 unsigned int wid_caps;
2168
2169
c7d4b2fa 2170 for (i = 0; i < cfg->line_outs; i++) {
403d1944 2171 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2172 continue;
2173
2174 nid = spec->multiout.dac_nids[i];
2175
2176 if (i == 2) {
2177 /* Center/LFE */
eb06ed8f
TI		 2178 err = create_controls(spec, "Center", nid, 1);
2179 if (err < 0)
c7d4b2fa 2180 return err;
eb06ed8f
TI		 2181 err = create_controls(spec, "LFE", nid, 2);
2182 if (err < 0)
c7d4b2fa 2183 return err;
0fb87bb4
ML		 2184
2185 wid_caps = get_wcaps(codec, nid);
2186
2187 if (wid_caps & AC_WCAP_LR_SWAP) {
2188 err = stac92xx_add_control(spec,
2189 STAC_CTL_WIDGET_CLFE_SWITCH,
2190 "Swap Center/LFE Playback Switch", nid);
2191
2192 if (err < 0)
2193 return err;
2194 }
2195
c7d4b2fa 2196 } else {
eb06ed8f
TI		 2197 err = create_controls(spec, chname[i], nid, 3);
2198 if (err < 0)
c7d4b2fa
M		 2199 return err;
2200 }
2201 }
2202
403d1944
MP		 2203 if (spec->line_switch)
2204 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
2205 return err;
2206
2207 if (spec->mic_switch)
2208 if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
2209 return err;
2210
c7d4b2fa
M		 2211 return 0;
2212}
2213
eb06ed8f 2214static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
c7d4b2fa 2215{
7b043899
SL		 2216 if (is_in_dac_nids(spec, nid))
2217 return 1;
eb06ed8f
TI		 2218 if (spec->multiout.hp_nid == nid)
2219 return 1;
2220 return 0;
2221}
c7d4b2fa 2222
eb06ed8f
TI		 2223static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2224{
2225 if (!spec->multiout.hp_nid)
2226 spec->multiout.hp_nid = nid;
2227 else if (spec->multiout.num_dacs > 4) {
2228 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2229 return 1;
2230 } else {
2231 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2232 spec->multiout.num_dacs++;
2233 }
2234 return 0;
2235}
4e55096e 2236
eb06ed8f
TI		 2237/* add playback controls for Speaker and HP outputs */
2238static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2239 struct auto_pin_cfg *cfg)
2240{
2241 struct sigmatel_spec *spec = codec->spec;
2242 hda_nid_t nid;
2243 int i, old_num_dacs, err;
2244
2245 old_num_dacs = spec->multiout.num_dacs;
2246 for (i = 0; i < cfg->hp_outs; i++) {
2247 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2248 if (wid_caps & AC_WCAP_UNSOL_CAP)
2249 spec->hp_detect = 1;
2250 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2251 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2252 if (check_in_dac_nids(spec, nid))
2253 nid = 0;
2254 if (! nid)
c7d4b2fa 2255 continue;
eb06ed8f
TI		 2256 add_spec_dacs(spec, nid);
2257 }
2258 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2259 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2260 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2261 if (check_in_dac_nids(spec, nid))
2262 nid = 0;
eb06ed8f
TI		 2263 if (! nid)
2264 continue;
2265 add_spec_dacs(spec, nid);
c7d4b2fa 2266 }
1b290a51
MR		 2267 for (i = 0; i < cfg->line_outs; i++) {
2268 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2269 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2270 if (check_in_dac_nids(spec, nid))
2271 nid = 0;
2272 if (! nid)
2273 continue;
2274 add_spec_dacs(spec, nid);
2275 }
eb06ed8f
TI		 2276 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2277 static const char *pfxs[] = {
2278 "Speaker", "External Speaker", "Speaker2",
2279 };
2280 err = create_controls(spec, pfxs[i - old_num_dacs],
2281 spec->multiout.dac_nids[i], 3);
2282 if (err < 0)
2283 return err;
2284 }
2285 if (spec->multiout.hp_nid) {
2286 const char *pfx;
6020c008 2287 if (old_num_dacs == spec->multiout.num_dacs)
eb06ed8f
TI		 2288 pfx = "Master";
2289 else
2290 pfx = "Headphone";
2291 err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
2292 if (err < 0)
2293 return err;
2294 }
c7d4b2fa
M		 2295
2296 return 0;
2297}
2298
8b65727b 2299/* labels for dmic mux inputs */
ddc2cec4 2300static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 2301 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2302 "Digital Mic 3", "Digital Mic 4"
2303};
2304
2305/* create playback/capture controls for input pins on dmic capable codecs */
2306static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2307 const struct auto_pin_cfg *cfg)
2308{
2309 struct sigmatel_spec *spec = codec->spec;
2310 struct hda_input_mux *dimux = &spec->private_dimux;
2311 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2312 int i, j;
2313
2314 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2315 dimux->items[dimux->num_items].index = 0;
2316 dimux->num_items++;
2317
2318 for (i = 0; i < spec->num_dmics; i++) {
2319 int index;
2320 int num_cons;
2321 unsigned int def_conf;
2322
2323 def_conf = snd_hda_codec_read(codec,
2324 spec->dmic_nids[i],
2325 0,
2326 AC_VERB_GET_CONFIG_DEFAULT,
2327 0);
2328 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2329 continue;
2330
2331 num_cons = snd_hda_get_connections(codec,
e1f0d669 2332 spec->dmux_nids[0],
8b65727b
MP		 2333 con_lst,
2334 HDA_MAX_NUM_INPUTS);
2335 for (j = 0; j < num_cons; j++)
2336 if (con_lst[j] == spec->dmic_nids[i]) {
2337 index = j;
2338 goto found;
2339 }
2340 continue;
2341found:
2342 dimux->items[dimux->num_items].label =
2343 stac92xx_dmic_labels[dimux->num_items];
2344 dimux->items[dimux->num_items].index = index;
2345 dimux->num_items++;
2346 }
2347
2348 return 0;
2349}
2350
c7d4b2fa
M		 2351/* create playback/capture controls for input pins */
2352static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2353{
2354 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 2355 struct hda_input_mux *imux = &spec->private_imux;
2356 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2357 int i, j, k;
2358
2359 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 2360 int index;
2361
2362 if (!cfg->input_pins[i])
2363 continue;
2364 index = -1;
2365 for (j = 0; j < spec->num_muxes; j++) {
2366 int num_cons;
2367 num_cons = snd_hda_get_connections(codec,
2368 spec->mux_nids[j],
2369 con_lst,
2370 HDA_MAX_NUM_INPUTS);
2371 for (k = 0; k < num_cons; k++)
2372 if (con_lst[k] == cfg->input_pins[i]) {
2373 index = k;
2374 goto found;
2375 }
c7d4b2fa 2376 }
314634bc
TI		 2377 continue;
2378 found:
2379 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2380 imux->items[imux->num_items].index = index;
2381 imux->num_items++;
c7d4b2fa
M		 2382 }
2383
7b043899 2384 if (imux->num_items) {
62fe78e9
SR		 2385 /*
2386 * Set the current input for the muxes.
2387 * The STAC9221 has two input muxes with identical source
2388 * NID lists. Hopefully this won't get confused.
2389 */
2390 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 2391 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2392 AC_VERB_SET_CONNECT_SEL,
2393 imux->items[0].index);
62fe78e9
SR		 2394 }
2395 }
2396
c7d4b2fa
M		 2397 return 0;
2398}
2399
c7d4b2fa
M		 2400static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2401{
2402 struct sigmatel_spec *spec = codec->spec;
2403 int i;
2404
2405 for (i = 0; i < spec->autocfg.line_outs; i++) {
2406 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2407 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2408 }
2409}
2410
2411static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2412{
2413 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2414 int i;
c7d4b2fa 2415
eb06ed8f
TI		 2416 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2417 hda_nid_t pin;
2418 pin = spec->autocfg.hp_pins[i];
2419 if (pin) /* connect to front */
2420 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2421 }
2422 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2423 hda_nid_t pin;
2424 pin = spec->autocfg.speaker_pins[i];
2425 if (pin) /* connect to front */
2426 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2427 }
c7d4b2fa
M		 2428}
2429
3cc08dc6 2430static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 2431{
2432 struct sigmatel_spec *spec = codec->spec;
2433 int err;
bcecd9bd 2434 int hp_speaker_swap = 0;
c7d4b2fa 2435
8b65727b
MP		 2436 if ((err = snd_hda_parse_pin_def_config(codec,
2437 &spec->autocfg,
2438 spec->dmic_nids)) < 0)
c7d4b2fa 2439 return err;
82bc955f 2440 if (! spec->autocfg.line_outs)
869264c4 2441 return 0; /* can't find valid pin config */
19039bd0 2442
bcecd9bd
JZ		 2443 /* If we have no real line-out pin and multiple hp-outs, HPs should
2444 * be set up as multi-channel outputs.
2445 */
2446 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2447 spec->autocfg.hp_outs > 1) {
2448 /* Copy hp_outs to line_outs, backup line_outs in
2449 * speaker_outs so that the following routines can handle
2450 * HP pins as primary outputs.
2451 */
2452 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2453 sizeof(spec->autocfg.line_out_pins));
2454 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2455 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2456 sizeof(spec->autocfg.hp_pins));
2457 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2458 hp_speaker_swap = 1;
2459 }
2460
403d1944
MP		 2461 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2462 return err;
19039bd0
TI		 2463 if (spec->multiout.num_dacs == 0)
2464 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2465 return err;
c7d4b2fa 2466
0fb87bb4
ML		 2467 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2468
2469 if (err < 0)
2470 return err;
2471
bcecd9bd
JZ		 2472 if (hp_speaker_swap == 1) {
2473 /* Restore the hp_outs and line_outs */
2474 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2475 sizeof(spec->autocfg.line_out_pins));
2476 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2477 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2478 sizeof(spec->autocfg.speaker_pins));
2479 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2480 memset(spec->autocfg.speaker_pins, 0,
2481 sizeof(spec->autocfg.speaker_pins));
2482 spec->autocfg.speaker_outs = 0;
2483 }
2484
0fb87bb4
ML		 2485 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2486
2487 if (err < 0)
2488 return err;
2489
2490 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2491
2492 if (err < 0)
c7d4b2fa
M		 2493 return err;
2494
8b65727b
MP		 2495 if (spec->num_dmics > 0)
2496 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2497 &spec->autocfg)) < 0)
2498 return err;
2499
c7d4b2fa 2500 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 2501 if (spec->multiout.max_channels > 2)
c7d4b2fa 2502 spec->surr_switch = 1;
c7d4b2fa 2503
82bc955f 2504 if (spec->autocfg.dig_out_pin)
3cc08dc6 2505 spec->multiout.dig_out_nid = dig_out;
82bc955f 2506 if (spec->autocfg.dig_in_pin)
3cc08dc6 2507 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 2508
2509 if (spec->kctl_alloc)
2510 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2511
2512 spec->input_mux = &spec->private_imux;
e1f0d669
MR		 2513 if (!spec->dinput_mux)
2514 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2515
2516 return 1;
2517}
2518
82bc955f
TI		 2519/* add playback controls for HP output */
2520static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2521 struct auto_pin_cfg *cfg)
2522{
2523 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 2524 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 2525 unsigned int wid_caps;
2526
2527 if (! pin)
2528 return 0;
2529
2530 wid_caps = get_wcaps(codec, pin);
505cb341 2531 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 2532 spec->hp_detect = 1;
82bc955f
TI		 2533
2534 return 0;
2535}
2536
160ea0dc
RF		 2537/* add playback controls for LFE output */
2538static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2539 struct auto_pin_cfg *cfg)
2540{
2541 struct sigmatel_spec *spec = codec->spec;
2542 int err;
2543 hda_nid_t lfe_pin = 0x0;
2544 int i;
2545
2546 /*
2547 * search speaker outs and line outs for a mono speaker pin
2548 * with an amp. If one is found, add LFE controls
2549 * for it.
2550 */
2551 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2552 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2553 unsigned long wcaps = get_wcaps(codec, pin);
2554 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2555 if (wcaps == AC_WCAP_OUT_AMP)
2556 /* found a mono speaker with an amp, must be lfe */
2557 lfe_pin = pin;
2558 }
2559
2560 /* if speaker_outs is 0, then speakers may be in line_outs */
2561 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2562 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2563 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2564 unsigned long cfg;
2565 cfg = snd_hda_codec_read(codec, pin, 0,
2566 AC_VERB_GET_CONFIG_DEFAULT,
2567 0x00);
2568 if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
2569 unsigned long wcaps = get_wcaps(codec, pin);
2570 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2571 if (wcaps == AC_WCAP_OUT_AMP)
2572 /* found a mono speaker with an amp,
2573 must be lfe */
2574 lfe_pin = pin;
2575 }
2576 }
2577 }
2578
2579 if (lfe_pin) {
eb06ed8f 2580 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 2581 if (err < 0)
2582 return err;
2583 }
2584
2585 return 0;
2586}
2587
c7d4b2fa
M		 2588static int stac9200_parse_auto_config(struct hda_codec *codec)
2589{
2590 struct sigmatel_spec *spec = codec->spec;
2591 int err;
2592
df694daa 2593 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 2594 return err;
2595
2596 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2597 return err;
2598
82bc955f
TI		 2599 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2600 return err;
2601
160ea0dc
RF		 2602 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2603 return err;
2604
82bc955f 2605 if (spec->autocfg.dig_out_pin)
c7d4b2fa 2606 spec->multiout.dig_out_nid = 0x05;
82bc955f 2607 if (spec->autocfg.dig_in_pin)
c7d4b2fa 2608 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 2609
2610 if (spec->kctl_alloc)
2611 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2612
2613 spec->input_mux = &spec->private_imux;
8b65727b 2614 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 2615
2616 return 1;
2617}
2618
62fe78e9
SR		 2619/*
2620 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
2621 * funky external mute control using GPIO pins.
2622 */
2623
2624static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
2625{
2626 unsigned int gpiostate, gpiomask, gpiodir;
2627
2628 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
2629 AC_VERB_GET_GPIO_DATA, 0);
2630
2631 if (!muted)
2632 gpiostate |= (1 << pin);
2633 else
2634 gpiostate &= ~(1 << pin);
2635
2636 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
2637 AC_VERB_GET_GPIO_MASK, 0);
2638 gpiomask |= (1 << pin);
2639
2640 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
2641 AC_VERB_GET_GPIO_DIRECTION, 0);
2642 gpiodir |= (1 << pin);
2643
2644 /* AppleHDA seems to do this -- WTF is this verb?? */
2645 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
2646
2647 snd_hda_codec_write(codec, codec->afg, 0,
2648 AC_VERB_SET_GPIO_MASK, gpiomask);
2649 snd_hda_codec_write(codec, codec->afg, 0,
2650 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
2651
2652 msleep(1);
2653
2654 snd_hda_codec_write(codec, codec->afg, 0,
2655 AC_VERB_SET_GPIO_DATA, gpiostate);
2656}
2657
314634bc
TI		 2658static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
2659 unsigned int event)
2660{
2661 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 2662 snd_hda_codec_write_cache(codec, nid, 0,
2663 AC_VERB_SET_UNSOLICITED_ENABLE,
2664 (AC_USRSP_EN | event));
314634bc
TI		 2665}
2666
c7d4b2fa
M		 2667static int stac92xx_init(struct hda_codec *codec)
2668{
2669 struct sigmatel_spec *spec = codec->spec;
82bc955f
TI		 2670 struct auto_pin_cfg *cfg = &spec->autocfg;
2671 int i;
c7d4b2fa 2672
c7d4b2fa
M		 2673 snd_hda_sequence_write(codec, spec->init);
2674
82bc955f
TI		 2675 /* set up pins */
2676 if (spec->hp_detect) {
505cb341 2677 /* Enable unsolicited responses on the HP widget */
eb06ed8f 2678 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 2679 enable_pin_detect(codec, cfg->hp_pins[i],
2680 STAC_HP_EVENT);
0a07acaf
TI		 2681 /* force to enable the first line-out; the others are set up
2682 * in unsol_event
2683 */
2684 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
2685 AC_PINCTL_OUT_EN);
eb995a8c 2686 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 2687 /* fake event to set up pins */
2688 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2689 } else {
2690 stac92xx_auto_init_multi_out(codec);
2691 stac92xx_auto_init_hp_out(codec);
2692 }
2693 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 2694 hda_nid_t nid = cfg->input_pins[i];
2695 if (nid) {
2696 unsigned int pinctl = AC_PINCTL_IN_EN;
2697 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
2698 pinctl |= stac92xx_get_vref(codec, nid);
2699 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2700 }
82bc955f 2701 }
8b65727b
MP		 2702 if (spec->num_dmics > 0)
2703 for (i = 0; i < spec->num_dmics; i++)
2704 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
2705 AC_PINCTL_IN_EN);
2706
82bc955f
TI		 2707 if (cfg->dig_out_pin)
2708 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
2709 AC_PINCTL_OUT_EN);
2710 if (cfg->dig_in_pin)
2711 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
2712 AC_PINCTL_IN_EN);
2713
62fe78e9
SR		 2714 if (spec->gpio_mute) {
2715 stac922x_gpio_mute(codec, 0, 0);
2716 stac922x_gpio_mute(codec, 1, 0);
2717 }
2718
c7d4b2fa
M		 2719 return 0;
2720}
2721
2f2f4251
M		 2722static void stac92xx_free(struct hda_codec *codec)
2723{
c7d4b2fa
M		 2724 struct sigmatel_spec *spec = codec->spec;
2725 int i;
2726
2727 if (! spec)
2728 return;
2729
2730 if (spec->kctl_alloc) {
2731 for (i = 0; i < spec->num_kctl_used; i++)
2732 kfree(spec->kctl_alloc[i].name);
2733 kfree(spec->kctl_alloc);
2734 }
2735
11b44bbd
RF		 2736 if (spec->bios_pin_configs)
2737 kfree(spec->bios_pin_configs);
2738
c7d4b2fa 2739 kfree(spec);
2f2f4251
M		 2740}
2741
4e55096e
M		 2742static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
2743 unsigned int flag)
2744{
2745 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2746 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 2747
f9acba43
TI		 2748 if (pin_ctl & AC_PINCTL_IN_EN) {
2749 /*
2750 * we need to check the current set-up direction of
2751 * shared input pins since they can be switched via
2752 * "xxx as Output" mixer switch
2753 */
2754 struct sigmatel_spec *spec = codec->spec;
2755 struct auto_pin_cfg *cfg = &spec->autocfg;
2756 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
2757 spec->line_switch) ||
2758 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
2759 spec->mic_switch))
2760 return;
2761 }
2762
7b043899
SL		 2763 /* if setting pin direction bits, clear the current
2764 direction bits first */
2765 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
2766 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
2767
82beb8fd 2768 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2769 AC_VERB_SET_PIN_WIDGET_CONTROL,
2770 pin_ctl | flag);
2771}
2772
2773static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
2774 unsigned int flag)
2775{
2776 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
2777 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 2778 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 2779 AC_VERB_SET_PIN_WIDGET_CONTROL,
2780 pin_ctl & ~flag);
2781}
2782
40c1d308 2783static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 2784{
2785 if (!nid)
2786 return 0;
2787 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 2788 & (1 << 31)) {
2789 unsigned int pinctl;
2790 pinctl = snd_hda_codec_read(codec, nid, 0,
2791 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2792 if (pinctl & AC_PINCTL_IN_EN)
2793 return 0; /* mic- or line-input */
2794 else
2795 return 1; /* HP-output */
2796 }
314634bc
TI		 2797 return 0;
2798}
2799
2800static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 2801{
2802 struct sigmatel_spec *spec = codec->spec;
2803 struct auto_pin_cfg *cfg = &spec->autocfg;
2804 int i, presence;
2805
eb06ed8f
TI		 2806 presence = 0;
2807 for (i = 0; i < cfg->hp_outs; i++) {
40c1d308 2808 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
314634bc
TI		 2809 if (presence)
2810 break;
eb06ed8f 2811 }
4e55096e
M		 2812
2813 if (presence) {
2814 /* disable lineouts, enable hp */
2815 for (i = 0; i < cfg->line_outs; i++)
2816 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
2817 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2818 for (i = 0; i < cfg->speaker_outs; i++)
2819 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
2820 AC_PINCTL_OUT_EN);
4e55096e
M		 2821 } else {
2822 /* enable lineouts, disable hp */
2823 for (i = 0; i < cfg->line_outs; i++)
2824 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
2825 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 2826 for (i = 0; i < cfg->speaker_outs; i++)
2827 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
2828 AC_PINCTL_OUT_EN);
4e55096e
M		 2829 }
2830}
2831
314634bc
TI		 2832static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
2833{
2834 switch (res >> 26) {
2835 case STAC_HP_EVENT:
2836 stac92xx_hp_detect(codec, res);
2837 break;
2838 }
2839}
2840
cb53c626 2841#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2842static int stac92xx_resume(struct hda_codec *codec)
2843{
dc81bed1
TI		 2844 struct sigmatel_spec *spec = codec->spec;
2845
11b44bbd 2846 stac92xx_set_config_regs(codec);
dc81bed1
TI		 2847 snd_hda_sequence_write(codec, spec->init);
2848 if (spec->gpio_mute) {
2849 stac922x_gpio_mute(codec, 0, 0);
2850 stac922x_gpio_mute(codec, 1, 0);
2851 }
82beb8fd
TI		 2852 snd_hda_codec_resume_amp(codec);
2853 snd_hda_codec_resume_cache(codec);
dc81bed1
TI		 2854 /* invoke unsolicited event to reset the HP state */
2855 if (spec->hp_detect)
2856 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 2857 return 0;
2858}
2859#endif
2860
2f2f4251
M		 2861static struct hda_codec_ops stac92xx_patch_ops = {
2862 .build_controls = stac92xx_build_controls,
2863 .build_pcms = stac92xx_build_pcms,
2864 .init = stac92xx_init,
2865 .free = stac92xx_free,
4e55096e 2866 .unsol_event = stac92xx_unsol_event,
cb53c626 2867#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 2868 .resume = stac92xx_resume,
2869#endif
2f2f4251
M		 2870};
2871
2872static int patch_stac9200(struct hda_codec *codec)
2873{
2874 struct sigmatel_spec *spec;
c7d4b2fa 2875 int err;
2f2f4251 2876
e560d8d8 2877 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 2878 if (spec == NULL)
2879 return -ENOMEM;
2880
2881 codec->spec = spec;
a4eed138 2882 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 2883 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 2884 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
2885 stac9200_models,
2886 stac9200_cfg_tbl);
11b44bbd
RF		 2887 if (spec->board_config < 0) {
2888 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
2889 err = stac92xx_save_bios_config_regs(codec);
2890 if (err < 0) {
2891 stac92xx_free(codec);
2892 return err;
2893 }
2894 spec->pin_configs = spec->bios_pin_configs;
2895 } else {
403d1944
MP		 2896 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
2897 stac92xx_set_config_regs(codec);
2898 }
2f2f4251
M		 2899
2900 spec->multiout.max_channels = 2;
2901 spec->multiout.num_dacs = 1;
2902 spec->multiout.dac_nids = stac9200_dac_nids;
2903 spec->adc_nids = stac9200_adc_nids;
2904 spec->mux_nids = stac9200_mux_nids;
dabbed6f 2905 spec->num_muxes = 1;
8b65727b 2906 spec->num_dmics = 0;
9e05b7a3 2907 spec->num_adcs = 1;
c7d4b2fa 2908
1194b5b7
TI		 2909 if (spec->board_config == STAC_9200_GATEWAY)
2910 spec->init = stac9200_eapd_init;
2911 else
2912 spec->init = stac9200_core_init;
2f2f4251 2913 spec->mixer = stac9200_mixer;
c7d4b2fa
M		 2914
2915 err = stac9200_parse_auto_config(codec);
2916 if (err < 0) {
2917 stac92xx_free(codec);
2918 return err;
2919 }
2f2f4251
M		 2920
2921 codec->patch_ops = stac92xx_patch_ops;
2922
2923 return 0;
2924}
2925
8e21c34c
TD		 2926static int patch_stac925x(struct hda_codec *codec)
2927{
2928 struct sigmatel_spec *spec;
2929 int err;
2930
2931 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2932 if (spec == NULL)
2933 return -ENOMEM;
2934
2935 codec->spec = spec;
a4eed138 2936 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 2937 spec->pin_nids = stac925x_pin_nids;
2938 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
2939 stac925x_models,
2940 stac925x_cfg_tbl);
9e507abd 2941 again:
8e21c34c 2942 if (spec->board_config < 0) {
2c11f955
TD		 2943 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
2944 "using BIOS defaults\n");
8e21c34c
TD		 2945 err = stac92xx_save_bios_config_regs(codec);
2946 if (err < 0) {
2947 stac92xx_free(codec);
2948 return err;
2949 }
2950 spec->pin_configs = spec->bios_pin_configs;
2951 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
2952 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
2953 stac92xx_set_config_regs(codec);
2954 }
2955
2956 spec->multiout.max_channels = 2;
2957 spec->multiout.num_dacs = 1;
2958 spec->multiout.dac_nids = stac925x_dac_nids;
2959 spec->adc_nids = stac925x_adc_nids;
2960 spec->mux_nids = stac925x_mux_nids;
2961 spec->num_muxes = 1;
9e05b7a3 2962 spec->num_adcs = 1;
2c11f955
TD		 2963 switch (codec->vendor_id) {
2964 case 0x83847632: /* STAC9202 */
2965 case 0x83847633: /* STAC9202D */
2966 case 0x83847636: /* STAC9251 */
2967 case 0x83847637: /* STAC9251D */
f6e9852a 2968 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955
TD		 2969 spec->dmic_nids = stac925x_dmic_nids;
2970 break;
2971 default:
2972 spec->num_dmics = 0;
2973 break;
2974 }
8e21c34c
TD		 2975
2976 spec->init = stac925x_core_init;
2977 spec->mixer = stac925x_mixer;
2978
2979 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 2980 if (!err) {
2981 if (spec->board_config < 0) {
2982 printk(KERN_WARNING "hda_codec: No auto-config is "
2983 "available, default to model=ref\n");
2984 spec->board_config = STAC_925x_REF;
2985 goto again;
2986 }
2987 err = -EINVAL;
2988 }
8e21c34c
TD		 2989 if (err < 0) {
2990 stac92xx_free(codec);
2991 return err;
2992 }
2993
2994 codec->patch_ops = stac92xx_patch_ops;
2995
2996 return 0;
2997}
2998
e1f0d669
MR		 2999static struct hda_input_mux stac92hd73xx_dmux = {
3000 .num_items = 4,
3001 .items = {
3002 { "Analog Inputs", 0x0b },
3003 { "CD", 0x08 },
3004 { "Digital Mic 1", 0x09 },
3005 { "Digital Mic 2", 0x0a },
3006 }
3007};
3008
3009static int patch_stac92hd73xx(struct hda_codec *codec)
3010{
3011 struct sigmatel_spec *spec;
3012 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3013 int err = 0;
3014
3015 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3016 if (spec == NULL)
3017 return -ENOMEM;
3018
3019 codec->spec = spec;
3020 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3021 spec->pin_nids = stac92hd73xx_pin_nids;
3022 spec->board_config = snd_hda_check_board_config(codec,
3023 STAC_92HD73XX_MODELS,
3024 stac92hd73xx_models,
3025 stac92hd73xx_cfg_tbl);
3026again:
3027 if (spec->board_config < 0) {
3028 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3029 " STAC92HD73XX, using BIOS defaults\n");
3030 err = stac92xx_save_bios_config_regs(codec);
3031 if (err < 0) {
3032 stac92xx_free(codec);
3033 return err;
3034 }
3035 spec->pin_configs = spec->bios_pin_configs;
3036 } else {
3037 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3038 stac92xx_set_config_regs(codec);
3039 }
3040
3041 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3042 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3043
3044 if (spec->multiout.num_dacs < 0) {
3045 printk(KERN_WARNING "hda_codec: Could not determine "
3046 "number of channels defaulting to DAC count\n");
3047 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3048 }
3049
3050 switch (spec->multiout.num_dacs) {
3051 case 0x3: /* 6 Channel */
3052 spec->mixer = stac92hd73xx_6ch_mixer;
3053 spec->init = stac92hd73xx_6ch_core_init;
3054 break;
3055 case 0x4: /* 8 Channel */
3056 spec->multiout.hp_nid = 0x18;
3057 spec->mixer = stac92hd73xx_8ch_mixer;
3058 spec->init = stac92hd73xx_8ch_core_init;
3059 break;
3060 case 0x5: /* 10 Channel */
3061 spec->multiout.hp_nid = 0x19;
3062 spec->mixer = stac92hd73xx_10ch_mixer;
3063 spec->init = stac92hd73xx_10ch_core_init;
3064 };
3065
3066 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3067 spec->aloopback_mask = 0x01;
3068 spec->aloopback_shift = 8;
3069
3070 spec->mux_nids = stac92hd73xx_mux_nids;
3071 spec->adc_nids = stac92hd73xx_adc_nids;
3072 spec->dmic_nids = stac92hd73xx_dmic_nids;
3073 spec->dmux_nids = stac92hd73xx_dmux_nids;
3074
3075 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3076 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3077 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3078 spec->dinput_mux = &stac92hd73xx_dmux;
3079 /* GPIO0 High = Enable EAPD */
3080 spec->gpio_mask = spec->gpio_data = 0x000001;
3081 stac92xx_enable_gpio_mask(codec);
3082
3083 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3084
3085 if (!err) {
3086 if (spec->board_config < 0) {
3087 printk(KERN_WARNING "hda_codec: No auto-config is "
3088 "available, default to model=ref\n");
3089 spec->board_config = STAC_92HD73XX_REF;
3090 goto again;
3091 }
3092 err = -EINVAL;
3093 }
3094
3095 if (err < 0) {
3096 stac92xx_free(codec);
3097 return err;
3098 }
3099
3100 codec->patch_ops = stac92xx_patch_ops;
3101
3102 return 0;
3103}
3104
e035b841
MR		 3105static int patch_stac92hd71bxx(struct hda_codec *codec)
3106{
3107 struct sigmatel_spec *spec;
3108 int err = 0;
3109
3110 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3111 if (spec == NULL)
3112 return -ENOMEM;
3113
3114 codec->spec = spec;
3115 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3116 spec->pin_nids = stac92hd71bxx_pin_nids;
3117 spec->board_config = snd_hda_check_board_config(codec,
3118 STAC_92HD71BXX_MODELS,
3119 stac92hd71bxx_models,
3120 stac92hd71bxx_cfg_tbl);
3121again:
3122 if (spec->board_config < 0) {
3123 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3124 " STAC92HD71BXX, using BIOS defaults\n");
3125 err = stac92xx_save_bios_config_regs(codec);
3126 if (err < 0) {
3127 stac92xx_free(codec);
3128 return err;
3129 }
3130 spec->pin_configs = spec->bios_pin_configs;
3131 } else {
3132 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3133 stac92xx_set_config_regs(codec);
3134 }
3135
541eee87
MR		 3136 switch (codec->vendor_id) {
3137 case 0x111d76b6: /* 4 Port without Analog Mixer */
3138 case 0x111d76b7:
3139 case 0x111d76b4: /* 6 Port without Analog Mixer */
3140 case 0x111d76b5:
3141 spec->mixer = stac92hd71bxx_mixer;
3142 spec->init = stac92hd71bxx_core_init;
3143 break;
3144 default:
3145 spec->mixer = stac92hd71bxx_analog_mixer;
3146 spec->init = stac92hd71bxx_analog_core_init;
3147 }
3148
3149 spec->aloopback_mask = 0x20;
3150 spec->aloopback_shift = 0;
3151
e035b841
MR		 3152 spec->gpio_mask = spec->gpio_data = 0x00000001; /* GPIO0 High = EAPD */
3153 stac92xx_enable_gpio_mask(codec);
3154
e035b841
MR		 3155 spec->mux_nids = stac92hd71bxx_mux_nids;
3156 spec->adc_nids = stac92hd71bxx_adc_nids;
3157 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 3158 spec->dmux_nids = stac92hd71bxx_dmux_nids;
e035b841
MR		 3159
3160 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3161 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3162 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
3163
3164 spec->multiout.num_dacs = 2;
3165 spec->multiout.hp_nid = 0x11;
3166 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3167
3168 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3169 if (!err) {
3170 if (spec->board_config < 0) {
3171 printk(KERN_WARNING "hda_codec: No auto-config is "
3172 "available, default to model=ref\n");
3173 spec->board_config = STAC_92HD71BXX_REF;
3174 goto again;
3175 }
3176 err = -EINVAL;
3177 }
3178
3179 if (err < 0) {
3180 stac92xx_free(codec);
3181 return err;
3182 }
3183
3184 codec->patch_ops = stac92xx_patch_ops;
3185
3186 return 0;
3187};
3188
2f2f4251
M		 3189static int patch_stac922x(struct hda_codec *codec)
3190{
3191 struct sigmatel_spec *spec;
c7d4b2fa 3192 int err;
2f2f4251 3193
e560d8d8 3194 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 3195 if (spec == NULL)
3196 return -ENOMEM;
3197
3198 codec->spec = spec;
a4eed138 3199 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 3200 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 3201 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3202 stac922x_models,
3203 stac922x_cfg_tbl);
5d5d3bc3 3204 if (spec->board_config == STAC_INTEL_MAC_V3) {
3fc24d85
TI		 3205 spec->gpio_mute = 1;
3206 /* Intel Macs have all same PCI SSID, so we need to check
3207 * codec SSID to distinguish the exact models
3208 */
6f0778d8 3209 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 3210 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 3211
3212 case 0x106b0800:
3213 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 3214 break;
5d5d3bc3
IZ		 3215 case 0x106b0600:
3216 case 0x106b0700:
3217 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 3218 break;
5d5d3bc3
IZ		 3219 case 0x106b0e00:
3220 case 0x106b0f00:
3221 case 0x106b1600:
3222 case 0x106b1700:
3223 case 0x106b0200:
3224 case 0x106b1e00:
3225 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 3226 break;
5d5d3bc3
IZ		 3227 case 0x106b1a00:
3228 case 0x00000100:
3229 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 3230 break;
5d5d3bc3
IZ		 3231 case 0x106b0a00:
3232 case 0x106b2200:
3233 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 3234 break;
3fc24d85
TI		 3235 }
3236 }
3237
9e507abd 3238 again:
11b44bbd
RF		 3239 if (spec->board_config < 0) {
3240 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3241 "using BIOS defaults\n");
3242 err = stac92xx_save_bios_config_regs(codec);
3243 if (err < 0) {
3244 stac92xx_free(codec);
3245 return err;
3246 }
3247 spec->pin_configs = spec->bios_pin_configs;
3248 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 3249 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3250 stac92xx_set_config_regs(codec);
3251 }
2f2f4251 3252
c7d4b2fa
M		 3253 spec->adc_nids = stac922x_adc_nids;
3254 spec->mux_nids = stac922x_mux_nids;
2549413e 3255 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 3256 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 3257 spec->num_dmics = 0;
c7d4b2fa
M		 3258
3259 spec->init = stac922x_core_init;
2f2f4251 3260 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 3261
3262 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 3263
3cc08dc6 3264 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 3265 if (!err) {
3266 if (spec->board_config < 0) {
3267 printk(KERN_WARNING "hda_codec: No auto-config is "
3268 "available, default to model=ref\n");
3269 spec->board_config = STAC_D945_REF;
3270 goto again;
3271 }
3272 err = -EINVAL;
3273 }
3cc08dc6
MP		 3274 if (err < 0) {
3275 stac92xx_free(codec);
3276 return err;
3277 }
3278
3279 codec->patch_ops = stac92xx_patch_ops;
3280
807a4636
TI		 3281 /* Fix Mux capture level; max to 2 */
3282 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3283 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3284 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3285 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3286 (0 << AC_AMPCAP_MUTE_SHIFT));
3287
3cc08dc6
MP		 3288 return 0;
3289}
3290
3291static int patch_stac927x(struct hda_codec *codec)
3292{
3293 struct sigmatel_spec *spec;
3294 int err;
3295
3296 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3297 if (spec == NULL)
3298 return -ENOMEM;
3299
3300 codec->spec = spec;
a4eed138 3301 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 3302 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 3303 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3304 stac927x_models,
3305 stac927x_cfg_tbl);
9e507abd 3306 again:
8e9068b1
MR		 3307 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3308 if (spec->board_config < 0)
3309 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3310 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 3311 err = stac92xx_save_bios_config_regs(codec);
3312 if (err < 0) {
3313 stac92xx_free(codec);
3314 return err;
3315 }
3316 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 3317 } else {
3cc08dc6
MP		 3318 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3319 stac92xx_set_config_regs(codec);
3320 }
3321
8e9068b1
MR		 3322 spec->adc_nids = stac927x_adc_nids;
3323 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3324 spec->mux_nids = stac927x_mux_nids;
3325 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3326 spec->multiout.dac_nids = spec->dac_nids;
3327
81d3dbde 3328 switch (spec->board_config) {
93ed1503 3329 case STAC_D965_3ST:
93ed1503 3330 case STAC_D965_5ST:
8e9068b1
MR		 3331 /* GPIO0 High = Enable EAPD */
3332 spec->gpio_mask = spec->gpio_data = 0x00000001;
3333 spec->num_dmics = 0;
3334
93ed1503 3335 spec->init = d965_core_init;
9e05b7a3 3336 spec->mixer = stac927x_mixer;
81d3dbde 3337 break;
8e9068b1
MR		 3338 case STAC_DELL_BIOS:
3339 case STAC_DELL_3ST:
3340 /* GPIO2 High = Enable EAPD */
3341 spec->gpio_mask = spec->gpio_data = 0x00000004;
7f16859a
MR		 3342 spec->dmic_nids = stac927x_dmic_nids;
3343 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 3344
8e9068b1
MR		 3345 spec->init = d965_core_init;
3346 spec->mixer = stac927x_mixer;
3347 spec->dmux_nids = stac927x_dmux_nids;
7f16859a
MR		 3348 break;
3349 default:
f1f208d0
MR		 3350 /* GPIO0 High = Enable EAPD */
3351 spec->gpio_mask = spec->gpio_data = 0x00000001;
8e9068b1
MR		 3352 spec->num_dmics = 0;
3353
3354 spec->init = stac927x_core_init;
3355 spec->mixer = stac927x_mixer;
7f16859a
MR		 3356 }
3357
e1f0d669
MR		 3358 spec->aloopback_mask = 0x40;
3359 spec->aloopback_shift = 0;
8e9068b1 3360
8259980e 3361 stac92xx_enable_gpio_mask(codec);
3cc08dc6 3362 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 3363 if (!err) {
3364 if (spec->board_config < 0) {
3365 printk(KERN_WARNING "hda_codec: No auto-config is "
3366 "available, default to model=ref\n");
3367 spec->board_config = STAC_D965_REF;
3368 goto again;
3369 }
3370 err = -EINVAL;
3371 }
c7d4b2fa
M		 3372 if (err < 0) {
3373 stac92xx_free(codec);
3374 return err;
3375 }
2f2f4251
M		 3376
3377 codec->patch_ops = stac92xx_patch_ops;
3378
3379 return 0;
3380}
3381
f3302a59
MP		 3382static int patch_stac9205(struct hda_codec *codec)
3383{
3384 struct sigmatel_spec *spec;
8259980e 3385 int err;
f3302a59
MP		 3386
3387 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3388 if (spec == NULL)
3389 return -ENOMEM;
3390
3391 codec->spec = spec;
a4eed138 3392 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 3393 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 3394 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3395 stac9205_models,
3396 stac9205_cfg_tbl);
9e507abd 3397 again:
11b44bbd
RF		 3398 if (spec->board_config < 0) {
3399 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3400 err = stac92xx_save_bios_config_regs(codec);
3401 if (err < 0) {
3402 stac92xx_free(codec);
3403 return err;
3404 }
3405 spec->pin_configs = spec->bios_pin_configs;
3406 } else {
f3302a59
MP		 3407 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3408 stac92xx_set_config_regs(codec);
3409 }
3410
3411 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 3412 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 3413 spec->mux_nids = stac9205_mux_nids;
2549413e 3414 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
8b65727b 3415 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 3416 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 3417 spec->dmux_nids = stac9205_dmux_nids;
f3302a59
MP		 3418
3419 spec->init = stac9205_core_init;
3420 spec->mixer = stac9205_mixer;
3421
e1f0d669
MR		 3422 spec->aloopback_mask = 0x40;
3423 spec->aloopback_shift = 0;
f3302a59 3424 spec->multiout.dac_nids = spec->dac_nids;
87d48363 3425
ae0a8ed8 3426 switch (spec->board_config){
ae0a8ed8 3427 case STAC_9205_DELL_M43:
87d48363
MR		 3428 /* Enable SPDIF in/out */
3429 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
3430 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
3431
8259980e 3432 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
87d48363
MR		 3433 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
3434 * GPIO2 High = Headphone Mute
3435 */
8259980e 3436 spec->gpio_data = 0x00000005;
ae0a8ed8
TD		 3437 break;
3438 default:
3439 /* GPIO0 High = EAPD */
3440 spec->gpio_mask = spec->gpio_data = 0x00000001;
3441 break;
3442 }
33382403 3443
8259980e 3444 stac92xx_enable_gpio_mask(codec);
f3302a59 3445 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 3446 if (!err) {
3447 if (spec->board_config < 0) {
3448 printk(KERN_WARNING "hda_codec: No auto-config is "
3449 "available, default to model=ref\n");
3450 spec->board_config = STAC_9205_REF;
3451 goto again;
3452 }
3453 err = -EINVAL;
3454 }
f3302a59
MP		 3455 if (err < 0) {
3456 stac92xx_free(codec);
3457 return err;
3458 }
3459
3460 codec->patch_ops = stac92xx_patch_ops;
3461
3462 return 0;
3463}
3464
db064e50 3465/*
6d859065 3466 * STAC9872 hack
db064e50
TI		 3467 */
3468
99ccc560 3469/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 3470static hda_nid_t vaio_dacs[] = { 0x2 };
3471#define VAIO_HP_DAC 0x5
3472static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
3473static hda_nid_t vaio_mux_nids[] = { 0x15 };
3474
3475static struct hda_input_mux vaio_mux = {
a3a2f429 3476 .num_items = 3,
db064e50 3477 .items = {
d773781c 3478 /* { "HP", 0x0 }, */
1624cb9a
TI		 3479 { "Mic Jack", 0x1 },
3480 { "Internal Mic", 0x2 },
db064e50
TI		 3481 { "PCM", 0x3 },
3482 }
3483};
3484
3485static struct hda_verb vaio_init[] = {
3486 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 3487 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 3488 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3489 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3490 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3491 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3492 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 3493 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3494 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3495 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3496 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3497 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3498 {}
3499};
3500
6d859065
GM		 3501static struct hda_verb vaio_ar_init[] = {
3502 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
3503 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
3504 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
3505 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
3506/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
3507 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 3508 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 3509 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
3510 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
3511/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
3512 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
3513 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
3514 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
3515 {}
3516};
3517
db064e50 3518/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3519static struct hda_bind_ctls vaio_bind_master_vol = {
3520 .ops = &snd_hda_bind_vol,
3521 .values = {
3522 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3523 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3524 0
3525 },
3526};
db064e50
TI		 3527
3528/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 3529static struct hda_bind_ctls vaio_bind_master_sw = {
3530 .ops = &snd_hda_bind_sw,
3531 .values = {
3532 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
3533 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
3534 0,
3535 },
3536};
db064e50
TI		 3537
3538static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 3539 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3540 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 3541 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3542 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3543 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3544 {
3545 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3546 .name = "Capture Source",
3547 .count = 1,
3548 .info = stac92xx_mux_enum_info,
3549 .get = stac92xx_mux_enum_get,
3550 .put = stac92xx_mux_enum_put,
3551 },
3552 {}
3553};
3554
6d859065 3555static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 3556 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
3557 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 3558 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
3559 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
3560 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
3561 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
3562 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
3563 {
3564 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3565 .name = "Capture Source",
3566 .count = 1,
3567 .info = stac92xx_mux_enum_info,
3568 .get = stac92xx_mux_enum_get,
3569 .put = stac92xx_mux_enum_put,
3570 },
3571 {}
3572};
3573
3574static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 3575 .build_controls = stac92xx_build_controls,
3576 .build_pcms = stac92xx_build_pcms,
3577 .init = stac92xx_init,
3578 .free = stac92xx_free,
cb53c626 3579#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 3580 .resume = stac92xx_resume,
3581#endif
3582};
3583
72e7b0dd
TI		 3584static int stac9872_vaio_init(struct hda_codec *codec)
3585{
3586 int err;
3587
3588 err = stac92xx_init(codec);
3589 if (err < 0)
3590 return err;
3591 if (codec->patch_ops.unsol_event)
3592 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3593 return 0;
3594}
3595
3596static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3597{
40c1d308 3598 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 3599 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3600 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3601 } else {
3602 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3603 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3604 }
3605}
3606
3607static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3608{
3609 switch (res >> 26) {
3610 case STAC_HP_EVENT:
3611 stac9872_vaio_hp_detect(codec, res);
3612 break;
3613 }
3614}
3615
3616static struct hda_codec_ops stac9872_vaio_patch_ops = {
3617 .build_controls = stac92xx_build_controls,
3618 .build_pcms = stac92xx_build_pcms,
3619 .init = stac9872_vaio_init,
3620 .free = stac92xx_free,
3621 .unsol_event = stac9872_vaio_unsol_event,
3622#ifdef CONFIG_PM
3623 .resume = stac92xx_resume,
3624#endif
3625};
3626
6d859065
GM		 3627enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
3628 CXD9872RD_VAIO,
3629 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
3630 STAC9872AK_VAIO,
3631 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
3632 STAC9872K_VAIO,
3633 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 3634 CXD9872AKD_VAIO,
3635 STAC_9872_MODELS,
3636};
3637
3638static const char *stac9872_models[STAC_9872_MODELS] = {
3639 [CXD9872RD_VAIO] = "vaio",
3640 [CXD9872AKD_VAIO] = "vaio-ar",
3641};
3642
3643static struct snd_pci_quirk stac9872_cfg_tbl[] = {
3644 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
3645 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
3646 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 3647 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 3648 {}
3649};
3650
6d859065 3651static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 3652{
3653 struct sigmatel_spec *spec;
3654 int board_config;
3655
f5fcc13c
TI		 3656 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
3657 stac9872_models,
3658 stac9872_cfg_tbl);
db064e50
TI		 3659 if (board_config < 0)
3660 /* unknown config, let generic-parser do its job... */
3661 return snd_hda_parse_generic_codec(codec);
3662
3663 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3664 if (spec == NULL)
3665 return -ENOMEM;
3666
3667 codec->spec = spec;
3668 switch (board_config) {
6d859065
GM		 3669 case CXD9872RD_VAIO:
3670 case STAC9872AK_VAIO:
3671 case STAC9872K_VAIO:
db064e50
TI		 3672 spec->mixer = vaio_mixer;
3673 spec->init = vaio_init;
3674 spec->multiout.max_channels = 2;
3675 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3676 spec->multiout.dac_nids = vaio_dacs;
3677 spec->multiout.hp_nid = VAIO_HP_DAC;
3678 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3679 spec->adc_nids = vaio_adcs;
3680 spec->input_mux = &vaio_mux;
3681 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3682 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 3683 break;
6d859065
GM		 3684
3685 case CXD9872AKD_VAIO:
3686 spec->mixer = vaio_ar_mixer;
3687 spec->init = vaio_ar_init;
3688 spec->multiout.max_channels = 2;
3689 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
3690 spec->multiout.dac_nids = vaio_dacs;
3691 spec->multiout.hp_nid = VAIO_HP_DAC;
3692 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
3693 spec->adc_nids = vaio_adcs;
3694 spec->input_mux = &vaio_mux;
3695 spec->mux_nids = vaio_mux_nids;
72e7b0dd 3696 codec->patch_ops = stac9872_patch_ops;
6d859065 3697 break;
db064e50
TI		 3698 }
3699
db064e50
TI		 3700 return 0;
3701}
3702
3703
2f2f4251
M		 3704/*
3705 * patch entries
3706 */
3707struct hda_codec_preset snd_hda_preset_sigmatel[] = {
3708 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
3709 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
3710 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
3711 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
3712 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
3713 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
3714 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 3715 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
3716 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
3717 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
3718 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
3719 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
3720 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 3721 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
3722 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
3723 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
3724 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
3725 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
3726 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
3727 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
3728 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
3729 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
3730 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 3731 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
3732 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
3733 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
3734 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
3735 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
3736 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
6d859065
GM		 3737 /* The following does not take into account .id=0x83847661 when subsys =
3738 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
3739 * currently not fully supported.
3740 */
3741 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
3742 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
3743 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 3744 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
3745 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
3746 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
3747 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
3748 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
3749 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
3750 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
3751 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
541eee87
MR		 3752 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
3753 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 3754 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 3755 { .id = 0x111d7608, .name = "92HD71BXX", .patch = patch_stac92hd71bxx },
3756 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3757 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
3758 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3759 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
3760 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3761 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
3762 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
3763 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 3764 {} /* terminator */
3765};
Linux kernel - Deliverables
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