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ALSA: hda/realtek - Fix auto-mute with HP+LO configuration
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
2f2f4251 32#include <sound/core.h>
c7d4b2fa 33#include <sound/asoundef.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
2f2f4251
M		 36#include "hda_codec.h"
37#include "hda_local.h"
1cd2224c 38#include "hda_beep.h"
2f2f4251 39
c6e4c666
TI		 40enum {
41 STAC_VREF_EVENT = 1,
42 STAC_INSERT_EVENT,
43 STAC_PWR_EVENT,
44 STAC_HP_EVENT,
fefd67f3 45 STAC_LO_EVENT,
3d21d3f7 46 STAC_MIC_EVENT,
c6e4c666 47};
4e55096e 48
f5fcc13c 49enum {
1607b8ea 50 STAC_AUTO,
f5fcc13c 51 STAC_REF,
bf277785 52 STAC_9200_OQO,
dfe495d0
TI		 53 STAC_9200_DELL_D21,
54 STAC_9200_DELL_D22,
55 STAC_9200_DELL_D23,
56 STAC_9200_DELL_M21,
57 STAC_9200_DELL_M22,
58 STAC_9200_DELL_M23,
59 STAC_9200_DELL_M24,
60 STAC_9200_DELL_M25,
61 STAC_9200_DELL_M26,
62 STAC_9200_DELL_M27,
58eec423
MCC		 63 STAC_9200_M4,
64 STAC_9200_M4_2,
117f257d 65 STAC_9200_PANASONIC,
f5fcc13c
TI		 66 STAC_9200_MODELS
67};
68
69enum {
1607b8ea 70 STAC_9205_AUTO,
f5fcc13c 71 STAC_9205_REF,
dfe495d0 72 STAC_9205_DELL_M42,
ae0a8ed8
TD		 73 STAC_9205_DELL_M43,
74 STAC_9205_DELL_M44,
d9a4268e 75 STAC_9205_EAPD,
f5fcc13c
TI		 76 STAC_9205_MODELS
77};
78
e1f0d669 79enum {
1607b8ea 80 STAC_92HD73XX_AUTO,
9e43f0de 81 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 82 STAC_92HD73XX_REF,
ae709440 83 STAC_92HD73XX_INTEL,
661cd8fb
TI		 84 STAC_DELL_M6_AMIC,
85 STAC_DELL_M6_DMIC,
86 STAC_DELL_M6_BOTH,
6b3ab21e 87 STAC_DELL_EQ,
842ae638 88 STAC_ALIENWARE_M17X,
e1f0d669
MR		 89 STAC_92HD73XX_MODELS
90};
91
d0513fc6 92enum {
1607b8ea 93 STAC_92HD83XXX_AUTO,
d0513fc6 94 STAC_92HD83XXX_REF,
32ed3f46 95 STAC_92HD83XXX_PWR_REF,
8bb0ac55 96 STAC_DELL_S14,
b4e81876 97 STAC_92HD83XXX_HP,
0c27c180 98 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 99 STAC_HP_DV7_4000,
d0513fc6
MR		 100 STAC_92HD83XXX_MODELS
101};
102
e035b841 103enum {
1607b8ea 104 STAC_92HD71BXX_AUTO,
e035b841 105 STAC_92HD71BXX_REF,
a7662640
MR		 106 STAC_DELL_M4_1,
107 STAC_DELL_M4_2,
3a7abfd2 108 STAC_DELL_M4_3,
6a14f585 109 STAC_HP_M4,
2a6ce6e5 110 STAC_HP_DV4,
1b0652eb 111 STAC_HP_DV5,
ae6241fb 112 STAC_HP_HDX,
514bf54c 113 STAC_HP_DV4_1222NR,
e035b841
MR		 114 STAC_92HD71BXX_MODELS
115};
116
8e21c34c 117enum {
1607b8ea 118 STAC_925x_AUTO,
8e21c34c 119 STAC_925x_REF,
9cb36c2a
MCC		 120 STAC_M1,
121 STAC_M1_2,
122 STAC_M2,
8e21c34c 123 STAC_M2_2,
9cb36c2a
MCC		 124 STAC_M3,
125 STAC_M5,
126 STAC_M6,
8e21c34c
TD		 127 STAC_925x_MODELS
128};
129
f5fcc13c 130enum {
1607b8ea 131 STAC_922X_AUTO,
f5fcc13c
TI		 132 STAC_D945_REF,
133 STAC_D945GTP3,
134 STAC_D945GTP5,
5d5d3bc3
IZ		 135 STAC_INTEL_MAC_V1,
136 STAC_INTEL_MAC_V2,
137 STAC_INTEL_MAC_V3,
138 STAC_INTEL_MAC_V4,
139 STAC_INTEL_MAC_V5,
536319af
NB		 140 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
141 * is given, one of the above models will be
142 * chosen according to the subsystem id. */
dfe495d0 143 /* for backward compatibility */
f5fcc13c 144 STAC_MACMINI,
3fc24d85 145 STAC_MACBOOK,
6f0778d8
NB		 146 STAC_MACBOOK_PRO_V1,
147 STAC_MACBOOK_PRO_V2,
f16928fb 148 STAC_IMAC_INTEL,
0dae0f83 149 STAC_IMAC_INTEL_20,
8c650087 150 STAC_ECS_202,
dfe495d0
TI		 151 STAC_922X_DELL_D81,
152 STAC_922X_DELL_D82,
153 STAC_922X_DELL_M81,
154 STAC_922X_DELL_M82,
f5fcc13c
TI		 155 STAC_922X_MODELS
156};
157
158enum {
1607b8ea 159 STAC_927X_AUTO,
e28d8322 160 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 161 STAC_D965_REF,
162 STAC_D965_3ST,
163 STAC_D965_5ST,
679d92ed 164 STAC_D965_5ST_NO_FP,
4ff076e5 165 STAC_DELL_3ST,
8e9068b1 166 STAC_DELL_BIOS,
54930531 167 STAC_927X_VOLKNOB,
f5fcc13c
TI		 168 STAC_927X_MODELS
169};
403d1944 170
307282c8
TI		 171enum {
172 STAC_9872_AUTO,
173 STAC_9872_VAIO,
174 STAC_9872_MODELS
175};
176
74aeaabc
MR		 177struct sigmatel_event {
178 hda_nid_t nid;
c6e4c666
TI		 179 unsigned char type;
180 unsigned char tag;
74aeaabc
MR		 181 int data;
182};
183
3d21d3f7
TI		 184struct sigmatel_mic_route {
185 hda_nid_t pin;
02d33322
TI		 186 signed char mux_idx;
187 signed char dmux_idx;
3d21d3f7
TI		 188};
189
699d8995
VK		 190#define MAX_PINS_NUM 16
191#define MAX_ADCS_NUM 4
192#define MAX_DMICS_NUM 4
193
2f2f4251 194struct sigmatel_spec {
c8b6bf9b 195 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 196 unsigned int num_mixers;
197
403d1944 198 int board_config;
c0cea0d0 199 unsigned int eapd_switch: 1;
c7d4b2fa 200 unsigned int surr_switch: 1;
3cc08dc6 201 unsigned int alt_switch: 1;
82bc955f 202 unsigned int hp_detect: 1;
00ef50c2 203 unsigned int spdif_mute: 1;
7c7767eb 204 unsigned int check_volume_offset:1;
3d21d3f7 205 unsigned int auto_mic:1;
1b0e372d 206 unsigned int linear_tone_beep:1;
c7d4b2fa 207
4fe5195c 208 /* gpio lines */
0fc9dec4 209 unsigned int eapd_mask;
4fe5195c
MR		 210 unsigned int gpio_mask;
211 unsigned int gpio_dir;
212 unsigned int gpio_data;
213 unsigned int gpio_mute;
86d190e7 214 unsigned int gpio_led;
c357aab0 215 unsigned int gpio_led_polarity;
45eebda7 216 unsigned int vref_led;
4fe5195c 217
8daaaa97
MR		 218 /* stream */
219 unsigned int stream_delay;
220
4fe5195c 221 /* analog loopback */
2b63536f 222 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR		 223 unsigned char aloopback_mask;
224 unsigned char aloopback_shift;
8259980e 225
a64135a2
MR		 226 /* power management */
227 unsigned int num_pwrs;
2b63536f
TI		 228 const unsigned int *pwr_mapping;
229 const hda_nid_t *pwr_nids;
230 const hda_nid_t *dac_list;
a64135a2 231
74aeaabc
MR		 232 /* events */
233 struct snd_array events;
234
2f2f4251 235 /* playback */
b22b4821
MR		 236 struct hda_input_mux *mono_mux;
237 unsigned int cur_mmux;
2f2f4251 238 struct hda_multi_out multiout;
3cc08dc6 239 hda_nid_t dac_nids[5];
c21ca4a8
TI		 240 hda_nid_t hp_dacs[5];
241 hda_nid_t speaker_dacs[5];
2f2f4251 242
7c7767eb
TI		 243 int volume_offset;
244
2f2f4251 245 /* capture */
2b63536f 246 const hda_nid_t *adc_nids;
2f2f4251 247 unsigned int num_adcs;
2b63536f 248 const hda_nid_t *mux_nids;
dabbed6f 249 unsigned int num_muxes;
2b63536f 250 const hda_nid_t *dmic_nids;
8b65727b 251 unsigned int num_dmics;
2b63536f 252 const hda_nid_t *dmux_nids;
1697055e 253 unsigned int num_dmuxes;
2b63536f 254 const hda_nid_t *smux_nids;
d9737751 255 unsigned int num_smuxes;
5207e10e 256 unsigned int num_analog_muxes;
6479c631 257
2b63536f
TI		 258 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
259 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI		 260 unsigned int num_caps; /* number of capture volume/switch elements */
261
3d21d3f7
TI		 262 struct sigmatel_mic_route ext_mic;
263 struct sigmatel_mic_route int_mic;
9907790a 264 struct sigmatel_mic_route dock_mic;
3d21d3f7 265
ea734963 266 const char * const *spdif_labels;
d9737751 267
dabbed6f 268 hda_nid_t dig_in_nid;
b22b4821 269 hda_nid_t mono_nid;
1cd2224c
MR		 270 hda_nid_t anabeep_nid;
271 hda_nid_t digbeep_nid;
2f2f4251 272
2f2f4251 273 /* pin widgets */
2b63536f 274 const hda_nid_t *pin_nids;
2f2f4251 275 unsigned int num_pins;
2f2f4251
M		 276
277 /* codec specific stuff */
2b63536f
TI		 278 const struct hda_verb *init;
279 const struct snd_kcontrol_new *mixer;
2f2f4251
M		 280
281 /* capture source */
8b65727b 282 struct hda_input_mux *dinput_mux;
e1f0d669 283 unsigned int cur_dmux[2];
c7d4b2fa 284 struct hda_input_mux *input_mux;
3cc08dc6 285 unsigned int cur_mux[3];
d9737751
MR		 286 struct hda_input_mux *sinput_mux;
287 unsigned int cur_smux[2];
2a9c7816
MR		 288 unsigned int cur_amux;
289 hda_nid_t *amp_nids;
8daaaa97 290 unsigned int powerdown_adcs;
2f2f4251 291
403d1944
MP		 292 /* i/o switches */
293 unsigned int io_switch[2];
0fb87bb4 294 unsigned int clfe_swap;
c21ca4a8
TI		 295 hda_nid_t line_switch; /* shared line-in for input and output */
296 hda_nid_t mic_switch; /* shared mic-in for input and output */
297 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 298 unsigned int aloopback;
2f2f4251 299
c7d4b2fa
M		 300 struct hda_pcm pcm_rec[2]; /* PCM information */
301
302 /* dynamic controls and input_mux */
303 struct auto_pin_cfg autocfg;
603c4019 304 struct snd_array kctls;
8b65727b 305 struct hda_input_mux private_dimux;
c7d4b2fa 306 struct hda_input_mux private_imux;
d9737751 307 struct hda_input_mux private_smux;
b22b4821 308 struct hda_input_mux private_mono_mux;
699d8995
VK		 309
310 /* auto spec */
311 unsigned auto_pin_cnt;
312 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
313 unsigned auto_adc_cnt;
314 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
315 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
316 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
317 unsigned long auto_capvols[MAX_ADCS_NUM];
318 unsigned auto_dmic_cnt;
319 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2f2f4251
M		 320};
321
2b63536f 322static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M		 323 0x03,
324};
325
2b63536f 326static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M		 327 0x0c,
328};
329
2b63536f 330static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M		 331 0x02,
332};
333
2b63536f 334static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 335 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
336 0x0f, 0x10, 0x11
337};
338
2b63536f 339static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR		 340 0x26, 0,
341};
342
2b63536f 343static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR		 344 0x1a, 0x1b
345};
346
347#define STAC92HD73XX_NUM_DMICS 2
2b63536f 348static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR		 349 0x13, 0x14, 0
350};
351
352#define STAC92HD73_DAC_COUNT 5
e1f0d669 353
2b63536f 354static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 355 0x20, 0x21,
e1f0d669
MR		 356};
357
2b63536f 358static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR		 359 0x20, 0x21,
360};
361
2b63536f 362static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR		 363 0x22, 0x23,
364};
365
6479c631 366#define STAC92HD73XX_NUM_CAPS 2
2b63536f 367static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI		 368 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
369 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
370};
371#define stac92hd73xx_capsws stac92hd73xx_capvols
372
d0513fc6 373#define STAC92HD83_DAC_COUNT 3
d0513fc6 374
2b63536f 375static const hda_nid_t stac92hd83xxx_pwr_nids[4] = {
d0513fc6
MR		 376 0xa, 0xb, 0xd, 0xe,
377};
378
2b63536f 379static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR		 380 0x1e, 0,
381};
382
2b63536f 383static const unsigned int stac92hd83xxx_pwr_mapping[4] = {
87e88a74 384 0x03, 0x0c, 0x20, 0x40,
d0513fc6
MR		 385};
386
2b63536f 387static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 388 0x11, 0x20,
ab5a6ebe
VK		 389};
390
2b63536f 391static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 392 0x0a, 0x0d, 0x0f
393};
394
2b63536f 395static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR		 396 0x12, 0x13,
397};
398
2b63536f 399static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR		 400 0x1a, 0x1b
401};
402
2b63536f 403static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 404 0x1c, 0x1d,
e1f0d669
MR		 405};
406
2b63536f 407static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR		 408 0x24, 0x25,
409};
410
e035b841 411#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 412static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR		 413 0x18, 0x19, 0
414};
415
2b63536f
TI		 416static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
417 0x18, 0
418};
419
420static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR		 421 0x22, 0
422};
423
6479c631 424#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 425static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI		 426 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
427 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
428};
429#define stac92hd71bxx_capsws stac92hd71bxx_capvols
430
2b63536f 431static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD		 432 0x03,
433};
434
2b63536f 435static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD		 436 0x0f,
437};
438
2b63536f 439static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD		 440 0x02,
441};
442
f6e9852a 443#define STAC925X_NUM_DMICS 1
2b63536f 444static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 445 0x15, 0
2c11f955
TD		 446};
447
2b63536f 448static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI		 449 0x14,
450};
451
2b63536f 452static const unsigned long stac925x_capvols[] = {
6479c631
TI		 453 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
454};
2b63536f 455static const unsigned long stac925x_capsws[] = {
6479c631
TI		 456 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
457};
458
2b63536f 459static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M		 460 0x06, 0x07,
461};
462
2b63536f 463static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M		 464 0x12, 0x13,
465};
466
6479c631 467#define STAC922X_NUM_CAPS 2
2b63536f 468static const unsigned long stac922x_capvols[] = {
6479c631
TI		 469 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
470 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
471};
472#define stac922x_capsws stac922x_capvols
473
2b63536f 474static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR		 475 0x1f, 0,
476};
477
2b63536f 478static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP		 479 0x07, 0x08, 0x09
480};
481
2b63536f 482static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP		 483 0x15, 0x16, 0x17
484};
485
2b63536f 486static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR		 487 0x21,
488};
489
2b63536f 490static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR		 491 0x02, 0x03, 0x04, 0x05, 0x06, 0
492};
493
2b63536f 494static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR		 495 0x1b,
496};
497
7f16859a 498#define STAC927X_NUM_DMICS 2
2b63536f 499static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR		 500 0x13, 0x14, 0
501};
502
6479c631 503#define STAC927X_NUM_CAPS 3
2b63536f 504static const unsigned long stac927x_capvols[] = {
6479c631
TI		 505 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
506 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
507 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
508};
2b63536f 509static const unsigned long stac927x_capsws[] = {
6479c631
TI		 510 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
511 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
512 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
513};
514
ea734963 515static const char * const stac927x_spdif_labels[5] = {
65973632
MR		 516 "Digital Playback", "ADAT", "Analog Mux 1",
517 "Analog Mux 2", "Analog Mux 3"
518};
519
2b63536f 520static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP		 521 0x12, 0x13
522};
523
2b63536f 524static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP		 525 0x19, 0x1a
526};
527
2b63536f 528static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 529 0x1d,
e1f0d669
MR		 530};
531
2b63536f 532static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR		 533 0x21,
534};
535
f6e9852a 536#define STAC9205_NUM_DMICS 2
2b63536f 537static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 538 0x17, 0x18, 0
8b65727b
MP		 539};
540
6479c631 541#define STAC9205_NUM_CAPS 2
2b63536f 542static const unsigned long stac9205_capvols[] = {
6479c631
TI		 543 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
544 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
545};
2b63536f 546static const unsigned long stac9205_capsws[] = {
6479c631
TI		 547 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
548 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
549};
550
2b63536f 551static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 552 0x08, 0x09, 0x0d, 0x0e,
553 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 554};
555
2b63536f 556static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD		 557 0x07, 0x08, 0x0a, 0x0b,
558 0x0c, 0x0d, 0x10, 0x11,
559};
560
2b63536f 561static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M		 562 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
563 0x0f, 0x10, 0x11, 0x15, 0x1b,
564};
565
2b63536f 566static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 567 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
568 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 569 0x14, 0x22, 0x23
e1f0d669
MR		 570};
571
616f89e7 572#define STAC92HD71BXX_NUM_PINS 13
2b63536f 573static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK		 574 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
575 0x00, 0x14, 0x18, 0x19, 0x1e,
576 0x1f, 0x20, 0x27
577};
2b63536f 578static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR		 579 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
580 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 581 0x1f, 0x20, 0x27
e035b841
MR		 582};
583
2b63536f 584static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP		 585 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
586 0x0f, 0x10, 0x11, 0x12, 0x13,
587 0x14, 0x21, 0x22, 0x23,
588};
589
2b63536f 590static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP		 591 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
592 0x0f, 0x14, 0x16, 0x17, 0x18,
593 0x21, 0x22,
f3302a59
MP		 594};
595
8b65727b
MP		 596static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
597 struct snd_ctl_elem_info *uinfo)
598{
599 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
600 struct sigmatel_spec *spec = codec->spec;
601 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
602}
603
604static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
605 struct snd_ctl_elem_value *ucontrol)
606{
607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
608 struct sigmatel_spec *spec = codec->spec;
e1f0d669 609 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 610
e1f0d669 611 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 612 return 0;
613}
614
615static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_value *ucontrol)
617{
618 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
619 struct sigmatel_spec *spec = codec->spec;
e1f0d669 620 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 621
622 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 623 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 624}
625
d9737751
MR		 626static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
627 struct snd_ctl_elem_info *uinfo)
628{
629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
630 struct sigmatel_spec *spec = codec->spec;
631 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
632}
633
634static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_value *ucontrol)
636{
637 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
638 struct sigmatel_spec *spec = codec->spec;
639 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
640
641 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
642 return 0;
643}
644
645static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
646 struct snd_ctl_elem_value *ucontrol)
647{
648 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
649 struct sigmatel_spec *spec = codec->spec;
00ef50c2 650 struct hda_input_mux *smux = &spec->private_smux;
d9737751 651 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 652 int err, val;
653 hda_nid_t nid;
d9737751 654
00ef50c2 655 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 656 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 657 if (err < 0)
658 return err;
659
660 if (spec->spdif_mute) {
661 if (smux_idx == 0)
662 nid = spec->multiout.dig_out_nid;
663 else
664 nid = codec->slave_dig_outs[smux_idx - 1];
665 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 666 val = HDA_AMP_MUTE;
00ef50c2 667 else
c9b46f91 668 val = 0;
00ef50c2 669 /* un/mute SPDIF out */
c9b46f91
TI		 670 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
671 HDA_AMP_MUTE, val);
00ef50c2
MR		 672 }
673 return 0;
d9737751
MR		 674}
675
96b63597 676#ifdef CONFIG_SND_HDA_POWER_SAVE
45eebda7
VK		 677static int stac_vrefout_set(struct hda_codec *codec,
678 hda_nid_t nid, unsigned int new_vref)
679{
680 int error, pinctl;
681
682 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
683 pinctl = snd_hda_codec_read(codec, nid, 0,
684 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
685
686 if (pinctl < 0)
687 return pinctl;
688
689 pinctl &= 0xff;
690 pinctl &= ~AC_PINCTL_VREFEN;
691 pinctl |= (new_vref & AC_PINCTL_VREFEN);
692
693 error = snd_hda_codec_write_cache(codec, nid, 0,
694 AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl);
695 if (error < 0)
696 return error;
697
698 return 1;
699}
96b63597 700#endif
45eebda7 701
2fc99890
NL		 702static unsigned int stac92xx_vref_set(struct hda_codec *codec,
703 hda_nid_t nid, unsigned int new_vref)
704{
b8621516 705 int error;
2fc99890
NL		 706 unsigned int pincfg;
707 pincfg = snd_hda_codec_read(codec, nid, 0,
708 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
709
710 pincfg &= 0xff;
711 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
712 pincfg |= new_vref;
713
714 if (new_vref == AC_PINCTL_VREF_HIZ)
715 pincfg |= AC_PINCTL_OUT_EN;
716 else
717 pincfg |= AC_PINCTL_IN_EN;
718
719 error = snd_hda_codec_write_cache(codec, nid, 0,
720 AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
721 if (error < 0)
722 return error;
723 else
724 return 1;
725}
726
727static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
728{
729 unsigned int vref;
730 vref = snd_hda_codec_read(codec, nid, 0,
731 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
732 vref &= AC_PINCTL_VREFEN;
733 return vref;
734}
735
c8b6bf9b 736static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 737{
738 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
739 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 740 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 741}
742
c8b6bf9b 743static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 744{
745 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
746 struct sigmatel_spec *spec = codec->spec;
747 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
748
749 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
750 return 0;
751}
752
c8b6bf9b 753static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 754{
755 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
756 struct sigmatel_spec *spec = codec->spec;
757 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 758 const struct hda_input_mux *imux = spec->input_mux;
094a4245 759 unsigned int idx, prev_idx, didx;
5207e10e
TI		 760
761 idx = ucontrol->value.enumerated.item[0];
762 if (idx >= imux->num_items)
763 idx = imux->num_items - 1;
764 prev_idx = spec->cur_mux[adc_idx];
765 if (prev_idx == idx)
766 return 0;
767 if (idx < spec->num_analog_muxes) {
768 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
769 AC_VERB_SET_CONNECT_SEL,
770 imux->items[idx].index);
094a4245
VK		 771 if (prev_idx >= spec->num_analog_muxes &&
772 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI		 773 imux = spec->dinput_mux;
774 /* 0 = analog */
775 snd_hda_codec_write_cache(codec,
776 spec->dmux_nids[adc_idx], 0,
777 AC_VERB_SET_CONNECT_SEL,
778 imux->items[0].index);
779 }
780 } else {
781 imux = spec->dinput_mux;
094a4245
VK		 782 /* first dimux item is hardcoded to select analog imux,
783 * so lets skip it
784 */
785 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI		 786 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
787 AC_VERB_SET_CONNECT_SEL,
094a4245 788 imux->items[didx].index);
5207e10e
TI		 789 }
790 spec->cur_mux[adc_idx] = idx;
791 return 1;
2f2f4251
M		 792}
793
b22b4821
MR		 794static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
795 struct snd_ctl_elem_info *uinfo)
796{
797 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
798 struct sigmatel_spec *spec = codec->spec;
799 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
800}
801
802static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
803 struct snd_ctl_elem_value *ucontrol)
804{
805 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
806 struct sigmatel_spec *spec = codec->spec;
807
808 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
809 return 0;
810}
811
812static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
813 struct snd_ctl_elem_value *ucontrol)
814{
815 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
816 struct sigmatel_spec *spec = codec->spec;
817
818 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
819 spec->mono_nid, &spec->cur_mmux);
820}
821
5f10c4a9
ML		 822#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
823
824static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
825 struct snd_ctl_elem_value *ucontrol)
826{
827 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 828 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 829 struct sigmatel_spec *spec = codec->spec;
830
e1f0d669
MR		 831 ucontrol->value.integer.value[0] = !!(spec->aloopback &
832 (spec->aloopback_mask << idx));
5f10c4a9
ML		 833 return 0;
834}
835
836static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
837 struct snd_ctl_elem_value *ucontrol)
838{
839 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
840 struct sigmatel_spec *spec = codec->spec;
e1f0d669 841 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 842 unsigned int dac_mode;
e1f0d669 843 unsigned int val, idx_val;
5f10c4a9 844
e1f0d669
MR		 845 idx_val = spec->aloopback_mask << idx;
846 if (ucontrol->value.integer.value[0])
847 val = spec->aloopback | idx_val;
848 else
849 val = spec->aloopback & ~idx_val;
68ea7b2f 850 if (spec->aloopback == val)
5f10c4a9
ML		 851 return 0;
852
68ea7b2f 853 spec->aloopback = val;
5f10c4a9 854
e1f0d669
MR		 855 /* Only return the bits defined by the shift value of the
856 * first two bytes of the mask
857 */
5f10c4a9 858 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 859 kcontrol->private_value & 0xFFFF, 0x0);
860 dac_mode >>= spec->aloopback_shift;
5f10c4a9 861
e1f0d669 862 if (spec->aloopback & idx_val) {
5f10c4a9 863 snd_hda_power_up(codec);
e1f0d669 864 dac_mode |= idx_val;
5f10c4a9
ML		 865 } else {
866 snd_hda_power_down(codec);
e1f0d669 867 dac_mode &= ~idx_val;
5f10c4a9
ML		 868 }
869
870 snd_hda_codec_write_cache(codec, codec->afg, 0,
871 kcontrol->private_value >> 16, dac_mode);
872
873 return 1;
874}
875
2b63536f 876static const struct hda_verb stac9200_core_init[] = {
2f2f4251 877 /* set dac0mux for dac converter */
c7d4b2fa 878 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 879 {}
880};
881
2b63536f 882static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI		 883 /* set dac0mux for dac converter */
884 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
885 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
886 {}
887};
888
2b63536f 889static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR		 890 /* set master volume to max value without distortion
891 * and direct control */
892 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR		 893 {}
894};
895
2b63536f 896static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR		 897 /* set master volume and direct control */
898 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR		 899 {}
900};
901
2b63536f 902static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR		 903 /* power state controls amps */
904 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 905 {}
d0513fc6
MR		 906};
907
2b63536f 908static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 909 /* set master volume and direct control */
910 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 911 {}
541eee87
MR		 912};
913
2b63536f 914static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR		 915 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
916 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 917 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
918 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 919 {}
920};
921
2b63536f 922static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD		 923 /* set dac0mux for dac converter */
924 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI		 925 /* mute the master volume */
926 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD		 927 {}
928};
929
2b63536f 930static const struct hda_verb stac922x_core_init[] = {
2f2f4251 931 /* set master volume and direct control */
c7d4b2fa 932 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 933 {}
934};
935
2b63536f 936static const struct hda_verb d965_core_init[] = {
19039bd0 937 /* set master volume and direct control */
93ed1503 938 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 939 /* unmute node 0x1b */
940 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
941 /* select node 0x03 as DAC */
942 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
943 {}
944};
945
2b63536f 946static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI		 947 /* don't set delta bit */
948 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
949 /* unmute node 0x1b */
950 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
951 /* select node 0x03 as DAC */
952 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
953 {}
954};
955
2b63536f 956static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP		 957 /* set master volume and direct control */
958 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 959 /* enable analog pc beep path */
960 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 961 {}
962};
963
2b63536f 964static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI		 965 /* don't set delta bit */
966 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
967 /* enable analog pc beep path */
968 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
969 {}
970};
971
2b63536f 972static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP		 973 /* set master volume and direct control */
974 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 975 /* enable analog pc beep path */
976 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 977 {}
978};
979
b22b4821
MR		 980#define STAC_MONO_MUX \
981 { \
982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
983 .name = "Mono Mux", \
984 .count = 1, \
985 .info = stac92xx_mono_mux_enum_info, \
986 .get = stac92xx_mono_mux_enum_get, \
987 .put = stac92xx_mono_mux_enum_put, \
988 }
989
e1f0d669 990#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 991 { \
992 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
993 .name = "Analog Loopback", \
e1f0d669 994 .count = cnt, \
5f10c4a9
ML		 995 .info = stac92xx_aloopback_info, \
996 .get = stac92xx_aloopback_get, \
997 .put = stac92xx_aloopback_put, \
998 .private_value = verb_read | (verb_write << 16), \
999 }
1000
2fc99890
NL		 1001#define DC_BIAS(xname, idx, nid) \
1002 { \
1003 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1004 .name = xname, \
1005 .index = idx, \
1006 .info = stac92xx_dc_bias_info, \
1007 .get = stac92xx_dc_bias_get, \
1008 .put = stac92xx_dc_bias_put, \
1009 .private_value = nid, \
1010 }
1011
2b63536f 1012static const struct snd_kcontrol_new stac9200_mixer[] = {
de8c85f7 1013 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
2f2f4251 1014 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M		 1015 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1016 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 1017 { } /* end */
1018};
1019
2b63536f 1020static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI		 1021 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1022 {}
1023};
1024
2b63536f 1025static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1026 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI		 1027 {}
1028};
e1f0d669 1029
2b63536f 1030static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI		 1031 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1032 {}
1033};
1034
d0513fc6 1035
2b63536f 1036static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI		 1037 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1038};
541eee87 1039
2b63536f 1040static const struct snd_kcontrol_new stac925x_mixer[] = {
de8c85f7 1041 HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT),
c9280d68 1042 HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M		 1043 { } /* end */
1044};
1045
2b63536f 1046static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI		 1047 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1048 {}
1049};
1050
2b63536f 1051static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI		 1052 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1053 {}
1054};
1055
1697055e
TI		 1056static struct snd_kcontrol_new stac_dmux_mixer = {
1057 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1058 .name = "Digital Input Source",
1059 /* count set later */
1060 .info = stac92xx_dmux_enum_info,
1061 .get = stac92xx_dmux_enum_get,
1062 .put = stac92xx_dmux_enum_put,
1063};
1064
d9737751
MR		 1065static struct snd_kcontrol_new stac_smux_mixer = {
1066 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1067 .name = "IEC958 Playback Source",
d9737751
MR		 1068 /* count set later */
1069 .info = stac92xx_smux_enum_info,
1070 .get = stac92xx_smux_enum_get,
1071 .put = stac92xx_smux_enum_put,
1072};
1073
ea734963 1074static const char * const slave_vols[] = {
2134ea4f
TI		 1075 "Front Playback Volume",
1076 "Surround Playback Volume",
1077 "Center Playback Volume",
1078 "LFE Playback Volume",
1079 "Side Playback Volume",
1080 "Headphone Playback Volume",
2134ea4f 1081 "Speaker Playback Volume",
2134ea4f
TI		 1082 NULL
1083};
1084
ea734963 1085static const char * const slave_sws[] = {
2134ea4f
TI		 1086 "Front Playback Switch",
1087 "Surround Playback Switch",
1088 "Center Playback Switch",
1089 "LFE Playback Switch",
1090 "Side Playback Switch",
1091 "Headphone Playback Switch",
2134ea4f 1092 "Speaker Playback Switch",
edb54a55 1093 "IEC958 Playback Switch",
2134ea4f
TI		 1094 NULL
1095};
1096
603c4019 1097static void stac92xx_free_kctls(struct hda_codec *codec);
e4973e1e 1098static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
603c4019 1099
2f2f4251
M		 1100static int stac92xx_build_controls(struct hda_codec *codec)
1101{
1102 struct sigmatel_spec *spec = codec->spec;
e4973e1e
TI		 1103 struct auto_pin_cfg *cfg = &spec->autocfg;
1104 hda_nid_t nid;
2f2f4251 1105 int err;
c7d4b2fa 1106 int i;
2f2f4251 1107
6479c631
TI		 1108 if (spec->mixer) {
1109 err = snd_hda_add_new_ctls(codec, spec->mixer);
1110 if (err < 0)
1111 return err;
1112 }
c7d4b2fa
M		 1113
1114 for (i = 0; i < spec->num_mixers; i++) {
1115 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1116 if (err < 0)
1117 return err;
1118 }
5207e10e
TI		 1119 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1120 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1121 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1122 err = snd_hda_ctl_add(codec, 0,
1697055e
TI		 1123 snd_ctl_new1(&stac_dmux_mixer, codec));
1124 if (err < 0)
1125 return err;
1126 }
d9737751 1127 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1128 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1129 struct hda_input_mux *smux = &spec->private_smux;
1130 /* check for mute support on SPDIF out */
1131 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1132 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR		 1133 spec->spdif_mute = 1;
1134 }
d9737751 1135 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1136 err = snd_hda_ctl_add(codec, 0,
d9737751
MR		 1137 snd_ctl_new1(&stac_smux_mixer, codec));
1138 if (err < 0)
1139 return err;
1140 }
c7d4b2fa 1141
dabbed6f 1142 if (spec->multiout.dig_out_nid) {
74b654c9
SW		 1143 err = snd_hda_create_spdif_out_ctls(codec,
1144 spec->multiout.dig_out_nid,
1145 spec->multiout.dig_out_nid);
dabbed6f
M		 1146 if (err < 0)
1147 return err;
9a08160b
TI		 1148 err = snd_hda_create_spdif_share_sw(codec,
1149 &spec->multiout);
1150 if (err < 0)
1151 return err;
1152 spec->multiout.share_spdif = 1;
dabbed6f 1153 }
da74ae3e 1154 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1155 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1156 if (err < 0)
1157 return err;
1158 }
2134ea4f
TI		 1159
1160 /* if we have no master control, let's create it */
1161 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1162 unsigned int vmaster_tlv[4];
2134ea4f 1163 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1164 HDA_OUTPUT, vmaster_tlv);
7c7767eb
TI		 1165 /* correct volume offset */
1166 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
de8c85f7 1167 /* minimum value is actually mute */
a74ccea5 1168 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
2134ea4f 1169 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1170 vmaster_tlv, slave_vols);
2134ea4f
TI		 1171 if (err < 0)
1172 return err;
1173 }
1174 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1175 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1176 NULL, slave_sws);
1177 if (err < 0)
1178 return err;
1179 }
1180
d78d7a90
TI		 1181 if (spec->aloopback_ctl &&
1182 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1183 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1184 if (err < 0)
1185 return err;
1186 }
1187
603c4019 1188 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e
TI		 1189
1190 /* create jack input elements */
1191 if (spec->hp_detect) {
1192 for (i = 0; i < cfg->hp_outs; i++) {
1193 int type = SND_JACK_HEADPHONE;
1194 nid = cfg->hp_pins[i];
1195 /* jack detection */
1196 if (cfg->hp_outs == i)
1197 type |= SND_JACK_LINEOUT;
1198 err = stac92xx_add_jack(codec, nid, type);
1199 if (err < 0)
1200 return err;
1201 }
1202 }
1203 for (i = 0; i < cfg->line_outs; i++) {
1204 err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
1205 SND_JACK_LINEOUT);
1206 if (err < 0)
1207 return err;
1208 }
eea7dc93
TI		 1209 for (i = 0; i < cfg->num_inputs; i++) {
1210 nid = cfg->inputs[i].pin;
1211 err = stac92xx_add_jack(codec, nid, SND_JACK_MICROPHONE);
1212 if (err < 0)
1213 return err;
e4973e1e
TI		 1214 }
1215
dabbed6f 1216 return 0;
2f2f4251
M		 1217}
1218
2b63536f 1219static const unsigned int ref9200_pin_configs[8] = {
dabbed6f 1220 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1221 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1222};
1223
2b63536f 1224static const unsigned int gateway9200_m4_pin_configs[8] = {
58eec423
MCC		 1225 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1226 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1227};
2b63536f 1228static const unsigned int gateway9200_m4_2_pin_configs[8] = {
58eec423
MCC		 1229 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1230 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1231};
1232
1233/*
dfe495d0
TI		 1234 STAC 9200 pin configs for
1235 102801A8
1236 102801DE
1237 102801E8
1238*/
2b63536f 1239static const unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1240 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1241 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1242};
1243
1244/*
1245 STAC 9200 pin configs for
1246 102801C0
1247 102801C1
1248*/
2b63536f 1249static const unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1250 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1251 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1252};
1253
1254/*
1255 STAC 9200 pin configs for
1256 102801C4 (Dell Dimension E310)
1257 102801C5
1258 102801C7
1259 102801D9
1260 102801DA
1261 102801E3
1262*/
2b63536f 1263static const unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1264 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1265 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1266};
1267
1268
1269/*
1270 STAC 9200-32 pin configs for
1271 102801B5 (Dell Inspiron 630m)
1272 102801D8 (Dell Inspiron 640m)
1273*/
2b63536f 1274static const unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1275 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1276 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1277};
1278
1279/*
1280 STAC 9200-32 pin configs for
1281 102801C2 (Dell Latitude D620)
1282 102801C8
1283 102801CC (Dell Latitude D820)
1284 102801D4
1285 102801D6
1286*/
2b63536f 1287static const unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1288 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1289 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1290};
1291
1292/*
1293 STAC 9200-32 pin configs for
1294 102801CE (Dell XPS M1710)
1295 102801CF (Dell Precision M90)
1296*/
2b63536f 1297static const unsigned int dell9200_m23_pin_configs[8] = {
dfe495d0
TI		 1298 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1299 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1300};
1301
1302/*
1303 STAC 9200-32 pin configs for
1304 102801C9
1305 102801CA
1306 102801CB (Dell Latitude 120L)
1307 102801D3
1308*/
2b63536f 1309static const unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1310 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1311 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1312};
1313
1314/*
1315 STAC 9200-32 pin configs for
1316 102801BD (Dell Inspiron E1505n)
1317 102801EE
1318 102801EF
1319*/
2b63536f 1320static const unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1321 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1322 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1323};
1324
1325/*
1326 STAC 9200-32 pin configs for
1327 102801F5 (Dell Inspiron 1501)
1328 102801F6
1329*/
2b63536f 1330static const unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1331 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1332 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1333};
1334
1335/*
1336 STAC 9200-32
1337 102801CD (Dell Inspiron E1705/9400)
1338*/
2b63536f 1339static const unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1340 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1341 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1342};
1343
2b63536f 1344static const unsigned int oqo9200_pin_configs[8] = {
bf277785
TD		 1345 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1346 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1347};
1348
dfe495d0 1349
2b63536f 1350static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
f5fcc13c 1351 [STAC_REF] = ref9200_pin_configs,
bf277785 1352 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1353 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1354 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1355 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1356 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1357 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1358 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1359 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1360 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1361 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1362 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC		 1363 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1364 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1365 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1366};
1367
ea734963 1368static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1369 [STAC_AUTO] = "auto",
f5fcc13c 1370 [STAC_REF] = "ref",
bf277785 1371 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1372 [STAC_9200_DELL_D21] = "dell-d21",
1373 [STAC_9200_DELL_D22] = "dell-d22",
1374 [STAC_9200_DELL_D23] = "dell-d23",
1375 [STAC_9200_DELL_M21] = "dell-m21",
1376 [STAC_9200_DELL_M22] = "dell-m22",
1377 [STAC_9200_DELL_M23] = "dell-m23",
1378 [STAC_9200_DELL_M24] = "dell-m24",
1379 [STAC_9200_DELL_M25] = "dell-m25",
1380 [STAC_9200_DELL_M26] = "dell-m26",
1381 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC		 1382 [STAC_9200_M4] = "gateway-m4",
1383 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1384 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1385};
1386
2b63536f 1387static const struct snd_pci_quirk stac9200_cfg_tbl[] = {
f5fcc13c
TI		 1388 /* SigmaTel reference board */
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1390 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1392 "DFI LanParty", STAC_REF),
e7377071 1393 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1395 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1397 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1399 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1401 "unknown Dell", STAC_9200_DELL_D22),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1403 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1405 "Dell Latitude D620", STAC_9200_DELL_M22),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1407 "unknown Dell", STAC_9200_DELL_D23),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1409 "unknown Dell", STAC_9200_DELL_D23),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1411 "unknown Dell", STAC_9200_DELL_M22),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1413 "unknown Dell", STAC_9200_DELL_M24),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1415 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1416 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1417 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1418 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1419 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1420 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1421 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1422 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1423 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1424 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1425 "Dell Precision M90", STAC_9200_DELL_M23),
1426 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1427 "unknown Dell", STAC_9200_DELL_M22),
1428 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1429 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1430 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1431 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1432 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1433 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1434 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1435 "unknown Dell", STAC_9200_DELL_D23),
1436 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1437 "unknown Dell", STAC_9200_DELL_D23),
1438 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1439 "unknown Dell", STAC_9200_DELL_D21),
1440 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1441 "unknown Dell", STAC_9200_DELL_D23),
1442 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1443 "unknown Dell", STAC_9200_DELL_D21),
1444 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1445 "unknown Dell", STAC_9200_DELL_M25),
1446 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1447 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1448 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1449 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1450 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1451 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1452 /* Panasonic */
117f257d 1453 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1454 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1455 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1456 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1457 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1458 /* OQO Mobile */
1459 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1460 {} /* terminator */
1461};
1462
2b63536f 1463static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1464 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1465 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1466};
1467
2b63536f 1468static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC		 1469 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1470 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1471};
1472
2b63536f 1473static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC		 1474 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1475 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1476};
58eec423 1477
2b63536f 1478static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC		 1479 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1480 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD		 1481};
1482
2b63536f 1483static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC		 1484 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1485 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1486};
1487
2b63536f 1488static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC		 1489 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1490 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1491};
58eec423 1492
2b63536f 1493static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC		 1494 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1495 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1496};
1497
2b63536f 1498static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC		 1499 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1500 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD		 1501};
1502
2b63536f 1503static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1504 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC		 1505 [STAC_M1] = stac925xM1_pin_configs,
1506 [STAC_M1_2] = stac925xM1_2_pin_configs,
1507 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1508 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC		 1509 [STAC_M3] = stac925xM3_pin_configs,
1510 [STAC_M5] = stac925xM5_pin_configs,
1511 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD		 1512};
1513
ea734963 1514static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1515 [STAC_925x_AUTO] = "auto",
8e21c34c 1516 [STAC_REF] = "ref",
9cb36c2a
MCC		 1517 [STAC_M1] = "m1",
1518 [STAC_M1_2] = "m1-2",
1519 [STAC_M2] = "m2",
8e21c34c 1520 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC		 1521 [STAC_M3] = "m3",
1522 [STAC_M5] = "m5",
1523 [STAC_M6] = "m6",
8e21c34c
TD		 1524};
1525
2b63536f 1526static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC		 1527 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1528 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1529 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1530 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1531 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1532 /* Not sure about the brand name for those */
1533 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1534 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1535 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1536 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1537 {} /* terminator */
8e21c34c
TD		 1538};
1539
2b63536f 1540static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD		 1541 /* SigmaTel reference board */
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1544 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC		 1545
1546 /* Default table for unknown ID */
1547 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1548
8e21c34c
TD		 1549 {} /* terminator */
1550};
1551
2b63536f 1552static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1553 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1554 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1555 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1556 0x01452050,
1557};
1558
2b63536f 1559static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1560 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1561 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1562 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1563 0x4f0000f0,
e1f0d669
MR		 1564};
1565
2b63536f 1566static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI		 1567 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1568 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1569 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1570 0x904601b0,
1571};
1572
2b63536f 1573static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1574 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1575 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF		 1576};
1577
2b63536f 1578static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1579 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1580 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1581 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1582 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1583 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1584 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1585 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR		 1586};
1587
ea734963 1588static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1589 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1590 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1591 [STAC_92HD73XX_REF] = "ref",
ae709440 1592 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI		 1593 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1594 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1595 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1596 [STAC_DELL_EQ] = "dell-eq",
842ae638 1597 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR		 1598};
1599
2b63536f 1600static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR		 1601 /* SigmaTel reference board */
1602 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1603 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1605 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1607 "Intel DG45ID", STAC_92HD73XX_INTEL),
1608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1609 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1610 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1611 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1612 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1613 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1614 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1615 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1617 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1619 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1621 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1623 "unknown Dell", STAC_DELL_M6_DMIC),
1624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1625 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1627 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1629 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1631 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1633 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf
DC		 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1635 "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
5c1bccf6 1636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1637 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1638 {} /* terminator */
1639};
1640
2b63536f 1641static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI		 1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1643 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1645 "Alienware M17x", STAC_ALIENWARE_M17X),
842ae638
TI		 1646 {} /* terminator */
1647};
1648
2b63536f 1649static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR		 1650 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1651 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR		 1652 0x01451160, 0x98560170,
1653};
1654
2b63536f 1655static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI		 1656 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1657 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR		 1658 0x40f000f0, 0x40f000f0,
1659};
1660
2b63536f 1661static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE		 1662 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1663 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1664 0x40f000f0, 0x40f000f0,
1665};
1666
0c27c180
VK		 1667static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1668 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1669 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1670 0x40f000f0, 0x40f000f0,
1671};
1672
2b63536f 1673static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1674 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1675 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1676 [STAC_DELL_S14] = dell_s14_pin_configs,
0c27c180 1677 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1678 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
d0513fc6
MR		 1679};
1680
ea734963 1681static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1682 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1683 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1684 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1685 [STAC_DELL_S14] = "dell-s14",
b4e81876 1686 [STAC_92HD83XXX_HP] = "hp",
0c27c180 1687 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1688 [STAC_HP_DV7_4000] = "hp-dv7-4000",
d0513fc6
MR		 1689};
1690
2b63536f 1691static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR		 1692 /* SigmaTel reference board */
1693 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1694 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1696 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1698 "unknown Dell", STAC_DELL_S14),
b4e81876 1699 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
0c27c180
VK		 1700 "HP", STAC_92HD83XXX_HP),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1702 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1704 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1706 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
1708 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1710 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1712 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1714 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1715 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1716 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1718 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1719 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1720 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1722 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1723 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1724 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1726 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1727 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1728 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1730 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1731 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1732 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1734 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1736 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1737 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1738 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1739 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1740 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
574f3c4f 1741 {} /* terminator */
d0513fc6
MR		 1742};
1743
2b63536f 1744static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1745 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1746 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK		 1747 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1748 0x00000000
e035b841
MR		 1749};
1750
2b63536f 1751static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1752 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1753 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1754 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1755 0x00000000
a7662640
MR		 1756};
1757
2b63536f 1758static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR		 1759 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1760 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK		 1761 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1762 0x00000000
a7662640
MR		 1763};
1764
2b63536f 1765static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR		 1766 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1767 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK		 1768 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1769 0x00000000
3a7abfd2
MR		 1770};
1771
2b63536f 1772static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1773 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1774 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1775 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1776 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1777 [STAC_HP_M4] = NULL,
2a6ce6e5 1778 [STAC_HP_DV4] = NULL,
1b0652eb 1779 [STAC_HP_DV5] = NULL,
ae6241fb 1780 [STAC_HP_HDX] = NULL,
514bf54c 1781 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR		 1782};
1783
ea734963 1784static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1785 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1786 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1787 [STAC_DELL_M4_1] = "dell-m4-1",
1788 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1789 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1790 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1791 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1792 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1793 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1794 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR		 1795};
1796
2b63536f 1797static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR		 1798 /* SigmaTel reference board */
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1800 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 1801 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1802 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG		 1803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1804 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK		 1805 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1806 "HP", STAC_HP_DV5),
58d8395b
TI		 1807 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1808 "HP", STAC_HP_DV5),
2ae466f8 1809 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1810 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 1811 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1812 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 1813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1814 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1816 "HP mini 1000", STAC_HP_M4),
ae6241fb 1817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1818 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 1819 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1820 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 1821 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1822 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 1823 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1824 "HP DV6", STAC_HP_DV5),
1972d025
TI		 1825 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1826 "HP", STAC_HP_DV5),
a7662640
MR		 1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1828 "unknown Dell", STAC_DELL_M4_1),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1830 "unknown Dell", STAC_DELL_M4_1),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1832 "unknown Dell", STAC_DELL_M4_1),
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1834 "unknown Dell", STAC_DELL_M4_1),
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1836 "unknown Dell", STAC_DELL_M4_1),
1837 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1838 "unknown Dell", STAC_DELL_M4_1),
1839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1840 "unknown Dell", STAC_DELL_M4_1),
1841 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1842 "unknown Dell", STAC_DELL_M4_2),
1843 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1844 "unknown Dell", STAC_DELL_M4_2),
1845 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1846 "unknown Dell", STAC_DELL_M4_2),
1847 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1848 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1849 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1850 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1851 {} /* terminator */
1852};
1853
2b63536f 1854static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP		 1855 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1856 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1857 0x40000100, 0x40000100,
1858};
1859
dfe495d0
TI		 1860/*
1861 STAC 922X pin configs for
1862 102801A7
1863 102801AB
1864 102801A9
1865 102801D1
1866 102801D2
1867*/
2b63536f 1868static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI		 1869 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1870 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1871 0x01813122, 0x400001f2,
1872};
1873
1874/*
1875 STAC 922X pin configs for
1876 102801AC
1877 102801D0
1878*/
2b63536f 1879static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI		 1880 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1881 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1882 0x01813122, 0x400001f1,
1883};
1884
1885/*
1886 STAC 922X pin configs for
1887 102801BF
1888*/
2b63536f 1889static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI		 1890 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1891 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1892 0x40C003f1, 0x405003f0,
1893};
1894
1895/*
1896 STAC 9221 A1 pin configs for
1897 102801D7 (Dell XPS M1210)
1898*/
2b63536f 1899static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1900 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1901 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1902 0x508003f3, 0x405003f4,
1903};
1904
2b63536f 1905static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 1906 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1907 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1908 0x02a19120, 0x40000100,
1909};
1910
2b63536f 1911static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1912 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1913 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1914 0x02a19320, 0x40000100,
1915};
1916
2b63536f 1917static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ		 1918 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1919 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1920 0x400000fc, 0x400000fb,
1921};
1922
2b63536f 1923static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ		 1924 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1925 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1926 0x400000fc, 0x400000fb,
6f0778d8
NB		 1927};
1928
2b63536f 1929static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ		 1930 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1931 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1932 0x400000fc, 0x400000fb,
1933};
1934
2b63536f 1935static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ		 1936 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1937 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1938 0x400000fc, 0x400000fb,
1939};
1940
2b63536f 1941static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ		 1942 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1943 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1944 0x400000fc, 0x400000fb,
0dae0f83
TI		 1945};
1946
2b63536f 1947static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC		 1948 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1949 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1950 0x9037012e, 0x40e000f2,
1951};
76c08828 1952
2b63536f 1953static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1954 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1955 [STAC_D945GTP3] = d945gtp3_pin_configs,
1956 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1957 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1958 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1959 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1960 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1961 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1962 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1963 /* for backward compatibility */
5d5d3bc3
IZ		 1964 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1965 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1966 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1967 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1968 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1969 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1970 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1971 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1972 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1973 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1974 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1975};
1976
ea734963 1977static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 1978 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI		 1979 [STAC_D945_REF] = "ref",
1980 [STAC_D945GTP5] = "5stack",
1981 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1982 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1983 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1984 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1985 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1986 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1987 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1988 /* for backward compatibility */
f5fcc13c 1989 [STAC_MACMINI] = "macmini",
3fc24d85 1990 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1991 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1992 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1993 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1994 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1995 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1996 [STAC_922X_DELL_D81] = "dell-d81",
1997 [STAC_922X_DELL_D82] = "dell-d82",
1998 [STAC_922X_DELL_M81] = "dell-m81",
1999 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 2000};
2001
2b63536f 2002static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI		 2003 /* SigmaTel reference board */
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2005 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2006 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2007 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2008 /* Intel 945G based systems */
2009 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2010 "Intel D945G", STAC_D945GTP3),
2011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2012 "Intel D945G", STAC_D945GTP3),
2013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2014 "Intel D945G", STAC_D945GTP3),
2015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2016 "Intel D945G", STAC_D945GTP3),
2017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2018 "Intel D945G", STAC_D945GTP3),
2019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2020 "Intel D945G", STAC_D945GTP3),
2021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2022 "Intel D945G", STAC_D945GTP3),
2023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2024 "Intel D945G", STAC_D945GTP3),
2025 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2026 "Intel D945G", STAC_D945GTP3),
2027 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2028 "Intel D945G", STAC_D945GTP3),
2029 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2030 "Intel D945G", STAC_D945GTP3),
2031 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2032 "Intel D945G", STAC_D945GTP3),
2033 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2034 "Intel D945G", STAC_D945GTP3),
2035 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2036 "Intel D945G", STAC_D945GTP3),
2037 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2038 "Intel D945G", STAC_D945GTP3),
2039 /* Intel D945G 5-stack systems */
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2041 "Intel D945G", STAC_D945GTP5),
2042 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2043 "Intel D945G", STAC_D945GTP5),
2044 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2045 "Intel D945G", STAC_D945GTP5),
2046 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2047 "Intel D945G", STAC_D945GTP5),
2048 /* Intel 945P based systems */
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2050 "Intel D945P", STAC_D945GTP3),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2052 "Intel D945P", STAC_D945GTP3),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2054 "Intel D945P", STAC_D945GTP3),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2056 "Intel D945P", STAC_D945GTP3),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2058 "Intel D945P", STAC_D945GTP3),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2060 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 2061 /* other intel */
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2063 "Intel D945", STAC_D945_REF),
f5fcc13c 2064 /* other systems */
536319af 2065 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2066 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2067 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 2068 /* Dell systems */
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2070 "unknown Dell", STAC_922X_DELL_D81),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2072 "unknown Dell", STAC_922X_DELL_D81),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2074 "unknown Dell", STAC_922X_DELL_D81),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2076 "unknown Dell", STAC_922X_DELL_D82),
2077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2078 "unknown Dell", STAC_922X_DELL_M81),
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2080 "unknown Dell", STAC_922X_DELL_D82),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2082 "unknown Dell", STAC_922X_DELL_D81),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2084 "unknown Dell", STAC_922X_DELL_D81),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2086 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2087 /* ECS/PC Chips boards */
dea0a509 2088 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2089 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2090 {} /* terminator */
2091};
2092
2b63536f 2093static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2094 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2095 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2096 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2097 0x01c42190, 0x40000100,
3cc08dc6
MP		 2098};
2099
2b63536f 2100static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2101 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2102 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2103 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2104 0x40000100, 0x40000100
2105};
2106
2b63536f 2107static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD		 2108 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2109 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2110 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2111 0x40000100, 0x40000100
2112};
2113
2b63536f 2114static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI		 2115 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2116 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2117 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2118 0x40000100, 0x40000100
2119};
2120
2b63536f 2121static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD		 2122 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2123 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2124 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2125 0x40c003fc, 0x40000100
2126};
2127
2b63536f 2128static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2129 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2130 [STAC_D965_REF] = ref927x_pin_configs,
2131 [STAC_D965_3ST] = d965_3st_pin_configs,
2132 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2133 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR		 2134 [STAC_DELL_3ST] = dell_3st_pin_configs,
2135 [STAC_DELL_BIOS] = NULL,
54930531 2136 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP		 2137};
2138
ea734963 2139static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2140 [STAC_927X_AUTO] = "auto",
e28d8322 2141 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2142 [STAC_D965_REF] = "ref",
2143 [STAC_D965_3ST] = "3stack",
2144 [STAC_D965_5ST] = "5stack",
679d92ed 2145 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR		 2146 [STAC_DELL_3ST] = "dell-3stack",
2147 [STAC_DELL_BIOS] = "dell-bios",
54930531 2148 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI		 2149};
2150
2b63536f 2151static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI		 2152 /* SigmaTel reference board */
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2154 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 2155 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2156 "DFI LanParty", STAC_D965_REF),
81d3dbde 2157 /* Intel 946 based systems */
f5fcc13c
TI		 2158 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2159 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2160 /* 965 based 3 stack systems */
dea0a509
TI		 2161 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2162 "Intel D965", STAC_D965_3ST),
2163 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2164 "Intel D965", STAC_D965_3ST),
4ff076e5 2165 /* Dell 3 stack systems */
dfe495d0 2166 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2168 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2169 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2179 /* 965 based 5 stack systems */
dea0a509
TI		 2180 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2181 "Intel D965", STAC_D965_5ST),
2182 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2183 "Intel D965", STAC_D965_5ST),
54930531
TI		 2184 /* volume-knob fixes */
2185 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 2186 {} /* terminator */
2187};
2188
2b63536f 2189static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2190 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2191 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2192 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2193};
2194
dfe495d0
TI		 2195/*
2196 STAC 9205 pin configs for
2197 102801F1
2198 102801F2
2199 102801FC
2200 102801FD
2201 10280204
2202 1028021F
3fa2ef74 2203 10280228 (Dell Vostro 1500)
95e70e87 2204 10280229 (Dell Vostro 1700)
dfe495d0 2205*/
2b63536f 2206static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI		 2207 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2208 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2209 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2210};
2211
2212/*
2213 STAC 9205 pin configs for
2214 102801F9
2215 102801FA
2216 102801FE
2217 102801FF (Dell Precision M4300)
2218 10280206
2219 10280200
2220 10280201
2221*/
2b63536f 2222static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2223 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2224 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2225 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2226};
2227
2b63536f 2228static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2229 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2230 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2231 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2232};
2233
2b63536f 2234static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2235 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2236 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2237 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2238 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2239 [STAC_9205_EAPD] = NULL,
f3302a59
MP		 2240};
2241
ea734963 2242static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2243 [STAC_9205_AUTO] = "auto",
f5fcc13c 2244 [STAC_9205_REF] = "ref",
dfe495d0 2245 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2246 [STAC_9205_DELL_M43] = "dell-m43",
2247 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2248 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI		 2249};
2250
2b63536f 2251static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI		 2252 /* SigmaTel reference board */
2253 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2254 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 2255 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2256 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 2257 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2258 "DFI LanParty", STAC_9205_REF),
d9a4268e 2259 /* Dell */
dfe495d0
TI		 2260 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2261 "unknown Dell", STAC_9205_DELL_M42),
2262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2263 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2265 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2267 "Dell Precision", STAC_9205_DELL_M43),
2268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2269 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2271 "unknown Dell", STAC_9205_DELL_M42),
2272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2273 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2275 "Dell Precision", STAC_9205_DELL_M43),
2276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2277 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2279 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2281 "Dell Precision", STAC_9205_DELL_M43),
2282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2283 "Dell Precision", STAC_9205_DELL_M43),
2284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2285 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2286 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2287 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2288 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2289 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA		 2290 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2291 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2292 /* Gateway */
42b95f0c 2293 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2294 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP		 2295 {} /* terminator */
2296};
2297
330ee995 2298static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2299 const unsigned int *pincfgs)
11b44bbd
RF		 2300{
2301 int i;
2302 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2303
330ee995
TI		 2304 if (!pincfgs)
2305 return;
11b44bbd 2306
87d48363 2307 for (i = 0; i < spec->num_pins; i++)
330ee995
TI		 2308 if (spec->pin_nids[i] && pincfgs[i])
2309 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2310 pincfgs[i]);
af9f341a
TI		 2311}
2312
dabbed6f 2313/*
c7d4b2fa 2314 * Analog playback callbacks
dabbed6f 2315 */
c7d4b2fa
M		 2316static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2317 struct hda_codec *codec,
c8b6bf9b 2318 struct snd_pcm_substream *substream)
2f2f4251 2319{
dabbed6f 2320 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2321 if (spec->stream_delay)
2322 msleep(spec->stream_delay);
9a08160b
TI		 2323 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2324 hinfo);
2f2f4251
M		 2325}
2326
2f2f4251
M		 2327static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2328 struct hda_codec *codec,
2329 unsigned int stream_tag,
2330 unsigned int format,
c8b6bf9b 2331 struct snd_pcm_substream *substream)
2f2f4251
M		 2332{
2333 struct sigmatel_spec *spec = codec->spec;
403d1944 2334 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2335}
2336
2337static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2338 struct hda_codec *codec,
c8b6bf9b 2339 struct snd_pcm_substream *substream)
2f2f4251
M		 2340{
2341 struct sigmatel_spec *spec = codec->spec;
2342 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2343}
2344
dabbed6f
M		 2345/*
2346 * Digital playback callbacks
2347 */
2348static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2349 struct hda_codec *codec,
c8b6bf9b 2350 struct snd_pcm_substream *substream)
dabbed6f
M		 2351{
2352 struct sigmatel_spec *spec = codec->spec;
2353 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2354}
2355
2356static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2357 struct hda_codec *codec,
c8b6bf9b 2358 struct snd_pcm_substream *substream)
dabbed6f
M		 2359{
2360 struct sigmatel_spec *spec = codec->spec;
2361 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2362}
2363
6b97eb45
TI		 2364static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2365 struct hda_codec *codec,
2366 unsigned int stream_tag,
2367 unsigned int format,
2368 struct snd_pcm_substream *substream)
2369{
2370 struct sigmatel_spec *spec = codec->spec;
2371 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2372 stream_tag, format, substream);
2373}
2374
9411e21c
TI		 2375static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2376 struct hda_codec *codec,
2377 struct snd_pcm_substream *substream)
2378{
2379 struct sigmatel_spec *spec = codec->spec;
2380 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2381}
2382
dabbed6f 2383
2f2f4251
M		 2384/*
2385 * Analog capture callbacks
2386 */
2387static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2388 struct hda_codec *codec,
2389 unsigned int stream_tag,
2390 unsigned int format,
c8b6bf9b 2391 struct snd_pcm_substream *substream)
2f2f4251
M		 2392{
2393 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2394 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2395
8daaaa97
MR		 2396 if (spec->powerdown_adcs) {
2397 msleep(40);
8c2f767b 2398 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR		 2399 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2400 }
2401 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2402 return 0;
2403}
2404
2405static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2406 struct hda_codec *codec,
c8b6bf9b 2407 struct snd_pcm_substream *substream)
2f2f4251
M		 2408{
2409 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2410 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2411
8daaaa97
MR		 2412 snd_hda_codec_cleanup_stream(codec, nid);
2413 if (spec->powerdown_adcs)
8c2f767b 2414 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2415 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2416 return 0;
2417}
2418
2b63536f 2419static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M		 2420 .substreams = 1,
2421 .channels_min = 2,
2422 .channels_max = 2,
2423 /* NID is set in stac92xx_build_pcms */
2424 .ops = {
2425 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2426 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI		 2427 .prepare = stac92xx_dig_playback_pcm_prepare,
2428 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M		 2429 },
2430};
2431
2b63536f 2432static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M		 2433 .substreams = 1,
2434 .channels_min = 2,
2435 .channels_max = 2,
2436 /* NID is set in stac92xx_build_pcms */
2437};
2438
2b63536f 2439static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M		 2440 .substreams = 1,
2441 .channels_min = 2,
c7d4b2fa 2442 .channels_max = 8,
2f2f4251
M		 2443 .nid = 0x02, /* NID to query formats and rates */
2444 .ops = {
2445 .open = stac92xx_playback_pcm_open,
2446 .prepare = stac92xx_playback_pcm_prepare,
2447 .cleanup = stac92xx_playback_pcm_cleanup
2448 },
2449};
2450
2b63536f 2451static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP		 2452 .substreams = 1,
2453 .channels_min = 2,
2454 .channels_max = 2,
2455 .nid = 0x06, /* NID to query formats and rates */
2456 .ops = {
2457 .open = stac92xx_playback_pcm_open,
2458 .prepare = stac92xx_playback_pcm_prepare,
2459 .cleanup = stac92xx_playback_pcm_cleanup
2460 },
2461};
2462
2b63536f 2463static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2464 .channels_min = 2,
2465 .channels_max = 2,
9e05b7a3 2466 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2467 .ops = {
2468 .prepare = stac92xx_capture_pcm_prepare,
2469 .cleanup = stac92xx_capture_pcm_cleanup
2470 },
2471};
2472
2473static int stac92xx_build_pcms(struct hda_codec *codec)
2474{
2475 struct sigmatel_spec *spec = codec->spec;
2476 struct hda_pcm *info = spec->pcm_rec;
2477
2478 codec->num_pcms = 1;
2479 codec->pcm_info = info;
2480
c7d4b2fa 2481 info->name = "STAC92xx Analog";
2f2f4251 2482 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI		 2483 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2484 spec->multiout.dac_nids[0];
2f2f4251 2485 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2486 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2487 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2488
2489 if (spec->alt_switch) {
2490 codec->num_pcms++;
2491 info++;
2492 info->name = "STAC92xx Analog Alt";
2493 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2494 }
2f2f4251 2495
dabbed6f
M		 2496 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2497 codec->num_pcms++;
2498 info++;
2499 info->name = "STAC92xx Digital";
0852d7a6 2500 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M		 2501 if (spec->multiout.dig_out_nid) {
2502 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2503 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2504 }
2505 if (spec->dig_in_nid) {
2506 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2507 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2508 }
2509 }
2510
2f2f4251
M		 2511 return 0;
2512}
2513
7c922de7
NL		 2514static unsigned int stac92xx_get_default_vref(struct hda_codec *codec,
2515 hda_nid_t nid)
c960a03b 2516{
1327a32b 2517 unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
c960a03b
TI		 2518 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2519 if (pincap & AC_PINCAP_VREF_100)
2520 return AC_PINCTL_VREF_100;
2521 if (pincap & AC_PINCAP_VREF_80)
2522 return AC_PINCTL_VREF_80;
2523 if (pincap & AC_PINCAP_VREF_50)
2524 return AC_PINCTL_VREF_50;
2525 if (pincap & AC_PINCAP_VREF_GRD)
2526 return AC_PINCTL_VREF_GRD;
2527 return 0;
2528}
2529
403d1944
MP		 2530static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2531
2532{
82beb8fd
TI		 2533 snd_hda_codec_write_cache(codec, nid, 0,
2534 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2535}
2536
7c2ba97b
MR		 2537#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2538
2539static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2540 struct snd_ctl_elem_value *ucontrol)
2541{
2542 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2543 struct sigmatel_spec *spec = codec->spec;
2544
d7a89436 2545 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2546 return 0;
2547}
2548
62558ce1 2549static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2550
7c2ba97b
MR		 2551static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2552 struct snd_ctl_elem_value *ucontrol)
2553{
2554 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2555 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2556 int nid = kcontrol->private_value;
2557
2558 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2559
25985edc 2560 /* check to be sure that the ports are up to date with
7c2ba97b
MR		 2561 * switch changes
2562 */
62558ce1 2563 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR		 2564
2565 return 1;
2566}
2567
7c922de7
NL		 2568static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2569 struct snd_ctl_elem_info *uinfo)
2570{
2571 int i;
2b63536f 2572 static const char * const texts[] = {
7c922de7
NL		 2573 "Mic In", "Line In", "Line Out"
2574 };
2575
2576 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2577 struct sigmatel_spec *spec = codec->spec;
2578 hda_nid_t nid = kcontrol->private_value;
2579
2580 if (nid == spec->mic_switch || nid == spec->line_switch)
2581 i = 3;
2582 else
2583 i = 2;
2584
2585 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2586 uinfo->value.enumerated.items = i;
2587 uinfo->count = 1;
2588 if (uinfo->value.enumerated.item >= i)
2589 uinfo->value.enumerated.item = i-1;
2590 strcpy(uinfo->value.enumerated.name,
2591 texts[uinfo->value.enumerated.item]);
2592
2593 return 0;
2594}
2595
2596static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2597 struct snd_ctl_elem_value *ucontrol)
2598{
2599 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2600 hda_nid_t nid = kcontrol->private_value;
2601 unsigned int vref = stac92xx_vref_get(codec, nid);
2602
2603 if (vref == stac92xx_get_default_vref(codec, nid))
2604 ucontrol->value.enumerated.item[0] = 0;
2605 else if (vref == AC_PINCTL_VREF_GRD)
2606 ucontrol->value.enumerated.item[0] = 1;
2607 else if (vref == AC_PINCTL_VREF_HIZ)
2608 ucontrol->value.enumerated.item[0] = 2;
2609
2610 return 0;
2611}
2612
2613static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2614 struct snd_ctl_elem_value *ucontrol)
2615{
2616 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2617 unsigned int new_vref = 0;
b8621516 2618 int error;
7c922de7
NL		 2619 hda_nid_t nid = kcontrol->private_value;
2620
2621 if (ucontrol->value.enumerated.item[0] == 0)
2622 new_vref = stac92xx_get_default_vref(codec, nid);
2623 else if (ucontrol->value.enumerated.item[0] == 1)
2624 new_vref = AC_PINCTL_VREF_GRD;
2625 else if (ucontrol->value.enumerated.item[0] == 2)
2626 new_vref = AC_PINCTL_VREF_HIZ;
2627 else
2628 return 0;
2629
2630 if (new_vref != stac92xx_vref_get(codec, nid)) {
2631 error = stac92xx_vref_set(codec, nid, new_vref);
2632 return error;
2633 }
2634
2635 return 0;
2636}
2637
2638static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2639 struct snd_ctl_elem_info *uinfo)
2640{
2b63536f 2641 char *texts[2];
7c922de7
NL		 2642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2643 struct sigmatel_spec *spec = codec->spec;
2644
2645 if (kcontrol->private_value == spec->line_switch)
2646 texts[0] = "Line In";
2647 else
2648 texts[0] = "Mic In";
2649 texts[1] = "Line Out";
2650 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2651 uinfo->value.enumerated.items = 2;
2652 uinfo->count = 1;
2653
2654 if (uinfo->value.enumerated.item >= 2)
2655 uinfo->value.enumerated.item = 1;
2656 strcpy(uinfo->value.enumerated.name,
2657 texts[uinfo->value.enumerated.item]);
2658
2659 return 0;
2660}
403d1944
MP		 2661
2662static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2663{
2664 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2665 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2666 hda_nid_t nid = kcontrol->private_value;
2667 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2668
7c922de7 2669 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP		 2670 return 0;
2671}
2672
2673static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2674{
2675 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2676 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL		 2677 hda_nid_t nid = kcontrol->private_value;
2678 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2679 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP		 2680
2681 spec->io_switch[io_idx] = val;
2682
2683 if (val)
2684 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2685 else {
2686 unsigned int pinctl = AC_PINCTL_IN_EN;
2687 if (io_idx) /* set VREF for mic */
7c922de7 2688 pinctl |= stac92xx_get_default_vref(codec, nid);
c960a03b
TI		 2689 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2690 }
40c1d308
JZ		 2691
2692 /* check the auto-mute again: we need to mute/unmute the speaker
2693 * appropriately according to the pin direction
2694 */
2695 if (spec->hp_detect)
62558ce1 2696 stac_issue_unsol_event(codec, nid);
40c1d308 2697
403d1944
MP		 2698 return 1;
2699}
2700
0fb87bb4
ML		 2701#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2702
2703static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2704 struct snd_ctl_elem_value *ucontrol)
2705{
2706 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2707 struct sigmatel_spec *spec = codec->spec;
2708
2709 ucontrol->value.integer.value[0] = spec->clfe_swap;
2710 return 0;
2711}
2712
2713static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2714 struct snd_ctl_elem_value *ucontrol)
2715{
2716 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2717 struct sigmatel_spec *spec = codec->spec;
2718 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2719 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2720
68ea7b2f 2721 if (spec->clfe_swap == val)
0fb87bb4
ML		 2722 return 0;
2723
68ea7b2f 2724 spec->clfe_swap = val;
0fb87bb4
ML		 2725
2726 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2727 spec->clfe_swap ? 0x4 : 0x0);
2728
2729 return 1;
2730}
2731
7c2ba97b
MR		 2732#define STAC_CODEC_HP_SWITCH(xname) \
2733 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2734 .name = xname, \
2735 .index = 0, \
2736 .info = stac92xx_hp_switch_info, \
2737 .get = stac92xx_hp_switch_get, \
2738 .put = stac92xx_hp_switch_put, \
2739 }
2740
403d1944
MP		 2741#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2742 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2743 .name = xname, \
2744 .index = 0, \
2745 .info = stac92xx_io_switch_info, \
2746 .get = stac92xx_io_switch_get, \
2747 .put = stac92xx_io_switch_put, \
2748 .private_value = xpval, \
2749 }
2750
0fb87bb4
ML		 2751#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2752 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2753 .name = xname, \
2754 .index = 0, \
2755 .info = stac92xx_clfe_switch_info, \
2756 .get = stac92xx_clfe_switch_get, \
2757 .put = stac92xx_clfe_switch_put, \
2758 .private_value = xpval, \
2759 }
403d1944 2760
c7d4b2fa
M		 2761enum {
2762 STAC_CTL_WIDGET_VOL,
2763 STAC_CTL_WIDGET_MUTE,
123c07ae 2764 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2765 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2766 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2767 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL		 2768 STAC_CTL_WIDGET_CLFE_SWITCH,
2769 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M		 2770};
2771
2b63536f 2772static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2773 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2774 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2775 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2776 STAC_MONO_MUX,
7c2ba97b 2777 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2778 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2779 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2780 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M		 2781};
2782
2783/* add dynamic controls */
e3c75964
TI		 2784static struct snd_kcontrol_new *
2785stac_control_new(struct sigmatel_spec *spec,
2b63536f 2786 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2787 const char *name,
5e26dfd0 2788 unsigned int subdev)
c7d4b2fa 2789{
c8b6bf9b 2790 struct snd_kcontrol_new *knew;
c7d4b2fa 2791
603c4019
TI		 2792 snd_array_init(&spec->kctls, sizeof(*knew), 32);
2793 knew = snd_array_new(&spec->kctls);
2794 if (!knew)
e3c75964 2795 return NULL;
4d4e9bb3 2796 *knew = *ktemp;
82fe0c58 2797 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI		 2798 if (!knew->name) {
2799 /* roolback */
2800 memset(knew, 0, sizeof(*knew));
2801 spec->kctls.alloced--;
2802 return NULL;
2803 }
5e26dfd0 2804 knew->subdevice = subdev;
e3c75964
TI		 2805 return knew;
2806}
2807
2808static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2b63536f 2809 const struct snd_kcontrol_new *ktemp,
e3c75964
TI		 2810 int idx, const char *name,
2811 unsigned long val)
2812{
4d02d1b6 2813 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2814 HDA_SUBDEV_AMP_FLAG);
e3c75964 2815 if (!knew)
c7d4b2fa 2816 return -ENOMEM;
e3c75964 2817 knew->index = idx;
c7d4b2fa 2818 knew->private_value = val;
c7d4b2fa
M		 2819 return 0;
2820}
2821
4d4e9bb3
TI		 2822static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2823 int type, int idx, const char *name,
2824 unsigned long val)
2825{
2826 return stac92xx_add_control_temp(spec,
2827 &stac92xx_control_templates[type],
2828 idx, name, val);
2829}
2830
4682eee0
MR		 2831
2832/* add dynamic controls */
4d4e9bb3
TI		 2833static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2834 const char *name, unsigned long val)
4682eee0
MR		 2835{
2836 return stac92xx_add_control_idx(spec, type, 0, name, val);
2837}
2838
2b63536f 2839static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI		 2840 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2841 .name = "Input Source",
2842 .info = stac92xx_mux_enum_info,
2843 .get = stac92xx_mux_enum_get,
2844 .put = stac92xx_mux_enum_put,
2845};
2846
7c922de7
NL		 2847static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2848 hda_nid_t nid, int idx)
2849{
2850 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2851 int control = 0;
2852 struct sigmatel_spec *spec = codec->spec;
2853 char name[22];
2854
99ae28be 2855 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
7c922de7
NL		 2856 if (stac92xx_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
2857 && nid == spec->line_switch)
2858 control = STAC_CTL_WIDGET_IO_SWITCH;
2859 else if (snd_hda_query_pin_caps(codec, nid)
2860 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2861 control = STAC_CTL_WIDGET_DC_BIAS;
2862 else if (nid == spec->mic_switch)
2863 control = STAC_CTL_WIDGET_IO_SWITCH;
2864 }
2865
2866 if (control) {
10a20af7 2867 strcpy(name, hda_get_input_pin_label(codec, nid, 1));
7c922de7
NL		 2868 return stac92xx_add_control(codec->spec, control,
2869 strcat(name, " Jack Mode"), nid);
2870 }
2871
2872 return 0;
2873}
2874
e3c75964
TI		 2875static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2876{
2877 struct snd_kcontrol_new *knew;
2878 struct hda_input_mux *imux = &spec->private_imux;
2879
3d21d3f7
TI		 2880 if (spec->auto_mic)
2881 return 0; /* no need for input source */
e3c75964
TI		 2882 if (!spec->num_adcs || imux->num_items <= 1)
2883 return 0; /* no need for input source control */
2884 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2885 stac_input_src_temp.name, 0);
e3c75964
TI		 2886 if (!knew)
2887 return -ENOMEM;
2888 knew->count = spec->num_adcs;
2889 return 0;
2890}
2891
c21ca4a8
TI		 2892/* check whether the line-input can be used as line-out */
2893static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP		 2894{
2895 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 2896 struct auto_pin_cfg *cfg = &spec->autocfg;
2897 hda_nid_t nid;
2898 unsigned int pincap;
eea7dc93 2899 int i;
8e9068b1 2900
c21ca4a8
TI		 2901 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2902 return 0;
eea7dc93 2903 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2904 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI		 2905 nid = cfg->inputs[i].pin;
2906 pincap = snd_hda_query_pin_caps(codec, nid);
2907 if (pincap & AC_PINCAP_OUT)
2908 return nid;
2909 }
2910 }
c21ca4a8
TI		 2911 return 0;
2912}
403d1944 2913
eea7dc93
TI		 2914static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2915
c21ca4a8 2916/* check whether the mic-input can be used as line-out */
eea7dc93 2917static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI		 2918{
2919 struct sigmatel_spec *spec = codec->spec;
2920 struct auto_pin_cfg *cfg = &spec->autocfg;
2921 unsigned int def_conf, pincap;
86e2959a 2922 int i;
c21ca4a8 2923
eea7dc93 2924 *dac = 0;
c21ca4a8
TI		 2925 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2926 return 0;
eea7dc93
TI		 2927 for (i = 0; i < cfg->num_inputs; i++) {
2928 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2929 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2930 continue;
330ee995 2931 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI		 2932 /* some laptops have an internal analog microphone
2933 * which can't be used as a output */
99ae28be 2934 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2935 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI		 2936 if (pincap & AC_PINCAP_OUT) {
2937 *dac = get_unassigned_dac(codec, nid);
2938 if (*dac)
2939 return nid;
2940 }
403d1944 2941 }
403d1944 2942 }
403d1944
MP		 2943 return 0;
2944}
2945
7b043899
SL		 2946static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2947{
2948 int i;
2949
2950 for (i = 0; i < spec->multiout.num_dacs; i++) {
2951 if (spec->multiout.dac_nids[i] == nid)
2952 return 1;
2953 }
2954
2955 return 0;
2956}
2957
c21ca4a8
TI		 2958static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2959{
2960 int i;
2961 if (is_in_dac_nids(spec, nid))
2962 return 1;
2963 for (i = 0; i < spec->autocfg.hp_outs; i++)
2964 if (spec->hp_dacs[i] == nid)
2965 return 1;
2966 for (i = 0; i < spec->autocfg.speaker_outs; i++)
2967 if (spec->speaker_dacs[i] == nid)
2968 return 1;
2969 return 0;
2970}
2971
2972static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
2973{
2974 struct sigmatel_spec *spec = codec->spec;
2975 int j, conn_len;
2976 hda_nid_t conn[HDA_MAX_CONNECTIONS];
2977 unsigned int wcaps, wtype;
2978
2979 conn_len = snd_hda_get_connections(codec, nid, conn,
2980 HDA_MAX_CONNECTIONS);
36706005
CC		 2981 /* 92HD88: trace back up the link of nids to find the DAC */
2982 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
2983 != AC_WID_AUD_OUT)) {
2984 nid = conn[0];
2985 conn_len = snd_hda_get_connections(codec, nid, conn,
2986 HDA_MAX_CONNECTIONS);
2987 }
c21ca4a8 2988 for (j = 0; j < conn_len; j++) {
14bafe32 2989 wcaps = get_wcaps(codec, conn[j]);
a22d543a 2990 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI		 2991 /* we check only analog outputs */
2992 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
2993 continue;
2994 /* if this route has a free DAC, assign it */
2995 if (!check_all_dac_nids(spec, conn[j])) {
2996 if (conn_len > 1) {
2997 /* select this DAC in the pin's input mux */
2998 snd_hda_codec_write_cache(codec, nid, 0,
2999 AC_VERB_SET_CONNECT_SEL, j);
3000 }
3001 return conn[j];
3002 }
3003 }
ee58a7ca
TI		 3004 /* if all DACs are already assigned, connect to the primary DAC */
3005 if (conn_len > 1) {
3006 for (j = 0; j < conn_len; j++) {
3007 if (conn[j] == spec->multiout.dac_nids[0]) {
3008 snd_hda_codec_write_cache(codec, nid, 0,
3009 AC_VERB_SET_CONNECT_SEL, j);
3010 break;
3011 }
3012 }
3013 }
c21ca4a8
TI		 3014 return 0;
3015}
3016
3017static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3018static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3019
3cc08dc6 3020/*
7b043899
SL		 3021 * Fill in the dac_nids table from the parsed pin configuration
3022 * This function only works when every pin in line_out_pins[]
3023 * contains atleast one DAC in its connection list. Some 92xx
3024 * codecs are not connected directly to a DAC, such as the 9200
3025 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3026 */
c21ca4a8 3027static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M		 3028{
3029 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI		 3030 struct auto_pin_cfg *cfg = &spec->autocfg;
3031 int i;
3032 hda_nid_t nid, dac;
7b043899 3033
c7d4b2fa
M		 3034 for (i = 0; i < cfg->line_outs; i++) {
3035 nid = cfg->line_out_pins[i];
c21ca4a8
TI		 3036 dac = get_unassigned_dac(codec, nid);
3037 if (!dac) {
df802952
TI		 3038 if (spec->multiout.num_dacs > 0) {
3039 /* we have already working output pins,
3040 * so let's drop the broken ones again
3041 */
3042 cfg->line_outs = spec->multiout.num_dacs;
3043 break;
3044 }
7b043899
SL		 3045 /* error out, no available DAC found */
3046 snd_printk(KERN_ERR
3047 "%s: No available DAC for pin 0x%x\n",
3048 __func__, nid);
3049 return -ENODEV;
3050 }
c21ca4a8
TI		 3051 add_spec_dacs(spec, dac);
3052 }
7b043899 3053
139e071b
TI		 3054 for (i = 0; i < cfg->hp_outs; i++) {
3055 nid = cfg->hp_pins[i];
3056 dac = get_unassigned_dac(codec, nid);
3057 if (dac) {
3058 if (!spec->multiout.hp_nid)
3059 spec->multiout.hp_nid = dac;
3060 else
3061 add_spec_extra_dacs(spec, dac);
3062 }
3063 spec->hp_dacs[i] = dac;
3064 }
3065
3066 for (i = 0; i < cfg->speaker_outs; i++) {
3067 nid = cfg->speaker_pins[i];
3068 dac = get_unassigned_dac(codec, nid);
3069 if (dac)
3070 add_spec_extra_dacs(spec, dac);
3071 spec->speaker_dacs[i] = dac;
3072 }
3073
c21ca4a8
TI		 3074 /* add line-in as output */
3075 nid = check_line_out_switch(codec);
3076 if (nid) {
3077 dac = get_unassigned_dac(codec, nid);
3078 if (dac) {
3079 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3080 nid, cfg->line_outs);
3081 cfg->line_out_pins[cfg->line_outs] = nid;
3082 cfg->line_outs++;
3083 spec->line_switch = nid;
3084 add_spec_dacs(spec, dac);
3085 }
3086 }
3087 /* add mic as output */
eea7dc93
TI		 3088 nid = check_mic_out_switch(codec, &dac);
3089 if (nid && dac) {
3090 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3091 nid, cfg->line_outs);
3092 cfg->line_out_pins[cfg->line_outs] = nid;
3093 cfg->line_outs++;
3094 spec->mic_switch = nid;
3095 add_spec_dacs(spec, dac);
c21ca4a8 3096 }
c7d4b2fa 3097
c21ca4a8 3098 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL		 3099 spec->multiout.num_dacs,
3100 spec->multiout.dac_nids[0],
3101 spec->multiout.dac_nids[1],
3102 spec->multiout.dac_nids[2],
3103 spec->multiout.dac_nids[3],
3104 spec->multiout.dac_nids[4]);
c21ca4a8 3105
c7d4b2fa
M		 3106 return 0;
3107}
3108
eb06ed8f 3109/* create volume control/switch for the given prefx type */
668b9652
TI		 3110static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3111 int idx, hda_nid_t nid, int chs)
eb06ed8f 3112{
7c7767eb 3113 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI		 3114 char name[32];
3115 int err;
3116
7c7767eb
TI		 3117 if (!spec->check_volume_offset) {
3118 unsigned int caps, step, nums, db_scale;
3119 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3120 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3121 AC_AMPCAP_STEP_SIZE_SHIFT;
3122 step = (step + 1) * 25; /* in .01dB unit */
3123 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3124 AC_AMPCAP_NUM_STEPS_SHIFT;
3125 db_scale = nums * step;
3126 /* if dB scale is over -64dB, and finer enough,
3127 * let's reduce it to half
3128 */
3129 if (db_scale > 6400 && nums >= 0x1f)
3130 spec->volume_offset = nums / 2;
3131 spec->check_volume_offset = 1;
3132 }
3133
eb06ed8f 3134 sprintf(name, "%s Playback Volume", pfx);
668b9652 3135 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI		 3136 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3137 spec->volume_offset));
eb06ed8f
TI		 3138 if (err < 0)
3139 return err;
3140 sprintf(name, "%s Playback Switch", pfx);
668b9652 3141 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI		 3142 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3143 if (err < 0)
3144 return err;
3145 return 0;
3146}
3147
668b9652
TI		 3148#define create_controls(codec, pfx, nid, chs) \
3149 create_controls_idx(codec, pfx, 0, nid, chs)
3150
ae0afd81
MR		 3151static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3152{
c21ca4a8 3153 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR		 3154 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3155 return 1;
3156 } else {
dda14410
TI		 3157 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3158 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR		 3159 spec->multiout.num_dacs++;
3160 }
3161 return 0;
3162}
3163
c21ca4a8 3164static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3165{
c21ca4a8
TI		 3166 int i;
3167 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3168 if (!spec->multiout.extra_out_nid[i]) {
3169 spec->multiout.extra_out_nid[i] = nid;
3170 return 0;
3171 }
3172 }
3173 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3174 return 1;
ae0afd81
MR		 3175}
3176
dc04d1b4
TI		 3177/* Create output controls
3178 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3179 */
3180static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3181 const hda_nid_t *pins,
3182 const hda_nid_t *dac_nids,
3183 int type)
c7d4b2fa 3184{
76624534 3185 struct sigmatel_spec *spec = codec->spec;
ea734963 3186 static const char * const chname[4] = {
19039bd0
TI		 3187 "Front", "Surround", NULL /*CLFE*/, "Side"
3188 };
dc04d1b4 3189 hda_nid_t nid;
91589232
TI		 3190 int i, err;
3191 unsigned int wid_caps;
0fb87bb4 3192
dc04d1b4 3193 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3194 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3195 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI		 3196 spec->hp_detect = 1;
3197 }
dc04d1b4
TI		 3198 nid = dac_nids[i];
3199 if (!nid)
3200 continue;
3201 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3202 /* Center/LFE */
7c7767eb 3203 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3204 if (err < 0)
c7d4b2fa 3205 return err;
7c7767eb 3206 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3207 if (err < 0)
c7d4b2fa 3208 return err;
0fb87bb4
ML		 3209
3210 wid_caps = get_wcaps(codec, nid);
3211
3212 if (wid_caps & AC_WCAP_LR_SWAP) {
3213 err = stac92xx_add_control(spec,
3214 STAC_CTL_WIDGET_CLFE_SWITCH,
3215 "Swap Center/LFE Playback Switch", nid);
3216
3217 if (err < 0)
3218 return err;
3219 }
3220
c7d4b2fa 3221 } else {
dc04d1b4 3222 const char *name;
668b9652 3223 int idx;
dc04d1b4
TI		 3224 switch (type) {
3225 case AUTO_PIN_HP_OUT:
668b9652
TI		 3226 name = "Headphone";
3227 idx = i;
dc04d1b4
TI		 3228 break;
3229 case AUTO_PIN_SPEAKER_OUT:
668b9652
TI		 3230 name = "Speaker";
3231 idx = i;
dc04d1b4
TI		 3232 break;
3233 default:
3234 name = chname[i];
668b9652 3235 idx = 0;
dc04d1b4 3236 break;
76624534 3237 }
668b9652 3238 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3239 if (err < 0)
c7d4b2fa
M		 3240 return err;
3241 }
3242 }
dc04d1b4
TI		 3243 return 0;
3244}
3245
6479c631
TI		 3246static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3247 unsigned long sw, int idx)
3248{
3249 int err;
3250 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3251 "Capture Volume", vol);
6479c631
TI		 3252 if (err < 0)
3253 return err;
3254 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_MUTE, idx,
bf677bd8 3255 "Capture Switch", sw);
6479c631
TI		 3256 if (err < 0)
3257 return err;
3258 return 0;
3259}
3260
dc04d1b4
TI		 3261/* add playback controls from the parsed DAC table */
3262static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3263 const struct auto_pin_cfg *cfg)
3264{
3265 struct sigmatel_spec *spec = codec->spec;
7c922de7 3266 hda_nid_t nid;
dc04d1b4 3267 int err;
7c922de7 3268 int idx;
dc04d1b4
TI		 3269
3270 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3271 spec->multiout.dac_nids,
3272 cfg->line_out_type);
3273 if (err < 0)
3274 return err;
c7d4b2fa 3275
a9cb5c90 3276 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 3277 err = stac92xx_add_control(spec,
3278 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 3279 "Headphone as Line Out Switch",
3280 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 3281 if (err < 0)
3282 return err;
3283 }
3284
eea7dc93 3285 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3286 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI		 3287 break;
3288 nid = cfg->inputs[idx].pin;
3289 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3290 if (err < 0)
3291 return err;
b5895dc8 3292 }
403d1944 3293
c7d4b2fa
M		 3294 return 0;
3295}
3296
eb06ed8f
TI		 3297/* add playback controls for Speaker and HP outputs */
3298static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3299 struct auto_pin_cfg *cfg)
3300{
3301 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI		 3302 int err;
3303
3304 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3305 spec->hp_dacs, AUTO_PIN_HP_OUT);
3306 if (err < 0)
3307 return err;
3308
3309 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3310 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3311 if (err < 0)
3312 return err;
eb06ed8f 3313
c7d4b2fa
M		 3314 return 0;
3315}
3316
b22b4821 3317/* labels for mono mux outputs */
ea734963 3318static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3319 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3320};
3321
3322/* create mono mux for mono out on capable codecs */
3323static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3324{
3325 struct sigmatel_spec *spec = codec->spec;
3326 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3327 int i, num_cons;
3328 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3329
3330 num_cons = snd_hda_get_connections(codec,
3331 spec->mono_nid,
3332 con_lst,
3333 HDA_MAX_NUM_INPUTS);
16a433d8 3334 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR		 3335 return -EINVAL;
3336
10a20af7
TI		 3337 for (i = 0; i < num_cons; i++)
3338 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3339 NULL);
09a99959
MR		 3340
3341 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3342 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3343}
3344
1cd2224c
MR		 3345/* create PC beep volume controls */
3346static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3347 hda_nid_t nid)
3348{
3349 struct sigmatel_spec *spec = codec->spec;
3350 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK		 3351 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3352
3353 if (spec->anabeep_nid == nid)
3354 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR		 3355
3356 /* check for mute support for the the amp */
3357 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3358 err = stac92xx_add_control(spec, type,
d355c82a 3359 "Beep Playback Switch",
1cd2224c
MR		 3360 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3361 if (err < 0)
3362 return err;
3363 }
3364
3365 /* check to see if there is volume support for the amp */
3366 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3367 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3368 "Beep Playback Volume",
1cd2224c
MR		 3369 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3370 if (err < 0)
3371 return err;
3372 }
3373 return 0;
3374}
3375
4d4e9bb3
TI		 3376#ifdef CONFIG_SND_HDA_INPUT_BEEP
3377#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3378
3379static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3380 struct snd_ctl_elem_value *ucontrol)
3381{
3382 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3383 ucontrol->value.integer.value[0] = codec->beep->enabled;
3384 return 0;
3385}
3386
3387static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3388 struct snd_ctl_elem_value *ucontrol)
3389{
3390 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3391 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI		 3392}
3393
2b63536f 3394static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI		 3395 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3396 .info = stac92xx_dig_beep_switch_info,
3397 .get = stac92xx_dig_beep_switch_get,
3398 .put = stac92xx_dig_beep_switch_put,
3399};
3400
3401static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3402{
3403 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3404 0, "Beep Playback Switch", 0);
4d4e9bb3
TI		 3405}
3406#endif
3407
4682eee0
MR		 3408static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3409{
3410 struct sigmatel_spec *spec = codec->spec;
667067d8 3411 int i, j, err = 0;
4682eee0
MR		 3412
3413 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI		 3414 hda_nid_t nid;
3415 unsigned int wcaps;
3416 unsigned long val;
3417
4682eee0
MR		 3418 nid = spec->mux_nids[i];
3419 wcaps = get_wcaps(codec, nid);
667067d8
TI		 3420 if (!(wcaps & AC_WCAP_OUT_AMP))
3421 continue;
4682eee0 3422
667067d8
TI		 3423 /* check whether already the same control was created as
3424 * normal Capture Volume.
3425 */
3426 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3427 for (j = 0; j < spec->num_caps; j++) {
3428 if (spec->capvols[j] == val)
3429 break;
4682eee0 3430 }
667067d8
TI		 3431 if (j < spec->num_caps)
3432 continue;
3433
3434 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3435 "Mux Capture Volume", val);
3436 if (err < 0)
3437 return err;
4682eee0
MR		 3438 }
3439 return 0;
3440};
3441
ea734963 3442static const char * const stac92xx_spdif_labels[3] = {
65973632 3443 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3444};
3445
3446static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3447{
3448 struct sigmatel_spec *spec = codec->spec;
3449 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3450 const char * const *labels = spec->spdif_labels;
d9737751 3451 int i, num_cons;
65973632 3452 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3453
3454 num_cons = snd_hda_get_connections(codec,
3455 spec->smux_nids[0],
3456 con_lst,
3457 HDA_MAX_NUM_INPUTS);
16a433d8 3458 if (num_cons <= 0)
d9737751
MR		 3459 return -EINVAL;
3460
65973632
MR		 3461 if (!labels)
3462 labels = stac92xx_spdif_labels;
3463
10a20af7
TI		 3464 for (i = 0; i < num_cons; i++)
3465 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR		 3466
3467 return 0;
3468}
3469
8b65727b 3470/* labels for dmic mux inputs */
ea734963 3471static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP		 3472 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3473 "Digital Mic 3", "Digital Mic 4"
3474};
3475
699d8995
VK		 3476static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3477 int idx)
3478{
3479 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3480 int nums;
3481 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3482 if (idx >= 0 && idx < nums)
3483 return conn[idx];
3484 return 0;
3485}
3486
8d087c76
TI		 3487/* look for NID recursively */
3488#define get_connection_index(codec, mux, nid) \
3489 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3490
667067d8 3491/* create a volume assigned to the given pin (only if supported) */
96f845de 3492/* return 1 if the volume control is created */
667067d8 3493static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3494 const char *label, int idx, int direction)
667067d8
TI		 3495{
3496 unsigned int caps, nums;
3497 char name[32];
96f845de 3498 int err;
667067d8 3499
96f845de
TI		 3500 if (direction == HDA_OUTPUT)
3501 caps = AC_WCAP_OUT_AMP;
3502 else
3503 caps = AC_WCAP_IN_AMP;
3504 if (!(get_wcaps(codec, nid) & caps))
667067d8 3505 return 0;
96f845de 3506 caps = query_amp_caps(codec, nid, direction);
667067d8
TI		 3507 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3508 if (!nums)
3509 return 0;
3510 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI		 3511 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3512 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI		 3513 if (err < 0)
3514 return err;
3515 return 1;
667067d8
TI		 3516}
3517
8b65727b
MP		 3518/* create playback/capture controls for input pins on dmic capable codecs */
3519static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3520 const struct auto_pin_cfg *cfg)
3521{
3522 struct sigmatel_spec *spec = codec->spec;
5207e10e 3523 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3524 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3525 int err, i;
5207e10e 3526 unsigned int def_conf;
8b65727b 3527
10a20af7 3528 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3529
8b65727b 3530 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3531 hda_nid_t nid;
10a20af7 3532 int index, type_idx;
5207e10e 3533 const char *label;
8b65727b 3534
667067d8
TI		 3535 nid = spec->dmic_nids[i];
3536 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3537 continue;
3538 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP		 3539 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3540 continue;
3541
3d21d3f7
TI		 3542 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3543 if (index < 0)
3544 continue;
3545
10a20af7
TI		 3546 label = hda_get_input_pin_label(codec, nid, 1);
3547 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI		 3548 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3549 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3550
10a20af7
TI		 3551 err = create_elem_capture_vol(codec, nid, label, type_idx,
3552 HDA_INPUT);
667067d8
TI		 3553 if (err < 0)
3554 return err;
96f845de
TI		 3555 if (!err) {
3556 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3557 type_idx, HDA_OUTPUT);
96f845de
TI		 3558 if (err < 0)
3559 return err;
699d8995
VK		 3560 if (!err) {
3561 nid = get_connected_node(codec,
3562 spec->dmux_nids[0], index);
3563 if (nid)
3564 err = create_elem_capture_vol(codec,
3565 nid, label,
3566 type_idx, HDA_INPUT);
3567 if (err < 0)
3568 return err;
3569 }
96f845de 3570 }
8b65727b
MP		 3571 }
3572
3573 return 0;
3574}
3575
3d21d3f7 3576static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3577 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI		 3578{
3579 unsigned int cfg;
1f83ac5a 3580 unsigned int type;
3d21d3f7
TI		 3581
3582 if (!nid)
3583 return 0;
3584 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3585 type = get_defcfg_device(cfg);
99ae28be
TI		 3586 switch (snd_hda_get_input_pin_attr(cfg)) {
3587 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI		 3588 if (*fixed)
3589 return 1; /* already occupied */
1f83ac5a
TI		 3590 if (type != AC_JACK_MIC_IN)
3591 return 1; /* invalid type */
3d21d3f7
TI		 3592 *fixed = nid;
3593 break;
99ae28be
TI		 3594 case INPUT_PIN_ATTR_UNUSED:
3595 break;
3596 case INPUT_PIN_ATTR_DOCK:
3597 if (*dock)
3598 return 1; /* already occupied */
1f83ac5a
TI		 3599 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3600 return 1; /* invalid type */
99ae28be
TI		 3601 *dock = nid;
3602 break;
3603 default:
3d21d3f7
TI		 3604 if (*ext)
3605 return 1; /* already occupied */
1f83ac5a
TI		 3606 if (type != AC_JACK_MIC_IN)
3607 return 1; /* invalid type */
3d21d3f7
TI		 3608 *ext = nid;
3609 break;
3610 }
3611 return 0;
3612}
3613
3614static int set_mic_route(struct hda_codec *codec,
3615 struct sigmatel_mic_route *mic,
3616 hda_nid_t pin)
3617{
3618 struct sigmatel_spec *spec = codec->spec;
3619 struct auto_pin_cfg *cfg = &spec->autocfg;
3620 int i;
3621
3622 mic->pin = pin;
9907790a
CC		 3623 if (pin == 0)
3624 return 0;
eea7dc93
TI		 3625 for (i = 0; i < cfg->num_inputs; i++) {
3626 if (pin == cfg->inputs[i].pin)
3d21d3f7 3627 break;
eea7dc93 3628 }
86e2959a 3629 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3630 /* analog pin */
3d21d3f7
TI		 3631 i = get_connection_index(codec, spec->mux_nids[0], pin);
3632 if (i < 0)
3633 return -1;
3634 mic->mux_idx = i;
02d33322
TI		 3635 mic->dmux_idx = -1;
3636 if (spec->dmux_nids)
3637 mic->dmux_idx = get_connection_index(codec,
3638 spec->dmux_nids[0],
3639 spec->mux_nids[0]);
da2a2aaa 3640 } else if (spec->dmux_nids) {
3d21d3f7 3641 /* digital pin */
3d21d3f7
TI		 3642 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3643 if (i < 0)
3644 return -1;
3645 mic->dmux_idx = i;
02d33322
TI		 3646 mic->mux_idx = -1;
3647 if (spec->mux_nids)
3648 mic->mux_idx = get_connection_index(codec,
3649 spec->mux_nids[0],
3650 spec->dmux_nids[0]);
3d21d3f7
TI		 3651 }
3652 return 0;
3653}
3654
3655/* return non-zero if the device is for automatic mic switch */
3656static int stac_check_auto_mic(struct hda_codec *codec)
3657{
3658 struct sigmatel_spec *spec = codec->spec;
3659 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3660 hda_nid_t fixed, ext, dock;
3d21d3f7
TI		 3661 int i;
3662
9907790a 3663 fixed = ext = dock = 0;
eea7dc93 3664 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC		 3665 if (check_mic_pin(codec, cfg->inputs[i].pin,
3666 &fixed, &ext, &dock))
3d21d3f7
TI		 3667 return 0;
3668 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC		 3669 if (check_mic_pin(codec, spec->dmic_nids[i],
3670 &fixed, &ext, &dock))
3d21d3f7 3671 return 0;
80c67852 3672 if (!fixed || (!ext && !dock))
9907790a 3673 return 0; /* no input to switch */
e35d9d6a 3674 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI		 3675 return 0; /* no unsol support */
3676 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC		 3677 set_mic_route(codec, &spec->int_mic, fixed) ||
3678 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI		 3679 return 0; /* something is wrong */
3680 return 1;
3681}
3682
c7d4b2fa
M		 3683/* create playback/capture controls for input pins */
3684static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3685{
3686 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3687 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3688 int i, j;
263d0328 3689 const char *label;
c7d4b2fa 3690
eea7dc93
TI		 3691 for (i = 0; i < cfg->num_inputs; i++) {
3692 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3693 int index, err, type_idx;
314634bc 3694
314634bc
TI		 3695 index = -1;
3696 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI		 3697 index = get_connection_index(codec, spec->mux_nids[j],
3698 nid);
3699 if (index >= 0)
3700 break;
c7d4b2fa 3701 }
667067d8
TI		 3702 if (index < 0)
3703 continue;
3704
10a20af7
TI		 3705 label = hda_get_autocfg_input_label(codec, cfg, i);
3706 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3707
667067d8 3708 err = create_elem_capture_vol(codec, nid,
263d0328 3709 label, type_idx,
96f845de 3710 HDA_INPUT);
667067d8
TI		 3711 if (err < 0)
3712 return err;
c7d4b2fa 3713 }
5207e10e 3714 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3715
7b043899 3716 if (imux->num_items) {
62fe78e9
SR		 3717 /*
3718 * Set the current input for the muxes.
3719 * The STAC9221 has two input muxes with identical source
3720 * NID lists. Hopefully this won't get confused.
3721 */
3722 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3723 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3724 AC_VERB_SET_CONNECT_SEL,
3725 imux->items[0].index);
62fe78e9
SR		 3726 }
3727 }
3728
c7d4b2fa
M		 3729 return 0;
3730}
3731
c7d4b2fa
M		 3732static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3733{
3734 struct sigmatel_spec *spec = codec->spec;
3735 int i;
3736
3737 for (i = 0; i < spec->autocfg.line_outs; i++) {
3738 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3739 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3740 }
3741}
3742
3743static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3744{
3745 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3746 int i;
c7d4b2fa 3747
eb06ed8f
TI		 3748 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3749 hda_nid_t pin;
3750 pin = spec->autocfg.hp_pins[i];
3751 if (pin) /* connect to front */
3752 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3753 }
3754 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3755 hda_nid_t pin;
3756 pin = spec->autocfg.speaker_pins[i];
3757 if (pin) /* connect to front */
3758 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3759 }
c7d4b2fa
M		 3760}
3761
8af3aeb4
TI		 3762static int is_dual_headphones(struct hda_codec *codec)
3763{
3764 struct sigmatel_spec *spec = codec->spec;
3765 int i, valid_hps;
3766
3767 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3768 spec->autocfg.hp_outs <= 1)
3769 return 0;
3770 valid_hps = 0;
3771 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3772 hda_nid_t nid = spec->autocfg.hp_pins[i];
3773 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3774 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3775 continue;
3776 valid_hps++;
3777 }
3778 return (valid_hps > 1);
3779}
3780
3781
3cc08dc6 3782static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3783{
3784 struct sigmatel_spec *spec = codec->spec;
dc04d1b4 3785 int hp_swap = 0;
6479c631 3786 int i, err;
c7d4b2fa 3787
8b65727b
MP		 3788 if ((err = snd_hda_parse_pin_def_config(codec,
3789 &spec->autocfg,
3790 spec->dmic_nids)) < 0)
c7d4b2fa 3791 return err;
82bc955f 3792 if (! spec->autocfg.line_outs)
869264c4 3793 return 0; /* can't find valid pin config */
19039bd0 3794
bcecd9bd
JZ		 3795 /* If we have no real line-out pin and multiple hp-outs, HPs should
3796 * be set up as multi-channel outputs.
3797 */
8af3aeb4 3798 if (is_dual_headphones(codec)) {
bcecd9bd
JZ		 3799 /* Copy hp_outs to line_outs, backup line_outs in
3800 * speaker_outs so that the following routines can handle
3801 * HP pins as primary outputs.
3802 */
c21ca4a8 3803 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ		 3804 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3805 sizeof(spec->autocfg.line_out_pins));
3806 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3807 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3808 sizeof(spec->autocfg.hp_pins));
3809 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI		 3810 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3811 spec->autocfg.hp_outs = 0;
dc04d1b4 3812 hp_swap = 1;
bcecd9bd 3813 }
09a99959 3814 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3815 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3816 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3817 u32 caps = query_amp_caps(codec,
3818 spec->autocfg.mono_out_pin, dir);
3819 hda_nid_t conn_list[1];
3820
3821 /* get the mixer node and then the mono mux if it exists */
3822 if (snd_hda_get_connections(codec,
3823 spec->autocfg.mono_out_pin, conn_list, 1) &&
3824 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3825 conn_list, 1) > 0) {
09a99959
MR		 3826
3827 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3828 int wid_type = get_wcaps_type(wcaps);
09a99959
MR		 3829 /* LR swap check, some stac925x have a mux that
3830 * changes the DACs output path instead of the
3831 * mono-mux path.
3832 */
3833 if (wid_type == AC_WID_AUD_SEL &&
3834 !(wcaps & AC_WCAP_LR_SWAP))
3835 spec->mono_nid = conn_list[0];
3836 }
d0513fc6
MR		 3837 if (dir) {
3838 hda_nid_t nid = spec->autocfg.mono_out_pin;
3839
3840 /* most mono outs have a least a mute/unmute switch */
3841 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3842 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3843 "Mono Playback Switch",
3844 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3845 if (err < 0)
3846 return err;
d0513fc6
MR		 3847 /* check for volume support for the amp */
3848 if ((caps & AC_AMPCAP_NUM_STEPS)
3849 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3850 err = stac92xx_add_control(spec,
3851 STAC_CTL_WIDGET_VOL,
3852 "Mono Playback Volume",
3853 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3854 if (err < 0)
3855 return err;
3856 }
09a99959
MR		 3857 }
3858
3859 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3860 AC_PINCTL_OUT_EN);
3861 }
bcecd9bd 3862
c21ca4a8
TI		 3863 if (!spec->multiout.num_dacs) {
3864 err = stac92xx_auto_fill_dac_nids(codec);
3865 if (err < 0)
19039bd0 3866 return err;
c9280d68
TI		 3867 err = stac92xx_auto_create_multi_out_ctls(codec,
3868 &spec->autocfg);
3869 if (err < 0)
3870 return err;
c21ca4a8 3871 }
c7d4b2fa 3872
1cd2224c
MR		 3873 /* setup analog beep controls */
3874 if (spec->anabeep_nid > 0) {
3875 err = stac92xx_auto_create_beep_ctls(codec,
3876 spec->anabeep_nid);
3877 if (err < 0)
3878 return err;
3879 }
3880
3881 /* setup digital beep controls and input device */
3882#ifdef CONFIG_SND_HDA_INPUT_BEEP
3883 if (spec->digbeep_nid > 0) {
3884 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3885 unsigned int caps;
1cd2224c
MR		 3886
3887 err = stac92xx_auto_create_beep_ctls(codec, nid);
3888 if (err < 0)
3889 return err;
3890 err = snd_hda_attach_beep_device(codec, nid);
3891 if (err < 0)
3892 return err;
d8d881dd
TI		 3893 if (codec->beep) {
3894 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3895 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI		 3896 /* if no beep switch is available, make its own one */
3897 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3898 if (!(caps & AC_AMPCAP_MUTE)) {
3899 err = stac92xx_beep_switch_ctl(codec);
3900 if (err < 0)
3901 return err;
3902 }
4d4e9bb3 3903 }
1cd2224c
MR		 3904 }
3905#endif
3906
0fb87bb4 3907 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML		 3908 if (err < 0)
3909 return err;
3910
dc04d1b4
TI		 3911 /* All output parsing done, now restore the swapped hp pins */
3912 if (hp_swap) {
3913 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3914 sizeof(spec->autocfg.hp_pins));
3915 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3916 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3917 spec->autocfg.line_outs = 0;
3918 }
0fb87bb4 3919
3d21d3f7
TI		 3920 if (stac_check_auto_mic(codec)) {
3921 spec->auto_mic = 1;
3922 /* only one capture for auto-mic */
3923 spec->num_adcs = 1;
3924 spec->num_caps = 1;
3925 spec->num_muxes = 1;
3926 }
3927
6479c631
TI		 3928 for (i = 0; i < spec->num_caps; i++) {
3929 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
3930 spec->capsws[i], i);
3931 if (err < 0)
3932 return err;
3933 }
3934
dc04d1b4 3935 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 3936 if (err < 0)
c7d4b2fa
M		 3937 return err;
3938
b22b4821
MR		 3939 if (spec->mono_nid > 0) {
3940 err = stac92xx_auto_create_mono_output_ctls(codec);
3941 if (err < 0)
3942 return err;
3943 }
2a9c7816 3944 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3945 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3946 &spec->autocfg)) < 0)
3947 return err;
4682eee0
MR		 3948 if (spec->num_muxes > 0) {
3949 err = stac92xx_auto_create_mux_input_ctls(codec);
3950 if (err < 0)
3951 return err;
3952 }
d9737751
MR		 3953 if (spec->num_smuxes > 0) {
3954 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3955 if (err < 0)
3956 return err;
3957 }
8b65727b 3958
e3c75964
TI		 3959 err = stac92xx_add_input_source(spec);
3960 if (err < 0)
3961 return err;
3962
c7d4b2fa 3963 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3964 if (spec->multiout.max_channels > 2)
c7d4b2fa 3965 spec->surr_switch = 1;
c7d4b2fa 3966
0852d7a6 3967 if (spec->autocfg.dig_outs)
3cc08dc6 3968 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3969 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3970 spec->dig_in_nid = dig_in;
c7d4b2fa 3971
603c4019
TI		 3972 if (spec->kctls.list)
3973 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 3974
3975 spec->input_mux = &spec->private_imux;
f8ccbf65
MR		 3976 if (!spec->dinput_mux)
3977 spec->dinput_mux = &spec->private_dimux;
d9737751 3978 spec->sinput_mux = &spec->private_smux;
b22b4821 3979 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M		 3980 return 1;
3981}
3982
82bc955f
TI		 3983/* add playback controls for HP output */
3984static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3985 struct auto_pin_cfg *cfg)
3986{
3987 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3988 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3989
3990 if (! pin)
3991 return 0;
3992
e35d9d6a 3993 if (is_jack_detectable(codec, pin))
82bc955f 3994 spec->hp_detect = 1;
82bc955f
TI		 3995
3996 return 0;
3997}
3998
160ea0dc
RF		 3999/* add playback controls for LFE output */
4000static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4001 struct auto_pin_cfg *cfg)
4002{
4003 struct sigmatel_spec *spec = codec->spec;
4004 int err;
4005 hda_nid_t lfe_pin = 0x0;
4006 int i;
4007
4008 /*
4009 * search speaker outs and line outs for a mono speaker pin
4010 * with an amp. If one is found, add LFE controls
4011 * for it.
4012 */
4013 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4014 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4015 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4016 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4017 if (wcaps == AC_WCAP_OUT_AMP)
4018 /* found a mono speaker with an amp, must be lfe */
4019 lfe_pin = pin;
4020 }
4021
4022 /* if speaker_outs is 0, then speakers may be in line_outs */
4023 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4024 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4025 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4026 unsigned int defcfg;
330ee995 4027 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4028 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4029 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 4030 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4031 if (wcaps == AC_WCAP_OUT_AMP)
4032 /* found a mono speaker with an amp,
4033 must be lfe */
4034 lfe_pin = pin;
4035 }
4036 }
4037 }
4038
4039 if (lfe_pin) {
7c7767eb 4040 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF		 4041 if (err < 0)
4042 return err;
4043 }
4044
4045 return 0;
4046}
4047
c7d4b2fa
M		 4048static int stac9200_parse_auto_config(struct hda_codec *codec)
4049{
4050 struct sigmatel_spec *spec = codec->spec;
4051 int err;
4052
df694daa 4053 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 4054 return err;
4055
4056 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4057 return err;
4058
82bc955f
TI		 4059 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4060 return err;
4061
160ea0dc
RF		 4062 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4063 return err;
4064
355a0ec4
TI		 4065 if (spec->num_muxes > 0) {
4066 err = stac92xx_auto_create_mux_input_ctls(codec);
4067 if (err < 0)
4068 return err;
4069 }
4070
e3c75964
TI		 4071 err = stac92xx_add_input_source(spec);
4072 if (err < 0)
4073 return err;
4074
0852d7a6 4075 if (spec->autocfg.dig_outs)
c7d4b2fa 4076 spec->multiout.dig_out_nid = 0x05;
82bc955f 4077 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4078 spec->dig_in_nid = 0x04;
c7d4b2fa 4079
603c4019
TI		 4080 if (spec->kctls.list)
4081 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M		 4082
4083 spec->input_mux = &spec->private_imux;
8b65727b 4084 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 4085
4086 return 1;
4087}
4088
62fe78e9
SR		 4089/*
4090 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4091 * funky external mute control using GPIO pins.
4092 */
4093
76e1ddfb 4094static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4095 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 4096{
4097 unsigned int gpiostate, gpiomask, gpiodir;
4098
45eebda7
VK		 4099 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4100
62fe78e9
SR		 4101 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4102 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4103 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 4104
4105 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4106 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4107 gpiomask |= mask;
62fe78e9
SR		 4108
4109 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4110 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4111 gpiodir |= dir_mask;
62fe78e9 4112
76e1ddfb 4113 /* Configure GPIOx as CMOS */
62fe78e9
SR		 4114 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4115
4116 snd_hda_codec_write(codec, codec->afg, 0,
4117 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 4118 snd_hda_codec_read(codec, codec->afg, 0,
4119 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 4120
4121 msleep(1);
4122
76e1ddfb
TI		 4123 snd_hda_codec_read(codec, codec->afg, 0,
4124 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 4125}
4126
74aeaabc
MR		 4127static int stac92xx_add_jack(struct hda_codec *codec,
4128 hda_nid_t nid, int type)
4129{
8c8145b8 4130#ifdef CONFIG_SND_HDA_INPUT_JACK
330ee995 4131 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
74aeaabc
MR		 4132 int connectivity = get_defcfg_connect(def_conf);
4133 char name[32];
95c09099 4134 int err;
74aeaabc
MR		 4135
4136 if (connectivity && connectivity != AC_JACK_PORT_FIXED)
4137 return 0;
4138
86de7416 4139 snprintf(name, sizeof(name), "%s at %s %s Jack",
74aeaabc
MR		 4140 snd_hda_get_jack_type(def_conf),
4141 snd_hda_get_jack_connectivity(def_conf),
4142 snd_hda_get_jack_location(def_conf));
4143
cd372fb3
TI		 4144 err = snd_hda_input_jack_add(codec, nid, type, name);
4145 if (err < 0)
95c09099 4146 return err;
cd372fb3 4147#endif /* CONFIG_SND_HDA_INPUT_JACK */
95c09099 4148 return 0;
74aeaabc
MR		 4149}
4150
c6e4c666
TI		 4151static int stac_add_event(struct sigmatel_spec *spec, hda_nid_t nid,
4152 unsigned char type, int data)
74aeaabc
MR		 4153{
4154 struct sigmatel_event *event;
4155
4156 snd_array_init(&spec->events, sizeof(*event), 32);
4157 event = snd_array_new(&spec->events);
4158 if (!event)
4159 return -ENOMEM;
4160 event->nid = nid;
c6e4c666
TI		 4161 event->type = type;
4162 event->tag = spec->events.used;
74aeaabc
MR		 4163 event->data = data;
4164
c6e4c666 4165 return event->tag;
74aeaabc
MR		 4166}
4167
c6e4c666 4168static struct sigmatel_event *stac_get_event(struct hda_codec *codec,
62558ce1 4169 hda_nid_t nid)
74aeaabc
MR		 4170{
4171 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4172 struct sigmatel_event *event = spec->events.list;
4173 int i;
4174
4175 for (i = 0; i < spec->events.used; i++, event++) {
62558ce1 4176 if (event->nid == nid)
c6e4c666 4177 return event;
74aeaabc 4178 }
c6e4c666 4179 return NULL;
74aeaabc
MR		 4180}
4181
c6e4c666
TI		 4182static struct sigmatel_event *stac_get_event_from_tag(struct hda_codec *codec,
4183 unsigned char tag)
314634bc 4184{
c6e4c666
TI		 4185 struct sigmatel_spec *spec = codec->spec;
4186 struct sigmatel_event *event = spec->events.list;
4187 int i;
4188
4189 for (i = 0; i < spec->events.used; i++, event++) {
4190 if (event->tag == tag)
4191 return event;
74aeaabc 4192 }
c6e4c666
TI		 4193 return NULL;
4194}
4195
62558ce1
TI		 4196/* check if given nid is a valid pin and no other events are assigned
4197 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4198 * Otherwise, returns zero.
4199 */
4200static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4201 unsigned int type)
c6e4c666
TI		 4202{
4203 struct sigmatel_event *event;
4204 int tag;
4205
e35d9d6a 4206 if (!is_jack_detectable(codec, nid))
62558ce1
TI		 4207 return 0;
4208 event = stac_get_event(codec, nid);
4209 if (event) {
4210 if (event->type != type)
4211 return 0;
c6e4c666 4212 tag = event->tag;
62558ce1 4213 } else {
c6e4c666 4214 tag = stac_add_event(codec->spec, nid, type, 0);
62558ce1
TI		 4215 if (tag < 0)
4216 return 0;
4217 }
c6e4c666
TI		 4218 snd_hda_codec_write_cache(codec, nid, 0,
4219 AC_VERB_SET_UNSOLICITED_ENABLE,
4220 AC_USRSP_EN | tag);
62558ce1 4221 return 1;
314634bc
TI		 4222}
4223
a64135a2
MR		 4224static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
4225{
4226 int i;
4227 for (i = 0; i < cfg->hp_outs; i++)
4228 if (cfg->hp_pins[i] == nid)
4229 return 1; /* nid is a HP-Out */
4230
4231 return 0; /* nid is not a HP-Out */
4232};
4233
b76c850f
MR		 4234static void stac92xx_power_down(struct hda_codec *codec)
4235{
4236 struct sigmatel_spec *spec = codec->spec;
4237
4238 /* power down inactive DACs */
2b63536f 4239 const hda_nid_t *dac;
b76c850f 4240 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4241 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4242 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR		 4243 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4244}
4245
f73d3585
TI		 4246static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4247 int enable);
4248
014c41fc
TI		 4249static inline int get_int_hint(struct hda_codec *codec, const char *key,
4250 int *valp)
4251{
4252 const char *p;
4253 p = snd_hda_get_hint(codec, key);
4254 if (p) {
4255 unsigned long val;
4256 if (!strict_strtoul(p, 0, &val)) {
4257 *valp = val;
4258 return 1;
4259 }
4260 }
4261 return 0;
4262}
4263
6565e4fa
TI		 4264/* override some hints from the hwdep entry */
4265static void stac_store_hints(struct hda_codec *codec)
4266{
4267 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI		 4268 int val;
4269
4270 val = snd_hda_get_bool_hint(codec, "hp_detect");
4271 if (val >= 0)
4272 spec->hp_detect = val;
014c41fc 4273 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI		 4274 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4275 spec->gpio_mask;
4276 }
014c41fc
TI		 4277 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4278 spec->gpio_mask &= spec->gpio_mask;
4279 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4280 spec->gpio_dir &= spec->gpio_mask;
4281 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4282 spec->eapd_mask &= spec->gpio_mask;
4283 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4284 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI		 4285 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4286 if (val >= 0)
4287 spec->eapd_switch = val;
014c41fc
TI		 4288 get_int_hint(codec, "gpio_led_polarity", &spec->gpio_led_polarity);
4289 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
45eebda7
VK		 4290 if (spec->gpio_led <= 8) {
4291 spec->gpio_mask |= spec->gpio_led;
4292 spec->gpio_dir |= spec->gpio_led;
4293 if (spec->gpio_led_polarity)
4294 spec->gpio_data |= spec->gpio_led;
4295 }
043958e6 4296 }
6565e4fa
TI		 4297}
4298
c7d4b2fa
M		 4299static int stac92xx_init(struct hda_codec *codec)
4300{
4301 struct sigmatel_spec *spec = codec->spec;
82bc955f 4302 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4303 unsigned int gpio;
e4973e1e 4304 int i;
c7d4b2fa 4305
c7d4b2fa
M		 4306 snd_hda_sequence_write(codec, spec->init);
4307
8daaaa97
MR		 4308 /* power down adcs initially */
4309 if (spec->powerdown_adcs)
4310 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4311 snd_hda_codec_write(codec,
8daaaa97
MR		 4312 spec->adc_nids[i], 0,
4313 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4314
6565e4fa
TI		 4315 /* override some hints */
4316 stac_store_hints(codec);
4317
f73d3585
TI		 4318 /* set up GPIO */
4319 gpio = spec->gpio_data;
4320 /* turn on EAPD statically when spec->eapd_switch isn't set.
4321 * otherwise, unsol event will turn it on/off dynamically
4322 */
4323 if (!spec->eapd_switch)
4324 gpio |= spec->eapd_mask;
4325 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4326
82bc955f
TI		 4327 /* set up pins */
4328 if (spec->hp_detect) {
505cb341 4329 /* Enable unsolicited responses on the HP widget */
74aeaabc 4330 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4331 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4332 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4333 }
1c4bdf9b
TI		 4334 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4335 cfg->speaker_outs > 0) {
fefd67f3 4336 /* enable pin-detect for line-outs as well */
15cfa2b3
TI		 4337 for (i = 0; i < cfg->line_outs; i++) {
4338 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI		 4339 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4340 }
4341 }
4342
0a07acaf
TI		 4343 /* force to enable the first line-out; the others are set up
4344 * in unsol_event
4345 */
4346 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4347 AC_PINCTL_OUT_EN);
82bc955f 4348 /* fake event to set up pins */
5f380eb1
TI		 4349 if (cfg->hp_pins[0])
4350 stac_issue_unsol_event(codec, cfg->hp_pins[0]);
4351 else if (cfg->line_out_pins[0])
4352 stac_issue_unsol_event(codec, cfg->line_out_pins[0]);
82bc955f
TI		 4353 } else {
4354 stac92xx_auto_init_multi_out(codec);
4355 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI		 4356 for (i = 0; i < cfg->hp_outs; i++)
4357 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4358 }
3d21d3f7 4359 if (spec->auto_mic) {
15b4f296 4360 /* initialize connection to analog input */
da2a2aaa
TI		 4361 if (spec->dmux_nids)
4362 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4363 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI		 4364 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4365 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC		 4366 if (enable_pin_detect(codec, spec->dock_mic.pin,
4367 STAC_MIC_EVENT))
4368 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4369 }
eea7dc93
TI		 4370 for (i = 0; i < cfg->num_inputs; i++) {
4371 hda_nid_t nid = cfg->inputs[i].pin;
4372 int type = cfg->inputs[i].type;
4373 unsigned int pinctl, conf;
86e2959a 4374 if (type == AUTO_PIN_MIC) {
eea7dc93
TI		 4375 /* for mic pins, force to initialize */
4376 pinctl = stac92xx_get_default_vref(codec, nid);
4377 pinctl |= AC_PINCTL_IN_EN;
4378 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4379 } else {
4380 pinctl = snd_hda_codec_read(codec, nid, 0,
4381 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4382 /* if PINCTL already set then skip */
4383 /* Also, if both INPUT and OUTPUT are set,
4384 * it must be a BIOS bug; need to override, too
4385 */
4386 if (!(pinctl & AC_PINCTL_IN_EN) ||
4387 (pinctl & AC_PINCTL_OUT_EN)) {
4388 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI		 4389 pinctl |= AC_PINCTL_IN_EN;
4390 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4391 }
c960a03b 4392 }
eea7dc93
TI		 4393 conf = snd_hda_codec_get_pincfg(codec, nid);
4394 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4395 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4396 stac_issue_unsol_event(codec, nid);
4397 }
82bc955f 4398 }
a64135a2
MR		 4399 for (i = 0; i < spec->num_dmics; i++)
4400 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4401 AC_PINCTL_IN_EN);
0852d7a6
TI		 4402 if (cfg->dig_out_pins[0])
4403 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI		 4404 AC_PINCTL_OUT_EN);
4405 if (cfg->dig_in_pin)
4406 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4407 AC_PINCTL_IN_EN);
a64135a2 4408 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 4409 hda_nid_t nid = spec->pwr_nids[i];
4410 int pinctl, def_conf;
f73d3585 4411
eb632128
TI		 4412 /* power on when no jack detection is available */
4413 if (!spec->hp_detect) {
4414 stac_toggle_power_map(codec, nid, 1);
4415 continue;
4416 }
4417
4418 if (is_nid_hp_pin(cfg, nid))
f73d3585
TI		 4419 continue; /* already has an unsol event */
4420
4421 pinctl = snd_hda_codec_read(codec, nid, 0,
4422 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 4423 /* outputs are only ports capable of power management
4424 * any attempts on powering down a input port cause the
4425 * referenced VREF to act quirky.
4426 */
eb632128
TI		 4427 if (pinctl & AC_PINCTL_IN_EN) {
4428 stac_toggle_power_map(codec, nid, 1);
a64135a2 4429 continue;
eb632128 4430 }
330ee995 4431 def_conf = snd_hda_codec_get_pincfg(codec, nid);
f73d3585 4432 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 4433 /* skip any ports that don't have jacks since presence
4434 * detection is useless */
f73d3585
TI		 4435 if (def_conf != AC_JACK_PORT_COMPLEX) {
4436 if (def_conf != AC_JACK_PORT_NONE)
4437 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 4438 continue;
f73d3585 4439 }
62558ce1
TI		 4440 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT))
4441 stac_issue_unsol_event(codec, nid);
a64135a2 4442 }
c21bd025 4443
c21bd025 4444 /* sync mute LED */
9e5341b9
TI		 4445 if (spec->gpio_led)
4446 hda_call_check_power_status(codec, 0x01);
b76c850f
MR		 4447 if (spec->dac_list)
4448 stac92xx_power_down(codec);
c7d4b2fa
M		 4449 return 0;
4450}
4451
603c4019
TI		 4452static void stac92xx_free_kctls(struct hda_codec *codec)
4453{
4454 struct sigmatel_spec *spec = codec->spec;
4455
4456 if (spec->kctls.list) {
4457 struct snd_kcontrol_new *kctl = spec->kctls.list;
4458 int i;
4459 for (i = 0; i < spec->kctls.used; i++)
4460 kfree(kctl[i].name);
4461 }
4462 snd_array_free(&spec->kctls);
4463}
4464
45eebda7
VK		 4465static void stac92xx_shutup_pins(struct hda_codec *codec)
4466{
4467 unsigned int i, def_conf;
4468
4469 if (codec->bus->shutdown)
4470 return;
4471 for (i = 0; i < codec->init_pins.used; i++) {
4472 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4473 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4474 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
4475 snd_hda_codec_write(codec, pin->nid, 0,
4476 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
4477 }
4478}
4479
167eae5a
TI		 4480static void stac92xx_shutup(struct hda_codec *codec)
4481{
4482 struct sigmatel_spec *spec = codec->spec;
167eae5a 4483
45eebda7 4484 stac92xx_shutup_pins(codec);
167eae5a
TI		 4485
4486 if (spec->eapd_mask)
4487 stac_gpio_set(codec, spec->gpio_mask,
4488 spec->gpio_dir, spec->gpio_data &
4489 ~spec->eapd_mask);
4490}
4491
2f2f4251
M		 4492static void stac92xx_free(struct hda_codec *codec)
4493{
c7d4b2fa 4494 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 4495
4496 if (! spec)
4497 return;
4498
167eae5a 4499 stac92xx_shutup(codec);
cd372fb3 4500 snd_hda_input_jack_free(codec);
74aeaabc 4501 snd_array_free(&spec->events);
11b44bbd 4502
c7d4b2fa 4503 kfree(spec);
1cd2224c 4504 snd_hda_detach_beep_device(codec);
2f2f4251
M		 4505}
4506
4e55096e
M		 4507static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4508 unsigned int flag)
4509{
8ce84198
TI		 4510 unsigned int old_ctl, pin_ctl;
4511
4512 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4513 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4514
f9acba43
TI		 4515 if (pin_ctl & AC_PINCTL_IN_EN) {
4516 /*
4517 * we need to check the current set-up direction of
4518 * shared input pins since they can be switched via
4519 * "xxx as Output" mixer switch
4520 */
4521 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4522 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI		 4523 return;
4524 }
4525
8ce84198 4526 old_ctl = pin_ctl;
7b043899
SL		 4527 /* if setting pin direction bits, clear the current
4528 direction bits first */
4529 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4530 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4531
8ce84198
TI		 4532 pin_ctl |= flag;
4533 if (old_ctl != pin_ctl)
4534 snd_hda_codec_write_cache(codec, nid, 0,
4535 AC_VERB_SET_PIN_WIDGET_CONTROL,
4536 pin_ctl);
4e55096e
M		 4537}
4538
4539static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4540 unsigned int flag)
4541{
4542 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4543 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198
TI		 4544 if (pin_ctl & flag)
4545 snd_hda_codec_write_cache(codec, nid, 0,
4546 AC_VERB_SET_PIN_WIDGET_CONTROL,
4547 pin_ctl & ~flag);
4e55096e
M		 4548}
4549
d56757ab 4550static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 4551{
4552 if (!nid)
4553 return 0;
a252c81a 4554 return snd_hda_jack_detect(codec, nid);
314634bc
TI		 4555}
4556
fefd67f3
TI		 4557static void stac92xx_line_out_detect(struct hda_codec *codec,
4558 int presence)
4559{
4560 struct sigmatel_spec *spec = codec->spec;
4561 struct auto_pin_cfg *cfg = &spec->autocfg;
4562 int i;
4563
4564 for (i = 0; i < cfg->line_outs; i++) {
4565 if (presence)
4566 break;
4567 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4568 if (presence) {
4569 unsigned int pinctl;
4570 pinctl = snd_hda_codec_read(codec,
4571 cfg->line_out_pins[i], 0,
4572 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4573 if (pinctl & AC_PINCTL_IN_EN)
4574 presence = 0; /* mic- or line-input */
4575 }
4576 }
4577
4578 if (presence) {
4579 /* disable speakers */
4580 for (i = 0; i < cfg->speaker_outs; i++)
4581 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4582 AC_PINCTL_OUT_EN);
4583 if (spec->eapd_mask && spec->eapd_switch)
4584 stac_gpio_set(codec, spec->gpio_mask,
4585 spec->gpio_dir, spec->gpio_data &
4586 ~spec->eapd_mask);
4587 } else {
4588 /* enable speakers */
4589 for (i = 0; i < cfg->speaker_outs; i++)
4590 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4591 AC_PINCTL_OUT_EN);
4592 if (spec->eapd_mask && spec->eapd_switch)
4593 stac_gpio_set(codec, spec->gpio_mask,
4594 spec->gpio_dir, spec->gpio_data |
4595 spec->eapd_mask);
4596 }
4597}
4598
d7a89436
TI		 4599/* return non-zero if the hp-pin of the given array index isn't
4600 * a jack-detection target
4601 */
4602static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4603{
4604 struct auto_pin_cfg *cfg = &spec->autocfg;
4605
4606 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4607 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4608 return 1;
c21ca4a8 4609 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI		 4610 return 1;
4611 /* ignore if the pin is set as line-out */
4612 if (cfg->hp_pins[i] == spec->hp_switch)
4613 return 1;
4614 return 0;
4615}
4616
c6e4c666 4617static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M		 4618{
4619 struct sigmatel_spec *spec = codec->spec;
4620 struct auto_pin_cfg *cfg = &spec->autocfg;
4621 int i, presence;
4622
eb06ed8f 4623 presence = 0;
4fe5195c
MR		 4624 if (spec->gpio_mute)
4625 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4626 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4627
eb06ed8f 4628 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 4629 if (presence)
4630 break;
d7a89436
TI		 4631 if (no_hp_sensing(spec, i))
4632 continue;
e6e3ea25
TI		 4633 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4634 if (presence) {
4635 unsigned int pinctl;
4636 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4637 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4638 if (pinctl & AC_PINCTL_IN_EN)
4639 presence = 0; /* mic- or line-input */
4640 }
eb06ed8f 4641 }
4e55096e
M		 4642
4643 if (presence) {
d7a89436 4644 /* disable lineouts */
7c2ba97b 4645 if (spec->hp_switch)
d7a89436
TI		 4646 stac92xx_reset_pinctl(codec, spec->hp_switch,
4647 AC_PINCTL_OUT_EN);
4e55096e
M		 4648 for (i = 0; i < cfg->line_outs; i++)
4649 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4650 AC_PINCTL_OUT_EN);
4e55096e 4651 } else {
d7a89436 4652 /* enable lineouts */
7c2ba97b 4653 if (spec->hp_switch)
d7a89436
TI		 4654 stac92xx_set_pinctl(codec, spec->hp_switch,
4655 AC_PINCTL_OUT_EN);
4e55096e
M		 4656 for (i = 0; i < cfg->line_outs; i++)
4657 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4658 AC_PINCTL_OUT_EN);
4e55096e 4659 }
fefd67f3 4660 stac92xx_line_out_detect(codec, presence);
d7a89436
TI		 4661 /* toggle hp outs */
4662 for (i = 0; i < cfg->hp_outs; i++) {
4663 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4664 if (no_hp_sensing(spec, i))
4665 continue;
4666 if (presence)
4667 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI		 4668#if 0 /* FIXME */
4669/* Resetting the pinctl like below may lead to (a sort of) regressions
4670 * on some devices since they use the HP pin actually for line/speaker
4671 * outs although the default pin config shows a different pin (that is
4672 * wrong and useless).
4673 *
4674 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4675 * But, disabling the code below just works around it, and I'm too tired of
4676 * bug reports with such devices...
4677 */
d7a89436
TI		 4678 else
4679 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4680#endif /* FIXME */
d7a89436 4681 }
4e55096e
M		 4682}
4683
f73d3585
TI		 4684static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4685 int enable)
a64135a2
MR		 4686{
4687 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 4688 unsigned int idx, val;
4689
4690 for (idx = 0; idx < spec->num_pwrs; idx++) {
4691 if (spec->pwr_nids[idx] == nid)
4692 break;
4693 }
4694 if (idx >= spec->num_pwrs)
4695 return;
d0513fc6
MR		 4696
4697 /* several codecs have two power down bits */
4698 if (spec->pwr_mapping)
4699 idx = spec->pwr_mapping[idx];
4700 else
4701 idx = 1 << idx;
a64135a2 4702
f73d3585
TI		 4703 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4704 if (enable)
a64135a2
MR		 4705 val &= ~idx;
4706 else
4707 val |= idx;
4708
4709 /* power down unused output ports */
4710 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
74aeaabc
MR		 4711}
4712
f73d3585
TI		 4713static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4714{
e6e3ea25 4715 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4716}
a64135a2 4717
ab5a6ebe
VK		 4718/* get the pin connection (fixed, none, etc) */
4719static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4720{
4721 struct sigmatel_spec *spec = codec->spec;
4722 unsigned int cfg;
4723
4724 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4725 return get_defcfg_connect(cfg);
4726}
4727
4728static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4729 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK		 4730{
4731 struct sigmatel_spec *spec = codec->spec;
4732 int idx, num;
4733 unsigned int def_conf;
4734
4735 for (num = 0; num < num_nids; num++) {
4736 for (idx = 0; idx < spec->num_pins; idx++)
4737 if (spec->pin_nids[idx] == nids[num])
4738 break;
4739 if (idx >= spec->num_pins)
4740 break;
4741 def_conf = stac_get_defcfg_connect(codec, idx);
4742 if (def_conf == AC_JACK_PORT_NONE)
4743 break;
4744 }
4745 return num;
4746}
4747
3d21d3f7
TI		 4748static void stac92xx_mic_detect(struct hda_codec *codec)
4749{
4750 struct sigmatel_spec *spec = codec->spec;
4751 struct sigmatel_mic_route *mic;
4752
4753 if (get_pin_presence(codec, spec->ext_mic.pin))
4754 mic = &spec->ext_mic;
9907790a
CC		 4755 else if (get_pin_presence(codec, spec->dock_mic.pin))
4756 mic = &spec->dock_mic;
3d21d3f7
TI		 4757 else
4758 mic = &spec->int_mic;
02d33322 4759 if (mic->dmux_idx >= 0)
3d21d3f7
TI		 4760 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4761 AC_VERB_SET_CONNECT_SEL,
4762 mic->dmux_idx);
02d33322 4763 if (mic->mux_idx >= 0)
3d21d3f7
TI		 4764 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4765 AC_VERB_SET_CONNECT_SEL,
4766 mic->mux_idx);
4767}
4768
62558ce1 4769static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
c6e4c666 4770{
62558ce1 4771 struct sigmatel_event *event = stac_get_event(codec, nid);
c6e4c666
TI		 4772 if (!event)
4773 return;
4774 codec->patch_ops.unsol_event(codec, (unsigned)event->tag << 26);
4775}
4776
314634bc
TI		 4777static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4778{
a64135a2 4779 struct sigmatel_spec *spec = codec->spec;
c6e4c666
TI		 4780 struct sigmatel_event *event;
4781 int tag, data;
a64135a2 4782
c6e4c666
TI		 4783 tag = (res >> 26) & 0x7f;
4784 event = stac_get_event_from_tag(codec, tag);
4785 if (!event)
4786 return;
4787
4788 switch (event->type) {
314634bc 4789 case STAC_HP_EVENT:
fefd67f3 4790 case STAC_LO_EVENT:
16ffe32c 4791 stac92xx_hp_detect(codec);
fefd67f3 4792 break;
3d21d3f7
TI		 4793 case STAC_MIC_EVENT:
4794 stac92xx_mic_detect(codec);
4795 break;
4796 }
4797
4798 switch (event->type) {
4799 case STAC_HP_EVENT:
fefd67f3 4800 case STAC_LO_EVENT:
3d21d3f7 4801 case STAC_MIC_EVENT:
74aeaabc 4802 case STAC_INSERT_EVENT:
a64135a2 4803 case STAC_PWR_EVENT:
c6e4c666
TI		 4804 if (spec->num_pwrs > 0)
4805 stac92xx_pin_sense(codec, event->nid);
cd372fb3 4806 snd_hda_input_jack_report(codec, event->nid);
fd60cc89
MR		 4807
4808 switch (codec->subsystem_id) {
4809 case 0x103c308f:
4810 if (event->nid == 0xb) {
4811 int pin = AC_PINCTL_IN_EN;
4812
4813 if (get_pin_presence(codec, 0xa)
4814 && get_pin_presence(codec, 0xb))
4815 pin |= AC_PINCTL_VREF_80;
4816 if (!get_pin_presence(codec, 0xb))
4817 pin |= AC_PINCTL_VREF_80;
4818
4819 /* toggle VREF state based on mic + hp pin
4820 * status
4821 */
4822 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4823 }
4824 }
72474be6 4825 break;
c6e4c666
TI		 4826 case STAC_VREF_EVENT:
4827 data = snd_hda_codec_read(codec, codec->afg, 0,
4828 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR		 4829 /* toggle VREF state based on GPIOx status */
4830 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
c6e4c666 4831 !!(data & (1 << event->data)));
72474be6 4832 break;
314634bc
TI		 4833 }
4834}
4835
d38cce70
KG		 4836static int hp_blike_system(u32 subsystem_id);
4837
4838static void set_hp_led_gpio(struct hda_codec *codec)
4839{
4840 struct sigmatel_spec *spec = codec->spec;
07f80449
TI		 4841 unsigned int gpio;
4842
26ebe0a2
TI		 4843 if (spec->gpio_led)
4844 return;
4845
07f80449
TI		 4846 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4847 gpio &= AC_GPIO_IO_COUNT;
4848 if (gpio > 3)
4849 spec->gpio_led = 0x08; /* GPIO 3 */
4850 else
4851 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG		 4852}
4853
c357aab0
VK		 4854/*
4855 * This method searches for the mute LED GPIO configuration
4856 * provided as OEM string in SMBIOS. The format of that string
4857 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4858 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4859 * that corresponds to the NOT muted state of the master volume
4860 * and G is the index of the GPIO to use as the mute LED control (0..9)
4861 * If _G portion is missing it is assigned based on the codec ID
4862 *
4863 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4864 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG		 4865 *
4866 *
4867 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4868 * SMBIOS - at least the ones I have seen do not have them - which include
4869 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4870 * HP Pavilion dv9500t CTO.
4871 * Need more information on whether it is true across the entire series.
4872 * -- kunal
c357aab0 4873 */
dce17d4f 4874static int find_mute_led_gpio(struct hda_codec *codec, int default_polarity)
c357aab0
VK		 4875{
4876 struct sigmatel_spec *spec = codec->spec;
4877 const struct dmi_device *dev = NULL;
4878
4879 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4880 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4881 NULL, dev))) {
45eebda7 4882 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG		 4883 &spec->gpio_led_polarity,
4884 &spec->gpio_led) == 2) {
45eebda7
VK		 4885 if (spec->gpio_led < 4)
4886 spec->gpio_led = 1 << spec->gpio_led;
c357aab0
VK		 4887 return 1;
4888 }
4889 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG		 4890 &spec->gpio_led_polarity) == 1) {
4891 set_hp_led_gpio(codec);
4892 return 1;
c357aab0
VK		 4893 }
4894 }
d38cce70
KG		 4895
4896 /*
4897 * Fallback case - if we don't find the DMI strings,
4898 * we statically set the GPIO - if not a B-series system.
4899 */
4900 if (!hp_blike_system(codec->subsystem_id)) {
4901 set_hp_led_gpio(codec);
dce17d4f 4902 spec->gpio_led_polarity = default_polarity;
d38cce70
KG		 4903 return 1;
4904 }
c357aab0
VK		 4905 }
4906 return 0;
4907}
4908
4909static int hp_blike_system(u32 subsystem_id)
78987bdc
RD		 4910{
4911 switch (subsystem_id) {
c357aab0
VK		 4912 case 0x103c1520:
4913 case 0x103c1521:
4914 case 0x103c1523:
4915 case 0x103c1524:
4916 case 0x103c1525:
78987bdc
RD		 4917 case 0x103c1722:
4918 case 0x103c1723:
4919 case 0x103c1724:
4920 case 0x103c1725:
4921 case 0x103c1726:
4922 case 0x103c1727:
4923 case 0x103c1728:
4924 case 0x103c1729:
c357aab0
VK		 4925 case 0x103c172a:
4926 case 0x103c172b:
4927 case 0x103c307e:
4928 case 0x103c307f:
4929 case 0x103c3080:
4930 case 0x103c3081:
4931 case 0x103c7007:
4932 case 0x103c7008:
78987bdc
RD		 4933 return 1;
4934 }
4935 return 0;
4936}
4937
2d34e1b3
TI		 4938#ifdef CONFIG_PROC_FS
4939static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4940 struct hda_codec *codec, hda_nid_t nid)
4941{
4942 if (nid == codec->afg)
4943 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4944 snd_hda_codec_read(codec, nid, 0, 0x0fec, 0x0));
4945}
4946
4947static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4948 struct hda_codec *codec,
4949 unsigned int verb)
4950{
4951 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4952 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4953}
4954
4955/* stac92hd71bxx, stac92hd73xx */
4956static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4957 struct hda_codec *codec, hda_nid_t nid)
4958{
4959 stac92hd_proc_hook(buffer, codec, nid);
4960 if (nid == codec->afg)
4961 analog_loop_proc_hook(buffer, codec, 0xfa0);
4962}
4963
4964static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4965 struct hda_codec *codec, hda_nid_t nid)
4966{
4967 if (nid == codec->afg)
4968 analog_loop_proc_hook(buffer, codec, 0xfe0);
4969}
4970
4971static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4972 struct hda_codec *codec, hda_nid_t nid)
4973{
4974 if (nid == codec->afg)
4975 analog_loop_proc_hook(buffer, codec, 0xfeb);
4976}
4977#else
4978#define stac92hd_proc_hook NULL
4979#define stac92hd7x_proc_hook NULL
4980#define stac9205_proc_hook NULL
4981#define stac927x_proc_hook NULL
4982#endif
4983
2a43952a 4984#ifdef CONFIG_PM
ff6fdc37
M		 4985static int stac92xx_resume(struct hda_codec *codec)
4986{
dc81bed1
TI		 4987 struct sigmatel_spec *spec = codec->spec;
4988
2c885878 4989 stac92xx_init(codec);
82beb8fd
TI		 4990 snd_hda_codec_resume_amp(codec);
4991 snd_hda_codec_resume_cache(codec);
2c885878 4992 /* fake event to set up pins again to override cached values */
5f380eb1
TI		 4993 if (spec->hp_detect) {
4994 if (spec->autocfg.hp_pins[0])
4995 stac_issue_unsol_event(codec, spec->autocfg.hp_pins[0]);
4996 else if (spec->autocfg.line_out_pins[0])
4997 stac_issue_unsol_event(codec,
4998 spec->autocfg.line_out_pins[0]);
4999 }
ff6fdc37
M		 5000 return 0;
5001}
c6798d2b 5002
45eebda7
VK		 5003static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
5004{
5005 stac92xx_shutup(codec);
5006 return 0;
5007}
5008
7df1ce1a 5009#ifdef CONFIG_SND_HDA_POWER_SAVE
45eebda7
VK		 5010static int stac92xx_pre_resume(struct hda_codec *codec)
5011{
5012 struct sigmatel_spec *spec = codec->spec;
5013
5014 /* sync mute LED */
5015 if (spec->gpio_led) {
5016 if (spec->gpio_led <= 8) {
5017 stac_gpio_set(codec, spec->gpio_mask,
5018 spec->gpio_dir, spec->gpio_data);
5019 } else {
5020 stac_vrefout_set(codec,
5021 spec->gpio_led, spec->vref_led);
5022 }
5023 }
5024 return 0;
5025}
5026
5027static int stac92xx_post_suspend(struct hda_codec *codec)
5028{
5029 struct sigmatel_spec *spec = codec->spec;
5030 if (spec->gpio_led > 8) {
5031 /* with vref-out pin used for mute led control
5032 * codec AFG is prevented from D3 state, but on
5033 * system suspend it can (and should) be used
5034 */
5035 snd_hda_codec_read(codec, codec->afg, 0,
5036 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
5037 }
5038 return 0;
5039}
5040
5041static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5042 unsigned int power_state)
5043{
5044 unsigned int afg_power_state = power_state;
5045 struct sigmatel_spec *spec = codec->spec;
5046
5047 if (power_state == AC_PWRST_D3) {
5048 if (spec->gpio_led > 8) {
5049 /* with vref-out pin used for mute led control
5050 * codec AFG is prevented from D3 state
5051 */
5052 afg_power_state = AC_PWRST_D1;
5053 }
5054 /* this delay seems necessary to avoid click noise at power-down */
5055 msleep(100);
5056 }
5057 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5058 afg_power_state);
5059 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5060}
5061
ae6241fb 5062/*
7df1ce1a
VK		 5063 * For this feature CONFIG_SND_HDA_POWER_SAVE is needed
5064 * as mute LED state is updated in check_power_status hook
ae6241fb 5065 */
7df1ce1a 5066static int stac92xx_update_led_status(struct hda_codec *codec)
ae6241fb
CP		 5067{
5068 struct sigmatel_spec *spec = codec->spec;
7df1ce1a 5069 int i, num_ext_dacs, muted = 1;
45eebda7 5070 unsigned int muted_lvl, notmtd_lvl;
7df1ce1a 5071 hda_nid_t nid;
6fce61ae 5072
45eebda7
VK		 5073 if (!spec->gpio_led)
5074 return 0;
5075
c21bd025
TI		 5076 for (i = 0; i < spec->multiout.num_dacs; i++) {
5077 nid = spec->multiout.dac_nids[i];
5078 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5079 HDA_AMP_MUTE)) {
5080 muted = 0; /* something heard */
5081 break;
5bdaaada 5082 }
ae6241fb 5083 }
7df1ce1a
VK		 5084 if (muted && spec->multiout.hp_nid)
5085 if (!(snd_hda_codec_amp_read(codec,
5086 spec->multiout.hp_nid, 0, HDA_OUTPUT, 0) &
5087 HDA_AMP_MUTE)) {
5088 muted = 0; /* HP is not muted */
5089 }
5090 num_ext_dacs = ARRAY_SIZE(spec->multiout.extra_out_nid);
5091 for (i = 0; muted && i < num_ext_dacs; i++) {
5092 nid = spec->multiout.extra_out_nid[i];
5093 if (nid == 0)
5094 break;
5095 if (!(snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
5096 HDA_AMP_MUTE)) {
5097 muted = 0; /* extra output is not muted */
5098 }
5099 }
45eebda7
VK		 5100 /*polarity defines *not* muted state level*/
5101 if (spec->gpio_led <= 8) {
5102 if (muted)
5103 spec->gpio_data &= ~spec->gpio_led; /* orange */
5104 else
5105 spec->gpio_data |= spec->gpio_led; /* white */
ae6241fb 5106
45eebda7
VK		 5107 if (!spec->gpio_led_polarity) {
5108 /* LED state is inverted on these systems */
5109 spec->gpio_data ^= spec->gpio_led;
5110 }
5111 stac_gpio_set(codec, spec->gpio_mask,
5112 spec->gpio_dir, spec->gpio_data);
5113 } else {
5114 notmtd_lvl = spec->gpio_led_polarity ?
5115 AC_PINCTL_VREF_HIZ : AC_PINCTL_VREF_GRD;
5116 muted_lvl = spec->gpio_led_polarity ?
5117 AC_PINCTL_VREF_GRD : AC_PINCTL_VREF_HIZ;
5118 spec->vref_led = muted ? muted_lvl : notmtd_lvl;
5119 stac_vrefout_set(codec, spec->gpio_led, spec->vref_led);
c21bd025 5120 }
b4e81876
TI		 5121 return 0;
5122}
7df1ce1a
VK		 5123
5124/*
5125 * use power check for controlling mute led of HP notebooks
5126 */
5127static int stac92xx_check_power_status(struct hda_codec *codec,
5128 hda_nid_t nid)
5129{
5130 stac92xx_update_led_status(codec);
5131
5132 return 0;
5133}
45eebda7 5134#endif /* CONFIG_SND_HDA_POWER_SAVE */
2a43952a 5135#endif /* CONFIG_PM */
ff6fdc37 5136
2b63536f 5137static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M		 5138 .build_controls = stac92xx_build_controls,
5139 .build_pcms = stac92xx_build_pcms,
5140 .init = stac92xx_init,
5141 .free = stac92xx_free,
4e55096e 5142 .unsol_event = stac92xx_unsol_event,
2a43952a 5143#ifdef CONFIG_PM
c6798d2b 5144 .suspend = stac92xx_suspend,
ff6fdc37
M		 5145 .resume = stac92xx_resume,
5146#endif
fb8d1a34 5147 .reboot_notify = stac92xx_shutup,
2f2f4251
M		 5148};
5149
5150static int patch_stac9200(struct hda_codec *codec)
5151{
5152 struct sigmatel_spec *spec;
c7d4b2fa 5153 int err;
2f2f4251 5154
e560d8d8 5155 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 5156 if (spec == NULL)
5157 return -ENOMEM;
5158
a252c81a 5159 codec->no_trigger_sense = 1;
2f2f4251 5160 codec->spec = spec;
1b0e372d 5161 spec->linear_tone_beep = 1;
a4eed138 5162 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 5163 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 5164 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5165 stac9200_models,
5166 stac9200_cfg_tbl);
330ee995 5167 if (spec->board_config < 0)
9a11f1aa
TI		 5168 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5169 codec->chip_name);
330ee995
TI		 5170 else
5171 stac92xx_set_config_regs(codec,
af9f341a 5172 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M		 5173
5174 spec->multiout.max_channels = 2;
5175 spec->multiout.num_dacs = 1;
5176 spec->multiout.dac_nids = stac9200_dac_nids;
5177 spec->adc_nids = stac9200_adc_nids;
5178 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5179 spec->num_muxes = 1;
8b65727b 5180 spec->num_dmics = 0;
9e05b7a3 5181 spec->num_adcs = 1;
a64135a2 5182 spec->num_pwrs = 0;
c7d4b2fa 5183
58eec423
MCC		 5184 if (spec->board_config == STAC_9200_M4 ||
5185 spec->board_config == STAC_9200_M4_2 ||
bf277785 5186 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 5187 spec->init = stac9200_eapd_init;
5188 else
5189 spec->init = stac9200_core_init;
2f2f4251 5190 spec->mixer = stac9200_mixer;
c7d4b2fa 5191
117f257d
TI		 5192 if (spec->board_config == STAC_9200_PANASONIC) {
5193 spec->gpio_mask = spec->gpio_dir = 0x09;
5194 spec->gpio_data = 0x00;
5195 }
5196
c7d4b2fa
M		 5197 err = stac9200_parse_auto_config(codec);
5198 if (err < 0) {
5199 stac92xx_free(codec);
5200 return err;
5201 }
2f2f4251 5202
2acc9dcb
TI		 5203 /* CF-74 has no headphone detection, and the driver should *NOT*
5204 * do detection and HP/speaker toggle because the hardware does it.
5205 */
5206 if (spec->board_config == STAC_9200_PANASONIC)
5207 spec->hp_detect = 0;
5208
2f2f4251
M		 5209 codec->patch_ops = stac92xx_patch_ops;
5210
5211 return 0;
5212}
5213
8e21c34c
TD		 5214static int patch_stac925x(struct hda_codec *codec)
5215{
5216 struct sigmatel_spec *spec;
5217 int err;
5218
5219 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5220 if (spec == NULL)
5221 return -ENOMEM;
5222
a252c81a 5223 codec->no_trigger_sense = 1;
8e21c34c 5224 codec->spec = spec;
1b0e372d 5225 spec->linear_tone_beep = 1;
a4eed138 5226 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c 5227 spec->pin_nids = stac925x_pin_nids;
9cb36c2a
MCC		 5228
5229 /* Check first for codec ID */
5230 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5231 STAC_925x_MODELS,
5232 stac925x_models,
5233 stac925x_codec_id_cfg_tbl);
5234
5235 /* Now checks for PCI ID, if codec ID is not found */
5236 if (spec->board_config < 0)
5237 spec->board_config = snd_hda_check_board_config(codec,
5238 STAC_925x_MODELS,
8e21c34c
TD		 5239 stac925x_models,
5240 stac925x_cfg_tbl);
9e507abd 5241 again:
330ee995 5242 if (spec->board_config < 0)
9a11f1aa
TI		 5243 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5244 codec->chip_name);
330ee995
TI		 5245 else
5246 stac92xx_set_config_regs(codec,
af9f341a 5247 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD		 5248
5249 spec->multiout.max_channels = 2;
5250 spec->multiout.num_dacs = 1;
5251 spec->multiout.dac_nids = stac925x_dac_nids;
5252 spec->adc_nids = stac925x_adc_nids;
5253 spec->mux_nids = stac925x_mux_nids;
5254 spec->num_muxes = 1;
9e05b7a3 5255 spec->num_adcs = 1;
a64135a2 5256 spec->num_pwrs = 0;
2c11f955
TD		 5257 switch (codec->vendor_id) {
5258 case 0x83847632: /* STAC9202 */
5259 case 0x83847633: /* STAC9202D */
5260 case 0x83847636: /* STAC9251 */
5261 case 0x83847637: /* STAC9251D */
f6e9852a 5262 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5263 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 5264 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5265 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 5266 break;
5267 default:
5268 spec->num_dmics = 0;
5269 break;
5270 }
8e21c34c
TD		 5271
5272 spec->init = stac925x_core_init;
5273 spec->mixer = stac925x_mixer;
6479c631
TI		 5274 spec->num_caps = 1;
5275 spec->capvols = stac925x_capvols;
5276 spec->capsws = stac925x_capsws;
8e21c34c
TD		 5277
5278 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 5279 if (!err) {
5280 if (spec->board_config < 0) {
5281 printk(KERN_WARNING "hda_codec: No auto-config is "
5282 "available, default to model=ref\n");
5283 spec->board_config = STAC_925x_REF;
5284 goto again;
5285 }
5286 err = -EINVAL;
5287 }
8e21c34c
TD		 5288 if (err < 0) {
5289 stac92xx_free(codec);
5290 return err;
5291 }
5292
5293 codec->patch_ops = stac92xx_patch_ops;
5294
5295 return 0;
5296}
5297
e1f0d669
MR		 5298static int patch_stac92hd73xx(struct hda_codec *codec)
5299{
5300 struct sigmatel_spec *spec;
5301 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
5302 int err = 0;
c21ca4a8 5303 int num_dacs;
e1f0d669
MR		 5304
5305 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5306 if (spec == NULL)
5307 return -ENOMEM;
5308
a252c81a 5309 codec->no_trigger_sense = 1;
e1f0d669 5310 codec->spec = spec;
1b0e372d 5311 spec->linear_tone_beep = 0;
e99d32b3 5312 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 5313 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
5314 spec->pin_nids = stac92hd73xx_pin_nids;
5315 spec->board_config = snd_hda_check_board_config(codec,
5316 STAC_92HD73XX_MODELS,
5317 stac92hd73xx_models,
5318 stac92hd73xx_cfg_tbl);
842ae638
TI		 5319 /* check codec subsystem id if not found */
5320 if (spec->board_config < 0)
5321 spec->board_config =
5322 snd_hda_check_board_codec_sid_config(codec,
5323 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5324 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5325again:
330ee995 5326 if (spec->board_config < 0)
9a11f1aa
TI		 5327 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5328 codec->chip_name);
330ee995
TI		 5329 else
5330 stac92xx_set_config_regs(codec,
af9f341a 5331 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5332
c21ca4a8 5333 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR		 5334 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5335
c21ca4a8 5336 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 5337 printk(KERN_WARNING "hda_codec: Could not determine "
5338 "number of channels defaulting to DAC count\n");
c21ca4a8 5339 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5340 }
e2aec171 5341 spec->init = stac92hd73xx_core_init;
c21ca4a8 5342 switch (num_dacs) {
e1f0d669 5343 case 0x3: /* 6 Channel */
d78d7a90 5344 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR		 5345 break;
5346 case 0x4: /* 8 Channel */
d78d7a90 5347 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR		 5348 break;
5349 case 0x5: /* 10 Channel */
d78d7a90
TI		 5350 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5351 break;
c21ca4a8
TI		 5352 }
5353 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5354
e1f0d669
MR		 5355 spec->aloopback_mask = 0x01;
5356 spec->aloopback_shift = 8;
5357
1cd2224c 5358 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 5359 spec->mux_nids = stac92hd73xx_mux_nids;
5360 spec->adc_nids = stac92hd73xx_adc_nids;
5361 spec->dmic_nids = stac92hd73xx_dmic_nids;
5362 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5363 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR		 5364
5365 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5366 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5367 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5368
6479c631
TI		 5369 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5370 spec->capvols = stac92hd73xx_capvols;
5371 spec->capsws = stac92hd73xx_capsws;
5372
a7662640 5373 switch (spec->board_config) {
6b3ab21e 5374 case STAC_DELL_EQ:
d654a660 5375 spec->init = dell_eq_core_init;
6b3ab21e 5376 /* fallthru */
661cd8fb
TI		 5377 case STAC_DELL_M6_AMIC:
5378 case STAC_DELL_M6_DMIC:
5379 case STAC_DELL_M6_BOTH:
2a9c7816 5380 spec->num_smuxes = 0;
c0cea0d0 5381 spec->eapd_switch = 0;
6b3ab21e 5382
661cd8fb
TI		 5383 switch (spec->board_config) {
5384 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5385 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR		 5386 spec->num_dmics = 0;
5387 break;
661cd8fb 5388 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5389 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5390 spec->num_dmics = 1;
5391 break;
661cd8fb 5392 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI		 5393 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5394 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR		 5395 spec->num_dmics = 1;
5396 break;
5397 }
5398 break;
842ae638
TI		 5399 case STAC_ALIENWARE_M17X:
5400 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5401 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5402 spec->eapd_switch = 0;
5403 break;
a7662640
MR		 5404 default:
5405 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5406 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5407 spec->eapd_switch = 1;
5207e10e 5408 break;
a7662640 5409 }
af6ee302 5410 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR		 5411 /* GPIO0 High = Enable EAPD */
5412 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5413 spec->gpio_data = 0x01;
5414 }
a7662640 5415
a64135a2
MR		 5416 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5417 spec->pwr_nids = stac92hd73xx_pwr_nids;
5418
d9737751 5419 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 5420
5421 if (!err) {
5422 if (spec->board_config < 0) {
5423 printk(KERN_WARNING "hda_codec: No auto-config is "
5424 "available, default to model=ref\n");
5425 spec->board_config = STAC_92HD73XX_REF;
5426 goto again;
5427 }
5428 err = -EINVAL;
5429 }
5430
5431 if (err < 0) {
5432 stac92xx_free(codec);
5433 return err;
5434 }
5435
9e43f0de
TI		 5436 if (spec->board_config == STAC_92HD73XX_NO_JD)
5437 spec->hp_detect = 0;
5438
e1f0d669
MR		 5439 codec->patch_ops = stac92xx_patch_ops;
5440
2d34e1b3
TI		 5441 codec->proc_widget_hook = stac92hd7x_proc_hook;
5442
e1f0d669
MR		 5443 return 0;
5444}
5445
cbbf50b2 5446static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK		 5447{
5448 if (codec->vendor_id != 0x111d7605 &&
5449 codec->vendor_id != 0x111d76d1)
5450 return 0;
5451
5452 switch (codec->subsystem_id) {
5453 case 0x103c1618:
5454 case 0x103c1619:
5455 case 0x103c161a:
5456 case 0x103c161b:
5457 case 0x103c161c:
5458 case 0x103c161d:
5459 case 0x103c161e:
5460 case 0x103c161f:
335e3b86
VK		 5461
5462 case 0x103c162a:
5463 case 0x103c162b:
5464
5465 case 0x103c1630:
5466 case 0x103c1631:
5467
5468 case 0x103c1633:
cbbf50b2 5469 case 0x103c1634:
335e3b86
VK		 5470 case 0x103c1635:
5471
335e3b86
VK		 5472 case 0x103c3587:
5473 case 0x103c3588:
5474 case 0x103c3589:
5475 case 0x103c358a:
5476
5477 case 0x103c3667:
5478 case 0x103c3668:
cbbf50b2
VK		 5479 case 0x103c3669:
5480
5481 return 1;
335e3b86
VK		 5482 }
5483 return 0;
5484}
5485
699d8995
VK		 5486static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5487{
5488 struct sigmatel_spec *spec = codec->spec;
5489 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5490 int i;
5491
5492 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5493 spec->auto_pin_cnt++;
5494
5495 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5496 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5497 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5498 if (nid == stac92hd83xxx_dmic_nids[i]) {
5499 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5500 spec->auto_dmic_cnt++;
5501 }
5502 }
5503 }
5504}
5505
5506static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5507{
5508 struct sigmatel_spec *spec = codec->spec;
5509
5510 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5511 spec->auto_adc_cnt++;
5512}
5513
5514static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5515{
5516 int i, j;
5517 struct sigmatel_spec *spec = codec->spec;
5518
5519 for (i = 0; i < spec->auto_adc_cnt; i++) {
5520 if (get_connection_index(codec,
5521 spec->auto_adc_nids[i], nid) >= 0) {
5522 /* mux and volume for adc_nids[i] */
5523 if (!spec->auto_mux_nids[i]) {
5524 spec->auto_mux_nids[i] = nid;
5525 /* 92hd codecs capture volume is in mux */
5526 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5527 3, 0, HDA_OUTPUT);
5528 }
5529 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5530 if (get_connection_index(codec, nid,
5531 spec->auto_dmic_nids[j]) >= 0) {
5532 /* dmux for adc_nids[i] */
5533 if (!spec->auto_dmux_nids[i])
5534 spec->auto_dmux_nids[i] = nid;
5535 break;
5536 }
5537 }
5538 break;
5539 }
5540 }
5541}
5542
5543static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5544{
5545 hda_nid_t nid, end_nid;
5546 unsigned int wid_caps, wid_type;
5547 struct sigmatel_spec *spec = codec->spec;
5548
5549 end_nid = codec->start_nid + codec->num_nodes;
5550
5551 for (nid = codec->start_nid; nid < end_nid; nid++) {
5552 wid_caps = get_wcaps(codec, nid);
5553 wid_type = get_wcaps_type(wid_caps);
5554
5555 if (wid_type == AC_WID_PIN)
5556 stac92hd8x_add_pin(codec, nid);
5557
5558 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5559 stac92hd8x_add_adc(codec, nid);
5560 }
5561
5562 for (nid = codec->start_nid; nid < end_nid; nid++) {
5563 wid_caps = get_wcaps(codec, nid);
5564 wid_type = get_wcaps_type(wid_caps);
5565
5566 if (wid_type == AC_WID_AUD_SEL)
5567 stac92hd8x_add_mux(codec, nid);
5568 }
5569
5570 spec->pin_nids = spec->auto_pin_nids;
5571 spec->num_pins = spec->auto_pin_cnt;
5572 spec->adc_nids = spec->auto_adc_nids;
5573 spec->num_adcs = spec->auto_adc_cnt;
5574 spec->capvols = spec->auto_capvols;
5575 spec->capsws = spec->auto_capvols;
5576 spec->num_caps = spec->auto_adc_cnt;
5577 spec->mux_nids = spec->auto_mux_nids;
5578 spec->num_muxes = spec->auto_adc_cnt;
5579 spec->dmux_nids = spec->auto_dmux_nids;
5580 spec->num_dmuxes = spec->auto_adc_cnt;
5581 spec->dmic_nids = spec->auto_dmic_nids;
5582 spec->num_dmics = spec->auto_dmic_cnt;
5583}
5584
d0513fc6
MR		 5585static int patch_stac92hd83xxx(struct hda_codec *codec)
5586{
5587 struct sigmatel_spec *spec;
65557f35 5588 hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
d0513fc6 5589 int err;
65557f35 5590 int num_dacs;
d0513fc6
MR		 5591
5592 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5593 if (spec == NULL)
5594 return -ENOMEM;
5595
cbbf50b2
VK		 5596 if (hp_bnb2011_with_dock(codec)) {
5597 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5598 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5599 }
5600
1cc9e8f4
C		 5601 /* reset pin power-down; Windows may leave these bits after reboot */
5602 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0);
5603 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0);
a252c81a 5604 codec->no_trigger_sense = 1;
d0513fc6 5605 codec->spec = spec;
699d8995
VK		 5606
5607 stac92hd8x_fill_auto_spec(codec);
5608
1db7ccdb 5609 spec->linear_tone_beep = 0;
0ffa9807 5610 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5611 spec->digbeep_nid = 0x21;
d0513fc6
MR		 5612 spec->pwr_nids = stac92hd83xxx_pwr_nids;
5613 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
5614 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5615 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5616 spec->init = stac92hd83xxx_core_init;
6479c631 5617
d0513fc6
MR		 5618 spec->board_config = snd_hda_check_board_config(codec,
5619 STAC_92HD83XXX_MODELS,
5620 stac92hd83xxx_models,
5621 stac92hd83xxx_cfg_tbl);
5622again:
330ee995 5623 if (spec->board_config < 0)
9a11f1aa
TI		 5624 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5625 codec->chip_name);
330ee995
TI		 5626 else
5627 stac92xx_set_config_regs(codec,
af9f341a 5628 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5629
32ed3f46 5630 switch (codec->vendor_id) {
89feca1a
DH		 5631 case 0x111d76d1:
5632 case 0x111d76d9:
4dfb8a45 5633 case 0x111d76e5:
36706005
CC		 5634 case 0x111d7666:
5635 case 0x111d7667:
5636 case 0x111d7668:
5637 case 0x111d7669:
4dfb8a45 5638 case 0x111d76e3:
32ed3f46 5639 case 0x111d7604:
a9694faa 5640 case 0x111d76d4:
32ed3f46 5641 case 0x111d7605:
ff2e7337 5642 case 0x111d76d5:
ab5a6ebe 5643 case 0x111d76e7:
32ed3f46
MR		 5644 if (spec->board_config == STAC_92HD83XXX_PWR_REF)
5645 break;
5646 spec->num_pwrs = 0;
5647 break;
5648 }
5649
b4e81876
TI		 5650 codec->patch_ops = stac92xx_patch_ops;
5651
dce17d4f 5652 if (find_mute_led_gpio(codec, 0))
e108c7b7
VK		 5653 snd_printd("mute LED gpio %d polarity %d\n",
5654 spec->gpio_led,
5655 spec->gpio_led_polarity);
5656
b4e81876
TI		 5657#ifdef CONFIG_SND_HDA_POWER_SAVE
5658 if (spec->gpio_led) {
45eebda7
VK		 5659 if (spec->gpio_led <= 8) {
5660 spec->gpio_mask |= spec->gpio_led;
5661 spec->gpio_dir |= spec->gpio_led;
5662 spec->gpio_data |= spec->gpio_led;
5663 } else {
5664 codec->patch_ops.set_power_state =
5665 stac92xx_set_power_state;
5666 codec->patch_ops.post_suspend =
5667 stac92xx_post_suspend;
5668 }
5669 codec->patch_ops.pre_resume = stac92xx_pre_resume;
b4e81876 5670 codec->patch_ops.check_power_status =
7df1ce1a 5671 stac92xx_check_power_status;
b4e81876
TI		 5672 }
5673#endif
5674
d0513fc6
MR		 5675 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
5676 if (!err) {
5677 if (spec->board_config < 0) {
5678 printk(KERN_WARNING "hda_codec: No auto-config is "
5679 "available, default to model=ref\n");
5680 spec->board_config = STAC_92HD83XXX_REF;
5681 goto again;
5682 }
5683 err = -EINVAL;
5684 }
5685
5686 if (err < 0) {
5687 stac92xx_free(codec);
5688 return err;
5689 }
5690
04b5efe5
CC		 5691 /* docking output support */
5692 num_dacs = snd_hda_get_connections(codec, 0xF,
8bb0ac55 5693 conn, STAC92HD83_DAC_COUNT + 1) - 1;
04b5efe5
CC		 5694 /* skip non-DAC connections */
5695 while (num_dacs >= 0 &&
5696 (get_wcaps_type(get_wcaps(codec, conn[num_dacs]))
5697 != AC_WID_AUD_OUT))
5698 num_dacs--;
5699 /* set port E and F to select the last DAC */
5700 if (num_dacs >= 0) {
5701 snd_hda_codec_write_cache(codec, 0xE, 0,
5702 AC_VERB_SET_CONNECT_SEL, num_dacs);
5703 snd_hda_codec_write_cache(codec, 0xF, 0,
8bb0ac55 5704 AC_VERB_SET_CONNECT_SEL, num_dacs);
04b5efe5 5705 }
8bb0ac55 5706
2d34e1b3
TI		 5707 codec->proc_widget_hook = stac92hd_proc_hook;
5708
d0513fc6
MR		 5709 return 0;
5710}
5711
6df703ae
HRK		 5712static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5713 hda_nid_t dig0pin)
5714{
5715 struct sigmatel_spec *spec = codec->spec;
5716 int idx;
5717
5718 for (idx = 0; idx < spec->num_pins; idx++)
5719 if (spec->pin_nids[idx] == dig0pin)
5720 break;
5721 if ((idx + 2) >= spec->num_pins)
5722 return 0;
5723
5724 /* dig1pin case */
330ee995 5725 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5726 return 2;
5727
5728 /* dig0pin + dig2pin case */
330ee995 5729 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5730 return 2;
330ee995 5731 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK		 5732 return 1;
5733 else
5734 return 0;
5735}
5736
75d1aeb9
TI		 5737/* HP dv7 bass switch - GPIO5 */
5738#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5739static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5740 struct snd_ctl_elem_value *ucontrol)
5741{
5742 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5743 struct sigmatel_spec *spec = codec->spec;
5744 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5745 return 0;
5746}
5747
5748static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5749 struct snd_ctl_elem_value *ucontrol)
5750{
5751 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5752 struct sigmatel_spec *spec = codec->spec;
5753 unsigned int gpio_data;
5754
5755 gpio_data = (spec->gpio_data & ~0x20) |
5756 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5757 if (gpio_data == spec->gpio_data)
5758 return 0;
5759 spec->gpio_data = gpio_data;
5760 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5761 return 1;
5762}
5763
2b63536f 5764static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI		 5765 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5766 .info = stac_hp_bass_gpio_info,
5767 .get = stac_hp_bass_gpio_get,
5768 .put = stac_hp_bass_gpio_put,
5769};
5770
5771static int stac_add_hp_bass_switch(struct hda_codec *codec)
5772{
5773 struct sigmatel_spec *spec = codec->spec;
5774
5775 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5776 "Bass Speaker Playback Switch", 0))
5777 return -ENOMEM;
5778
5779 spec->gpio_mask |= 0x20;
5780 spec->gpio_dir |= 0x20;
5781 spec->gpio_data |= 0x20;
5782 return 0;
5783}
5784
e035b841
MR		 5785static int patch_stac92hd71bxx(struct hda_codec *codec)
5786{
5787 struct sigmatel_spec *spec;
2b63536f 5788 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5789 unsigned int pin_cfg;
e035b841
MR		 5790 int err = 0;
5791
5792 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5793 if (spec == NULL)
5794 return -ENOMEM;
5795
a252c81a 5796 codec->no_trigger_sense = 1;
e035b841 5797 codec->spec = spec;
1b0e372d 5798 spec->linear_tone_beep = 0;
8daaaa97 5799 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK		 5800 spec->num_pins = STAC92HD71BXX_NUM_PINS;
5801 switch (codec->vendor_id) {
5802 case 0x111d76b6:
5803 case 0x111d76b7:
5804 spec->pin_nids = stac92hd71bxx_pin_nids_4port;
5805 break;
5806 case 0x111d7603:
5807 case 0x111d7608:
5808 /* On 92HD75Bx 0x27 isn't a pin nid */
5809 spec->num_pins--;
5810 /* fallthrough */
5811 default:
5812 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5813 }
aafc4412 5814 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR		 5815 spec->board_config = snd_hda_check_board_config(codec,
5816 STAC_92HD71BXX_MODELS,
5817 stac92hd71bxx_models,
5818 stac92hd71bxx_cfg_tbl);
5819again:
330ee995 5820 if (spec->board_config < 0)
9a11f1aa
TI		 5821 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5822 codec->chip_name);
330ee995
TI		 5823 else
5824 stac92xx_set_config_regs(codec,
af9f341a 5825 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5826
fc64b26c 5827 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI		 5828 /* GPIO0 = EAPD */
5829 spec->gpio_mask = 0x01;
5830 spec->gpio_dir = 0x01;
5831 spec->gpio_data = 0x01;
5832 }
5833
6df703ae
HRK		 5834 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5835 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5836
6479c631
TI		 5837 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5838 spec->capvols = stac92hd71bxx_capvols;
5839 spec->capsws = stac92hd71bxx_capsws;
5840
541eee87
MR		 5841 switch (codec->vendor_id) {
5842 case 0x111d76b6: /* 4 Port without Analog Mixer */
5843 case 0x111d76b7:
23c7b521
HRK		 5844 unmute_init++;
5845 /* fallthru */
541eee87
MR		 5846 case 0x111d76b4: /* 6 Port without Analog Mixer */
5847 case 0x111d76b5:
541eee87 5848 spec->init = stac92hd71bxx_core_init;
0ffa9807 5849 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5850 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5851 stac92hd71bxx_dmic_nids,
5852 STAC92HD71BXX_NUM_DMICS);
541eee87 5853 break;
aafc4412 5854 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 5855 switch (spec->board_config) {
5856 case STAC_HP_M4:
72474be6 5857 /* Enable VREF power saving on GPIO1 detect */
c6e4c666
TI		 5858 err = stac_add_event(spec, codec->afg,
5859 STAC_VREF_EVENT, 0x02);
5860 if (err < 0)
5861 return err;
c5d08bb5 5862 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 5863 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
5864 snd_hda_codec_write_cache(codec, codec->afg, 0,
74aeaabc 5865 AC_VERB_SET_UNSOLICITED_ENABLE,
c6e4c666 5866 AC_USRSP_EN | err);
72474be6
MR		 5867 spec->gpio_mask |= 0x02;
5868 break;
5869 }
8daaaa97 5870 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5871 (codec->revision_id & 0xf) == 1)
8daaaa97 5872 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5873
aafc4412
MR		 5874 /* no output amps */
5875 spec->num_pwrs = 0;
aafc4412 5876 /* disable VSW */
26a27980 5877 spec->init = stac92hd71bxx_core_init;
ca8d33fc 5878 unmute_init++;
330ee995
TI		 5879 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5880 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 5881 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 5882 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 5883 stac92hd71bxx_dmic_5port_nids,
6df703ae 5884 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR		 5885 break;
5886 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5887 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5888 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5889
aafc4412
MR		 5890 /* no output amps */
5891 spec->num_pwrs = 0;
5892 /* fallthru */
541eee87 5893 default:
26a27980 5894 spec->init = stac92hd71bxx_core_init;
0ffa9807 5895 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5896 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK		 5897 stac92hd71bxx_dmic_nids,
5898 STAC92HD71BXX_NUM_DMICS);
5207e10e 5899 break;
541eee87
MR		 5900 }
5901
ca8d33fc
MR		 5902 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5903 snd_hda_sequence_write_cache(codec, unmute_init);
5904
d78d7a90 5905 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5906 spec->aloopback_mask = 0x50;
541eee87
MR		 5907 spec->aloopback_shift = 0;
5908
8daaaa97 5909 spec->powerdown_adcs = 1;
1cd2224c 5910 spec->digbeep_nid = 0x26;
e035b841
MR		 5911 spec->mux_nids = stac92hd71bxx_mux_nids;
5912 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5913 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5914 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 5915
5916 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5917 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5918 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5919 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5920
d38cce70
KG		 5921 snd_printdd("Found board config: %d\n", spec->board_config);
5922
6a14f585
MR		 5923 switch (spec->board_config) {
5924 case STAC_HP_M4:
6a14f585 5925 /* enable internal microphone */
330ee995 5926 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR		 5927 stac92xx_auto_set_pinctl(codec, 0x0e,
5928 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 5929 /* fallthru */
5930 case STAC_DELL_M4_2:
5931 spec->num_dmics = 0;
5932 spec->num_smuxes = 0;
5933 spec->num_dmuxes = 0;
5934 break;
5935 case STAC_DELL_M4_1:
5936 case STAC_DELL_M4_3:
5937 spec->num_dmics = 1;
5938 spec->num_smuxes = 0;
ea18aa46 5939 spec->num_dmuxes = 1;
6a14f585 5940 break;
514bf54c
JG		 5941 case STAC_HP_DV4_1222NR:
5942 spec->num_dmics = 1;
5943 /* I don't know if it needs 1 or 2 smuxes - will wait for
5944 * bug reports to fix if needed
5945 */
5946 spec->num_smuxes = 1;
5947 spec->num_dmuxes = 1;
514bf54c 5948 /* fallthrough */
2a6ce6e5
TI		 5949 case STAC_HP_DV4:
5950 spec->gpio_led = 0x01;
5951 /* fallthrough */
e2ea57a8 5952 case STAC_HP_DV5:
330ee995 5953 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5954 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI		 5955 /* HP dv6 gives the headphone pin as a line-out. Thus we
5956 * need to set hp_detect flag here to force to enable HP
5957 * detection.
5958 */
5959 spec->hp_detect = 1;
e2ea57a8 5960 break;
ae6241fb
CP		 5961 case STAC_HP_HDX:
5962 spec->num_dmics = 1;
5963 spec->num_dmuxes = 1;
5964 spec->num_smuxes = 1;
26ebe0a2 5965 spec->gpio_led = 0x08;
86d190e7
TI		 5966 break;
5967 }
443e26d0 5968
c357aab0 5969 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK		 5970 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5971 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5972 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5973 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5974 /* It was changed in the BIOS to just satisfy MS DTM.
5975 * Lets turn it back into slaved HP
5976 */
5977 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5978 | (AC_JACK_HP_OUT <<
5979 AC_DEFCFG_DEVICE_SHIFT);
5980 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5981 | AC_DEFCFG_SEQUENCE)))
5982 | 0x1f;
5983 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5984 }
5985 }
5986
dce17d4f 5987 if (find_mute_led_gpio(codec, 1))
c357aab0
VK		 5988 snd_printd("mute LED gpio %d polarity %d\n",
5989 spec->gpio_led,
5990 spec->gpio_led_polarity);
5bdaaada 5991
86d190e7
TI		 5992#ifdef CONFIG_SND_HDA_POWER_SAVE
5993 if (spec->gpio_led) {
45eebda7
VK		 5994 if (spec->gpio_led <= 8) {
5995 spec->gpio_mask |= spec->gpio_led;
5996 spec->gpio_dir |= spec->gpio_led;
5997 spec->gpio_data |= spec->gpio_led;
5998 } else {
5999 codec->patch_ops.set_power_state =
6000 stac92xx_set_power_state;
6001 codec->patch_ops.post_suspend =
6002 stac92xx_post_suspend;
6003 }
6004 codec->patch_ops.pre_resume = stac92xx_pre_resume;
6fce61ae 6005 codec->patch_ops.check_power_status =
7df1ce1a 6006 stac92xx_check_power_status;
86d190e7 6007 }
443e26d0 6008#endif
6a14f585 6009
c21ca4a8 6010 spec->multiout.dac_nids = spec->dac_nids;
e035b841 6011
29d4ab4d 6012 err = stac92xx_parse_auto_config(codec, 0x21, 0);
e035b841
MR		 6013 if (!err) {
6014 if (spec->board_config < 0) {
6015 printk(KERN_WARNING "hda_codec: No auto-config is "
6016 "available, default to model=ref\n");
6017 spec->board_config = STAC_92HD71BXX_REF;
6018 goto again;
6019 }
6020 err = -EINVAL;
6021 }
6022
6023 if (err < 0) {
6024 stac92xx_free(codec);
6025 return err;
6026 }
6027
75d1aeb9 6028 /* enable bass on HP dv7 */
2a6ce6e5
TI		 6029 if (spec->board_config == STAC_HP_DV4 ||
6030 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI		 6031 unsigned int cap;
6032 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
6033 cap &= AC_GPIO_IO_COUNT;
6034 if (cap >= 6)
6035 stac_add_hp_bass_switch(codec);
6036 }
6037
2d34e1b3
TI		 6038 codec->proc_widget_hook = stac92hd7x_proc_hook;
6039
e035b841 6040 return 0;
86d190e7 6041}
e035b841 6042
2f2f4251
M		 6043static int patch_stac922x(struct hda_codec *codec)
6044{
6045 struct sigmatel_spec *spec;
c7d4b2fa 6046 int err;
2f2f4251 6047
e560d8d8 6048 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 6049 if (spec == NULL)
6050 return -ENOMEM;
6051
a252c81a 6052 codec->no_trigger_sense = 1;
2f2f4251 6053 codec->spec = spec;
1b0e372d 6054 spec->linear_tone_beep = 1;
a4eed138 6055 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 6056 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 6057 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
6058 stac922x_models,
6059 stac922x_cfg_tbl);
536319af 6060 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 6061 spec->gpio_mask = spec->gpio_dir = 0x03;
6062 spec->gpio_data = 0x03;
3fc24d85
TI		 6063 /* Intel Macs have all same PCI SSID, so we need to check
6064 * codec SSID to distinguish the exact models
6065 */
6f0778d8 6066 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 6067 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 6068
6069 case 0x106b0800:
6070 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 6071 break;
5d5d3bc3
IZ		 6072 case 0x106b0600:
6073 case 0x106b0700:
6074 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 6075 break;
5d5d3bc3
IZ		 6076 case 0x106b0e00:
6077 case 0x106b0f00:
6078 case 0x106b1600:
6079 case 0x106b1700:
6080 case 0x106b0200:
6081 case 0x106b1e00:
6082 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 6083 break;
5d5d3bc3
IZ		 6084 case 0x106b1a00:
6085 case 0x00000100:
6086 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 6087 break;
5d5d3bc3
IZ		 6088 case 0x106b0a00:
6089 case 0x106b2200:
6090 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 6091 break;
536319af
NB		 6092 default:
6093 spec->board_config = STAC_INTEL_MAC_V3;
6094 break;
3fc24d85
TI		 6095 }
6096 }
6097
9e507abd 6098 again:
330ee995 6099 if (spec->board_config < 0)
9a11f1aa
TI		 6100 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6101 codec->chip_name);
330ee995
TI		 6102 else
6103 stac92xx_set_config_regs(codec,
af9f341a 6104 stac922x_brd_tbl[spec->board_config]);
2f2f4251 6105
c7d4b2fa
M		 6106 spec->adc_nids = stac922x_adc_nids;
6107 spec->mux_nids = stac922x_mux_nids;
2549413e 6108 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6109 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6110 spec->num_dmics = 0;
a64135a2 6111 spec->num_pwrs = 0;
c7d4b2fa
M		 6112
6113 spec->init = stac922x_core_init;
6479c631
TI		 6114
6115 spec->num_caps = STAC922X_NUM_CAPS;
6116 spec->capvols = stac922x_capvols;
6117 spec->capsws = stac922x_capsws;
c7d4b2fa
M		 6118
6119 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6120
3cc08dc6 6121 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 6122 if (!err) {
6123 if (spec->board_config < 0) {
6124 printk(KERN_WARNING "hda_codec: No auto-config is "
6125 "available, default to model=ref\n");
6126 spec->board_config = STAC_D945_REF;
6127 goto again;
6128 }
6129 err = -EINVAL;
6130 }
3cc08dc6
MP		 6131 if (err < 0) {
6132 stac92xx_free(codec);
6133 return err;
6134 }
6135
6136 codec->patch_ops = stac92xx_patch_ops;
6137
807a4636
TI		 6138 /* Fix Mux capture level; max to 2 */
6139 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6140 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6141 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6142 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6143 (0 << AC_AMPCAP_MUTE_SHIFT));
6144
3cc08dc6
MP		 6145 return 0;
6146}
6147
6148static int patch_stac927x(struct hda_codec *codec)
6149{
6150 struct sigmatel_spec *spec;
6151 int err;
6152
6153 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6154 if (spec == NULL)
6155 return -ENOMEM;
6156
a252c81a 6157 codec->no_trigger_sense = 1;
3cc08dc6 6158 codec->spec = spec;
1b0e372d 6159 spec->linear_tone_beep = 1;
45c1d85b 6160 codec->slave_dig_outs = stac927x_slave_dig_outs;
a4eed138 6161 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 6162 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 6163 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6164 stac927x_models,
6165 stac927x_cfg_tbl);
9e507abd 6166 again:
330ee995 6167 if (spec->board_config < 0)
9a11f1aa
TI		 6168 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6169 codec->chip_name);
330ee995
TI		 6170 else
6171 stac92xx_set_config_regs(codec,
af9f341a 6172 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6173
1cd2224c 6174 spec->digbeep_nid = 0x23;
8e9068b1
MR		 6175 spec->adc_nids = stac927x_adc_nids;
6176 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6177 spec->mux_nids = stac927x_mux_nids;
6178 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 6179 spec->smux_nids = stac927x_smux_nids;
6180 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6181 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6182 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 6183 spec->multiout.dac_nids = spec->dac_nids;
6184
af6ee302
TI		 6185 if (spec->board_config != STAC_D965_REF) {
6186 /* GPIO0 High = Enable EAPD */
6187 spec->eapd_mask = spec->gpio_mask = 0x01;
6188 spec->gpio_dir = spec->gpio_data = 0x01;
6189 }
6190
81d3dbde 6191 switch (spec->board_config) {
93ed1503 6192 case STAC_D965_3ST:
93ed1503 6193 case STAC_D965_5ST:
8e9068b1 6194 /* GPIO0 High = Enable EAPD */
8e9068b1 6195 spec->num_dmics = 0;
93ed1503 6196 spec->init = d965_core_init;
81d3dbde 6197 break;
8e9068b1 6198 case STAC_DELL_BIOS:
780c8be4
MR		 6199 switch (codec->subsystem_id) {
6200 case 0x10280209:
6201 case 0x1028022e:
6202 /* correct the device field to SPDIF out */
330ee995 6203 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6204 break;
86d190e7 6205 }
03d7ca17 6206 /* configure the analog microphone on some laptops */
330ee995 6207 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6208 /* correct the front output jack as a hp out */
330ee995 6209 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6210 /* correct the front input jack as a mic */
330ee995 6211 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6212 /* fallthru */
8e9068b1 6213 case STAC_DELL_3ST:
af6ee302
TI		 6214 if (codec->subsystem_id != 0x1028022f) {
6215 /* GPIO2 High = Enable EAPD */
6216 spec->eapd_mask = spec->gpio_mask = 0x04;
6217 spec->gpio_dir = spec->gpio_data = 0x04;
6218 }
7f16859a
MR		 6219 spec->dmic_nids = stac927x_dmic_nids;
6220 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6221
ccca7cdc 6222 spec->init = dell_3st_core_init;
8e9068b1 6223 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6224 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6225 break;
54930531
TI		 6226 case STAC_927X_VOLKNOB:
6227 spec->num_dmics = 0;
6228 spec->init = stac927x_volknob_core_init;
6229 break;
7f16859a 6230 default:
8e9068b1 6231 spec->num_dmics = 0;
8e9068b1 6232 spec->init = stac927x_core_init;
af6ee302 6233 break;
7f16859a
MR		 6234 }
6235
6479c631
TI		 6236 spec->num_caps = STAC927X_NUM_CAPS;
6237 spec->capvols = stac927x_capvols;
6238 spec->capsws = stac927x_capsws;
6239
a64135a2 6240 spec->num_pwrs = 0;
d78d7a90 6241 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR		 6242 spec->aloopback_mask = 0x40;
6243 spec->aloopback_shift = 0;
c0cea0d0 6244 spec->eapd_switch = 1;
8e9068b1 6245
3cc08dc6 6246 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 6247 if (!err) {
6248 if (spec->board_config < 0) {
6249 printk(KERN_WARNING "hda_codec: No auto-config is "
6250 "available, default to model=ref\n");
6251 spec->board_config = STAC_D965_REF;
6252 goto again;
6253 }
6254 err = -EINVAL;
6255 }
c7d4b2fa
M		 6256 if (err < 0) {
6257 stac92xx_free(codec);
6258 return err;
6259 }
2f2f4251
M		 6260
6261 codec->patch_ops = stac92xx_patch_ops;
6262
2d34e1b3
TI		 6263 codec->proc_widget_hook = stac927x_proc_hook;
6264
52987656
TI		 6265 /*
6266 * !!FIXME!!
6267 * The STAC927x seem to require fairly long delays for certain
6268 * command sequences. With too short delays (even if the answer
6269 * is set to RIRB properly), it results in the silence output
6270 * on some hardwares like Dell.
6271 *
6272 * The below flag enables the longer delay (see get_response
6273 * in hda_intel.c).
6274 */
6275 codec->bus->needs_damn_long_delay = 1;
6276
e28d8322
TI		 6277 /* no jack detecion for ref-no-jd model */
6278 if (spec->board_config == STAC_D965_REF_NO_JD)
6279 spec->hp_detect = 0;
6280
2f2f4251
M		 6281 return 0;
6282}
6283
f3302a59
MP		 6284static int patch_stac9205(struct hda_codec *codec)
6285{
6286 struct sigmatel_spec *spec;
8259980e 6287 int err;
f3302a59
MP		 6288
6289 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6290 if (spec == NULL)
6291 return -ENOMEM;
6292
a252c81a 6293 codec->no_trigger_sense = 1;
f3302a59 6294 codec->spec = spec;
1b0e372d 6295 spec->linear_tone_beep = 1;
a4eed138 6296 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 6297 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 6298 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6299 stac9205_models,
6300 stac9205_cfg_tbl);
9e507abd 6301 again:
330ee995 6302 if (spec->board_config < 0)
9a11f1aa
TI		 6303 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6304 codec->chip_name);
330ee995
TI		 6305 else
6306 stac92xx_set_config_regs(codec,
af9f341a 6307 stac9205_brd_tbl[spec->board_config]);
f3302a59 6308
1cd2224c 6309 spec->digbeep_nid = 0x23;
f3302a59 6310 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6311 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6312 spec->mux_nids = stac9205_mux_nids;
2549413e 6313 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 6314 spec->smux_nids = stac9205_smux_nids;
6315 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6316 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6317 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6318 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6319 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6320 spec->num_pwrs = 0;
f3302a59
MP		 6321
6322 spec->init = stac9205_core_init;
d78d7a90 6323 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6324
6479c631
TI		 6325 spec->num_caps = STAC9205_NUM_CAPS;
6326 spec->capvols = stac9205_capvols;
6327 spec->capsws = stac9205_capsws;
6328
e1f0d669
MR		 6329 spec->aloopback_mask = 0x40;
6330 spec->aloopback_shift = 0;
d9a4268e
TI		 6331 /* Turn on/off EAPD per HP plugging */
6332 if (spec->board_config != STAC_9205_EAPD)
6333 spec->eapd_switch = 1;
f3302a59 6334 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6335
ae0a8ed8 6336 switch (spec->board_config){
ae0a8ed8 6337 case STAC_9205_DELL_M43:
87d48363 6338 /* Enable SPDIF in/out */
330ee995
TI		 6339 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6340 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6341
4fe5195c 6342 /* Enable unsol response for GPIO4/Dock HP connection */
c6e4c666
TI		 6343 err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
6344 if (err < 0)
6345 return err;
c5d08bb5 6346 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 6347 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
6348 snd_hda_codec_write_cache(codec, codec->afg, 0,
c6e4c666
TI		 6349 AC_VERB_SET_UNSOLICITED_ENABLE,
6350 AC_USRSP_EN | err);
4fe5195c
MR		 6351
6352 spec->gpio_dir = 0x0b;
0fc9dec4 6353 spec->eapd_mask = 0x01;
4fe5195c
MR		 6354 spec->gpio_mask = 0x1b;
6355 spec->gpio_mute = 0x10;
e2e7d624 6356 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6357 * GPIO3 Low = DRM
87d48363 6358 */
4fe5195c 6359 spec->gpio_data = 0x01;
ae0a8ed8 6360 break;
b2c4f4d7
MR		 6361 case STAC_9205_REF:
6362 /* SPDIF-In enabled */
6363 break;
ae0a8ed8
TD		 6364 default:
6365 /* GPIO0 High = EAPD */
0fc9dec4 6366 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6367 spec->gpio_data = 0x01;
ae0a8ed8
TD		 6368 break;
6369 }
33382403 6370
f3302a59 6371 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 6372 if (!err) {
6373 if (spec->board_config < 0) {
6374 printk(KERN_WARNING "hda_codec: No auto-config is "
6375 "available, default to model=ref\n");
6376 spec->board_config = STAC_9205_REF;
6377 goto again;
6378 }
6379 err = -EINVAL;
6380 }
f3302a59
MP		 6381 if (err < 0) {
6382 stac92xx_free(codec);
6383 return err;
6384 }
6385
6386 codec->patch_ops = stac92xx_patch_ops;
6387
2d34e1b3
TI		 6388 codec->proc_widget_hook = stac9205_proc_hook;
6389
f3302a59
MP		 6390 return 0;
6391}
6392
db064e50 6393/*
6d859065 6394 * STAC9872 hack
db064e50
TI		 6395 */
6396
2b63536f 6397static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6398 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 6399 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6400 {}
6401};
6402
2b63536f 6403static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI		 6404 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6405 0x11, 0x13, 0x14,
6406};
6407
2b63536f 6408static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI		 6409 0x8 /*,0x6*/
6410};
6411
2b63536f 6412static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI		 6413 0x15
6414};
6415
2b63536f 6416static const unsigned long stac9872_capvols[] = {
6479c631
TI		 6417 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6418};
6419#define stac9872_capsws stac9872_capvols
6420
2b63536f 6421static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI		 6422 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6423 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6424 0x90a7013e
6425};
6426
ea734963 6427static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI		 6428 [STAC_9872_AUTO] = "auto",
6429 [STAC_9872_VAIO] = "vaio",
6430};
6431
2b63536f 6432static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI		 6433 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6434};
6435
2b63536f 6436static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI		 6437 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6438 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 6439 {} /* terminator */
6440};
6441
6d859065 6442static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 6443{
6444 struct sigmatel_spec *spec;
1e137f92 6445 int err;
db064e50 6446
db064e50
TI		 6447 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
6448 if (spec == NULL)
6449 return -ENOMEM;
a252c81a 6450 codec->no_trigger_sense = 1;
db064e50 6451 codec->spec = spec;
1b0e372d 6452 spec->linear_tone_beep = 1;
b04add95
TI		 6453 spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
6454 spec->pin_nids = stac9872_pin_nids;
caa10b6e
TI		 6455
6456 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6457 stac9872_models,
6458 stac9872_cfg_tbl);
307282c8 6459 if (spec->board_config < 0)
9a11f1aa
TI		 6460 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6461 codec->chip_name);
307282c8
TI		 6462 else
6463 stac92xx_set_config_regs(codec,
6464 stac9872_brd_tbl[spec->board_config]);
db064e50 6465
1e137f92
TI		 6466 spec->multiout.dac_nids = spec->dac_nids;
6467 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6468 spec->adc_nids = stac9872_adc_nids;
6469 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6470 spec->mux_nids = stac9872_mux_nids;
1e137f92 6471 spec->init = stac9872_core_init;
6479c631
TI		 6472 spec->num_caps = 1;
6473 spec->capvols = stac9872_capvols;
6474 spec->capsws = stac9872_capsws;
1e137f92
TI		 6475
6476 err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
6477 if (err < 0) {
6478 stac92xx_free(codec);
6479 return -EINVAL;
6480 }
6481 spec->input_mux = &spec->private_imux;
6482 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI		 6483 return 0;
6484}
6485
6486
2f2f4251
M		 6487/*
6488 * patch entries
6489 */
2b63536f 6490static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 6491 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6492 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6493 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6494 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6495 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6496 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6497 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 6498 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6499 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6500 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6501 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6502 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6503 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 6504 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6505 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6506 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6507 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6508 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6509 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6510 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6511 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6512 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6513 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 6514 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6515 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6516 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6517 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6518 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6519 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 6520 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6521 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 6522 /* The following does not take into account .id=0x83847661 when subsys =
6523 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6524 * currently not fully supported.
6525 */
6526 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6527 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6528 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6529 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 6530 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6531 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6532 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6533 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6534 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6535 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6536 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6537 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6538 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6539 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6540 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6541 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6542 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 6543 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6544 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 6545 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6546 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6547 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6548 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6549 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 6550 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6551 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6552 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 6553 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6554 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6555 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6556 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6557 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6558 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6559 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6560 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 6561 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6562 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6563 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6564 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6565 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6566 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6567 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6568 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6569 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6570 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6571 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6572 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6573 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6574 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6575 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
ab5a6ebe 6576 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 6577 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6578 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6579 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
2f2f4251
M		 6580 {} /* terminator */
6581};
1289e9e8
TI		 6582
6583MODULE_ALIAS("snd-hda-codec-id:8384*");
6584MODULE_ALIAS("snd-hda-codec-id:111d*");
6585
6586MODULE_LICENSE("GPL");
6587MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6588
6589static struct hda_codec_preset_list sigmatel_list = {
6590 .preset = snd_hda_preset_sigmatel,
6591 .owner = THIS_MODULE,
6592};
6593
6594static int __init patch_sigmatel_init(void)
6595{
6596 return snd_hda_add_codec_preset(&sigmatel_list);
6597}
6598
6599static void __exit patch_sigmatel_exit(void)
6600{
6601 snd_hda_delete_codec_preset(&sigmatel_list);
6602}
6603
6604module_init(patch_sigmatel_init)
6605module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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