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ALSA: hda - Fix mute LED on HP laptops in runtime suspend
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
45a6ac16 34#include <sound/jack.h>
a74ccea5 35#include <sound/tlv.h>
2f2f4251
M		 36#include "hda_codec.h"
37#include "hda_local.h"
128bc4ba 38#include "hda_auto_parser.h"
1cd2224c 39#include "hda_beep.h"
1835a0f9 40#include "hda_jack.h"
36c9db7a 41#include "hda_generic.h"
2f2f4251 42
c6e4c666 43enum {
36c9db7a 44 STAC_VREF_EVENT = 8,
c6e4c666 45 STAC_PWR_EVENT,
c6e4c666 46};
4e55096e 47
f5fcc13c
TI		 48enum {
49 STAC_REF,
bf277785 50 STAC_9200_OQO,
dfe495d0
TI		 51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
58eec423
MCC		 61 STAC_9200_M4,
62 STAC_9200_M4_2,
117f257d 63 STAC_9200_PANASONIC,
d39a3ae8 64 STAC_9200_EAPD_INIT,
f5fcc13c
TI		 65 STAC_9200_MODELS
66};
67
68enum {
69 STAC_9205_REF,
dfe495d0 70 STAC_9205_DELL_M42,
ae0a8ed8
TD		 71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
d9a4268e 73 STAC_9205_EAPD,
f5fcc13c
TI		 74 STAC_9205_MODELS
75};
76
e1f0d669 77enum {
9e43f0de 78 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 79 STAC_92HD73XX_REF,
ae709440 80 STAC_92HD73XX_INTEL,
661cd8fb
TI		 81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
6b3ab21e 84 STAC_DELL_EQ,
842ae638 85 STAC_ALIENWARE_M17X,
e1f0d669
MR		 86 STAC_92HD73XX_MODELS
87};
88
d0513fc6
MR		 89enum {
90 STAC_92HD83XXX_REF,
32ed3f46 91 STAC_92HD83XXX_PWR_REF,
8bb0ac55 92 STAC_DELL_S14,
f7f9bdfa 93 STAC_DELL_VOSTRO_3500,
0c27c180 94 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 95 STAC_HP_DV7_4000,
5556e147 96 STAC_HP_ZEPHYR,
a3e19973 97 STAC_92HD83XXX_HP_LED,
ff8a1e27 98 STAC_92HD83XXX_HP_INV_LED,
62cbde18 99 STAC_92HD83XXX_HP_MIC_LED,
8d032a8f 100 STAC_92HD83XXX_HEADSET_JACK,
372f8c75 101 STAC_92HD83XXX_HP,
49920427 102 STAC_HP_ENVY_BASS,
d0513fc6
MR		 103 STAC_92HD83XXX_MODELS
104};
105
e035b841
MR		 106enum {
107 STAC_92HD71BXX_REF,
a7662640
MR		 108 STAC_DELL_M4_1,
109 STAC_DELL_M4_2,
3a7abfd2 110 STAC_DELL_M4_3,
6a14f585 111 STAC_HP_M4,
2a6ce6e5 112 STAC_HP_DV4,
1b0652eb 113 STAC_HP_DV5,
ae6241fb 114 STAC_HP_HDX,
0f6fcb73
TI		 115 STAC_92HD71BXX_HP,
116 STAC_92HD71BXX_NO_DMIC,
117 STAC_92HD71BXX_NO_SMUX,
e035b841
MR		 118 STAC_92HD71BXX_MODELS
119};
120
8e21c34c
TD		 121enum {
122 STAC_925x_REF,
9cb36c2a
MCC		 123 STAC_M1,
124 STAC_M1_2,
125 STAC_M2,
8e21c34c 126 STAC_M2_2,
9cb36c2a
MCC		 127 STAC_M3,
128 STAC_M5,
129 STAC_M6,
8e21c34c
TD		 130 STAC_925x_MODELS
131};
132
f5fcc13c
TI		 133enum {
134 STAC_D945_REF,
135 STAC_D945GTP3,
136 STAC_D945GTP5,
5d5d3bc3
IZ		 137 STAC_INTEL_MAC_V1,
138 STAC_INTEL_MAC_V2,
139 STAC_INTEL_MAC_V3,
140 STAC_INTEL_MAC_V4,
141 STAC_INTEL_MAC_V5,
0a427846 142 STAC_INTEL_MAC_AUTO,
8c650087 143 STAC_ECS_202,
dfe495d0
TI		 144 STAC_922X_DELL_D81,
145 STAC_922X_DELL_D82,
146 STAC_922X_DELL_M81,
147 STAC_922X_DELL_M82,
0a427846 148 STAC_922X_INTEL_MAC_GPIO,
f5fcc13c
TI		 149 STAC_922X_MODELS
150};
151
152enum {
e28d8322 153 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 154 STAC_D965_REF,
155 STAC_D965_3ST,
156 STAC_D965_5ST,
679d92ed 157 STAC_D965_5ST_NO_FP,
29ac8363 158 STAC_D965_VERBS,
4ff076e5 159 STAC_DELL_3ST,
8e9068b1 160 STAC_DELL_BIOS,
eefb8be4 161 STAC_DELL_BIOS_AMIC,
29ac8363
TI		 162 STAC_DELL_BIOS_SPDIF,
163 STAC_927X_DELL_DMIC,
54930531 164 STAC_927X_VOLKNOB,
f5fcc13c
TI		 165 STAC_927X_MODELS
166};
403d1944 167
307282c8 168enum {
307282c8
TI		 169 STAC_9872_VAIO,
170 STAC_9872_MODELS
171};
172
2f2f4251 173struct sigmatel_spec {
36c9db7a 174 struct hda_gen_spec gen;
c7d4b2fa 175
c0cea0d0 176 unsigned int eapd_switch: 1;
1b0e372d 177 unsigned int linear_tone_beep:1;
8d032a8f 178 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
29ac8363 179 unsigned int volknob_init:1; /* special volume-knob initialization */
36c9db7a 180 unsigned int powerdown_adcs:1;
42875479 181 unsigned int have_spdif_mux:1;
c7d4b2fa 182
4fe5195c 183 /* gpio lines */
0fc9dec4 184 unsigned int eapd_mask;
4fe5195c
MR		 185 unsigned int gpio_mask;
186 unsigned int gpio_dir;
187 unsigned int gpio_data;
188 unsigned int gpio_mute;
86d190e7 189 unsigned int gpio_led;
c357aab0 190 unsigned int gpio_led_polarity;
f1a73746 191 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 192 unsigned int vref_led;
372f8c75 193 int default_polarity;
4fe5195c 194
62cbde18
TI		 195 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
196 bool mic_mute_led_on; /* current mic mute state */
197
8daaaa97
MR		 198 /* stream */
199 unsigned int stream_delay;
200
4fe5195c 201 /* analog loopback */
2b63536f 202 const struct snd_kcontrol_new *aloopback_ctl;
36c9db7a 203 unsigned int aloopback;
e1f0d669
MR		 204 unsigned char aloopback_mask;
205 unsigned char aloopback_shift;
8259980e 206
a64135a2 207 /* power management */
c882246d 208 unsigned int power_map_bits;
a64135a2 209 unsigned int num_pwrs;
2b63536f 210 const hda_nid_t *pwr_nids;
36c9db7a
TI		 211 unsigned int active_adcs;
212
213 /* beep widgets */
1cd2224c 214 hda_nid_t anabeep_nid;
42875479
TI		 215
216 /* SPDIF-out mux */
217 const char * const *spdif_labels;
218 struct hda_input_mux spdif_mux;
219 unsigned int cur_smux[2];
2f2f4251
M		 220};
221
c882246d
TI		 222#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
223#define AC_VERB_IDT_GET_POWER_MAP 0xfec
224
2b63536f 225static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR		 226 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
227 0x0f, 0x10, 0x11
228};
229
afef2cfa
CC		 230static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
231 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
232 0x0f, 0x10
d0513fc6
MR		 233};
234
2b63536f 235static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR		 236 0x0a, 0x0d, 0x0f
237};
238
f3302a59 239
36c9db7a
TI		 240/*
241 * PCM hooks
242 */
243static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
244 struct hda_codec *codec,
245 struct snd_pcm_substream *substream,
246 int action)
8b65727b 247{
8b65727b 248 struct sigmatel_spec *spec = codec->spec;
36c9db7a
TI		 249 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
250 msleep(spec->stream_delay);
8b65727b
MP		 251}
252
36c9db7a
TI		 253static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
254 struct hda_codec *codec,
255 struct snd_pcm_substream *substream,
256 int action)
8b65727b 257{
8b65727b 258 struct sigmatel_spec *spec = codec->spec;
36c9db7a 259 int i, idx = 0;
8b65727b 260
36c9db7a
TI		 261 if (!spec->powerdown_adcs)
262 return;
8b65727b 263
36c9db7a
TI		 264 for (i = 0; i < spec->gen.num_all_adcs; i++) {
265 if (spec->gen.all_adcs[i] == hinfo->nid) {
266 idx = i;
267 break;
268 }
269 }
8b65727b 270
36c9db7a
TI		 271 switch (action) {
272 case HDA_GEN_PCM_ACT_OPEN:
273 msleep(40);
274 snd_hda_codec_write(codec, hinfo->nid, 0,
275 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
276 spec->active_adcs |= (1 << idx);
277 break;
278 case HDA_GEN_PCM_ACT_CLOSE:
279 snd_hda_codec_write(codec, hinfo->nid, 0,
280 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
281 spec->active_adcs &= ~(1 << idx);
282 break;
283 }
8b65727b
MP		 284}
285
36c9db7a
TI		 286/*
287 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
288 * funky external mute control using GPIO pins.
289 */
d9737751 290
36c9db7a
TI		 291static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
292 unsigned int dir_mask, unsigned int data)
d9737751 293{
36c9db7a 294 unsigned int gpiostate, gpiomask, gpiodir;
d9737751 295
36c9db7a
TI		 296 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
297
298 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
299 AC_VERB_GET_GPIO_DATA, 0);
300 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
301
302 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
303 AC_VERB_GET_GPIO_MASK, 0);
304 gpiomask |= mask;
305
306 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
307 AC_VERB_GET_GPIO_DIRECTION, 0);
308 gpiodir |= dir_mask;
309
310 /* Configure GPIOx as CMOS */
311 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
312
313 snd_hda_codec_write(codec, codec->afg, 0,
314 AC_VERB_SET_GPIO_MASK, gpiomask);
315 snd_hda_codec_read(codec, codec->afg, 0,
316 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
317
318 msleep(1);
319
320 snd_hda_codec_read(codec, codec->afg, 0,
321 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
d9737751
MR		 322}
323
36c9db7a 324/* hook for controlling mic-mute LED GPIO */
a90229e0
TI		 325static void stac_capture_led_hook(struct hda_codec *codec,
326 struct snd_ctl_elem_value *ucontrol)
d9737751 327{
d9737751 328 struct sigmatel_spec *spec = codec->spec;
a90229e0 329 bool mute;
00ef50c2 330
a90229e0
TI		 331 if (!ucontrol)
332 return;
333
334 mute = !(ucontrol->value.integer.value[0] ||
335 ucontrol->value.integer.value[1]);
36c9db7a
TI		 336 if (spec->mic_mute_led_on != mute) {
337 spec->mic_mute_led_on = mute;
338 if (mute)
339 spec->gpio_data |= spec->mic_mute_led_gpio;
00ef50c2 340 else
36c9db7a
TI		 341 spec->gpio_data &= ~spec->mic_mute_led_gpio;
342 stac_gpio_set(codec, spec->gpio_mask,
343 spec->gpio_dir, spec->gpio_data);
00ef50c2 344 }
d9737751
MR		 345}
346
45eebda7
VK		 347static int stac_vrefout_set(struct hda_codec *codec,
348 hda_nid_t nid, unsigned int new_vref)
349{
350 int error, pinctl;
351
352 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
353 pinctl = snd_hda_codec_read(codec, nid, 0,
354 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
355
356 if (pinctl < 0)
357 return pinctl;
358
359 pinctl &= 0xff;
360 pinctl &= ~AC_PINCTL_VREFEN;
361 pinctl |= (new_vref & AC_PINCTL_VREFEN);
362
cdd03ced 363 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK		 364 if (error < 0)
365 return error;
366
367 return 1;
368}
369
36c9db7a
TI		 370/* update mute-LED accoring to the master switch */
371static void stac_update_led_status(struct hda_codec *codec, int enabled)
2f2f4251 372{
2f2f4251 373 struct sigmatel_spec *spec = codec->spec;
36c9db7a 374 int muted = !enabled;
2f2f4251 375
36c9db7a
TI		 376 if (!spec->gpio_led)
377 return;
2f2f4251 378
36c9db7a
TI		 379 /* LED state is inverted on these systems */
380 if (spec->gpio_led_polarity)
381 muted = !muted;
2f2f4251 382
36c9db7a
TI		 383 if (!spec->vref_mute_led_nid) {
384 if (muted)
385 spec->gpio_data |= spec->gpio_led;
386 else
387 spec->gpio_data &= ~spec->gpio_led;
388 stac_gpio_set(codec, spec->gpio_mask,
389 spec->gpio_dir, spec->gpio_data);
5207e10e 390 } else {
36c9db7a
TI		 391 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
392 stac_vrefout_set(codec, spec->vref_mute_led_nid,
393 spec->vref_led);
5207e10e 394 }
2f2f4251
M		 395}
396
36c9db7a
TI		 397/* vmaster hook to update mute LED */
398static void stac_vmaster_hook(void *private_data, int val)
b22b4821 399{
36c9db7a 400 stac_update_led_status(private_data, val);
b22b4821
MR		 401}
402
36c9db7a
TI		 403/* automute hook to handle GPIO mute and EAPD updates */
404static void stac_update_outputs(struct hda_codec *codec)
b22b4821 405{
b22b4821
MR		 406 struct sigmatel_spec *spec = codec->spec;
407
36c9db7a
TI		 408 if (spec->gpio_mute)
409 spec->gen.master_mute =
410 !(snd_hda_codec_read(codec, codec->afg, 0,
411 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
b22b4821 412
36c9db7a 413 snd_hda_gen_update_outputs(codec);
b22b4821 414
36c9db7a
TI		 415 if (spec->eapd_mask && spec->eapd_switch) {
416 unsigned int val = spec->gpio_data;
417 if (spec->gen.speaker_muted)
418 val &= ~spec->eapd_mask;
419 else
420 val |= spec->eapd_mask;
1ea9a69d
TI		 421 if (spec->gpio_data != val) {
422 spec->gpio_data = val;
36c9db7a
TI		 423 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
424 val);
1ea9a69d 425 }
36c9db7a 426 }
b22b4821
MR		 427}
428
36c9db7a
TI		 429static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
430 bool enable, bool do_write)
5f10c4a9 431{
5f10c4a9 432 struct sigmatel_spec *spec = codec->spec;
36c9db7a 433 unsigned int idx, val;
5f10c4a9 434
36c9db7a
TI		 435 for (idx = 0; idx < spec->num_pwrs; idx++) {
436 if (spec->pwr_nids[idx] == nid)
437 break;
438 }
439 if (idx >= spec->num_pwrs)
440 return;
441
442 idx = 1 << idx;
443
444 val = spec->power_map_bits;
445 if (enable)
446 val &= ~idx;
447 else
448 val |= idx;
449
450 /* power down unused output ports */
451 if (val != spec->power_map_bits) {
452 spec->power_map_bits = val;
453 if (do_write)
454 snd_hda_codec_write(codec, codec->afg, 0,
455 AC_VERB_IDT_SET_POWER_MAP, val);
456 }
457}
458
459/* update power bit per jack plug/unplug */
460static void jack_update_power(struct hda_codec *codec,
461 struct hda_jack_tbl *jack)
462{
463 struct sigmatel_spec *spec = codec->spec;
464 int i;
465
466 if (!spec->num_pwrs)
467 return;
468
469 if (jack && jack->nid) {
470 stac_toggle_power_map(codec, jack->nid,
471 snd_hda_jack_detect(codec, jack->nid),
472 true);
473 return;
474 }
475
476 /* update all jacks */
477 for (i = 0; i < spec->num_pwrs; i++) {
478 hda_nid_t nid = spec->pwr_nids[i];
479 jack = snd_hda_jack_tbl_get(codec, nid);
480 if (!jack || !jack->action)
481 continue;
482 if (jack->action == STAC_PWR_EVENT ||
483 jack->action <= HDA_GEN_LAST_EVENT)
484 stac_toggle_power_map(codec, nid,
485 snd_hda_jack_detect(codec, nid),
486 false);
487 }
488
489 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
490 spec->power_map_bits);
491}
492
493static void stac_hp_automute(struct hda_codec *codec,
494 struct hda_jack_tbl *jack)
495{
496 snd_hda_gen_hp_automute(codec, jack);
497 jack_update_power(codec, jack);
498}
499
500static void stac_line_automute(struct hda_codec *codec,
501 struct hda_jack_tbl *jack)
502{
503 snd_hda_gen_line_automute(codec, jack);
504 jack_update_power(codec, jack);
505}
506
664389db
DH		 507static void stac_mic_autoswitch(struct hda_codec *codec,
508 struct hda_jack_tbl *jack)
509{
510 snd_hda_gen_mic_autoswitch(codec, jack);
511 jack_update_power(codec, jack);
512}
513
36c9db7a
TI		 514static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
515{
516 unsigned int data;
517
518 data = snd_hda_codec_read(codec, codec->afg, 0,
519 AC_VERB_GET_GPIO_DATA, 0);
520 /* toggle VREF state based on GPIOx status */
521 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
522 !!(data & (1 << event->private_data)));
523}
524
525/* initialize the power map and enable the power event to jacks that
526 * haven't been assigned to automute
527 */
528static void stac_init_power_map(struct hda_codec *codec)
529{
530 struct sigmatel_spec *spec = codec->spec;
531 int i;
532
533 for (i = 0; i < spec->num_pwrs; i++) {
534 hda_nid_t nid = spec->pwr_nids[i];
535 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
536 def_conf = get_defcfg_connect(def_conf);
537 if (snd_hda_jack_tbl_get(codec, nid))
538 continue;
539 if (def_conf == AC_JACK_PORT_COMPLEX &&
540 !(spec->vref_mute_led_nid == nid ||
541 is_jack_detectable(codec, nid))) {
542 snd_hda_jack_detect_enable_callback(codec, nid,
543 STAC_PWR_EVENT,
544 jack_update_power);
545 } else {
546 if (def_conf == AC_JACK_PORT_NONE)
547 stac_toggle_power_map(codec, nid, false, false);
548 else
549 stac_toggle_power_map(codec, nid, true, false);
550 }
551 }
552}
553
554/*
555 */
556
557static inline bool get_int_hint(struct hda_codec *codec, const char *key,
558 int *valp)
559{
560 return !snd_hda_get_int_hint(codec, key, valp);
561}
562
563/* override some hints from the hwdep entry */
564static void stac_store_hints(struct hda_codec *codec)
565{
566 struct sigmatel_spec *spec = codec->spec;
567 int val;
568
569 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
570 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
571 spec->gpio_mask;
572 }
573 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
574 spec->gpio_mask &= spec->gpio_mask;
575 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
576 spec->gpio_dir &= spec->gpio_mask;
577 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
578 spec->eapd_mask &= spec->gpio_mask;
579 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
580 spec->gpio_mute &= spec->gpio_mask;
581 val = snd_hda_get_bool_hint(codec, "eapd_switch");
582 if (val >= 0)
583 spec->eapd_switch = val;
584}
585
586/*
587 * loopback controls
588 */
589
590#define stac_aloopback_info snd_ctl_boolean_mono_info
591
592static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
593 struct snd_ctl_elem_value *ucontrol)
594{
595 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
596 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
597 struct sigmatel_spec *spec = codec->spec;
598
599 ucontrol->value.integer.value[0] = !!(spec->aloopback &
600 (spec->aloopback_mask << idx));
601 return 0;
5f10c4a9
ML		 602}
603
36c9db7a
TI		 604static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
605 struct snd_ctl_elem_value *ucontrol)
5f10c4a9
ML		 606{
607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
608 struct sigmatel_spec *spec = codec->spec;
e1f0d669 609 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 610 unsigned int dac_mode;
e1f0d669 611 unsigned int val, idx_val;
5f10c4a9 612
e1f0d669
MR		 613 idx_val = spec->aloopback_mask << idx;
614 if (ucontrol->value.integer.value[0])
615 val = spec->aloopback | idx_val;
616 else
617 val = spec->aloopback & ~idx_val;
68ea7b2f 618 if (spec->aloopback == val)
5f10c4a9
ML		 619 return 0;
620
68ea7b2f 621 spec->aloopback = val;
5f10c4a9 622
e1f0d669
MR		 623 /* Only return the bits defined by the shift value of the
624 * first two bytes of the mask
625 */
5f10c4a9 626 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 627 kcontrol->private_value & 0xFFFF, 0x0);
628 dac_mode >>= spec->aloopback_shift;
5f10c4a9 629
e1f0d669 630 if (spec->aloopback & idx_val) {
5f10c4a9 631 snd_hda_power_up(codec);
e1f0d669 632 dac_mode |= idx_val;
5f10c4a9
ML		 633 } else {
634 snd_hda_power_down(codec);
e1f0d669 635 dac_mode &= ~idx_val;
5f10c4a9
ML		 636 }
637
638 snd_hda_codec_write_cache(codec, codec->afg, 0,
639 kcontrol->private_value >> 16, dac_mode);
640
641 return 1;
642}
643
e1f0d669 644#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 645 { \
646 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
647 .name = "Analog Loopback", \
e1f0d669 648 .count = cnt, \
36c9db7a
TI		 649 .info = stac_aloopback_info, \
650 .get = stac_aloopback_get, \
651 .put = stac_aloopback_put, \
5f10c4a9
ML		 652 .private_value = verb_read | (verb_write << 16), \
653 }
654
36c9db7a
TI		 655/*
656 * Mute LED handling on HP laptops
657 */
2fc99890 658
36c9db7a
TI		 659/* check whether it's a HP laptop with a docking port */
660static bool hp_bnb2011_with_dock(struct hda_codec *codec)
661{
662 if (codec->vendor_id != 0x111d7605 &&
663 codec->vendor_id != 0x111d76d1)
664 return false;
2f2f4251 665
36c9db7a
TI		 666 switch (codec->subsystem_id) {
667 case 0x103c1618:
668 case 0x103c1619:
669 case 0x103c161a:
670 case 0x103c161b:
671 case 0x103c161c:
672 case 0x103c161d:
673 case 0x103c161e:
674 case 0x103c161f:
d78d7a90 675
36c9db7a
TI		 676 case 0x103c162a:
677 case 0x103c162b:
e1f0d669 678
36c9db7a
TI		 679 case 0x103c1630:
680 case 0x103c1631:
d78d7a90 681
36c9db7a
TI		 682 case 0x103c1633:
683 case 0x103c1634:
684 case 0x103c1635:
d0513fc6 685
36c9db7a
TI		 686 case 0x103c3587:
687 case 0x103c3588:
688 case 0x103c3589:
689 case 0x103c358a:
541eee87 690
36c9db7a
TI		 691 case 0x103c3667:
692 case 0x103c3668:
693 case 0x103c3669:
2f2f4251 694
36c9db7a
TI		 695 return true;
696 }
697 return false;
698}
1697055e 699
36c9db7a
TI		 700static bool hp_blike_system(u32 subsystem_id)
701{
702 switch (subsystem_id) {
703 case 0x103c1520:
704 case 0x103c1521:
705 case 0x103c1523:
706 case 0x103c1524:
707 case 0x103c1525:
708 case 0x103c1722:
709 case 0x103c1723:
710 case 0x103c1724:
711 case 0x103c1725:
712 case 0x103c1726:
713 case 0x103c1727:
714 case 0x103c1728:
715 case 0x103c1729:
716 case 0x103c172a:
717 case 0x103c172b:
718 case 0x103c307e:
719 case 0x103c307f:
720 case 0x103c3080:
721 case 0x103c3081:
722 case 0x103c7007:
723 case 0x103c7008:
724 return true;
725 }
726 return false;
727}
d9737751 728
36c9db7a
TI		 729static void set_hp_led_gpio(struct hda_codec *codec)
730{
731 struct sigmatel_spec *spec = codec->spec;
732 unsigned int gpio;
2134ea4f 733
36c9db7a
TI		 734 if (spec->gpio_led)
735 return;
2faa3bf1 736
36c9db7a
TI		 737 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
738 gpio &= AC_GPIO_IO_COUNT;
739 if (gpio > 3)
740 spec->gpio_led = 0x08; /* GPIO 3 */
741 else
742 spec->gpio_led = 0x01; /* GPIO 0 */
2faa3bf1
TI		 743}
744
36c9db7a
TI		 745/*
746 * This method searches for the mute LED GPIO configuration
747 * provided as OEM string in SMBIOS. The format of that string
748 * is HP_Mute_LED_P_G or HP_Mute_LED_P
749 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
750 * that corresponds to the NOT muted state of the master volume
751 * and G is the index of the GPIO to use as the mute LED control (0..9)
752 * If _G portion is missing it is assigned based on the codec ID
753 *
754 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
755 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
756 *
757 *
758 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
759 * SMBIOS - at least the ones I have seen do not have them - which include
760 * my own system (HP Pavilion dv6-1110ax) and my cousin's
761 * HP Pavilion dv9500t CTO.
762 * Need more information on whether it is true across the entire series.
763 * -- kunal
764 */
765static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
2f2f4251
M		 766{
767 struct sigmatel_spec *spec = codec->spec;
36c9db7a 768 const struct dmi_device *dev = NULL;
2f2f4251 769
36c9db7a
TI		 770 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
771 get_int_hint(codec, "gpio_led_polarity",
772 &spec->gpio_led_polarity);
773 return 1;
6479c631 774 }
c7d4b2fa 775
36c9db7a
TI		 776 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
777 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
778 &spec->gpio_led_polarity,
779 &spec->gpio_led) == 2) {
780 unsigned int max_gpio;
781 max_gpio = snd_hda_param_read(codec, codec->afg,
782 AC_PAR_GPIO_CAP);
783 max_gpio &= AC_GPIO_IO_COUNT;
784 if (spec->gpio_led < max_gpio)
785 spec->gpio_led = 1 << spec->gpio_led;
786 else
787 spec->vref_mute_led_nid = spec->gpio_led;
788 return 1;
789 }
790 if (sscanf(dev->name, "HP_Mute_LED_%d",
791 &spec->gpio_led_polarity) == 1) {
792 set_hp_led_gpio(codec);
793 return 1;
794 }
795 /* BIOS bug: unfilled OEM string */
796 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
797 set_hp_led_gpio(codec);
798 if (default_polarity >= 0)
799 spec->gpio_led_polarity = default_polarity;
800 else
801 spec->gpio_led_polarity = 1;
802 return 1;
00ef50c2 803 }
d9737751 804 }
c7d4b2fa 805
36c9db7a
TI		 806 /*
807 * Fallback case - if we don't find the DMI strings,
808 * we statically set the GPIO - if not a B-series system
809 * and default polarity is provided
810 */
811 if (!hp_blike_system(codec->subsystem_id) &&
812 (default_polarity == 0 || default_polarity == 1)) {
813 set_hp_led_gpio(codec);
814 spec->gpio_led_polarity = default_polarity;
815 return 1;
dabbed6f 816 }
36c9db7a
TI		 817 return 0;
818}
2134ea4f 819
303985f8
DH		 820/* check whether a built-in speaker is included in parsed pins */
821static bool has_builtin_speaker(struct hda_codec *codec)
822{
823 struct sigmatel_spec *spec = codec->spec;
824 hda_nid_t *nid_pin;
825 int nids, i;
826
827 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
828 nid_pin = spec->gen.autocfg.line_out_pins;
829 nids = spec->gen.autocfg.line_outs;
830 } else {
831 nid_pin = spec->gen.autocfg.speaker_pins;
832 nids = spec->gen.autocfg.speaker_outs;
833 }
834
835 for (i = 0; i < nids; i++) {
836 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
837 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
838 return true;
839 }
840 return false;
841}
842
36c9db7a
TI		 843/*
844 * PC beep controls
845 */
2faa3bf1 846
36c9db7a
TI		 847/* create PC beep volume controls */
848static int stac_auto_create_beep_ctls(struct hda_codec *codec,
849 hda_nid_t nid)
850{
851 struct sigmatel_spec *spec = codec->spec;
852 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
853 struct snd_kcontrol_new *knew;
854 static struct snd_kcontrol_new abeep_mute_ctl =
855 HDA_CODEC_MUTE(NULL, 0, 0, 0);
856 static struct snd_kcontrol_new dbeep_mute_ctl =
857 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
858 static struct snd_kcontrol_new beep_vol_ctl =
859 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
2faa3bf1 860
36c9db7a
TI		 861 /* check for mute support for the the amp */
862 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
863 const struct snd_kcontrol_new *temp;
864 if (spec->anabeep_nid == nid)
865 temp = &abeep_mute_ctl;
866 else
867 temp = &dbeep_mute_ctl;
868 knew = snd_hda_gen_add_kctl(&spec->gen,
869 "Beep Playback Switch", temp);
870 if (!knew)
871 return -ENOMEM;
872 knew->private_value =
873 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
2134ea4f
TI		 874 }
875
36c9db7a
TI		 876 /* check to see if there is volume support for the amp */
877 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
878 knew = snd_hda_gen_add_kctl(&spec->gen,
879 "Beep Playback Volume",
880 &beep_vol_ctl);
881 if (!knew)
882 return -ENOMEM;
883 knew->private_value =
884 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
d78d7a90 885 }
36c9db7a
TI		 886 return 0;
887}
d78d7a90 888
36c9db7a
TI		 889#ifdef CONFIG_SND_HDA_INPUT_BEEP
890#define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
e4973e1e 891
36c9db7a
TI		 892static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
893 struct snd_ctl_elem_value *ucontrol)
894{
895 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
896 ucontrol->value.integer.value[0] = codec->beep->enabled;
897 return 0;
898}
e4973e1e 899
36c9db7a
TI		 900static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
901 struct snd_ctl_elem_value *ucontrol)
902{
903 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
904 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
2f2f4251
M		 905}
906
36c9db7a
TI		 907static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
908 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
909 .name = "Beep Playback Switch",
910 .info = stac_dig_beep_switch_info,
911 .get = stac_dig_beep_switch_get,
912 .put = stac_dig_beep_switch_put,
2f2f4251
M		 913};
914
36c9db7a
TI		 915static int stac_beep_switch_ctl(struct hda_codec *codec)
916{
917 struct sigmatel_spec *spec = codec->spec;
918
919 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
920 return -ENOMEM;
921 return 0;
922}
923#endif
924
42875479
TI		 925/*
926 * SPDIF-out mux controls
927 */
928
929static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
930 struct snd_ctl_elem_info *uinfo)
931{
932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
933 struct sigmatel_spec *spec = codec->spec;
934 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
935}
936
937static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
938 struct snd_ctl_elem_value *ucontrol)
939{
940 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
941 struct sigmatel_spec *spec = codec->spec;
942 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
943
944 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
945 return 0;
946}
947
948static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
949 struct snd_ctl_elem_value *ucontrol)
950{
951 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
952 struct sigmatel_spec *spec = codec->spec;
953 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
954
955 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
956 spec->gen.autocfg.dig_out_pins[smux_idx],
957 &spec->cur_smux[smux_idx]);
958}
959
960static struct snd_kcontrol_new stac_smux_mixer = {
961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
962 .name = "IEC958 Playback Source",
963 /* count set later */
964 .info = stac_smux_enum_info,
965 .get = stac_smux_enum_get,
966 .put = stac_smux_enum_put,
967};
968
969static const char * const stac_spdif_labels[] = {
970 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
971};
972
973static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
974{
975 struct sigmatel_spec *spec = codec->spec;
976 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
977 const char * const *labels = spec->spdif_labels;
978 struct snd_kcontrol_new *kctl;
979 int i, num_cons;
980
981 if (cfg->dig_outs < 1)
982 return 0;
983
984 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
985 if (num_cons <= 1)
986 return 0;
987
988 if (!labels)
989 labels = stac_spdif_labels;
990 for (i = 0; i < num_cons; i++) {
991 if (snd_BUG_ON(!labels[i]))
992 return -EINVAL;
993 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
994 }
995
996 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
997 if (!kctl)
998 return -ENOMEM;
999 kctl->count = cfg->dig_outs;
1000
1001 return 0;
1002}
1003
36c9db7a
TI		 1004/*
1005 */
1006
1007static const struct hda_verb stac9200_core_init[] = {
1008 /* set dac0mux for dac converter */
1009 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
d39a3ae8 1010 {}
58eec423 1011};
d39a3ae8 1012
36c9db7a
TI		 1013static const struct hda_verb stac9200_eapd_init[] = {
1014 /* set dac0mux for dac converter */
1015 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1016 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
d39a3ae8 1017 {}
58eec423
MCC		 1018};
1019
36c9db7a
TI		 1020static const struct hda_verb dell_eq_core_init[] = {
1021 /* set master volume to max value without distortion
1022 * and direct control */
1023 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
d39a3ae8 1024 {}
dfe495d0
TI		 1025};
1026
36c9db7a
TI		 1027static const struct hda_verb stac92hd73xx_core_init[] = {
1028 /* set master volume and direct control */
1029 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d39a3ae8 1030 {}
dfe495d0
TI		 1031};
1032
36c9db7a
TI		 1033static const struct hda_verb stac92hd83xxx_core_init[] = {
1034 /* power state controls amps */
1035 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1036 {}
1037};
1038
1039static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1040 { 0x22, 0x785, 0x43 },
1041 { 0x22, 0x782, 0xe0 },
1042 { 0x22, 0x795, 0x00 },
1043 {}
1044};
1045
1046static const struct hda_verb stac92hd71bxx_core_init[] = {
1047 /* set master volume and direct control */
1048 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1049 {}
1050};
1051
1052static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1053 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1054 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1055 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1056 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1057 {}
1058};
1059
1060static const struct hda_verb stac925x_core_init[] = {
1061 /* set dac0mux for dac converter */
1062 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1063 /* mute the master volume */
1064 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1065 {}
1066};
1067
1068static const struct hda_verb stac922x_core_init[] = {
1069 /* set master volume and direct control */
1070 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1071 {}
1072};
1073
1074static const struct hda_verb d965_core_init[] = {
1075 /* unmute node 0x1b */
1076 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1077 /* select node 0x03 as DAC */
1078 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1079 {}
1080};
1081
1082static const struct hda_verb dell_3st_core_init[] = {
1083 /* don't set delta bit */
1084 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1085 /* unmute node 0x1b */
1086 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1087 /* select node 0x03 as DAC */
1088 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1089 {}
1090};
1091
1092static const struct hda_verb stac927x_core_init[] = {
1093 /* set master volume and direct control */
1094 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1095 /* enable analog pc beep path */
1096 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1097 {}
1098};
1099
1100static const struct hda_verb stac927x_volknob_core_init[] = {
1101 /* don't set delta bit */
1102 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1103 /* enable analog pc beep path */
1104 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1105 {}
1106};
1107
1108static const struct hda_verb stac9205_core_init[] = {
1109 /* set master volume and direct control */
1110 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1111 /* enable analog pc beep path */
1112 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1113 {}
1114};
1115
1116static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1117 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1118
1119static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1120 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1121
1122static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1123 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1124
1125static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1126 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1127
1128static const struct snd_kcontrol_new stac9205_loopback =
1129 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1130
1131static const struct snd_kcontrol_new stac927x_loopback =
1132 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1133
1134static const struct hda_pintbl ref9200_pin_configs[] = {
1135 { 0x08, 0x01c47010 },
1136 { 0x09, 0x01447010 },
1137 { 0x0d, 0x0221401f },
1138 { 0x0e, 0x01114010 },
1139 { 0x0f, 0x02a19020 },
1140 { 0x10, 0x01a19021 },
1141 { 0x11, 0x90100140 },
1142 { 0x12, 0x01813122 },
1143 {}
1144};
1145
1146static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1147 { 0x08, 0x400000fe },
1148 { 0x09, 0x404500f4 },
1149 { 0x0d, 0x400100f0 },
1150 { 0x0e, 0x90110010 },
1151 { 0x0f, 0x400100f1 },
1152 { 0x10, 0x02a1902e },
1153 { 0x11, 0x500000f2 },
1154 { 0x12, 0x500000f3 },
1155 {}
1156};
1157
1158static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1159 { 0x08, 0x400000fe },
1160 { 0x09, 0x404500f4 },
1161 { 0x0d, 0x400100f0 },
1162 { 0x0e, 0x90110010 },
1163 { 0x0f, 0x400100f1 },
1164 { 0x10, 0x02a1902e },
1165 { 0x11, 0x500000f2 },
1166 { 0x12, 0x500000f3 },
1167 {}
1168};
1169
1170/*
1171 STAC 9200 pin configs for
1172 102801A8
1173 102801DE
1174 102801E8
1175*/
1176static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1177 { 0x08, 0x400001f0 },
1178 { 0x09, 0x400001f1 },
1179 { 0x0d, 0x02214030 },
1180 { 0x0e, 0x01014010 },
1181 { 0x0f, 0x02a19020 },
1182 { 0x10, 0x01a19021 },
1183 { 0x11, 0x90100140 },
1184 { 0x12, 0x01813122 },
1185 {}
1186};
1187
1188/*
1189 STAC 9200 pin configs for
1190 102801C0
1191 102801C1
1192*/
1193static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1194 { 0x08, 0x400001f0 },
1195 { 0x09, 0x400001f1 },
1196 { 0x0d, 0x0221401f },
1197 { 0x0e, 0x01014010 },
1198 { 0x0f, 0x01813020 },
1199 { 0x10, 0x02a19021 },
1200 { 0x11, 0x90100140 },
1201 { 0x12, 0x400001f2 },
1202 {}
1203};
1204
1205/*
dfe495d0
TI		 1206 STAC 9200 pin configs for
1207 102801C4 (Dell Dimension E310)
1208 102801C5
1209 102801C7
1210 102801D9
1211 102801DA
1212 102801E3
1213*/
d39a3ae8
TI		 1214static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1215 { 0x08, 0x400001f0 },
1216 { 0x09, 0x400001f1 },
1217 { 0x0d, 0x0221401f },
1218 { 0x0e, 0x01014010 },
1219 { 0x0f, 0x01813020 },
1220 { 0x10, 0x01a19021 },
1221 { 0x11, 0x90100140 },
1222 { 0x12, 0x400001f2 },
1223 {}
dfe495d0
TI		 1224};
1225
1226
1227/*
1228 STAC 9200-32 pin configs for
1229 102801B5 (Dell Inspiron 630m)
1230 102801D8 (Dell Inspiron 640m)
1231*/
d39a3ae8
TI		 1232static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1233 { 0x08, 0x40c003fa },
1234 { 0x09, 0x03441340 },
1235 { 0x0d, 0x0321121f },
1236 { 0x0e, 0x90170310 },
1237 { 0x0f, 0x408003fb },
1238 { 0x10, 0x03a11020 },
1239 { 0x11, 0x401003fc },
1240 { 0x12, 0x403003fd },
1241 {}
dfe495d0
TI		 1242};
1243
1244/*
1245 STAC 9200-32 pin configs for
1246 102801C2 (Dell Latitude D620)
1247 102801C8
1248 102801CC (Dell Latitude D820)
1249 102801D4
1250 102801D6
1251*/
d39a3ae8
TI		 1252static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1253 { 0x08, 0x40c003fa },
1254 { 0x09, 0x0144131f },
1255 { 0x0d, 0x0321121f },
1256 { 0x0e, 0x90170310 },
1257 { 0x0f, 0x90a70321 },
1258 { 0x10, 0x03a11020 },
1259 { 0x11, 0x401003fb },
1260 { 0x12, 0x40f000fc },
1261 {}
dfe495d0
TI		 1262};
1263
1264/*
1265 STAC 9200-32 pin configs for
1266 102801CE (Dell XPS M1710)
1267 102801CF (Dell Precision M90)
1268*/
d39a3ae8
TI		 1269static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1270 { 0x08, 0x40c003fa },
1271 { 0x09, 0x01441340 },
1272 { 0x0d, 0x0421421f },
1273 { 0x0e, 0x90170310 },
1274 { 0x0f, 0x408003fb },
1275 { 0x10, 0x04a1102e },
1276 { 0x11, 0x90170311 },
1277 { 0x12, 0x403003fc },
1278 {}
dfe495d0
TI		 1279};
1280
1281/*
1282 STAC 9200-32 pin configs for
1283 102801C9
1284 102801CA
1285 102801CB (Dell Latitude 120L)
1286 102801D3
1287*/
d39a3ae8
TI		 1288static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1289 { 0x08, 0x40c003fa },
1290 { 0x09, 0x404003fb },
1291 { 0x0d, 0x0321121f },
1292 { 0x0e, 0x90170310 },
1293 { 0x0f, 0x408003fc },
1294 { 0x10, 0x03a11020 },
1295 { 0x11, 0x401003fd },
1296 { 0x12, 0x403003fe },
1297 {}
dfe495d0
TI		 1298};
1299
1300/*
1301 STAC 9200-32 pin configs for
1302 102801BD (Dell Inspiron E1505n)
1303 102801EE
1304 102801EF
1305*/
d39a3ae8
TI		 1306static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1307 { 0x08, 0x40c003fa },
1308 { 0x09, 0x01441340 },
1309 { 0x0d, 0x0421121f },
1310 { 0x0e, 0x90170310 },
1311 { 0x0f, 0x408003fb },
1312 { 0x10, 0x04a11020 },
1313 { 0x11, 0x401003fc },
1314 { 0x12, 0x403003fd },
1315 {}
dfe495d0
TI		 1316};
1317
1318/*
1319 STAC 9200-32 pin configs for
1320 102801F5 (Dell Inspiron 1501)
1321 102801F6
1322*/
d39a3ae8
TI		 1323static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1324 { 0x08, 0x40c003fa },
1325 { 0x09, 0x404003fb },
1326 { 0x0d, 0x0421121f },
1327 { 0x0e, 0x90170310 },
1328 { 0x0f, 0x408003fc },
1329 { 0x10, 0x04a11020 },
1330 { 0x11, 0x401003fd },
1331 { 0x12, 0x403003fe },
1332 {}
dfe495d0
TI		 1333};
1334
1335/*
1336 STAC 9200-32
1337 102801CD (Dell Inspiron E1705/9400)
1338*/
d39a3ae8
TI		 1339static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1340 { 0x08, 0x40c003fa },
1341 { 0x09, 0x01441340 },
1342 { 0x0d, 0x0421121f },
1343 { 0x0e, 0x90170310 },
1344 { 0x0f, 0x90170310 },
1345 { 0x10, 0x04a11020 },
1346 { 0x11, 0x90170310 },
1347 { 0x12, 0x40f003fc },
1348 {}
dfe495d0
TI		 1349};
1350
d39a3ae8
TI		 1351static const struct hda_pintbl oqo9200_pin_configs[] = {
1352 { 0x08, 0x40c000f0 },
1353 { 0x09, 0x404000f1 },
1354 { 0x0d, 0x0221121f },
1355 { 0x0e, 0x02211210 },
1356 { 0x0f, 0x90170111 },
1357 { 0x10, 0x90a70120 },
1358 { 0x11, 0x400000f2 },
1359 { 0x12, 0x400000f3 },
1360 {}
bf277785
TD		 1361};
1362
dfe495d0 1363
d39a3ae8
TI		 1364static void stac9200_fixup_panasonic(struct hda_codec *codec,
1365 const struct hda_fixup *fix, int action)
1366{
1367 struct sigmatel_spec *spec = codec->spec;
1368
36c9db7a 1369 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
d39a3ae8
TI		 1370 spec->gpio_mask = spec->gpio_dir = 0x09;
1371 spec->gpio_data = 0x00;
d39a3ae8
TI		 1372 /* CF-74 has no headphone detection, and the driver should *NOT*
1373 * do detection and HP/speaker toggle because the hardware does it.
1374 */
36c9db7a 1375 spec->gen.suppress_auto_mute = 1;
d39a3ae8
TI		 1376 }
1377}
1378
1379
1380static const struct hda_fixup stac9200_fixups[] = {
1381 [STAC_REF] = {
1382 .type = HDA_FIXUP_PINS,
1383 .v.pins = ref9200_pin_configs,
1384 },
1385 [STAC_9200_OQO] = {
1386 .type = HDA_FIXUP_PINS,
1387 .v.pins = oqo9200_pin_configs,
1388 .chained = true,
1389 .chain_id = STAC_9200_EAPD_INIT,
1390 },
1391 [STAC_9200_DELL_D21] = {
1392 .type = HDA_FIXUP_PINS,
1393 .v.pins = dell9200_d21_pin_configs,
1394 },
1395 [STAC_9200_DELL_D22] = {
1396 .type = HDA_FIXUP_PINS,
1397 .v.pins = dell9200_d22_pin_configs,
1398 },
1399 [STAC_9200_DELL_D23] = {
1400 .type = HDA_FIXUP_PINS,
1401 .v.pins = dell9200_d23_pin_configs,
1402 },
1403 [STAC_9200_DELL_M21] = {
1404 .type = HDA_FIXUP_PINS,
1405 .v.pins = dell9200_m21_pin_configs,
1406 },
1407 [STAC_9200_DELL_M22] = {
1408 .type = HDA_FIXUP_PINS,
1409 .v.pins = dell9200_m22_pin_configs,
1410 },
1411 [STAC_9200_DELL_M23] = {
1412 .type = HDA_FIXUP_PINS,
1413 .v.pins = dell9200_m23_pin_configs,
1414 },
1415 [STAC_9200_DELL_M24] = {
1416 .type = HDA_FIXUP_PINS,
1417 .v.pins = dell9200_m24_pin_configs,
1418 },
1419 [STAC_9200_DELL_M25] = {
1420 .type = HDA_FIXUP_PINS,
1421 .v.pins = dell9200_m25_pin_configs,
1422 },
1423 [STAC_9200_DELL_M26] = {
1424 .type = HDA_FIXUP_PINS,
1425 .v.pins = dell9200_m26_pin_configs,
1426 },
1427 [STAC_9200_DELL_M27] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = dell9200_m27_pin_configs,
1430 },
1431 [STAC_9200_M4] = {
1432 .type = HDA_FIXUP_PINS,
1433 .v.pins = gateway9200_m4_pin_configs,
1434 .chained = true,
1435 .chain_id = STAC_9200_EAPD_INIT,
1436 },
1437 [STAC_9200_M4_2] = {
1438 .type = HDA_FIXUP_PINS,
1439 .v.pins = gateway9200_m4_2_pin_configs,
1440 .chained = true,
1441 .chain_id = STAC_9200_EAPD_INIT,
1442 },
1443 [STAC_9200_PANASONIC] = {
1444 .type = HDA_FIXUP_FUNC,
1445 .v.func = stac9200_fixup_panasonic,
1446 },
1447 [STAC_9200_EAPD_INIT] = {
1448 .type = HDA_FIXUP_VERBS,
1449 .v.verbs = (const struct hda_verb[]) {
1450 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1451 {}
1452 },
1453 },
403d1944
MP		 1454};
1455
d39a3ae8
TI		 1456static const struct hda_model_fixup stac9200_models[] = {
1457 { .id = STAC_REF, .name = "ref" },
1458 { .id = STAC_9200_OQO, .name = "oqo" },
1459 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1460 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1461 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1462 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1463 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1464 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1465 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1466 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1467 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1468 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1469 { .id = STAC_9200_M4, .name = "gateway-m4" },
1470 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1471 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1472 {}
1473};
1474
1475static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
f5fcc13c
TI		 1476 /* SigmaTel reference board */
1477 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1478 "DFI LanParty", STAC_REF),
577aa2c1
MR		 1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1480 "DFI LanParty", STAC_REF),
e7377071 1481 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1483 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1485 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1487 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1489 "unknown Dell", STAC_9200_DELL_D22),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1491 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1493 "Dell Latitude D620", STAC_9200_DELL_M22),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1495 "unknown Dell", STAC_9200_DELL_D23),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1497 "unknown Dell", STAC_9200_DELL_D23),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1499 "unknown Dell", STAC_9200_DELL_M22),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1501 "unknown Dell", STAC_9200_DELL_M24),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1503 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1505 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1507 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1509 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1511 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1513 "Dell Precision M90", STAC_9200_DELL_M23),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1515 "unknown Dell", STAC_9200_DELL_M22),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1517 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1519 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1521 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1523 "unknown Dell", STAC_9200_DELL_D23),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1525 "unknown Dell", STAC_9200_DELL_D23),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1527 "unknown Dell", STAC_9200_DELL_D21),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1529 "unknown Dell", STAC_9200_DELL_D23),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1531 "unknown Dell", STAC_9200_DELL_D21),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1533 "unknown Dell", STAC_9200_DELL_M25),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1535 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1537 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1539 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1540 /* Panasonic */
117f257d 1541 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1542 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC		 1543 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1544 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1545 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD		 1546 /* OQO Mobile */
1547 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1548 {} /* terminator */
1549};
1550
d2077d40
TI		 1551static const struct hda_pintbl ref925x_pin_configs[] = {
1552 { 0x07, 0x40c003f0 },
1553 { 0x08, 0x424503f2 },
1554 { 0x0a, 0x01813022 },
1555 { 0x0b, 0x02a19021 },
1556 { 0x0c, 0x90a70320 },
1557 { 0x0d, 0x02214210 },
1558 { 0x10, 0x01019020 },
1559 { 0x11, 0x9033032e },
1560 {}
8e21c34c
TD		 1561};
1562
d2077d40
TI		 1563static const struct hda_pintbl stac925xM1_pin_configs[] = {
1564 { 0x07, 0x40c003f4 },
1565 { 0x08, 0x424503f2 },
1566 { 0x0a, 0x400000f3 },
1567 { 0x0b, 0x02a19020 },
1568 { 0x0c, 0x40a000f0 },
1569 { 0x0d, 0x90100210 },
1570 { 0x10, 0x400003f1 },
1571 { 0x11, 0x9033032e },
1572 {}
8e21c34c
TD		 1573};
1574
d2077d40
TI		 1575static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1576 { 0x07, 0x40c003f4 },
1577 { 0x08, 0x424503f2 },
1578 { 0x0a, 0x400000f3 },
1579 { 0x0b, 0x02a19020 },
1580 { 0x0c, 0x40a000f0 },
1581 { 0x0d, 0x90100210 },
1582 { 0x10, 0x400003f1 },
1583 { 0x11, 0x9033032e },
1584 {}
9cb36c2a 1585};
58eec423 1586
d2077d40
TI		 1587static const struct hda_pintbl stac925xM2_pin_configs[] = {
1588 { 0x07, 0x40c003f4 },
1589 { 0x08, 0x424503f2 },
1590 { 0x0a, 0x400000f3 },
1591 { 0x0b, 0x02a19020 },
1592 { 0x0c, 0x40a000f0 },
1593 { 0x0d, 0x90100210 },
1594 { 0x10, 0x400003f1 },
1595 { 0x11, 0x9033032e },
1596 {}
2c11f955
TD		 1597};
1598
d2077d40
TI		 1599static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1600 { 0x07, 0x40c003f4 },
1601 { 0x08, 0x424503f2 },
1602 { 0x0a, 0x400000f3 },
1603 { 0x0b, 0x02a19020 },
1604 { 0x0c, 0x40a000f0 },
1605 { 0x0d, 0x90100210 },
1606 { 0x10, 0x400003f1 },
1607 { 0x11, 0x9033032e },
1608 {}
58eec423
MCC		 1609};
1610
d2077d40
TI		 1611static const struct hda_pintbl stac925xM3_pin_configs[] = {
1612 { 0x07, 0x40c003f4 },
1613 { 0x08, 0x424503f2 },
1614 { 0x0a, 0x400000f3 },
1615 { 0x0b, 0x02a19020 },
1616 { 0x0c, 0x40a000f0 },
1617 { 0x0d, 0x90100210 },
1618 { 0x10, 0x400003f1 },
1619 { 0x11, 0x503303f3 },
1620 {}
9cb36c2a 1621};
58eec423 1622
d2077d40
TI		 1623static const struct hda_pintbl stac925xM5_pin_configs[] = {
1624 { 0x07, 0x40c003f4 },
1625 { 0x08, 0x424503f2 },
1626 { 0x0a, 0x400000f3 },
1627 { 0x0b, 0x02a19020 },
1628 { 0x0c, 0x40a000f0 },
1629 { 0x0d, 0x90100210 },
1630 { 0x10, 0x400003f1 },
1631 { 0x11, 0x9033032e },
1632 {}
9cb36c2a
MCC		 1633};
1634
d2077d40
TI		 1635static const struct hda_pintbl stac925xM6_pin_configs[] = {
1636 { 0x07, 0x40c003f4 },
1637 { 0x08, 0x424503f2 },
1638 { 0x0a, 0x400000f3 },
1639 { 0x0b, 0x02a19020 },
1640 { 0x0c, 0x40a000f0 },
1641 { 0x0d, 0x90100210 },
1642 { 0x10, 0x400003f1 },
1643 { 0x11, 0x90330320 },
1644 {}
8e21c34c
TD		 1645};
1646
d2077d40
TI		 1647static const struct hda_fixup stac925x_fixups[] = {
1648 [STAC_REF] = {
1649 .type = HDA_FIXUP_PINS,
1650 .v.pins = ref925x_pin_configs,
1651 },
1652 [STAC_M1] = {
1653 .type = HDA_FIXUP_PINS,
1654 .v.pins = stac925xM1_pin_configs,
1655 },
1656 [STAC_M1_2] = {
1657 .type = HDA_FIXUP_PINS,
1658 .v.pins = stac925xM1_2_pin_configs,
1659 },
1660 [STAC_M2] = {
1661 .type = HDA_FIXUP_PINS,
1662 .v.pins = stac925xM2_pin_configs,
1663 },
1664 [STAC_M2_2] = {
1665 .type = HDA_FIXUP_PINS,
1666 .v.pins = stac925xM2_2_pin_configs,
1667 },
1668 [STAC_M3] = {
1669 .type = HDA_FIXUP_PINS,
1670 .v.pins = stac925xM3_pin_configs,
1671 },
1672 [STAC_M5] = {
1673 .type = HDA_FIXUP_PINS,
1674 .v.pins = stac925xM5_pin_configs,
1675 },
1676 [STAC_M6] = {
1677 .type = HDA_FIXUP_PINS,
1678 .v.pins = stac925xM6_pin_configs,
1679 },
8e21c34c
TD		 1680};
1681
d2077d40
TI		 1682static const struct hda_model_fixup stac925x_models[] = {
1683 { .id = STAC_REF, .name = "ref" },
1684 { .id = STAC_M1, .name = "m1" },
1685 { .id = STAC_M1_2, .name = "m1-2" },
1686 { .id = STAC_M2, .name = "m2" },
1687 { .id = STAC_M2_2, .name = "m2-2" },
1688 { .id = STAC_M3, .name = "m3" },
1689 { .id = STAC_M5, .name = "m5" },
1690 { .id = STAC_M6, .name = "m6" },
1691 {}
8e21c34c
TD		 1692};
1693
d2077d40
TI		 1694static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1695 /* SigmaTel reference board */
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1698 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1699
1700 /* Default table for unknown ID */
1701 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1702
1703 /* gateway machines are checked via codec ssid */
58eec423
MCC		 1704 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1705 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1706 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1707 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1708 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC		 1709 /* Not sure about the brand name for those */
1710 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1711 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1712 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1713 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1714 {} /* terminator */
8e21c34c
TD		 1715};
1716
55e30141
TI		 1717static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1718 { 0x0a, 0x02214030 },
1719 { 0x0b, 0x02a19040 },
1720 { 0x0c, 0x01a19020 },
1721 { 0x0d, 0x02214030 },
1722 { 0x0e, 0x0181302e },
1723 { 0x0f, 0x01014010 },
1724 { 0x10, 0x01014020 },
1725 { 0x11, 0x01014030 },
1726 { 0x12, 0x02319040 },
1727 { 0x13, 0x90a000f0 },
1728 { 0x14, 0x90a000f0 },
1729 { 0x22, 0x01452050 },
1730 { 0x23, 0x01452050 },
1731 {}
a7662640
MR		 1732};
1733
55e30141
TI		 1734static const struct hda_pintbl dell_m6_pin_configs[] = {
1735 { 0x0a, 0x0321101f },
1736 { 0x0b, 0x4f00000f },
1737 { 0x0c, 0x4f0000f0 },
1738 { 0x0d, 0x90170110 },
1739 { 0x0e, 0x03a11020 },
1740 { 0x0f, 0x0321101f },
1741 { 0x10, 0x4f0000f0 },
1742 { 0x11, 0x4f0000f0 },
1743 { 0x12, 0x4f0000f0 },
1744 { 0x13, 0x90a60160 },
1745 { 0x14, 0x4f0000f0 },
1746 { 0x22, 0x4f0000f0 },
1747 { 0x23, 0x4f0000f0 },
1748 {}
e1f0d669
MR		 1749};
1750
55e30141
TI		 1751static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1752 { 0x0a, 0x0321101f },
1753 { 0x0b, 0x0321101f },
1754 { 0x0c, 0x03a11020 },
1755 { 0x0d, 0x03014020 },
1756 { 0x0e, 0x90170110 },
1757 { 0x0f, 0x4f0000f0 },
1758 { 0x10, 0x4f0000f0 },
1759 { 0x11, 0x4f0000f0 },
1760 { 0x12, 0x4f0000f0 },
1761 { 0x13, 0x90a60160 },
1762 { 0x14, 0x4f0000f0 },
1763 { 0x22, 0x4f0000f0 },
1764 { 0x23, 0x904601b0 },
1765 {}
842ae638
TI		 1766};
1767
55e30141
TI		 1768static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1769 { 0x0a, 0x02214230 },
1770 { 0x0b, 0x02A19240 },
1771 { 0x0c, 0x01013214 },
1772 { 0x0d, 0x01014210 },
1773 { 0x0e, 0x01A19250 },
1774 { 0x0f, 0x01011212 },
1775 { 0x10, 0x01016211 },
1776 {}
52dc4386
AF		 1777};
1778
55e30141
TI		 1779static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1780 const struct hda_fixup *fix, int action)
1781{
1782 struct sigmatel_spec *spec = codec->spec;
1783
1784 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1785 return;
1786
1787 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1788 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1789}
1790
1791static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1792{
1793 struct sigmatel_spec *spec = codec->spec;
1794
1795 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
55e30141
TI		 1796 spec->eapd_switch = 0;
1797}
1798
1799static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1800 const struct hda_fixup *fix, int action)
1801{
1802 struct sigmatel_spec *spec = codec->spec;
1803
1804 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1805 return;
1806
1807 stac92hd73xx_fixup_dell(codec);
1808 snd_hda_add_verbs(codec, dell_eq_core_init);
1809 spec->volknob_init = 1;
1810}
1811
1812/* Analog Mics */
1813static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1814 const struct hda_fixup *fix, int action)
1815{
55e30141
TI		 1816 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1817 return;
1818
1819 stac92hd73xx_fixup_dell(codec);
1820 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
55e30141
TI		 1821}
1822
1823/* Digital Mics */
1824static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1825 const struct hda_fixup *fix, int action)
1826{
55e30141
TI		 1827 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1828 return;
1829
1830 stac92hd73xx_fixup_dell(codec);
1831 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1832}
1833
1834/* Both */
1835static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1836 const struct hda_fixup *fix, int action)
1837{
55e30141
TI		 1838 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1839 return;
1840
1841 stac92hd73xx_fixup_dell(codec);
1842 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1843 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
55e30141
TI		 1844}
1845
1846static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1847 const struct hda_fixup *fix, int action)
1848{
1849 struct sigmatel_spec *spec = codec->spec;
1850
1851 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1852 return;
1853
1854 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
55e30141
TI		 1855 spec->eapd_switch = 0;
1856}
1857
1858static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1859 const struct hda_fixup *fix, int action)
1860{
36c9db7a
TI		 1861 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1862 codec->no_jack_detect = 1;
55e30141
TI		 1863}
1864
1865static const struct hda_fixup stac92hd73xx_fixups[] = {
1866 [STAC_92HD73XX_REF] = {
1867 .type = HDA_FIXUP_FUNC,
1868 .v.func = stac92hd73xx_fixup_ref,
1869 },
1870 [STAC_DELL_M6_AMIC] = {
1871 .type = HDA_FIXUP_FUNC,
1872 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1873 },
1874 [STAC_DELL_M6_DMIC] = {
1875 .type = HDA_FIXUP_FUNC,
1876 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1877 },
1878 [STAC_DELL_M6_BOTH] = {
1879 .type = HDA_FIXUP_FUNC,
1880 .v.func = stac92hd73xx_fixup_dell_m6_both,
1881 },
1882 [STAC_DELL_EQ] = {
1883 .type = HDA_FIXUP_FUNC,
1884 .v.func = stac92hd73xx_fixup_dell_eq,
1885 },
1886 [STAC_ALIENWARE_M17X] = {
1887 .type = HDA_FIXUP_FUNC,
1888 .v.func = stac92hd73xx_fixup_alienware_m17x,
1889 },
1890 [STAC_92HD73XX_INTEL] = {
1891 .type = HDA_FIXUP_PINS,
1892 .v.pins = intel_dg45id_pin_configs,
1893 },
1894 [STAC_92HD73XX_NO_JD] = {
1895 .type = HDA_FIXUP_FUNC,
1896 .v.func = stac92hd73xx_fixup_no_jd,
1897 }
e1f0d669
MR		 1898};
1899
55e30141
TI		 1900static const struct hda_model_fixup stac92hd73xx_models[] = {
1901 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1902 { .id = STAC_92HD73XX_REF, .name = "ref" },
1903 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1904 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1905 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1906 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1907 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1908 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1909 {}
e1f0d669
MR		 1910};
1911
55e30141 1912static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
e1f0d669
MR		 1913 /* SigmaTel reference board */
1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1915 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR		 1916 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1917 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF		 1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1919 "Intel DG45ID", STAC_92HD73XX_INTEL),
1920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1921 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1922 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1923 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1924 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1925 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1926 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1927 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1928 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1929 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1930 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1931 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1933 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1935 "unknown Dell", STAC_DELL_M6_DMIC),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1937 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1939 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1941 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI		 1942 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1943 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB		 1944 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1945 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1946 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1947 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1948 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1949 "Dell Studio 1558", STAC_DELL_M6_DMIC),
55e30141 1950 /* codec SSID matching */
842ae638
TI		 1951 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1952 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC		 1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1954 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1956 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI		 1957 {} /* terminator */
1958};
1959
372f8c75
TI		 1960static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1961 { 0x0a, 0x02214030 },
1962 { 0x0b, 0x02211010 },
1963 { 0x0c, 0x02a19020 },
1964 { 0x0d, 0x02170130 },
1965 { 0x0e, 0x01014050 },
1966 { 0x0f, 0x01819040 },
1967 { 0x10, 0x01014020 },
1968 { 0x11, 0x90a3014e },
1969 { 0x1f, 0x01451160 },
1970 { 0x20, 0x98560170 },
1971 {}
d0513fc6
MR		 1972};
1973
372f8c75
TI		 1974static const struct hda_pintbl dell_s14_pin_configs[] = {
1975 { 0x0a, 0x0221403f },
1976 { 0x0b, 0x0221101f },
1977 { 0x0c, 0x02a19020 },
1978 { 0x0d, 0x90170110 },
1979 { 0x0e, 0x40f000f0 },
1980 { 0x0f, 0x40f000f0 },
1981 { 0x10, 0x40f000f0 },
1982 { 0x11, 0x90a60160 },
1983 { 0x1f, 0x40f000f0 },
1984 { 0x20, 0x40f000f0 },
1985 {}
8bb0ac55
MR		 1986};
1987
372f8c75
TI		 1988static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
1989 { 0x0a, 0x02a11020 },
1990 { 0x0b, 0x0221101f },
1991 { 0x0c, 0x400000f0 },
1992 { 0x0d, 0x90170110 },
1993 { 0x0e, 0x400000f1 },
1994 { 0x0f, 0x400000f2 },
1995 { 0x10, 0x400000f3 },
1996 { 0x11, 0x90a60160 },
1997 { 0x1f, 0x400000f4 },
1998 { 0x20, 0x400000f5 },
1999 {}
f7f9bdfa
JW		 2000};
2001
372f8c75
TI		 2002static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2003 { 0x0a, 0x03a12050 },
2004 { 0x0b, 0x0321201f },
2005 { 0x0c, 0x40f000f0 },
2006 { 0x0d, 0x90170110 },
2007 { 0x0e, 0x40f000f0 },
2008 { 0x0f, 0x40f000f0 },
2009 { 0x10, 0x90170110 },
2010 { 0x11, 0xd5a30140 },
2011 { 0x1f, 0x40f000f0 },
2012 { 0x20, 0x40f000f0 },
2013 {}
48315590
SE		 2014};
2015
372f8c75
TI		 2016static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2017 { 0x0a, 0x01813050 },
2018 { 0x0b, 0x0421201f },
2019 { 0x0c, 0x04a1205e },
2020 { 0x0d, 0x96130310 },
2021 { 0x0e, 0x96130310 },
2022 { 0x0f, 0x0101401f },
2023 { 0x10, 0x1111611f },
2024 { 0x11, 0xd5a30130 },
2025 {}
5556e147
VK		 2026};
2027
372f8c75
TI		 2028static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2029 { 0x0a, 0x40f000f0 },
2030 { 0x0b, 0x0221101f },
2031 { 0x0c, 0x02a11020 },
2032 { 0x0d, 0x92170110 },
2033 { 0x0e, 0x40f000f0 },
2034 { 0x0f, 0x92170110 },
2035 { 0x10, 0x40f000f0 },
2036 { 0x11, 0xd5a30130 },
2037 { 0x1f, 0x40f000f0 },
2038 { 0x20, 0x40f000f0 },
2039 {}
0c27c180
VK		 2040};
2041
372f8c75
TI		 2042static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2043 const struct hda_fixup *fix, int action)
2044{
2045 struct sigmatel_spec *spec = codec->spec;
2046
2047 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2048 return;
2049
2050 if (hp_bnb2011_with_dock(codec)) {
2051 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2052 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2053 }
2054
2055 if (find_mute_led_cfg(codec, spec->default_polarity))
2056 snd_printd("mute LED gpio %d polarity %d\n",
2057 spec->gpio_led,
2058 spec->gpio_led_polarity);
2059}
2060
2061static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2062 const struct hda_fixup *fix, int action)
2063{
2064 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2065 return;
2066
2067 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2068 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2069}
2070
2071static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2072 const struct hda_fixup *fix, int action)
2073{
2074 struct sigmatel_spec *spec = codec->spec;
2075
2076 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2077 spec->default_polarity = 0;
2078}
2079
2080static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2081 const struct hda_fixup *fix, int action)
2082{
2083 struct sigmatel_spec *spec = codec->spec;
2084
2085 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2086 spec->default_polarity = 1;
2087}
2088
2089static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2090 const struct hda_fixup *fix, int action)
2091{
2092 struct sigmatel_spec *spec = codec->spec;
2093
95f74c41 2094 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
372f8c75 2095 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
95f74c41
TI		 2096 codec->bus->avoid_link_reset = 1;
2097 }
372f8c75
TI		 2098}
2099
2100static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2101 const struct hda_fixup *fix, int action)
2102{
2103 struct sigmatel_spec *spec = codec->spec;
2104
2105 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2106 spec->headset_jack = 1;
2107}
2108
2109static const struct hda_fixup stac92hd83xxx_fixups[] = {
2110 [STAC_92HD83XXX_REF] = {
2111 .type = HDA_FIXUP_PINS,
2112 .v.pins = ref92hd83xxx_pin_configs,
2113 },
2114 [STAC_92HD83XXX_PWR_REF] = {
2115 .type = HDA_FIXUP_PINS,
2116 .v.pins = ref92hd83xxx_pin_configs,
2117 },
2118 [STAC_DELL_S14] = {
2119 .type = HDA_FIXUP_PINS,
2120 .v.pins = dell_s14_pin_configs,
2121 },
2122 [STAC_DELL_VOSTRO_3500] = {
2123 .type = HDA_FIXUP_PINS,
2124 .v.pins = dell_vostro_3500_pin_configs,
2125 },
2126 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2127 .type = HDA_FIXUP_PINS,
2128 .v.pins = hp_cNB11_intquad_pin_configs,
2129 .chained = true,
2130 .chain_id = STAC_92HD83XXX_HP,
2131 },
2132 [STAC_92HD83XXX_HP] = {
2133 .type = HDA_FIXUP_FUNC,
2134 .v.func = stac92hd83xxx_fixup_hp,
2135 },
2136 [STAC_HP_DV7_4000] = {
2137 .type = HDA_FIXUP_PINS,
2138 .v.pins = hp_dv7_4000_pin_configs,
2139 .chained = true,
2140 .chain_id = STAC_92HD83XXX_HP,
2141 },
2142 [STAC_HP_ZEPHYR] = {
2143 .type = HDA_FIXUP_FUNC,
2144 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2145 .chained = true,
2146 .chain_id = STAC_92HD83XXX_HP,
2147 },
2148 [STAC_92HD83XXX_HP_LED] = {
2149 .type = HDA_FIXUP_FUNC,
2150 .v.func = stac92hd83xxx_fixup_hp_led,
2151 .chained = true,
2152 .chain_id = STAC_92HD83XXX_HP,
2153 },
2154 [STAC_92HD83XXX_HP_INV_LED] = {
2155 .type = HDA_FIXUP_FUNC,
2156 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2157 .chained = true,
2158 .chain_id = STAC_92HD83XXX_HP,
2159 },
2160 [STAC_92HD83XXX_HP_MIC_LED] = {
2161 .type = HDA_FIXUP_FUNC,
2162 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2163 .chained = true,
2164 .chain_id = STAC_92HD83XXX_HP,
2165 },
2166 [STAC_92HD83XXX_HEADSET_JACK] = {
2167 .type = HDA_FIXUP_FUNC,
2168 .v.func = stac92hd83xxx_fixup_headset_jack,
2169 },
49920427
TI		 2170 [STAC_HP_ENVY_BASS] = {
2171 .type = HDA_FIXUP_PINS,
2172 .v.pins = (const struct hda_pintbl[]) {
2173 { 0x0f, 0x90170111 },
2174 {}
2175 },
2176 },
d0513fc6
MR		 2177};
2178
372f8c75
TI		 2179static const struct hda_model_fixup stac92hd83xxx_models[] = {
2180 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2181 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2182 { .id = STAC_DELL_S14, .name = "dell-s14" },
2183 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2184 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2185 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2186 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2187 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2188 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2189 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2190 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
49920427 2191 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
372f8c75 2192 {}
d0513fc6
MR		 2193};
2194
372f8c75 2195static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
d0513fc6
MR		 2196 /* SigmaTel reference board */
2197 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 2198 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR		 2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2200 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR		 2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2202 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH		 2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2204 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2206 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2208 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2210 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2212 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2214 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2216 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2218 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2220 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW		 2221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2222 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK		 2223 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2224 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2225 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2226 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2227 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2228 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2229 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 2230 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK		 2231 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2232 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2233 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2234 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
49920427
TI		 2235 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2236 "HP Envy Spectre", STAC_HP_ENVY_BASS),
62cbde18
TI		 2237 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2238 "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
f9afed1f
TI		 2239 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2240 "HP", STAC_92HD83XXX_HP_MIC_LED),
4059a42c
TI		 2241 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2242 "HP", STAC_92HD83XXX_HP_MIC_LED),
2243 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2244 "HP", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK		 2245 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2246 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2247 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2248 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2249 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2250 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2251 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2252 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2253 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2254 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2256 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2258 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2260 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2262 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2264 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2265 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2266 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2267 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2268 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2269 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2270 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2271 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2272 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK		 2273 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2274 "HP", STAC_HP_ZEPHYR),
a3e19973
TI		 2275 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2276 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV		 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2278 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
8c698fe2
TI		 2279 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2280 "HP Mini", STAC_92HD83XXX_HP_LED),
372f8c75 2281 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
574f3c4f 2282 {} /* terminator */
d0513fc6
MR		 2283};
2284
36c9db7a
TI		 2285/* HP dv7 bass switch - GPIO5 */
2286#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2287static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2288 struct snd_ctl_elem_value *ucontrol)
2289{
2290 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2291 struct sigmatel_spec *spec = codec->spec;
2292 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2293 return 0;
2294}
2295
2296static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2297 struct snd_ctl_elem_value *ucontrol)
2298{
2299 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2300 struct sigmatel_spec *spec = codec->spec;
2301 unsigned int gpio_data;
2302
2303 gpio_data = (spec->gpio_data & ~0x20) |
2304 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2305 if (gpio_data == spec->gpio_data)
2306 return 0;
2307 spec->gpio_data = gpio_data;
2308 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2309 return 1;
2310}
2311
2312static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2313 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2314 .info = stac_hp_bass_gpio_info,
2315 .get = stac_hp_bass_gpio_get,
2316 .put = stac_hp_bass_gpio_put,
2317};
2318
2319static int stac_add_hp_bass_switch(struct hda_codec *codec)
2320{
2321 struct sigmatel_spec *spec = codec->spec;
2322
2323 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2324 &stac_hp_bass_sw_ctrl))
2325 return -ENOMEM;
2326
2327 spec->gpio_mask |= 0x20;
2328 spec->gpio_dir |= 0x20;
2329 spec->gpio_data |= 0x20;
2330 return 0;
2331}
2332
0f6fcb73
TI		 2333static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2334 { 0x0a, 0x02214030 },
2335 { 0x0b, 0x02a19040 },
2336 { 0x0c, 0x01a19020 },
2337 { 0x0d, 0x01014010 },
2338 { 0x0e, 0x0181302e },
2339 { 0x0f, 0x01014010 },
2340 { 0x14, 0x01019020 },
2341 { 0x18, 0x90a000f0 },
2342 { 0x19, 0x90a000f0 },
2343 { 0x1e, 0x01452050 },
2344 { 0x1f, 0x01452050 },
2345 {}
e035b841
MR		 2346};
2347
0f6fcb73
TI		 2348static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2349 { 0x0a, 0x0421101f },
2350 { 0x0b, 0x04a11221 },
2351 { 0x0c, 0x40f000f0 },
2352 { 0x0d, 0x90170110 },
2353 { 0x0e, 0x23a1902e },
2354 { 0x0f, 0x23014250 },
2355 { 0x14, 0x40f000f0 },
2356 { 0x18, 0x90a000f0 },
2357 { 0x19, 0x40f000f0 },
2358 { 0x1e, 0x4f0000f0 },
2359 { 0x1f, 0x4f0000f0 },
2360 {}
a7662640
MR		 2361};
2362
0f6fcb73
TI		 2363static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2364 { 0x0a, 0x0421101f },
2365 { 0x0b, 0x04a11221 },
2366 { 0x0c, 0x90a70330 },
2367 { 0x0d, 0x90170110 },
2368 { 0x0e, 0x23a1902e },
2369 { 0x0f, 0x23014250 },
2370 { 0x14, 0x40f000f0 },
2371 { 0x18, 0x40f000f0 },
2372 { 0x19, 0x40f000f0 },
2373 { 0x1e, 0x044413b0 },
2374 { 0x1f, 0x044413b0 },
2375 {}
a7662640
MR		 2376};
2377
0f6fcb73
TI		 2378static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2379 { 0x0a, 0x0421101f },
2380 { 0x0b, 0x04a11221 },
2381 { 0x0c, 0x90a70330 },
2382 { 0x0d, 0x90170110 },
2383 { 0x0e, 0x40f000f0 },
2384 { 0x0f, 0x40f000f0 },
2385 { 0x14, 0x40f000f0 },
2386 { 0x18, 0x90a000f0 },
2387 { 0x19, 0x40f000f0 },
2388 { 0x1e, 0x044413b0 },
2389 { 0x1f, 0x044413b0 },
2390 {}
3a7abfd2
MR		 2391};
2392
0f6fcb73
TI		 2393static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2394 const struct hda_fixup *fix, int action)
2395{
2396 struct sigmatel_spec *spec = codec->spec;
2397
2398 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2399 return;
2400
2401 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2402 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2403}
2404
0f6fcb73
TI		 2405static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2406 const struct hda_fixup *fix, int action)
2407{
2408 struct sigmatel_spec *spec = codec->spec;
36c9db7a 2409 struct hda_jack_tbl *jack;
0f6fcb73
TI		 2410
2411 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2412 return;
2413
2414 /* Enable VREF power saving on GPIO1 detect */
0f6fcb73
TI		 2415 snd_hda_codec_write_cache(codec, codec->afg, 0,
2416 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
36c9db7a
TI		 2417 snd_hda_jack_detect_enable_callback(codec, codec->afg,
2418 STAC_VREF_EVENT,
2419 stac_vref_event);
2420 jack = snd_hda_jack_tbl_get(codec, codec->afg);
2421 if (jack)
2422 jack->private_data = 0x02;
2423
0f6fcb73
TI		 2424 spec->gpio_mask |= 0x02;
2425
2426 /* enable internal microphone */
2427 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
0f6fcb73
TI		 2428}
2429
2430static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
2431 const struct hda_fixup *fix, int action)
2432{
2433 struct sigmatel_spec *spec = codec->spec;
2434
2435 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2436 return;
2437 spec->gpio_led = 0x01;
2438}
2439
2440static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
2441 const struct hda_fixup *fix, int action)
2442{
0f6fcb73
TI		 2443 unsigned int cap;
2444
2445 switch (action) {
2446 case HDA_FIXUP_ACT_PRE_PROBE:
2447 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
f6655d52
TI		 2448 break;
2449
2450 case HDA_FIXUP_ACT_PROBE:
0f6fcb73
TI		 2451 /* enable bass on HP dv7 */
2452 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
2453 cap &= AC_GPIO_IO_COUNT;
2454 if (cap >= 6)
2455 stac_add_hp_bass_switch(codec);
2456 break;
2457 }
2458}
2459
2460static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
2461 const struct hda_fixup *fix, int action)
2462{
2463 struct sigmatel_spec *spec = codec->spec;
2464
2465 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2466 return;
2467 spec->gpio_led = 0x08;
0f6fcb73
TI		 2468}
2469
2470
2471static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
2472 const struct hda_fixup *fix, int action)
2473{
2474 struct sigmatel_spec *spec = codec->spec;
2475
2476 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2477 return;
2478
2479 if (hp_blike_system(codec->subsystem_id)) {
2480 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
2481 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
2482 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
2483 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
2484 /* It was changed in the BIOS to just satisfy MS DTM.
2485 * Lets turn it back into slaved HP
2486 */
2487 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
2488 | (AC_JACK_HP_OUT <<
2489 AC_DEFCFG_DEVICE_SHIFT);
2490 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
2491 | AC_DEFCFG_SEQUENCE)))
2492 | 0x1f;
2493 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
2494 }
2495 }
2496
36c9db7a 2497 if (find_mute_led_cfg(codec, 1))
0f6fcb73
TI		 2498 snd_printd("mute LED gpio %d polarity %d\n",
2499 spec->gpio_led,
2500 spec->gpio_led_polarity);
2501
2502}
2503
2504static const struct hda_fixup stac92hd71bxx_fixups[] = {
2505 [STAC_92HD71BXX_REF] = {
2506 .type = HDA_FIXUP_FUNC,
2507 .v.func = stac92hd71bxx_fixup_ref,
2508 },
2509 [STAC_DELL_M4_1] = {
2510 .type = HDA_FIXUP_PINS,
2511 .v.pins = dell_m4_1_pin_configs,
0f6fcb73
TI		 2512 },
2513 [STAC_DELL_M4_2] = {
2514 .type = HDA_FIXUP_PINS,
2515 .v.pins = dell_m4_2_pin_configs,
0f6fcb73
TI		 2516 },
2517 [STAC_DELL_M4_3] = {
2518 .type = HDA_FIXUP_PINS,
2519 .v.pins = dell_m4_3_pin_configs,
0f6fcb73
TI		 2520 },
2521 [STAC_HP_M4] = {
2522 .type = HDA_FIXUP_FUNC,
2523 .v.func = stac92hd71bxx_fixup_hp_m4,
2524 .chained = true,
2525 .chain_id = STAC_92HD71BXX_HP,
2526 },
2527 [STAC_HP_DV4] = {
2528 .type = HDA_FIXUP_FUNC,
2529 .v.func = stac92hd71bxx_fixup_hp_dv4,
2530 .chained = true,
2531 .chain_id = STAC_HP_DV5,
2532 },
2533 [STAC_HP_DV5] = {
2534 .type = HDA_FIXUP_FUNC,
2535 .v.func = stac92hd71bxx_fixup_hp_dv5,
2536 .chained = true,
2537 .chain_id = STAC_92HD71BXX_HP,
2538 },
2539 [STAC_HP_HDX] = {
2540 .type = HDA_FIXUP_FUNC,
2541 .v.func = stac92hd71bxx_fixup_hp_hdx,
2542 .chained = true,
2543 .chain_id = STAC_92HD71BXX_HP,
2544 },
36c9db7a 2545 [STAC_92HD71BXX_HP] = {
0f6fcb73 2546 .type = HDA_FIXUP_FUNC,
36c9db7a 2547 .v.func = stac92hd71bxx_fixup_hp,
0f6fcb73 2548 },
e035b841
MR		 2549};
2550
0f6fcb73
TI		 2551static const struct hda_model_fixup stac92hd71bxx_models[] = {
2552 { .id = STAC_92HD71BXX_REF, .name = "ref" },
2553 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
2554 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
2555 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
2556 { .id = STAC_HP_M4, .name = "hp-m4" },
2557 { .id = STAC_HP_DV4, .name = "hp-dv4" },
2558 { .id = STAC_HP_DV5, .name = "hp-dv5" },
2559 { .id = STAC_HP_HDX, .name = "hp-hdx" },
36c9db7a 2560 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
0f6fcb73 2561 {}
e035b841
MR		 2562};
2563
0f6fcb73 2564static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
e035b841
MR		 2565 /* SigmaTel reference board */
2566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2567 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR		 2568 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2569 "DFI LanParty", STAC_92HD71BXX_REF),
5bdaaada
VK		 2570 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
2571 "HP", STAC_HP_DV5),
58d8395b
TI		 2572 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
2573 "HP", STAC_HP_DV5),
2ae466f8 2574 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 2575 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI		 2576 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
2577 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI		 2578 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
2579 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 2580 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 2581 "HP mini 1000", STAC_HP_M4),
ae6241fb 2582 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 2583 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI		 2584 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
2585 "HP dv6", STAC_HP_DV5),
e3d2530a
KG		 2586 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
2587 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY		 2588 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
2589 "HP DV6", STAC_HP_DV5),
1972d025
TI		 2590 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
2591 "HP", STAC_HP_DV5),
0f6fcb73 2592 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
a7662640
MR		 2593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
2594 "unknown Dell", STAC_DELL_M4_1),
2595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
2596 "unknown Dell", STAC_DELL_M4_1),
2597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
2598 "unknown Dell", STAC_DELL_M4_1),
2599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
2600 "unknown Dell", STAC_DELL_M4_1),
2601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
2602 "unknown Dell", STAC_DELL_M4_1),
2603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
2604 "unknown Dell", STAC_DELL_M4_1),
2605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
2606 "unknown Dell", STAC_DELL_M4_1),
2607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
2608 "unknown Dell", STAC_DELL_M4_2),
2609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
2610 "unknown Dell", STAC_DELL_M4_2),
2611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
2612 "unknown Dell", STAC_DELL_M4_2),
2613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
2614 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 2615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
2616 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 2617 {} /* terminator */
2618};
2619
0a427846
TI		 2620static const struct hda_pintbl ref922x_pin_configs[] = {
2621 { 0x0a, 0x01014010 },
2622 { 0x0b, 0x01016011 },
2623 { 0x0c, 0x01012012 },
2624 { 0x0d, 0x0221401f },
2625 { 0x0e, 0x01813122 },
2626 { 0x0f, 0x01011014 },
2627 { 0x10, 0x01441030 },
2628 { 0x11, 0x01c41030 },
2629 { 0x15, 0x40000100 },
2630 { 0x1b, 0x40000100 },
2631 {}
2f2f4251
M		 2632};
2633
dfe495d0
TI		 2634/*
2635 STAC 922X pin configs for
2636 102801A7
2637 102801AB
2638 102801A9
2639 102801D1
2640 102801D2
2641*/
0a427846
TI		 2642static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
2643 { 0x0a, 0x02214030 },
2644 { 0x0b, 0x01a19021 },
2645 { 0x0c, 0x01111012 },
2646 { 0x0d, 0x01114010 },
2647 { 0x0e, 0x02a19020 },
2648 { 0x0f, 0x01117011 },
2649 { 0x10, 0x400001f0 },
2650 { 0x11, 0x400001f1 },
2651 { 0x15, 0x01813122 },
2652 { 0x1b, 0x400001f2 },
2653 {}
dfe495d0
TI		 2654};
2655
2656/*
2657 STAC 922X pin configs for
2658 102801AC
2659 102801D0
2660*/
0a427846
TI		 2661static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
2662 { 0x0a, 0x02214030 },
2663 { 0x0b, 0x01a19021 },
2664 { 0x0c, 0x01111012 },
2665 { 0x0d, 0x01114010 },
2666 { 0x0e, 0x02a19020 },
2667 { 0x0f, 0x01117011 },
2668 { 0x10, 0x01451140 },
2669 { 0x11, 0x400001f0 },
2670 { 0x15, 0x01813122 },
2671 { 0x1b, 0x400001f1 },
2672 {}
dfe495d0
TI		 2673};
2674
2675/*
2676 STAC 922X pin configs for
2677 102801BF
2678*/
0a427846
TI		 2679static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
2680 { 0x0a, 0x0321101f },
2681 { 0x0b, 0x01112024 },
2682 { 0x0c, 0x01111222 },
2683 { 0x0d, 0x91174220 },
2684 { 0x0e, 0x03a11050 },
2685 { 0x0f, 0x01116221 },
2686 { 0x10, 0x90a70330 },
2687 { 0x11, 0x01452340 },
2688 { 0x15, 0x40C003f1 },
2689 { 0x1b, 0x405003f0 },
2690 {}
dfe495d0
TI		 2691};
2692
2693/*
2694 STAC 9221 A1 pin configs for
2695 102801D7 (Dell XPS M1210)
2696*/
0a427846
TI		 2697static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
2698 { 0x0a, 0x02211211 },
2699 { 0x0b, 0x408103ff },
2700 { 0x0c, 0x02a1123e },
2701 { 0x0d, 0x90100310 },
2702 { 0x0e, 0x408003f1 },
2703 { 0x0f, 0x0221121f },
2704 { 0x10, 0x03451340 },
2705 { 0x11, 0x40c003f2 },
2706 { 0x15, 0x508003f3 },
2707 { 0x1b, 0x405003f4 },
2708 {}
dfe495d0
TI		 2709};
2710
0a427846
TI		 2711static const struct hda_pintbl d945gtp3_pin_configs[] = {
2712 { 0x0a, 0x0221401f },
2713 { 0x0b, 0x01a19022 },
2714 { 0x0c, 0x01813021 },
2715 { 0x0d, 0x01014010 },
2716 { 0x0e, 0x40000100 },
2717 { 0x0f, 0x40000100 },
2718 { 0x10, 0x40000100 },
2719 { 0x11, 0x40000100 },
2720 { 0x15, 0x02a19120 },
2721 { 0x1b, 0x40000100 },
2722 {}
2723};
2724
2725static const struct hda_pintbl d945gtp5_pin_configs[] = {
2726 { 0x0a, 0x0221401f },
2727 { 0x0b, 0x01011012 },
2728 { 0x0c, 0x01813024 },
2729 { 0x0d, 0x01014010 },
2730 { 0x0e, 0x01a19021 },
2731 { 0x0f, 0x01016011 },
2732 { 0x10, 0x01452130 },
2733 { 0x11, 0x40000100 },
2734 { 0x15, 0x02a19320 },
2735 { 0x1b, 0x40000100 },
2736 {}
403d1944
MP		 2737};
2738
0a427846
TI		 2739static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
2740 { 0x0a, 0x0121e21f },
2741 { 0x0b, 0x400000ff },
2742 { 0x0c, 0x9017e110 },
2743 { 0x0d, 0x400000fd },
2744 { 0x0e, 0x400000fe },
2745 { 0x0f, 0x0181e020 },
2746 { 0x10, 0x1145e030 },
2747 { 0x11, 0x11c5e240 },
2748 { 0x15, 0x400000fc },
2749 { 0x1b, 0x400000fb },
2750 {}
403d1944
MP		 2751};
2752
0a427846
TI		 2753static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
2754 { 0x0a, 0x0121e21f },
2755 { 0x0b, 0x90a7012e },
2756 { 0x0c, 0x9017e110 },
2757 { 0x0d, 0x400000fd },
2758 { 0x0e, 0x400000fe },
2759 { 0x0f, 0x0181e020 },
2760 { 0x10, 0x1145e230 },
2761 { 0x11, 0x500000fa },
2762 { 0x15, 0x400000fc },
2763 { 0x1b, 0x400000fb },
2764 {}
5d5d3bc3
IZ		 2765};
2766
0a427846
TI		 2767static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
2768 { 0x0a, 0x0121e21f },
2769 { 0x0b, 0x90a7012e },
2770 { 0x0c, 0x9017e110 },
2771 { 0x0d, 0x400000fd },
2772 { 0x0e, 0x400000fe },
2773 { 0x0f, 0x0181e020 },
2774 { 0x10, 0x1145e230 },
2775 { 0x11, 0x11c5e240 },
2776 { 0x15, 0x400000fc },
2777 { 0x1b, 0x400000fb },
2778 {}
6f0778d8
NB		 2779};
2780
0a427846
TI		 2781static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
2782 { 0x0a, 0x0321e21f },
2783 { 0x0b, 0x03a1e02e },
2784 { 0x0c, 0x9017e110 },
2785 { 0x0d, 0x9017e11f },
2786 { 0x0e, 0x400000fe },
2787 { 0x0f, 0x0381e020 },
2788 { 0x10, 0x1345e230 },
2789 { 0x11, 0x13c5e240 },
2790 { 0x15, 0x400000fc },
2791 { 0x1b, 0x400000fb },
2792 {}
3fc24d85
TI		 2793};
2794
0a427846
TI		 2795static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
2796 { 0x0a, 0x0321e21f },
2797 { 0x0b, 0x03a1e02e },
2798 { 0x0c, 0x9017e110 },
2799 { 0x0d, 0x9017e11f },
2800 { 0x0e, 0x400000fe },
2801 { 0x0f, 0x0381e020 },
2802 { 0x10, 0x1345e230 },
2803 { 0x11, 0x13c5e240 },
2804 { 0x15, 0x400000fc },
2805 { 0x1b, 0x400000fb },
2806 {}
f16928fb
SF		 2807};
2808
0a427846
TI		 2809static const struct hda_pintbl ecs202_pin_configs[] = {
2810 { 0x0a, 0x0221401f },
2811 { 0x0b, 0x02a19020 },
2812 { 0x0c, 0x01a19020 },
2813 { 0x0d, 0x01114010 },
2814 { 0x0e, 0x408000f0 },
2815 { 0x0f, 0x01813022 },
2816 { 0x10, 0x074510a0 },
2817 { 0x11, 0x40c400f1 },
2818 { 0x15, 0x9037012e },
2819 { 0x1b, 0x40e000f2 },
2820 {}
0dae0f83
TI		 2821};
2822
0a427846
TI		 2823/* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
2824static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
697aebab 2825 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
0a427846
TI		 2826 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
2827 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
2828 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
2829 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
2830 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
2831 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
2832 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
2833 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
2834 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
2835 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
2836 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
2837 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
2838 {}
8c650087 2839};
76c08828 2840
0a427846
TI		 2841static const struct hda_fixup stac922x_fixups[];
2842
2843/* remap the fixup from codec SSID and apply it */
2844static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
2845 const struct hda_fixup *fix,
2846 int action)
2847{
2848 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2849 return;
2850 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
2851 stac922x_fixups);
2852 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
2853 snd_hda_apply_fixup(codec, action);
2854}
2855
2856static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
2857 const struct hda_fixup *fix,
2858 int action)
2859{
2860 struct sigmatel_spec *spec = codec->spec;
2861
2862 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2863 spec->gpio_mask = spec->gpio_dir = 0x03;
2864 spec->gpio_data = 0x03;
2865 }
2866}
2867
2868static const struct hda_fixup stac922x_fixups[] = {
2869 [STAC_D945_REF] = {
2870 .type = HDA_FIXUP_PINS,
2871 .v.pins = ref922x_pin_configs,
2872 },
2873 [STAC_D945GTP3] = {
2874 .type = HDA_FIXUP_PINS,
2875 .v.pins = d945gtp3_pin_configs,
2876 },
2877 [STAC_D945GTP5] = {
2878 .type = HDA_FIXUP_PINS,
2879 .v.pins = d945gtp5_pin_configs,
2880 },
2881 [STAC_INTEL_MAC_AUTO] = {
2882 .type = HDA_FIXUP_FUNC,
2883 .v.func = stac922x_fixup_intel_mac_auto,
2884 },
2885 [STAC_INTEL_MAC_V1] = {
2886 .type = HDA_FIXUP_PINS,
2887 .v.pins = intel_mac_v1_pin_configs,
2888 .chained = true,
2889 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2890 },
2891 [STAC_INTEL_MAC_V2] = {
2892 .type = HDA_FIXUP_PINS,
2893 .v.pins = intel_mac_v2_pin_configs,
2894 .chained = true,
2895 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2896 },
2897 [STAC_INTEL_MAC_V3] = {
2898 .type = HDA_FIXUP_PINS,
2899 .v.pins = intel_mac_v3_pin_configs,
2900 .chained = true,
2901 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2902 },
2903 [STAC_INTEL_MAC_V4] = {
2904 .type = HDA_FIXUP_PINS,
2905 .v.pins = intel_mac_v4_pin_configs,
2906 .chained = true,
2907 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2908 },
2909 [STAC_INTEL_MAC_V5] = {
2910 .type = HDA_FIXUP_PINS,
2911 .v.pins = intel_mac_v5_pin_configs,
2912 .chained = true,
2913 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2914 },
2915 [STAC_922X_INTEL_MAC_GPIO] = {
2916 .type = HDA_FIXUP_FUNC,
2917 .v.func = stac922x_fixup_intel_mac_gpio,
2918 },
2919 [STAC_ECS_202] = {
2920 .type = HDA_FIXUP_PINS,
2921 .v.pins = ecs202_pin_configs,
2922 },
2923 [STAC_922X_DELL_D81] = {
2924 .type = HDA_FIXUP_PINS,
2925 .v.pins = dell_922x_d81_pin_configs,
2926 },
2927 [STAC_922X_DELL_D82] = {
2928 .type = HDA_FIXUP_PINS,
2929 .v.pins = dell_922x_d82_pin_configs,
2930 },
2931 [STAC_922X_DELL_M81] = {
2932 .type = HDA_FIXUP_PINS,
2933 .v.pins = dell_922x_m81_pin_configs,
2934 },
2935 [STAC_922X_DELL_M82] = {
2936 .type = HDA_FIXUP_PINS,
2937 .v.pins = dell_922x_m82_pin_configs,
2938 },
2939};
2940
2941static const struct hda_model_fixup stac922x_models[] = {
2942 { .id = STAC_D945_REF, .name = "ref" },
2943 { .id = STAC_D945GTP5, .name = "5stack" },
2944 { .id = STAC_D945GTP3, .name = "3stack" },
2945 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
2946 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
2947 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
2948 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
2949 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
2950 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
2951 { .id = STAC_ECS_202, .name = "ecs202" },
2952 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
2953 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
2954 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
2955 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
dfe495d0 2956 /* for backward compatibility */
0a427846
TI		 2957 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
2958 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
2959 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
2960 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
2961 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
2962 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
2963 {}
2964};
2965
2966static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
f5fcc13c
TI		 2967 /* SigmaTel reference board */
2968 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2969 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR		 2970 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2971 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI		 2972 /* Intel 945G based systems */
2973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2974 "Intel D945G", STAC_D945GTP3),
2975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2976 "Intel D945G", STAC_D945GTP3),
2977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2978 "Intel D945G", STAC_D945GTP3),
2979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2980 "Intel D945G", STAC_D945GTP3),
2981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2982 "Intel D945G", STAC_D945GTP3),
2983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2984 "Intel D945G", STAC_D945GTP3),
2985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2986 "Intel D945G", STAC_D945GTP3),
2987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2988 "Intel D945G", STAC_D945GTP3),
2989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2990 "Intel D945G", STAC_D945GTP3),
2991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2992 "Intel D945G", STAC_D945GTP3),
2993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2994 "Intel D945G", STAC_D945GTP3),
2995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2996 "Intel D945G", STAC_D945GTP3),
2997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2998 "Intel D945G", STAC_D945GTP3),
2999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3000 "Intel D945G", STAC_D945GTP3),
3001 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3002 "Intel D945G", STAC_D945GTP3),
3003 /* Intel D945G 5-stack systems */
3004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3005 "Intel D945G", STAC_D945GTP5),
3006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3007 "Intel D945G", STAC_D945GTP5),
3008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3009 "Intel D945G", STAC_D945GTP5),
3010 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3011 "Intel D945G", STAC_D945GTP5),
3012 /* Intel 945P based systems */
3013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3014 "Intel D945P", STAC_D945GTP3),
3015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3016 "Intel D945P", STAC_D945GTP3),
3017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3018 "Intel D945P", STAC_D945GTP3),
3019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3020 "Intel D945P", STAC_D945GTP3),
3021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3022 "Intel D945P", STAC_D945GTP3),
3023 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3024 "Intel D945P", STAC_D945GTP5),
8056d47e
TI		 3025 /* other intel */
3026 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3027 "Intel D945", STAC_D945_REF),
f5fcc13c 3028 /* other systems */
0a427846 3029
536319af 3030 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
0a427846
TI		 3031 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3032
dfe495d0
TI		 3033 /* Dell systems */
3034 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3035 "unknown Dell", STAC_922X_DELL_D81),
3036 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3037 "unknown Dell", STAC_922X_DELL_D81),
3038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3039 "unknown Dell", STAC_922X_DELL_D81),
3040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3041 "unknown Dell", STAC_922X_DELL_D82),
3042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3043 "unknown Dell", STAC_922X_DELL_M81),
3044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3045 "unknown Dell", STAC_922X_DELL_D82),
3046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3047 "unknown Dell", STAC_922X_DELL_D81),
3048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3049 "unknown Dell", STAC_922X_DELL_D81),
3050 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3051 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 3052 /* ECS/PC Chips boards */
dea0a509 3053 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 3054 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 3055 {} /* terminator */
3056};
3057
29ac8363
TI		 3058static const struct hda_pintbl ref927x_pin_configs[] = {
3059 { 0x0a, 0x02214020 },
3060 { 0x0b, 0x02a19080 },
3061 { 0x0c, 0x0181304e },
3062 { 0x0d, 0x01014010 },
3063 { 0x0e, 0x01a19040 },
3064 { 0x0f, 0x01011012 },
3065 { 0x10, 0x01016011 },
3066 { 0x11, 0x0101201f },
3067 { 0x12, 0x183301f0 },
3068 { 0x13, 0x18a001f0 },
3069 { 0x14, 0x18a001f0 },
3070 { 0x21, 0x01442070 },
3071 { 0x22, 0x01c42190 },
3072 { 0x23, 0x40000100 },
3073 {}
3cc08dc6
MP		 3074};
3075
29ac8363
TI		 3076static const struct hda_pintbl d965_3st_pin_configs[] = {
3077 { 0x0a, 0x0221401f },
3078 { 0x0b, 0x02a19120 },
3079 { 0x0c, 0x40000100 },
3080 { 0x0d, 0x01014011 },
3081 { 0x0e, 0x01a19021 },
3082 { 0x0f, 0x01813024 },
3083 { 0x10, 0x40000100 },
3084 { 0x11, 0x40000100 },
3085 { 0x12, 0x40000100 },
3086 { 0x13, 0x40000100 },
3087 { 0x14, 0x40000100 },
3088 { 0x21, 0x40000100 },
3089 { 0x22, 0x40000100 },
3090 { 0x23, 0x40000100 },
3091 {}
81d3dbde
TD		 3092};
3093
29ac8363
TI		 3094static const struct hda_pintbl d965_5st_pin_configs[] = {
3095 { 0x0a, 0x02214020 },
3096 { 0x0b, 0x02a19080 },
3097 { 0x0c, 0x0181304e },
3098 { 0x0d, 0x01014010 },
3099 { 0x0e, 0x01a19040 },
3100 { 0x0f, 0x01011012 },
3101 { 0x10, 0x01016011 },
3102 { 0x11, 0x40000100 },
3103 { 0x12, 0x40000100 },
3104 { 0x13, 0x40000100 },
3105 { 0x14, 0x40000100 },
3106 { 0x21, 0x01442070 },
3107 { 0x22, 0x40000100 },
3108 { 0x23, 0x40000100 },
3109 {}
93ed1503
TD		 3110};
3111
29ac8363
TI		 3112static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3113 { 0x0a, 0x40000100 },
3114 { 0x0b, 0x40000100 },
3115 { 0x0c, 0x0181304e },
3116 { 0x0d, 0x01014010 },
3117 { 0x0e, 0x01a19040 },
3118 { 0x0f, 0x01011012 },
3119 { 0x10, 0x01016011 },
3120 { 0x11, 0x40000100 },
3121 { 0x12, 0x40000100 },
3122 { 0x13, 0x40000100 },
3123 { 0x14, 0x40000100 },
3124 { 0x21, 0x01442070 },
3125 { 0x22, 0x40000100 },
3126 { 0x23, 0x40000100 },
3127 {}
679d92ed
TI		 3128};
3129
29ac8363
TI		 3130static const struct hda_pintbl dell_3st_pin_configs[] = {
3131 { 0x0a, 0x02211230 },
3132 { 0x0b, 0x02a11220 },
3133 { 0x0c, 0x01a19040 },
3134 { 0x0d, 0x01114210 },
3135 { 0x0e, 0x01111212 },
3136 { 0x0f, 0x01116211 },
3137 { 0x10, 0x01813050 },
3138 { 0x11, 0x01112214 },
3139 { 0x12, 0x403003fa },
3140 { 0x13, 0x90a60040 },
3141 { 0x14, 0x90a60040 },
3142 { 0x21, 0x404003fb },
3143 { 0x22, 0x40c003fc },
3144 { 0x23, 0x40000100 },
3145 {}
4ff076e5
TD		 3146};
3147
29ac8363
TI		 3148static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3149 const struct hda_fixup *fix, int action)
3150{
29ac8363 3151 /* no jack detecion for ref-no-jd model */
36c9db7a
TI		 3152 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3153 codec->no_jack_detect = 1;
29ac8363
TI		 3154}
3155
3156static void stac927x_fixup_ref(struct hda_codec *codec,
3157 const struct hda_fixup *fix, int action)
3158{
3159 struct sigmatel_spec *spec = codec->spec;
3160
3161 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3162 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3163 spec->eapd_mask = spec->gpio_mask = 0;
3164 spec->gpio_dir = spec->gpio_data = 0;
3165 }
3166}
3167
3168static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3169 const struct hda_fixup *fix, int action)
3170{
3171 struct sigmatel_spec *spec = codec->spec;
3172
3173 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3174 return;
3175
3176 if (codec->subsystem_id != 0x1028022f) {
3177 /* GPIO2 High = Enable EAPD */
3178 spec->eapd_mask = spec->gpio_mask = 0x04;
3179 spec->gpio_dir = spec->gpio_data = 0x04;
3180 }
29ac8363
TI		 3181
3182 snd_hda_add_verbs(codec, dell_3st_core_init);
3183 spec->volknob_init = 1;
29ac8363
TI		 3184}
3185
3186static void stac927x_fixup_volknob(struct hda_codec *codec,
3187 const struct hda_fixup *fix, int action)
3188{
3189 struct sigmatel_spec *spec = codec->spec;
3190
3191 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3192 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3193 spec->volknob_init = 1;
3194 }
3195}
3196
3197static const struct hda_fixup stac927x_fixups[] = {
3198 [STAC_D965_REF_NO_JD] = {
3199 .type = HDA_FIXUP_FUNC,
3200 .v.func = stac927x_fixup_ref_no_jd,
3201 .chained = true,
3202 .chain_id = STAC_D965_REF,
3203 },
3204 [STAC_D965_REF] = {
3205 .type = HDA_FIXUP_FUNC,
3206 .v.func = stac927x_fixup_ref,
3207 },
3208 [STAC_D965_3ST] = {
3209 .type = HDA_FIXUP_PINS,
3210 .v.pins = d965_3st_pin_configs,
3211 .chained = true,
3212 .chain_id = STAC_D965_VERBS,
3213 },
3214 [STAC_D965_5ST] = {
3215 .type = HDA_FIXUP_PINS,
3216 .v.pins = d965_5st_pin_configs,
3217 .chained = true,
3218 .chain_id = STAC_D965_VERBS,
3219 },
3220 [STAC_D965_VERBS] = {
3221 .type = HDA_FIXUP_VERBS,
3222 .v.verbs = d965_core_init,
3223 },
3224 [STAC_D965_5ST_NO_FP] = {
3225 .type = HDA_FIXUP_PINS,
3226 .v.pins = d965_5st_no_fp_pin_configs,
3227 },
3228 [STAC_DELL_3ST] = {
3229 .type = HDA_FIXUP_PINS,
3230 .v.pins = dell_3st_pin_configs,
3231 .chained = true,
3232 .chain_id = STAC_927X_DELL_DMIC,
3233 },
3234 [STAC_DELL_BIOS] = {
3235 .type = HDA_FIXUP_PINS,
3236 .v.pins = (const struct hda_pintbl[]) {
29ac8363 3237 /* correct the front output jack as a hp out */
f3e351ee 3238 { 0x0f, 0x0221101f },
29ac8363
TI		 3239 /* correct the front input jack as a mic */
3240 { 0x0e, 0x02a79130 },
3241 {}
3242 },
3243 .chained = true,
3244 .chain_id = STAC_927X_DELL_DMIC,
3245 },
eefb8be4
TI		 3246 [STAC_DELL_BIOS_AMIC] = {
3247 .type = HDA_FIXUP_PINS,
3248 .v.pins = (const struct hda_pintbl[]) {
3249 /* configure the analog microphone on some laptops */
3250 { 0x0c, 0x90a79130 },
3251 {}
3252 },
3253 .chained = true,
3254 .chain_id = STAC_DELL_BIOS,
3255 },
29ac8363
TI		 3256 [STAC_DELL_BIOS_SPDIF] = {
3257 .type = HDA_FIXUP_PINS,
3258 .v.pins = (const struct hda_pintbl[]) {
3259 /* correct the device field to SPDIF out */
3260 { 0x21, 0x01442070 },
3261 {}
3262 },
3263 .chained = true,
3264 .chain_id = STAC_DELL_BIOS,
3265 },
3266 [STAC_927X_DELL_DMIC] = {
3267 .type = HDA_FIXUP_FUNC,
3268 .v.func = stac927x_fixup_dell_dmic,
3269 },
3270 [STAC_927X_VOLKNOB] = {
3271 .type = HDA_FIXUP_FUNC,
3272 .v.func = stac927x_fixup_volknob,
3273 },
3cc08dc6
MP		 3274};
3275
29ac8363
TI		 3276static const struct hda_model_fixup stac927x_models[] = {
3277 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3278 { .id = STAC_D965_REF, .name = "ref" },
3279 { .id = STAC_D965_3ST, .name = "3stack" },
3280 { .id = STAC_D965_5ST, .name = "5stack" },
3281 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3282 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3283 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
eefb8be4 3284 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
29ac8363
TI		 3285 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3286 {}
f5fcc13c
TI		 3287};
3288
29ac8363 3289static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
f5fcc13c
TI		 3290 /* SigmaTel reference board */
3291 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3292 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR		 3293 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3294 "DFI LanParty", STAC_D965_REF),
81d3dbde 3295 /* Intel 946 based systems */
f5fcc13c
TI		 3296 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3297 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 3298 /* 965 based 3 stack systems */
dea0a509
TI		 3299 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3300 "Intel D965", STAC_D965_3ST),
3301 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3302 "Intel D965", STAC_D965_3ST),
4ff076e5 3303 /* Dell 3 stack systems */
dfe495d0 3304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 3305 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 3307 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 3308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 3309 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 3310 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
29ac8363 3311 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
84d3dc20 3312 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR		 3313 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3314 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3315 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
29ac8363 3316 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
93ed1503 3317 /* 965 based 5 stack systems */
dea0a509
TI		 3318 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3319 "Intel D965", STAC_D965_5ST),
3320 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3321 "Intel D965", STAC_D965_5ST),
54930531
TI		 3322 /* volume-knob fixes */
3323 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP		 3324 {} /* terminator */
3325};
3326
fe6322ca
TI		 3327static const struct hda_pintbl ref9205_pin_configs[] = {
3328 { 0x0a, 0x40000100 },
3329 { 0x0b, 0x40000100 },
3330 { 0x0c, 0x01016011 },
3331 { 0x0d, 0x01014010 },
3332 { 0x0e, 0x01813122 },
3333 { 0x0f, 0x01a19021 },
3334 { 0x14, 0x01019020 },
3335 { 0x16, 0x40000100 },
3336 { 0x17, 0x90a000f0 },
3337 { 0x18, 0x90a000f0 },
3338 { 0x21, 0x01441030 },
3339 { 0x22, 0x01c41030 },
3340 {}
f3302a59
MP		 3341};
3342
dfe495d0
TI		 3343/*
3344 STAC 9205 pin configs for
3345 102801F1
3346 102801F2
3347 102801FC
3348 102801FD
3349 10280204
3350 1028021F
3fa2ef74 3351 10280228 (Dell Vostro 1500)
95e70e87 3352 10280229 (Dell Vostro 1700)
dfe495d0 3353*/
fe6322ca
TI		 3354static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3355 { 0x0a, 0x0321101F },
3356 { 0x0b, 0x03A11020 },
3357 { 0x0c, 0x400003FA },
3358 { 0x0d, 0x90170310 },
3359 { 0x0e, 0x400003FB },
3360 { 0x0f, 0x400003FC },
3361 { 0x14, 0x400003FD },
3362 { 0x16, 0x40F000F9 },
3363 { 0x17, 0x90A60330 },
3364 { 0x18, 0x400003FF },
3365 { 0x21, 0x0144131F },
3366 { 0x22, 0x40C003FE },
3367 {}
dfe495d0
TI		 3368};
3369
3370/*
3371 STAC 9205 pin configs for
3372 102801F9
3373 102801FA
3374 102801FE
3375 102801FF (Dell Precision M4300)
3376 10280206
3377 10280200
3378 10280201
3379*/
fe6322ca
TI		 3380static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3381 { 0x0a, 0x0321101f },
3382 { 0x0b, 0x03a11020 },
3383 { 0x0c, 0x90a70330 },
3384 { 0x0d, 0x90170310 },
3385 { 0x0e, 0x400000fe },
3386 { 0x0f, 0x400000ff },
3387 { 0x14, 0x400000fd },
3388 { 0x16, 0x40f000f9 },
3389 { 0x17, 0x400000fa },
3390 { 0x18, 0x400000fc },
3391 { 0x21, 0x0144131f },
3392 { 0x22, 0x40c003f8 },
3393 /* Enable SPDIF in/out */
3394 { 0x1f, 0x01441030 },
3395 { 0x20, 0x1c410030 },
3396 {}
ae0a8ed8
TD		 3397};
3398
fe6322ca
TI		 3399static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3400 { 0x0a, 0x0421101f },
3401 { 0x0b, 0x04a11020 },
3402 { 0x0c, 0x400003fa },
3403 { 0x0d, 0x90170310 },
3404 { 0x0e, 0x400003fb },
3405 { 0x0f, 0x400003fc },
3406 { 0x14, 0x400003fd },
3407 { 0x16, 0x400003f9 },
3408 { 0x17, 0x90a60330 },
3409 { 0x18, 0x400003ff },
3410 { 0x21, 0x01441340 },
3411 { 0x22, 0x40c003fe },
3412 {}
ae0a8ed8
TD		 3413};
3414
fe6322ca
TI		 3415static void stac9205_fixup_ref(struct hda_codec *codec,
3416 const struct hda_fixup *fix, int action)
3417{
3418 struct sigmatel_spec *spec = codec->spec;
3419
3420 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3421 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
3422 /* SPDIF-In enabled */
3423 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
3424 }
3425}
3426
fe6322ca
TI		 3427static void stac9205_fixup_dell_m43(struct hda_codec *codec,
3428 const struct hda_fixup *fix, int action)
3429{
3430 struct sigmatel_spec *spec = codec->spec;
36c9db7a 3431 struct hda_jack_tbl *jack;
fe6322ca
TI		 3432
3433 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3434 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
3435
3436 /* Enable unsol response for GPIO4/Dock HP connection */
fe6322ca
TI		 3437 snd_hda_codec_write_cache(codec, codec->afg, 0,
3438 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
36c9db7a
TI		 3439 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3440 STAC_VREF_EVENT,
3441 stac_vref_event);
3442 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3443 if (jack)
3444 jack->private_data = 0x01;
fe6322ca
TI		 3445
3446 spec->gpio_dir = 0x0b;
3447 spec->eapd_mask = 0x01;
3448 spec->gpio_mask = 0x1b;
3449 spec->gpio_mute = 0x10;
3450 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3451 * GPIO3 Low = DRM
3452 */
3453 spec->gpio_data = 0x01;
3454 }
3455}
3456
3457static void stac9205_fixup_eapd(struct hda_codec *codec,
3458 const struct hda_fixup *fix, int action)
3459{
3460 struct sigmatel_spec *spec = codec->spec;
3461
3462 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3463 spec->eapd_switch = 0;
3464}
3465
3466static const struct hda_fixup stac9205_fixups[] = {
3467 [STAC_9205_REF] = {
3468 .type = HDA_FIXUP_FUNC,
3469 .v.func = stac9205_fixup_ref,
3470 },
3471 [STAC_9205_DELL_M42] = {
3472 .type = HDA_FIXUP_PINS,
3473 .v.pins = dell_9205_m42_pin_configs,
3474 },
3475 [STAC_9205_DELL_M43] = {
3476 .type = HDA_FIXUP_FUNC,
3477 .v.func = stac9205_fixup_dell_m43,
3478 },
3479 [STAC_9205_DELL_M44] = {
3480 .type = HDA_FIXUP_PINS,
3481 .v.pins = dell_9205_m44_pin_configs,
3482 },
3483 [STAC_9205_EAPD] = {
3484 .type = HDA_FIXUP_FUNC,
3485 .v.func = stac9205_fixup_eapd,
3486 },
3487 {}
f3302a59
MP		 3488};
3489
fe6322ca
TI		 3490static const struct hda_model_fixup stac9205_models[] = {
3491 { .id = STAC_9205_REF, .name = "ref" },
3492 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
3493 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
3494 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
3495 { .id = STAC_9205_EAPD, .name = "eapd" },
3496 {}
f5fcc13c
TI		 3497};
3498
fe6322ca 3499static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
f5fcc13c
TI		 3500 /* SigmaTel reference board */
3501 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3502 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK		 3503 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
3504 "SigmaTel", STAC_9205_REF),
577aa2c1
MR		 3505 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3506 "DFI LanParty", STAC_9205_REF),
d9a4268e 3507 /* Dell */
dfe495d0
TI		 3508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
3509 "unknown Dell", STAC_9205_DELL_M42),
3510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
3511 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 3512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 3513 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 3514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
3515 "Dell Precision", STAC_9205_DELL_M43),
3516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
3517 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 3518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
3519 "unknown Dell", STAC_9205_DELL_M42),
3520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
3521 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 3522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
3523 "Dell Precision", STAC_9205_DELL_M43),
3524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 3525 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 3526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
3527 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 3528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
3529 "Dell Precision", STAC_9205_DELL_M43),
3530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
3531 "Dell Precision", STAC_9205_DELL_M43),
36c9db7a
TI		 3532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
3533 "Dell Precision", STAC_9205_DELL_M43),
3534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
3535 "Dell Inspiron", STAC_9205_DELL_M44),
3536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
3537 "Dell Vostro 1500", STAC_9205_DELL_M42),
3538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
3539 "Dell Vostro 1700", STAC_9205_DELL_M42),
3540 /* Gateway */
3541 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
3542 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
3543 {} /* terminator */
3544};
a64135a2 3545
36c9db7a 3546static int stac_parse_auto_config(struct hda_codec *codec)
ab5a6ebe
VK		 3547{
3548 struct sigmatel_spec *spec = codec->spec;
36c9db7a 3549 int err;
f390dad4 3550 int flags = 0;
ab5a6ebe 3551
f390dad4
DH		 3552 if (spec->headset_jack)
3553 flags |= HDA_PINCFG_HEADSET_MIC;
3554
3555 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
36c9db7a
TI		 3556 if (err < 0)
3557 return err;
ab5a6ebe 3558
36c9db7a
TI		 3559 /* add hooks */
3560 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
3561 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
ab5a6ebe 3562
36c9db7a
TI		 3563 spec->gen.automute_hook = stac_update_outputs;
3564 spec->gen.hp_automute_hook = stac_hp_automute;
3565 spec->gen.line_automute_hook = stac_line_automute;
664389db 3566 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
3d21d3f7 3567
36c9db7a
TI		 3568 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
3569 if (err < 0)
3570 return err;
3d21d3f7 3571
36c9db7a
TI		 3572 /* minimum value is actually mute */
3573 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
c6e4c666 3574
36c9db7a
TI		 3575 /* setup analog beep controls */
3576 if (spec->anabeep_nid > 0) {
3577 err = stac_auto_create_beep_ctls(codec,
3578 spec->anabeep_nid);
3579 if (err < 0)
3580 return err;
3d21d3f7
TI		 3581 }
3582
36c9db7a
TI		 3583 /* setup digital beep controls and input device */
3584#ifdef CONFIG_SND_HDA_INPUT_BEEP
7504b6cd
TI		 3585 if (spec->gen.beep_nid) {
3586 hda_nid_t nid = spec->gen.beep_nid;
36c9db7a
TI		 3587 unsigned int caps;
3588
3589 err = stac_auto_create_beep_ctls(codec, nid);
36c9db7a
TI		 3590 if (err < 0)
3591 return err;
3592 if (codec->beep) {
3593 /* IDT/STAC codecs have linear beep tone parameter */
3594 codec->beep->linear_tone = spec->linear_tone_beep;
3595 /* if no beep switch is available, make its own one */
3596 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3597 if (!(caps & AC_AMPCAP_MUTE)) {
3598 err = stac_beep_switch_ctl(codec);
3599 if (err < 0)
3600 return err;
fd60cc89
MR		 3601 }
3602 }
314634bc 3603 }
36c9db7a 3604#endif
314634bc 3605
36c9db7a
TI		 3606 if (spec->gpio_led)
3607 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
3608
3609 if (spec->aloopback_ctl &&
3610 snd_hda_get_bool_hint(codec, "loopback") == 1) {
3611 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
3612 return -ENOMEM;
3613 }
3614
42875479
TI		 3615 if (spec->have_spdif_mux) {
3616 err = stac_create_spdif_mux_ctls(codec);
3617 if (err < 0)
3618 return err;
3619 }
3620
36c9db7a
TI		 3621 stac_init_power_map(codec);
3622
3623 return 0;
1835a0f9
TI		 3624}
3625
36c9db7a
TI		 3626
3627static int stac_init(struct hda_codec *codec)
d38cce70
KG		 3628{
3629 struct sigmatel_spec *spec = codec->spec;
36c9db7a 3630 int i;
07f80449 3631
36c9db7a
TI		 3632 /* override some hints */
3633 stac_store_hints(codec);
26ebe0a2 3634
36c9db7a 3635 /* set up GPIO */
36c9db7a
TI		 3636 /* turn on EAPD statically when spec->eapd_switch isn't set.
3637 * otherwise, unsol event will turn it on/off dynamically
3638 */
3639 if (!spec->eapd_switch)
1ea9a69d
TI		 3640 spec->gpio_data |= spec->eapd_mask;
3641 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
d38cce70 3642
36c9db7a 3643 snd_hda_gen_init(codec);
c357aab0 3644
36c9db7a
TI		 3645 /* sync the power-map */
3646 if (spec->num_pwrs)
3647 snd_hda_codec_write(codec, codec->afg, 0,
3648 AC_VERB_IDT_SET_POWER_MAP,
3649 spec->power_map_bits);
0f6fcb73 3650
36c9db7a
TI		 3651 /* power down inactive ADCs */
3652 if (spec->powerdown_adcs) {
3653 for (i = 0; i < spec->gen.num_all_adcs; i++) {
3654 if (spec->active_adcs & (1 << i))
3655 continue;
3656 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
3657 AC_VERB_SET_POWER_STATE,
3658 AC_PWRST_D3);
89bb3e74
TI		 3659 }
3660 }
3661
c357aab0
VK		 3662 return 0;
3663}
3664
36c9db7a 3665static void stac_shutup(struct hda_codec *codec)
78987bdc 3666{
36c9db7a
TI		 3667 struct sigmatel_spec *spec = codec->spec;
3668
3669 snd_hda_shutup_pins(codec);
3670
3671 if (spec->eapd_mask)
3672 stac_gpio_set(codec, spec->gpio_mask,
3673 spec->gpio_dir, spec->gpio_data &
3674 ~spec->eapd_mask);
3675}
3676
7504b6cd 3677#define stac_free snd_hda_gen_free
78987bdc 3678
2d34e1b3
TI		 3679#ifdef CONFIG_PROC_FS
3680static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
3681 struct hda_codec *codec, hda_nid_t nid)
3682{
3683 if (nid == codec->afg)
3684 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI		 3685 snd_hda_codec_read(codec, nid, 0,
3686 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI		 3687}
3688
3689static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
3690 struct hda_codec *codec,
3691 unsigned int verb)
3692{
3693 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
3694 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
3695}
3696
3697/* stac92hd71bxx, stac92hd73xx */
3698static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
3699 struct hda_codec *codec, hda_nid_t nid)
3700{
3701 stac92hd_proc_hook(buffer, codec, nid);
3702 if (nid == codec->afg)
3703 analog_loop_proc_hook(buffer, codec, 0xfa0);
3704}
3705
3706static void stac9205_proc_hook(struct snd_info_buffer *buffer,
3707 struct hda_codec *codec, hda_nid_t nid)
3708{
3709 if (nid == codec->afg)
3710 analog_loop_proc_hook(buffer, codec, 0xfe0);
3711}
3712
3713static void stac927x_proc_hook(struct snd_info_buffer *buffer,
3714 struct hda_codec *codec, hda_nid_t nid)
3715{
3716 if (nid == codec->afg)
3717 analog_loop_proc_hook(buffer, codec, 0xfeb);
3718}
3719#else
3720#define stac92hd_proc_hook NULL
3721#define stac92hd7x_proc_hook NULL
3722#define stac9205_proc_hook NULL
3723#define stac927x_proc_hook NULL
3724#endif
3725
2a43952a 3726#ifdef CONFIG_PM
36c9db7a
TI		 3727static int stac_suspend(struct hda_codec *codec)
3728{
3729 stac_shutup(codec);
3730 return 0;
3731}
3732
3733static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
3734 unsigned int power_state)
3735{
3736 unsigned int afg_power_state = power_state;
3737 struct sigmatel_spec *spec = codec->spec;
3738
3739 if (power_state == AC_PWRST_D3) {
3740 if (spec->vref_mute_led_nid) {
3741 /* with vref-out pin used for mute led control
3742 * codec AFG is prevented from D3 state
3743 */
3744 afg_power_state = AC_PWRST_D1;
3745 }
3746 /* this delay seems necessary to avoid click noise at power-down */
3747 msleep(100);
c21bd025 3748 }
36c9db7a
TI		 3749 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
3750 afg_power_state);
9419ab6b 3751 snd_hda_codec_set_power_to_all(codec, fg, power_state);
b4e81876 3752}
36c9db7a
TI		 3753#else
3754#define stac_suspend NULL
36c9db7a
TI		 3755#define stac_set_power_state NULL
3756#endif /* CONFIG_PM */
7df1ce1a 3757
36c9db7a
TI		 3758static const struct hda_codec_ops stac_patch_ops = {
3759 .build_controls = snd_hda_gen_build_controls,
3760 .build_pcms = snd_hda_gen_build_pcms,
3761 .init = stac_init,
3762 .free = stac_free,
29adc4b9 3763 .unsol_event = snd_hda_jack_unsol_event,
2a43952a 3764#ifdef CONFIG_PM
36c9db7a 3765 .suspend = stac_suspend,
ff6fdc37 3766#endif
36c9db7a 3767 .reboot_notify = stac_shutup,
2f2f4251
M		 3768};
3769
36c9db7a 3770static int alloc_stac_spec(struct hda_codec *codec)
361dab3e
TI		 3771{
3772 struct sigmatel_spec *spec;
3773
3774 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3775 if (!spec)
3776 return -ENOMEM;
36c9db7a 3777 snd_hda_gen_spec_init(&spec->gen);
361dab3e
TI		 3778 codec->spec = spec;
3779 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
361dab3e
TI		 3780 return 0;
3781}
3782
2f2f4251
M		 3783static int patch_stac9200(struct hda_codec *codec)
3784{
3785 struct sigmatel_spec *spec;
c7d4b2fa 3786 int err;
2f2f4251 3787
36c9db7a 3788 err = alloc_stac_spec(codec);
361dab3e
TI		 3789 if (err < 0)
3790 return err;
2f2f4251 3791
361dab3e 3792 spec = codec->spec;
1b0e372d 3793 spec->linear_tone_beep = 1;
36c9db7a 3794 spec->gen.own_eapd_ctl = 1;
d39a3ae8 3795
36c9db7a 3796 codec->patch_ops = stac_patch_ops;
ba615b86 3797 codec->power_filter = snd_hda_codec_eapd_power_filter;
2f2f4251 3798
d39a3ae8 3799 snd_hda_add_verbs(codec, stac9200_eapd_init);
c7d4b2fa 3800
36c9db7a
TI		 3801 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
3802 stac9200_fixups);
d39a3ae8 3803 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
117f257d 3804
36c9db7a 3805 err = stac_parse_auto_config(codec);
c7d4b2fa 3806 if (err < 0) {
36c9db7a 3807 stac_free(codec);
c7d4b2fa
M		 3808 return err;
3809 }
2f2f4251 3810
d39a3ae8
TI		 3811 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3812
2f2f4251
M		 3813 return 0;
3814}
3815
8e21c34c
TD		 3816static int patch_stac925x(struct hda_codec *codec)
3817{
3818 struct sigmatel_spec *spec;
3819 int err;
3820
36c9db7a 3821 err = alloc_stac_spec(codec);
361dab3e
TI		 3822 if (err < 0)
3823 return err;
8e21c34c 3824
361dab3e 3825 spec = codec->spec;
1b0e372d 3826 spec->linear_tone_beep = 1;
36c9db7a 3827 spec->gen.own_eapd_ctl = 1;
9cb36c2a 3828
36c9db7a 3829 codec->patch_ops = stac_patch_ops;
8e21c34c 3830
d2077d40 3831 snd_hda_add_verbs(codec, stac925x_core_init);
8e21c34c 3832
36c9db7a
TI		 3833 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
3834 stac925x_fixups);
d2077d40
TI		 3835 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3836
36c9db7a 3837 err = stac_parse_auto_config(codec);
8e21c34c 3838 if (err < 0) {
36c9db7a 3839 stac_free(codec);
8e21c34c
TD		 3840 return err;
3841 }
3842
d2077d40
TI		 3843 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3844
8e21c34c
TD		 3845 return 0;
3846}
3847
e1f0d669
MR		 3848static int patch_stac92hd73xx(struct hda_codec *codec)
3849{
3850 struct sigmatel_spec *spec;
361dab3e 3851 int err;
c21ca4a8 3852 int num_dacs;
e1f0d669 3853
36c9db7a 3854 err = alloc_stac_spec(codec);
361dab3e
TI		 3855 if (err < 0)
3856 return err;
e1f0d669 3857
361dab3e 3858 spec = codec->spec;
1b0e372d 3859 spec->linear_tone_beep = 0;
2748746f 3860 spec->gen.mixer_nid = 0x1d;
42875479 3861 spec->have_spdif_mux = 1;
e1f0d669 3862
36c9db7a 3863 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
c21ca4a8 3864 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR		 3865 printk(KERN_WARNING "hda_codec: Could not determine "
3866 "number of channels defaulting to DAC count\n");
36c9db7a 3867 num_dacs = 5;
e1f0d669 3868 }
55e30141 3869
c21ca4a8 3870 switch (num_dacs) {
e1f0d669 3871 case 0x3: /* 6 Channel */
36c9db7a 3872 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
e1f0d669
MR		 3873 break;
3874 case 0x4: /* 8 Channel */
36c9db7a 3875 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
e1f0d669
MR		 3876 break;
3877 case 0x5: /* 10 Channel */
36c9db7a 3878 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
d78d7a90 3879 break;
c21ca4a8 3880 }
e1f0d669 3881
e1f0d669
MR		 3882 spec->aloopback_mask = 0x01;
3883 spec->aloopback_shift = 8;
3884
7504b6cd 3885 spec->gen.beep_nid = 0x1c; /* digital beep */
6479c631 3886
55e30141
TI		 3887 /* GPIO0 High = Enable EAPD */
3888 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3889 spec->gpio_data = 0x01;
6b3ab21e 3890
55e30141 3891 spec->eapd_switch = 1;
a7662640 3892
a64135a2
MR		 3893 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3894 spec->pwr_nids = stac92hd73xx_pwr_nids;
3895
36c9db7a 3896 spec->gen.own_eapd_ctl = 1;
f4f678d2 3897 spec->gen.power_down_unused = 1;
36c9db7a
TI		 3898
3899 codec->patch_ops = stac_patch_ops;
3900
3901 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
3902 stac92hd73xx_fixups);
55e30141
TI		 3903 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3904
3905 if (!spec->volknob_init)
3906 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
3907
36c9db7a 3908 err = stac_parse_auto_config(codec);
e1f0d669 3909 if (err < 0) {
36c9db7a 3910 stac_free(codec);
e1f0d669
MR		 3911 return err;
3912 }
3913
303985f8
DH		 3914 /* Don't GPIO-mute speakers if there are no internal speakers, because
3915 * the GPIO might be necessary for Headphone
3916 */
3917 if (spec->eapd_switch && !has_builtin_speaker(codec))
3918 spec->eapd_switch = 0;
3919
2d34e1b3
TI		 3920 codec->proc_widget_hook = stac92hd7x_proc_hook;
3921
55e30141
TI		 3922 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3923
e1f0d669
MR		 3924 return 0;
3925}
3926
372f8c75
TI		 3927static void stac_setup_gpio(struct hda_codec *codec)
3928{
3929 struct sigmatel_spec *spec = codec->spec;
3930
1ea9a69d 3931 spec->gpio_mask |= spec->eapd_mask;
372f8c75
TI		 3932 if (spec->gpio_led) {
3933 if (!spec->vref_mute_led_nid) {
3934 spec->gpio_mask |= spec->gpio_led;
3935 spec->gpio_dir |= spec->gpio_led;
3936 spec->gpio_data |= spec->gpio_led;
3937 } else {
3938 codec->patch_ops.set_power_state =
36c9db7a 3939 stac_set_power_state;
372f8c75
TI		 3940 }
3941 }
3942
3943 if (spec->mic_mute_led_gpio) {
3944 spec->gpio_mask |= spec->mic_mute_led_gpio;
3945 spec->gpio_dir |= spec->mic_mute_led_gpio;
3946 spec->mic_mute_led_on = true;
3947 spec->gpio_data |= spec->mic_mute_led_gpio;
36c9db7a 3948
a90229e0 3949 spec->gen.cap_sync_hook = stac_capture_led_hook;
372f8c75
TI		 3950 }
3951}
3952
d0513fc6
MR		 3953static int patch_stac92hd83xxx(struct hda_codec *codec)
3954{
3955 struct sigmatel_spec *spec;
3956 int err;
3957
36c9db7a 3958 err = alloc_stac_spec(codec);
361dab3e
TI		 3959 if (err < 0)
3960 return err;
d0513fc6 3961
c36b5b05 3962 codec->epss = 0; /* longer delay needed for D3 */
699d8995 3963
361dab3e 3964 spec = codec->spec;
1db7ccdb 3965 spec->linear_tone_beep = 0;
36c9db7a 3966 spec->gen.own_eapd_ctl = 1;
f4f678d2 3967 spec->gen.power_down_unused = 1;
2748746f 3968 spec->gen.mixer_nid = 0x1b;
36c9db7a 3969
7504b6cd 3970 spec->gen.beep_nid = 0x21; /* digital beep */
d0513fc6 3971 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 3972 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
36c9db7a 3973 spec->default_polarity = -1; /* no default cfg */
d0513fc6 3974
36c9db7a 3975 codec->patch_ops = stac_patch_ops;
b4e81876 3976
372f8c75 3977 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
e108c7b7 3978
36c9db7a
TI		 3979 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
3980 stac92hd83xxx_fixups);
372f8c75 3981 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
b4e81876 3982
372f8c75 3983 stac_setup_gpio(codec);
62cbde18 3984
36c9db7a 3985 err = stac_parse_auto_config(codec);
d0513fc6 3986 if (err < 0) {
36c9db7a 3987 stac_free(codec);
d0513fc6
MR		 3988 return err;
3989 }
3990
2d34e1b3
TI		 3991 codec->proc_widget_hook = stac92hd_proc_hook;
3992
372f8c75
TI		 3993 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3994
d0513fc6
MR		 3995 return 0;
3996}
3997
4e637c6e
VK		 3998static const hda_nid_t stac92hd95_pwr_nids[] = {
3999 0x0a, 0x0b, 0x0c, 0x0d
4000};
4001
4002static int patch_stac92hd95(struct hda_codec *codec)
4003{
4004 struct sigmatel_spec *spec;
4005 int err;
4006
4007 err = alloc_stac_spec(codec);
4008 if (err < 0)
4009 return err;
4010
4011 codec->epss = 0; /* longer delay needed for D3 */
4012
4013 spec = codec->spec;
4014 spec->linear_tone_beep = 0;
4015 spec->gen.own_eapd_ctl = 1;
4016 spec->gen.power_down_unused = 1;
4017
7504b6cd 4018 spec->gen.beep_nid = 0x19; /* digital beep */
4e637c6e
VK		 4019 spec->pwr_nids = stac92hd95_pwr_nids;
4020 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4021 spec->default_polarity = -1; /* no default cfg */
4022
4023 codec->patch_ops = stac_patch_ops;
4024
4025 err = stac_parse_auto_config(codec);
4026 if (err < 0) {
4027 stac_free(codec);
4028 return err;
4029 }
4030
4031 codec->proc_widget_hook = stac92hd_proc_hook;
4032
4033 return 0;
4034}
4035
e035b841
MR		 4036static int patch_stac92hd71bxx(struct hda_codec *codec)
4037{
4038 struct sigmatel_spec *spec;
2b63536f 4039 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
361dab3e 4040 int err;
e035b841 4041
36c9db7a 4042 err = alloc_stac_spec(codec);
361dab3e
TI		 4043 if (err < 0)
4044 return err;
e035b841 4045
361dab3e 4046 spec = codec->spec;
1b0e372d 4047 spec->linear_tone_beep = 0;
36c9db7a 4048 spec->gen.own_eapd_ctl = 1;
f4f678d2 4049 spec->gen.power_down_unused = 1;
2748746f 4050 spec->gen.mixer_nid = 0x17;
42875479 4051 spec->have_spdif_mux = 1;
e035b841 4052
36c9db7a 4053 codec->patch_ops = stac_patch_ops;
0f6fcb73
TI		 4054
4055 /* GPIO0 = EAPD */
4056 spec->gpio_mask = 0x01;
4057 spec->gpio_dir = 0x01;
4058 spec->gpio_data = 0x01;
41c3b648 4059
541eee87
MR		 4060 switch (codec->vendor_id) {
4061 case 0x111d76b6: /* 4 Port without Analog Mixer */
4062 case 0x111d76b7:
23c7b521 4063 unmute_init++;
541eee87 4064 break;
aafc4412 4065 case 0x111d7608: /* 5 Port with Analog Mixer */
8daaaa97 4066 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 4067 (codec->revision_id & 0xf) == 1)
8daaaa97 4068 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4069
aafc4412 4070 /* disable VSW */
ca8d33fc 4071 unmute_init++;
330ee995
TI		 4072 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4073 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
aafc4412
MR		 4074 break;
4075 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 4076 if ((codec->revision_id & 0xf) == 1)
8daaaa97 4077 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 4078
5207e10e 4079 break;
541eee87
MR		 4080 }
4081
5e68fb3c 4082 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
0f6fcb73 4083 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
5e68fb3c 4084
ca8d33fc
MR		 4085 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4086 snd_hda_sequence_write_cache(codec, unmute_init);
4087
36c9db7a 4088 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4b33c767 4089 spec->aloopback_mask = 0x50;
541eee87
MR		 4090 spec->aloopback_shift = 0;
4091
8daaaa97 4092 spec->powerdown_adcs = 1;
7504b6cd 4093 spec->gen.beep_nid = 0x26; /* digital beep */
36c9db7a 4094 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
aafc4412 4095 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841 4096
36c9db7a
TI		 4097 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4098 stac92hd71bxx_fixups);
0f6fcb73 4099 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5bdaaada 4100
372f8c75 4101 stac_setup_gpio(codec);
6a14f585 4102
36c9db7a 4103 err = stac_parse_auto_config(codec);
e035b841 4104 if (err < 0) {
36c9db7a 4105 stac_free(codec);
e035b841
MR		 4106 return err;
4107 }
4108
2d34e1b3
TI		 4109 codec->proc_widget_hook = stac92hd7x_proc_hook;
4110
0f6fcb73
TI		 4111 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4112
e035b841 4113 return 0;
86d190e7 4114}
e035b841 4115
2f2f4251
M		 4116static int patch_stac922x(struct hda_codec *codec)
4117{
4118 struct sigmatel_spec *spec;
c7d4b2fa 4119 int err;
2f2f4251 4120
36c9db7a 4121 err = alloc_stac_spec(codec);
361dab3e
TI		 4122 if (err < 0)
4123 return err;
2f2f4251 4124
361dab3e 4125 spec = codec->spec;
1b0e372d 4126 spec->linear_tone_beep = 1;
36c9db7a 4127 spec->gen.own_eapd_ctl = 1;
5d5d3bc3 4128
36c9db7a 4129 codec->patch_ops = stac_patch_ops;
c7d4b2fa 4130
0a427846
TI		 4131 snd_hda_add_verbs(codec, stac922x_core_init);
4132
807a4636
TI		 4133 /* Fix Mux capture level; max to 2 */
4134 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4135 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4136 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4137 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4138 (0 << AC_AMPCAP_MUTE_SHIFT));
4139
36c9db7a
TI		 4140 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4141 stac922x_fixups);
4142 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4143
4144 err = stac_parse_auto_config(codec);
4145 if (err < 0) {
4146 stac_free(codec);
4147 return err;
4148 }
4149
0a427846
TI		 4150 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4151
3cc08dc6
MP		 4152 return 0;
4153}
4154
42875479
TI		 4155static const char * const stac927x_spdif_labels[] = {
4156 "Digital Playback", "ADAT", "Analog Mux 1",
4157 "Analog Mux 2", "Analog Mux 3", NULL
4158};
4159
3cc08dc6
MP		 4160static int patch_stac927x(struct hda_codec *codec)
4161{
4162 struct sigmatel_spec *spec;
4163 int err;
4164
36c9db7a 4165 err = alloc_stac_spec(codec);
361dab3e
TI		 4166 if (err < 0)
4167 return err;
3cc08dc6 4168
361dab3e 4169 spec = codec->spec;
1b0e372d 4170 spec->linear_tone_beep = 1;
36c9db7a 4171 spec->gen.own_eapd_ctl = 1;
42875479
TI		 4172 spec->have_spdif_mux = 1;
4173 spec->spdif_labels = stac927x_spdif_labels;
3cc08dc6 4174
7504b6cd 4175 spec->gen.beep_nid = 0x23; /* digital beep */
8e9068b1 4176
29ac8363
TI		 4177 /* GPIO0 High = Enable EAPD */
4178 spec->eapd_mask = spec->gpio_mask = 0x01;
4179 spec->gpio_dir = spec->gpio_data = 0x01;
af6ee302 4180
36c9db7a 4181 spec->aloopback_ctl = &stac927x_loopback;
e1f0d669
MR		 4182 spec->aloopback_mask = 0x40;
4183 spec->aloopback_shift = 0;
c0cea0d0 4184 spec->eapd_switch = 1;
8e9068b1 4185
36c9db7a
TI		 4186 codec->patch_ops = stac_patch_ops;
4187
4188 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4189 stac927x_fixups);
f6655d52
TI		 4190 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4191
29ac8363
TI		 4192 if (!spec->volknob_init)
4193 snd_hda_add_verbs(codec, stac927x_core_init);
4194
36c9db7a 4195 err = stac_parse_auto_config(codec);
c7d4b2fa 4196 if (err < 0) {
36c9db7a 4197 stac_free(codec);
c7d4b2fa
M		 4198 return err;
4199 }
2f2f4251 4200
2d34e1b3
TI		 4201 codec->proc_widget_hook = stac927x_proc_hook;
4202
52987656
TI		 4203 /*
4204 * !!FIXME!!
4205 * The STAC927x seem to require fairly long delays for certain
4206 * command sequences. With too short delays (even if the answer
4207 * is set to RIRB properly), it results in the silence output
4208 * on some hardwares like Dell.
4209 *
4210 * The below flag enables the longer delay (see get_response
4211 * in hda_intel.c).
4212 */
4213 codec->bus->needs_damn_long_delay = 1;
4214
29ac8363 4215 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
e28d8322 4216
2f2f4251
M		 4217 return 0;
4218}
4219
f3302a59
MP		 4220static int patch_stac9205(struct hda_codec *codec)
4221{
4222 struct sigmatel_spec *spec;
8259980e 4223 int err;
f3302a59 4224
36c9db7a 4225 err = alloc_stac_spec(codec);
361dab3e
TI		 4226 if (err < 0)
4227 return err;
f3302a59 4228
361dab3e 4229 spec = codec->spec;
1b0e372d 4230 spec->linear_tone_beep = 1;
36c9db7a 4231 spec->gen.own_eapd_ctl = 1;
42875479 4232 spec->have_spdif_mux = 1;
f3302a59 4233
7504b6cd 4234 spec->gen.beep_nid = 0x23; /* digital beep */
f3302a59 4235
fe6322ca 4236 snd_hda_add_verbs(codec, stac9205_core_init);
36c9db7a 4237 spec->aloopback_ctl = &stac9205_loopback;
6479c631 4238
e1f0d669
MR		 4239 spec->aloopback_mask = 0x40;
4240 spec->aloopback_shift = 0;
87d48363 4241
fe6322ca
TI		 4242 /* GPIO0 High = EAPD */
4243 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4244 spec->gpio_data = 0x01;
87d48363 4245
fe6322ca
TI		 4246 /* Turn on/off EAPD per HP plugging */
4247 spec->eapd_switch = 1;
4fe5195c 4248
36c9db7a
TI		 4249 codec->patch_ops = stac_patch_ops;
4250
4251 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4252 stac9205_fixups);
fe6322ca 4253 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
33382403 4254
36c9db7a 4255 err = stac_parse_auto_config(codec);
f3302a59 4256 if (err < 0) {
36c9db7a 4257 stac_free(codec);
f3302a59
MP		 4258 return err;
4259 }
4260
2d34e1b3
TI		 4261 codec->proc_widget_hook = stac9205_proc_hook;
4262
fe6322ca
TI		 4263 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4264
f3302a59
MP		 4265 return 0;
4266}
4267
db064e50 4268/*
6d859065 4269 * STAC9872 hack
db064e50
TI		 4270 */
4271
2b63536f 4272static const struct hda_verb stac9872_core_init[] = {
1624cb9a 4273 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 4274 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4275 {}
4276};
4277
fc268c10
TI		 4278static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4279 { 0x0a, 0x03211020 },
4280 { 0x0b, 0x411111f0 },
4281 { 0x0c, 0x411111f0 },
4282 { 0x0d, 0x03a15030 },
4283 { 0x0e, 0x411111f0 },
4284 { 0x0f, 0x90170110 },
4285 { 0x11, 0x411111f0 },
4286 { 0x13, 0x411111f0 },
4287 { 0x14, 0x90a7013e },
4288 {}
307282c8
TI		 4289};
4290
fc268c10
TI		 4291static const struct hda_model_fixup stac9872_models[] = {
4292 { .id = STAC_9872_VAIO, .name = "vaio" },
4293 {}
307282c8
TI		 4294};
4295
fc268c10
TI		 4296static const struct hda_fixup stac9872_fixups[] = {
4297 [STAC_9872_VAIO] = {
4298 .type = HDA_FIXUP_PINS,
4299 .v.pins = stac9872_vaio_pin_configs,
4300 },
307282c8
TI		 4301};
4302
fc268c10 4303static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
b04add95
TI		 4304 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4305 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI		 4306 {} /* terminator */
4307};
4308
6d859065 4309static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 4310{
4311 struct sigmatel_spec *spec;
1e137f92 4312 int err;
db064e50 4313
36c9db7a 4314 err = alloc_stac_spec(codec);
361dab3e
TI		 4315 if (err < 0)
4316 return err;
4317
4318 spec = codec->spec;
1b0e372d 4319 spec->linear_tone_beep = 1;
36c9db7a 4320 spec->gen.own_eapd_ctl = 1;
caa10b6e 4321
36c9db7a 4322 codec->patch_ops = stac_patch_ops;
db064e50 4323
fc268c10
TI		 4324 snd_hda_add_verbs(codec, stac9872_core_init);
4325
36c9db7a
TI		 4326 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4327 stac9872_fixups);
fc268c10 4328 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1e137f92 4329
36c9db7a 4330 err = stac_parse_auto_config(codec);
1e137f92 4331 if (err < 0) {
36c9db7a 4332 stac_free(codec);
1e137f92
TI		 4333 return -EINVAL;
4334 }
fc268c10
TI		 4335
4336 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4337
db064e50
TI		 4338 return 0;
4339}
4340
4341
2f2f4251
M		 4342/*
4343 * patch entries
4344 */
2b63536f 4345static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M		 4346 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4347 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4348 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4349 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4350 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4351 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4352 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 4353 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4354 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4355 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4356 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4357 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4358 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 4359 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4360 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4361 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4362 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4363 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4364 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4365 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4366 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4367 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4368 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 4369 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4370 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4371 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4372 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4373 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4374 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 4375 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4376 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 4377 /* The following does not take into account .id=0x83847661 when subsys =
4378 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4379 * currently not fully supported.
4380 */
4381 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4382 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4383 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 4384 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP		 4385 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4386 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4387 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4388 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4389 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4390 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4391 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4392 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 4393 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 4394 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 4395 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 4396 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 4397 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC		 4398 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4399 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC		 4400 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4401 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4402 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4403 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 4404 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 4405 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4406 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 4407 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4e637c6e 4408 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
541eee87
MR		 4409 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4410 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4411 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4412 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4413 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4414 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4415 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4416 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC		 4417 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4418 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4419 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4420 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4421 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4422 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4423 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4424 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4425 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4426 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4427 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4428 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4429 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4430 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4431 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 4432 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 4433 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK		 4434 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4435 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 4436 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC		 4437 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4438 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4439 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4440 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
4441 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
4442 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
4443 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
4444 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
4445 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
4446 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
4447 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
4448 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M		 4449 {} /* terminator */
4450};
1289e9e8
TI		 4451
4452MODULE_ALIAS("snd-hda-codec-id:8384*");
4453MODULE_ALIAS("snd-hda-codec-id:111d*");
4454
4455MODULE_LICENSE("GPL");
4456MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
4457
4458static struct hda_codec_preset_list sigmatel_list = {
4459 .preset = snd_hda_preset_sigmatel,
4460 .owner = THIS_MODULE,
4461};
4462
4463static int __init patch_sigmatel_init(void)
4464{
4465 return snd_hda_add_codec_preset(&sigmatel_list);
4466}
4467
4468static void __exit patch_sigmatel_exit(void)
4469{
4470 snd_hda_delete_codec_preset(&sigmatel_list);
4471}
4472
4473module_init(patch_sigmatel_init)
4474module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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