Merge branch 'test/hda-gen-parser' into test/hda-migrate
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
5bdaaada 31#include <linux/dmi.h>
da155d5b 32#include <linux/module.h>
2f2f4251 33#include <sound/core.h>
c7d4b2fa 34#include <sound/asoundef.h>
45a6ac16 35#include <sound/jack.h>
a74ccea5 36#include <sound/tlv.h>
2f2f4251
M
37#include "hda_codec.h"
38#include "hda_local.h"
128bc4ba 39#include "hda_auto_parser.h"
1cd2224c 40#include "hda_beep.h"
1835a0f9 41#include "hda_jack.h"
2f2f4251 42
c6e4c666
TI
43enum {
44 STAC_VREF_EVENT = 1,
45 STAC_INSERT_EVENT,
46 STAC_PWR_EVENT,
47 STAC_HP_EVENT,
fefd67f3 48 STAC_LO_EVENT,
3d21d3f7 49 STAC_MIC_EVENT,
c6e4c666 50};
4e55096e 51
f5fcc13c 52enum {
1607b8ea 53 STAC_AUTO,
f5fcc13c 54 STAC_REF,
bf277785 55 STAC_9200_OQO,
dfe495d0
TI
56 STAC_9200_DELL_D21,
57 STAC_9200_DELL_D22,
58 STAC_9200_DELL_D23,
59 STAC_9200_DELL_M21,
60 STAC_9200_DELL_M22,
61 STAC_9200_DELL_M23,
62 STAC_9200_DELL_M24,
63 STAC_9200_DELL_M25,
64 STAC_9200_DELL_M26,
65 STAC_9200_DELL_M27,
58eec423
MCC
66 STAC_9200_M4,
67 STAC_9200_M4_2,
117f257d 68 STAC_9200_PANASONIC,
f5fcc13c
TI
69 STAC_9200_MODELS
70};
71
72enum {
1607b8ea 73 STAC_9205_AUTO,
f5fcc13c 74 STAC_9205_REF,
dfe495d0 75 STAC_9205_DELL_M42,
ae0a8ed8
TD
76 STAC_9205_DELL_M43,
77 STAC_9205_DELL_M44,
d9a4268e 78 STAC_9205_EAPD,
f5fcc13c
TI
79 STAC_9205_MODELS
80};
81
e1f0d669 82enum {
1607b8ea 83 STAC_92HD73XX_AUTO,
9e43f0de 84 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 85 STAC_92HD73XX_REF,
ae709440 86 STAC_92HD73XX_INTEL,
661cd8fb
TI
87 STAC_DELL_M6_AMIC,
88 STAC_DELL_M6_DMIC,
89 STAC_DELL_M6_BOTH,
6b3ab21e 90 STAC_DELL_EQ,
842ae638 91 STAC_ALIENWARE_M17X,
e1f0d669
MR
92 STAC_92HD73XX_MODELS
93};
94
d0513fc6 95enum {
1607b8ea 96 STAC_92HD83XXX_AUTO,
d0513fc6 97 STAC_92HD83XXX_REF,
32ed3f46 98 STAC_92HD83XXX_PWR_REF,
8bb0ac55 99 STAC_DELL_S14,
f7f9bdfa 100 STAC_DELL_VOSTRO_3500,
0c27c180 101 STAC_92HD83XXX_HP_cNB11_INTQUAD,
48315590 102 STAC_HP_DV7_4000,
5556e147 103 STAC_HP_ZEPHYR,
a3e19973 104 STAC_92HD83XXX_HP_LED,
ff8a1e27 105 STAC_92HD83XXX_HP_INV_LED,
62cbde18 106 STAC_92HD83XXX_HP_MIC_LED,
8d032a8f 107 STAC_92HD83XXX_HEADSET_JACK,
d0513fc6
MR
108 STAC_92HD83XXX_MODELS
109};
110
e035b841 111enum {
1607b8ea 112 STAC_92HD71BXX_AUTO,
e035b841 113 STAC_92HD71BXX_REF,
a7662640
MR
114 STAC_DELL_M4_1,
115 STAC_DELL_M4_2,
3a7abfd2 116 STAC_DELL_M4_3,
6a14f585 117 STAC_HP_M4,
2a6ce6e5 118 STAC_HP_DV4,
1b0652eb 119 STAC_HP_DV5,
ae6241fb 120 STAC_HP_HDX,
514bf54c 121 STAC_HP_DV4_1222NR,
e035b841
MR
122 STAC_92HD71BXX_MODELS
123};
124
8e21c34c 125enum {
1607b8ea 126 STAC_925x_AUTO,
8e21c34c 127 STAC_925x_REF,
9cb36c2a
MCC
128 STAC_M1,
129 STAC_M1_2,
130 STAC_M2,
8e21c34c 131 STAC_M2_2,
9cb36c2a
MCC
132 STAC_M3,
133 STAC_M5,
134 STAC_M6,
8e21c34c
TD
135 STAC_925x_MODELS
136};
137
f5fcc13c 138enum {
1607b8ea 139 STAC_922X_AUTO,
f5fcc13c
TI
140 STAC_D945_REF,
141 STAC_D945GTP3,
142 STAC_D945GTP5,
5d5d3bc3
IZ
143 STAC_INTEL_MAC_V1,
144 STAC_INTEL_MAC_V2,
145 STAC_INTEL_MAC_V3,
146 STAC_INTEL_MAC_V4,
147 STAC_INTEL_MAC_V5,
536319af
NB
148 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
149 * is given, one of the above models will be
150 * chosen according to the subsystem id. */
dfe495d0 151 /* for backward compatibility */
f5fcc13c 152 STAC_MACMINI,
3fc24d85 153 STAC_MACBOOK,
6f0778d8
NB
154 STAC_MACBOOK_PRO_V1,
155 STAC_MACBOOK_PRO_V2,
f16928fb 156 STAC_IMAC_INTEL,
0dae0f83 157 STAC_IMAC_INTEL_20,
8c650087 158 STAC_ECS_202,
dfe495d0
TI
159 STAC_922X_DELL_D81,
160 STAC_922X_DELL_D82,
161 STAC_922X_DELL_M81,
162 STAC_922X_DELL_M82,
f5fcc13c
TI
163 STAC_922X_MODELS
164};
165
166enum {
1607b8ea 167 STAC_927X_AUTO,
e28d8322 168 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI
169 STAC_D965_REF,
170 STAC_D965_3ST,
171 STAC_D965_5ST,
679d92ed 172 STAC_D965_5ST_NO_FP,
4ff076e5 173 STAC_DELL_3ST,
8e9068b1 174 STAC_DELL_BIOS,
54930531 175 STAC_927X_VOLKNOB,
f5fcc13c
TI
176 STAC_927X_MODELS
177};
403d1944 178
307282c8
TI
179enum {
180 STAC_9872_AUTO,
181 STAC_9872_VAIO,
182 STAC_9872_MODELS
183};
184
3d21d3f7
TI
185struct sigmatel_mic_route {
186 hda_nid_t pin;
02d33322
TI
187 signed char mux_idx;
188 signed char dmux_idx;
3d21d3f7
TI
189};
190
699d8995
VK
191#define MAX_PINS_NUM 16
192#define MAX_ADCS_NUM 4
193#define MAX_DMICS_NUM 4
194
2f2f4251 195struct sigmatel_spec {
c8b6bf9b 196 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M
197 unsigned int num_mixers;
198
403d1944 199 int board_config;
c0cea0d0 200 unsigned int eapd_switch: 1;
c7d4b2fa 201 unsigned int surr_switch: 1;
3cc08dc6 202 unsigned int alt_switch: 1;
82bc955f 203 unsigned int hp_detect: 1;
00ef50c2 204 unsigned int spdif_mute: 1;
7c7767eb 205 unsigned int check_volume_offset:1;
3d21d3f7 206 unsigned int auto_mic:1;
1b0e372d 207 unsigned int linear_tone_beep:1;
8d032a8f 208 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
c7d4b2fa 209
4fe5195c 210 /* gpio lines */
0fc9dec4 211 unsigned int eapd_mask;
4fe5195c
MR
212 unsigned int gpio_mask;
213 unsigned int gpio_dir;
214 unsigned int gpio_data;
215 unsigned int gpio_mute;
86d190e7 216 unsigned int gpio_led;
c357aab0 217 unsigned int gpio_led_polarity;
f1a73746 218 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
45eebda7 219 unsigned int vref_led;
4fe5195c 220
62cbde18
TI
221 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
222 bool mic_mute_led_on; /* current mic mute state */
223
8daaaa97
MR
224 /* stream */
225 unsigned int stream_delay;
226
4fe5195c 227 /* analog loopback */
2b63536f 228 const struct snd_kcontrol_new *aloopback_ctl;
e1f0d669
MR
229 unsigned char aloopback_mask;
230 unsigned char aloopback_shift;
8259980e 231
a64135a2 232 /* power management */
c882246d 233 unsigned int power_map_bits;
a64135a2 234 unsigned int num_pwrs;
2b63536f
TI
235 const hda_nid_t *pwr_nids;
236 const hda_nid_t *dac_list;
a64135a2 237
2f2f4251 238 /* playback */
b22b4821
MR
239 struct hda_input_mux *mono_mux;
240 unsigned int cur_mmux;
2f2f4251 241 struct hda_multi_out multiout;
3cc08dc6 242 hda_nid_t dac_nids[5];
c21ca4a8
TI
243 hda_nid_t hp_dacs[5];
244 hda_nid_t speaker_dacs[5];
2f2f4251 245
7c7767eb
TI
246 int volume_offset;
247
2f2f4251 248 /* capture */
2b63536f 249 const hda_nid_t *adc_nids;
2f2f4251 250 unsigned int num_adcs;
2b63536f 251 const hda_nid_t *mux_nids;
dabbed6f 252 unsigned int num_muxes;
2b63536f 253 const hda_nid_t *dmic_nids;
8b65727b 254 unsigned int num_dmics;
2b63536f 255 const hda_nid_t *dmux_nids;
1697055e 256 unsigned int num_dmuxes;
2b63536f 257 const hda_nid_t *smux_nids;
d9737751 258 unsigned int num_smuxes;
5207e10e 259 unsigned int num_analog_muxes;
6479c631 260
2b63536f
TI
261 const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
262 const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
6479c631
TI
263 unsigned int num_caps; /* number of capture volume/switch elements */
264
3d21d3f7
TI
265 struct sigmatel_mic_route ext_mic;
266 struct sigmatel_mic_route int_mic;
9907790a 267 struct sigmatel_mic_route dock_mic;
3d21d3f7 268
ea734963 269 const char * const *spdif_labels;
d9737751 270
dabbed6f 271 hda_nid_t dig_in_nid;
b22b4821 272 hda_nid_t mono_nid;
1cd2224c
MR
273 hda_nid_t anabeep_nid;
274 hda_nid_t digbeep_nid;
2f2f4251 275
2f2f4251 276 /* pin widgets */
2b63536f 277 const hda_nid_t *pin_nids;
2f2f4251 278 unsigned int num_pins;
2f2f4251
M
279
280 /* codec specific stuff */
2b63536f
TI
281 const struct hda_verb *init;
282 const struct snd_kcontrol_new *mixer;
2f2f4251
M
283
284 /* capture source */
8b65727b 285 struct hda_input_mux *dinput_mux;
e1f0d669 286 unsigned int cur_dmux[2];
c7d4b2fa 287 struct hda_input_mux *input_mux;
3cc08dc6 288 unsigned int cur_mux[3];
d9737751
MR
289 struct hda_input_mux *sinput_mux;
290 unsigned int cur_smux[2];
2a9c7816
MR
291 unsigned int cur_amux;
292 hda_nid_t *amp_nids;
8daaaa97 293 unsigned int powerdown_adcs;
2f2f4251 294
403d1944
MP
295 /* i/o switches */
296 unsigned int io_switch[2];
0fb87bb4 297 unsigned int clfe_swap;
c21ca4a8
TI
298 hda_nid_t line_switch; /* shared line-in for input and output */
299 hda_nid_t mic_switch; /* shared mic-in for input and output */
300 hda_nid_t hp_switch; /* NID of HP as line-out */
5f10c4a9 301 unsigned int aloopback;
2f2f4251 302
c7d4b2fa
M
303 struct hda_pcm pcm_rec[2]; /* PCM information */
304
305 /* dynamic controls and input_mux */
306 struct auto_pin_cfg autocfg;
603c4019 307 struct snd_array kctls;
8b65727b 308 struct hda_input_mux private_dimux;
c7d4b2fa 309 struct hda_input_mux private_imux;
d9737751 310 struct hda_input_mux private_smux;
b22b4821 311 struct hda_input_mux private_mono_mux;
699d8995
VK
312
313 /* auto spec */
314 unsigned auto_pin_cnt;
315 hda_nid_t auto_pin_nids[MAX_PINS_NUM];
316 unsigned auto_adc_cnt;
317 hda_nid_t auto_adc_nids[MAX_ADCS_NUM];
318 hda_nid_t auto_mux_nids[MAX_ADCS_NUM];
319 hda_nid_t auto_dmux_nids[MAX_ADCS_NUM];
320 unsigned long auto_capvols[MAX_ADCS_NUM];
321 unsigned auto_dmic_cnt;
322 hda_nid_t auto_dmic_nids[MAX_DMICS_NUM];
2faa3bf1 323
d2f344b5 324 struct hda_vmaster_mute_hook vmaster_mute;
2f2f4251
M
325};
326
c882246d
TI
327#define AC_VERB_IDT_SET_POWER_MAP 0x7ec
328#define AC_VERB_IDT_GET_POWER_MAP 0xfec
329
2b63536f 330static const hda_nid_t stac9200_adc_nids[1] = {
2f2f4251
M
331 0x03,
332};
333
2b63536f 334static const hda_nid_t stac9200_mux_nids[1] = {
2f2f4251
M
335 0x0c,
336};
337
2b63536f 338static const hda_nid_t stac9200_dac_nids[1] = {
2f2f4251
M
339 0x02,
340};
341
2b63536f 342static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
a64135a2
MR
343 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
344 0x0f, 0x10, 0x11
345};
346
2b63536f 347static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
0ffa9807
MR
348 0x26, 0,
349};
350
2b63536f 351static const hda_nid_t stac92hd73xx_adc_nids[2] = {
e1f0d669
MR
352 0x1a, 0x1b
353};
354
355#define STAC92HD73XX_NUM_DMICS 2
2b63536f 356static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
e1f0d669
MR
357 0x13, 0x14, 0
358};
359
360#define STAC92HD73_DAC_COUNT 5
e1f0d669 361
2b63536f 362static const hda_nid_t stac92hd73xx_mux_nids[2] = {
e2aec171 363 0x20, 0x21,
e1f0d669
MR
364};
365
2b63536f 366static const hda_nid_t stac92hd73xx_dmux_nids[2] = {
e1f0d669
MR
367 0x20, 0x21,
368};
369
2b63536f 370static const hda_nid_t stac92hd73xx_smux_nids[2] = {
d9737751
MR
371 0x22, 0x23,
372};
373
6479c631 374#define STAC92HD73XX_NUM_CAPS 2
2b63536f 375static const unsigned long stac92hd73xx_capvols[] = {
6479c631
TI
376 HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
377 HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
378};
379#define stac92hd73xx_capsws stac92hd73xx_capvols
380
d0513fc6 381#define STAC92HD83_DAC_COUNT 3
d0513fc6 382
afef2cfa
CC
383static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
384 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
385 0x0f, 0x10
d0513fc6
MR
386};
387
2b63536f 388static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
0ffa9807
MR
389 0x1e, 0,
390};
391
2b63536f 392static const hda_nid_t stac92hd83xxx_dmic_nids[] = {
699d8995 393 0x11, 0x20,
ab5a6ebe
VK
394};
395
2b63536f 396static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
a64135a2
MR
397 0x0a, 0x0d, 0x0f
398};
399
2b63536f 400static const hda_nid_t stac92hd71bxx_adc_nids[2] = {
e035b841
MR
401 0x12, 0x13,
402};
403
2b63536f 404static const hda_nid_t stac92hd71bxx_mux_nids[2] = {
e035b841
MR
405 0x1a, 0x1b
406};
407
2b63536f 408static const hda_nid_t stac92hd71bxx_dmux_nids[2] = {
4b33c767 409 0x1c, 0x1d,
e1f0d669
MR
410};
411
2b63536f 412static const hda_nid_t stac92hd71bxx_smux_nids[2] = {
d9737751
MR
413 0x24, 0x25,
414};
415
e035b841 416#define STAC92HD71BXX_NUM_DMICS 2
2b63536f 417static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
e035b841
MR
418 0x18, 0x19, 0
419};
420
2b63536f
TI
421static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = {
422 0x18, 0
423};
424
425static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
0ffa9807
MR
426 0x22, 0
427};
428
6479c631 429#define STAC92HD71BXX_NUM_CAPS 2
2b63536f 430static const unsigned long stac92hd71bxx_capvols[] = {
6479c631
TI
431 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
432 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
433};
434#define stac92hd71bxx_capsws stac92hd71bxx_capvols
435
2b63536f 436static const hda_nid_t stac925x_adc_nids[1] = {
8e21c34c
TD
437 0x03,
438};
439
2b63536f 440static const hda_nid_t stac925x_mux_nids[1] = {
8e21c34c
TD
441 0x0f,
442};
443
2b63536f 444static const hda_nid_t stac925x_dac_nids[1] = {
8e21c34c
TD
445 0x02,
446};
447
f6e9852a 448#define STAC925X_NUM_DMICS 1
2b63536f 449static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
f6e9852a 450 0x15, 0
2c11f955
TD
451};
452
2b63536f 453static const hda_nid_t stac925x_dmux_nids[1] = {
1697055e
TI
454 0x14,
455};
456
2b63536f 457static const unsigned long stac925x_capvols[] = {
6479c631
TI
458 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
459};
2b63536f 460static const unsigned long stac925x_capsws[] = {
6479c631
TI
461 HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
462};
463
2b63536f 464static const hda_nid_t stac922x_adc_nids[2] = {
2f2f4251
M
465 0x06, 0x07,
466};
467
2b63536f 468static const hda_nid_t stac922x_mux_nids[2] = {
2f2f4251
M
469 0x12, 0x13,
470};
471
6479c631 472#define STAC922X_NUM_CAPS 2
2b63536f 473static const unsigned long stac922x_capvols[] = {
6479c631
TI
474 HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
475 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
476};
477#define stac922x_capsws stac922x_capvols
478
2b63536f 479static const hda_nid_t stac927x_slave_dig_outs[2] = {
45c1d85b
MR
480 0x1f, 0,
481};
482
2b63536f 483static const hda_nid_t stac927x_adc_nids[3] = {
3cc08dc6
MP
484 0x07, 0x08, 0x09
485};
486
2b63536f 487static const hda_nid_t stac927x_mux_nids[3] = {
3cc08dc6
MP
488 0x15, 0x16, 0x17
489};
490
2b63536f 491static const hda_nid_t stac927x_smux_nids[1] = {
d9737751
MR
492 0x21,
493};
494
2b63536f 495static const hda_nid_t stac927x_dac_nids[6] = {
b76c850f
MR
496 0x02, 0x03, 0x04, 0x05, 0x06, 0
497};
498
2b63536f 499static const hda_nid_t stac927x_dmux_nids[1] = {
e1f0d669
MR
500 0x1b,
501};
502
7f16859a 503#define STAC927X_NUM_DMICS 2
2b63536f 504static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
7f16859a
MR
505 0x13, 0x14, 0
506};
507
6479c631 508#define STAC927X_NUM_CAPS 3
2b63536f 509static const unsigned long stac927x_capvols[] = {
6479c631
TI
510 HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
511 HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
512 HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
513};
2b63536f 514static const unsigned long stac927x_capsws[] = {
6479c631
TI
515 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
516 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
517 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
518};
519
ea734963 520static const char * const stac927x_spdif_labels[5] = {
65973632
MR
521 "Digital Playback", "ADAT", "Analog Mux 1",
522 "Analog Mux 2", "Analog Mux 3"
523};
524
2b63536f 525static const hda_nid_t stac9205_adc_nids[2] = {
f3302a59
MP
526 0x12, 0x13
527};
528
2b63536f 529static const hda_nid_t stac9205_mux_nids[2] = {
f3302a59
MP
530 0x19, 0x1a
531};
532
2b63536f 533static const hda_nid_t stac9205_dmux_nids[1] = {
1697055e 534 0x1d,
e1f0d669
MR
535};
536
2b63536f 537static const hda_nid_t stac9205_smux_nids[1] = {
d9737751
MR
538 0x21,
539};
540
f6e9852a 541#define STAC9205_NUM_DMICS 2
2b63536f 542static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
f6e9852a 543 0x17, 0x18, 0
8b65727b
MP
544};
545
6479c631 546#define STAC9205_NUM_CAPS 2
2b63536f 547static const unsigned long stac9205_capvols[] = {
6479c631
TI
548 HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
549 HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
550};
2b63536f 551static const unsigned long stac9205_capsws[] = {
6479c631
TI
552 HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
553 HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
554};
555
2b63536f 556static const hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD
557 0x08, 0x09, 0x0d, 0x0e,
558 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M
559};
560
2b63536f 561static const hda_nid_t stac925x_pin_nids[8] = {
8e21c34c
TD
562 0x07, 0x08, 0x0a, 0x0b,
563 0x0c, 0x0d, 0x10, 0x11,
564};
565
2b63536f 566static const hda_nid_t stac922x_pin_nids[10] = {
2f2f4251
M
567 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
568 0x0f, 0x10, 0x11, 0x15, 0x1b,
569};
570
2b63536f 571static const hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR
572 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
573 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 574 0x14, 0x22, 0x23
e1f0d669
MR
575};
576
616f89e7 577#define STAC92HD71BXX_NUM_PINS 13
2b63536f 578static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
616f89e7
HRK
579 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
580 0x00, 0x14, 0x18, 0x19, 0x1e,
581 0x1f, 0x20, 0x27
582};
2b63536f 583static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
e035b841
MR
584 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
585 0x0f, 0x14, 0x18, 0x19, 0x1e,
616f89e7 586 0x1f, 0x20, 0x27
e035b841
MR
587};
588
2b63536f 589static const hda_nid_t stac927x_pin_nids[14] = {
3cc08dc6
MP
590 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
591 0x0f, 0x10, 0x11, 0x12, 0x13,
592 0x14, 0x21, 0x22, 0x23,
593};
594
2b63536f 595static const hda_nid_t stac9205_pin_nids[12] = {
f3302a59
MP
596 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
597 0x0f, 0x14, 0x16, 0x17, 0x18,
598 0x21, 0x22,
f3302a59
MP
599};
600
8b65727b
MP
601static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
602 struct snd_ctl_elem_info *uinfo)
603{
604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 struct sigmatel_spec *spec = codec->spec;
606 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
607}
608
609static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
611{
612 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
613 struct sigmatel_spec *spec = codec->spec;
e1f0d669 614 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 615
e1f0d669 616 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP
617 return 0;
618}
619
620static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
621 struct snd_ctl_elem_value *ucontrol)
622{
623 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
624 struct sigmatel_spec *spec = codec->spec;
e1f0d669 625 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP
626
627 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 628 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP
629}
630
d9737751
MR
631static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
632 struct snd_ctl_elem_info *uinfo)
633{
634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
635 struct sigmatel_spec *spec = codec->spec;
636 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
637}
638
639static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
643 struct sigmatel_spec *spec = codec->spec;
644 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
645
646 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
647 return 0;
648}
649
650static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
00ef50c2 655 struct hda_input_mux *smux = &spec->private_smux;
d9737751 656 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR
657 int err, val;
658 hda_nid_t nid;
d9737751 659
00ef50c2 660 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 661 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR
662 if (err < 0)
663 return err;
664
665 if (spec->spdif_mute) {
666 if (smux_idx == 0)
667 nid = spec->multiout.dig_out_nid;
668 else
669 nid = codec->slave_dig_outs[smux_idx - 1];
670 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
c9b46f91 671 val = HDA_AMP_MUTE;
00ef50c2 672 else
c9b46f91 673 val = 0;
00ef50c2 674 /* un/mute SPDIF out */
c9b46f91
TI
675 snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
676 HDA_AMP_MUTE, val);
00ef50c2
MR
677 }
678 return 0;
d9737751
MR
679}
680
45eebda7
VK
681static int stac_vrefout_set(struct hda_codec *codec,
682 hda_nid_t nid, unsigned int new_vref)
683{
684 int error, pinctl;
685
686 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
687 pinctl = snd_hda_codec_read(codec, nid, 0,
688 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
689
690 if (pinctl < 0)
691 return pinctl;
692
693 pinctl &= 0xff;
694 pinctl &= ~AC_PINCTL_VREFEN;
695 pinctl |= (new_vref & AC_PINCTL_VREFEN);
696
cdd03ced 697 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
45eebda7
VK
698 if (error < 0)
699 return error;
700
701 return 1;
702}
703
2fc99890
NL
704static unsigned int stac92xx_vref_set(struct hda_codec *codec,
705 hda_nid_t nid, unsigned int new_vref)
706{
b8621516 707 int error;
2fc99890
NL
708 unsigned int pincfg;
709 pincfg = snd_hda_codec_read(codec, nid, 0,
710 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
711
712 pincfg &= 0xff;
713 pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
714 pincfg |= new_vref;
715
716 if (new_vref == AC_PINCTL_VREF_HIZ)
717 pincfg |= AC_PINCTL_OUT_EN;
718 else
719 pincfg |= AC_PINCTL_IN_EN;
720
cdd03ced 721 error = snd_hda_set_pin_ctl_cache(codec, nid, pincfg);
2fc99890
NL
722 if (error < 0)
723 return error;
724 else
725 return 1;
726}
727
728static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
729{
730 unsigned int vref;
731 vref = snd_hda_codec_read(codec, nid, 0,
732 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
733 vref &= AC_PINCTL_VREFEN;
734 return vref;
735}
736
c8b6bf9b 737static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M
738{
739 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
740 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 741 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M
742}
743
c8b6bf9b 744static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
745{
746 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
747 struct sigmatel_spec *spec = codec->spec;
748 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
749
750 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
751 return 0;
752}
753
c8b6bf9b 754static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M
755{
756 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
757 struct sigmatel_spec *spec = codec->spec;
758 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5207e10e 759 const struct hda_input_mux *imux = spec->input_mux;
094a4245 760 unsigned int idx, prev_idx, didx;
5207e10e
TI
761
762 idx = ucontrol->value.enumerated.item[0];
763 if (idx >= imux->num_items)
764 idx = imux->num_items - 1;
765 prev_idx = spec->cur_mux[adc_idx];
766 if (prev_idx == idx)
767 return 0;
768 if (idx < spec->num_analog_muxes) {
769 snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
770 AC_VERB_SET_CONNECT_SEL,
771 imux->items[idx].index);
094a4245
VK
772 if (prev_idx >= spec->num_analog_muxes &&
773 spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
5207e10e
TI
774 imux = spec->dinput_mux;
775 /* 0 = analog */
776 snd_hda_codec_write_cache(codec,
777 spec->dmux_nids[adc_idx], 0,
778 AC_VERB_SET_CONNECT_SEL,
779 imux->items[0].index);
780 }
781 } else {
782 imux = spec->dinput_mux;
094a4245
VK
783 /* first dimux item is hardcoded to select analog imux,
784 * so lets skip it
785 */
786 didx = idx - spec->num_analog_muxes + 1;
5207e10e
TI
787 snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
788 AC_VERB_SET_CONNECT_SEL,
094a4245 789 imux->items[didx].index);
5207e10e
TI
790 }
791 spec->cur_mux[adc_idx] = idx;
792 return 1;
2f2f4251
M
793}
794
b22b4821
MR
795static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
796 struct snd_ctl_elem_info *uinfo)
797{
798 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
799 struct sigmatel_spec *spec = codec->spec;
800 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
801}
802
803static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
804 struct snd_ctl_elem_value *ucontrol)
805{
806 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
807 struct sigmatel_spec *spec = codec->spec;
808
809 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
810 return 0;
811}
812
813static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
814 struct snd_ctl_elem_value *ucontrol)
815{
816 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
817 struct sigmatel_spec *spec = codec->spec;
818
819 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
820 spec->mono_nid, &spec->cur_mmux);
821}
822
5f10c4a9
ML
823#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
824
825static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
826 struct snd_ctl_elem_value *ucontrol)
827{
828 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 829 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML
830 struct sigmatel_spec *spec = codec->spec;
831
e1f0d669
MR
832 ucontrol->value.integer.value[0] = !!(spec->aloopback &
833 (spec->aloopback_mask << idx));
5f10c4a9
ML
834 return 0;
835}
836
837static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
838 struct snd_ctl_elem_value *ucontrol)
839{
840 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
841 struct sigmatel_spec *spec = codec->spec;
e1f0d669 842 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 843 unsigned int dac_mode;
e1f0d669 844 unsigned int val, idx_val;
5f10c4a9 845
e1f0d669
MR
846 idx_val = spec->aloopback_mask << idx;
847 if (ucontrol->value.integer.value[0])
848 val = spec->aloopback | idx_val;
849 else
850 val = spec->aloopback & ~idx_val;
68ea7b2f 851 if (spec->aloopback == val)
5f10c4a9
ML
852 return 0;
853
68ea7b2f 854 spec->aloopback = val;
5f10c4a9 855
e1f0d669
MR
856 /* Only return the bits defined by the shift value of the
857 * first two bytes of the mask
858 */
5f10c4a9 859 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR
860 kcontrol->private_value & 0xFFFF, 0x0);
861 dac_mode >>= spec->aloopback_shift;
5f10c4a9 862
e1f0d669 863 if (spec->aloopback & idx_val) {
5f10c4a9 864 snd_hda_power_up(codec);
e1f0d669 865 dac_mode |= idx_val;
5f10c4a9
ML
866 } else {
867 snd_hda_power_down(codec);
e1f0d669 868 dac_mode &= ~idx_val;
5f10c4a9
ML
869 }
870
871 snd_hda_codec_write_cache(codec, codec->afg, 0,
872 kcontrol->private_value >> 16, dac_mode);
873
874 return 1;
875}
876
2b63536f 877static const struct hda_verb stac9200_core_init[] = {
2f2f4251 878 /* set dac0mux for dac converter */
c7d4b2fa 879 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M
880 {}
881};
882
2b63536f 883static const struct hda_verb stac9200_eapd_init[] = {
1194b5b7
TI
884 /* set dac0mux for dac converter */
885 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
886 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
887 {}
888};
889
2b63536f 890static const struct hda_verb dell_eq_core_init[] = {
d654a660
MR
891 /* set master volume to max value without distortion
892 * and direct control */
893 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
e1f0d669
MR
894 {}
895};
896
2b63536f 897static const struct hda_verb stac92hd73xx_core_init[] = {
e1f0d669
MR
898 /* set master volume and direct control */
899 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
e1f0d669
MR
900 {}
901};
902
2b63536f 903static const struct hda_verb stac92hd83xxx_core_init[] = {
d0513fc6
MR
904 /* power state controls amps */
905 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
574f3c4f 906 {}
d0513fc6
MR
907};
908
5556e147
VK
909static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
910 { 0x22, 0x785, 0x43 },
911 { 0x22, 0x782, 0xe0 },
912 { 0x22, 0x795, 0x00 },
913 {}
914};
915
2b63536f 916static const struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR
917 /* set master volume and direct control */
918 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
574f3c4f 919 {}
541eee87
MR
920};
921
2b63536f 922static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
ca8d33fc
MR
923 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
924 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
925 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
926 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR
927 {}
928};
929
2b63536f 930static const struct hda_verb stac925x_core_init[] = {
8e21c34c
TD
931 /* set dac0mux for dac converter */
932 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
c9280d68
TI
933 /* mute the master volume */
934 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
8e21c34c
TD
935 {}
936};
937
2b63536f 938static const struct hda_verb stac922x_core_init[] = {
2f2f4251 939 /* set master volume and direct control */
c7d4b2fa 940 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M
941 {}
942};
943
2b63536f 944static const struct hda_verb d965_core_init[] = {
19039bd0 945 /* set master volume and direct control */
93ed1503 946 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI
947 /* unmute node 0x1b */
948 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
949 /* select node 0x03 as DAC */
950 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
951 {}
952};
953
2b63536f 954static const struct hda_verb dell_3st_core_init[] = {
ccca7cdc
TI
955 /* don't set delta bit */
956 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
957 /* unmute node 0x1b */
958 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
959 /* select node 0x03 as DAC */
960 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
961 {}
962};
963
2b63536f 964static const struct hda_verb stac927x_core_init[] = {
3cc08dc6
MP
965 /* set master volume and direct control */
966 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR
967 /* enable analog pc beep path */
968 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP
969 {}
970};
971
2b63536f 972static const struct hda_verb stac927x_volknob_core_init[] = {
54930531
TI
973 /* don't set delta bit */
974 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
975 /* enable analog pc beep path */
976 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
977 {}
978};
979
2b63536f 980static const struct hda_verb stac9205_core_init[] = {
f3302a59
MP
981 /* set master volume and direct control */
982 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR
983 /* enable analog pc beep path */
984 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP
985 {}
986};
987
b22b4821
MR
988#define STAC_MONO_MUX \
989 { \
990 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
991 .name = "Mono Mux", \
992 .count = 1, \
993 .info = stac92xx_mono_mux_enum_info, \
994 .get = stac92xx_mono_mux_enum_get, \
995 .put = stac92xx_mono_mux_enum_put, \
996 }
997
e1f0d669 998#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML
999 { \
1000 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1001 .name = "Analog Loopback", \
e1f0d669 1002 .count = cnt, \
5f10c4a9
ML
1003 .info = stac92xx_aloopback_info, \
1004 .get = stac92xx_aloopback_get, \
1005 .put = stac92xx_aloopback_put, \
1006 .private_value = verb_read | (verb_write << 16), \
1007 }
1008
2fc99890
NL
1009#define DC_BIAS(xname, idx, nid) \
1010 { \
1011 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1012 .name = xname, \
1013 .index = idx, \
1014 .info = stac92xx_dc_bias_info, \
1015 .get = stac92xx_dc_bias_get, \
1016 .put = stac92xx_dc_bias_put, \
1017 .private_value = nid, \
1018 }
1019
2b63536f 1020static const struct snd_kcontrol_new stac9200_mixer[] = {
2faa3bf1
TI
1021 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xb, 0, HDA_OUTPUT),
1022 HDA_CODEC_MUTE("PCM Playback Switch", 0xb, 0, HDA_OUTPUT),
2f2f4251
M
1023 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
1024 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M
1025 { } /* end */
1026};
1027
2b63536f 1028static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
d78d7a90
TI
1029 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1030 {}
1031};
1032
2b63536f 1033static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
e1f0d669 1034 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
d78d7a90
TI
1035 {}
1036};
e1f0d669 1037
2b63536f 1038static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
d78d7a90
TI
1039 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1040 {}
1041};
1042
d0513fc6 1043
2b63536f 1044static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
d78d7a90
TI
1045 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
1046};
541eee87 1047
2b63536f 1048static const struct snd_kcontrol_new stac925x_mixer[] = {
2faa3bf1
TI
1049 HDA_CODEC_VOLUME_MIN_MUTE("PCM Playback Volume", 0xe, 0, HDA_OUTPUT),
1050 HDA_CODEC_MUTE("PCM Playback Switch", 0x0e, 0, HDA_OUTPUT),
2f2f4251
M
1051 { } /* end */
1052};
1053
2b63536f 1054static const struct snd_kcontrol_new stac9205_loopback[] = {
d78d7a90
TI
1055 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
1056 {}
1057};
1058
2b63536f 1059static const struct snd_kcontrol_new stac927x_loopback[] = {
d78d7a90
TI
1060 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
1061 {}
1062};
1063
1697055e
TI
1064static struct snd_kcontrol_new stac_dmux_mixer = {
1065 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1066 .name = "Digital Input Source",
1067 /* count set later */
1068 .info = stac92xx_dmux_enum_info,
1069 .get = stac92xx_dmux_enum_get,
1070 .put = stac92xx_dmux_enum_put,
1071};
1072
d9737751
MR
1073static struct snd_kcontrol_new stac_smux_mixer = {
1074 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1075 .name = "IEC958 Playback Source",
d9737751
MR
1076 /* count set later */
1077 .info = stac92xx_smux_enum_info,
1078 .get = stac92xx_smux_enum_get,
1079 .put = stac92xx_smux_enum_put,
1080};
1081
9322ca54
TI
1082static const char * const slave_pfxs[] = {
1083 "Front", "Surround", "Center", "LFE", "Side",
f37bc7a8 1084 "Headphone", "Speaker", "Bass Speaker", "IEC958", "PCM",
2134ea4f
TI
1085 NULL
1086};
1087
2faa3bf1
TI
1088static void stac92xx_update_led_status(struct hda_codec *codec, int enabled);
1089
1090static void stac92xx_vmaster_hook(void *private_data, int val)
1091{
1092 stac92xx_update_led_status(private_data, val);
1093}
1094
603c4019
TI
1095static void stac92xx_free_kctls(struct hda_codec *codec);
1096
2f2f4251
M
1097static int stac92xx_build_controls(struct hda_codec *codec)
1098{
1099 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 1100 unsigned int vmaster_tlv[4];
2f2f4251 1101 int err;
c7d4b2fa 1102 int i;
2f2f4251 1103
6479c631
TI
1104 if (spec->mixer) {
1105 err = snd_hda_add_new_ctls(codec, spec->mixer);
1106 if (err < 0)
1107 return err;
1108 }
c7d4b2fa
M
1109
1110 for (i = 0; i < spec->num_mixers; i++) {
1111 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1112 if (err < 0)
1113 return err;
1114 }
5207e10e
TI
1115 if (!spec->auto_mic && spec->num_dmuxes > 0 &&
1116 snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
1697055e 1117 stac_dmux_mixer.count = spec->num_dmuxes;
3911a4c1 1118 err = snd_hda_ctl_add(codec, 0,
1697055e
TI
1119 snd_ctl_new1(&stac_dmux_mixer, codec));
1120 if (err < 0)
1121 return err;
1122 }
d9737751 1123 if (spec->num_smuxes > 0) {
00ef50c2
MR
1124 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1125 struct hda_input_mux *smux = &spec->private_smux;
1126 /* check for mute support on SPDIF out */
1127 if (wcaps & AC_WCAP_OUT_AMP) {
10a20af7 1128 snd_hda_add_imux_item(smux, "Off", 0, NULL);
00ef50c2
MR
1129 spec->spdif_mute = 1;
1130 }
d9737751 1131 stac_smux_mixer.count = spec->num_smuxes;
3911a4c1 1132 err = snd_hda_ctl_add(codec, 0,
d9737751
MR
1133 snd_ctl_new1(&stac_smux_mixer, codec));
1134 if (err < 0)
1135 return err;
1136 }
c7d4b2fa 1137
dabbed6f 1138 if (spec->multiout.dig_out_nid) {
dcda5806
TI
1139 err = snd_hda_create_dig_out_ctls(codec,
1140 spec->multiout.dig_out_nid,
1141 spec->multiout.dig_out_nid,
1142 spec->autocfg.dig_out_type[0]);
dabbed6f
M
1143 if (err < 0)
1144 return err;
9a08160b
TI
1145 err = snd_hda_create_spdif_share_sw(codec,
1146 &spec->multiout);
1147 if (err < 0)
1148 return err;
1149 spec->multiout.share_spdif = 1;
dabbed6f 1150 }
da74ae3e 1151 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M
1152 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1153 if (err < 0)
1154 return err;
1155 }
2134ea4f
TI
1156
1157 /* if we have no master control, let's create it */
2faa3bf1
TI
1158 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1159 HDA_OUTPUT, vmaster_tlv);
1160 /* correct volume offset */
1161 vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
1162 /* minimum value is actually mute */
1163 vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
1164 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1165 vmaster_tlv, slave_pfxs,
1166 "Playback Volume");
1167 if (err < 0)
1168 return err;
1169
1170 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
1171 NULL, slave_pfxs,
1172 "Playback Switch", true,
d2f344b5 1173 &spec->vmaster_mute.sw_kctl);
2faa3bf1
TI
1174 if (err < 0)
1175 return err;
1176
1177 if (spec->gpio_led) {
d2f344b5 1178 spec->vmaster_mute.hook = stac92xx_vmaster_hook;
f29735cb 1179 err = snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute, true);
d2f344b5
TI
1180 if (err < 0)
1181 return err;
2134ea4f
TI
1182 }
1183
d78d7a90
TI
1184 if (spec->aloopback_ctl &&
1185 snd_hda_get_bool_hint(codec, "loopback") == 1) {
1186 err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
1187 if (err < 0)
1188 return err;
1189 }
1190
603c4019 1191 stac92xx_free_kctls(codec); /* no longer needed */
e4973e1e 1192
01a61e12
TI
1193 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
1194 if (err < 0)
1195 return err;
e4973e1e 1196
dabbed6f 1197 return 0;
2f2f4251
M
1198}
1199
2b63536f 1200static const unsigned int ref9200_pin_configs[8] = {
dabbed6f 1201 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M
1202 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1203};
1204
2b63536f 1205static const unsigned int gateway9200_m4_pin_configs[8] = {
58eec423
MCC
1206 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1207 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1208};
2b63536f 1209static const unsigned int gateway9200_m4_2_pin_configs[8] = {
58eec423
MCC
1210 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
1211 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
1212};
1213
1214/*
dfe495d0
TI
1215 STAC 9200 pin configs for
1216 102801A8
1217 102801DE
1218 102801E8
1219*/
2b63536f 1220static const unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI
1221 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1222 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI
1223};
1224
1225/*
1226 STAC 9200 pin configs for
1227 102801C0
1228 102801C1
1229*/
2b63536f 1230static const unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI
1231 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1232 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1233};
1234
1235/*
1236 STAC 9200 pin configs for
1237 102801C4 (Dell Dimension E310)
1238 102801C5
1239 102801C7
1240 102801D9
1241 102801DA
1242 102801E3
1243*/
2b63536f 1244static const unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI
1245 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1246 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI
1247};
1248
1249
1250/*
1251 STAC 9200-32 pin configs for
1252 102801B5 (Dell Inspiron 630m)
1253 102801D8 (Dell Inspiron 640m)
1254*/
2b63536f 1255static const unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI
1256 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1257 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1258};
1259
1260/*
1261 STAC 9200-32 pin configs for
1262 102801C2 (Dell Latitude D620)
1263 102801C8
1264 102801CC (Dell Latitude D820)
1265 102801D4
1266 102801D6
1267*/
2b63536f 1268static const unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI
1269 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1270 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI
1271};
1272
1273/*
1274 STAC 9200-32 pin configs for
1275 102801CE (Dell XPS M1710)
1276 102801CF (Dell Precision M90)
1277*/
2b63536f 1278static const unsigned int dell9200_m23_pin_configs[8] = {
dfe495d0
TI
1279 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1280 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1281};
1282
1283/*
1284 STAC 9200-32 pin configs for
1285 102801C9
1286 102801CA
1287 102801CB (Dell Latitude 120L)
1288 102801D3
1289*/
2b63536f 1290static const unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI
1291 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1292 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1293};
1294
1295/*
1296 STAC 9200-32 pin configs for
1297 102801BD (Dell Inspiron E1505n)
1298 102801EE
1299 102801EF
1300*/
2b63536f 1301static const unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI
1302 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1303 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI
1304};
1305
1306/*
1307 STAC 9200-32 pin configs for
1308 102801F5 (Dell Inspiron 1501)
1309 102801F6
1310*/
2b63536f 1311static const unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI
1312 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1313 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI
1314};
1315
1316/*
1317 STAC 9200-32
1318 102801CD (Dell Inspiron E1705/9400)
1319*/
2b63536f 1320static const unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI
1321 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1322 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI
1323};
1324
2b63536f 1325static const unsigned int oqo9200_pin_configs[8] = {
bf277785
TD
1326 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1327 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1328};
1329
dfe495d0 1330
2b63536f 1331static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
f5fcc13c 1332 [STAC_REF] = ref9200_pin_configs,
bf277785 1333 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI
1334 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1335 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1336 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1337 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1338 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1339 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1340 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1341 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1342 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1343 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
58eec423
MCC
1344 [STAC_9200_M4] = gateway9200_m4_pin_configs,
1345 [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
117f257d 1346 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP
1347};
1348
ea734963 1349static const char * const stac9200_models[STAC_9200_MODELS] = {
1607b8ea 1350 [STAC_AUTO] = "auto",
f5fcc13c 1351 [STAC_REF] = "ref",
bf277785 1352 [STAC_9200_OQO] = "oqo",
dfe495d0
TI
1353 [STAC_9200_DELL_D21] = "dell-d21",
1354 [STAC_9200_DELL_D22] = "dell-d22",
1355 [STAC_9200_DELL_D23] = "dell-d23",
1356 [STAC_9200_DELL_M21] = "dell-m21",
1357 [STAC_9200_DELL_M22] = "dell-m22",
1358 [STAC_9200_DELL_M23] = "dell-m23",
1359 [STAC_9200_DELL_M24] = "dell-m24",
1360 [STAC_9200_DELL_M25] = "dell-m25",
1361 [STAC_9200_DELL_M26] = "dell-m26",
1362 [STAC_9200_DELL_M27] = "dell-m27",
58eec423
MCC
1363 [STAC_9200_M4] = "gateway-m4",
1364 [STAC_9200_M4_2] = "gateway-m4-2",
117f257d 1365 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI
1366};
1367
2b63536f 1368static const struct snd_pci_quirk stac9200_cfg_tbl[] = {
f5fcc13c
TI
1369 /* SigmaTel reference board */
1370 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1371 "DFI LanParty", STAC_REF),
577aa2c1
MR
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1373 "DFI LanParty", STAC_REF),
e7377071 1374 /* Dell laptops have BIOS problem */
dfe495d0
TI
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1376 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI
1378 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1380 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1382 "unknown Dell", STAC_9200_DELL_D22),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1384 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI
1386 "Dell Latitude D620", STAC_9200_DELL_M22),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1388 "unknown Dell", STAC_9200_DELL_D23),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1390 "unknown Dell", STAC_9200_DELL_D23),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1392 "unknown Dell", STAC_9200_DELL_M22),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1394 "unknown Dell", STAC_9200_DELL_M24),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1396 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1398 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1400 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1402 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1404 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI
1406 "Dell Precision M90", STAC_9200_DELL_M23),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1408 "unknown Dell", STAC_9200_DELL_M22),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1410 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1412 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI
1414 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1416 "unknown Dell", STAC_9200_DELL_D23),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1418 "unknown Dell", STAC_9200_DELL_D23),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1420 "unknown Dell", STAC_9200_DELL_D21),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1422 "unknown Dell", STAC_9200_DELL_D23),
1423 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1424 "unknown Dell", STAC_9200_DELL_D21),
1425 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1426 "unknown Dell", STAC_9200_DELL_M25),
1427 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1428 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1429 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI
1430 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1431 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1432 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1433 /* Panasonic */
117f257d 1434 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7 1435 /* Gateway machines needs EAPD to be set on resume */
58eec423
MCC
1436 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1437 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1438 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
bf277785
TD
1439 /* OQO Mobile */
1440 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP
1441 {} /* terminator */
1442};
1443
2b63536f 1444static const unsigned int ref925x_pin_configs[8] = {
8e21c34c 1445 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1446 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD
1447};
1448
2b63536f 1449static const unsigned int stac925xM1_pin_configs[8] = {
9cb36c2a
MCC
1450 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1451 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
8e21c34c
TD
1452};
1453
2b63536f 1454static const unsigned int stac925xM1_2_pin_configs[8] = {
9cb36c2a
MCC
1455 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1456 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1457};
58eec423 1458
2b63536f 1459static const unsigned int stac925xM2_pin_configs[8] = {
9cb36c2a
MCC
1460 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1461 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
2c11f955
TD
1462};
1463
2b63536f 1464static const unsigned int stac925xM2_2_pin_configs[8] = {
58eec423
MCC
1465 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1466 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1467};
1468
2b63536f 1469static const unsigned int stac925xM3_pin_configs[8] = {
9cb36c2a
MCC
1470 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1471 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
1472};
58eec423 1473
2b63536f 1474static const unsigned int stac925xM5_pin_configs[8] = {
9cb36c2a
MCC
1475 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1476 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
1477};
1478
2b63536f 1479static const unsigned int stac925xM6_pin_configs[8] = {
9cb36c2a
MCC
1480 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
1481 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
8e21c34c
TD
1482};
1483
2b63536f 1484static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
8e21c34c 1485 [STAC_REF] = ref925x_pin_configs,
9cb36c2a
MCC
1486 [STAC_M1] = stac925xM1_pin_configs,
1487 [STAC_M1_2] = stac925xM1_2_pin_configs,
1488 [STAC_M2] = stac925xM2_pin_configs,
8e21c34c 1489 [STAC_M2_2] = stac925xM2_2_pin_configs,
9cb36c2a
MCC
1490 [STAC_M3] = stac925xM3_pin_configs,
1491 [STAC_M5] = stac925xM5_pin_configs,
1492 [STAC_M6] = stac925xM6_pin_configs,
8e21c34c
TD
1493};
1494
ea734963 1495static const char * const stac925x_models[STAC_925x_MODELS] = {
1607b8ea 1496 [STAC_925x_AUTO] = "auto",
8e21c34c 1497 [STAC_REF] = "ref",
9cb36c2a
MCC
1498 [STAC_M1] = "m1",
1499 [STAC_M1_2] = "m1-2",
1500 [STAC_M2] = "m2",
8e21c34c 1501 [STAC_M2_2] = "m2-2",
9cb36c2a
MCC
1502 [STAC_M3] = "m3",
1503 [STAC_M5] = "m5",
1504 [STAC_M6] = "m6",
8e21c34c
TD
1505};
1506
2b63536f 1507static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
58eec423
MCC
1508 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1509 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1510 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1511 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
9cb36c2a 1512 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
9cb36c2a
MCC
1513 /* Not sure about the brand name for those */
1514 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1515 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1516 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1517 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
9cb36c2a 1518 {} /* terminator */
8e21c34c
TD
1519};
1520
2b63536f 1521static const struct snd_pci_quirk stac925x_cfg_tbl[] = {
8e21c34c
TD
1522 /* SigmaTel reference board */
1523 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
577aa2c1 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
2c11f955 1525 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
9cb36c2a
MCC
1526
1527 /* Default table for unknown ID */
1528 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1529
8e21c34c
TD
1530 {} /* terminator */
1531};
1532
2b63536f 1533static const unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR
1534 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1535 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1536 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR
1537 0x01452050,
1538};
1539
2b63536f 1540static const unsigned int dell_m6_pin_configs[13] = {
a7662640 1541 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1542 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR
1543 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1544 0x4f0000f0,
e1f0d669
MR
1545};
1546
2b63536f 1547static const unsigned int alienware_m17x_pin_configs[13] = {
842ae638
TI
1548 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
1549 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
1550 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1551 0x904601b0,
1552};
1553
2b63536f 1554static const unsigned int intel_dg45id_pin_configs[13] = {
52dc4386 1555 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
4d26f446 1556 0x01A19250, 0x01011212, 0x01016211
52dc4386
AF
1557};
1558
2b63536f 1559static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1560 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI
1561 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1562 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1563 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1564 [STAC_DELL_EQ] = dell_m6_pin_configs,
842ae638 1565 [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
52dc4386 1566 [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
e1f0d669
MR
1567};
1568
ea734963 1569static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1607b8ea 1570 [STAC_92HD73XX_AUTO] = "auto",
9e43f0de 1571 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1572 [STAC_92HD73XX_REF] = "ref",
ae709440 1573 [STAC_92HD73XX_INTEL] = "intel",
661cd8fb
TI
1574 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1575 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1576 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1577 [STAC_DELL_EQ] = "dell-eq",
842ae638 1578 [STAC_ALIENWARE_M17X] = "alienware",
e1f0d669
MR
1579};
1580
2b63536f 1581static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
e1f0d669
MR
1582 /* SigmaTel reference board */
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640 1584 "DFI LanParty", STAC_92HD73XX_REF),
577aa2c1
MR
1585 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1586 "DFI LanParty", STAC_92HD73XX_REF),
ae709440
WF
1587 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1588 "Intel DG45ID", STAC_92HD73XX_INTEL),
1589 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1590 "Intel DG45FC", STAC_92HD73XX_INTEL),
a7662640 1591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1592 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1594 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1596 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1598 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1600 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1602 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI
1604 "unknown Dell", STAC_DELL_M6_DMIC),
1605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1606 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1608 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS
1609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1610 "Dell Studio 17", STAC_DELL_M6_DMIC),
626f5cef
TI
1611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1612 "Dell Studio 1555", STAC_DELL_M6_DMIC),
8ef5837a
DB
1613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1614 "Dell Studio 1557", STAC_DELL_M6_DMIC),
aac78daf 1615 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
ffe535ed 1616 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
5c1bccf6 1617 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
e033ebfb 1618 "Dell Studio 1558", STAC_DELL_M6_DMIC),
e1f0d669
MR
1619 {} /* terminator */
1620};
1621
2b63536f 1622static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
842ae638
TI
1623 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1624 "Alienware M17x", STAC_ALIENWARE_M17X),
0defe09c
DC
1625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1626 "Alienware M17x", STAC_ALIENWARE_M17X),
dbd1b547 1627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
b9ecc4ee 1628 "Alienware M17x R3", STAC_DELL_EQ),
842ae638
TI
1629 {} /* terminator */
1630};
1631
2b63536f 1632static const unsigned int ref92hd83xxx_pin_configs[10] = {
d0513fc6
MR
1633 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1634 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
d0513fc6
MR
1635 0x01451160, 0x98560170,
1636};
1637
2b63536f 1638static const unsigned int dell_s14_pin_configs[10] = {
69b5655a
TI
1639 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
1640 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
8bb0ac55
MR
1641 0x40f000f0, 0x40f000f0,
1642};
1643
f7f9bdfa
JW
1644static const unsigned int dell_vostro_3500_pin_configs[10] = {
1645 0x02a11020, 0x0221101f, 0x400000f0, 0x90170110,
1646 0x400000f1, 0x400000f2, 0x400000f3, 0x90a60160,
1647 0x400000f4, 0x400000f5,
1648};
1649
2b63536f 1650static const unsigned int hp_dv7_4000_pin_configs[10] = {
48315590
SE
1651 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110,
1652 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140,
1653 0x40f000f0, 0x40f000f0,
1654};
1655
5556e147
VK
1656static const unsigned int hp_zephyr_pin_configs[10] = {
1657 0x01813050, 0x0421201f, 0x04a1205e, 0x96130310,
1658 0x96130310, 0x0101401f, 0x1111611f, 0xd5a30130,
1659 0, 0,
1660};
1661
0c27c180
VK
1662static const unsigned int hp_cNB11_intquad_pin_configs[10] = {
1663 0x40f000f0, 0x0221101f, 0x02a11020, 0x92170110,
1664 0x40f000f0, 0x92170110, 0x40f000f0, 0xd5a30130,
1665 0x40f000f0, 0x40f000f0,
1666};
1667
2b63536f 1668static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
d0513fc6 1669 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
32ed3f46 1670 [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
8bb0ac55 1671 [STAC_DELL_S14] = dell_s14_pin_configs,
f7f9bdfa 1672 [STAC_DELL_VOSTRO_3500] = dell_vostro_3500_pin_configs,
0c27c180 1673 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = hp_cNB11_intquad_pin_configs,
48315590 1674 [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs,
5556e147 1675 [STAC_HP_ZEPHYR] = hp_zephyr_pin_configs,
d0513fc6
MR
1676};
1677
ea734963 1678static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1607b8ea 1679 [STAC_92HD83XXX_AUTO] = "auto",
d0513fc6 1680 [STAC_92HD83XXX_REF] = "ref",
32ed3f46 1681 [STAC_92HD83XXX_PWR_REF] = "mic-ref",
8bb0ac55 1682 [STAC_DELL_S14] = "dell-s14",
f7f9bdfa 1683 [STAC_DELL_VOSTRO_3500] = "dell-vostro-3500",
0c27c180 1684 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = "hp_cNB11_intquad",
48315590 1685 [STAC_HP_DV7_4000] = "hp-dv7-4000",
5556e147 1686 [STAC_HP_ZEPHYR] = "hp-zephyr",
a3e19973 1687 [STAC_92HD83XXX_HP_LED] = "hp-led",
ff8a1e27 1688 [STAC_92HD83XXX_HP_INV_LED] = "hp-inv-led",
62cbde18 1689 [STAC_92HD83XXX_HP_MIC_LED] = "hp-mic-led",
8d032a8f 1690 [STAC_92HD83XXX_HEADSET_JACK] = "headset-jack",
d0513fc6
MR
1691};
1692
2b63536f 1693static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
d0513fc6
MR
1694 /* SigmaTel reference board */
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
f9d088b2 1696 "DFI LanParty", STAC_92HD83XXX_REF),
577aa2c1
MR
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1698 "DFI LanParty", STAC_92HD83XXX_REF),
8bb0ac55
MR
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
1700 "unknown Dell", STAC_DELL_S14),
8d032a8f
DH
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
1702 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
1703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
1704 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
1705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
1706 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
1707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
1708 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
1710 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
1711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
1712 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
1713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
1714 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
1715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
1716 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
1717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
1718 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
f7f9bdfa
JW
1719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
1720 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
0c27c180
VK
1721 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
1722 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1723 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
1724 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1725 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
1726 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1727 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
8ae5865e 1728 "HP Pavilion dv7", STAC_HP_DV7_4000),
0c27c180
VK
1729 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
1730 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1731 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
1732 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
62cbde18
TI
1733 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
1734 "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
0c27c180
VK
1735 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
1736 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1737 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
1738 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1739 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
1740 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1741 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
1742 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1743 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
1744 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1745 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
1746 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1747 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
1748 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1749 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
1750 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1751 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
1752 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
1754 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
1756 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
1758 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1759 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
1760 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
1761 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
1762 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
5556e147
VK
1763 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1764 "HP", STAC_HP_ZEPHYR),
a3e19973
TI
1765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
1766 "HP Mini", STAC_92HD83XXX_HP_LED),
5afc13af
GMDV
1767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
1768 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
5556e147
VK
1769 {} /* terminator */
1770};
1771
1772static const struct snd_pci_quirk stac92hd83xxx_codec_id_cfg_tbl[] = {
1773 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
1774 "HP", STAC_HP_ZEPHYR),
574f3c4f 1775 {} /* terminator */
d0513fc6
MR
1776};
1777
2b63536f 1778static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
e035b841 1779 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1780 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
616f89e7
HRK
1781 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
1782 0x00000000
e035b841
MR
1783};
1784
2b63536f 1785static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640 1786 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1787 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1788 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
1789 0x00000000
a7662640
MR
1790};
1791
2b63536f 1792static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
a7662640
MR
1793 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1794 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
616f89e7
HRK
1795 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1796 0x00000000
a7662640
MR
1797};
1798
2b63536f 1799static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
3a7abfd2
MR
1800 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1801 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
616f89e7
HRK
1802 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
1803 0x00000000
3a7abfd2
MR
1804};
1805
2b63536f 1806static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
e035b841 1807 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR
1808 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1809 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1810 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1811 [STAC_HP_M4] = NULL,
2a6ce6e5 1812 [STAC_HP_DV4] = NULL,
1b0652eb 1813 [STAC_HP_DV5] = NULL,
ae6241fb 1814 [STAC_HP_HDX] = NULL,
514bf54c 1815 [STAC_HP_DV4_1222NR] = NULL,
e035b841
MR
1816};
1817
ea734963 1818static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1607b8ea 1819 [STAC_92HD71BXX_AUTO] = "auto",
e035b841 1820 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR
1821 [STAC_DELL_M4_1] = "dell-m4-1",
1822 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1823 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1824 [STAC_HP_M4] = "hp-m4",
2a6ce6e5 1825 [STAC_HP_DV4] = "hp-dv4",
1b0652eb 1826 [STAC_HP_DV5] = "hp-dv5",
ae6241fb 1827 [STAC_HP_HDX] = "hp-hdx",
514bf54c 1828 [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
e035b841
MR
1829};
1830
2b63536f 1831static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
e035b841
MR
1832 /* SigmaTel reference board */
1833 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1834 "DFI LanParty", STAC_92HD71BXX_REF),
577aa2c1
MR
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1836 "DFI LanParty", STAC_92HD71BXX_REF),
514bf54c
JG
1837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
1838 "HP dv4-1222nr", STAC_HP_DV4_1222NR),
5bdaaada
VK
1839 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
1840 "HP", STAC_HP_DV5),
58d8395b
TI
1841 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
1842 "HP", STAC_HP_DV5),
2ae466f8 1843 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2a6ce6e5 1844 "HP dv4-7", STAC_HP_DV4),
2ae466f8
TI
1845 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
1846 "HP dv4-7", STAC_HP_DV5),
6fce61ae
TI
1847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
1848 "HP HDX", STAC_HP_HDX), /* HDX18 */
9a9e2359 1849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2ae466f8 1850 "HP mini 1000", STAC_HP_M4),
ae6241fb 1851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
6fce61ae 1852 "HP HDX", STAC_HP_HDX), /* HDX16 */
6e34c033
TI
1853 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
1854 "HP dv6", STAC_HP_DV5),
e3d2530a
KG
1855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
1856 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
9b2167d5
LY
1857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
1858 "HP DV6", STAC_HP_DV5),
1972d025
TI
1859 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
1860 "HP", STAC_HP_DV5),
a7662640
MR
1861 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1862 "unknown Dell", STAC_DELL_M4_1),
1863 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1864 "unknown Dell", STAC_DELL_M4_1),
1865 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1866 "unknown Dell", STAC_DELL_M4_1),
1867 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1868 "unknown Dell", STAC_DELL_M4_1),
1869 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1870 "unknown Dell", STAC_DELL_M4_1),
1871 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1872 "unknown Dell", STAC_DELL_M4_1),
1873 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1874 "unknown Dell", STAC_DELL_M4_1),
1875 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1876 "unknown Dell", STAC_DELL_M4_2),
1877 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1878 "unknown Dell", STAC_DELL_M4_2),
1879 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1880 "unknown Dell", STAC_DELL_M4_2),
1881 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1882 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR
1883 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1884 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR
1885 {} /* terminator */
1886};
1887
2b63536f 1888static const unsigned int ref922x_pin_configs[10] = {
403d1944
MP
1889 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1890 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M
1891 0x40000100, 0x40000100,
1892};
1893
dfe495d0
TI
1894/*
1895 STAC 922X pin configs for
1896 102801A7
1897 102801AB
1898 102801A9
1899 102801D1
1900 102801D2
1901*/
2b63536f 1902static const unsigned int dell_922x_d81_pin_configs[10] = {
dfe495d0
TI
1903 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1904 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1905 0x01813122, 0x400001f2,
1906};
1907
1908/*
1909 STAC 922X pin configs for
1910 102801AC
1911 102801D0
1912*/
2b63536f 1913static const unsigned int dell_922x_d82_pin_configs[10] = {
dfe495d0
TI
1914 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1915 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1916 0x01813122, 0x400001f1,
1917};
1918
1919/*
1920 STAC 922X pin configs for
1921 102801BF
1922*/
2b63536f 1923static const unsigned int dell_922x_m81_pin_configs[10] = {
dfe495d0
TI
1924 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1925 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1926 0x40C003f1, 0x405003f0,
1927};
1928
1929/*
1930 STAC 9221 A1 pin configs for
1931 102801D7 (Dell XPS M1210)
1932*/
2b63536f 1933static const unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ
1934 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1935 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI
1936 0x508003f3, 0x405003f4,
1937};
1938
2b63536f 1939static const unsigned int d945gtp3_pin_configs[10] = {
869264c4 1940 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP
1941 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1942 0x02a19120, 0x40000100,
1943};
1944
2b63536f 1945static const unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP
1946 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1947 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP
1948 0x02a19320, 0x40000100,
1949};
1950
2b63536f 1951static const unsigned int intel_mac_v1_pin_configs[10] = {
5d5d3bc3
IZ
1952 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1953 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1954 0x400000fc, 0x400000fb,
1955};
1956
2b63536f 1957static const unsigned int intel_mac_v2_pin_configs[10] = {
5d5d3bc3
IZ
1958 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1959 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1960 0x400000fc, 0x400000fb,
6f0778d8
NB
1961};
1962
2b63536f 1963static const unsigned int intel_mac_v3_pin_configs[10] = {
5d5d3bc3
IZ
1964 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1965 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI
1966 0x400000fc, 0x400000fb,
1967};
1968
2b63536f 1969static const unsigned int intel_mac_v4_pin_configs[10] = {
5d5d3bc3
IZ
1970 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1971 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF
1972 0x400000fc, 0x400000fb,
1973};
1974
2b63536f 1975static const unsigned int intel_mac_v5_pin_configs[10] = {
5d5d3bc3
IZ
1976 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1977 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1978 0x400000fc, 0x400000fb,
0dae0f83
TI
1979};
1980
2b63536f 1981static const unsigned int ecs202_pin_configs[10] = {
8c650087
MCC
1982 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1983 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1984 0x9037012e, 0x40e000f2,
1985};
76c08828 1986
2b63536f 1987static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1988 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI
1989 [STAC_D945GTP3] = d945gtp3_pin_configs,
1990 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ
1991 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1992 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1993 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1994 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1995 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1996 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1997 /* for backward compatibility */
5d5d3bc3
IZ
1998 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1999 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
2000 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
2001 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
2002 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
2003 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 2004 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI
2005 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
2006 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
2007 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
2008 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP
2009};
2010
ea734963 2011static const char * const stac922x_models[STAC_922X_MODELS] = {
1607b8ea 2012 [STAC_922X_AUTO] = "auto",
f5fcc13c
TI
2013 [STAC_D945_REF] = "ref",
2014 [STAC_D945GTP5] = "5stack",
2015 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ
2016 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
2017 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
2018 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
2019 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
2020 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 2021 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 2022 /* for backward compatibility */
f5fcc13c 2023 [STAC_MACMINI] = "macmini",
3fc24d85 2024 [STAC_MACBOOK] = "macbook",
6f0778d8
NB
2025 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
2026 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 2027 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 2028 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 2029 [STAC_ECS_202] = "ecs202",
dfe495d0
TI
2030 [STAC_922X_DELL_D81] = "dell-d81",
2031 [STAC_922X_DELL_D82] = "dell-d82",
2032 [STAC_922X_DELL_M81] = "dell-m81",
2033 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI
2034};
2035
2b63536f 2036static const struct snd_pci_quirk stac922x_cfg_tbl[] = {
f5fcc13c
TI
2037 /* SigmaTel reference board */
2038 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2039 "DFI LanParty", STAC_D945_REF),
577aa2c1
MR
2040 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2041 "DFI LanParty", STAC_D945_REF),
f5fcc13c
TI
2042 /* Intel 945G based systems */
2043 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2044 "Intel D945G", STAC_D945GTP3),
2045 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2046 "Intel D945G", STAC_D945GTP3),
2047 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2048 "Intel D945G", STAC_D945GTP3),
2049 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2050 "Intel D945G", STAC_D945GTP3),
2051 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2052 "Intel D945G", STAC_D945GTP3),
2053 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2054 "Intel D945G", STAC_D945GTP3),
2055 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2056 "Intel D945G", STAC_D945GTP3),
2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2058 "Intel D945G", STAC_D945GTP3),
2059 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2060 "Intel D945G", STAC_D945GTP3),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2062 "Intel D945G", STAC_D945GTP3),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2064 "Intel D945G", STAC_D945GTP3),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2066 "Intel D945G", STAC_D945GTP3),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2068 "Intel D945G", STAC_D945GTP3),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2070 "Intel D945G", STAC_D945GTP3),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2072 "Intel D945G", STAC_D945GTP3),
2073 /* Intel D945G 5-stack systems */
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2075 "Intel D945G", STAC_D945GTP5),
2076 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2077 "Intel D945G", STAC_D945GTP5),
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2079 "Intel D945G", STAC_D945GTP5),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2081 "Intel D945G", STAC_D945GTP5),
2082 /* Intel 945P based systems */
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2084 "Intel D945P", STAC_D945GTP3),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2086 "Intel D945P", STAC_D945GTP3),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2088 "Intel D945P", STAC_D945GTP3),
2089 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2090 "Intel D945P", STAC_D945GTP3),
2091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2092 "Intel D945P", STAC_D945GTP3),
2093 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2094 "Intel D945P", STAC_D945GTP5),
8056d47e
TI
2095 /* other intel */
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2097 "Intel D945", STAC_D945_REF),
f5fcc13c 2098 /* other systems */
536319af 2099 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 2100 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 2101 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI
2102 /* Dell systems */
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2104 "unknown Dell", STAC_922X_DELL_D81),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2106 "unknown Dell", STAC_922X_DELL_D81),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2108 "unknown Dell", STAC_922X_DELL_D81),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2110 "unknown Dell", STAC_922X_DELL_D82),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2112 "unknown Dell", STAC_922X_DELL_M81),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2114 "unknown Dell", STAC_922X_DELL_D82),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2116 "unknown Dell", STAC_922X_DELL_D81),
2117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2118 "unknown Dell", STAC_922X_DELL_D81),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2120 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087 2121 /* ECS/PC Chips boards */
dea0a509 2122 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
8663ae55 2123 "ECS/PC chips", STAC_ECS_202),
403d1944
MP
2124 {} /* terminator */
2125};
2126
2b63536f 2127static const unsigned int ref927x_pin_configs[14] = {
93ed1503
TD
2128 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2129 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2130 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2131 0x01c42190, 0x40000100,
3cc08dc6
MP
2132};
2133
2b63536f 2134static const unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD
2135 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2136 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2137 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2138 0x40000100, 0x40000100
2139};
2140
2b63536f 2141static const unsigned int d965_5st_pin_configs[14] = {
93ed1503
TD
2142 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2143 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2144 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2145 0x40000100, 0x40000100
2146};
2147
2b63536f 2148static const unsigned int d965_5st_no_fp_pin_configs[14] = {
679d92ed
TI
2149 0x40000100, 0x40000100, 0x0181304e, 0x01014010,
2150 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2151 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2152 0x40000100, 0x40000100
2153};
2154
2b63536f 2155static const unsigned int dell_3st_pin_configs[14] = {
4ff076e5
TD
2156 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2157 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2158 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD
2159 0x40c003fc, 0x40000100
2160};
2161
2b63536f 2162static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2163 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR
2164 [STAC_D965_REF] = ref927x_pin_configs,
2165 [STAC_D965_3ST] = d965_3st_pin_configs,
2166 [STAC_D965_5ST] = d965_5st_pin_configs,
679d92ed 2167 [STAC_D965_5ST_NO_FP] = d965_5st_no_fp_pin_configs,
8e9068b1
MR
2168 [STAC_DELL_3ST] = dell_3st_pin_configs,
2169 [STAC_DELL_BIOS] = NULL,
54930531 2170 [STAC_927X_VOLKNOB] = NULL,
3cc08dc6
MP
2171};
2172
ea734963 2173static const char * const stac927x_models[STAC_927X_MODELS] = {
1607b8ea 2174 [STAC_927X_AUTO] = "auto",
e28d8322 2175 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR
2176 [STAC_D965_REF] = "ref",
2177 [STAC_D965_3ST] = "3stack",
2178 [STAC_D965_5ST] = "5stack",
679d92ed 2179 [STAC_D965_5ST_NO_FP] = "5stack-no-fp",
8e9068b1
MR
2180 [STAC_DELL_3ST] = "dell-3stack",
2181 [STAC_DELL_BIOS] = "dell-bios",
54930531 2182 [STAC_927X_VOLKNOB] = "volknob",
f5fcc13c
TI
2183};
2184
2b63536f 2185static const struct snd_pci_quirk stac927x_cfg_tbl[] = {
f5fcc13c
TI
2186 /* SigmaTel reference board */
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2188 "DFI LanParty", STAC_D965_REF),
577aa2c1
MR
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2190 "DFI LanParty", STAC_D965_REF),
81d3dbde 2191 /* Intel 946 based systems */
f5fcc13c
TI
2192 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2193 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2194 /* 965 based 3 stack systems */
dea0a509
TI
2195 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
2196 "Intel D965", STAC_D965_3ST),
2197 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
2198 "Intel D965", STAC_D965_3ST),
4ff076e5 2199 /* Dell 3 stack systems */
dfe495d0 2200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD
2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2203 /* Dell 3 stack systems with verb table in BIOS */
2f32d909 2204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
66668b6f 2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
2f32d909 2206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
84d3dc20 2208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
8e9068b1
MR
2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2213 /* 965 based 5 stack systems */
dea0a509
TI
2214 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
2215 "Intel D965", STAC_D965_5ST),
2216 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
2217 "Intel D965", STAC_D965_5ST),
54930531
TI
2218 /* volume-knob fixes */
2219 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3cc08dc6
MP
2220 {} /* terminator */
2221};
2222
2b63536f 2223static const unsigned int ref9205_pin_configs[12] = {
f3302a59 2224 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2225 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2226 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP
2227};
2228
dfe495d0
TI
2229/*
2230 STAC 9205 pin configs for
2231 102801F1
2232 102801F2
2233 102801FC
2234 102801FD
2235 10280204
2236 1028021F
3fa2ef74 2237 10280228 (Dell Vostro 1500)
95e70e87 2238 10280229 (Dell Vostro 1700)
dfe495d0 2239*/
2b63536f 2240static const unsigned int dell_9205_m42_pin_configs[12] = {
dfe495d0
TI
2241 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2242 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2243 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2244};
2245
2246/*
2247 STAC 9205 pin configs for
2248 102801F9
2249 102801FA
2250 102801FE
2251 102801FF (Dell Precision M4300)
2252 10280206
2253 10280200
2254 10280201
2255*/
2b63536f 2256static const unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD
2257 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2258 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2259 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2260};
2261
2b63536f 2262static const unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD
2263 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2264 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2265 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2266};
2267
2b63536f 2268static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2269 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI
2270 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2271 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2272 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
d9a4268e 2273 [STAC_9205_EAPD] = NULL,
f3302a59
MP
2274};
2275
ea734963 2276static const char * const stac9205_models[STAC_9205_MODELS] = {
1607b8ea 2277 [STAC_9205_AUTO] = "auto",
f5fcc13c 2278 [STAC_9205_REF] = "ref",
dfe495d0 2279 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD
2280 [STAC_9205_DELL_M43] = "dell-m43",
2281 [STAC_9205_DELL_M44] = "dell-m44",
d9a4268e 2282 [STAC_9205_EAPD] = "eapd",
f5fcc13c
TI
2283};
2284
2b63536f 2285static const struct snd_pci_quirk stac9205_cfg_tbl[] = {
f5fcc13c
TI
2286 /* SigmaTel reference board */
2287 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2288 "DFI LanParty", STAC_9205_REF),
02358fcf
HRK
2289 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
2290 "SigmaTel", STAC_9205_REF),
577aa2c1
MR
2291 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2292 "DFI LanParty", STAC_9205_REF),
d9a4268e 2293 /* Dell */
dfe495d0
TI
2294 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2295 "unknown Dell", STAC_9205_DELL_M42),
2296 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2297 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2298 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2299 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2300 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2301 "Dell Precision", STAC_9205_DELL_M43),
2302 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2303 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI
2304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2305 "unknown Dell", STAC_9205_DELL_M42),
2306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2307 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD
2308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2309 "Dell Precision", STAC_9205_DELL_M43),
2310 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2311 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI
2312 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2313 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI
2314 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2315 "Dell Precision", STAC_9205_DELL_M43),
2316 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2317 "Dell Precision", STAC_9205_DELL_M43),
2318 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2319 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD
2320 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2321 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR
2322 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2323 "Dell Vostro 1500", STAC_9205_DELL_M42),
95e70e87
AA
2324 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
2325 "Dell Vostro 1700", STAC_9205_DELL_M42),
d9a4268e 2326 /* Gateway */
42b95f0c 2327 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
d9a4268e 2328 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
f3302a59
MP
2329 {} /* terminator */
2330};
2331
330ee995 2332static void stac92xx_set_config_regs(struct hda_codec *codec,
2b63536f 2333 const unsigned int *pincfgs)
11b44bbd
RF
2334{
2335 int i;
2336 struct sigmatel_spec *spec = codec->spec;
11b44bbd 2337
330ee995
TI
2338 if (!pincfgs)
2339 return;
11b44bbd 2340
87d48363 2341 for (i = 0; i < spec->num_pins; i++)
330ee995
TI
2342 if (spec->pin_nids[i] && pincfgs[i])
2343 snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
2344 pincfgs[i]);
af9f341a
TI
2345}
2346
dabbed6f 2347/*
c7d4b2fa 2348 * Analog playback callbacks
dabbed6f 2349 */
c7d4b2fa
M
2350static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2351 struct hda_codec *codec,
c8b6bf9b 2352 struct snd_pcm_substream *substream)
2f2f4251 2353{
dabbed6f 2354 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR
2355 if (spec->stream_delay)
2356 msleep(spec->stream_delay);
9a08160b
TI
2357 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2358 hinfo);
2f2f4251
M
2359}
2360
2f2f4251
M
2361static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2362 struct hda_codec *codec,
2363 unsigned int stream_tag,
2364 unsigned int format,
c8b6bf9b 2365 struct snd_pcm_substream *substream)
2f2f4251
M
2366{
2367 struct sigmatel_spec *spec = codec->spec;
403d1944 2368 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M
2369}
2370
2371static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2372 struct hda_codec *codec,
c8b6bf9b 2373 struct snd_pcm_substream *substream)
2f2f4251
M
2374{
2375 struct sigmatel_spec *spec = codec->spec;
2376 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2377}
2378
dabbed6f
M
2379/*
2380 * Digital playback callbacks
2381 */
2382static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2383 struct hda_codec *codec,
c8b6bf9b 2384 struct snd_pcm_substream *substream)
dabbed6f
M
2385{
2386 struct sigmatel_spec *spec = codec->spec;
2387 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2388}
2389
2390static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2391 struct hda_codec *codec,
c8b6bf9b 2392 struct snd_pcm_substream *substream)
dabbed6f
M
2393{
2394 struct sigmatel_spec *spec = codec->spec;
2395 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2396}
2397
6b97eb45
TI
2398static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2399 struct hda_codec *codec,
2400 unsigned int stream_tag,
2401 unsigned int format,
2402 struct snd_pcm_substream *substream)
2403{
2404 struct sigmatel_spec *spec = codec->spec;
2405 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2406 stream_tag, format, substream);
2407}
2408
9411e21c
TI
2409static int stac92xx_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2410 struct hda_codec *codec,
2411 struct snd_pcm_substream *substream)
2412{
2413 struct sigmatel_spec *spec = codec->spec;
2414 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
2415}
2416
dabbed6f 2417
2f2f4251
M
2418/*
2419 * Analog capture callbacks
2420 */
2421static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2422 struct hda_codec *codec,
2423 unsigned int stream_tag,
2424 unsigned int format,
c8b6bf9b 2425 struct snd_pcm_substream *substream)
2f2f4251
M
2426{
2427 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2428 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2429
8daaaa97
MR
2430 if (spec->powerdown_adcs) {
2431 msleep(40);
8c2f767b 2432 snd_hda_codec_write(codec, nid, 0,
8daaaa97
MR
2433 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2434 }
2435 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M
2436 return 0;
2437}
2438
2439static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2440 struct hda_codec *codec,
c8b6bf9b 2441 struct snd_pcm_substream *substream)
2f2f4251
M
2442{
2443 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2444 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2445
8daaaa97
MR
2446 snd_hda_codec_cleanup_stream(codec, nid);
2447 if (spec->powerdown_adcs)
8c2f767b 2448 snd_hda_codec_write(codec, nid, 0,
8daaaa97 2449 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M
2450 return 0;
2451}
2452
2b63536f 2453static const struct hda_pcm_stream stac92xx_pcm_digital_playback = {
dabbed6f
M
2454 .substreams = 1,
2455 .channels_min = 2,
2456 .channels_max = 2,
2457 /* NID is set in stac92xx_build_pcms */
2458 .ops = {
2459 .open = stac92xx_dig_playback_pcm_open,
6b97eb45 2460 .close = stac92xx_dig_playback_pcm_close,
9411e21c
TI
2461 .prepare = stac92xx_dig_playback_pcm_prepare,
2462 .cleanup = stac92xx_dig_playback_pcm_cleanup
dabbed6f
M
2463 },
2464};
2465
2b63536f 2466static const struct hda_pcm_stream stac92xx_pcm_digital_capture = {
dabbed6f
M
2467 .substreams = 1,
2468 .channels_min = 2,
2469 .channels_max = 2,
2470 /* NID is set in stac92xx_build_pcms */
2471};
2472
2b63536f 2473static const struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2f2f4251
M
2474 .substreams = 1,
2475 .channels_min = 2,
c7d4b2fa 2476 .channels_max = 8,
2f2f4251
M
2477 .nid = 0x02, /* NID to query formats and rates */
2478 .ops = {
2479 .open = stac92xx_playback_pcm_open,
2480 .prepare = stac92xx_playback_pcm_prepare,
2481 .cleanup = stac92xx_playback_pcm_cleanup
2482 },
2483};
2484
2b63536f 2485static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
3cc08dc6
MP
2486 .substreams = 1,
2487 .channels_min = 2,
2488 .channels_max = 2,
2489 .nid = 0x06, /* NID to query formats and rates */
2490 .ops = {
2491 .open = stac92xx_playback_pcm_open,
2492 .prepare = stac92xx_playback_pcm_prepare,
2493 .cleanup = stac92xx_playback_pcm_cleanup
2494 },
2495};
2496
2b63536f 2497static const struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M
2498 .channels_min = 2,
2499 .channels_max = 2,
9e05b7a3 2500 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M
2501 .ops = {
2502 .prepare = stac92xx_capture_pcm_prepare,
2503 .cleanup = stac92xx_capture_pcm_cleanup
2504 },
2505};
2506
2507static int stac92xx_build_pcms(struct hda_codec *codec)
2508{
2509 struct sigmatel_spec *spec = codec->spec;
2510 struct hda_pcm *info = spec->pcm_rec;
2511
2512 codec->num_pcms = 1;
2513 codec->pcm_info = info;
2514
c7d4b2fa 2515 info->name = "STAC92xx Analog";
2f2f4251 2516 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
00a602db
TI
2517 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid =
2518 spec->multiout.dac_nids[0];
ee81abb6
TI
2519 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2520 spec->autocfg.line_outs == 2)
2521 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap =
2522 snd_pcm_2_1_chmaps;
2523
2f2f4251 2524 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2525 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2526 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP
2527
2528 if (spec->alt_switch) {
2529 codec->num_pcms++;
2530 info++;
2531 info->name = "STAC92xx Analog Alt";
2532 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2533 }
2f2f4251 2534
dabbed6f
M
2535 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2536 codec->num_pcms++;
2537 info++;
2538 info->name = "STAC92xx Digital";
0852d7a6 2539 info->pcm_type = spec->autocfg.dig_out_type[0];
dabbed6f
M
2540 if (spec->multiout.dig_out_nid) {
2541 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2542 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2543 }
2544 if (spec->dig_in_nid) {
2545 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2546 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2547 }
2548 }
2549
2f2f4251
M
2550 return 0;
2551}
2552
403d1944
MP
2553static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2554
2555{
cdd03ced 2556 snd_hda_set_pin_ctl_cache(codec, nid, pin_type);
403d1944
MP
2557}
2558
7c2ba97b
MR
2559#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2560
2561static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2562 struct snd_ctl_elem_value *ucontrol)
2563{
2564 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2565 struct sigmatel_spec *spec = codec->spec;
2566
d7a89436 2567 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR
2568 return 0;
2569}
2570
62558ce1 2571static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid);
c6e4c666 2572
7c2ba97b
MR
2573static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2574 struct snd_ctl_elem_value *ucontrol)
2575{
2576 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2577 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI
2578 int nid = kcontrol->private_value;
2579
2580 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b 2581
25985edc 2582 /* check to be sure that the ports are up to date with
7c2ba97b
MR
2583 * switch changes
2584 */
62558ce1 2585 stac_issue_unsol_event(codec, nid);
7c2ba97b
MR
2586
2587 return 1;
2588}
2589
7c922de7
NL
2590static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol,
2591 struct snd_ctl_elem_info *uinfo)
2592{
2593 int i;
2b63536f 2594 static const char * const texts[] = {
7c922de7
NL
2595 "Mic In", "Line In", "Line Out"
2596 };
2597
2598 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2599 struct sigmatel_spec *spec = codec->spec;
2600 hda_nid_t nid = kcontrol->private_value;
2601
2602 if (nid == spec->mic_switch || nid == spec->line_switch)
2603 i = 3;
2604 else
2605 i = 2;
2606
2607 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2608 uinfo->value.enumerated.items = i;
2609 uinfo->count = 1;
2610 if (uinfo->value.enumerated.item >= i)
2611 uinfo->value.enumerated.item = i-1;
2612 strcpy(uinfo->value.enumerated.name,
2613 texts[uinfo->value.enumerated.item]);
2614
2615 return 0;
2616}
2617
2618static int stac92xx_dc_bias_get(struct snd_kcontrol *kcontrol,
2619 struct snd_ctl_elem_value *ucontrol)
2620{
2621 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2622 hda_nid_t nid = kcontrol->private_value;
2623 unsigned int vref = stac92xx_vref_get(codec, nid);
2624
4740860b 2625 if (vref == snd_hda_get_default_vref(codec, nid))
7c922de7
NL
2626 ucontrol->value.enumerated.item[0] = 0;
2627 else if (vref == AC_PINCTL_VREF_GRD)
2628 ucontrol->value.enumerated.item[0] = 1;
2629 else if (vref == AC_PINCTL_VREF_HIZ)
2630 ucontrol->value.enumerated.item[0] = 2;
2631
2632 return 0;
2633}
2634
2635static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol,
2636 struct snd_ctl_elem_value *ucontrol)
2637{
2638 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2639 unsigned int new_vref = 0;
b8621516 2640 int error;
7c922de7
NL
2641 hda_nid_t nid = kcontrol->private_value;
2642
2643 if (ucontrol->value.enumerated.item[0] == 0)
4740860b 2644 new_vref = snd_hda_get_default_vref(codec, nid);
7c922de7
NL
2645 else if (ucontrol->value.enumerated.item[0] == 1)
2646 new_vref = AC_PINCTL_VREF_GRD;
2647 else if (ucontrol->value.enumerated.item[0] == 2)
2648 new_vref = AC_PINCTL_VREF_HIZ;
2649 else
2650 return 0;
2651
2652 if (new_vref != stac92xx_vref_get(codec, nid)) {
2653 error = stac92xx_vref_set(codec, nid, new_vref);
2654 return error;
2655 }
2656
2657 return 0;
2658}
2659
2660static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol,
2661 struct snd_ctl_elem_info *uinfo)
2662{
2b63536f 2663 char *texts[2];
7c922de7
NL
2664 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2665 struct sigmatel_spec *spec = codec->spec;
2666
2667 if (kcontrol->private_value == spec->line_switch)
2668 texts[0] = "Line In";
2669 else
2670 texts[0] = "Mic In";
2671 texts[1] = "Line Out";
2672 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2673 uinfo->value.enumerated.items = 2;
2674 uinfo->count = 1;
2675
2676 if (uinfo->value.enumerated.item >= 2)
2677 uinfo->value.enumerated.item = 1;
2678 strcpy(uinfo->value.enumerated.name,
2679 texts[uinfo->value.enumerated.item]);
2680
2681 return 0;
2682}
403d1944
MP
2683
2684static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2685{
2686 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2687 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2688 hda_nid_t nid = kcontrol->private_value;
2689 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
403d1944 2690
7c922de7 2691 ucontrol->value.enumerated.item[0] = spec->io_switch[io_idx];
403d1944
MP
2692 return 0;
2693}
2694
2695static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2696{
2697 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2698 struct sigmatel_spec *spec = codec->spec;
7c922de7
NL
2699 hda_nid_t nid = kcontrol->private_value;
2700 int io_idx = (nid == spec->mic_switch) ? 1 : 0;
2701 unsigned short val = !!ucontrol->value.enumerated.item[0];
403d1944
MP
2702
2703 spec->io_switch[io_idx] = val;
2704
2705 if (val)
2706 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI
2707 else {
2708 unsigned int pinctl = AC_PINCTL_IN_EN;
2709 if (io_idx) /* set VREF for mic */
4740860b 2710 pinctl |= snd_hda_get_default_vref(codec, nid);
c960a03b
TI
2711 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2712 }
40c1d308
JZ
2713
2714 /* check the auto-mute again: we need to mute/unmute the speaker
2715 * appropriately according to the pin direction
2716 */
2717 if (spec->hp_detect)
62558ce1 2718 stac_issue_unsol_event(codec, nid);
40c1d308 2719
403d1944
MP
2720 return 1;
2721}
2722
0fb87bb4
ML
2723#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2724
2725static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2726 struct snd_ctl_elem_value *ucontrol)
2727{
2728 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2729 struct sigmatel_spec *spec = codec->spec;
2730
2731 ucontrol->value.integer.value[0] = spec->clfe_swap;
2732 return 0;
2733}
2734
2735static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2736 struct snd_ctl_elem_value *ucontrol)
2737{
2738 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2739 struct sigmatel_spec *spec = codec->spec;
2740 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2741 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2742
68ea7b2f 2743 if (spec->clfe_swap == val)
0fb87bb4
ML
2744 return 0;
2745
68ea7b2f 2746 spec->clfe_swap = val;
0fb87bb4
ML
2747
2748 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2749 spec->clfe_swap ? 0x4 : 0x0);
2750
2751 return 1;
2752}
2753
7c2ba97b
MR
2754#define STAC_CODEC_HP_SWITCH(xname) \
2755 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2756 .name = xname, \
2757 .index = 0, \
2758 .info = stac92xx_hp_switch_info, \
2759 .get = stac92xx_hp_switch_get, \
2760 .put = stac92xx_hp_switch_put, \
2761 }
2762
403d1944
MP
2763#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2764 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2765 .name = xname, \
2766 .index = 0, \
2767 .info = stac92xx_io_switch_info, \
2768 .get = stac92xx_io_switch_get, \
2769 .put = stac92xx_io_switch_put, \
2770 .private_value = xpval, \
2771 }
2772
0fb87bb4
ML
2773#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2774 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2775 .name = xname, \
2776 .index = 0, \
2777 .info = stac92xx_clfe_switch_info, \
2778 .get = stac92xx_clfe_switch_get, \
2779 .put = stac92xx_clfe_switch_put, \
2780 .private_value = xpval, \
2781 }
403d1944 2782
c7d4b2fa
M
2783enum {
2784 STAC_CTL_WIDGET_VOL,
2785 STAC_CTL_WIDGET_MUTE,
123c07ae 2786 STAC_CTL_WIDGET_MUTE_BEEP,
09a99959 2787 STAC_CTL_WIDGET_MONO_MUX,
7c2ba97b 2788 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2789 STAC_CTL_WIDGET_IO_SWITCH,
2fc99890
NL
2790 STAC_CTL_WIDGET_CLFE_SWITCH,
2791 STAC_CTL_WIDGET_DC_BIAS
c7d4b2fa
M
2792};
2793
2b63536f 2794static const struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M
2795 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2796 HDA_CODEC_MUTE(NULL, 0, 0, 0),
123c07ae 2797 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0),
09a99959 2798 STAC_MONO_MUX,
7c2ba97b 2799 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2800 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2801 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2fc99890 2802 DC_BIAS(NULL, 0, 0),
c7d4b2fa
M
2803};
2804
2805/* add dynamic controls */
e3c75964
TI
2806static struct snd_kcontrol_new *
2807stac_control_new(struct sigmatel_spec *spec,
2b63536f 2808 const struct snd_kcontrol_new *ktemp,
4d02d1b6 2809 const char *name,
5e26dfd0 2810 unsigned int subdev)
c7d4b2fa 2811{
c8b6bf9b 2812 struct snd_kcontrol_new *knew;
c7d4b2fa 2813
603c4019
TI
2814 knew = snd_array_new(&spec->kctls);
2815 if (!knew)
e3c75964 2816 return NULL;
4d4e9bb3 2817 *knew = *ktemp;
82fe0c58 2818 knew->name = kstrdup(name, GFP_KERNEL);
e3c75964
TI
2819 if (!knew->name) {
2820 /* roolback */
2821 memset(knew, 0, sizeof(*knew));
2822 spec->kctls.alloced--;
2823 return NULL;
2824 }
5e26dfd0 2825 knew->subdevice = subdev;
e3c75964
TI
2826 return knew;
2827}
2828
62cbde18
TI
2829static struct snd_kcontrol_new *
2830add_control_temp(struct sigmatel_spec *spec,
2831 const struct snd_kcontrol_new *ktemp,
2832 int idx, const char *name,
2833 unsigned long val)
e3c75964 2834{
4d02d1b6 2835 struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name,
5e26dfd0 2836 HDA_SUBDEV_AMP_FLAG);
e3c75964 2837 if (!knew)
62cbde18 2838 return NULL;
e3c75964 2839 knew->index = idx;
c7d4b2fa 2840 knew->private_value = val;
62cbde18
TI
2841 return knew;
2842}
2843
2844static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2845 const struct snd_kcontrol_new *ktemp,
2846 int idx, const char *name,
2847 unsigned long val)
2848{
2849 return add_control_temp(spec, ktemp, idx, name, val) ? 0 : -ENOMEM;
c7d4b2fa
M
2850}
2851
4d4e9bb3
TI
2852static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2853 int type, int idx, const char *name,
2854 unsigned long val)
2855{
2856 return stac92xx_add_control_temp(spec,
2857 &stac92xx_control_templates[type],
2858 idx, name, val);
2859}
2860
4682eee0
MR
2861
2862/* add dynamic controls */
4d4e9bb3
TI
2863static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2864 const char *name, unsigned long val)
4682eee0
MR
2865{
2866 return stac92xx_add_control_idx(spec, type, 0, name, val);
2867}
2868
2b63536f 2869static const struct snd_kcontrol_new stac_input_src_temp = {
e3c75964
TI
2870 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2871 .name = "Input Source",
2872 .info = stac92xx_mux_enum_info,
2873 .get = stac92xx_mux_enum_get,
2874 .put = stac92xx_mux_enum_put,
2875};
2876
7c922de7
NL
2877static inline int stac92xx_add_jack_mode_control(struct hda_codec *codec,
2878 hda_nid_t nid, int idx)
2879{
2880 int def_conf = snd_hda_codec_get_pincfg(codec, nid);
2881 int control = 0;
2882 struct sigmatel_spec *spec = codec->spec;
2883 char name[22];
2884
99ae28be 2885 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
8d032a8f
DH
2886 if (spec->headset_jack && snd_hda_get_input_pin_attr(def_conf)
2887 != INPUT_PIN_ATTR_DOCK)
2888 return 0;
4740860b 2889 if (snd_hda_get_default_vref(codec, nid) == AC_PINCTL_VREF_GRD
7c922de7
NL
2890 && nid == spec->line_switch)
2891 control = STAC_CTL_WIDGET_IO_SWITCH;
2892 else if (snd_hda_query_pin_caps(codec, nid)
2893 & (AC_PINCAP_VREF_GRD << AC_PINCAP_VREF_SHIFT))
2894 control = STAC_CTL_WIDGET_DC_BIAS;
2895 else if (nid == spec->mic_switch)
2896 control = STAC_CTL_WIDGET_IO_SWITCH;
2897 }
2898
2899 if (control) {
201e06ff
TI
2900 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
2901 name, sizeof(name), NULL);
7c922de7
NL
2902 return stac92xx_add_control(codec->spec, control,
2903 strcat(name, " Jack Mode"), nid);
2904 }
2905
2906 return 0;
2907}
2908
e3c75964
TI
2909static int stac92xx_add_input_source(struct sigmatel_spec *spec)
2910{
2911 struct snd_kcontrol_new *knew;
2912 struct hda_input_mux *imux = &spec->private_imux;
2913
3d21d3f7
TI
2914 if (spec->auto_mic)
2915 return 0; /* no need for input source */
e3c75964
TI
2916 if (!spec->num_adcs || imux->num_items <= 1)
2917 return 0; /* no need for input source control */
2918 knew = stac_control_new(spec, &stac_input_src_temp,
4d02d1b6 2919 stac_input_src_temp.name, 0);
e3c75964
TI
2920 if (!knew)
2921 return -ENOMEM;
2922 knew->count = spec->num_adcs;
2923 return 0;
2924}
2925
c21ca4a8
TI
2926/* check whether the line-input can be used as line-out */
2927static hda_nid_t check_line_out_switch(struct hda_codec *codec)
403d1944
MP
2928{
2929 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
2930 struct auto_pin_cfg *cfg = &spec->autocfg;
2931 hda_nid_t nid;
2932 unsigned int pincap;
eea7dc93 2933 int i;
8e9068b1 2934
c21ca4a8
TI
2935 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2936 return 0;
eea7dc93 2937 for (i = 0; i < cfg->num_inputs; i++) {
86e2959a 2938 if (cfg->inputs[i].type == AUTO_PIN_LINE_IN) {
eea7dc93
TI
2939 nid = cfg->inputs[i].pin;
2940 pincap = snd_hda_query_pin_caps(codec, nid);
2941 if (pincap & AC_PINCAP_OUT)
2942 return nid;
2943 }
2944 }
c21ca4a8
TI
2945 return 0;
2946}
403d1944 2947
eea7dc93
TI
2948static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid);
2949
c21ca4a8 2950/* check whether the mic-input can be used as line-out */
eea7dc93 2951static hda_nid_t check_mic_out_switch(struct hda_codec *codec, hda_nid_t *dac)
c21ca4a8
TI
2952{
2953 struct sigmatel_spec *spec = codec->spec;
2954 struct auto_pin_cfg *cfg = &spec->autocfg;
2955 unsigned int def_conf, pincap;
86e2959a 2956 int i;
c21ca4a8 2957
eea7dc93 2958 *dac = 0;
c21ca4a8
TI
2959 if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
2960 return 0;
eea7dc93
TI
2961 for (i = 0; i < cfg->num_inputs; i++) {
2962 hda_nid_t nid = cfg->inputs[i].pin;
86e2959a 2963 if (cfg->inputs[i].type != AUTO_PIN_MIC)
eea7dc93 2964 continue;
330ee995 2965 def_conf = snd_hda_codec_get_pincfg(codec, nid);
c21ca4a8
TI
2966 /* some laptops have an internal analog microphone
2967 * which can't be used as a output */
99ae28be 2968 if (snd_hda_get_input_pin_attr(def_conf) != INPUT_PIN_ATTR_INT) {
1327a32b 2969 pincap = snd_hda_query_pin_caps(codec, nid);
eea7dc93
TI
2970 if (pincap & AC_PINCAP_OUT) {
2971 *dac = get_unassigned_dac(codec, nid);
2972 if (*dac)
2973 return nid;
2974 }
403d1944 2975 }
403d1944 2976 }
403d1944
MP
2977 return 0;
2978}
2979
7b043899
SL
2980static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2981{
2982 int i;
2983
2984 for (i = 0; i < spec->multiout.num_dacs; i++) {
2985 if (spec->multiout.dac_nids[i] == nid)
2986 return 1;
2987 }
2988
2989 return 0;
2990}
2991
c21ca4a8
TI
2992static int check_all_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2993{
2994 int i;
2995 if (is_in_dac_nids(spec, nid))
2996 return 1;
2997 for (i = 0; i < spec->autocfg.hp_outs; i++)
2998 if (spec->hp_dacs[i] == nid)
2999 return 1;
3000 for (i = 0; i < spec->autocfg.speaker_outs; i++)
3001 if (spec->speaker_dacs[i] == nid)
3002 return 1;
3003 return 0;
3004}
3005
3006static hda_nid_t get_unassigned_dac(struct hda_codec *codec, hda_nid_t nid)
3007{
3008 struct sigmatel_spec *spec = codec->spec;
48718eab 3009 struct auto_pin_cfg *cfg = &spec->autocfg;
c21ca4a8 3010 int j, conn_len;
48718eab 3011 hda_nid_t conn[HDA_MAX_CONNECTIONS], fallback_dac;
c21ca4a8
TI
3012 unsigned int wcaps, wtype;
3013
3014 conn_len = snd_hda_get_connections(codec, nid, conn,
3015 HDA_MAX_CONNECTIONS);
36706005
CC
3016 /* 92HD88: trace back up the link of nids to find the DAC */
3017 while (conn_len == 1 && (get_wcaps_type(get_wcaps(codec, conn[0]))
3018 != AC_WID_AUD_OUT)) {
3019 nid = conn[0];
3020 conn_len = snd_hda_get_connections(codec, nid, conn,
3021 HDA_MAX_CONNECTIONS);
3022 }
c21ca4a8 3023 for (j = 0; j < conn_len; j++) {
14bafe32 3024 wcaps = get_wcaps(codec, conn[j]);
a22d543a 3025 wtype = get_wcaps_type(wcaps);
c21ca4a8
TI
3026 /* we check only analog outputs */
3027 if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
3028 continue;
3029 /* if this route has a free DAC, assign it */
3030 if (!check_all_dac_nids(spec, conn[j])) {
3031 if (conn_len > 1) {
3032 /* select this DAC in the pin's input mux */
3033 snd_hda_codec_write_cache(codec, nid, 0,
3034 AC_VERB_SET_CONNECT_SEL, j);
3035 }
3036 return conn[j];
3037 }
3038 }
48718eab
DH
3039
3040 /* if all DACs are already assigned, connect to the primary DAC,
3041 unless we're assigning a secondary headphone */
3042 fallback_dac = spec->multiout.dac_nids[0];
3043 if (spec->multiout.hp_nid) {
3044 for (j = 0; j < cfg->hp_outs; j++)
3045 if (cfg->hp_pins[j] == nid) {
3046 fallback_dac = spec->multiout.hp_nid;
3047 break;
3048 }
3049 }
3050
ee58a7ca
TI
3051 if (conn_len > 1) {
3052 for (j = 0; j < conn_len; j++) {
48718eab 3053 if (conn[j] == fallback_dac) {
ee58a7ca
TI
3054 snd_hda_codec_write_cache(codec, nid, 0,
3055 AC_VERB_SET_CONNECT_SEL, j);
3056 break;
3057 }
3058 }
3059 }
c21ca4a8
TI
3060 return 0;
3061}
3062
3063static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3064static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid);
3065
3cc08dc6 3066/*
7b043899
SL
3067 * Fill in the dac_nids table from the parsed pin configuration
3068 * This function only works when every pin in line_out_pins[]
3069 * contains atleast one DAC in its connection list. Some 92xx
3070 * codecs are not connected directly to a DAC, such as the 9200
3071 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 3072 */
c21ca4a8 3073static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec)
c7d4b2fa
M
3074{
3075 struct sigmatel_spec *spec = codec->spec;
c21ca4a8
TI
3076 struct auto_pin_cfg *cfg = &spec->autocfg;
3077 int i;
3078 hda_nid_t nid, dac;
7b043899 3079
c7d4b2fa
M
3080 for (i = 0; i < cfg->line_outs; i++) {
3081 nid = cfg->line_out_pins[i];
c21ca4a8
TI
3082 dac = get_unassigned_dac(codec, nid);
3083 if (!dac) {
df802952
TI
3084 if (spec->multiout.num_dacs > 0) {
3085 /* we have already working output pins,
3086 * so let's drop the broken ones again
3087 */
3088 cfg->line_outs = spec->multiout.num_dacs;
3089 break;
3090 }
7b043899
SL
3091 /* error out, no available DAC found */
3092 snd_printk(KERN_ERR
3093 "%s: No available DAC for pin 0x%x\n",
3094 __func__, nid);
3095 return -ENODEV;
3096 }
c21ca4a8
TI
3097 add_spec_dacs(spec, dac);
3098 }
7b043899 3099
139e071b
TI
3100 for (i = 0; i < cfg->hp_outs; i++) {
3101 nid = cfg->hp_pins[i];
3102 dac = get_unassigned_dac(codec, nid);
3103 if (dac) {
3104 if (!spec->multiout.hp_nid)
3105 spec->multiout.hp_nid = dac;
3106 else
3107 add_spec_extra_dacs(spec, dac);
3108 }
3109 spec->hp_dacs[i] = dac;
3110 }
3111
3112 for (i = 0; i < cfg->speaker_outs; i++) {
3113 nid = cfg->speaker_pins[i];
3114 dac = get_unassigned_dac(codec, nid);
3115 if (dac)
3116 add_spec_extra_dacs(spec, dac);
3117 spec->speaker_dacs[i] = dac;
3118 }
3119
c21ca4a8
TI
3120 /* add line-in as output */
3121 nid = check_line_out_switch(codec);
3122 if (nid) {
3123 dac = get_unassigned_dac(codec, nid);
3124 if (dac) {
3125 snd_printdd("STAC: Add line-in 0x%x as output %d\n",
3126 nid, cfg->line_outs);
3127 cfg->line_out_pins[cfg->line_outs] = nid;
3128 cfg->line_outs++;
3129 spec->line_switch = nid;
3130 add_spec_dacs(spec, dac);
3131 }
3132 }
3133 /* add mic as output */
eea7dc93
TI
3134 nid = check_mic_out_switch(codec, &dac);
3135 if (nid && dac) {
3136 snd_printdd("STAC: Add mic-in 0x%x as output %d\n",
3137 nid, cfg->line_outs);
3138 cfg->line_out_pins[cfg->line_outs] = nid;
3139 cfg->line_outs++;
3140 spec->mic_switch = nid;
3141 add_spec_dacs(spec, dac);
c21ca4a8 3142 }
c7d4b2fa 3143
c21ca4a8 3144 snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
7b043899
SL
3145 spec->multiout.num_dacs,
3146 spec->multiout.dac_nids[0],
3147 spec->multiout.dac_nids[1],
3148 spec->multiout.dac_nids[2],
3149 spec->multiout.dac_nids[3],
3150 spec->multiout.dac_nids[4]);
c21ca4a8 3151
c7d4b2fa
M
3152 return 0;
3153}
3154
eb06ed8f 3155/* create volume control/switch for the given prefx type */
668b9652
TI
3156static int create_controls_idx(struct hda_codec *codec, const char *pfx,
3157 int idx, hda_nid_t nid, int chs)
eb06ed8f 3158{
7c7767eb 3159 struct sigmatel_spec *spec = codec->spec;
eb06ed8f
TI
3160 char name[32];
3161 int err;
3162
7c7767eb
TI
3163 if (!spec->check_volume_offset) {
3164 unsigned int caps, step, nums, db_scale;
3165 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3166 step = (caps & AC_AMPCAP_STEP_SIZE) >>
3167 AC_AMPCAP_STEP_SIZE_SHIFT;
3168 step = (step + 1) * 25; /* in .01dB unit */
3169 nums = (caps & AC_AMPCAP_NUM_STEPS) >>
3170 AC_AMPCAP_NUM_STEPS_SHIFT;
3171 db_scale = nums * step;
3172 /* if dB scale is over -64dB, and finer enough,
3173 * let's reduce it to half
3174 */
3175 if (db_scale > 6400 && nums >= 0x1f)
3176 spec->volume_offset = nums / 2;
3177 spec->check_volume_offset = 1;
3178 }
3179
eb06ed8f 3180 sprintf(name, "%s Playback Volume", pfx);
668b9652 3181 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
7c7767eb
TI
3182 HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
3183 spec->volume_offset));
eb06ed8f
TI
3184 if (err < 0)
3185 return err;
3186 sprintf(name, "%s Playback Switch", pfx);
668b9652 3187 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
eb06ed8f
TI
3188 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
3189 if (err < 0)
3190 return err;
3191 return 0;
3192}
3193
668b9652
TI
3194#define create_controls(codec, pfx, nid, chs) \
3195 create_controls_idx(codec, pfx, 0, nid, chs)
3196
ae0afd81
MR
3197static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
3198{
c21ca4a8 3199 if (spec->multiout.num_dacs > 4) {
ae0afd81
MR
3200 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
3201 return 1;
3202 } else {
dda14410
TI
3203 snd_BUG_ON(spec->multiout.dac_nids != spec->dac_nids);
3204 spec->dac_nids[spec->multiout.num_dacs] = nid;
ae0afd81
MR
3205 spec->multiout.num_dacs++;
3206 }
3207 return 0;
3208}
3209
c21ca4a8 3210static int add_spec_extra_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
ae0afd81 3211{
c21ca4a8
TI
3212 int i;
3213 for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++) {
3214 if (!spec->multiout.extra_out_nid[i]) {
3215 spec->multiout.extra_out_nid[i] = nid;
3216 return 0;
3217 }
3218 }
3219 printk(KERN_WARNING "stac92xx: No space for extra DAC 0x%x\n", nid);
3220 return 1;
ae0afd81
MR
3221}
3222
dc04d1b4
TI
3223/* Create output controls
3224 * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
3225 */
3226static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
3227 const hda_nid_t *pins,
3228 const hda_nid_t *dac_nids,
3229 int type)
c7d4b2fa 3230{
76624534 3231 struct sigmatel_spec *spec = codec->spec;
ea734963 3232 static const char * const chname[4] = {
19039bd0
TI
3233 "Front", "Surround", NULL /*CLFE*/, "Side"
3234 };
dc04d1b4 3235 hda_nid_t nid;
91589232
TI
3236 int i, err;
3237 unsigned int wid_caps;
0fb87bb4 3238
dc04d1b4 3239 for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
ffd0e56c 3240 if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
e35d9d6a 3241 if (is_jack_detectable(codec, pins[i]))
ffd0e56c
TI
3242 spec->hp_detect = 1;
3243 }
dc04d1b4
TI
3244 nid = dac_nids[i];
3245 if (!nid)
3246 continue;
3247 if (type != AUTO_PIN_HP_OUT && i == 2) {
c7d4b2fa 3248 /* Center/LFE */
7c7767eb 3249 err = create_controls(codec, "Center", nid, 1);
eb06ed8f 3250 if (err < 0)
c7d4b2fa 3251 return err;
7c7767eb 3252 err = create_controls(codec, "LFE", nid, 2);
eb06ed8f 3253 if (err < 0)
c7d4b2fa 3254 return err;
0fb87bb4
ML
3255
3256 wid_caps = get_wcaps(codec, nid);
3257
3258 if (wid_caps & AC_WCAP_LR_SWAP) {
3259 err = stac92xx_add_control(spec,
3260 STAC_CTL_WIDGET_CLFE_SWITCH,
3261 "Swap Center/LFE Playback Switch", nid);
3262
3263 if (err < 0)
3264 return err;
3265 }
3266
c7d4b2fa 3267 } else {
dc04d1b4 3268 const char *name;
668b9652 3269 int idx;
dc04d1b4
TI
3270 switch (type) {
3271 case AUTO_PIN_HP_OUT:
668b9652
TI
3272 name = "Headphone";
3273 idx = i;
dc04d1b4
TI
3274 break;
3275 case AUTO_PIN_SPEAKER_OUT:
f37bc7a8
TI
3276 if (num_outs <= 2) {
3277 name = i ? "Bass Speaker" : "Speaker";
3278 idx = 0;
298efee7
DH
3279 break;
3280 }
3281 /* Fall through in case of multi speaker outs */
dc04d1b4
TI
3282 default:
3283 name = chname[i];
668b9652 3284 idx = 0;
dc04d1b4 3285 break;
76624534 3286 }
668b9652 3287 err = create_controls_idx(codec, name, idx, nid, 3);
eb06ed8f 3288 if (err < 0)
c7d4b2fa
M
3289 return err;
3290 }
3291 }
dc04d1b4
TI
3292 return 0;
3293}
3294
62cbde18
TI
3295static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
3296 unsigned int dir_mask, unsigned int data);
3297
3298/* hook for controlling mic-mute LED GPIO */
3299static int stac92xx_capture_sw_put_led(struct snd_kcontrol *kcontrol,
3300 struct snd_ctl_elem_value *ucontrol)
3301{
3302 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3303 struct sigmatel_spec *spec = codec->spec;
3304 int err;
3305 bool mute;
3306
3307 err = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
3308 if (err <= 0)
3309 return err;
3310 mute = !(ucontrol->value.integer.value[0] &&
3311 ucontrol->value.integer.value[1]);
3312 if (spec->mic_mute_led_on != mute) {
3313 spec->mic_mute_led_on = mute;
3314 if (mute)
3315 spec->gpio_data |= spec->mic_mute_led_gpio;
3316 else
3317 spec->gpio_data &= ~spec->mic_mute_led_gpio;
3318 stac_gpio_set(codec, spec->gpio_mask,
3319 spec->gpio_dir, spec->gpio_data);
3320 }
3321 return err;
3322}
3323
6479c631
TI
3324static int stac92xx_add_capvol_ctls(struct hda_codec *codec, unsigned long vol,
3325 unsigned long sw, int idx)
3326{
62cbde18
TI
3327 struct sigmatel_spec *spec = codec->spec;
3328 struct snd_kcontrol_new *knew;
6479c631 3329 int err;
62cbde18 3330
6479c631 3331 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx,
bf677bd8 3332 "Capture Volume", vol);
6479c631
TI
3333 if (err < 0)
3334 return err;
62cbde18
TI
3335
3336 knew = add_control_temp(spec,
3337 &stac92xx_control_templates[STAC_CTL_WIDGET_MUTE],
3338 idx, "Capture Switch", sw);
3339 if (!knew)
3340 return -ENOMEM;
3341 /* add a LED hook for some HP laptops */
3342 if (spec->mic_mute_led_gpio)
3343 knew->put = stac92xx_capture_sw_put_led;
3344
6479c631
TI
3345 return 0;
3346}
3347
dc04d1b4
TI
3348/* add playback controls from the parsed DAC table */
3349static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
3350 const struct auto_pin_cfg *cfg)
3351{
3352 struct sigmatel_spec *spec = codec->spec;
7c922de7 3353 hda_nid_t nid;
dc04d1b4 3354 int err;
7c922de7 3355 int idx;
dc04d1b4
TI
3356
3357 err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
3358 spec->multiout.dac_nids,
3359 cfg->line_out_type);
3360 if (err < 0)
3361 return err;
c7d4b2fa 3362
a9cb5c90 3363 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR
3364 err = stac92xx_add_control(spec,
3365 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI
3366 "Headphone as Line Out Switch",
3367 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR
3368 if (err < 0)
3369 return err;
3370 }
3371
eea7dc93 3372 for (idx = 0; idx < cfg->num_inputs; idx++) {
86e2959a 3373 if (cfg->inputs[idx].type > AUTO_PIN_LINE_IN)
eea7dc93
TI
3374 break;
3375 nid = cfg->inputs[idx].pin;
3376 err = stac92xx_add_jack_mode_control(codec, nid, idx);
3377 if (err < 0)
3378 return err;
b5895dc8 3379 }
403d1944 3380
c7d4b2fa
M
3381 return 0;
3382}
3383
eb06ed8f
TI
3384/* add playback controls for Speaker and HP outputs */
3385static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
3386 struct auto_pin_cfg *cfg)
3387{
3388 struct sigmatel_spec *spec = codec->spec;
dc04d1b4
TI
3389 int err;
3390
3391 err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
3392 spec->hp_dacs, AUTO_PIN_HP_OUT);
3393 if (err < 0)
3394 return err;
3395
3396 err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
3397 spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
3398 if (err < 0)
3399 return err;
eb06ed8f 3400
c7d4b2fa
M
3401 return 0;
3402}
3403
b22b4821 3404/* labels for mono mux outputs */
ea734963 3405static const char * const stac92xx_mono_labels[4] = {
d0513fc6 3406 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR
3407};
3408
3409/* create mono mux for mono out on capable codecs */
3410static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3411{
3412 struct sigmatel_spec *spec = codec->spec;
3413 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3414 int i, num_cons;
3415 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3416
3417 num_cons = snd_hda_get_connections(codec,
3418 spec->mono_nid,
3419 con_lst,
3420 HDA_MAX_NUM_INPUTS);
16a433d8 3421 if (num_cons <= 0 || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
b22b4821
MR
3422 return -EINVAL;
3423
10a20af7
TI
3424 for (i = 0; i < num_cons; i++)
3425 snd_hda_add_imux_item(mono_mux, stac92xx_mono_labels[i], i,
3426 NULL);
09a99959
MR
3427
3428 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3429 "Mono Mux", spec->mono_nid);
b22b4821
MR
3430}
3431
1cd2224c
MR
3432/* create PC beep volume controls */
3433static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3434 hda_nid_t nid)
3435{
3436 struct sigmatel_spec *spec = codec->spec;
3437 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
123c07ae
JK
3438 int err, type = STAC_CTL_WIDGET_MUTE_BEEP;
3439
3440 if (spec->anabeep_nid == nid)
3441 type = STAC_CTL_WIDGET_MUTE;
1cd2224c
MR
3442
3443 /* check for mute support for the the amp */
3444 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
123c07ae 3445 err = stac92xx_add_control(spec, type,
d355c82a 3446 "Beep Playback Switch",
1cd2224c
MR
3447 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3448 if (err < 0)
3449 return err;
3450 }
3451
3452 /* check to see if there is volume support for the amp */
3453 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3454 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
d355c82a 3455 "Beep Playback Volume",
1cd2224c
MR
3456 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3457 if (err < 0)
3458 return err;
3459 }
3460 return 0;
3461}
3462
4d4e9bb3
TI
3463#ifdef CONFIG_SND_HDA_INPUT_BEEP
3464#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3465
3466static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3467 struct snd_ctl_elem_value *ucontrol)
3468{
3469 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3470 ucontrol->value.integer.value[0] = codec->beep->enabled;
3471 return 0;
3472}
3473
3474static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3475 struct snd_ctl_elem_value *ucontrol)
3476{
3477 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
123c07ae 3478 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
4d4e9bb3
TI
3479}
3480
2b63536f 3481static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
4d4e9bb3
TI
3482 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3483 .info = stac92xx_dig_beep_switch_info,
3484 .get = stac92xx_dig_beep_switch_get,
3485 .put = stac92xx_dig_beep_switch_put,
3486};
3487
3488static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3489{
3490 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
d355c82a 3491 0, "Beep Playback Switch", 0);
4d4e9bb3
TI
3492}
3493#endif
3494
4682eee0
MR
3495static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3496{
3497 struct sigmatel_spec *spec = codec->spec;
667067d8 3498 int i, j, err = 0;
4682eee0
MR
3499
3500 for (i = 0; i < spec->num_muxes; i++) {
667067d8
TI
3501 hda_nid_t nid;
3502 unsigned int wcaps;
3503 unsigned long val;
3504
4682eee0
MR
3505 nid = spec->mux_nids[i];
3506 wcaps = get_wcaps(codec, nid);
667067d8
TI
3507 if (!(wcaps & AC_WCAP_OUT_AMP))
3508 continue;
4682eee0 3509
667067d8
TI
3510 /* check whether already the same control was created as
3511 * normal Capture Volume.
3512 */
3513 val = HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT);
3514 for (j = 0; j < spec->num_caps; j++) {
3515 if (spec->capvols[j] == val)
3516 break;
4682eee0 3517 }
667067d8
TI
3518 if (j < spec->num_caps)
3519 continue;
3520
3521 err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, i,
3522 "Mux Capture Volume", val);
3523 if (err < 0)
3524 return err;
4682eee0
MR
3525 }
3526 return 0;
3527};
3528
ea734963 3529static const char * const stac92xx_spdif_labels[3] = {
65973632 3530 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR
3531};
3532
3533static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3534{
3535 struct sigmatel_spec *spec = codec->spec;
3536 struct hda_input_mux *spdif_mux = &spec->private_smux;
ea734963 3537 const char * const *labels = spec->spdif_labels;
d9737751 3538 int i, num_cons;
65973632 3539 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR
3540
3541 num_cons = snd_hda_get_connections(codec,
3542 spec->smux_nids[0],
3543 con_lst,
3544 HDA_MAX_NUM_INPUTS);
16a433d8 3545 if (num_cons <= 0)
d9737751
MR
3546 return -EINVAL;
3547
65973632
MR
3548 if (!labels)
3549 labels = stac92xx_spdif_labels;
3550
10a20af7
TI
3551 for (i = 0; i < num_cons; i++)
3552 snd_hda_add_imux_item(spdif_mux, labels[i], i, NULL);
d9737751
MR
3553
3554 return 0;
3555}
3556
8b65727b 3557/* labels for dmic mux inputs */
ea734963 3558static const char * const stac92xx_dmic_labels[5] = {
8b65727b
MP
3559 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3560 "Digital Mic 3", "Digital Mic 4"
3561};
3562
699d8995
VK
3563static hda_nid_t get_connected_node(struct hda_codec *codec, hda_nid_t mux,
3564 int idx)
3565{
3566 hda_nid_t conn[HDA_MAX_NUM_INPUTS];
3567 int nums;
3568 nums = snd_hda_get_connections(codec, mux, conn, ARRAY_SIZE(conn));
3569 if (idx >= 0 && idx < nums)
3570 return conn[idx];
3571 return 0;
3572}
3573
8d087c76
TI
3574/* look for NID recursively */
3575#define get_connection_index(codec, mux, nid) \
3576 snd_hda_get_conn_index(codec, mux, nid, 1)
3d21d3f7 3577
667067d8 3578/* create a volume assigned to the given pin (only if supported) */
96f845de 3579/* return 1 if the volume control is created */
667067d8 3580static int create_elem_capture_vol(struct hda_codec *codec, hda_nid_t nid,
eea7dc93 3581 const char *label, int idx, int direction)
667067d8
TI
3582{
3583 unsigned int caps, nums;
3584 char name[32];
96f845de 3585 int err;
667067d8 3586
96f845de
TI
3587 if (direction == HDA_OUTPUT)
3588 caps = AC_WCAP_OUT_AMP;
3589 else
3590 caps = AC_WCAP_IN_AMP;
3591 if (!(get_wcaps(codec, nid) & caps))
667067d8 3592 return 0;
96f845de 3593 caps = query_amp_caps(codec, nid, direction);
667067d8
TI
3594 nums = (caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT;
3595 if (!nums)
3596 return 0;
3597 snprintf(name, sizeof(name), "%s Capture Volume", label);
eea7dc93
TI
3598 err = stac92xx_add_control_idx(codec->spec, STAC_CTL_WIDGET_VOL, idx, name,
3599 HDA_COMPOSE_AMP_VAL(nid, 3, 0, direction));
96f845de
TI
3600 if (err < 0)
3601 return err;
3602 return 1;
667067d8
TI
3603}
3604
8b65727b
MP
3605/* create playback/capture controls for input pins on dmic capable codecs */
3606static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3607 const struct auto_pin_cfg *cfg)
3608{
3609 struct sigmatel_spec *spec = codec->spec;
5207e10e 3610 struct hda_input_mux *imux = &spec->private_imux;
8b65727b 3611 struct hda_input_mux *dimux = &spec->private_dimux;
263d0328 3612 int err, i;
5207e10e 3613 unsigned int def_conf;
8b65727b 3614
10a20af7 3615 snd_hda_add_imux_item(dimux, stac92xx_dmic_labels[0], 0, NULL);
5207e10e 3616
8b65727b 3617 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3618 hda_nid_t nid;
10a20af7 3619 int index, type_idx;
201e06ff 3620 char label[32];
8b65727b 3621
667067d8
TI
3622 nid = spec->dmic_nids[i];
3623 if (get_wcaps_type(get_wcaps(codec, nid)) != AC_WID_PIN)
3624 continue;
3625 def_conf = snd_hda_codec_get_pincfg(codec, nid);
8b65727b
MP
3626 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3627 continue;
3628
3d21d3f7
TI
3629 index = get_connection_index(codec, spec->dmux_nids[0], nid);
3630 if (index < 0)
3631 continue;
3632
201e06ff
TI
3633 snd_hda_get_pin_label(codec, nid, &spec->autocfg,
3634 label, sizeof(label), NULL);
10a20af7 3635 snd_hda_add_imux_item(dimux, label, index, &type_idx);
2d7ec12b
TI
3636 if (snd_hda_get_bool_hint(codec, "separate_dmux") != 1)
3637 snd_hda_add_imux_item(imux, label, index, &type_idx);
5207e10e 3638
10a20af7
TI
3639 err = create_elem_capture_vol(codec, nid, label, type_idx,
3640 HDA_INPUT);
667067d8
TI
3641 if (err < 0)
3642 return err;
96f845de
TI
3643 if (!err) {
3644 err = create_elem_capture_vol(codec, nid, label,
10a20af7 3645 type_idx, HDA_OUTPUT);
96f845de
TI
3646 if (err < 0)
3647 return err;
699d8995
VK
3648 if (!err) {
3649 nid = get_connected_node(codec,
3650 spec->dmux_nids[0], index);
3651 if (nid)
3652 err = create_elem_capture_vol(codec,
3653 nid, label,
3654 type_idx, HDA_INPUT);
3655 if (err < 0)
3656 return err;
3657 }
96f845de 3658 }
8b65727b
MP
3659 }
3660
3661 return 0;
3662}
3663
3d21d3f7 3664static int check_mic_pin(struct hda_codec *codec, hda_nid_t nid,
9907790a 3665 hda_nid_t *fixed, hda_nid_t *ext, hda_nid_t *dock)
3d21d3f7
TI
3666{
3667 unsigned int cfg;
1f83ac5a 3668 unsigned int type;
3d21d3f7
TI
3669
3670 if (!nid)
3671 return 0;
3672 cfg = snd_hda_codec_get_pincfg(codec, nid);
1f83ac5a 3673 type = get_defcfg_device(cfg);
99ae28be
TI
3674 switch (snd_hda_get_input_pin_attr(cfg)) {
3675 case INPUT_PIN_ATTR_INT:
3d21d3f7
TI
3676 if (*fixed)
3677 return 1; /* already occupied */
1f83ac5a
TI
3678 if (type != AC_JACK_MIC_IN)
3679 return 1; /* invalid type */
3d21d3f7
TI
3680 *fixed = nid;
3681 break;
99ae28be
TI
3682 case INPUT_PIN_ATTR_UNUSED:
3683 break;
3684 case INPUT_PIN_ATTR_DOCK:
3685 if (*dock)
3686 return 1; /* already occupied */
1f83ac5a
TI
3687 if (type != AC_JACK_MIC_IN && type != AC_JACK_LINE_IN)
3688 return 1; /* invalid type */
99ae28be
TI
3689 *dock = nid;
3690 break;
3691 default:
3d21d3f7
TI
3692 if (*ext)
3693 return 1; /* already occupied */
1f83ac5a
TI
3694 if (type != AC_JACK_MIC_IN)
3695 return 1; /* invalid type */
3d21d3f7
TI
3696 *ext = nid;
3697 break;
3698 }
3699 return 0;
3700}
3701
3702static int set_mic_route(struct hda_codec *codec,
3703 struct sigmatel_mic_route *mic,
3704 hda_nid_t pin)
3705{
3706 struct sigmatel_spec *spec = codec->spec;
3707 struct auto_pin_cfg *cfg = &spec->autocfg;
3708 int i;
3709
3710 mic->pin = pin;
9907790a
CC
3711 if (pin == 0)
3712 return 0;
eea7dc93
TI
3713 for (i = 0; i < cfg->num_inputs; i++) {
3714 if (pin == cfg->inputs[i].pin)
3d21d3f7 3715 break;
eea7dc93 3716 }
86e2959a 3717 if (i < cfg->num_inputs && cfg->inputs[i].type == AUTO_PIN_MIC) {
3d21d3f7 3718 /* analog pin */
3d21d3f7
TI
3719 i = get_connection_index(codec, spec->mux_nids[0], pin);
3720 if (i < 0)
3721 return -1;
3722 mic->mux_idx = i;
02d33322
TI
3723 mic->dmux_idx = -1;
3724 if (spec->dmux_nids)
3725 mic->dmux_idx = get_connection_index(codec,
3726 spec->dmux_nids[0],
3727 spec->mux_nids[0]);
da2a2aaa 3728 } else if (spec->dmux_nids) {
3d21d3f7 3729 /* digital pin */
3d21d3f7
TI
3730 i = get_connection_index(codec, spec->dmux_nids[0], pin);
3731 if (i < 0)
3732 return -1;
3733 mic->dmux_idx = i;
02d33322
TI
3734 mic->mux_idx = -1;
3735 if (spec->mux_nids)
3736 mic->mux_idx = get_connection_index(codec,
3737 spec->mux_nids[0],
3738 spec->dmux_nids[0]);
3d21d3f7
TI
3739 }
3740 return 0;
3741}
3742
3743/* return non-zero if the device is for automatic mic switch */
3744static int stac_check_auto_mic(struct hda_codec *codec)
3745{
3746 struct sigmatel_spec *spec = codec->spec;
3747 struct auto_pin_cfg *cfg = &spec->autocfg;
9907790a 3748 hda_nid_t fixed, ext, dock;
3d21d3f7
TI
3749 int i;
3750
9907790a 3751 fixed = ext = dock = 0;
eea7dc93 3752 for (i = 0; i < cfg->num_inputs; i++)
9907790a
CC
3753 if (check_mic_pin(codec, cfg->inputs[i].pin,
3754 &fixed, &ext, &dock))
3d21d3f7
TI
3755 return 0;
3756 for (i = 0; i < spec->num_dmics; i++)
9907790a
CC
3757 if (check_mic_pin(codec, spec->dmic_nids[i],
3758 &fixed, &ext, &dock))
3d21d3f7 3759 return 0;
80c67852 3760 if (!fixed || (!ext && !dock))
9907790a 3761 return 0; /* no input to switch */
e35d9d6a 3762 if (!is_jack_detectable(codec, ext))
3d21d3f7
TI
3763 return 0; /* no unsol support */
3764 if (set_mic_route(codec, &spec->ext_mic, ext) ||
9907790a
CC
3765 set_mic_route(codec, &spec->int_mic, fixed) ||
3766 set_mic_route(codec, &spec->dock_mic, dock))
3d21d3f7
TI
3767 return 0; /* something is wrong */
3768 return 1;
3769}
3770
c7d4b2fa
M
3771/* create playback/capture controls for input pins */
3772static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3773{
3774 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 3775 struct hda_input_mux *imux = &spec->private_imux;
667067d8 3776 int i, j;
263d0328 3777 const char *label;
c7d4b2fa 3778
eea7dc93
TI
3779 for (i = 0; i < cfg->num_inputs; i++) {
3780 hda_nid_t nid = cfg->inputs[i].pin;
10a20af7 3781 int index, err, type_idx;
314634bc 3782
314634bc
TI
3783 index = -1;
3784 for (j = 0; j < spec->num_muxes; j++) {
667067d8
TI
3785 index = get_connection_index(codec, spec->mux_nids[j],
3786 nid);
3787 if (index >= 0)
3788 break;
c7d4b2fa 3789 }
667067d8
TI
3790 if (index < 0)
3791 continue;
3792
10a20af7
TI
3793 label = hda_get_autocfg_input_label(codec, cfg, i);
3794 snd_hda_add_imux_item(imux, label, index, &type_idx);
263d0328 3795
667067d8 3796 err = create_elem_capture_vol(codec, nid,
263d0328 3797 label, type_idx,
96f845de 3798 HDA_INPUT);
667067d8
TI
3799 if (err < 0)
3800 return err;
c7d4b2fa 3801 }
5207e10e 3802 spec->num_analog_muxes = imux->num_items;
c7d4b2fa 3803
7b043899 3804 if (imux->num_items) {
62fe78e9
SR
3805 /*
3806 * Set the current input for the muxes.
3807 * The STAC9221 has two input muxes with identical source
3808 * NID lists. Hopefully this won't get confused.
3809 */
3810 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI
3811 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3812 AC_VERB_SET_CONNECT_SEL,
3813 imux->items[0].index);
62fe78e9
SR
3814 }
3815 }
3816
c7d4b2fa
M
3817 return 0;
3818}
3819
c7d4b2fa
M
3820static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3821{
3822 struct sigmatel_spec *spec = codec->spec;
3823 int i;
3824
3825 for (i = 0; i < spec->autocfg.line_outs; i++) {
3826 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3827 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3828 }
3829}
3830
3831static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3832{
3833 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3834 int i;
c7d4b2fa 3835
eb06ed8f
TI
3836 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3837 hda_nid_t pin;
3838 pin = spec->autocfg.hp_pins[i];
3839 if (pin) /* connect to front */
3840 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3841 }
3842 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3843 hda_nid_t pin;
3844 pin = spec->autocfg.speaker_pins[i];
3845 if (pin) /* connect to front */
3846 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3847 }
c7d4b2fa
M
3848}
3849
8af3aeb4
TI
3850static int is_dual_headphones(struct hda_codec *codec)
3851{
3852 struct sigmatel_spec *spec = codec->spec;
3853 int i, valid_hps;
3854
3855 if (spec->autocfg.line_out_type != AUTO_PIN_SPEAKER_OUT ||
3856 spec->autocfg.hp_outs <= 1)
3857 return 0;
3858 valid_hps = 0;
3859 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3860 hda_nid_t nid = spec->autocfg.hp_pins[i];
3861 unsigned int cfg = snd_hda_codec_get_pincfg(codec, nid);
3862 if (get_defcfg_location(cfg) & AC_JACK_LOC_SEPARATE)
3863 continue;
3864 valid_hps++;
3865 }
3866 return (valid_hps > 1);
3867}
3868
3869
9009b0e4 3870static int stac92xx_parse_auto_config(struct hda_codec *codec)
c7d4b2fa
M
3871{
3872 struct sigmatel_spec *spec = codec->spec;
9009b0e4 3873 hda_nid_t dig_out = 0, dig_in = 0;
dc04d1b4 3874 int hp_swap = 0;
6479c631 3875 int i, err;
c7d4b2fa 3876
8b65727b
MP
3877 if ((err = snd_hda_parse_pin_def_config(codec,
3878 &spec->autocfg,
3879 spec->dmic_nids)) < 0)
c7d4b2fa 3880 return err;
82bc955f 3881 if (! spec->autocfg.line_outs)
869264c4 3882 return 0; /* can't find valid pin config */
19039bd0 3883
bcecd9bd
JZ
3884 /* If we have no real line-out pin and multiple hp-outs, HPs should
3885 * be set up as multi-channel outputs.
3886 */
8af3aeb4 3887 if (is_dual_headphones(codec)) {
bcecd9bd
JZ
3888 /* Copy hp_outs to line_outs, backup line_outs in
3889 * speaker_outs so that the following routines can handle
3890 * HP pins as primary outputs.
3891 */
c21ca4a8 3892 snd_printdd("stac92xx: Enabling multi-HPs workaround\n");
bcecd9bd
JZ
3893 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3894 sizeof(spec->autocfg.line_out_pins));
3895 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3896 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3897 sizeof(spec->autocfg.hp_pins));
3898 spec->autocfg.line_outs = spec->autocfg.hp_outs;
c21ca4a8
TI
3899 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
3900 spec->autocfg.hp_outs = 0;
dc04d1b4 3901 hp_swap = 1;
bcecd9bd 3902 }
09a99959 3903 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR
3904 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3905 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR
3906 u32 caps = query_amp_caps(codec,
3907 spec->autocfg.mono_out_pin, dir);
3908 hda_nid_t conn_list[1];
3909
3910 /* get the mixer node and then the mono mux if it exists */
3911 if (snd_hda_get_connections(codec,
3912 spec->autocfg.mono_out_pin, conn_list, 1) &&
3913 snd_hda_get_connections(codec, conn_list[0],
16a433d8 3914 conn_list, 1) > 0) {
09a99959
MR
3915
3916 int wcaps = get_wcaps(codec, conn_list[0]);
a22d543a 3917 int wid_type = get_wcaps_type(wcaps);
09a99959
MR
3918 /* LR swap check, some stac925x have a mux that
3919 * changes the DACs output path instead of the
3920 * mono-mux path.
3921 */
3922 if (wid_type == AC_WID_AUD_SEL &&
3923 !(wcaps & AC_WCAP_LR_SWAP))
3924 spec->mono_nid = conn_list[0];
3925 }
d0513fc6
MR
3926 if (dir) {
3927 hda_nid_t nid = spec->autocfg.mono_out_pin;
3928
3929 /* most mono outs have a least a mute/unmute switch */
3930 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3931 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3932 "Mono Playback Switch",
3933 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR
3934 if (err < 0)
3935 return err;
d0513fc6
MR
3936 /* check for volume support for the amp */
3937 if ((caps & AC_AMPCAP_NUM_STEPS)
3938 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3939 err = stac92xx_add_control(spec,
3940 STAC_CTL_WIDGET_VOL,
3941 "Mono Playback Volume",
3942 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3943 if (err < 0)
3944 return err;
3945 }
09a99959
MR
3946 }
3947
3948 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3949 AC_PINCTL_OUT_EN);
3950 }
bcecd9bd 3951
c21ca4a8
TI
3952 if (!spec->multiout.num_dacs) {
3953 err = stac92xx_auto_fill_dac_nids(codec);
3954 if (err < 0)
19039bd0 3955 return err;
c9280d68
TI
3956 err = stac92xx_auto_create_multi_out_ctls(codec,
3957 &spec->autocfg);
3958 if (err < 0)
3959 return err;
c21ca4a8 3960 }
c7d4b2fa 3961
1cd2224c
MR
3962 /* setup analog beep controls */
3963 if (spec->anabeep_nid > 0) {
3964 err = stac92xx_auto_create_beep_ctls(codec,
3965 spec->anabeep_nid);
3966 if (err < 0)
3967 return err;
3968 }
3969
3970 /* setup digital beep controls and input device */
3971#ifdef CONFIG_SND_HDA_INPUT_BEEP
3972 if (spec->digbeep_nid > 0) {
3973 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3974 unsigned int caps;
1cd2224c
MR
3975
3976 err = stac92xx_auto_create_beep_ctls(codec, nid);
3977 if (err < 0)
3978 return err;
3979 err = snd_hda_attach_beep_device(codec, nid);
3980 if (err < 0)
3981 return err;
d8d881dd
TI
3982 if (codec->beep) {
3983 /* IDT/STAC codecs have linear beep tone parameter */
1b0e372d 3984 codec->beep->linear_tone = spec->linear_tone_beep;
d8d881dd
TI
3985 /* if no beep switch is available, make its own one */
3986 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3987 if (!(caps & AC_AMPCAP_MUTE)) {
3988 err = stac92xx_beep_switch_ctl(codec);
3989 if (err < 0)
3990 return err;
3991 }
4d4e9bb3 3992 }
1cd2224c
MR
3993 }
3994#endif
3995
0fb87bb4 3996 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
0fb87bb4
ML
3997 if (err < 0)
3998 return err;
3999
dc04d1b4
TI
4000 /* All output parsing done, now restore the swapped hp pins */
4001 if (hp_swap) {
4002 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
4003 sizeof(spec->autocfg.hp_pins));
4004 spec->autocfg.hp_outs = spec->autocfg.line_outs;
4005 spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
4006 spec->autocfg.line_outs = 0;
4007 }
0fb87bb4 4008
3d21d3f7
TI
4009 if (stac_check_auto_mic(codec)) {
4010 spec->auto_mic = 1;
4011 /* only one capture for auto-mic */
4012 spec->num_adcs = 1;
4013 spec->num_caps = 1;
4014 spec->num_muxes = 1;
4015 }
4016
6479c631
TI
4017 for (i = 0; i < spec->num_caps; i++) {
4018 err = stac92xx_add_capvol_ctls(codec, spec->capvols[i],
4019 spec->capsws[i], i);
4020 if (err < 0)
4021 return err;
4022 }
4023
dc04d1b4 4024 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
0fb87bb4 4025 if (err < 0)
c7d4b2fa
M
4026 return err;
4027
b22b4821
MR
4028 if (spec->mono_nid > 0) {
4029 err = stac92xx_auto_create_mono_output_ctls(codec);
4030 if (err < 0)
4031 return err;
4032 }
2a9c7816 4033 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP
4034 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
4035 &spec->autocfg)) < 0)
4036 return err;
4682eee0
MR
4037 if (spec->num_muxes > 0) {
4038 err = stac92xx_auto_create_mux_input_ctls(codec);
4039 if (err < 0)
4040 return err;
4041 }
d9737751
MR
4042 if (spec->num_smuxes > 0) {
4043 err = stac92xx_auto_create_spdif_mux_ctls(codec);
4044 if (err < 0)
4045 return err;
4046 }
8b65727b 4047
e3c75964
TI
4048 err = stac92xx_add_input_source(spec);
4049 if (err < 0)
4050 return err;
4051
c7d4b2fa 4052 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 4053 if (spec->multiout.max_channels > 2)
c7d4b2fa 4054 spec->surr_switch = 1;
c7d4b2fa 4055
9009b0e4
CC
4056 /* find digital out and in converters */
4057 for (i = codec->start_nid; i < codec->start_nid + codec->num_nodes; i++) {
4058 unsigned int wid_caps = get_wcaps(codec, i);
4059 if (wid_caps & AC_WCAP_DIGITAL) {
4060 switch (get_wcaps_type(wid_caps)) {
4061 case AC_WID_AUD_OUT:
4062 if (!dig_out)
4063 dig_out = i;
4064 break;
4065 case AC_WID_AUD_IN:
4066 if (!dig_in)
4067 dig_in = i;
4068 break;
4069 }
4070 }
4071 }
0852d7a6 4072 if (spec->autocfg.dig_outs)
3cc08dc6 4073 spec->multiout.dig_out_nid = dig_out;
d0513fc6 4074 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 4075 spec->dig_in_nid = dig_in;
c7d4b2fa 4076
603c4019
TI
4077 if (spec->kctls.list)
4078 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
4079
4080 spec->input_mux = &spec->private_imux;
f8ccbf65
MR
4081 if (!spec->dinput_mux)
4082 spec->dinput_mux = &spec->private_dimux;
d9737751 4083 spec->sinput_mux = &spec->private_smux;
b22b4821 4084 spec->mono_mux = &spec->private_mono_mux;
c7d4b2fa
M
4085 return 1;
4086}
4087
82bc955f
TI
4088/* add playback controls for HP output */
4089static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
4090 struct auto_pin_cfg *cfg)
4091{
4092 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 4093 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI
4094
4095 if (! pin)
4096 return 0;
4097
e35d9d6a 4098 if (is_jack_detectable(codec, pin))
82bc955f 4099 spec->hp_detect = 1;
82bc955f
TI
4100
4101 return 0;
4102}
4103
160ea0dc
RF
4104/* add playback controls for LFE output */
4105static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
4106 struct auto_pin_cfg *cfg)
4107{
4108 struct sigmatel_spec *spec = codec->spec;
4109 int err;
4110 hda_nid_t lfe_pin = 0x0;
4111 int i;
4112
4113 /*
4114 * search speaker outs and line outs for a mono speaker pin
4115 * with an amp. If one is found, add LFE controls
4116 * for it.
4117 */
4118 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
4119 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 4120 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
4121 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4122 if (wcaps == AC_WCAP_OUT_AMP)
4123 /* found a mono speaker with an amp, must be lfe */
4124 lfe_pin = pin;
4125 }
4126
4127 /* if speaker_outs is 0, then speakers may be in line_outs */
4128 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
4129 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
4130 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 4131 unsigned int defcfg;
330ee995 4132 defcfg = snd_hda_codec_get_pincfg(codec, pin);
8b551785 4133 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 4134 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF
4135 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
4136 if (wcaps == AC_WCAP_OUT_AMP)
4137 /* found a mono speaker with an amp,
4138 must be lfe */
4139 lfe_pin = pin;
4140 }
4141 }
4142 }
4143
4144 if (lfe_pin) {
7c7767eb 4145 err = create_controls(codec, "LFE", lfe_pin, 1);
160ea0dc
RF
4146 if (err < 0)
4147 return err;
4148 }
4149
4150 return 0;
4151}
4152
c7d4b2fa
M
4153static int stac9200_parse_auto_config(struct hda_codec *codec)
4154{
4155 struct sigmatel_spec *spec = codec->spec;
4156 int err;
4157
df694daa 4158 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M
4159 return err;
4160
4161 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
4162 return err;
4163
82bc955f
TI
4164 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
4165 return err;
4166
160ea0dc
RF
4167 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
4168 return err;
4169
355a0ec4
TI
4170 if (spec->num_muxes > 0) {
4171 err = stac92xx_auto_create_mux_input_ctls(codec);
4172 if (err < 0)
4173 return err;
4174 }
4175
e3c75964
TI
4176 err = stac92xx_add_input_source(spec);
4177 if (err < 0)
4178 return err;
4179
0852d7a6 4180 if (spec->autocfg.dig_outs)
c7d4b2fa 4181 spec->multiout.dig_out_nid = 0x05;
82bc955f 4182 if (spec->autocfg.dig_in_pin)
c7d4b2fa 4183 spec->dig_in_nid = 0x04;
c7d4b2fa 4184
603c4019
TI
4185 if (spec->kctls.list)
4186 spec->mixers[spec->num_mixers++] = spec->kctls.list;
c7d4b2fa
M
4187
4188 spec->input_mux = &spec->private_imux;
8b65727b 4189 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M
4190
4191 return 1;
4192}
4193
62fe78e9
SR
4194/*
4195 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
4196 * funky external mute control using GPIO pins.
4197 */
4198
76e1ddfb 4199static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 4200 unsigned int dir_mask, unsigned int data)
62fe78e9
SR
4201{
4202 unsigned int gpiostate, gpiomask, gpiodir;
4203
45eebda7
VK
4204 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
4205
62fe78e9
SR
4206 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
4207 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 4208 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR
4209
4210 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
4211 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 4212 gpiomask |= mask;
62fe78e9
SR
4213
4214 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
4215 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 4216 gpiodir |= dir_mask;
62fe78e9 4217
76e1ddfb 4218 /* Configure GPIOx as CMOS */
62fe78e9
SR
4219 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
4220
4221 snd_hda_codec_write(codec, codec->afg, 0,
4222 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI
4223 snd_hda_codec_read(codec, codec->afg, 0,
4224 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR
4225
4226 msleep(1);
4227
76e1ddfb
TI
4228 snd_hda_codec_read(codec, codec->afg, 0,
4229 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR
4230}
4231
3a93897e 4232static int stac_add_event(struct hda_codec *codec, hda_nid_t nid,
c6e4c666 4233 unsigned char type, int data)
74aeaabc 4234{
3a93897e 4235 struct hda_jack_tbl *event;
74aeaabc 4236
3a93897e 4237 event = snd_hda_jack_tbl_new(codec, nid);
74aeaabc
MR
4238 if (!event)
4239 return -ENOMEM;
3a93897e
TI
4240 event->action = type;
4241 event->private_data = data;
c6e4c666 4242
3a93897e 4243 return 0;
c6e4c666
TI
4244}
4245
29adc4b9
DH
4246static void handle_unsol_event(struct hda_codec *codec,
4247 struct hda_jack_tbl *event);
4248
62558ce1
TI
4249/* check if given nid is a valid pin and no other events are assigned
4250 * to it. If OK, assign the event, set the unsol flag, and returns 1.
4251 * Otherwise, returns zero.
4252 */
4253static int enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
4254 unsigned int type)
c6e4c666 4255{
3a93897e 4256 struct hda_jack_tbl *event;
c6e4c666 4257
e35d9d6a 4258 if (!is_jack_detectable(codec, nid))
62558ce1 4259 return 0;
3a93897e
TI
4260 event = snd_hda_jack_tbl_new(codec, nid);
4261 if (!event)
4262 return -ENOMEM;
4263 if (event->action && event->action != type)
4264 return 0;
4265 event->action = type;
29adc4b9 4266 event->callback = handle_unsol_event;
3a93897e 4267 snd_hda_jack_detect_enable(codec, nid, 0);
62558ce1 4268 return 1;
314634bc
TI
4269}
4270
b4ead019 4271static int is_nid_out_jack_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
a64135a2
MR
4272{
4273 int i;
4274 for (i = 0; i < cfg->hp_outs; i++)
4275 if (cfg->hp_pins[i] == nid)
4276 return 1; /* nid is a HP-Out */
b4ead019
TI
4277 for (i = 0; i < cfg->line_outs; i++)
4278 if (cfg->line_out_pins[i] == nid)
4279 return 1; /* nid is a line-Out */
a64135a2
MR
4280 return 0; /* nid is not a HP-Out */
4281};
4282
b76c850f
MR
4283static void stac92xx_power_down(struct hda_codec *codec)
4284{
4285 struct sigmatel_spec *spec = codec->spec;
4286
4287 /* power down inactive DACs */
2b63536f 4288 const hda_nid_t *dac;
b76c850f 4289 for (dac = spec->dac_list; *dac; dac++)
c21ca4a8 4290 if (!check_all_dac_nids(spec, *dac))
8c2f767b 4291 snd_hda_codec_write(codec, *dac, 0,
b76c850f
MR
4292 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
4293}
4294
f73d3585
TI
4295static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4296 int enable);
4297
bc759721
TI
4298static inline bool get_int_hint(struct hda_codec *codec, const char *key,
4299 int *valp)
014c41fc 4300{
bc759721 4301 return !snd_hda_get_int_hint(codec, key, valp);
014c41fc
TI
4302}
4303
6565e4fa
TI
4304/* override some hints from the hwdep entry */
4305static void stac_store_hints(struct hda_codec *codec)
4306{
4307 struct sigmatel_spec *spec = codec->spec;
6565e4fa
TI
4308 int val;
4309
4310 val = snd_hda_get_bool_hint(codec, "hp_detect");
4311 if (val >= 0)
4312 spec->hp_detect = val;
014c41fc 4313 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
6565e4fa
TI
4314 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
4315 spec->gpio_mask;
4316 }
014c41fc
TI
4317 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
4318 spec->gpio_mask &= spec->gpio_mask;
4319 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
4320 spec->gpio_dir &= spec->gpio_mask;
4321 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
4322 spec->eapd_mask &= spec->gpio_mask;
4323 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
4324 spec->gpio_mute &= spec->gpio_mask;
6565e4fa
TI
4325 val = snd_hda_get_bool_hint(codec, "eapd_switch");
4326 if (val >= 0)
4327 spec->eapd_switch = val;
4328}
4329
f2cbba76
TI
4330static void stac_issue_unsol_events(struct hda_codec *codec, int num_pins,
4331 const hda_nid_t *pins)
4332{
4333 while (num_pins--)
4334 stac_issue_unsol_event(codec, *pins++);
4335}
4336
4337/* fake event to set up pins */
4338static void stac_fake_hp_events(struct hda_codec *codec)
4339{
4340 struct sigmatel_spec *spec = codec->spec;
4341
4342 if (spec->autocfg.hp_outs)
4343 stac_issue_unsol_events(codec, spec->autocfg.hp_outs,
4344 spec->autocfg.hp_pins);
4345 if (spec->autocfg.line_outs &&
4346 spec->autocfg.line_out_pins[0] != spec->autocfg.hp_pins[0])
4347 stac_issue_unsol_events(codec, spec->autocfg.line_outs,
4348 spec->autocfg.line_out_pins);
4349}
4350
c7d4b2fa
M
4351static int stac92xx_init(struct hda_codec *codec)
4352{
4353 struct sigmatel_spec *spec = codec->spec;
82bc955f 4354 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 4355 unsigned int gpio;
e4973e1e 4356 int i;
c7d4b2fa 4357
5e68fb3c
DH
4358 if (spec->init)
4359 snd_hda_sequence_write(codec, spec->init);
c7d4b2fa 4360
8daaaa97
MR
4361 /* power down adcs initially */
4362 if (spec->powerdown_adcs)
4363 for (i = 0; i < spec->num_adcs; i++)
8c2f767b 4364 snd_hda_codec_write(codec,
8daaaa97
MR
4365 spec->adc_nids[i], 0,
4366 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585 4367
6565e4fa
TI
4368 /* override some hints */
4369 stac_store_hints(codec);
4370
f73d3585
TI
4371 /* set up GPIO */
4372 gpio = spec->gpio_data;
4373 /* turn on EAPD statically when spec->eapd_switch isn't set.
4374 * otherwise, unsol event will turn it on/off dynamically
4375 */
4376 if (!spec->eapd_switch)
4377 gpio |= spec->eapd_mask;
4378 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
4379
82bc955f
TI
4380 /* set up pins */
4381 if (spec->hp_detect) {
505cb341 4382 /* Enable unsolicited responses on the HP widget */
74aeaabc 4383 for (i = 0; i < cfg->hp_outs; i++) {
74aeaabc 4384 hda_nid_t nid = cfg->hp_pins[i];
c6e4c666 4385 enable_pin_detect(codec, nid, STAC_HP_EVENT);
74aeaabc 4386 }
1c4bdf9b
TI
4387 if (cfg->line_out_type == AUTO_PIN_LINE_OUT &&
4388 cfg->speaker_outs > 0) {
fefd67f3 4389 /* enable pin-detect for line-outs as well */
15cfa2b3
TI
4390 for (i = 0; i < cfg->line_outs; i++) {
4391 hda_nid_t nid = cfg->line_out_pins[i];
fefd67f3
TI
4392 enable_pin_detect(codec, nid, STAC_LO_EVENT);
4393 }
4394 }
4395
0a07acaf
TI
4396 /* force to enable the first line-out; the others are set up
4397 * in unsol_event
4398 */
4399 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
74aeaabc 4400 AC_PINCTL_OUT_EN);
82bc955f 4401 /* fake event to set up pins */
f2cbba76 4402 stac_fake_hp_events(codec);
82bc955f
TI
4403 } else {
4404 stac92xx_auto_init_multi_out(codec);
4405 stac92xx_auto_init_hp_out(codec);
12dde4c6
TI
4406 for (i = 0; i < cfg->hp_outs; i++)
4407 stac_toggle_power_map(codec, cfg->hp_pins[i], 1);
82bc955f 4408 }
3d21d3f7 4409 if (spec->auto_mic) {
15b4f296 4410 /* initialize connection to analog input */
da2a2aaa
TI
4411 if (spec->dmux_nids)
4412 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
15b4f296 4413 AC_VERB_SET_CONNECT_SEL, 0);
3d21d3f7
TI
4414 if (enable_pin_detect(codec, spec->ext_mic.pin, STAC_MIC_EVENT))
4415 stac_issue_unsol_event(codec, spec->ext_mic.pin);
9907790a
CC
4416 if (enable_pin_detect(codec, spec->dock_mic.pin,
4417 STAC_MIC_EVENT))
4418 stac_issue_unsol_event(codec, spec->dock_mic.pin);
3d21d3f7 4419 }
eea7dc93
TI
4420 for (i = 0; i < cfg->num_inputs; i++) {
4421 hda_nid_t nid = cfg->inputs[i].pin;
4422 int type = cfg->inputs[i].type;
4423 unsigned int pinctl, conf;
86e2959a 4424 if (type == AUTO_PIN_MIC) {
eea7dc93 4425 /* for mic pins, force to initialize */
4740860b 4426 pinctl = snd_hda_get_default_vref(codec, nid);
eea7dc93
TI
4427 pinctl |= AC_PINCTL_IN_EN;
4428 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4429 } else {
4430 pinctl = snd_hda_codec_read(codec, nid, 0,
4431 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4432 /* if PINCTL already set then skip */
4433 /* Also, if both INPUT and OUTPUT are set,
4434 * it must be a BIOS bug; need to override, too
4435 */
4436 if (!(pinctl & AC_PINCTL_IN_EN) ||
4437 (pinctl & AC_PINCTL_OUT_EN)) {
4438 pinctl &= ~AC_PINCTL_OUT_EN;
12dde4c6
TI
4439 pinctl |= AC_PINCTL_IN_EN;
4440 stac92xx_auto_set_pinctl(codec, nid, pinctl);
4f1e6bc3 4441 }
c960a03b 4442 }
eea7dc93
TI
4443 conf = snd_hda_codec_get_pincfg(codec, nid);
4444 if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
4445 if (enable_pin_detect(codec, nid, STAC_INSERT_EVENT))
4446 stac_issue_unsol_event(codec, nid);
4447 }
82bc955f 4448 }
a64135a2
MR
4449 for (i = 0; i < spec->num_dmics; i++)
4450 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
4451 AC_PINCTL_IN_EN);
0852d7a6
TI
4452 if (cfg->dig_out_pins[0])
4453 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
f73d3585
TI
4454 AC_PINCTL_OUT_EN);
4455 if (cfg->dig_in_pin)
4456 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
4457 AC_PINCTL_IN_EN);
a64135a2 4458 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585 4459 hda_nid_t nid = spec->pwr_nids[i];
6e1c39c6 4460 unsigned int pinctl, def_conf;
f73d3585 4461
bfc89dec
TI
4462 def_conf = snd_hda_codec_get_pincfg(codec, nid);
4463 def_conf = get_defcfg_connect(def_conf);
4464 if (def_conf == AC_JACK_PORT_NONE) {
4465 /* power off unused ports */
4466 stac_toggle_power_map(codec, nid, 0);
4467 continue;
4468 }
6e1c39c6
TI
4469 if (def_conf == AC_JACK_PORT_FIXED) {
4470 /* no need for jack detection for fixed pins */
4471 stac_toggle_power_map(codec, nid, 1);
4472 continue;
4473 }
eb632128 4474 /* power on when no jack detection is available */
542c9a0a
TI
4475 /* or when the VREF is used for controlling LED */
4476 if (!spec->hp_detect ||
bfc89dec
TI
4477 spec->vref_mute_led_nid == nid ||
4478 !is_jack_detectable(codec, nid)) {
eb632128
TI
4479 stac_toggle_power_map(codec, nid, 1);
4480 continue;
4481 }
4482
b4ead019 4483 if (is_nid_out_jack_pin(cfg, nid))
f73d3585
TI
4484 continue; /* already has an unsol event */
4485
4486 pinctl = snd_hda_codec_read(codec, nid, 0,
4487 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR
4488 /* outputs are only ports capable of power management
4489 * any attempts on powering down a input port cause the
4490 * referenced VREF to act quirky.
4491 */
eb632128
TI
4492 if (pinctl & AC_PINCTL_IN_EN) {
4493 stac_toggle_power_map(codec, nid, 1);
a64135a2 4494 continue;
eb632128 4495 }
afef2cfa 4496 if (enable_pin_detect(codec, nid, STAC_PWR_EVENT)) {
62558ce1 4497 stac_issue_unsol_event(codec, nid);
afef2cfa
CC
4498 continue;
4499 }
4500 /* none of the above, turn the port OFF */
4501 stac_toggle_power_map(codec, nid, 0);
a64135a2 4502 }
c21bd025 4503
c21bd025 4504 /* sync mute LED */
1f43f6c1
TI
4505 if (spec->gpio_led) {
4506 if (spec->vmaster_mute.hook)
4507 snd_hda_sync_vmaster_hook(&spec->vmaster_mute);
4508 else /* the very first init call doesn't have vmaster yet */
4509 stac92xx_update_led_status(codec, false);
4510 }
c882246d
TI
4511
4512 /* sync the power-map */
4513 if (spec->num_pwrs)
4514 snd_hda_codec_write(codec, codec->afg, 0,
4515 AC_VERB_IDT_SET_POWER_MAP,
4516 spec->power_map_bits);
b76c850f
MR
4517 if (spec->dac_list)
4518 stac92xx_power_down(codec);
c7d4b2fa
M
4519 return 0;
4520}
4521
603c4019
TI
4522static void stac92xx_free_kctls(struct hda_codec *codec)
4523{
4524 struct sigmatel_spec *spec = codec->spec;
4525
4526 if (spec->kctls.list) {
4527 struct snd_kcontrol_new *kctl = spec->kctls.list;
4528 int i;
4529 for (i = 0; i < spec->kctls.used; i++)
4530 kfree(kctl[i].name);
4531 }
4532 snd_array_free(&spec->kctls);
4533}
4534
45eebda7
VK
4535static void stac92xx_shutup_pins(struct hda_codec *codec)
4536{
4537 unsigned int i, def_conf;
4538
4539 if (codec->bus->shutdown)
4540 return;
4541 for (i = 0; i < codec->init_pins.used; i++) {
4542 struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
4543 def_conf = snd_hda_codec_get_pincfg(codec, pin->nid);
4544 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE)
cdd03ced 4545 snd_hda_set_pin_ctl(codec, pin->nid, 0);
45eebda7
VK
4546 }
4547}
4548
167eae5a
TI
4549static void stac92xx_shutup(struct hda_codec *codec)
4550{
4551 struct sigmatel_spec *spec = codec->spec;
167eae5a 4552
45eebda7 4553 stac92xx_shutup_pins(codec);
167eae5a
TI
4554
4555 if (spec->eapd_mask)
4556 stac_gpio_set(codec, spec->gpio_mask,
4557 spec->gpio_dir, spec->gpio_data &
4558 ~spec->eapd_mask);
4559}
4560
2f2f4251
M
4561static void stac92xx_free(struct hda_codec *codec)
4562{
c7d4b2fa 4563 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M
4564
4565 if (! spec)
4566 return;
4567
c7d4b2fa 4568 kfree(spec);
1cd2224c 4569 snd_hda_detach_beep_device(codec);
2f2f4251
M
4570}
4571
4e55096e
M
4572static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
4573 unsigned int flag)
4574{
8ce84198
TI
4575 unsigned int old_ctl, pin_ctl;
4576
4577 pin_ctl = snd_hda_codec_read(codec, nid,
4e55096e 4578 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 4579
f9acba43
TI
4580 if (pin_ctl & AC_PINCTL_IN_EN) {
4581 /*
4582 * we need to check the current set-up direction of
4583 * shared input pins since they can be switched via
4584 * "xxx as Output" mixer switch
4585 */
4586 struct sigmatel_spec *spec = codec->spec;
c21ca4a8 4587 if (nid == spec->line_switch || nid == spec->mic_switch)
f9acba43
TI
4588 return;
4589 }
4590
8ce84198 4591 old_ctl = pin_ctl;
7b043899
SL
4592 /* if setting pin direction bits, clear the current
4593 direction bits first */
4594 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
4595 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
4596
8ce84198
TI
4597 pin_ctl |= flag;
4598 if (old_ctl != pin_ctl)
cdd03ced 4599 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl);
4e55096e
M
4600}
4601
4602static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
4603 unsigned int flag)
4604{
4605 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
4606 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
8ce84198 4607 if (pin_ctl & flag)
cdd03ced 4608 snd_hda_set_pin_ctl_cache(codec, nid, pin_ctl & ~flag);
4e55096e
M
4609}
4610
d56757ab 4611static inline int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI
4612{
4613 if (!nid)
4614 return 0;
a252c81a 4615 return snd_hda_jack_detect(codec, nid);
314634bc
TI
4616}
4617
fefd67f3
TI
4618static void stac92xx_line_out_detect(struct hda_codec *codec,
4619 int presence)
4620{
4621 struct sigmatel_spec *spec = codec->spec;
4622 struct auto_pin_cfg *cfg = &spec->autocfg;
4623 int i;
4624
042b92c1
DH
4625 if (cfg->speaker_outs == 0)
4626 return;
4627
fefd67f3
TI
4628 for (i = 0; i < cfg->line_outs; i++) {
4629 if (presence)
4630 break;
4631 presence = get_pin_presence(codec, cfg->line_out_pins[i]);
4632 if (presence) {
4633 unsigned int pinctl;
4634 pinctl = snd_hda_codec_read(codec,
4635 cfg->line_out_pins[i], 0,
4636 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4637 if (pinctl & AC_PINCTL_IN_EN)
4638 presence = 0; /* mic- or line-input */
4639 }
4640 }
4641
4642 if (presence) {
4643 /* disable speakers */
4644 for (i = 0; i < cfg->speaker_outs; i++)
4645 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
4646 AC_PINCTL_OUT_EN);
4647 if (spec->eapd_mask && spec->eapd_switch)
4648 stac_gpio_set(codec, spec->gpio_mask,
4649 spec->gpio_dir, spec->gpio_data &
4650 ~spec->eapd_mask);
4651 } else {
4652 /* enable speakers */
4653 for (i = 0; i < cfg->speaker_outs; i++)
4654 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
4655 AC_PINCTL_OUT_EN);
4656 if (spec->eapd_mask && spec->eapd_switch)
4657 stac_gpio_set(codec, spec->gpio_mask,
4658 spec->gpio_dir, spec->gpio_data |
4659 spec->eapd_mask);
4660 }
4661}
4662
d7a89436
TI
4663/* return non-zero if the hp-pin of the given array index isn't
4664 * a jack-detection target
4665 */
4666static int no_hp_sensing(struct sigmatel_spec *spec, int i)
4667{
4668 struct auto_pin_cfg *cfg = &spec->autocfg;
4669
4670 /* ignore sensing of shared line and mic jacks */
c21ca4a8 4671 if (cfg->hp_pins[i] == spec->line_switch)
d7a89436 4672 return 1;
c21ca4a8 4673 if (cfg->hp_pins[i] == spec->mic_switch)
d7a89436
TI
4674 return 1;
4675 /* ignore if the pin is set as line-out */
4676 if (cfg->hp_pins[i] == spec->hp_switch)
4677 return 1;
4678 return 0;
4679}
4680
c6e4c666 4681static void stac92xx_hp_detect(struct hda_codec *codec)
4e55096e
M
4682{
4683 struct sigmatel_spec *spec = codec->spec;
4684 struct auto_pin_cfg *cfg = &spec->autocfg;
4685 int i, presence;
4686
eb06ed8f 4687 presence = 0;
4fe5195c
MR
4688 if (spec->gpio_mute)
4689 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
4690 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
4691
eb06ed8f 4692 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI
4693 if (presence)
4694 break;
d7a89436
TI
4695 if (no_hp_sensing(spec, i))
4696 continue;
e6e3ea25
TI
4697 presence = get_pin_presence(codec, cfg->hp_pins[i]);
4698 if (presence) {
4699 unsigned int pinctl;
4700 pinctl = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
4701 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4702 if (pinctl & AC_PINCTL_IN_EN)
4703 presence = 0; /* mic- or line-input */
4704 }
eb06ed8f 4705 }
4e55096e
M
4706
4707 if (presence) {
d7a89436 4708 /* disable lineouts */
7c2ba97b 4709 if (spec->hp_switch)
d7a89436
TI
4710 stac92xx_reset_pinctl(codec, spec->hp_switch,
4711 AC_PINCTL_OUT_EN);
4e55096e
M
4712 for (i = 0; i < cfg->line_outs; i++)
4713 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
4714 AC_PINCTL_OUT_EN);
4e55096e 4715 } else {
d7a89436 4716 /* enable lineouts */
7c2ba97b 4717 if (spec->hp_switch)
d7a89436
TI
4718 stac92xx_set_pinctl(codec, spec->hp_switch,
4719 AC_PINCTL_OUT_EN);
4e55096e
M
4720 for (i = 0; i < cfg->line_outs; i++)
4721 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
4722 AC_PINCTL_OUT_EN);
4e55096e 4723 }
fefd67f3 4724 stac92xx_line_out_detect(codec, presence);
d7a89436
TI
4725 /* toggle hp outs */
4726 for (i = 0; i < cfg->hp_outs; i++) {
4727 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
4728 if (no_hp_sensing(spec, i))
4729 continue;
7bff172a 4730 if (1 /*presence*/)
d7a89436 4731 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0
TI
4732#if 0 /* FIXME */
4733/* Resetting the pinctl like below may lead to (a sort of) regressions
4734 * on some devices since they use the HP pin actually for line/speaker
4735 * outs although the default pin config shows a different pin (that is
4736 * wrong and useless).
4737 *
4738 * So, it's basically a problem of default pin configs, likely a BIOS issue.
4739 * But, disabling the code below just works around it, and I'm too tired of
4740 * bug reports with such devices...
4741 */
d7a89436
TI
4742 else
4743 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
8317e0b0 4744#endif /* FIXME */
d7a89436 4745 }
4e55096e
M
4746}
4747
f73d3585
TI
4748static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
4749 int enable)
a64135a2
MR
4750{
4751 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI
4752 unsigned int idx, val;
4753
4754 for (idx = 0; idx < spec->num_pwrs; idx++) {
4755 if (spec->pwr_nids[idx] == nid)
4756 break;
4757 }
4758 if (idx >= spec->num_pwrs)
4759 return;
d0513fc6 4760
afef2cfa 4761 idx = 1 << idx;
a64135a2 4762
c882246d 4763 val = spec->power_map_bits;
f73d3585 4764 if (enable)
a64135a2
MR
4765 val &= ~idx;
4766 else
4767 val |= idx;
4768
4769 /* power down unused output ports */
c882246d
TI
4770 if (val != spec->power_map_bits) {
4771 spec->power_map_bits = val;
4772 snd_hda_codec_write(codec, codec->afg, 0,
4773 AC_VERB_IDT_SET_POWER_MAP, val);
4774 }
74aeaabc
MR
4775}
4776
f73d3585
TI
4777static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4778{
e6e3ea25 4779 stac_toggle_power_map(codec, nid, get_pin_presence(codec, nid));
f73d3585 4780}
a64135a2 4781
ab5a6ebe
VK
4782/* get the pin connection (fixed, none, etc) */
4783static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
4784{
4785 struct sigmatel_spec *spec = codec->spec;
4786 unsigned int cfg;
4787
4788 cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
4789 return get_defcfg_connect(cfg);
4790}
4791
4792static int stac92xx_connected_ports(struct hda_codec *codec,
2b63536f 4793 const hda_nid_t *nids, int num_nids)
ab5a6ebe
VK
4794{
4795 struct sigmatel_spec *spec = codec->spec;
4796 int idx, num;
4797 unsigned int def_conf;
4798
4799 for (num = 0; num < num_nids; num++) {
4800 for (idx = 0; idx < spec->num_pins; idx++)
4801 if (spec->pin_nids[idx] == nids[num])
4802 break;
4803 if (idx >= spec->num_pins)
4804 break;
4805 def_conf = stac_get_defcfg_connect(codec, idx);
4806 if (def_conf == AC_JACK_PORT_NONE)
4807 break;
4808 }
4809 return num;
4810}
4811
3d21d3f7
TI
4812static void stac92xx_mic_detect(struct hda_codec *codec)
4813{
4814 struct sigmatel_spec *spec = codec->spec;
4815 struct sigmatel_mic_route *mic;
4816
4817 if (get_pin_presence(codec, spec->ext_mic.pin))
4818 mic = &spec->ext_mic;
9907790a
CC
4819 else if (get_pin_presence(codec, spec->dock_mic.pin))
4820 mic = &spec->dock_mic;
3d21d3f7
TI
4821 else
4822 mic = &spec->int_mic;
02d33322 4823 if (mic->dmux_idx >= 0)
3d21d3f7
TI
4824 snd_hda_codec_write_cache(codec, spec->dmux_nids[0], 0,
4825 AC_VERB_SET_CONNECT_SEL,
4826 mic->dmux_idx);
02d33322 4827 if (mic->mux_idx >= 0)
3d21d3f7
TI
4828 snd_hda_codec_write_cache(codec, spec->mux_nids[0], 0,
4829 AC_VERB_SET_CONNECT_SEL,
4830 mic->mux_idx);
4831}
4832
1835a0f9 4833static void handle_unsol_event(struct hda_codec *codec,
3a93897e 4834 struct hda_jack_tbl *event)
314634bc 4835{
a64135a2 4836 struct sigmatel_spec *spec = codec->spec;
1835a0f9 4837 int data;
c6e4c666 4838
3a93897e 4839 switch (event->action) {
314634bc 4840 case STAC_HP_EVENT:
fefd67f3 4841 case STAC_LO_EVENT:
16ffe32c 4842 stac92xx_hp_detect(codec);
fefd67f3 4843 break;
3d21d3f7
TI
4844 case STAC_MIC_EVENT:
4845 stac92xx_mic_detect(codec);
4846 break;
4847 }
4848
3a93897e 4849 switch (event->action) {
3d21d3f7 4850 case STAC_HP_EVENT:
fefd67f3 4851 case STAC_LO_EVENT:
3d21d3f7 4852 case STAC_MIC_EVENT:
74aeaabc 4853 case STAC_INSERT_EVENT:
a64135a2 4854 case STAC_PWR_EVENT:
c6e4c666
TI
4855 if (spec->num_pwrs > 0)
4856 stac92xx_pin_sense(codec, event->nid);
fd60cc89
MR
4857
4858 switch (codec->subsystem_id) {
4859 case 0x103c308f:
4860 if (event->nid == 0xb) {
4861 int pin = AC_PINCTL_IN_EN;
4862
4863 if (get_pin_presence(codec, 0xa)
4864 && get_pin_presence(codec, 0xb))
4865 pin |= AC_PINCTL_VREF_80;
4866 if (!get_pin_presence(codec, 0xb))
4867 pin |= AC_PINCTL_VREF_80;
4868
4869 /* toggle VREF state based on mic + hp pin
4870 * status
4871 */
4872 stac92xx_auto_set_pinctl(codec, 0x0a, pin);
4873 }
4874 }
72474be6 4875 break;
c6e4c666
TI
4876 case STAC_VREF_EVENT:
4877 data = snd_hda_codec_read(codec, codec->afg, 0,
4878 AC_VERB_GET_GPIO_DATA, 0);
72474be6
MR
4879 /* toggle VREF state based on GPIOx status */
4880 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
3a93897e 4881 !!(data & (1 << event->private_data)));
72474be6 4882 break;
314634bc
TI
4883 }
4884}
4885
1835a0f9
TI
4886static void stac_issue_unsol_event(struct hda_codec *codec, hda_nid_t nid)
4887{
3a93897e 4888 struct hda_jack_tbl *event = snd_hda_jack_tbl_get(codec, nid);
1835a0f9
TI
4889 if (!event)
4890 return;
4891 handle_unsol_event(codec, event);
4892}
4893
d38cce70
KG
4894static int hp_blike_system(u32 subsystem_id);
4895
4896static void set_hp_led_gpio(struct hda_codec *codec)
4897{
4898 struct sigmatel_spec *spec = codec->spec;
07f80449
TI
4899 unsigned int gpio;
4900
26ebe0a2
TI
4901 if (spec->gpio_led)
4902 return;
4903
07f80449
TI
4904 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
4905 gpio &= AC_GPIO_IO_COUNT;
4906 if (gpio > 3)
4907 spec->gpio_led = 0x08; /* GPIO 3 */
4908 else
4909 spec->gpio_led = 0x01; /* GPIO 0 */
d38cce70
KG
4910}
4911
c357aab0
VK
4912/*
4913 * This method searches for the mute LED GPIO configuration
4914 * provided as OEM string in SMBIOS. The format of that string
4915 * is HP_Mute_LED_P_G or HP_Mute_LED_P
4916 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
4917 * that corresponds to the NOT muted state of the master volume
4918 * and G is the index of the GPIO to use as the mute LED control (0..9)
4919 * If _G portion is missing it is assigned based on the codec ID
4920 *
4921 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
4922 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
d38cce70
KG
4923 *
4924 *
4925 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
4926 * SMBIOS - at least the ones I have seen do not have them - which include
4927 * my own system (HP Pavilion dv6-1110ax) and my cousin's
4928 * HP Pavilion dv9500t CTO.
4929 * Need more information on whether it is true across the entire series.
4930 * -- kunal
c357aab0 4931 */
6a557c94 4932static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
c357aab0
VK
4933{
4934 struct sigmatel_spec *spec = codec->spec;
4935 const struct dmi_device *dev = NULL;
4936
7560931f
TI
4937 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
4938 get_int_hint(codec, "gpio_led_polarity",
4939 &spec->gpio_led_polarity);
4940 return 1;
4941 }
c357aab0
VK
4942 if ((codec->subsystem_id >> 16) == PCI_VENDOR_ID_HP) {
4943 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING,
4944 NULL, dev))) {
45eebda7 4945 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
d38cce70
KG
4946 &spec->gpio_led_polarity,
4947 &spec->gpio_led) == 2) {
f1a73746
TI
4948 unsigned int max_gpio;
4949 max_gpio = snd_hda_param_read(codec, codec->afg,
4950 AC_PAR_GPIO_CAP);
4951 max_gpio &= AC_GPIO_IO_COUNT;
4952 if (spec->gpio_led < max_gpio)
45eebda7 4953 spec->gpio_led = 1 << spec->gpio_led;
f1a73746
TI
4954 else
4955 spec->vref_mute_led_nid = spec->gpio_led;
c357aab0
VK
4956 return 1;
4957 }
4958 if (sscanf(dev->name, "HP_Mute_LED_%d",
d38cce70
KG
4959 &spec->gpio_led_polarity) == 1) {
4960 set_hp_led_gpio(codec);
4961 return 1;
c357aab0 4962 }
e2ef36c6
GMDV
4963 /* BIOS bug: unfilled OEM string */
4964 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
4965 set_hp_led_gpio(codec);
a6a600d1
GMDV
4966 switch (codec->subsystem_id) {
4967 case 0x103c148a:
4968 spec->gpio_led_polarity = 0;
4969 break;
4970 default:
4971 spec->gpio_led_polarity = 1;
4972 break;
4973 }
e2ef36c6
GMDV
4974 return 1;
4975 }
c357aab0 4976 }
d38cce70
KG
4977
4978 /*
4979 * Fallback case - if we don't find the DMI strings,
6a557c94
VK
4980 * we statically set the GPIO - if not a B-series system
4981 * and default polarity is provided
d38cce70 4982 */
6a557c94
VK
4983 if (!hp_blike_system(codec->subsystem_id) &&
4984 (default_polarity == 0 || default_polarity == 1)) {
d38cce70 4985 set_hp_led_gpio(codec);
dce17d4f 4986 spec->gpio_led_polarity = default_polarity;
d38cce70
KG
4987 return 1;
4988 }
c357aab0
VK
4989 }
4990 return 0;
4991}
4992
4993static int hp_blike_system(u32 subsystem_id)
78987bdc
RD
4994{
4995 switch (subsystem_id) {
c357aab0
VK
4996 case 0x103c1520:
4997 case 0x103c1521:
4998 case 0x103c1523:
4999 case 0x103c1524:
5000 case 0x103c1525:
78987bdc
RD
5001 case 0x103c1722:
5002 case 0x103c1723:
5003 case 0x103c1724:
5004 case 0x103c1725:
5005 case 0x103c1726:
5006 case 0x103c1727:
5007 case 0x103c1728:
5008 case 0x103c1729:
c357aab0
VK
5009 case 0x103c172a:
5010 case 0x103c172b:
5011 case 0x103c307e:
5012 case 0x103c307f:
5013 case 0x103c3080:
5014 case 0x103c3081:
5015 case 0x103c7007:
5016 case 0x103c7008:
78987bdc
RD
5017 return 1;
5018 }
5019 return 0;
5020}
5021
2d34e1b3
TI
5022#ifdef CONFIG_PROC_FS
5023static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
5024 struct hda_codec *codec, hda_nid_t nid)
5025{
5026 if (nid == codec->afg)
5027 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
c882246d
TI
5028 snd_hda_codec_read(codec, nid, 0,
5029 AC_VERB_IDT_GET_POWER_MAP, 0));
2d34e1b3
TI
5030}
5031
5032static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
5033 struct hda_codec *codec,
5034 unsigned int verb)
5035{
5036 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
5037 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
5038}
5039
5040/* stac92hd71bxx, stac92hd73xx */
5041static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
5042 struct hda_codec *codec, hda_nid_t nid)
5043{
5044 stac92hd_proc_hook(buffer, codec, nid);
5045 if (nid == codec->afg)
5046 analog_loop_proc_hook(buffer, codec, 0xfa0);
5047}
5048
5049static void stac9205_proc_hook(struct snd_info_buffer *buffer,
5050 struct hda_codec *codec, hda_nid_t nid)
5051{
5052 if (nid == codec->afg)
5053 analog_loop_proc_hook(buffer, codec, 0xfe0);
5054}
5055
5056static void stac927x_proc_hook(struct snd_info_buffer *buffer,
5057 struct hda_codec *codec, hda_nid_t nid)
5058{
5059 if (nid == codec->afg)
5060 analog_loop_proc_hook(buffer, codec, 0xfeb);
5061}
5062#else
5063#define stac92hd_proc_hook NULL
5064#define stac92hd7x_proc_hook NULL
5065#define stac9205_proc_hook NULL
5066#define stac927x_proc_hook NULL
5067#endif
5068
2a43952a 5069#ifdef CONFIG_PM
ff6fdc37
M
5070static int stac92xx_resume(struct hda_codec *codec)
5071{
2c885878 5072 stac92xx_init(codec);
82beb8fd
TI
5073 snd_hda_codec_resume_amp(codec);
5074 snd_hda_codec_resume_cache(codec);
2c885878 5075 /* fake event to set up pins again to override cached values */
f2cbba76 5076 stac_fake_hp_events(codec);
ff6fdc37
M
5077 return 0;
5078}
c6798d2b 5079
68cb2b55 5080static int stac92xx_suspend(struct hda_codec *codec)
45eebda7
VK
5081{
5082 stac92xx_shutup(codec);
5083 return 0;
5084}
5085
45eebda7
VK
5086static void stac92xx_set_power_state(struct hda_codec *codec, hda_nid_t fg,
5087 unsigned int power_state)
5088{
5089 unsigned int afg_power_state = power_state;
5090 struct sigmatel_spec *spec = codec->spec;
5091
5092 if (power_state == AC_PWRST_D3) {
f1a73746 5093 if (spec->vref_mute_led_nid) {
45eebda7
VK
5094 /* with vref-out pin used for mute led control
5095 * codec AFG is prevented from D3 state
5096 */
5097 afg_power_state = AC_PWRST_D1;
5098 }
5099 /* this delay seems necessary to avoid click noise at power-down */
5100 msleep(100);
5101 }
5102 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
5103 afg_power_state);
5104 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
5105}
350eba43
TI
5106#else
5107#define stac92xx_suspend NULL
5108#define stac92xx_resume NULL
350eba43 5109#define stac92xx_set_power_state NULL
2faa3bf1 5110#endif /* CONFIG_PM */
45eebda7 5111
2faa3bf1
TI
5112/* update mute-LED accoring to the master switch */
5113static void stac92xx_update_led_status(struct hda_codec *codec, int enabled)
ae6241fb
CP
5114{
5115 struct sigmatel_spec *spec = codec->spec;
2faa3bf1 5116 int muted = !enabled;
6fce61ae 5117
45eebda7 5118 if (!spec->gpio_led)
2faa3bf1
TI
5119 return;
5120
5121 /* LED state is inverted on these systems */
5122 if (spec->gpio_led_polarity)
5123 muted = !muted;
45eebda7 5124
f1a73746 5125 if (!spec->vref_mute_led_nid) {
45eebda7 5126 if (muted)
3e843196 5127 spec->gpio_data |= spec->gpio_led;
45eebda7 5128 else
3e843196 5129 spec->gpio_data &= ~spec->gpio_led;
45eebda7
VK
5130 stac_gpio_set(codec, spec->gpio_mask,
5131 spec->gpio_dir, spec->gpio_data);
5132 } else {
2faa3bf1 5133 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
f1a73746
TI
5134 stac_vrefout_set(codec, spec->vref_mute_led_nid,
5135 spec->vref_led);
c21bd025 5136 }
b4e81876 5137}
7df1ce1a 5138
2b63536f 5139static const struct hda_codec_ops stac92xx_patch_ops = {
2f2f4251
M
5140 .build_controls = stac92xx_build_controls,
5141 .build_pcms = stac92xx_build_pcms,
5142 .init = stac92xx_init,
5143 .free = stac92xx_free,
29adc4b9 5144 .unsol_event = snd_hda_jack_unsol_event,
2a43952a 5145#ifdef CONFIG_PM
c6798d2b 5146 .suspend = stac92xx_suspend,
ff6fdc37
M
5147 .resume = stac92xx_resume,
5148#endif
fb8d1a34 5149 .reboot_notify = stac92xx_shutup,
2f2f4251
M
5150};
5151
361dab3e
TI
5152static int alloc_stac_spec(struct hda_codec *codec, int num_pins,
5153 const hda_nid_t *pin_nids)
5154{
5155 struct sigmatel_spec *spec;
5156
5157 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5158 if (!spec)
5159 return -ENOMEM;
5160 codec->spec = spec;
5161 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
5162 spec->num_pins = num_pins;
5163 spec->pin_nids = pin_nids;
5164 snd_array_init(&spec->kctls, sizeof(struct snd_kcontrol_new), 32);
5165 return 0;
5166}
5167
2f2f4251
M
5168static int patch_stac9200(struct hda_codec *codec)
5169{
5170 struct sigmatel_spec *spec;
c7d4b2fa 5171 int err;
2f2f4251 5172
361dab3e
TI
5173 err = alloc_stac_spec(codec, ARRAY_SIZE(stac9200_pin_nids),
5174 stac9200_pin_nids);
5175 if (err < 0)
5176 return err;
2f2f4251 5177
361dab3e 5178 spec = codec->spec;
1b0e372d 5179 spec->linear_tone_beep = 1;
f5fcc13c
TI
5180 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
5181 stac9200_models,
5182 stac9200_cfg_tbl);
330ee995 5183 if (spec->board_config < 0)
9a11f1aa
TI
5184 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5185 codec->chip_name);
330ee995
TI
5186 else
5187 stac92xx_set_config_regs(codec,
af9f341a 5188 stac9200_brd_tbl[spec->board_config]);
2f2f4251
M
5189
5190 spec->multiout.max_channels = 2;
5191 spec->multiout.num_dacs = 1;
5192 spec->multiout.dac_nids = stac9200_dac_nids;
5193 spec->adc_nids = stac9200_adc_nids;
5194 spec->mux_nids = stac9200_mux_nids;
dabbed6f 5195 spec->num_muxes = 1;
8b65727b 5196 spec->num_dmics = 0;
9e05b7a3 5197 spec->num_adcs = 1;
a64135a2 5198 spec->num_pwrs = 0;
c7d4b2fa 5199
58eec423
MCC
5200 if (spec->board_config == STAC_9200_M4 ||
5201 spec->board_config == STAC_9200_M4_2 ||
bf277785 5202 spec->board_config == STAC_9200_OQO)
1194b5b7
TI
5203 spec->init = stac9200_eapd_init;
5204 else
5205 spec->init = stac9200_core_init;
2f2f4251 5206 spec->mixer = stac9200_mixer;
c7d4b2fa 5207
117f257d
TI
5208 if (spec->board_config == STAC_9200_PANASONIC) {
5209 spec->gpio_mask = spec->gpio_dir = 0x09;
5210 spec->gpio_data = 0x00;
5211 }
5212
c7d4b2fa
M
5213 err = stac9200_parse_auto_config(codec);
5214 if (err < 0) {
5215 stac92xx_free(codec);
5216 return err;
5217 }
2f2f4251 5218
2acc9dcb
TI
5219 /* CF-74 has no headphone detection, and the driver should *NOT*
5220 * do detection and HP/speaker toggle because the hardware does it.
5221 */
5222 if (spec->board_config == STAC_9200_PANASONIC)
5223 spec->hp_detect = 0;
5224
2f2f4251
M
5225 codec->patch_ops = stac92xx_patch_ops;
5226
5227 return 0;
5228}
5229
8e21c34c
TD
5230static int patch_stac925x(struct hda_codec *codec)
5231{
5232 struct sigmatel_spec *spec;
5233 int err;
5234
361dab3e
TI
5235 err = alloc_stac_spec(codec, ARRAY_SIZE(stac925x_pin_nids),
5236 stac925x_pin_nids);
5237 if (err < 0)
5238 return err;
8e21c34c 5239
361dab3e 5240 spec = codec->spec;
1b0e372d 5241 spec->linear_tone_beep = 1;
9cb36c2a
MCC
5242
5243 /* Check first for codec ID */
5244 spec->board_config = snd_hda_check_board_codec_sid_config(codec,
5245 STAC_925x_MODELS,
5246 stac925x_models,
5247 stac925x_codec_id_cfg_tbl);
5248
5249 /* Now checks for PCI ID, if codec ID is not found */
5250 if (spec->board_config < 0)
5251 spec->board_config = snd_hda_check_board_config(codec,
5252 STAC_925x_MODELS,
8e21c34c
TD
5253 stac925x_models,
5254 stac925x_cfg_tbl);
9e507abd 5255 again:
330ee995 5256 if (spec->board_config < 0)
9a11f1aa
TI
5257 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5258 codec->chip_name);
330ee995
TI
5259 else
5260 stac92xx_set_config_regs(codec,
af9f341a 5261 stac925x_brd_tbl[spec->board_config]);
8e21c34c
TD
5262
5263 spec->multiout.max_channels = 2;
5264 spec->multiout.num_dacs = 1;
5265 spec->multiout.dac_nids = stac925x_dac_nids;
5266 spec->adc_nids = stac925x_adc_nids;
5267 spec->mux_nids = stac925x_mux_nids;
5268 spec->num_muxes = 1;
9e05b7a3 5269 spec->num_adcs = 1;
a64135a2 5270 spec->num_pwrs = 0;
2c11f955
TD
5271 switch (codec->vendor_id) {
5272 case 0x83847632: /* STAC9202 */
5273 case 0x83847633: /* STAC9202D */
5274 case 0x83847636: /* STAC9251 */
5275 case 0x83847637: /* STAC9251D */
f6e9852a 5276 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 5277 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI
5278 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
5279 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD
5280 break;
5281 default:
5282 spec->num_dmics = 0;
5283 break;
5284 }
8e21c34c
TD
5285
5286 spec->init = stac925x_core_init;
5287 spec->mixer = stac925x_mixer;
6479c631
TI
5288 spec->num_caps = 1;
5289 spec->capvols = stac925x_capvols;
5290 spec->capsws = stac925x_capsws;
8e21c34c 5291
9009b0e4 5292 err = stac92xx_parse_auto_config(codec);
9e507abd
TI
5293 if (!err) {
5294 if (spec->board_config < 0) {
5295 printk(KERN_WARNING "hda_codec: No auto-config is "
5296 "available, default to model=ref\n");
5297 spec->board_config = STAC_925x_REF;
5298 goto again;
5299 }
5300 err = -EINVAL;
5301 }
8e21c34c
TD
5302 if (err < 0) {
5303 stac92xx_free(codec);
5304 return err;
5305 }
5306
5307 codec->patch_ops = stac92xx_patch_ops;
5308
5309 return 0;
5310}
5311
e1f0d669
MR
5312static int patch_stac92hd73xx(struct hda_codec *codec)
5313{
5314 struct sigmatel_spec *spec;
5315 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
361dab3e 5316 int err;
c21ca4a8 5317 int num_dacs;
e1f0d669 5318
361dab3e
TI
5319 err = alloc_stac_spec(codec, ARRAY_SIZE(stac92hd73xx_pin_nids),
5320 stac92hd73xx_pin_nids);
5321 if (err < 0)
5322 return err;
e1f0d669 5323
361dab3e 5324 spec = codec->spec;
1b0e372d 5325 spec->linear_tone_beep = 0;
e99d32b3 5326 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR
5327 spec->board_config = snd_hda_check_board_config(codec,
5328 STAC_92HD73XX_MODELS,
5329 stac92hd73xx_models,
5330 stac92hd73xx_cfg_tbl);
842ae638
TI
5331 /* check codec subsystem id if not found */
5332 if (spec->board_config < 0)
5333 spec->board_config =
5334 snd_hda_check_board_codec_sid_config(codec,
5335 STAC_92HD73XX_MODELS, stac92hd73xx_models,
5336 stac92hd73xx_codec_id_cfg_tbl);
e1f0d669 5337again:
330ee995 5338 if (spec->board_config < 0)
9a11f1aa
TI
5339 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5340 codec->chip_name);
330ee995
TI
5341 else
5342 stac92xx_set_config_regs(codec,
af9f341a 5343 stac92hd73xx_brd_tbl[spec->board_config]);
e1f0d669 5344
c21ca4a8 5345 num_dacs = snd_hda_get_connections(codec, 0x0a,
e1f0d669
MR
5346 conn, STAC92HD73_DAC_COUNT + 2) - 1;
5347
c21ca4a8 5348 if (num_dacs < 3 || num_dacs > 5) {
e1f0d669
MR
5349 printk(KERN_WARNING "hda_codec: Could not determine "
5350 "number of channels defaulting to DAC count\n");
c21ca4a8 5351 num_dacs = STAC92HD73_DAC_COUNT;
e1f0d669 5352 }
e2aec171 5353 spec->init = stac92hd73xx_core_init;
c21ca4a8 5354 switch (num_dacs) {
e1f0d669 5355 case 0x3: /* 6 Channel */
d78d7a90 5356 spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
e1f0d669
MR
5357 break;
5358 case 0x4: /* 8 Channel */
d78d7a90 5359 spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
e1f0d669
MR
5360 break;
5361 case 0x5: /* 10 Channel */
d78d7a90
TI
5362 spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
5363 break;
c21ca4a8
TI
5364 }
5365 spec->multiout.dac_nids = spec->dac_nids;
e1f0d669 5366
e1f0d669
MR
5367 spec->aloopback_mask = 0x01;
5368 spec->aloopback_shift = 8;
5369
1cd2224c 5370 spec->digbeep_nid = 0x1c;
e1f0d669
MR
5371 spec->mux_nids = stac92hd73xx_mux_nids;
5372 spec->adc_nids = stac92hd73xx_adc_nids;
5373 spec->dmic_nids = stac92hd73xx_dmic_nids;
5374 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 5375 spec->smux_nids = stac92hd73xx_smux_nids;
e1f0d669
MR
5376
5377 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
5378 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 5379 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816 5380
6479c631
TI
5381 spec->num_caps = STAC92HD73XX_NUM_CAPS;
5382 spec->capvols = stac92hd73xx_capvols;
5383 spec->capsws = stac92hd73xx_capsws;
5384
a7662640 5385 switch (spec->board_config) {
6b3ab21e 5386 case STAC_DELL_EQ:
d654a660 5387 spec->init = dell_eq_core_init;
6b3ab21e 5388 /* fallthru */
661cd8fb
TI
5389 case STAC_DELL_M6_AMIC:
5390 case STAC_DELL_M6_DMIC:
5391 case STAC_DELL_M6_BOTH:
2a9c7816 5392 spec->num_smuxes = 0;
c0cea0d0 5393 spec->eapd_switch = 0;
6b3ab21e 5394
661cd8fb
TI
5395 switch (spec->board_config) {
5396 case STAC_DELL_M6_AMIC: /* Analog Mics */
330ee995 5397 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
a7662640
MR
5398 spec->num_dmics = 0;
5399 break;
661cd8fb 5400 case STAC_DELL_M6_DMIC: /* Digital Mics */
330ee995 5401 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
5402 spec->num_dmics = 1;
5403 break;
661cd8fb 5404 case STAC_DELL_M6_BOTH: /* Both */
330ee995
TI
5405 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
5406 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
a7662640
MR
5407 spec->num_dmics = 1;
5408 break;
5409 }
5410 break;
842ae638
TI
5411 case STAC_ALIENWARE_M17X:
5412 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
5413 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
5414 spec->eapd_switch = 0;
5415 break;
a7662640
MR
5416 default:
5417 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 5418 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
c0cea0d0 5419 spec->eapd_switch = 1;
5207e10e 5420 break;
a7662640 5421 }
af6ee302 5422 if (spec->board_config != STAC_92HD73XX_REF) {
b2c4f4d7
MR
5423 /* GPIO0 High = Enable EAPD */
5424 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
5425 spec->gpio_data = 0x01;
5426 }
a7662640 5427
a64135a2
MR
5428 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
5429 spec->pwr_nids = stac92hd73xx_pwr_nids;
5430
9009b0e4 5431 err = stac92xx_parse_auto_config(codec);
e1f0d669
MR
5432
5433 if (!err) {
5434 if (spec->board_config < 0) {
5435 printk(KERN_WARNING "hda_codec: No auto-config is "
5436 "available, default to model=ref\n");
5437 spec->board_config = STAC_92HD73XX_REF;
5438 goto again;
5439 }
5440 err = -EINVAL;
5441 }
5442
5443 if (err < 0) {
5444 stac92xx_free(codec);
5445 return err;
5446 }
5447
9e43f0de
TI
5448 if (spec->board_config == STAC_92HD73XX_NO_JD)
5449 spec->hp_detect = 0;
5450
e1f0d669
MR
5451 codec->patch_ops = stac92xx_patch_ops;
5452
2d34e1b3
TI
5453 codec->proc_widget_hook = stac92hd7x_proc_hook;
5454
e1f0d669
MR
5455 return 0;
5456}
5457
cbbf50b2 5458static int hp_bnb2011_with_dock(struct hda_codec *codec)
335e3b86
VK
5459{
5460 if (codec->vendor_id != 0x111d7605 &&
5461 codec->vendor_id != 0x111d76d1)
5462 return 0;
5463
5464 switch (codec->subsystem_id) {
5465 case 0x103c1618:
5466 case 0x103c1619:
5467 case 0x103c161a:
5468 case 0x103c161b:
5469 case 0x103c161c:
5470 case 0x103c161d:
5471 case 0x103c161e:
5472 case 0x103c161f:
335e3b86
VK
5473
5474 case 0x103c162a:
5475 case 0x103c162b:
5476
5477 case 0x103c1630:
5478 case 0x103c1631:
5479
5480 case 0x103c1633:
cbbf50b2 5481 case 0x103c1634:
335e3b86
VK
5482 case 0x103c1635:
5483
335e3b86
VK
5484 case 0x103c3587:
5485 case 0x103c3588:
5486 case 0x103c3589:
5487 case 0x103c358a:
5488
5489 case 0x103c3667:
5490 case 0x103c3668:
cbbf50b2
VK
5491 case 0x103c3669:
5492
5493 return 1;
335e3b86
VK
5494 }
5495 return 0;
5496}
5497
699d8995
VK
5498static void stac92hd8x_add_pin(struct hda_codec *codec, hda_nid_t nid)
5499{
5500 struct sigmatel_spec *spec = codec->spec;
5501 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
5502 int i;
5503
5504 spec->auto_pin_nids[spec->auto_pin_cnt] = nid;
5505 spec->auto_pin_cnt++;
5506
5507 if (get_defcfg_device(def_conf) == AC_JACK_MIC_IN &&
5508 get_defcfg_connect(def_conf) != AC_JACK_PORT_NONE) {
5509 for (i = 0; i < ARRAY_SIZE(stac92hd83xxx_dmic_nids); i++) {
5510 if (nid == stac92hd83xxx_dmic_nids[i]) {
5511 spec->auto_dmic_nids[spec->auto_dmic_cnt] = nid;
5512 spec->auto_dmic_cnt++;
5513 }
5514 }
5515 }
5516}
5517
5518static void stac92hd8x_add_adc(struct hda_codec *codec, hda_nid_t nid)
5519{
5520 struct sigmatel_spec *spec = codec->spec;
5521
5522 spec->auto_adc_nids[spec->auto_adc_cnt] = nid;
5523 spec->auto_adc_cnt++;
5524}
5525
5526static void stac92hd8x_add_mux(struct hda_codec *codec, hda_nid_t nid)
5527{
5528 int i, j;
5529 struct sigmatel_spec *spec = codec->spec;
5530
5531 for (i = 0; i < spec->auto_adc_cnt; i++) {
5532 if (get_connection_index(codec,
5533 spec->auto_adc_nids[i], nid) >= 0) {
5534 /* mux and volume for adc_nids[i] */
5535 if (!spec->auto_mux_nids[i]) {
5536 spec->auto_mux_nids[i] = nid;
5537 /* 92hd codecs capture volume is in mux */
5538 spec->auto_capvols[i] = HDA_COMPOSE_AMP_VAL(nid,
5539 3, 0, HDA_OUTPUT);
5540 }
5541 for (j = 0; j < spec->auto_dmic_cnt; j++) {
5542 if (get_connection_index(codec, nid,
5543 spec->auto_dmic_nids[j]) >= 0) {
5544 /* dmux for adc_nids[i] */
5545 if (!spec->auto_dmux_nids[i])
5546 spec->auto_dmux_nids[i] = nid;
5547 break;
5548 }
5549 }
5550 break;
5551 }
5552 }
5553}
5554
5555static void stac92hd8x_fill_auto_spec(struct hda_codec *codec)
5556{
5557 hda_nid_t nid, end_nid;
5558 unsigned int wid_caps, wid_type;
5559 struct sigmatel_spec *spec = codec->spec;
5560
5561 end_nid = codec->start_nid + codec->num_nodes;
5562
5563 for (nid = codec->start_nid; nid < end_nid; nid++) {
5564 wid_caps = get_wcaps(codec, nid);
5565 wid_type = get_wcaps_type(wid_caps);
5566
5567 if (wid_type == AC_WID_PIN)
5568 stac92hd8x_add_pin(codec, nid);
5569
5570 if (wid_type == AC_WID_AUD_IN && !(wid_caps & AC_WCAP_DIGITAL))
5571 stac92hd8x_add_adc(codec, nid);
5572 }
5573
5574 for (nid = codec->start_nid; nid < end_nid; nid++) {
5575 wid_caps = get_wcaps(codec, nid);
5576 wid_type = get_wcaps_type(wid_caps);
5577
5578 if (wid_type == AC_WID_AUD_SEL)
5579 stac92hd8x_add_mux(codec, nid);
5580 }
5581
5582 spec->pin_nids = spec->auto_pin_nids;
5583 spec->num_pins = spec->auto_pin_cnt;
5584 spec->adc_nids = spec->auto_adc_nids;
5585 spec->num_adcs = spec->auto_adc_cnt;
5586 spec->capvols = spec->auto_capvols;
5587 spec->capsws = spec->auto_capvols;
5588 spec->num_caps = spec->auto_adc_cnt;
5589 spec->mux_nids = spec->auto_mux_nids;
5590 spec->num_muxes = spec->auto_adc_cnt;
5591 spec->dmux_nids = spec->auto_dmux_nids;
5592 spec->num_dmuxes = spec->auto_adc_cnt;
5593 spec->dmic_nids = spec->auto_dmic_nids;
5594 spec->num_dmics = spec->auto_dmic_cnt;
5595}
5596
d0513fc6
MR
5597static int patch_stac92hd83xxx(struct hda_codec *codec)
5598{
5599 struct sigmatel_spec *spec;
a3e19973 5600 int default_polarity = -1; /* no default cfg */
d0513fc6
MR
5601 int err;
5602
361dab3e
TI
5603 err = alloc_stac_spec(codec, 0, NULL); /* pins filled later */
5604 if (err < 0)
5605 return err;
d0513fc6 5606
cbbf50b2
VK
5607 if (hp_bnb2011_with_dock(codec)) {
5608 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
5609 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
5610 }
5611
c36b5b05 5612 codec->epss = 0; /* longer delay needed for D3 */
699d8995
VK
5613 stac92hd8x_fill_auto_spec(codec);
5614
361dab3e 5615 spec = codec->spec;
1db7ccdb 5616 spec->linear_tone_beep = 0;
0ffa9807 5617 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6 5618 spec->digbeep_nid = 0x21;
d0513fc6 5619 spec->pwr_nids = stac92hd83xxx_pwr_nids;
d0513fc6 5620 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
c21ca4a8 5621 spec->multiout.dac_nids = spec->dac_nids;
d0513fc6 5622 spec->init = stac92hd83xxx_core_init;
6479c631 5623
d0513fc6
MR
5624 spec->board_config = snd_hda_check_board_config(codec,
5625 STAC_92HD83XXX_MODELS,
5626 stac92hd83xxx_models,
5627 stac92hd83xxx_cfg_tbl);
5556e147
VK
5628 /* check codec subsystem id if not found */
5629 if (spec->board_config < 0)
5630 spec->board_config =
5631 snd_hda_check_board_codec_sid_config(codec,
5632 STAC_92HD83XXX_MODELS, stac92hd83xxx_models,
5633 stac92hd83xxx_codec_id_cfg_tbl);
d0513fc6 5634again:
330ee995 5635 if (spec->board_config < 0)
9a11f1aa
TI
5636 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5637 codec->chip_name);
330ee995
TI
5638 else
5639 stac92xx_set_config_regs(codec,
af9f341a 5640 stac92hd83xxx_brd_tbl[spec->board_config]);
d0513fc6 5641
b4e81876
TI
5642 codec->patch_ops = stac92xx_patch_ops;
5643
5556e147
VK
5644 switch (spec->board_config) {
5645 case STAC_HP_ZEPHYR:
5646 spec->init = stac92hd83xxx_hp_zephyr_init;
5647 break;
a3e19973 5648 case STAC_92HD83XXX_HP_LED:
ff8a1e27
TI
5649 default_polarity = 0;
5650 break;
5651 case STAC_92HD83XXX_HP_INV_LED:
a3e19973
TI
5652 default_polarity = 1;
5653 break;
62cbde18
TI
5654 case STAC_92HD83XXX_HP_MIC_LED:
5655 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
5656 break;
8d032a8f
DH
5657 case STAC_92HD83XXX_HEADSET_JACK:
5658 spec->headset_jack = 1;
5659 break;
5556e147
VK
5660 }
5661
a3e19973 5662 if (find_mute_led_cfg(codec, default_polarity))
e108c7b7
VK
5663 snd_printd("mute LED gpio %d polarity %d\n",
5664 spec->gpio_led,
5665 spec->gpio_led_polarity);
5666
b4e81876 5667 if (spec->gpio_led) {
f1a73746 5668 if (!spec->vref_mute_led_nid) {
45eebda7
VK
5669 spec->gpio_mask |= spec->gpio_led;
5670 spec->gpio_dir |= spec->gpio_led;
5671 spec->gpio_data |= spec->gpio_led;
5672 } else {
5673 codec->patch_ops.set_power_state =
5674 stac92xx_set_power_state;
45eebda7 5675 }
b4e81876 5676 }
b4e81876 5677
62cbde18
TI
5678 if (spec->mic_mute_led_gpio) {
5679 spec->gpio_mask |= spec->mic_mute_led_gpio;
5680 spec->gpio_dir |= spec->mic_mute_led_gpio;
5681 spec->mic_mute_led_on = true;
5682 spec->gpio_data |= spec->mic_mute_led_gpio;
5683 }
5684
9009b0e4 5685 err = stac92xx_parse_auto_config(codec);
d0513fc6
MR
5686 if (!err) {
5687 if (spec->board_config < 0) {
5688 printk(KERN_WARNING "hda_codec: No auto-config is "
5689 "available, default to model=ref\n");
5690 spec->board_config = STAC_92HD83XXX_REF;
5691 goto again;
5692 }
5693 err = -EINVAL;
5694 }
5695
5696 if (err < 0) {
5697 stac92xx_free(codec);
5698 return err;
5699 }
5700
2d34e1b3
TI
5701 codec->proc_widget_hook = stac92hd_proc_hook;
5702
d0513fc6
MR
5703 return 0;
5704}
5705
6df703ae
HRK
5706static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
5707 hda_nid_t dig0pin)
5708{
5709 struct sigmatel_spec *spec = codec->spec;
5710 int idx;
5711
5712 for (idx = 0; idx < spec->num_pins; idx++)
5713 if (spec->pin_nids[idx] == dig0pin)
5714 break;
5715 if ((idx + 2) >= spec->num_pins)
5716 return 0;
5717
5718 /* dig1pin case */
330ee995 5719 if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
6df703ae
HRK
5720 return 2;
5721
5722 /* dig0pin + dig2pin case */
330ee995 5723 if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
6df703ae 5724 return 2;
330ee995 5725 if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
6df703ae
HRK
5726 return 1;
5727 else
5728 return 0;
5729}
5730
75d1aeb9
TI
5731/* HP dv7 bass switch - GPIO5 */
5732#define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
5733static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
5734 struct snd_ctl_elem_value *ucontrol)
5735{
5736 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5737 struct sigmatel_spec *spec = codec->spec;
5738 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
5739 return 0;
5740}
5741
5742static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
5743 struct snd_ctl_elem_value *ucontrol)
5744{
5745 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5746 struct sigmatel_spec *spec = codec->spec;
5747 unsigned int gpio_data;
5748
5749 gpio_data = (spec->gpio_data & ~0x20) |
5750 (ucontrol->value.integer.value[0] ? 0x20 : 0);
5751 if (gpio_data == spec->gpio_data)
5752 return 0;
5753 spec->gpio_data = gpio_data;
5754 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
5755 return 1;
5756}
5757
2b63536f 5758static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
75d1aeb9
TI
5759 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5760 .info = stac_hp_bass_gpio_info,
5761 .get = stac_hp_bass_gpio_get,
5762 .put = stac_hp_bass_gpio_put,
5763};
5764
5765static int stac_add_hp_bass_switch(struct hda_codec *codec)
5766{
5767 struct sigmatel_spec *spec = codec->spec;
5768
5769 if (!stac_control_new(spec, &stac_hp_bass_sw_ctrl,
5770 "Bass Speaker Playback Switch", 0))
5771 return -ENOMEM;
5772
5773 spec->gpio_mask |= 0x20;
5774 spec->gpio_dir |= 0x20;
5775 spec->gpio_data |= 0x20;
5776 return 0;
5777}
5778
e035b841
MR
5779static int patch_stac92hd71bxx(struct hda_codec *codec)
5780{
5781 struct sigmatel_spec *spec;
2b63536f 5782 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
5bdaaada 5783 unsigned int pin_cfg;
361dab3e 5784 int err;
e035b841 5785
361dab3e
TI
5786 err = alloc_stac_spec(codec, STAC92HD71BXX_NUM_PINS,
5787 stac92hd71bxx_pin_nids_4port);
5788 if (err < 0)
5789 return err;
e035b841 5790
361dab3e 5791 spec = codec->spec;
1b0e372d 5792 spec->linear_tone_beep = 0;
8daaaa97 5793 codec->patch_ops = stac92xx_patch_ops;
616f89e7
HRK
5794 switch (codec->vendor_id) {
5795 case 0x111d76b6:
5796 case 0x111d76b7:
616f89e7
HRK
5797 break;
5798 case 0x111d7603:
5799 case 0x111d7608:
5800 /* On 92HD75Bx 0x27 isn't a pin nid */
5801 spec->num_pins--;
5802 /* fallthrough */
5803 default:
5804 spec->pin_nids = stac92hd71bxx_pin_nids_6port;
5805 }
aafc4412 5806 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841
MR
5807 spec->board_config = snd_hda_check_board_config(codec,
5808 STAC_92HD71BXX_MODELS,
5809 stac92hd71bxx_models,
5810 stac92hd71bxx_cfg_tbl);
5811again:
330ee995 5812 if (spec->board_config < 0)
9a11f1aa
TI
5813 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
5814 codec->chip_name);
330ee995
TI
5815 else
5816 stac92xx_set_config_regs(codec,
af9f341a 5817 stac92hd71bxx_brd_tbl[spec->board_config]);
e035b841 5818
fc64b26c 5819 if (spec->board_config != STAC_92HD71BXX_REF) {
41c3b648
TI
5820 /* GPIO0 = EAPD */
5821 spec->gpio_mask = 0x01;
5822 spec->gpio_dir = 0x01;
5823 spec->gpio_data = 0x01;
5824 }
5825
6df703ae
HRK
5826 spec->dmic_nids = stac92hd71bxx_dmic_nids;
5827 spec->dmux_nids = stac92hd71bxx_dmux_nids;
5828
6479c631
TI
5829 spec->num_caps = STAC92HD71BXX_NUM_CAPS;
5830 spec->capvols = stac92hd71bxx_capvols;
5831 spec->capsws = stac92hd71bxx_capsws;
5832
541eee87
MR
5833 switch (codec->vendor_id) {
5834 case 0x111d76b6: /* 4 Port without Analog Mixer */
5835 case 0x111d76b7:
23c7b521
HRK
5836 unmute_init++;
5837 /* fallthru */
541eee87
MR
5838 case 0x111d76b4: /* 6 Port without Analog Mixer */
5839 case 0x111d76b5:
0ffa9807 5840 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5841 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK
5842 stac92hd71bxx_dmic_nids,
5843 STAC92HD71BXX_NUM_DMICS);
541eee87 5844 break;
aafc4412 5845 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI
5846 switch (spec->board_config) {
5847 case STAC_HP_M4:
72474be6 5848 /* Enable VREF power saving on GPIO1 detect */
3a93897e 5849 err = stac_add_event(codec, codec->afg,
c6e4c666
TI
5850 STAC_VREF_EVENT, 0x02);
5851 if (err < 0)
5852 return err;
c5d08bb5 5853 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6 5854 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3a93897e 5855 snd_hda_jack_detect_enable(codec, codec->afg, 0);
72474be6
MR
5856 spec->gpio_mask |= 0x02;
5857 break;
5858 }
8daaaa97 5859 if ((codec->revision_id & 0xf) == 0 ||
8c2f767b 5860 (codec->revision_id & 0xf) == 1)
8daaaa97 5861 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5862
aafc4412 5863 /* disable VSW */
ca8d33fc 5864 unmute_init++;
330ee995
TI
5865 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
5866 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
2b63536f 5867 spec->dmic_nids = stac92hd71bxx_dmic_5port_nids;
ab5a6ebe 5868 spec->num_dmics = stac92xx_connected_ports(codec,
2b63536f 5869 stac92hd71bxx_dmic_5port_nids,
6df703ae 5870 STAC92HD71BXX_NUM_DMICS - 1);
aafc4412
MR
5871 break;
5872 case 0x111d7603: /* 6 Port with Analog Mixer */
8c2f767b 5873 if ((codec->revision_id & 0xf) == 1)
8daaaa97 5874 spec->stream_delay = 40; /* 40 milliseconds */
8daaaa97 5875
aafc4412 5876 /* fallthru */
541eee87 5877 default:
0ffa9807 5878 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
ab5a6ebe 5879 spec->num_dmics = stac92xx_connected_ports(codec,
6df703ae
HRK
5880 stac92hd71bxx_dmic_nids,
5881 STAC92HD71BXX_NUM_DMICS);
5207e10e 5882 break;
541eee87
MR
5883 }
5884
5e68fb3c
DH
5885 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
5886 spec->init = stac92hd71bxx_core_init;
5887
ca8d33fc
MR
5888 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
5889 snd_hda_sequence_write_cache(codec, unmute_init);
5890
d78d7a90 5891 spec->aloopback_ctl = stac92hd71bxx_loopback;
4b33c767 5892 spec->aloopback_mask = 0x50;
541eee87
MR
5893 spec->aloopback_shift = 0;
5894
8daaaa97 5895 spec->powerdown_adcs = 1;
1cd2224c 5896 spec->digbeep_nid = 0x26;
e035b841
MR
5897 spec->mux_nids = stac92hd71bxx_mux_nids;
5898 spec->adc_nids = stac92hd71bxx_adc_nids;
d9737751 5899 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 5900 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR
5901
5902 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
5903 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
5207e10e 5904 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
6df703ae 5905 spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
e035b841 5906
d38cce70
KG
5907 snd_printdd("Found board config: %d\n", spec->board_config);
5908
6a14f585
MR
5909 switch (spec->board_config) {
5910 case STAC_HP_M4:
6a14f585 5911 /* enable internal microphone */
330ee995 5912 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
b9aea715
MR
5913 stac92xx_auto_set_pinctl(codec, 0x0e,
5914 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR
5915 /* fallthru */
5916 case STAC_DELL_M4_2:
5917 spec->num_dmics = 0;
5918 spec->num_smuxes = 0;
5919 spec->num_dmuxes = 0;
5920 break;
5921 case STAC_DELL_M4_1:
5922 case STAC_DELL_M4_3:
5923 spec->num_dmics = 1;
5924 spec->num_smuxes = 0;
ea18aa46 5925 spec->num_dmuxes = 1;
6a14f585 5926 break;
514bf54c
JG
5927 case STAC_HP_DV4_1222NR:
5928 spec->num_dmics = 1;
5929 /* I don't know if it needs 1 or 2 smuxes - will wait for
5930 * bug reports to fix if needed
5931 */
5932 spec->num_smuxes = 1;
5933 spec->num_dmuxes = 1;
514bf54c 5934 /* fallthrough */
2a6ce6e5
TI
5935 case STAC_HP_DV4:
5936 spec->gpio_led = 0x01;
5937 /* fallthrough */
e2ea57a8 5938 case STAC_HP_DV5:
330ee995 5939 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
e2ea57a8 5940 stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
6e34c033
TI
5941 /* HP dv6 gives the headphone pin as a line-out. Thus we
5942 * need to set hp_detect flag here to force to enable HP
5943 * detection.
5944 */
5945 spec->hp_detect = 1;
e2ea57a8 5946 break;
ae6241fb
CP
5947 case STAC_HP_HDX:
5948 spec->num_dmics = 1;
5949 spec->num_dmuxes = 1;
5950 spec->num_smuxes = 1;
26ebe0a2 5951 spec->gpio_led = 0x08;
86d190e7
TI
5952 break;
5953 }
443e26d0 5954
c357aab0 5955 if (hp_blike_system(codec->subsystem_id)) {
5bdaaada
VK
5956 pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
5957 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
5958 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
5959 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
5960 /* It was changed in the BIOS to just satisfy MS DTM.
5961 * Lets turn it back into slaved HP
5962 */
5963 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
5964 | (AC_JACK_HP_OUT <<
5965 AC_DEFCFG_DEVICE_SHIFT);
5966 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
5967 | AC_DEFCFG_SEQUENCE)))
5968 | 0x1f;
5969 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
5970 }
5971 }
5972
6a557c94 5973 if (find_mute_led_cfg(codec, 1))
c357aab0
VK
5974 snd_printd("mute LED gpio %d polarity %d\n",
5975 spec->gpio_led,
5976 spec->gpio_led_polarity);
5bdaaada 5977
86d190e7 5978 if (spec->gpio_led) {
f1a73746 5979 if (!spec->vref_mute_led_nid) {
45eebda7
VK
5980 spec->gpio_mask |= spec->gpio_led;
5981 spec->gpio_dir |= spec->gpio_led;
5982 spec->gpio_data |= spec->gpio_led;
5983 } else {
5984 codec->patch_ops.set_power_state =
5985 stac92xx_set_power_state;
45eebda7 5986 }
86d190e7 5987 }
6a14f585 5988
c21ca4a8 5989 spec->multiout.dac_nids = spec->dac_nids;
e035b841 5990
9009b0e4 5991 err = stac92xx_parse_auto_config(codec);
e035b841
MR
5992 if (!err) {
5993 if (spec->board_config < 0) {
5994 printk(KERN_WARNING "hda_codec: No auto-config is "
5995 "available, default to model=ref\n");
5996 spec->board_config = STAC_92HD71BXX_REF;
5997 goto again;
5998 }
5999 err = -EINVAL;
6000 }
6001
6002 if (err < 0) {
6003 stac92xx_free(codec);
6004 return err;
6005 }
6006
75d1aeb9 6007 /* enable bass on HP dv7 */
2a6ce6e5
TI
6008 if (spec->board_config == STAC_HP_DV4 ||
6009 spec->board_config == STAC_HP_DV5) {
75d1aeb9
TI
6010 unsigned int cap;
6011 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
6012 cap &= AC_GPIO_IO_COUNT;
6013 if (cap >= 6)
6014 stac_add_hp_bass_switch(codec);
6015 }
6016
2d34e1b3
TI
6017 codec->proc_widget_hook = stac92hd7x_proc_hook;
6018
e035b841 6019 return 0;
86d190e7 6020}
e035b841 6021
2f2f4251
M
6022static int patch_stac922x(struct hda_codec *codec)
6023{
6024 struct sigmatel_spec *spec;
c7d4b2fa 6025 int err;
2f2f4251 6026
361dab3e
TI
6027 err = alloc_stac_spec(codec, ARRAY_SIZE(stac922x_pin_nids),
6028 stac922x_pin_nids);
6029 if (err < 0)
6030 return err;
2f2f4251 6031
361dab3e 6032 spec = codec->spec;
1b0e372d 6033 spec->linear_tone_beep = 1;
f5fcc13c
TI
6034 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
6035 stac922x_models,
6036 stac922x_cfg_tbl);
536319af 6037 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR
6038 spec->gpio_mask = spec->gpio_dir = 0x03;
6039 spec->gpio_data = 0x03;
3fc24d85
TI
6040 /* Intel Macs have all same PCI SSID, so we need to check
6041 * codec SSID to distinguish the exact models
6042 */
6f0778d8 6043 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 6044 switch (codec->subsystem_id) {
5d5d3bc3
IZ
6045
6046 case 0x106b0800:
6047 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 6048 break;
5d5d3bc3
IZ
6049 case 0x106b0600:
6050 case 0x106b0700:
6051 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 6052 break;
5d5d3bc3
IZ
6053 case 0x106b0e00:
6054 case 0x106b0f00:
6055 case 0x106b1600:
6056 case 0x106b1700:
6057 case 0x106b0200:
6058 case 0x106b1e00:
6059 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 6060 break;
5d5d3bc3
IZ
6061 case 0x106b1a00:
6062 case 0x00000100:
6063 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 6064 break;
5d5d3bc3
IZ
6065 case 0x106b0a00:
6066 case 0x106b2200:
6067 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 6068 break;
536319af
NB
6069 default:
6070 spec->board_config = STAC_INTEL_MAC_V3;
6071 break;
3fc24d85
TI
6072 }
6073 }
6074
9e507abd 6075 again:
330ee995 6076 if (spec->board_config < 0)
9a11f1aa
TI
6077 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6078 codec->chip_name);
330ee995
TI
6079 else
6080 stac92xx_set_config_regs(codec,
af9f341a 6081 stac922x_brd_tbl[spec->board_config]);
2f2f4251 6082
c7d4b2fa
M
6083 spec->adc_nids = stac922x_adc_nids;
6084 spec->mux_nids = stac922x_mux_nids;
2549413e 6085 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 6086 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 6087 spec->num_dmics = 0;
a64135a2 6088 spec->num_pwrs = 0;
c7d4b2fa
M
6089
6090 spec->init = stac922x_core_init;
6479c631
TI
6091
6092 spec->num_caps = STAC922X_NUM_CAPS;
6093 spec->capvols = stac922x_capvols;
6094 spec->capsws = stac922x_capsws;
c7d4b2fa
M
6095
6096 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 6097
9009b0e4 6098 err = stac92xx_parse_auto_config(codec);
9e507abd
TI
6099 if (!err) {
6100 if (spec->board_config < 0) {
6101 printk(KERN_WARNING "hda_codec: No auto-config is "
6102 "available, default to model=ref\n");
6103 spec->board_config = STAC_D945_REF;
6104 goto again;
6105 }
6106 err = -EINVAL;
6107 }
3cc08dc6
MP
6108 if (err < 0) {
6109 stac92xx_free(codec);
6110 return err;
6111 }
6112
6113 codec->patch_ops = stac92xx_patch_ops;
6114
807a4636
TI
6115 /* Fix Mux capture level; max to 2 */
6116 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
6117 (0 << AC_AMPCAP_OFFSET_SHIFT) |
6118 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
6119 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
6120 (0 << AC_AMPCAP_MUTE_SHIFT));
6121
3cc08dc6
MP
6122 return 0;
6123}
6124
6125static int patch_stac927x(struct hda_codec *codec)
6126{
6127 struct sigmatel_spec *spec;
6128 int err;
6129
361dab3e
TI
6130 err = alloc_stac_spec(codec, ARRAY_SIZE(stac927x_pin_nids),
6131 stac927x_pin_nids);
6132 if (err < 0)
6133 return err;
3cc08dc6 6134
361dab3e 6135 spec = codec->spec;
1b0e372d 6136 spec->linear_tone_beep = 1;
45c1d85b 6137 codec->slave_dig_outs = stac927x_slave_dig_outs;
f5fcc13c
TI
6138 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
6139 stac927x_models,
6140 stac927x_cfg_tbl);
9e507abd 6141 again:
330ee995 6142 if (spec->board_config < 0)
9a11f1aa
TI
6143 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6144 codec->chip_name);
330ee995
TI
6145 else
6146 stac92xx_set_config_regs(codec,
af9f341a 6147 stac927x_brd_tbl[spec->board_config]);
3cc08dc6 6148
1cd2224c 6149 spec->digbeep_nid = 0x23;
8e9068b1
MR
6150 spec->adc_nids = stac927x_adc_nids;
6151 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
6152 spec->mux_nids = stac927x_mux_nids;
6153 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR
6154 spec->smux_nids = stac927x_smux_nids;
6155 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 6156 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 6157 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR
6158 spec->multiout.dac_nids = spec->dac_nids;
6159
af6ee302
TI
6160 if (spec->board_config != STAC_D965_REF) {
6161 /* GPIO0 High = Enable EAPD */
6162 spec->eapd_mask = spec->gpio_mask = 0x01;
6163 spec->gpio_dir = spec->gpio_data = 0x01;
6164 }
6165
81d3dbde 6166 switch (spec->board_config) {
93ed1503 6167 case STAC_D965_3ST:
93ed1503 6168 case STAC_D965_5ST:
8e9068b1 6169 /* GPIO0 High = Enable EAPD */
8e9068b1 6170 spec->num_dmics = 0;
93ed1503 6171 spec->init = d965_core_init;
81d3dbde 6172 break;
8e9068b1 6173 case STAC_DELL_BIOS:
780c8be4
MR
6174 switch (codec->subsystem_id) {
6175 case 0x10280209:
6176 case 0x1028022e:
6177 /* correct the device field to SPDIF out */
330ee995 6178 snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
780c8be4 6179 break;
86d190e7 6180 }
03d7ca17 6181 /* configure the analog microphone on some laptops */
330ee995 6182 snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
2f32d909 6183 /* correct the front output jack as a hp out */
330ee995 6184 snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
c481fca3 6185 /* correct the front input jack as a mic */
330ee995 6186 snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
c481fca3 6187 /* fallthru */
8e9068b1 6188 case STAC_DELL_3ST:
af6ee302
TI
6189 if (codec->subsystem_id != 0x1028022f) {
6190 /* GPIO2 High = Enable EAPD */
6191 spec->eapd_mask = spec->gpio_mask = 0x04;
6192 spec->gpio_dir = spec->gpio_data = 0x04;
6193 }
7f16859a
MR
6194 spec->dmic_nids = stac927x_dmic_nids;
6195 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 6196
ccca7cdc 6197 spec->init = dell_3st_core_init;
8e9068b1 6198 spec->dmux_nids = stac927x_dmux_nids;
1697055e 6199 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a 6200 break;
54930531
TI
6201 case STAC_927X_VOLKNOB:
6202 spec->num_dmics = 0;
6203 spec->init = stac927x_volknob_core_init;
6204 break;
7f16859a 6205 default:
8e9068b1 6206 spec->num_dmics = 0;
8e9068b1 6207 spec->init = stac927x_core_init;
af6ee302 6208 break;
7f16859a
MR
6209 }
6210
6479c631
TI
6211 spec->num_caps = STAC927X_NUM_CAPS;
6212 spec->capvols = stac927x_capvols;
6213 spec->capsws = stac927x_capsws;
6214
a64135a2 6215 spec->num_pwrs = 0;
d78d7a90 6216 spec->aloopback_ctl = stac927x_loopback;
e1f0d669
MR
6217 spec->aloopback_mask = 0x40;
6218 spec->aloopback_shift = 0;
c0cea0d0 6219 spec->eapd_switch = 1;
8e9068b1 6220
9009b0e4 6221 err = stac92xx_parse_auto_config(codec);
9e507abd
TI
6222 if (!err) {
6223 if (spec->board_config < 0) {
6224 printk(KERN_WARNING "hda_codec: No auto-config is "
6225 "available, default to model=ref\n");
6226 spec->board_config = STAC_D965_REF;
6227 goto again;
6228 }
6229 err = -EINVAL;
6230 }
c7d4b2fa
M
6231 if (err < 0) {
6232 stac92xx_free(codec);
6233 return err;
6234 }
2f2f4251
M
6235
6236 codec->patch_ops = stac92xx_patch_ops;
6237
2d34e1b3
TI
6238 codec->proc_widget_hook = stac927x_proc_hook;
6239
52987656
TI
6240 /*
6241 * !!FIXME!!
6242 * The STAC927x seem to require fairly long delays for certain
6243 * command sequences. With too short delays (even if the answer
6244 * is set to RIRB properly), it results in the silence output
6245 * on some hardwares like Dell.
6246 *
6247 * The below flag enables the longer delay (see get_response
6248 * in hda_intel.c).
6249 */
6250 codec->bus->needs_damn_long_delay = 1;
6251
e28d8322
TI
6252 /* no jack detecion for ref-no-jd model */
6253 if (spec->board_config == STAC_D965_REF_NO_JD)
6254 spec->hp_detect = 0;
6255
2f2f4251
M
6256 return 0;
6257}
6258
f3302a59
MP
6259static int patch_stac9205(struct hda_codec *codec)
6260{
6261 struct sigmatel_spec *spec;
8259980e 6262 int err;
f3302a59 6263
361dab3e
TI
6264 err = alloc_stac_spec(codec, ARRAY_SIZE(stac9205_pin_nids),
6265 stac9205_pin_nids);
6266 if (err < 0)
6267 return err;
f3302a59 6268
361dab3e 6269 spec = codec->spec;
1b0e372d 6270 spec->linear_tone_beep = 1;
f5fcc13c
TI
6271 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
6272 stac9205_models,
6273 stac9205_cfg_tbl);
9e507abd 6274 again:
330ee995 6275 if (spec->board_config < 0)
9a11f1aa
TI
6276 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6277 codec->chip_name);
330ee995
TI
6278 else
6279 stac92xx_set_config_regs(codec,
af9f341a 6280 stac9205_brd_tbl[spec->board_config]);
f3302a59 6281
1cd2224c 6282 spec->digbeep_nid = 0x23;
f3302a59 6283 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 6284 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 6285 spec->mux_nids = stac9205_mux_nids;
2549413e 6286 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR
6287 spec->smux_nids = stac9205_smux_nids;
6288 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 6289 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 6290 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 6291 spec->dmux_nids = stac9205_dmux_nids;
1697055e 6292 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 6293 spec->num_pwrs = 0;
f3302a59
MP
6294
6295 spec->init = stac9205_core_init;
d78d7a90 6296 spec->aloopback_ctl = stac9205_loopback;
f3302a59 6297
6479c631
TI
6298 spec->num_caps = STAC9205_NUM_CAPS;
6299 spec->capvols = stac9205_capvols;
6300 spec->capsws = stac9205_capsws;
6301
e1f0d669
MR
6302 spec->aloopback_mask = 0x40;
6303 spec->aloopback_shift = 0;
d9a4268e
TI
6304 /* Turn on/off EAPD per HP plugging */
6305 if (spec->board_config != STAC_9205_EAPD)
6306 spec->eapd_switch = 1;
f3302a59 6307 spec->multiout.dac_nids = spec->dac_nids;
87d48363 6308
ae0a8ed8 6309 switch (spec->board_config){
ae0a8ed8 6310 case STAC_9205_DELL_M43:
87d48363 6311 /* Enable SPDIF in/out */
330ee995
TI
6312 snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
6313 snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
87d48363 6314
4fe5195c 6315 /* Enable unsol response for GPIO4/Dock HP connection */
3a93897e 6316 err = stac_add_event(codec, codec->afg, STAC_VREF_EVENT, 0x01);
c6e4c666
TI
6317 if (err < 0)
6318 return err;
c5d08bb5 6319 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c 6320 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3a93897e 6321 snd_hda_jack_detect_enable(codec, codec->afg, 0);
4fe5195c
MR
6322
6323 spec->gpio_dir = 0x0b;
0fc9dec4 6324 spec->eapd_mask = 0x01;
4fe5195c
MR
6325 spec->gpio_mask = 0x1b;
6326 spec->gpio_mute = 0x10;
e2e7d624 6327 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 6328 * GPIO3 Low = DRM
87d48363 6329 */
4fe5195c 6330 spec->gpio_data = 0x01;
ae0a8ed8 6331 break;
b2c4f4d7
MR
6332 case STAC_9205_REF:
6333 /* SPDIF-In enabled */
6334 break;
ae0a8ed8
TD
6335 default:
6336 /* GPIO0 High = EAPD */
0fc9dec4 6337 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 6338 spec->gpio_data = 0x01;
ae0a8ed8
TD
6339 break;
6340 }
33382403 6341
9009b0e4 6342 err = stac92xx_parse_auto_config(codec);
9e507abd
TI
6343 if (!err) {
6344 if (spec->board_config < 0) {
6345 printk(KERN_WARNING "hda_codec: No auto-config is "
6346 "available, default to model=ref\n");
6347 spec->board_config = STAC_9205_REF;
6348 goto again;
6349 }
6350 err = -EINVAL;
6351 }
f3302a59
MP
6352 if (err < 0) {
6353 stac92xx_free(codec);
6354 return err;
6355 }
6356
6357 codec->patch_ops = stac92xx_patch_ops;
6358
2d34e1b3
TI
6359 codec->proc_widget_hook = stac9205_proc_hook;
6360
f3302a59
MP
6361 return 0;
6362}
6363
db064e50 6364/*
6d859065 6365 * STAC9872 hack
db064e50
TI
6366 */
6367
2b63536f 6368static const struct hda_verb stac9872_core_init[] = {
1624cb9a 6369 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM
6370 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
6371 {}
6372};
6373
2b63536f 6374static const hda_nid_t stac9872_pin_nids[] = {
caa10b6e
TI
6375 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
6376 0x11, 0x13, 0x14,
6377};
6378
2b63536f 6379static const hda_nid_t stac9872_adc_nids[] = {
caa10b6e
TI
6380 0x8 /*,0x6*/
6381};
6382
2b63536f 6383static const hda_nid_t stac9872_mux_nids[] = {
caa10b6e
TI
6384 0x15
6385};
6386
2b63536f 6387static const unsigned long stac9872_capvols[] = {
6479c631
TI
6388 HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT),
6389};
6390#define stac9872_capsws stac9872_capvols
6391
2b63536f 6392static const unsigned int stac9872_vaio_pin_configs[9] = {
307282c8
TI
6393 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
6394 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
6395 0x90a7013e
6396};
6397
ea734963 6398static const char * const stac9872_models[STAC_9872_MODELS] = {
307282c8
TI
6399 [STAC_9872_AUTO] = "auto",
6400 [STAC_9872_VAIO] = "vaio",
6401};
6402
2b63536f 6403static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
307282c8
TI
6404 [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
6405};
6406
2b63536f 6407static const struct snd_pci_quirk stac9872_cfg_tbl[] = {
b04add95
TI
6408 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
6409 "Sony VAIO F/S", STAC_9872_VAIO),
307282c8
TI
6410 {} /* terminator */
6411};
6412
6d859065 6413static int patch_stac9872(struct hda_codec *codec)
db064e50
TI
6414{
6415 struct sigmatel_spec *spec;
1e137f92 6416 int err;
db064e50 6417
361dab3e
TI
6418 err = alloc_stac_spec(codec, ARRAY_SIZE(stac9872_pin_nids),
6419 stac9872_pin_nids);
6420 if (err < 0)
6421 return err;
6422
6423 spec = codec->spec;
1b0e372d 6424 spec->linear_tone_beep = 1;
caa10b6e
TI
6425
6426 spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
6427 stac9872_models,
6428 stac9872_cfg_tbl);
307282c8 6429 if (spec->board_config < 0)
9a11f1aa
TI
6430 snd_printdd(KERN_INFO "hda_codec: %s: BIOS auto-probing.\n",
6431 codec->chip_name);
307282c8
TI
6432 else
6433 stac92xx_set_config_regs(codec,
6434 stac9872_brd_tbl[spec->board_config]);
db064e50 6435
1e137f92
TI
6436 spec->multiout.dac_nids = spec->dac_nids;
6437 spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
6438 spec->adc_nids = stac9872_adc_nids;
6439 spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
6440 spec->mux_nids = stac9872_mux_nids;
1e137f92 6441 spec->init = stac9872_core_init;
6479c631
TI
6442 spec->num_caps = 1;
6443 spec->capvols = stac9872_capvols;
6444 spec->capsws = stac9872_capsws;
1e137f92 6445
9009b0e4 6446 err = stac92xx_parse_auto_config(codec);
1e137f92
TI
6447 if (err < 0) {
6448 stac92xx_free(codec);
6449 return -EINVAL;
6450 }
6451 spec->input_mux = &spec->private_imux;
6452 codec->patch_ops = stac92xx_patch_ops;
db064e50
TI
6453 return 0;
6454}
6455
6456
2f2f4251
M
6457/*
6458 * patch entries
6459 */
2b63536f 6460static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
2f2f4251
M
6461 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
6462 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
6463 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
6464 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
6465 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
6466 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
6467 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP
6468 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
6469 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
6470 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
6471 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
6472 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
6473 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP
6474 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
6475 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
6476 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
6477 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
6478 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
6479 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
6480 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
6481 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
6482 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
6483 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD
6484 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
6485 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
6486 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
6487 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
6488 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
6489 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI
6490 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
6491 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM
6492 /* The following does not take into account .id=0x83847661 when subsys =
6493 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
6494 * currently not fully supported.
6495 */
6496 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
6497 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
6498 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
a5c0f886 6499 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
f3302a59
MP
6500 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
6501 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
6502 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
6503 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
6504 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
6505 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
6506 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
6507 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 6508 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6 6509 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
a9694faa 6510 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
d0513fc6 6511 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
ff2e7337 6512 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
8a345a04
CC
6513 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
6514 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
36706005
CC
6515 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
6516 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
6517 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
6518 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
aafc4412 6519 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR
6520 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
6521 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 6522 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR
6523 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6524 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
6525 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6526 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
6527 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6528 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
6529 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
6530 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4d8ec5f3
CC
6531 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
6532 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
6533 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
6534 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
6535 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
6536 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
6537 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
6538 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
6539 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
6540 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
6541 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
6542 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
6543 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
6544 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
6545 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
46724c2e 6546 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6547 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4dfb8a45
VK
6548 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
6549 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
ab5a6ebe 6550 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
ad5d8755
CC
6551 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
6552 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
6553 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
6554 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
6555 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
6556 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
6557 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
6558 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
6559 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
6560 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
6561 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
6562 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
2f2f4251
M
6563 {} /* terminator */
6564};
1289e9e8
TI
6565
6566MODULE_ALIAS("snd-hda-codec-id:8384*");
6567MODULE_ALIAS("snd-hda-codec-id:111d*");
6568
6569MODULE_LICENSE("GPL");
6570MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
6571
6572static struct hda_codec_preset_list sigmatel_list = {
6573 .preset = snd_hda_preset_sigmatel,
6574 .owner = THIS_MODULE,
6575};
6576
6577static int __init patch_sigmatel_init(void)
6578{
6579 return snd_hda_add_codec_preset(&sigmatel_list);
6580}
6581
6582static void __exit patch_sigmatel_exit(void)
6583{
6584 snd_hda_delete_codec_preset(&sigmatel_list);
6585}
6586
6587module_init(patch_sigmatel_init)
6588module_exit(patch_sigmatel_exit)
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